JP4846305B2 - Flash memory write control method and program - Google Patents

Description

  The present invention relates to a flash memory write control method and program.

  Conventionally, a terminal device including a communication unit is connected to a relay device that performs settings for communication between the terminal devices, and the relay device is connected to a management device so that the management device manages the relay device. A system has been proposed (see, for example, Patent Document 1). In such a remote management system, communication information between terminal devices and setting information such as encryption information are sent from the management device to the relay device. The relay device performs settings for communication between terminal devices based on the received setting information. At this time, even if the relay device is turned off after receiving the setting information from the management device, after the relay device is started, the latest information received before the relay device is turned off It is preferable that the relay device is set based on the setting information. For this reason, in the conventional relay device described above, when the setting information is received, the setting information is written in the flash memory included in the relay device in response to the reception.

  With reference to FIG. 7, the writing to the flash memory in the above-described conventional relay device will be described. 7A shows the setting information received by the relay device, FIG. 7B shows the erase operation of the flash memory in the conventional relay device, and FIG. 7C shows the flash memory. A write operation to the memory is shown. Here, an example is shown in which the relay device receives the setting information a, b, c, d, e, and f every 1.3 seconds, and the time taken to erase the flash memory is 1 second. The time required for writing to the flash memory is about several hundreds of microseconds.

In response to receiving the setting information a, the relay device writes the setting information a into the RAM, erases the flash memory, and writes the setting information a into the flash memory after erasing the flash memory. Subsequently, when receiving the setting information b, the relay apparatus writes the setting information b into the RAM and erases the flash memory in response to the reception of the setting information b, and after erasing the flash memory, The setting information a and the setting information b written in the RAM are written. In this way, in the above-described conventional relay device, every time setting information is received, all the setting information written in the RAM immediately before the writing into the flash memory is written into the flash memory.
JP 2004-30625 A

  When the relay device of the conventional remote management system described above receives the setting information, the relay device transmits a confirmation signal indicating that the setting information has been normally received to the management device. If the management apparatus does not receive a confirmation signal from the relay apparatus for a certain time after transmitting the setting information, the management apparatus determines that the setting information has not been received by the relay apparatus and transmits the setting information to the relay apparatus again. . For this reason, for example, when the management device cannot receive a confirmation signal from the relay device due to a network failure between the management device and the relay device, the setting information is continuously transmitted at regular intervals. Become.

  However, in general, a flash memory has an upper limit on the number of data writes, and the upper limit is about 100,000 times. For this reason, if the relay device continuously receives the setting information, the number of data write operations may soon reach the upper limit and the flash memory may be damaged.

  The present invention has been made in view of the above-described problems, and an object of the present invention is to provide a flash memory write control method and program that reduce the number of times the flash memory is written.

  In order to achieve the above-described object, a flash memory write control method according to the present invention is a relay device that is connected to a plurality of terminal devices and acquires setting information about communication between terminal devices from a management device. This process is performed when setting information is written in a flash memory included in the apparatus, and includes the following steps.

  First, it is determined whether or not the information received from the management apparatus is setting information. If the received information is setting information as a result of the determination, the information is stored in a RAM included in the relay apparatus. Next, in response to the determination that the received information is the setting information, the write grace timer included in the relay apparatus is reset and then started. Next, it is repeatedly determined whether the waiting time counted by the write grace timer has reached the write grace time stored in advance in the ROM included in the relay device. When the standby time reaches the write grace time, the setting information stored in the RAM is written into the flash memory.

  In implementing the flash memory write control method described above, it is preferable to start after resetting the write grace timer when new information is received before the standby time reaches the write grace time. Is good.

  A program for executing each of the above-described methods is a computer that is connected to a plurality of terminal devices and that includes a relay device including a flash memory that acquires setting information regarding communication between the terminal devices from the management device. The following functions are implemented on the computer.

  As a first function, it is determined whether or not the information received from the management apparatus is setting information. If the received information is setting information as a result of the determination, the information is stored in a RAM included in the relay apparatus. save. As a second function, in response to the determination that the received information is the setting information, the write grace timer included in the relay apparatus is reset and then started. As a third function, it is repeatedly determined whether or not the standby time counted by the write grace timer has reached the write grace time stored in advance in the ROM included in the relay apparatus. As a fourth function, when the standby time reaches the write grace time, the setting information stored in the RAM is written to the flash memory.

  Further, according to a preferred embodiment of the program for performing write control of the flash memory according to the present invention, when new information is received before the standby time reaches the write grace time, the write grace timer is reset. After that, it is better to make the computer start the function.

  According to the flash memory write control method of the present invention, since the write grace time is provided before the writing to the flash memory is started, even if the setting information is continuously received, the write grace time is not exceeded. Once the setting information received in the RAM is temporarily stored in the RAM and all the setting information stored in the RAM can be written to the flash memory at the same time after the write grace time has elapsed, the number of writes to the flash memory Can be reduced.

  In addition, when a new setting information is received during the write grace period, the write grace period will be substantially extended if the configuration is started after resetting the write grace timer. Since the setting information received within the write grace time is collectively written after the extended write grace time has elapsed, the number of times of writing to the flash memory can be further reduced.

  Furthermore, according to the program for implementing each of the above-described methods, the invention of the above-described method can be implemented through download / installation from an information recording medium (such as package software) or a communication network.

  Hereinafter, embodiments of the present invention will be described with reference to the drawings. However, each component and the arrangement relationship are merely schematically shown to the extent that the present invention can be understood. In the following, a preferred configuration example of the present invention will be described. However, numerical conditions and the like are merely preferred examples. Therefore, the present invention is not limited to the following embodiment.

(Configuration of remote management system)
FIG. 1 is a conceptual diagram for explaining a remote management system in which write control of a flash memory according to the present invention is performed. The relay device 100 is connected to a plurality of terminal devices 10 that are electronic devices, and relays communication between the terminal devices 10. In addition, the relay device 100 is connected to the management device 30 via the public network (or the Internet) 20 and sets the communication speed between the terminal devices 10 acquired from the management device 30, encryption information, and the like. Based on the information, settings for communication between the terminal devices 10 are performed.

  The configuration of the relay device will be described with reference to FIG. FIG. 2 is a schematic diagram for explaining the configuration of the relay apparatus. As the relay device 100, for example, a computer having a function as a router can be used. The relay device 100 includes a central processing unit (CPU) 110, a random access memory (RAM) 106, a ROM (Read Only Memory) 104, a flash memory 108, an input / output interface 102, and a clock. A signal generator 107 is provided. The terminal device 10 illustrated in FIG. 1 is connected to the input / output interface 102 of the relay device 100. The input / output interface 102 is connected to the public network 20 and can communicate with the management apparatus 30 shown in FIG.

  The control means 112 included in the CPU 110 reads a program stored in the ROM 104 so as to be readable, and executes the program, thereby transmitting / receiving means 122, setting information receiving means 124, write grace means 126, flash memory writing means 128, and the like. Each functional means is realized.

  The transmission / reception means 122 has a function as a router that transmits a data signal received from one terminal apparatus 10 to another terminal apparatus 10.

  The setting information receiving unit 124 identifies an identifier (ID) attached to information received from the management apparatus 30 via the input / output interface 102, and has an identifier indicating that the information is setting information. In this case, it is stored as setting information in the RAM 106 so that it can be read out. In addition, the setting information receiving unit 124 preferably has a function of transmitting a confirmation signal indicating that the setting information has been received to the management apparatus 30 via the input / output interface 102 in response to the reception of the setting information.

  The write grace unit 126 generates a write start signal after waiting for a preset write grace time in response to the reception of the setting information by the setting information receiving unit 124. The write grace time is measured using a write grace timer 127 provided in the write grace means 126. The write grace timer 127 can be realized by counting the number of clock signals using a so-called clock signal generated by the clock signal generator 107 and controlling the operation timing of the CPU 110 or the like. When the standby time determined by the product of the counted number of clock signals and the period of the clock signal reaches the write grace time, the write grace means 126 generates a write start signal and transmits the write start signal. Here, the number of clock signals is written in the RAM 106 so that it can be read and rewritten.

  When the relay device 100 and the management device 30 are connected using the general public line network 20, the management device 30 does not receive the confirmation signal from the relay device 100 within one second from the transmission of the setting information. Sometimes, the configuration information is usually retransmitted. When the retransmission interval from the management apparatus 30 is about 1 second, it is preferable to set the write grace time to 2 seconds based on this retransmission interval. The write grace time may be stored in the ROM 104 so as to be readable, and the write grace means 126 may be read from the ROM 104, or the write grace time may be incorporated in a program for realizing the write grace means 126 in advance. You can leave it.

  The flash memory writing unit 128 writes the setting information stored in the RAM 106 to the flash memory 108 in response to the write start signal generated by the write grace unit 126. When writing to the flash memory 108, first, all data recorded in the flash memory 108 is erased. Thereafter, the flash memory writing unit 128 writes the setting information stored in the RAM 106 after confirming that the data recorded in the flash memory 108 is erased. Here, when a plurality of setting information is stored in the RAM 106 at the time of writing, all the setting information is written in a lump.

(Operation of the first embodiment)
With reference to FIGS. 3 and 4, the setting information write processing to the flash memory according to the first embodiment will be described. FIG. 3 is a diagram illustrating a processing flow of the first embodiment.

  In step (hereinafter, step is represented by S) 10, the setting information receiving unit 124 determines whether the information received from the management apparatus 30 via the input / output interface 102 is the setting information. In this determination, the setting information receiving unit 124 reads the setting information ID written as the ID indicating the setting information in the ROM 104, and compares the identifier (ID) attached to the received information with the setting information ID. It is done by doing. When the setting information receiving unit 124 determines that the received information is setting information, in S12, the setting information receiving unit 124 stores the setting information in a readable manner in the RAM 106 and generates a confirmation signal indicating that the setting information has been received. The data is transmitted to the management apparatus 30 via the input / output interface 102.

  In S <b> 20, the write grace unit 126 resets the write grace timer 127 in response to the writing of the setting information to the RAM 106. In this process, the write grace timer 127 first gives a command to the RAM 106 to set the number of clock signals written therein to zero.

  In S 22, the write grace unit 126 starts counting the clock signal in the write grace timer 127 after receiving a confirmation signal indicating that the number of clock signals written in the RAM 106 is zero.

  In S <b> 25, the setting information receiving unit 124 determines whether setting information has been received from the management apparatus 30. In this process, first, it is determined whether or not the information received from the management apparatus 30 is received via the input / output interface 102. If the information is received, is the received information the setting information? Determine whether or not. Whether the received information is the setting information is determined by the setting information receiving unit 124 reading out the setting information ID written as the ID indicating the setting information in the ROM 104 and attached to the received information. For example, the identifier (ID) is compared with the setting information ID. When the setting information receiving unit 124 determines that the received information is the setting information, in S27, the setting information receiving unit 124 stores the setting information in a readable manner in the RAM 106, and generates a confirmation signal indicating that the setting information has been received. The data is transmitted to the management apparatus 30 via the input / output interface 102.

  In S30, the write grace unit 126 determines whether or not the write grace time has elapsed, that is, whether or not the standby time counted by the write grace timer 127 has reached a preset write grace time. This determination is made by comparing the number of clock signals counted when measuring the waiting time with the number of clock signals corresponding to the write grace time read from the RAM 106. The write grace unit 126 repeats the determination process of S30 until the standby time reaches the write grace time. That is, when the standby time reaches the write grace time (in the case of Y), the write grace unit 126 generates a write start signal that permits the start of writing to the flash memory, and then sends the write start signal to the flash memory writing unit 128. Send to. On the other hand, when the waiting time has not reached the write grace time (in the case of N), it is determined whether or not the setting information has been received (S25), and if it has not been received, the process returns to S30.

  In S40, the flash memory writing unit 128 starts erasing the flash memory 108 in response to receiving the write start signal. In this process, the flash memory writing means 128 gives an erase command to the flash memory 108 and starts erasing all data recorded in the flash memory 108. Note that it takes about several seconds to erase the flash memory 108. For this reason, the setting information receiving unit 124 may receive setting information from the management apparatus 30 while the flash memory 108 is being erased.

  Therefore, in S45, the setting information receiving unit 124 determines whether the setting information is received from the management apparatus 30. In this process, first, it is determined whether or not the information received from the management apparatus 30 is received via the input / output interface 102. If the information is received, is the received information the setting information? Determine whether or not. Whether the received information is the setting information is determined by the setting information receiving unit 124 reading out the setting information ID written as the ID indicating the setting information in the ROM 104 and attached to the received information. For example, the identifier (ID) is compared with the setting information ID. When the setting information receiving unit 124 determines that the received information is the setting information, in S47, the setting information receiving unit 124 stores the setting information in a readable manner in the RAM 106 and generates a confirmation signal indicating that the setting information has been received. The data is transmitted to the management apparatus 30 via the input / output interface 102.

  In S50, the flash memory writing unit 128 determines whether or not the erasure of data in the flash memory 108 is completed. If the erasure has not been completed, the process returns to S45. If it has been erased, the flash memory writing means 128 receives the confirmation signal indicating that all of the data recorded in the flash memory 108 has been erased, and then receives the setting information stored in it from the RAM 106. The data is read and written into the flash memory 108 (S60). In this case, when a plurality of setting information is stored in the RAM 106, all the setting information stored in the RAM 106 is written at once immediately before writing to the flash memory 108.

  FIG. 4 is a time chart for explaining the operation of the relay device in the first embodiment.

  FIG. 4A shows setting information received by the relay device. Here, a situation is shown in which setting information a, b, c, d, e, and f are received every 1.3 seconds.

  4B shows an erase operation of the flash memory 108 in the relay device 100, and FIG. 4C shows a write operation to the flash memory 108. The time required for erasing the flash memory is 1 second, and the write grace time is 2 seconds. The time required for writing data in the flash memory is about several hundreds of microseconds. The relay apparatus 100 receives the setting information a and writes it in the RAM 106 (S12), and waits for 2 seconds, which is a write grace period, without writing to the flash memory. That is, the relay device 100 repeatedly determines whether or not the standby time has reached the write grace time (S25 to S30). The relay device 100 starts erasing the flash memory 108 after the write grace time has elapsed (S40). When the setting information b and the setting information c are received while the relay device 100 is on standby or while the flash memory is being erased, the setting information receiving unit 124 stores the setting information b and the setting information c in the RAM 106. (S27, S47). The flash memory writing unit 128 collectively writes all the setting information written in the RAM 106 after erasing the flash memory 108, here, the setting information a, the setting information b, and the setting information c (S60). ).

  After writing the setting information a, the setting information b, and the setting information c, the process shown in FIG. 3 is performed again. First, it is determined whether or not setting information has been received (S10). If setting information d is received, the setting information d is written to the RAM 106 (S12). Thereafter, the relay device 100 waits without writing to the flash memory until two seconds, which is a write grace time, have elapsed (S25 to S30). The relay device 100 starts erasing the flash memory 108 after the write grace time has elapsed (S40). When the setting information e and the setting information f are received while the relay device 100 is on standby or while the flash memory 108 is being erased, the setting information receiving unit 124 sets the setting information e and the setting information f. It is written in the RAM 106 (S27, S47). After erasing the flash memory 108, the relay device 100 writes all the setting information written in the RAM 106, here, the setting information a, b, c, d, e, and f to the flash memory 108 at once. (S60).

  Here, it is assumed that the setting information a, b, c, d, e, and f are all different information. For example, when the management apparatus 30 retransmits the setting information, two or more settings are set. The information becomes the same information. In this case, the setting information receiving means 124 may be configured to overwrite the newly received setting information over the memory address in which the same already stored setting information is recorded when writing to the RAM 106. Further, the setting information receiving unit 124 may be configured to secure a storage capacity for deleting old setting information and writing new setting information in accordance with the storage capacity of the RAM 106. As these configurations, any suitable conventional well-known configuration used in the relay device can be used.

  As described with reference to FIG. 7, according to the conventional writing method, when setting information is continuously received, the flash memory is erased and the setting information is written when the setting information is received. . On the other hand, according to the writing method of the first embodiment, since the write grace time is provided before the erasing of the flash memory is started, the erasing and setting information of the flash memory are received when the setting information a is received. Is not written. After the write grace time elapses, the flash memory is erased and the setting information a, setting information b, and setting information c are written together. Therefore, by using the writing method of the first embodiment, the number of flash memory writes can be reduced as compared with the conventional writing method.

  Here, an example in which the write grace time is set to 2 seconds based on the fact that the setting information retransmission interval from the management device to the relay device is about 1 second has been described. However, the write grace time is set to 2 seconds. It is not limited. Increasing the write grace time can further reduce the number of writes to the flash memory. However, since it takes a long time until the writing to the flash memory is completed after the setting information is received, there is a risk that the setting information received by the relay device may be lost due to the power-off at the relay device occurring during that time. . On the other hand, if the write grace time is shortened, the possibility of erasure of setting information due to power-off at the relay device is reduced, but the degree of reduction in the number of times of writing to the flash memory is reduced. Therefore, the write grace time can be set to any suitable time from the interval of retransmission of the setting information from the management device to the relay device and the possibility of power-off that occurs during the end of writing to the flash memory after receiving the setting information. Should be set.

(Operation of Second Embodiment)
With reference to FIG. 5 and FIG. 6, the process of writing the setting information to the flash memory according to the second embodiment will be described. FIG. 5 is a diagram illustrating a processing flow of the second embodiment.

  In S10, the setting information receiving unit 124 determines whether the information received from the management apparatus 30 via the input / output interface 102 is setting information. In this determination, the setting information receiving unit 124 reads the setting information ID written as the ID indicating the setting information in the ROM 104, and compares the identifier (ID) attached to the received information with the setting information ID. It is done by doing. When the setting information receiving unit 124 determines that the received information is setting information, in S12, the setting information receiving unit 124 stores the setting information in a readable manner in the RAM 106 and generates a confirmation signal indicating that the setting information has been received. The data is transmitted to the management apparatus 30 via the input / output interface 102.

  In S <b> 20, the write grace unit 126 resets the write grace timer 127 in response to the writing of the setting information to the RAM 106. In this process, the write grace timer 127 first gives a command to the RAM 106 to set the number of clock signals written therein to zero.

  In S 22, the write grace unit 126 starts counting the clock signal in the write grace timer 127 after receiving a confirmation signal indicating that the number of clock signals written in the RAM 106 is zero.

  In S <b> 25, the setting information receiving unit 124 determines whether setting information has been received from the management apparatus 30. In this process, first, it is determined whether or not the information received from the management apparatus 30 is received via the input / output interface 102. If the information is received, is the received information the setting information? Determine whether or not. Whether the received information is the setting information is determined by the setting information receiving unit 124 reading out the setting information ID written as the ID indicating the setting information in the ROM 104 and attached to the received information. For example, the identifier (ID) is compared with the setting information ID. When the setting information receiving unit 124 determines that the received information is the setting information, in S27, the setting information receiving unit 124 stores the setting information in a readable manner in the RAM 106, and generates a confirmation signal indicating that the setting information has been received. The data is transmitted to the management apparatus 30 via the input / output interface 102. After the setting information is stored in the RAM 106, the process returns to S20. That is, the write grace means 126 resets the write grace timer 127 in response to the writing of the setting information to the RAM 106 (S20), and then starts (S22).

  In S30, the write grace unit 126 determines whether or not the write grace time has elapsed, that is, whether or not the standby time counted by the write grace timer 127 has reached a preset write grace time. This determination is made by comparing the number of clock signals counted when measuring the waiting time with the number of clock signals corresponding to the write grace time read from the RAM 106. The write grace unit 126 repeats the determination process of S30 until the standby time reaches the write grace time. That is, when the standby time reaches the write grace time (in the case of Y), the write grace unit 126 generates a write start signal that permits the start of writing to the flash memory, and then sends the write start signal to the flash memory writing unit 128. Send to. On the other hand, when the waiting time has not reached the write grace time (in the case of N), it is determined whether or not the setting information has been received (S25), and if it has not been received, the process returns to S30.

  In S40, the flash memory writing unit 128 starts erasing the flash memory 108 in response to receiving the write start signal. In this process, the flash memory writing means 128 gives an erase command to the flash memory 108 and starts erasing all data recorded in the flash memory 108. Note that it takes about several seconds to erase the flash memory 108. For this reason, the setting information receiving unit 124 may receive setting information from the management apparatus 30 while the flash memory 108 is being erased.

  Therefore, in S45, the setting information receiving unit 124 determines whether the setting information is received from the management apparatus 30. In this process, first, it is determined whether or not the information received from the management apparatus 30 is received via the input / output interface 102. If the information is received, is the received information the setting information? Determine whether or not. Whether the received information is the setting information is determined by the setting information receiving unit 124 reading out the setting information ID written as the ID indicating the setting information in the ROM 104 and attached to the received information. For example, the identifier (ID) is compared with the setting information ID. When the setting information receiving unit 124 determines that the received information is the setting information, in S47, the setting information receiving unit 124 stores the setting information in a readable manner in the RAM 106 and generates a confirmation signal indicating that the setting information has been received. The data is transmitted to the management apparatus 30 via the input / output interface 102. If setting information has not been received from the management apparatus 30, a process of S50 described below is performed.

  In S50, the flash memory writing unit 128 determines whether or not the data in the flash memory 108 has been erased. If not erased, the process returns to S45. If it has been erased, the flash memory writing means 128 receives the confirmation signal indicating that all of the data recorded in the flash memory 108 has been erased, and then receives the setting information stored in it from the RAM 106. The data is read and written into the flash memory 108 (S60). In this case, when a plurality of setting information is stored in the RAM 106, all the setting information stored in the RAM 106 is written at once immediately before writing to the flash memory 108.

  FIG. 6 is a time chart for explaining the operation of the relay device in the second embodiment.

  FIG. 6A shows the setting information received by the relay device. Here, a situation is shown in which setting information a, b, c, d, e, and f are received every 1.3 seconds.

  6B shows the erase operation of the flash memory 108 in the relay device 100, and FIG. 6C shows the write operation to the flash memory 108. The time required for erasing the flash memory is 1 second, and the write grace time is 2 seconds. The time required for writing data in the flash memory is about several hundreds of microseconds. The relay apparatus 100 receives the setting information a and writes it in the RAM 106 (S12), and waits for 2 seconds, which is a write grace period, without writing to the flash memory. That is, the relay device 100 repeatedly determines whether or not the standby time has reached the write grace time (S25 to S30). Here, when the relay apparatus 100 receives the setting information b before the standby time reaches the write grace time, the write grace timer 127 is reset and started again (S20, S22). As a result, the write grace time is substantially extended. Similarly, when the setting information c, d, e, and f is received during the write grace period, the write grace time is extended each time. The flash memory writing unit 128 starts erasing the flash memory 108 after the elapse of the write grace time extended by receiving the setting information b, c, d, e, and f (S40). The flash memory writing unit 128 collects all the information written in the RAM 106 after erasing the data stored in the flash memory 108, here, the setting information a, b, c, d, e, and f. Writing to the flash memory 108 (S60).

  As described above, according to the writing method of the second embodiment, when the setting information is received before the standby time reaches the writing grace time, the writing grace time is extended each time the setting information is received. Therefore, if the management device cannot receive a confirmation signal from the relay device due to a network failure between the management device and the relay device, the flash memory is erased even if the relay device continuously receives the setting information. And the setting information is written to the flash memory once. Therefore, the number of flash memory writes can be further reduced compared to the first embodiment.

It is a conceptual diagram for demonstrating a remote management system. It is the schematic for demonstrating the structure of a relay apparatus. It is a figure which shows the processing flow of 1st Embodiment. It is a time chart for demonstrating operation | movement of the relay apparatus in 1st Embodiment. It is a figure which shows the processing flow of 2nd Embodiment. It is a time chart for demonstrating operation | movement of the relay apparatus in 2nd Embodiment. It is a time chart for demonstrating operation | movement of the conventional relay apparatus.

Explanation of symbols

DESCRIPTION OF SYMBOLS 10 Terminal apparatus 20 Public network 30 Management apparatus 100 Relay apparatus 102 Input / output interface 104 ROM
106 RAM
107 clock signal generator 108 flash memory 110 CPU
DESCRIPTION OF SYMBOLS 112 Control means 122 Transmission / reception means 124 Setting information reception means 126 Write suspension means 127 Write suspension timer 128 Flash memory writing means

Claims (4)

In a relay device connected to a plurality of terminal devices and acquiring setting information about communication between the terminal devices from the management device, in writing the setting information in the flash memory provided in the relay device,
It is determined whether the information received from the management device is setting information, and as a result of the determination, when the information is setting information, a process of storing the information in a RAM included in the relay device;
In response to the determination that the information is setting information, after resetting the write grace timer provided in the relay device, starting,
A process of repeatedly determining whether or not the waiting time counted by the write grace timer has reached a write grace time stored in advance in a ROM included in the relay device;
When the waiting time reaches the write grace time, the step of writing the setting information stored in the RAM to a flash memory ,
The flash memory writing , wherein when the information which is the setting information is newly received before the waiting time reaches the write grace time, the write grace timer is reset and then started. Control method. The relay device waits until the write grace time elapses while repeatedly determining whether the standby time has reached the write grace time,
When the information that is the setting information is newly received before the waiting time reaches the write grace time, the write grace time is extended,
The flash memory write control method according to claim 1, wherein the write grace timer is reset and then started. A computer that is connected to a plurality of terminal devices, and that acquires setting information about communication between the terminal devices from a management device, and that is provided in a relay device including a flash memory,
It is determined whether or not the information received from the management device is setting information, and when the information is setting information as a result of the determination, a function of storing the information in a RAM included in the relay device;
In response to the determination that the information is setting information, after resetting the write grace timer provided in the relay device, a function to start,
A function of repeatedly determining whether or not the waiting time counted by the write grace timer has reached a write grace time stored in advance in a ROM included in the relay device;
When the standby time reaches the write grace time, a function of writing the setting information stored in the RAM to a flash memory ;
When the information that is the setting information is newly received before the waiting time reaches the writing grace time, a function to start after resetting the writing grace timer is realized. Program to do. The relay device waits until the write grace time elapses while repeatedly determining whether the standby time has reached the write grace time,
When the information that is the setting information is newly received before the waiting time reaches the write grace time, the write grace time is extended,
The program according to claim 3, wherein a function to start after resetting the write suspension timer is realized.

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