JP4858043B2 - A / D conversion circuit and optical disc apparatus - Google Patents

Description

  The present invention relates to an A / D conversion circuit and an optical disc apparatus, and more particularly to asymmetry of an input analog signal or correction of vertical asymmetry.

  In next-generation optical discs such as HD DVD and BD (Blu-ray Disc), the playback signal receives intersymbol interference from the front and back pits due to the relationship between the pits on the disc and the laser spot diameter. It has been proposed to play actively using PRML (Partial Response Maximum Likelihood) method. Here, PRML is a signal processing method for reading the most probable data from a reproduction signal on the premise of interference between front and rear pits, and PR detection for recording and reproducing data in a narrow frequency band without suppressing waveform interference. This is a composite technique of ML decoding in which the most probable bit string is decoded from a plurality of reproduced signal strings instead of being discriminated for each bit.

  The HD DVD PR class is PR [1, 2, 2, 2, 1] due to the transfer characteristics between the media and the pickup, but uses the shortest inversion 2T (T is the reference time length) modulation code. PR [1,2,2,2,1] has a problem that the amplitude of the 2T signal cannot be obtained. The direct slice method is generally used as an optical disc reproduction method. However, when the pit length is 2T, the signal amplitude is small as described above, and it is difficult to extract the 2T signal by the direct slice method. In the PRML method, a target signal having a time transition closest to a reproduction signal is selected, and a bit string for generating the target signal is output as a decoding result. The target signal is calculated by convolution of a designated impulse response (PR class) and a bit string. Therefore, an appropriate PR class corresponding to the recording density of the optical disc is selected. Assuming that the PR class is expressed by PR [a, b], PR [1, 1] indicates a characteristic that appears at a ratio of 1: 1 at two discrimination points where impulse responses are continuous. Accordingly, the response output for the input {0... 1} is {0. PR [1,2,1] indicates a characteristic that appears at a ratio of 1: 2: 1 at three identification points where impulse responses are continuous. Therefore, the response characteristic for the input {0 ·····} is {0 ········}. In the case of HD DVD, the PR class is PR [1, 2, 2, 2, 1], which appears at a ratio of 1: 2: 2: 2: 1 at five identification points where impulse responses are continuous. It shows that.

  However, although the PRML method can accurately decode a symmetrically reproduced signal that is vertically symmetric, it is very fragile and adversely affected if it is an asymmetrically reproduced signal that is vertically asymmetric.

  Japanese Patent Application Laid-Open No. 2004-228561 discloses that the magnitude of signal asymmetry is detected, and binarization is performed by a slicer when the asymmetry is large, and binarization is performed by PRML when the asymmetry is small. .

  Patent Document 2 discloses that a flash A / D conversion circuit used for a PRML data reproduction channel is provided with an adjustment circuit for adjusting a center voltage level of a reference voltage.

JP 2002-29736 A JP-A-8-83403

  However, the technique disclosed in Patent Document 1 described above is difficult to decode a 2T signal because it is binarized by a slicer in the case of a reproduction signal having a large asymmetry, and has not yet reached an essential solution.

  An object of the present invention is to provide an A / D conversion circuit and an optical disc apparatus that can accurately perform binarization even when an asymmetric asymmetry signal is input vertically.

The present invention is an A / D conversion circuit having a plurality of comparators for comparing a reproduction RF signal from an optical disk and a reference potential, wherein the reference potentials of the plurality of comparators are different from each other, and the level of the reproduction RF signal A low-pass filter that detects an average value of the signal and a circuit that adjusts the center level of the different reference potentials using the average value, and the low-pass filter includes a variable resistor and a capacitor connected to each other, The resistance value of the variable resistor is variably set according to the rotation frequency of the optical disc, and is set to increase as the rotation frequency increases .

  In another embodiment of the present invention, the comparator includes a D / A converter that compares an input analog signal with a reference potential in each stage of a cascade or a stage and converts the comparison result of the comparator into an analog signal. A subtractor that subtracts the output of the D / A converter from the input analog signal and outputs the result to the next stage, and the adjustment circuit detects an average value of the level of the input analog signal to detect the reference Adjust the center level of the potential.

  The A / D conversion circuit of the present invention can be any of a parallel type, an interpolation type, a pipeline type, a cascade type, a sub-ranging type, and a folding type.

  Also, the A / D conversion circuit of the present invention can be incorporated in an optical disc apparatus that records or reproduces data on an optical disc. The optical disk apparatus demodulates the reproduction RF signal read from the optical disk by converting it into a digital signal by an A / D conversion circuit.

  According to the present invention, non-linear A / D characteristics can be realized with a simple configuration. Therefore, by using such an A / D conversion circuit, it is possible to accurately convert a reproduction RF signal that is asymmetrical or asymmetry up and down into a digital signal.

  Hereinafter, embodiments of the present invention will be described with reference to the drawings.

<First Embodiment>
FIG. 1 shows a configuration of an A / D conversion circuit 1 used in an optical disc apparatus for reproducing a next generation optical disc such as an HD DVD or a BD (Blu-ray Disc). The reproduction RF signal read from the optical disc by the optical pickup of the optical disc apparatus is equalized by the equalizer, then A / D converted by the A / D conversion circuit 1, and PRML processed and decoded by the PRML processing unit. . The conventional optical disc apparatus has a linear A / D conversion characteristic as an A / D conversion circuit. However, the A / D conversion circuit 1 shown in FIG. 1 has a non-linear characteristic in order to eliminate asymmetry of the input RF signal. Have.

  Prior to the description of the A / D conversion circuit 1 shown in FIG. 1, a conventional A / D conversion circuit having linear conversion characteristics will be described for comparison.

  FIG. 6 shows a conventional A / D conversion circuit 1. This circuit converts the reproduction RF signal into an 8-bit digital signal. The A / D conversion circuit 1 includes comparators C1 to C255 to which a reproduction RF signal is supplied. A reproduction RF signal is supplied to each non-inverting input terminal (+) of the comparators C1 to C255. Further, the reference potential is supplied to the inverting input terminals (−) of the comparators C1 to C255. The reference potential is given by being divided equally by the reference resistor R by supplying a predetermined upper limit potential Vref1 and a lower limit potential Vref2 to both ends of the plurality of reference resistors R. Comparators C <b> 1 to C <b> 255 compare the reproduction RF signal with the equally divided reference voltage and output the result to encoder 50. The encoder 50 encodes the outputs of the comparators C1 to C255 and outputs them as 8-bit data.

  On the other hand, the A / D conversion circuit 1 in FIG. 1 adjusts the center value of the reference potential by a low-pass filter (LPF) 10 and an amplifier 12 with respect to the A / D conversion circuit 1 shown in FIG. The LPF 10 extracts the average potential Vrfave of the reproduction RF signal and sets it as the center value of the reference potential. This average value Vrfave is given as a reference potential to the inverting input terminal of the comparator C128 in the middle of the comparators C1 to C255. On the other hand, a potential obtained by equally dividing the potential difference between the average value Vrfave and the lower limit Vref2 is given as a reference potential to the comparators C1 to C127, and a potential difference between the upper limit Vref1 and the average value Vrfave is equal to the comparators C129 to C255. The divided potential is given as a reference potential. Accordingly, since different reference potentials are applied to the comparators C1 to C255, the A / D conversion characteristics are non-linear characteristics, and even if the reproduction RF signal is an asymmetric asymmetry signal, the average value Vrfave is correspondingly changed. Since the A / D conversion characteristic varies and changes, the digital signal corrected for asymmetry can be output, and the data reading accuracy of the optical disk is improved.

  FIG. 2 shows the relationship of the output A / D value with respect to the input voltage. A characteristic a is a conventional A / D conversion circuit 1 having a linear characteristic, and a characteristic b is a characteristic of the A / D conversion circuit 1 of the present embodiment. In the present embodiment, since the average value Vrfave is given as the center value of the reference potential, the characteristics (slope) of Vref2 to Vrfave are different from the characteristics (slope) of Vrfave to Vref1.

  FIG. 3 shows the configuration of the LPF 10. A general LPF is composed of a fixed resistor and a capacitor, but the LPF 10 of the present embodiment is composed of a variable resistor VR and a capacitor, and the value of the variable resistor VR is set according to the rotation frequency of the optical disc. The average value of the reproduction RF signal indicates the degree of asymmetry, but the fluctuation frequency of the asymmetry varies according to the rotation frequency of the optical disc. Generally, the fluctuation frequency of asymmetry increases as the rotation frequency of the optical disk increases. Therefore, the average value can be reliably extracted by setting the value of the variable resistor VR according to the rotation frequency of the optical disk.

  In the present embodiment, the LPF is used to extract the average value Vrfave of the reproduction RF signal, but any circuit that detects the average value, such as a smoothing filter, can be used.

<Second Embodiment>
FIG. 4 shows a configuration of the A / D conversion circuit 1 in the present embodiment. In addition to the configuration shown in FIG. 1, a peak detection circuit 14 and an amplifier 16 for detecting the peak value of the reproduction RF signal, and a bottom detection circuit 18 and an amplifier 20 for detecting the bottom value of the reproduction RF signal are further provided. In FIG. 1, the peak value Vrfpk of the reproduction RF signal is given to both ends of the plurality of resistors R instead of the predetermined upper limit potential Vref1, and the bottom value Vrfbtm of the reproduction RF signal is given instead of the predetermined lower limit potential Vref2.

  Even with such a configuration, since the center value of the reference potential is adjusted to the average value of the reproduction RF signal by the LPF 10, a non-linear A / D conversion characteristic can be obtained. The characteristics obtained with the configuration of FIG. 4 correspond to those in FIG. 2 where the peak value is Vrfpk and the bottom value is Vrfbtm.

<Third Embodiment>
In the first and second embodiments, the parallel type A / D conversion circuit is shown, but in this embodiment, a cascade type A / D conversion circuit is shown.

  FIG. 5 shows a configuration block diagram of the A / D conversion circuit 1 of the present embodiment. The A / D conversion circuit 1 is composed of a plurality of stages. Each stage includes a comparator and a D / A converter. The first stage that outputs the most significant bit (MSB) is composed of a comparator C8 and a D / A converter D8, and the reproduction RF signal is supplied to the non-inverting input terminal (+) of the comparator C8, and the inverting input terminal of the comparator C8. The average value Vrfave of the reproduction RF signal is supplied to (−). The average value of the reproduction RF signal is detected by LPF, for example. The comparator C8 compares the reproduction RF signal with the average value Vrfave and outputs the comparison result as the MSB value. The comparator C8 outputs the comparison result to the D / A converter D8. The D / A converter D8 converts the digital value of the comparison result into an analog signal and outputs it to the subtractor 22. The subtracter 22 subtracts the analog signal obtained by the D / A converter D8 from the original reproduction RF signal and outputs the result after the second stage. The signal supplied after the second stage is a signal corresponding to (reproduced RF signal−Vrfave).

  On the other hand, the second and subsequent stages are composed of two systems. The first system is a system that uses the potential difference Vref1-Vrfave between the predetermined upper limit potential Vref1 and the average value potential Vrfave as a reference for comparison, and the second system is the potential difference Vrfav− between the average value potential Vrfave and the predetermined lower limit potential Vref2. This is a system using Vref2 as a reference for comparison. These two systems are selected alternatively.

  First, the first system will be described. The second stage is composed of a comparator C7a and a D / A converter D7a. The non-inverting input terminal of the comparator C7a is supplied with the reproduction RF signal -Vrfave, and the inverting input terminal is supplied with (Vref1-Vrfave) / 2. The The comparator C7a compares these two signals and outputs the comparison result as the bit value of MSB-1 which is one place lower than the MSB. The D / A converter D7a converts the digital value into an analog signal and outputs it to the subtractor 24a. The subtractor 24a supplies {reproduced RF signal−Vrfave− (Vref1−Vrfave) / 2} to the next stage. The third stage includes a comparator C6a and a D / A converter D6a. The non-inverting input terminal of the comparator C6a is supplied with {reproduced RF signal −Vrfave− (Vref1−Vrfave) / 2} and the inverting input terminal. (Vref1-Vrfave) / 4 is supplied. The comparator C6a compares these two signals and outputs the comparison result as the bit value of MSB-2, which is two places lower than the MSB. The D / A converter D6a converts the digital value into an analog signal and outputs it to the subtractor 26a. The subtractor 26a supplies {reproduced RF signal−Vrfave− (Vref1−Vrfave) / 2− (Vref1−Vrfave) / 4} to the next stage. Thereafter, the processing is similarly executed up to the seventh stage. The seventh stage processing result is supplied to the final stage comparator C1a. The comparator C1a compares the input signal with the reference potential (Vref1-Vrfave) / 128, and outputs the result as an LSB (least significant) value.

  Next, the second system will be described. The second stage is composed of a comparator C7b and a D / A converter D7b. The non-inverting input terminal of the comparator C7b is supplied with the reproduction RF signal -Vrfave, and the inverting input terminal is supplied with (Vrfave-Vref2) / 2. The The comparator C7b compares these two signals and outputs the comparison result as the bit value of MSB-1 which is one place lower than the MSB. The D / A converter D7b converts the digital value into an analog signal and outputs it to the subtractor 24b. The subtractor 24b supplies {reproduced RF signal−Vrfave− (Vrfave−Vref2) / 2} to the next stage. The third stage includes a comparator C6b and a D / A converter D6b. The non-inverting input terminal of the comparator C6b is supplied with {reproduced RF signal−Vrfave− (Vrfave−Vref2) / 2} and the inverting input terminal. (Vrfave−Vref2) / 4 is supplied. The comparator C6b compares these two signals and outputs the comparison result as the bit value of MSB-2, which is two places lower than the MSB. The D / A converter D6b converts the digital value into an analog signal and outputs the analog signal to the subtractor 26b. The subtractor 26b supplies {reproduced RF signal−Vrfave− (Vrfave−Vref2) / 2− (Vrfave−Vref2) / 4} to the next stage. Thereafter, the processing is similarly executed up to the seventh stage. The seventh stage processing result is supplied to the final stage comparator C1b. The comparator C1b compares the input signal with the reference potential (Vrfave−Vref2) / 128, and outputs the result as an LSB (least significant) value.

  The bit values of MSB-1 to LSB from the first system are supplied to the A terminal of the switch SW1, and the bit values of MSB-1 to LSB from the second system are supplied to the B terminal of the switch SW1. The terminal of SW1 is switch-controlled according to the bit value of the MSB. When the MSB is “1”, that is, when the level of the reproduction RF signal is higher than the average value Vrfave, the terminal is switched to the A terminal and the MSB-1 to MSB-1 from the first system are switched. When the LSB is output and the MSB is “0”, that is, when the level of the reproduction RF signal is smaller than the average value Vrfave, the MSB-1 to LSB from the second system are output by switching to the B terminal, and 8 bits combined with the MSB Data is output. The first system compares the reference potential obtained by equally dividing Vref1 to Vrfave with a comparator and digitizes it. The second system compares the reference potential obtained by equally dividing Vref to Vref2 with a comparator. Digitalized. Therefore, also in the present embodiment, digitization is performed with different A / D conversion characteristics with the average value Vrfave as a boundary, and a non-linear characteristic is obtained. The characteristics of this embodiment are the same as those shown in FIG. By such non-linear A / D characteristics, the asymmetry of the reproduction RF signal can be corrected, and the data reading accuracy of the optical disk is improved.

  In this embodiment, Vref1 and Vref2 are used. However, similarly to the second embodiment, the peak value of the reproduction RF signal may be used instead of Vref1, and the bottom value of the reproduction RF signal may be used instead of Vref2.

  In the above embodiment, the parallel type and cascade type A / D conversion circuits are exemplified, but other types of A / D conversion circuits, such as interpolation type, pipeline type, sub-ranging type, and folding type, are used. Can be applied similarly. The interpolation type A / D conversion circuit is a parallel type modification. A preamplifier smaller than the number of comparators is provided in the previous stage of the comparator, a resistor string for interpolating the voltage is connected between adjacent preamplifier outputs, and the tap voltage is set. Supply to the comparator. Normally, a potential obtained by equally dividing the reference potential difference is given to the preamplifier. However, as in FIG. 1, the average potential of the reproduction RF signal may be detected and supplied to the preamplifier as the center value of the reference potential. Also, the pipeline type A / D conversion circuit performs A / D conversion in order bit by bit from the MSB to the LSB as in the case-case type, that is, first determines the MSB by performing A / D conversion in the first stage. The quantization error is A / D converted at the next stage to determine the second bit, and the same processing is repeated until the LSB is determined, but each stage or a sample hold circuit is provided between the stages. It is. Similar to FIG. 5, the average voltage of the reproduction RF signal may be detected and supplied to the comparators and D / A converters in each stage. The sub-ranging type or folding type A / D conversion circuit is provided with two parallel types, each of which shares A / D conversion of upper bits and lower bits and performs A / D conversion in two stages.

FIG. 7 shows an 8-bit sub-ranging A / D converter circuit. The sub-ranging A / D conversion circuit first A / D-converts the upper bits, and then A / D-converts the lower bits of the residual difference. The comparator reference voltage for A / D converting the upper bits is given by the average value of the reproduction RF signal as in FIG. Then, the upper bit conversion result is D / A converted by the D / A converter 70 and subtracted from the analog signal by the difference unit 72 to obtain a residual corresponding to the lower bits. When the upper part is 4 bits, the dynamic range of the residual is 1/16 of the input. Therefore, it is preferable to make the dynamic range uniform by multiplying by 16 with the amplifier 74. The A / D conversion characteristics of the lower bits are changed by the most significant bit as shown in FIG. That is, the most significant bit is supplied to the switch 76, and the reference potential is changed according to the value of the most significant bit. When the most significant bit is “0”, Vref3 is selected, and when the most significant bit is “1”, Vref4 is selected. here,
Vref3 = Vrfave
Vref4 = Vref2 + (Vref1-Vrfave)
And Thereafter, the comparators C16 to C30 compare the residual analog signals with the respective reference potentials, encode them with the encoder 76, and output the lower bits. The upper bits from the encoder 50 and the lower bits from the encoder 76 are output together as an A / D conversion result. It is preferable to change the values of Vref3 and 4 in accordance with the gain A of the amplifier 74. The same applies to the folding type.

It is a block diagram of embodiment. It is an A / D conversion characteristic figure of an embodiment. It is a block diagram of a low-pass filter. It is a block diagram of other embodiment. It is a block diagram of other embodiment. It is a block diagram of the conventional A / D conversion circuit. It is a block diagram of other embodiment. FIG. 8 is an A / D conversion characteristic diagram in the configuration of FIG. 7.

Explanation of symbols

  10 Low-pass filter (LPF), C1-C255 comparator, 50 encoder.

Claims (5)

An A / D conversion circuit having a plurality of comparators for comparing a reproduction RF signal from an optical disc and a reference potential,
The reference potentials of the plurality of comparators are different from each other,
A low-pass filter for detecting an average value of the level of the reproduction RF signal;
A circuit that adjusts the center level of the different reference potentials using the average value;
Have
The low-pass filter is composed of a variable resistor and a capacitor connected to each other,
The resistance value of the variable resistor is variably set according to the rotation frequency of the optical disc, and is set to be larger as the rotation frequency increases . The circuit of claim 1 , wherein
The comparator compares the input analog signal and the reference potential in each stage of the cascade or stage,
A D / A converter for converting the comparison result of the comparator into an analog signal;
A subtractor that subtracts the output of the D / A converter from the input analog signal and outputs the result to the next stage;
And the adjustment circuit detects an average value of the level of the input analog signal and adjusts the center level of the reference potential. The circuit of claim 2 , wherein
The comparator in the first stage of the stage or cascade compares the input analog signal with the average value and outputs the result as the MSB bit value.
The second and subsequent stages consist of a first system and a second system,
The comparator of each stage of the first system outputs a bit value of bits lower than the MSB by comparing using a reference potential obtained by dividing the potential difference between the upper limit potential and the average value,
The comparator of each stage of the second system outputs a bit value of bits lower than the MSB by comparing using a reference potential obtained by dividing the potential difference between the average value and the lower limit potential,
A switch for selectively switching and outputting the first system and the second system;
An A / D conversion circuit comprising: The circuit according to any one of claims 1 to 3 ,
The A / D conversion circuit is one of a parallel type, an interpolation type, a pipeline type, a cascade type, a sub-ranging type, and a folding type. An A / D conversion circuit according to claim 1, an optical disk apparatus for demodulating converts an analog signal read from the optical disk to a digital signal.

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