JP4881044B2 - 積層型半導体装置の製造方法 - Google Patents
積層型半導体装置の製造方法 Download PDFInfo
- Publication number
- JP4881044B2 JP4881044B2 JP2006073142A JP2006073142A JP4881044B2 JP 4881044 B2 JP4881044 B2 JP 4881044B2 JP 2006073142 A JP2006073142 A JP 2006073142A JP 2006073142 A JP2006073142 A JP 2006073142A JP 4881044 B2 JP4881044 B2 JP 4881044B2
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- JP
- Japan
- Prior art keywords
- semiconductor element
- adhesive layer
- layer
- semiconductor
- bonding
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- Legal status (The legal status is an assumption and is not a legal conclusion. Google has not performed a legal analysis and makes no representation as to the accuracy of the status listed.)
- Expired - Lifetime
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Classifications
-
- H—ELECTRICITY
- H10—SEMICONDUCTOR DEVICES; ELECTRIC SOLID-STATE DEVICES NOT OTHERWISE PROVIDED FOR
- H10W—GENERIC PACKAGES, INTERCONNECTIONS, CONNECTORS OR OTHER CONSTRUCTIONAL DETAILS OF DEVICES COVERED BY CLASS H10
- H10W76/00—Containers; Fillings or auxiliary members therefor; Seals
- H10W76/10—Containers or parts thereof
-
- H—ELECTRICITY
- H10—SEMICONDUCTOR DEVICES; ELECTRIC SOLID-STATE DEVICES NOT OTHERWISE PROVIDED FOR
- H10W—GENERIC PACKAGES, INTERCONNECTIONS, CONNECTORS OR OTHER CONSTRUCTIONAL DETAILS OF DEVICES COVERED BY CLASS H10
- H10W90/00—Package configurations
-
- H—ELECTRICITY
- H10—SEMICONDUCTOR DEVICES; ELECTRIC SOLID-STATE DEVICES NOT OTHERWISE PROVIDED FOR
- H10W—GENERIC PACKAGES, INTERCONNECTIONS, CONNECTORS OR OTHER CONSTRUCTIONAL DETAILS OF DEVICES COVERED BY CLASS H10
- H10W70/00—Package substrates; Interposers; Redistribution layers [RDL]
- H10W70/60—Insulating or insulated package substrates; Interposers; Redistribution layers
-
- H—ELECTRICITY
- H10—SEMICONDUCTOR DEVICES; ELECTRIC SOLID-STATE DEVICES NOT OTHERWISE PROVIDED FOR
- H10W—GENERIC PACKAGES, INTERCONNECTIONS, CONNECTORS OR OTHER CONSTRUCTIONAL DETAILS OF DEVICES COVERED BY CLASS H10
- H10W72/00—Interconnections or connectors in packages
- H10W72/851—Dispositions of multiple connectors or interconnections
- H10W72/874—On different surfaces
- H10W72/884—Die-attach connectors and bond wires
-
- H—ELECTRICITY
- H10—SEMICONDUCTOR DEVICES; ELECTRIC SOLID-STATE DEVICES NOT OTHERWISE PROVIDED FOR
- H10W—GENERIC PACKAGES, INTERCONNECTIONS, CONNECTORS OR OTHER CONSTRUCTIONAL DETAILS OF DEVICES COVERED BY CLASS H10
- H10W74/00—Encapsulations, e.g. protective coatings
-
- H—ELECTRICITY
- H10—SEMICONDUCTOR DEVICES; ELECTRIC SOLID-STATE DEVICES NOT OTHERWISE PROVIDED FOR
- H10W—GENERIC PACKAGES, INTERCONNECTIONS, CONNECTORS OR OTHER CONSTRUCTIONAL DETAILS OF DEVICES COVERED BY CLASS H10
- H10W90/00—Package configurations
- H10W90/701—Package configurations characterised by the relative positions of pads or connectors relative to package parts
- H10W90/731—Package configurations characterised by the relative positions of pads or connectors relative to package parts of die-attach connectors
- H10W90/732—Package configurations characterised by the relative positions of pads or connectors relative to package parts of die-attach connectors between stacked chips
-
- H—ELECTRICITY
- H10—SEMICONDUCTOR DEVICES; ELECTRIC SOLID-STATE DEVICES NOT OTHERWISE PROVIDED FOR
- H10W—GENERIC PACKAGES, INTERCONNECTIONS, CONNECTORS OR OTHER CONSTRUCTIONAL DETAILS OF DEVICES COVERED BY CLASS H10
- H10W90/00—Package configurations
- H10W90/701—Package configurations characterised by the relative positions of pads or connectors relative to package parts
- H10W90/731—Package configurations characterised by the relative positions of pads or connectors relative to package parts of die-attach connectors
- H10W90/734—Package configurations characterised by the relative positions of pads or connectors relative to package parts of die-attach connectors between a chip and a stacked insulating package substrate, interposer or RDL
-
- H—ELECTRICITY
- H10—SEMICONDUCTOR DEVICES; ELECTRIC SOLID-STATE DEVICES NOT OTHERWISE PROVIDED FOR
- H10W—GENERIC PACKAGES, INTERCONNECTIONS, CONNECTORS OR OTHER CONSTRUCTIONAL DETAILS OF DEVICES COVERED BY CLASS H10
- H10W90/00—Package configurations
- H10W90/701—Package configurations characterised by the relative positions of pads or connectors relative to package parts
- H10W90/751—Package configurations characterised by the relative positions of pads or connectors relative to package parts of bond wires
- H10W90/754—Package configurations characterised by the relative positions of pads or connectors relative to package parts of bond wires between a chip and a stacked insulating package substrate, interposer or RDL
Landscapes
- Structures Or Materials For Encapsulating Or Coating Semiconductor Devices Or Solid State Devices (AREA)
- Die Bonding (AREA)
Description
Claims (2)
- 回路基材上に第1の半導体素子を接着する工程と、
前記回路基材の電極部と前記第1の半導体素子とを第1のボンディングワイヤを介して電気的に接続する工程と、
前記第1の半導体素子上に厚さが50μm以上の絶縁性接着剤層を介して第2の半導体素子を、前記第1のボンディングワイヤの前記第1の半導体素子との接続側端部を前記絶縁性接着剤層内に取り込みつつ接着する工程と、
前記回路基材の電極部と前記第2の半導体素子とを第2のボンディングワイヤを介して電気的に接続する工程と、
前記第1および第2の半導体素子を前記第1および第2のボンディングワイヤと共に封止樹脂で封止する工程とを具備し、
前記絶縁性接着剤層は、ガラス転移温度が135℃以上で、かつガラス転移温度以下の線膨張係数が100ppm以下であると共に、常温弾性率が500MPa以上2GPa以下である絶縁樹脂層からなることを特徴とする積層型半導体装置の製造方法。 - 請求項1記載の積層型半導体装置の製造方法において、
前記絶縁性接着剤層は前記第2の半導体素子の接着時温度における粘度が1kPa・s以上100kPa・s未満であることを特徴とする積層型半導体装置の製造方法。
Priority Applications (5)
| Application Number | Priority Date | Filing Date | Title |
|---|---|---|---|
| JP2006073142A JP4881044B2 (ja) | 2006-03-16 | 2006-03-16 | 積層型半導体装置の製造方法 |
| US11/724,303 US7994620B2 (en) | 2006-03-16 | 2007-03-15 | Stacked semiconductor device |
| KR1020070025370A KR100923596B1 (ko) | 2006-03-16 | 2007-03-15 | 적층형 반도체 장치 |
| KR1020080120721A KR101164296B1 (ko) | 2006-03-16 | 2008-12-01 | 적층형 반도체 장치 |
| US13/067,839 US8227296B2 (en) | 2006-03-16 | 2011-06-29 | Stacked semiconductor device |
Applications Claiming Priority (1)
| Application Number | Priority Date | Filing Date | Title |
|---|---|---|---|
| JP2006073142A JP4881044B2 (ja) | 2006-03-16 | 2006-03-16 | 積層型半導体装置の製造方法 |
Related Child Applications (1)
| Application Number | Title | Priority Date | Filing Date |
|---|---|---|---|
| JP2011179686A Division JP5571045B2 (ja) | 2011-08-19 | 2011-08-19 | 積層型半導体装置 |
Publications (2)
| Publication Number | Publication Date |
|---|---|
| JP2007250887A JP2007250887A (ja) | 2007-09-27 |
| JP4881044B2 true JP4881044B2 (ja) | 2012-02-22 |
Family
ID=38532489
Family Applications (1)
| Application Number | Title | Priority Date | Filing Date |
|---|---|---|---|
| JP2006073142A Expired - Lifetime JP4881044B2 (ja) | 2006-03-16 | 2006-03-16 | 積層型半導体装置の製造方法 |
Country Status (3)
| Country | Link |
|---|---|
| US (2) | US7994620B2 (ja) |
| JP (1) | JP4881044B2 (ja) |
| KR (2) | KR100923596B1 (ja) |
Families Citing this family (16)
| Publication number | Priority date | Publication date | Assignee | Title |
|---|---|---|---|---|
| KR100809701B1 (ko) * | 2006-09-05 | 2008-03-06 | 삼성전자주식회사 | 칩간 열전달 차단 스페이서를 포함하는 멀티칩 패키지 |
| JP2011233782A (ja) * | 2010-04-28 | 2011-11-17 | Toshiba Corp | 半導体装置および半導体装置の製造方法 |
| TWI401773B (zh) * | 2010-05-14 | 2013-07-11 | 南茂科技股份有限公司 | 晶片封裝裝置及其製造方法 |
| US8680686B2 (en) * | 2010-06-29 | 2014-03-25 | Spansion Llc | Method and system for thin multi chip stack package with film on wire and copper wire |
| CA2869115A1 (en) | 2012-03-30 | 2013-10-03 | Bioformix Inc. | Ink and coating formulations and polymerizable systems for producing the same |
| EP2831124B1 (en) * | 2012-03-30 | 2016-10-05 | Sirrus, Inc. | Composite and laminate articles and polymerizable systems for producing the same |
| US10047192B2 (en) | 2012-06-01 | 2018-08-14 | Sirrus, Inc. | Optical material and articles formed therefrom |
| JP5425975B2 (ja) * | 2012-06-28 | 2014-02-26 | 日東電工株式会社 | 接着フィルム、半導体装置の製造方法及び半導体装置 |
| JP5918664B2 (ja) | 2012-09-10 | 2016-05-18 | 株式会社東芝 | 積層型半導体装置の製造方法 |
| WO2014078689A1 (en) | 2012-11-16 | 2014-05-22 | Bioformix Inc. | Plastics bonding systems and methods |
| EP2926368B1 (en) * | 2012-11-30 | 2020-04-08 | Sirrus, Inc. | Electronic assembly |
| CN104051411B (zh) | 2013-03-15 | 2018-08-28 | 台湾积体电路制造股份有限公司 | 叠层封装结构 |
| US9768048B2 (en) * | 2013-03-15 | 2017-09-19 | Taiwan Semiconductor Manufacturing Company, Ltd. | Package on-package structure |
| US9334430B1 (en) | 2015-05-29 | 2016-05-10 | Sirrus, Inc. | Encapsulated polymerization initiators, polymerization systems and methods using the same |
| US9217098B1 (en) | 2015-06-01 | 2015-12-22 | Sirrus, Inc. | Electroinitiated polymerization of compositions having a 1,1-disubstituted alkene compound |
| US10658199B2 (en) * | 2016-08-23 | 2020-05-19 | Taiwan Semiconductor Manufacturing Company, Ltd. | Semiconductor device and method |
Family Cites Families (15)
| Publication number | Priority date | Publication date | Assignee | Title |
|---|---|---|---|---|
| JPH11219984A (ja) * | 1997-11-06 | 1999-08-10 | Sharp Corp | 半導体装置パッケージおよびその製造方法ならびにそのための回路基板 |
| JP2001308262A (ja) | 2000-04-26 | 2001-11-02 | Mitsubishi Electric Corp | 樹脂封止bga型半導体装置 |
| JP3913481B2 (ja) | 2001-01-24 | 2007-05-09 | シャープ株式会社 | 半導体装置および半導体装置の製造方法 |
| TW540131B (en) * | 2001-03-21 | 2003-07-01 | Tomoegawa Paper Co Ltd | Mask sheet for assembly of semiconductor device and assembling method of semiconductor device |
| JP2003218316A (ja) * | 2002-01-10 | 2003-07-31 | Ficta Technology Inc | マルチチップパッケージ構造及び製造方法 |
| CN1333015C (zh) * | 2002-02-06 | 2007-08-22 | 积水化学工业株式会社 | 树脂组合物 |
| JP2003258034A (ja) * | 2002-03-06 | 2003-09-12 | Mitsubishi Electric Corp | 多層配線基体の製造方法および多層配線基体 |
| JP3912223B2 (ja) | 2002-08-09 | 2007-05-09 | 富士通株式会社 | 半導体装置及びその製造方法 |
| US6833287B1 (en) * | 2003-06-16 | 2004-12-21 | St Assembly Test Services Inc. | System for semiconductor package with stacked dies |
| US20050205981A1 (en) * | 2004-03-18 | 2005-09-22 | Kabushiki Kaisha Toshiba | Stacked electronic part |
| JP4188337B2 (ja) * | 2004-05-20 | 2008-11-26 | 株式会社東芝 | 積層型電子部品の製造方法 |
| US7629695B2 (en) * | 2004-05-20 | 2009-12-08 | Kabushiki Kaisha Toshiba | Stacked electronic component and manufacturing method thereof |
| JP4559163B2 (ja) * | 2004-08-31 | 2010-10-06 | ルネサスエレクトロニクス株式会社 | 半導体装置用パッケージ基板およびその製造方法と半導体装置 |
| TW200727446A (en) * | 2005-03-28 | 2007-07-16 | Toshiba Kk | Stack type semiconductor device manufacturing method and stack type electronic component manufacturing method |
| JP4976284B2 (ja) * | 2005-03-30 | 2012-07-18 | 新日鐵化学株式会社 | 半導体装置の製造方法及び半導体装置 |
-
2006
- 2006-03-16 JP JP2006073142A patent/JP4881044B2/ja not_active Expired - Lifetime
-
2007
- 2007-03-15 US US11/724,303 patent/US7994620B2/en active Active
- 2007-03-15 KR KR1020070025370A patent/KR100923596B1/ko not_active Expired - Fee Related
-
2008
- 2008-12-01 KR KR1020080120721A patent/KR101164296B1/ko not_active Expired - Fee Related
-
2011
- 2011-06-29 US US13/067,839 patent/US8227296B2/en active Active
Also Published As
| Publication number | Publication date |
|---|---|
| KR20080110971A (ko) | 2008-12-22 |
| KR20070094498A (ko) | 2007-09-20 |
| US8227296B2 (en) | 2012-07-24 |
| JP2007250887A (ja) | 2007-09-27 |
| KR101164296B1 (ko) | 2012-07-09 |
| US20070222051A1 (en) | 2007-09-27 |
| KR100923596B1 (ko) | 2009-10-23 |
| US20110263076A1 (en) | 2011-10-27 |
| US7994620B2 (en) | 2011-08-09 |
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