JP4904785B2 - Display device and voltage application method - Google Patents

Description

  The present invention relates to a technical field of a display device and a voltage application method for displaying an image by applying a voltage and maintaining the display state even after the application of the voltage is stopped, and more specifically, by a capacitive coupling method. The present invention relates to a technical field of a display device for displaying an image and a voltage application method.

  Conventionally, in the technical field of display devices such as liquid crystal displays and organic EL (Electro Luminescence), a voltage is applied between electrodes sandwiching a display element (for example, a liquid crystal layer, a light emitting layer, etc.) to drive the display element. As a method, for example, a simple matrix method is widely adopted. This method is applied to a data line and a scanning line in a display device having M + N data lines and scanning lines (N and M are both plural) and pixel electrodes connected to the M × N intersections. A display element having M × N pixels is driven in a time-sharing manner (dynamic driving) for each scanning line by M + N driving drivers to which a voltage is applied. For example, M × N driving drivers There is an advantage that the number of drivers can be greatly reduced as compared with the static drive method that requires the driver.

  On the other hand, for example, Patent Document 1 proposes a driving method called an electrostatic coupling method or a capacitance matrix method. In this method, for example, a data line and a scanning line are electrostatically coupled to a driving driver via a capacitor or the like, and √M and √N power feeding ends are provided at both ends of the data line and the scanning line, respectively. By dividing the block into end groups, the display elements are driven by 2√M + 2√N driving drivers, and the number of drivers can be further reduced as compared with the simple matrix system. However, this electrostatic coupling method requires M × N scans to display all pixels. Compared to a simple matrix method or the like that only requires N scans, There is a problem that the display speed of the pixels is slow.

  By the way, in recent years, so-called electronic paper is also used. A display device (for example, a twisting ball) that rewrites an image to be displayed with an electric signal and keeps a display state even after the power is turned off (having a memory property). Research and development for the practical application of displays, microcapsule type electrophoretic displays, toner displays, electronic fluid separation type displays, cholesteric liquid crystal displays, etc. are actively conducted.

  Such a display device (hereinafter also referred to as “electronic paper”) has a drawing speed (e.g., a CRT (Cubed Ray Tube) display, a plasma display, a nematic liquid crystal display, etc.) that does not have a memory property. Although the display image rewriting speed is slow, as described above, it is possible to keep the display state even after the power is turned off, and since it can be manufactured as thin as paper, it is portable. It has the feature of being easy. For these reasons, it can be said that the electronic paper is suitable for an application such as an electronic poster, an electronic book, an electronic newspaper, and an electronic shelf label that does not frequently rewrite the display image.

Therefore, in the electronic paper that is supposed to be used for such applications, it is not necessary to consider the problem of the method that the display speed is slow by adopting the electrostatic coupling method as the driving method, and the driver. You can enjoy the benefits of reducing the number.
Japanese Patent Publication No.1-39185

  However, when a display element is driven by the electrostatic coupling method or the simple matrix method, other pixels (hereinafter referred to as non-selected pixels) except for a pixel for rewriting the display image (hereinafter referred to as a selected pixel) are used. Therefore, there is a problem in that a half-select voltage greater than at least 0 [V] is applied. Therefore, when such a method is adopted, the display element is arranged so that a reduction in contrast and erroneous selection (a pixel is erroneously rewritten) do not occur by applying a half-selection voltage to a non-selected pixel. It is necessary to have a clear threshold voltage for rewriting a display image.

  However, since the electrostatic coupling method has a structure in which a voltage is applied to each of the power feeding end groups, it is not necessary for other scanning lines and data lines other than the scanning line and data line corresponding to the selected pixel. A voltage is applied. For this reason, the conventional driving method (method of applying a voltage) in the electrostatic coupling method applies a half-select voltage that is higher than that in the simple matrix method, so that a margin for the threshold voltage is provided. There is a high possibility of erroneous selection depending on variations in display elements and applied voltages.

  In addition, as described above, in the capacitive coupling method, since M × N scans are necessary to display all pixels, some voltage is applied to each pixel on the display element at the maximum M. × N times applied (N times for simple matrix method). Therefore, depending on the voltage-contrast characteristics of the display element and the like, even when the half-select voltage is lower than the threshold voltage, the contrast may be lowered by applying the half-select voltage many times.

  The present invention has been made in view of the above points, and in the case of driving a display element by an electrostatic coupling method, the half-selection voltage applied to the non-selected pixels is further reduced to thereby contrast the display image. It is an object of the present invention to provide a display device and a voltage application method that can improve problems such as lowering and erroneous selection.

In order to solve the above-mentioned problem, the invention according to claim 1 is a display device for displaying an image, a plurality of scanning lines and a plurality of data lines arranged on the display device so as to cross each other, and A pair of electrodes connected to each of the scanning line and the data line corresponding to each intersection, and a driving means for applying a voltage to two feeding points in each of the scanning line and the data line. The feeding points at the two locations are connected to the driving means for each feeding point group grouped in a predetermined number of units, and one feeding point belongs to the same feeding point group among the plurality of scanning lines. The predetermined number of the feeding points so that the other feeding point in the predetermined number of the scanning lines belongs to the feeding point groups different from each other, and one feeding point belongs to the same feeding point group among the plurality of data lines. The other side of the data line Feeding point, is constituted each said feeding point group to belong to different said feed point groups from one another, wherein the feed point in the two positions, respectively the driving means and is capacitively coupled, display voltage between the pair of electrodes Is applied to display a pixel corresponding to the pair of electrodes on the display element, and the display device maintains the display state even after the application of the display voltage is stopped. When displaying a certain pixel on the display element, the scanning line and the data line are connected to the pair of electrodes, respectively, at a voltage such that the display voltage is applied between the pair of electrodes corresponding to the pixel. Each of the two feeding points is applied to the first feeding point group to which the feeding point belongs, and the maximum absolute value of the voltage applied between the other pair of electrodes is 3/4 of the display voltage. To be lower Voltage, and applying to the second of the feeding point groups except the first feeding point group.

According to the present invention , the second feeding point group excluding the first feeding point group to which the feeding points at two places respectively belong to the scanning line and the data line respectively connected to the pair of electrodes corresponding to the selected pixel. On the other hand, a combination voltage is applied so that the maximum absolute value of the half-selection voltage applied between the electrodes corresponding to the non-selected pixels is lower than three-fourths of the display voltage. The half-select voltage applied to the pixel becomes lower, and problems such as a decrease in contrast of the display image and erroneous selection can be improved.

According to a second aspect of the present invention, in the display device according to the first aspect, the driving unit applies a predetermined voltage to the first feeding point group of either the scanning line or the data line, and a voltage such that the other of said display voltage to the first feeding point group, a 1 become such a voltage of 5 minutes of the display voltage to the other of said second feed point group, the one of the A voltage that is four-fifths of the display voltage is applied to the second feeding point group relatively from the predetermined voltage.

  According to the present invention, the maximum absolute value of the half-select voltage applied to the non-selected pixels can be minimized.

According to a third aspect of the present invention, in the display device according to the first aspect, the driving means has a maximum absolute value of a voltage applied between the other pair of electrodes of three-fourths of the display voltage. absolute value of the voltage to be highest number applied voltage that is lower than half of the display voltage is applied to the second feeding point group among lower so as to and the other pair of electrodes It is characterized by that.

According to the invention, the maximum absolute value of the half-selection voltage is lower than three quarters of the display voltage applied to the non-selected pixels, the absolute value of the half-select voltage to be highest number applied to the unselected pixels The display voltage becomes lower than half of the display voltage, and problems such as a decrease in contrast of the display image and erroneous selection can be improved.

According to a fourth aspect of the present invention, in the display device according to the third aspect, the driving unit applies a predetermined voltage to the first feeding point group of either the scanning line or the data line, and the display voltage becomes such a voltage to the other of the first feeding point group, a 1 become such a voltage-third of the other of the second of the display voltage to the feeding point group, the one of the A voltage that is two-thirds of the display voltage is applied to the second feeding point group relatively from the predetermined voltage.

  According to the present invention, the maximum absolute value of the half-select voltage applied to the non-selected pixels can be further reduced, and the absolute value of the most half-select voltage applied to the non-selected pixels is minimized. be able to.

The display device according to the present invention is any one of claims 1 to 4 according to claim 5, wherein the scanning line is a scanning line of the N, the data line is a data line of the M, the feeding point located at two positions of the scanning lines are grouped into the feeding point groups respectively √N present unit, the feeding point located at two positions of the data line, the feeding point groups respectively √M the units It is characterized by being summarized in.

According to a sixth aspect of the present invention, there is provided a display element for displaying an image, a plurality of scanning lines and a plurality of data lines arranged on the display element so as to intersect with each other, and the scanning corresponding to each intersection. comprising a pair of electrodes connected lines and each of the data lines, and a driving means for applying a voltage to a feeding point located at two positions in the scanning lines and the data lines, respectively, the feed point in the two positions Is connected to the driving means for each feeding point group grouped in a predetermined number unit, and the other of the predetermined number of scanning lines to which one feeding point belongs to the same feeding point group among the plurality of scanning lines. And the other feeding point of the predetermined number of the data lines to which one feeding point belongs to the same feeding point group among the plurality of data lines. Before, different from each other Each said to belong to the feeding point group consists power feed point group, the feeding point in the two places, each said drive means and is electrostatically coupled, by displaying voltage between the pair of electrodes is applied, A voltage application method in a display device in which pixels corresponding to the pair of electrodes on the display element are displayed and the display state is maintained even after application of the display voltage is stopped, and a pixel on the display element is displayed. when the driving means, a voltage such as the display voltage between the pair of electrodes corresponding to the pixel is applied, in people respectively connected the scanning lines and the data lines respectively to the pair of electrodes 2 together with the feed point at the locations is applied to the first said feed point belonging respectively the maximum absolute value of the voltage applied between the other of the pair of electrodes is lower than 3/4 of the display voltage Voltage , Characterized in that it comprises the step of applying to the second of the feeding point groups except the first feeding point group.

According to the present invention, the second feeding end groups except the first feeding point group feed point in each scanning line connected and the data lines respectively to the pair of electrodes corresponding to the selected pixel in two places belongs respectively On the other hand, a combination voltage is applied so that the maximum absolute value of the half-selection voltage applied between the electrodes corresponding to the non-selected pixels is lower than three-fourths of the display voltage. The half-select voltage applied to the pixel becomes lower, and problems such as a decrease in contrast of the display image and erroneous selection can be improved.

Hereinafter, the best embodiment of the present invention will be described in detail with reference to the drawings. The embodiment described below is an embodiment when the present invention is applied to electronic paper of a toner display type.
[1. Principle of the present invention]
First, before specifically describing embodiments of the present invention, the principle of the present invention will be described.

  In the following, a driving method using a simple matrix method, a conventional driving method using an electrostatic coupling method, and a driving method according to the present invention will be described. In common, the driving circuit includes nine scanning line lines X1. ˜X9 and nine data lines Y1 to Y9, and has a 9 × 9 matrix structure. A pair of pixel electrodes is formed at each intersection of the scanning line and the data line, and each pixel electrode corresponds to one pixel. The display element is a monochrome display element that displays white or black for each pixel, and a voltage (display voltage) applied to rewrite the pixel of the display element (for example, change the display state from white to black). ) Is Vr [V].

In the following description, the positions of the pixels formed at the intersections of the scanning lines X1 to X9 and the data lines Y1 to Y9 are represented using the respective scanning lines and data lines, for example, the scanning line X1 and the data When the position of the pixel at the intersection of the line Y1 is indicated, it is expressed as coordinates (X1, Y1). In the following description, a case where the pixel at the coordinates (X1, Y1) is rewritten and a case where the rewriting is not performed are described for each driving method.
[1.1 Driving Method in Simple Matrix Method]
First, for comparison, an example of a driving method in the simple matrix method will be described with reference to FIGS.

  FIG. 12 is a schematic diagram showing a simplified example of a drive circuit in the simple matrix system.

As shown in FIG. 12, the drive circuit 30 includes nine scanning lines X1 to X9 and nine data lines Y1 to Y9, and has a 9 × 9 matrix structure. Although not shown, a scan driver is connected to one end of each scanning line as a driving means for applying a voltage to the scanning line, and a voltage is applied to the data line at one end of each data line. An address driver is connected as a driving means, and 9 + 9 = 18 drivers in total are connected.
(A) In the case of combining only positive voltages FIG. 13 is a diagram showing an example of voltages applied to each scanning line, data line, and each pixel in the simple matrix system, and (a) shows coordinates (X1, Y1). (B) is a case where rewriting is not performed.

  Here, in order to perform writing to the pixel at the coordinates (X1, Y1), for example, 0 [V] is applied to the scanning line X1 to scan each pixel on the scanning line X1, and Vr is applied to the data line Y1. Apply [V]. Further, 1/2 Vr [V] is applied to each of the scanning lines X2 to X9. For the data lines X2 to X9, Vr [V] is applied when rewriting each pixel of coordinates (X1, Y2) to (X1, Y9), and 0 [V] is applied when not rewriting. However, it is assumed here that 0 [V] is applied. Then, a voltage as shown in FIG. 13A is applied to each pixel. That is, since Vr [V], that is, a display voltage is applied to the coordinates (X1, Y1), rewriting of the pixel at the coordinates occurs. A half-select voltage of 1/2 Vr [V] or -1/2 Vr [V] is applied to each pixel on the scanning lines X2 to X9.

  On the other hand, when writing is not performed on the pixel at the coordinates (X1, Y1), 0 [V] is applied to the data line Y1 as well as the other data lines. Then, a voltage as shown in FIG. 13B is applied to each pixel. That is, since 0 [V] is applied to the coordinates (X1, Y1), rewriting of the pixel at the coordinates does not occur. A half-select voltage of −1/2 Vr [V] is applied to each pixel on the scanning lines X2 to X9.

Thus, in the above example, since the half-select voltage of ± 1/2 Vr [V] is applied, the threshold voltage needs to be higher than at least 1/2 Vr [V]. In the above example, there are many pixels to which the half-selection voltage is applied, but the number of scans in the simple matrix method is nine, and the number of times that the voltage is applied to each pixel is nine, which is relatively small. The impact on In the above example, the voltage applied to the scan line and the data line can be only a positive voltage, so that the number of circuits can be simplified.
(B) When Positive and Negative Voltages are Combined FIG. 14 is a diagram showing another example of voltages applied to each scanning line, data line, and each pixel in the simple matrix method, and FIG. Y1) is a case where the pixel is rewritten, and (b) is a case where the pixel is not rewritten.

  As another example for writing to the pixel at the coordinates (X1, Y1), −1/2 Vr [V] is applied to the scanning line X1 to scan each pixel on the scanning line X1, and the data line 1/2 Vr [V] is applied to Y1. Further, 0 [V] is applied to each of the scanning lines X2 to X9, and 0 [V] is applied to each of the data lines Y2 to Y9. Then, a voltage as shown in FIG. 14A is applied to each pixel.

  On the other hand, when writing is not performed on the pixel at the coordinates (X1, Y1), 0 [V] is applied to the data line Y1 as well as the other data lines. Then, a voltage as shown in FIG. 14B is applied to each pixel.

Thus, in the above example, the number of times the half-select voltage is applied can be greatly reduced as compared with the case where only positive voltages are combined. However, since a positive voltage and a negative voltage must be applied to the data line and the scanning line, respectively, the circuit configuration becomes complicated.
[1.2 Conventional driving method in electrostatic coupling method]
Next, an example of a conventional driving method in the electrostatic coupling method will be described with reference to FIGS.

  FIG. 1 is a schematic diagram showing a simplified example of the drive circuit 20 in the electrostatic coupling method.

  As shown in FIG. 1, the drive circuit 20 is also composed of nine scanning lines X1 to X9 and nine data lines Y1 to Y9, like the drive circuit 30, and has a 9 × 9 matrix structure. ing.

  In the drive circuit 20, the feeding ends of the nine scanning lines are grouped into feeding ends Xa1 to Xa3 and Xb1 to Xb3 every three (√9) to form one block. Therefore, the feeding ends of the nine scanning lines are divided into 6 (2√9) blocks (an example of a feeding end group) in total at both ends. At this time, each block at one end of the nine scanning lines shares only one scanning line with the three blocks at the other end. A scan driver that supplies a voltage to the scan line is electrostatically coupled to the power supply terminals Xa1 to Xa3 and Xb1 to Xb3 of each block via a capacitor Cs. Accordingly, six scan drivers are attached as a whole.

Similarly to the above, the data lines are grouped together at the feed ends Ya1 to Ya3 and Yb1 to Yb3 every three lines to form one block. Therefore, the feeding ends of the nine data lines are divided into six blocks (an example of a feeding end group) in total at both ends. At this time, each block at one end of the nine data lines shares only one data line with the three blocks at the other end. An address driver that supplies a voltage to the data line is electrostatically coupled to the power supply terminals Ya1 to Ya3 and Yb1 to Yb3 of each block via a capacitor Ca. Therefore, as a whole, six address drivers are attached.
FIG. 15 is a diagram illustrating an example of voltages applied to each scanning line, data line, and each pixel in a conventional driving method using an electrostatic coupling method. This is a case where the pixel at the coordinates (X1, Y1) is rewritten, and (b) is a case where the rewriting is not performed.

  Here, the potential of the pixel electrode connected to the scanning line X1 corresponding to the pixel at the coordinate (X1, Y1) is VX1, the potential applied to the power supply end Xa1 is VXa1, and the potential applied to the power supply end Xb1 is VXb1. The capacitance of the capacitor Cs is Cs. Since the pixel electrode is electrostatically coupled to the capacitor Cs, the potential VX1 can be expressed as follows.

従って、式（１）は、以下のように表すことができる。

Therefore, Formula (1) can be expressed as follows.

一方、座標（Ｘ１，Ｙ１）の画素に対応してデータ線Ｙ１に接続された画素電極の電位をＶＹ１、給電端Ｙａ１に印加される電位をＶＹａ１、給電端Ｙｂ１に印加される電位をＶＹｂ１とすると、当該画素電極は、コンデンサＣａと静電結合しているので、電位ＶＹ１は、式（２）と同様、以下のように表すことができる。

On the other hand, the potential of the pixel electrode connected to the data line Y1 corresponding to the pixel at the coordinate (X1, Y1) is VY1, the potential applied to the power supply end Ya1 is VYa1, and the potential applied to the power supply end Yb1 is VYb1. Then, since the pixel electrode is electrostatically coupled with the capacitor Ca, the potential VY1 can be expressed as follows similarly to the equation (2).

座標（Ｘ１，Ｙ１）の画素に対する書き込みを行うために、例えば、上記単純マトリクス方式と同様の考え方により、走査線Ｘ１に０［Ｖ］を印加するとともに、データ線Ｙ１にＶｒ［Ｖ］を印加する。具体的には、給電端Ｘａ１と給電端Ｘｂ１に対し、同時に０［Ｖ］を印加し、給電端Ｙａ１と給電端Ｙｂ１に対し、同時に電位Ｖｒを印加する。また、Ｘａ２、Ｘａ３、Ｘｂ２及びＸｂ３には１／２Ｖｒ［Ｖ］を印加し、Ｙａ２、Ｙａ３、Ｙｂ２及びＹｂ３には０［Ｖ］を印加する。

In order to write to the pixel at the coordinates (X1, Y1), for example, 0 [V] is applied to the scanning line X1 and Vr [V] is applied to the data line Y1 based on the same concept as the above simple matrix method. To do. Specifically, 0 [V] is simultaneously applied to the power supply end Xa1 and the power supply end Xb1, and the potential Vr is simultaneously applied to the power supply end Ya1 and the power supply end Yb1. Further, 1/2 Vr [V] is applied to Xa2, Xa3, Xb2, and Xb3, and 0 [V] is applied to Ya2, Ya3, Yb2, and Yb3.

  Then, a voltage as shown in FIG. 15A is applied to each pixel. That is, Vr [V] is applied to the coordinates (X1, Y1). At this time, when Vr [V] is applied to the power supply end Ya1 and the power supply end Ya2, 1/2 Vr [V] is applied to the data lines Y2, Y3, Y4 and Y7 due to the structure of the drive circuit in the electrostatic coupling method. Further, when 0 [V] is applied to the power feed end Xa1 and the power feed end Xb1, 1/4 Vr [V] is applied to the scanning lines X2, X3, X4, and X7. For this reason, a maximum half-select voltage of 3/4 Vr [V] is applied to non-selected pixels.

  On the other hand, when writing is not performed on the pixel at the coordinates (X1, Y1), 0 [V] is applied to the power feeding ends Ya1 and Yb1 as well as the other power feeding ends. Then, a voltage as shown in FIG. 15B is applied to each pixel.

As shown in FIG. 15, in the above example, a threshold voltage must be higher because a half-select voltage, which is a maximum of 3/4 Vr [V], compared to the simple matrix method, is applied. In addition, a half selection voltage of −1/2 Vr [V] is applied at 16 locations in FIG. 15A and 36 locations in FIG. 15B, for a total of 52 locations, and FIGS. 15A and 15B. The largest number is applied. That is, when all the pixels are rewritten, a half selection voltage of −1/2 Vr [V] is applied to each pixel 16 to 36 times. Then, for example, in the case of displaying an image with a ratio of white and black of 5 to 5, a half-select voltage having an absolute value of 1/2 Vr or more is applied to each pixel about 32 times out of 81 times (about 40%) is applied, which causes a decrease in contrast.
(B) When Positive and Negative Voltages are Combined FIG. 16 is a diagram illustrating another example of voltages applied to each scanning line, data line, and each pixel in the conventional driving method of the electrostatic coupling method. ) Is a case where the pixel at the coordinates (X1, Y1) is rewritten, and (b) is a case where the rewriting is not performed.

  As another example for writing to the pixel at the coordinates (X1, Y1), −1/2 Vr [V] is applied to the scanning line X1, and 1/2 Vr [V] is applied to the data line Y1. Specifically, −1/2 Vr [V] is simultaneously applied to the power supply end Xa1 and the power supply end Xb1, and the potential 1/2 Vr is simultaneously applied to the power supply end Ya1 and the power supply end Yb1. Further, 0 [V] is applied to Xa2, Xa3, Xb2, and Xb3, and 0 [V] is applied to Ya2, Ya3, Yb2, and Yb3. Then, a voltage as shown in FIG. 16A is applied to each pixel.

  On the other hand, when writing is not performed on the pixel at the coordinates (X1, Y1), 0 [V] is applied to the power feeding ends Ya1 and Yb1 as well as the other power feeding ends. Then, a voltage as shown in FIG. 16B is applied to each pixel.

As shown in FIG. 16, in the above example, a half-select voltage of -1/2 Vr is not applied as compared with the case where only positive voltages are combined, but 3/4 Vr [V] and 1/2 Vr are not applied. The number of pixels to which the half-select voltage is applied is increasing, and it is considered that the effect of improving the contrast by combining positive and negative voltages cannot be obtained as in the simple matrix system.
[1.3 Driving Method of the Present Invention]
Next, in the electrostatic coupling type driving circuit shown in FIG. 1, in order to minimize the maximum half-selection voltage and the maximum half-selection voltage of 1.2, how are the voltages applied to the respective power supply terminals? Whether it is obtained will be described with reference to FIG.

  FIG. 2 is a diagram showing the voltage applied to each power supply end and each pixel as a variable in the drive circuit shown in FIG. 1, and (a) shows a case where the pixel at the coordinates (X1, Y1) is rewritten. Yes, (b) is a case where rewriting is not performed.

  As shown in FIG. 2, the voltage applied to the power supply terminals Xa1 and Xb1 is Vs, and the voltage applied to the power supply terminals Xa2, Xa3, Xb2, and Xb3 is Vi. Further, when rewriting the pixel at the coordinates (X1, Y1), the voltage applied to the power supply ends Ya1 and Yb1 is Vb, the voltages applied to the power supply ends Ya2, Ya3, Yb2, and Yb3, and the coordinates (X1, Y1). ) Is the voltage applied to the power supply ends Ya1 and Yb1 when the pixel is not rewritten. A block to which Vs is applied and a block to which Vb is applied are referred to as a selected block, and a block to which Vi is applied and a block to which Vw is applied are referred to as non-selected blocks.

  Then, Vr and Vh1 to Vh6 in FIG. 2 can be expressed by the following equations from equations (2) and (3), respectively.

また、式（１１）及び式（１３）に夫々式（１０）を代入すると、Ｖｈ１、Ｖｈ３は、夫々以下の式で表される。

Further, when Expression (10) is substituted into Expression (11) and Expression (13), Vh1 and Vh3 are respectively expressed by the following expressions.

ここで、以下の３つの条件を設定する。

Here, the following three conditions are set.

(Condition 1) Minimization of the maximum half-selection voltage In the above 1.2, in order to lower Vh1 which was the maximum half-selection voltage, lower Vb or increase Vi according to the equation (11-1). Therefore, Vb−Vi needs to be close to 0. Since Vr is a display voltage, Vr cannot be reduced (that is, Vr is treated as a constant).

(Condition 2) Minimization of Most Half-Selection Voltage In order to reduce | Vh4 |, which is the most half-selection voltage in 1.2 (A), | Vw−Vi | Must be close to zero.

(Condition 3) Reduction of the number of power supplies In the actual circuit, any one of Vb, Vw, Vs, and Vi is set to 0 [V] in order to reduce the number of power supplies that supply a voltage to the driver.

Therefore, from condition 3, when Vw = 0, Vs = 0, and Vi = 0, Vb and Vw for minimizing the maximum half-select voltage and the most half-select voltage are divided. , Vs and Vi will be described below.
(A) When Vw = 0 When Vw = 0 is substituted into the equations (13-1) and (14), Vh3 and Vh4 are respectively expressed by the following equations.

条件２により、｜Ｖｉ｜をＶｗ＝０に近づけたいため、条件１を適用するにあたっては、Ｖｂを下げるようにする。このとき、式（１３Ａ−１）より、Ｖｈ３は増大する傾向となる。従って、Ｖｈ１を下げつつ最大半選択電圧を最小にするためには、Ｖｈ１＝Ｖｈ３が成立する必要がある。Ｖｈ１＜Ｖｈ３となってしまえば、Ｖｈ３が最大半選択電圧になってしまうからである。そうすると、式（１１−１）＝式（１３）より、Ｖｉは以下の式で表される。

Since it is desired to make | Vi | close to Vw = 0 under Condition 2, Vb is lowered when Condition 1 is applied. At this time, Vh3 tends to increase from Equation (13A-1). Therefore, in order to minimize the maximum half-select voltage while lowering Vh1, it is necessary to establish Vh1 = Vh3. This is because if Vh1 <Vh3, Vh3 becomes the maximum half-selected voltage. If it does so, Vi will be represented by the following formula | equation from Formula (11-1) = Formula (13).

上記式（２１）を、式（１２）及び式（１４Ａ−１）に代入すると、Ｖｈ２及びＶｈ４は、夫々以下の式で表される。

When the above equation (21) is substituted into the equations (12) and (14A-1), Vh2 and Vh4 are respectively expressed by the following equations.

従って、Ｖｈ１〜Ｖｈ４は、全てＶｂの関数として表すことができる。

Therefore, Vh1 to Vh4 can all be expressed as a function of Vb.

(A-1) When priority is given to condition 1 In order to minimize the most half-selected voltage, Vh1 = | Vh4 |. This is because if Vh1 is decreased indefinitely, Vh1 <| Vh4 |, and | Vh4 | becomes the maximum half-selected voltage. As a result, Vb1 = Vh3, and Vb = 4 / 5Vr, 0 from Equations (13A-1) and (14A-2), but when Vb = 0, Vh1 = Vh2 = Vh3 = Vh4 = Vr. , Vb = 0 applied voltage combinations are excluded.

  Therefore, the voltages Vb, Vr, Vs, and Vi to be applied to each power supply end are expressed as follows using Vr.

また、このとき、Ｖｈ１〜Ｖｈ４に印加される電圧は、夫々Ｖｒを用いて以下のように表される。

At this time, voltages applied to Vh1 to Vh4 are expressed as follows using Vr.

式（４１）に示すように、最大半選択電圧は３／５Ｖｒとなり、上記１．２における最大半選択電圧３／４Ｖｒよりも低くすることができる。なお、最多半選択電圧も３／５Ｖｒである。

As shown in Equation (41), the maximum half-select voltage is 3/5 Vr, which can be lower than the maximum half-select voltage 3/4 Vr in 1.2. Note that the most half-selected voltage is also 3/5 Vr.

(A-2) When Condition 2 is Prioritized When Vh1 = Vh3, the following relations are established for Vh2, Vh5, and Vh6 from equations (11), (15), and (16).

従って、図１（ａ）及び（ｂ）を通じて、Ｖｗ−Ｖｓの電圧が３３箇所印加される。

Therefore, the voltage of Vw−Vs is applied at 33 locations through FIGS. 1 (a) and 1 (b).

  Therefore, in order to minimize the most half-selected voltage, Vh2 = | Vh4 |. When Vh2> | Vh4 |, 33 voltages greater than | Vh4 | are applied, and the effect of reducing the most half-selected voltage is lost. Then, Vb = 2 / 3Vr, 0 from Equation (11-1) and Equation (14A-2), but for the same reason as in (A-1) above, combinations of applied voltages due to Vb = 0 are excluded. .

  Therefore, the voltages Vb, Vr, Vs, and Vi to be applied to each power supply end are expressed as follows using Vr.

また、このとき、Ｖｈ１〜Ｖｈ４に印加される電圧は、夫々Ｖｒを用いて以下のように表される。

At this time, voltages applied to Vh1 to Vh4 are expressed as follows using Vr.

式（４２）に示すように、最多半選択電圧は１／３Ｖｒとなり、上記１．２における最多半選択電圧１／２Ｖｒよりも低くすることができる。一方、最大半選択電圧は２／３Ｖｒとなり、条件１を優先した場合よりも高くなっているが、上記１．２における最多半選択電圧３／４Ｖｒよりも低くなっている。
（Ｂ）Ｖｓ＝０とした場合
Ｖｓ＝０を、式（１０）に代入すると、Ｖｂは以下の式で表される。

As shown in the equation (42), the most half-selected voltage is 1/3 Vr, which can be made lower than the most-half selected voltage ½ Vr in 1.2. On the other hand, the maximum half selection voltage is 2/3 Vr, which is higher than the case where the condition 1 is prioritized, but is lower than the most half selection voltage 3/4 Vr in 1.2.
(B) When Vs = 0 When Vs = 0 is substituted into Expression (10), Vb is expressed by the following expression.

上記式２３を式（１１）〜（１４）に代入すると、Ｖｈ１〜Ｖｈ４は、夫々以下の式で表される。

Substituting Equation 23 into Equations (11) to (14), Vh1 to Vh4 are represented by the following equations, respectively.

ここで、条件１を適用するにあたっては、式（１１Ｂ−１）より、Ｖｉを上げるようにする。このとき、条件２より、Ｖｗも上げたい。そうすると、式（１３Ｂ−１）より、Ｖｈ３は増大する傾向となる。従って、Ｖｈ１を下げつつ最大半選択電圧を最小にするためには、上記（Ａ）の場合と同様に、Ｖｈ１＝Ｖｈ３が成立する必要がある。そうすると、式（１１Ｂ−１）＝式（１３Ｂ−１）より、Ｖｉは以下の式で表される。

Here, when applying Condition 1, Vi is increased from Equation (11B-1). At this time, I want to increase Vw from Condition 2. Then, Vh3 tends to increase from the equation (13B-1). Therefore, in order to minimize the maximum half selection voltage while lowering Vh1, Vh1 = Vh3 needs to be established as in the case of (A). If it does so, Vi will be represented by the following formula | equation from Formula (11B-1) = Formula (13B-1).

上記式（２４）を、式（１２Ｂ−１）及び（１４Ｂ−１）に代入すると、Ｖｈ２及びＶｈ４は、夫々以下の式で表される。

When the above equation (24) is substituted into equations (12B-1) and (14B-1), Vh2 and Vh4 are represented by the following equations, respectively.

従って、Ｖｈ１〜Ｖｈ４は、全てＶｗの関数として表すことができる。

Therefore, Vh1 to Vh4 can all be expressed as a function of Vw.

(B-1) When Condition 1 is Prioritized In order to minimize the most half-selected voltage, Vh1 = | Vh4 | is set as in (A-1) above. Then, Vh1 = Vh3, and from the expressions (13B-1) and (14B-2), the voltages Vb, Vr, Vs, and Vi to be applied to the power supply terminals are expressed by the following expressions using Vr, respectively. .

また、このとき、Ｖｈ１〜Ｖｈ４は、上記（Ａ−１）と同様に式（４１）で表されることとなる。

At this time, Vh1 to Vh4 are represented by the formula (41) as in the case of (A-1).

(B-2) When the condition 2 is prioritized In order to minimize the most half-selected voltage, Vh2 = | Vh4 | Then, from the expressions (12B-2) and (14B-2), the voltages Vb, Vr, Vs, and Vi to be applied to the power supply terminals are expressed by the following expressions using Vr, respectively.

また、このとき、Ｖｈ１〜Ｖｈ４に印加される電圧は、上記（Ａ−２）と同様に式（４２）で表されることとなる。
（Ｃ）Ｖｉ＝０とした場合
Ｖｉ＝０を、式（１１−１）、（１２）及び（１４）に夫々代入すると、Ｖｈ１、Ｖｈ２及びＶｈ４は、夫々以下の式で表される。

At this time, the voltage applied to Vh1 to Vh4 is expressed by the equation (42) as in (A-2) above.
(C) When Vi = 0 By substituting Vi = 0 into equations (11-1), (12), and (14), Vh1, Vh2, and Vh4 are represented by the following equations, respectively.

ここで、条件１を適用するにあたっては、式（１１Ｃ−１）より、Ｖｂを下げるようにする。そうすると、式（１３−１）より、Ｖｈ３は増大する傾向となるが、条件２より、ＶｗはＶｉ＝０に近づけたいため、Ｖｗを上げることによってＶｈ３を下げる方法はとるべきではない。従って、Ｖｈ１を下げつつ最大半選択電圧を最小にするためには、上記（Ａ）の場合と同様に、Ｖｈ１＝Ｖｈ３が成立する必要がある。そうすると、式（１１Ｃ−１）＝式（１３−１）より、Ｖｗは以下の式で表される。

Here, in applying the condition 1, Vb is lowered from the equation (11C-1). Then, Vh3 tends to increase from the equation (13-1), but from condition 2, since Vw wants to approach Vi = 0, a method of decreasing Vh3 by increasing Vw should not be taken. Therefore, in order to minimize the maximum half selection voltage while lowering Vh1, Vh1 = Vh3 needs to be established as in the case of (A). Then, from the formula (11C-1) = the formula (13-1), Vw is expressed by the following formula.

上記式（２５）を、式（１４Ｃ−１）に代入すると、Ｖｈ４は、以下の式で表される。

When the above equation (25) is substituted into the equation (14C-1), Vh4 is represented by the following equation.

従って、Ｖｈ１〜Ｖｈ４は、全てＶｂの関数として表すことができる。

Therefore, Vh1 to Vh4 can all be expressed as a function of Vb.

(C-1) When priority is given to condition 1 In order to minimize the most frequently selected voltage, Vh1 = | Vh4 | is set as in (A-1) above. Then, from the expressions (11C-1) and (14C-2), the voltages Vb, Vr, Vs, and Vi to be applied to the respective power supply terminals are expressed as follows using Vr.

また、このとき、Ｖｈ１〜Ｖｈ４は、上記（Ａ−１）と同様に式（４１）で表されることとなる。

At this time, Vh1 to Vh4 are represented by the formula (41) as in the case of (A-1).

(C-2) When Condition 2 is Prioritized In order to minimize the most frequently selected voltage, Vh2 = | Vh4 | is set in the same manner as A-2. Then, from the expressions (12C-1) and (14C-2), the voltages Vb, Vr, Vs, and Vi to be applied to the power supply terminals are expressed as follows using Vr.

また、このとき、Ｖｈ１〜Ｖｈ４に印加される電圧は、上記（Ａ−２）と同様に式（４２）で表されることとなる。
（Ｄ）まとめ
以上説明したように、条件１を優先する場合、即ち、式（４１）に示す電圧を各画素に印加する場合には、上記（Ａ）〜（Ｃ）のいずれの場合であっても、Ｖｓを基準として、Ｖｂ、Ｖｗ及びＶｉに夫々以下の式に示す電圧を印加すれば良いことがわかる。

At this time, the voltage applied to Vh1 to Vh4 is expressed by the equation (42) as in (A-2) above.
(D) Summary As described above, when the condition 1 is given priority, that is, when the voltage shown in the equation (41) is applied to each pixel, it is any of the cases (A) to (C). However, it is understood that the voltages shown in the following equations may be applied to Vb, Vw, and Vi with reference to Vs.

つまり、最大半選択電圧を最小化する場合には、表示素子上のある画素を表示するときに、当該画素に対応する画素電極に接続された走査線の給電端が属するブロック（走査線の選択ブロック）に所定電圧を印加するとともに、当該画素電極に接続されたデータ線の給電端が属するブロック（データ線の選択ブロック）にＶｒを、データ線の他の給電端が属するブロック（データ線の非選択ブロック）に１／５Ｖｒを、走査線の他の給電端が属するブロック（走査線の非選択ブロック）に４／５Ｖｒを、夫々所定電圧から相対的に印加すれば良い。

In other words, when minimizing the maximum half-select voltage, when displaying a certain pixel on the display element, the block to which the feeding end of the scanning line connected to the pixel electrode corresponding to the pixel belongs (selection of scanning line) A predetermined voltage is applied to the block), Vr is assigned to the block (data line selection block) to which the power supply end of the data line connected to the pixel electrode belongs, and the block (data line of the data line) to which the other power supply end belongs. 1/5 Vr may be applied to the non-selected block), and 4/5 Vr may be applied to the block to which the other feeding end of the scanning line belongs (non-selected block of the scanning line) from a predetermined voltage.

  Further, when the condition 2 is prioritized, that is, when the voltage shown in the equation (42) is applied to each pixel, in any of the cases (A) to (C), Vs is used as a reference. It can be seen that the voltages shown in the following equations may be applied to Vb, Vw and Vi, respectively.

つまり、最多半選択電圧を最小化する場合、表示素子上のある画素を表示するときには、走査線の選択ブロックに所定電圧を印加するとともに、データ線の選択ブロックにＶｒを、データ線の非選択ブロックに１／３Ｖｒを、走査線の非選択ブロックに２／３Ｖｒを、夫々所定電圧から相対的に印加すれば良い。

That is, when minimizing the half-maximum selection voltage, when displaying a certain pixel on the display element, a predetermined voltage is applied to the scanning line selection block, Vr is set to the data line selection block, and the data line is not selected. It is only necessary to apply 1/3 Vr to the block and 2/3 Vr to the non-selected block of the scanning line relatively from a predetermined voltage.

  However, the voltage combinations shown in the above formulas (43) and (44) are combinations in which the conditions 1 and 2 are prioritized as much as possible, and should be applied to each block according to the present invention. The combination of voltages is not limited to these, and any combination is possible as long as the maximum half-select voltage is at least lower than that of the conventional driving method (3/4 Vr). If condition 2 is taken into consideration, the maximum half-select voltage is made lower than in the conventional drive method (3/4 Vr) and the most half-select voltage is at least in the conventional drive method (1 / Any combination that is lower than 2 Vr) is acceptable.

  If condition 1 is given higher priority, it may be combined in the vicinity of the voltage shown in equation (43). If condition 2 is given higher priority, it may be combined in the vicinity of the voltage shown in equation (44). It ’s fine. If the intermediate condition between the condition 1 and the condition 2 is set, a voltage between the voltage represented by the expression (43) and the voltage represented by the expression (44) may be combined.

  As described above, as the voltage to be applied to each block, an optimal combination may be selected from the above conditions depending on the threshold voltage of the display element, voltage-contrast characteristics, and the like.

Condition 3 is set for the purpose of reducing the number of power supplies, calculation convenience, etc. As is clear from the equations (43) and (44), one of Vs, Vi, Vb, and Vw is not necessarily set. It does not have to be 0 [V].
[2. Embodiment]
Next, FIG. 3 thru | or FIG. 3 thru | or demonstrates about 1st Embodiment based on this invention based on the principle mentioned above.
[2.1 Structure of electronic paper]
First, the configuration of the electronic paper 100 according to the present embodiment will be described.

  FIG. 3 is a schematic diagram illustrating an example of a schematic configuration of the electronic paper 100 according to the present embodiment. In FIG. 3, a wiring configuration is mainly illustrated.

  As shown in FIG. 3, the electronic paper 100 includes a display element 10, and N scanning lines and M data lines arranged on the display element 10 so as to intersect each other. Specifically, the display element 10 has a transparent upper substrate 1 and a lower substrate 2 (details will be described later) facing each other, and N scanning lines are arranged on the inner surface of the upper substrate 1. On the inner surface of the lower substrate 2, M data lines orthogonal to the N scanning lines are arranged. That is, the electronic paper 100 includes a drive circuit 50 in which N scanning lines X1 to XN and M data lines Y1 to YM are arranged in a matrix. Pixel electrodes are formed at the intersections of the scanning lines X1 to XN and the data lines Y1 to YM, respectively.

  In the drive circuit 50, the feeding ends of √N scanning lines are combined into one feeding end to form one block. Therefore, the feeding ends of the N scanning lines are divided into 2√N blocks (an example of a feeding end group) in total at both ends. At this time, each block at one end of the N scanning lines shares only one scanning line with √N blocks at the other end. In addition, a scan driver SD as drive means for supplying a potential to the scan line is electrostatically coupled to each block via a capacitor Cs. Therefore, 2√N scan drivers SD are attached to the N scanning lines as a whole.

On the other hand, the feeding ends of √M data lines are combined into one feeding end to form one block. Therefore, the feeding ends of the M data lines are divided into 2√M blocks (an example of a feeding end group) in total at both ends. At this time, each block at one end of the M data lines shares only one data line with √M blocks at the other end. An address driver AD as a driving means for supplying a voltage to the data line is electrostatically coupled to the power supply end of each block via a capacitor Ca. Therefore, 2√M address drivers AD are attached to the entire M data lines.
[2.2 Structure of display element]
Next, the structure of the display element 10 will be described.

  FIG. 4 is a cross-sectional view showing an example of the structure of one pixel on the display element 10.

  As shown in FIG. 4, the display element 10 has a structure in which black toner BT and white particles WT are sealed between pixel electrodes 3 and 4 facing each other. As will be described in detail later, in the toner display, rewriting such as writing or erasing of writing is performed by moving the charged black toner BT between the pixel electrodes by a voltage applied between the pixel electrodes.

  In FIG. 4, the pixel electrode 3 is formed on the inner surface of the upper substrate 1, and the pixel electrode 4 is formed on the inner surface of the lower substrate 2. The pixel electrode 3 is electrically connected to the scanning line, and the pixel electrode 4 is electrically connected to the data line. Therefore, the potential of the pixel electrode 3 becomes the potential of the connected scanning line, and the potential of the pixel electrode 4 becomes the potential of the connected data line.

  The display element 10 has a display voltage of 60 [V] and a threshold voltage of 45 [V]. That is, there is almost no change in display at 30 [V], and it has electrical characteristics that can be rewritten at 60 [V].

  Further, the display element 10 is normally white. The black display is performed by applying a relatively positive potential to the data line or applying a relatively negative potential to the scanning line. The white display is performed by applying a relatively negative potential to the data lines or applying a relatively positive potential to the scanning lines.

  In FIG. 4, a voltage of 60 [V] is applied in the direction from the pixel electrode 3 to the pixel electrode 4 by applying a potential of 60 to the pixel electrode 4 and a potential of 0 to the pixel electrode 3. As a result, a positive charge is added to the pixel electrode 4 and a negative charge is added to the pixel electrode 3.

  A black toner BT and white particles WT are enclosed between the pixel electrode 3 and the pixel electrode 4. As the black toner BT, a conductive toner is used, and as the white particles WT, fine particles such as carbon fluoride that are slippery are used. A charge transport layer 6 is applied to the pixel electrode 4, and the charge transport layer 6 serves to inject the positive charge of the pixel electrode 4 into the black toner BT.

  A case where the pixel performs black display will be described. The black toner BT in contact with the charge transport layer 6 is positively charged by being injected with a positive charge by the charge transport layer 6. The positively charged black toner BT moves toward the pixel electrode 3 because it has a Coulomb attractive force with the pixel electrode 3 to which a negative charge is added. If the voltage applied between the pixel electrodes is low, the amount of negative charge added to the pixel electrode 3 and the amount of positive charge added to the black toner BT are reduced. Insufficient coulomb attraction to respond. Therefore, in order for the black toner BT to respond, it is necessary to make the magnitude of the voltage applied between the pixel electrodes larger than a certain voltage.

  The black toner BT that has moved to the pixel electrode 3 adheres to the pixel electrode 3 due to Coulomb attractive force.

  5A is a cross-sectional view of the pixel when the black toner BT adheres to the pixel electrode 3, and FIG. 5B is a plan view when the pixel is observed from above the upper substrate 1. As shown in FIG. 5B, when viewed from above the upper substrate 1, the black toner BT adheres to the pixel electrode 3, so that the pixel looks black. In this way, black display of pixels, that is, writing into the pixels is performed. At this time, when viewed from above the upper substrate 1, the black toner BT adheres to the pixel electrode 3, so that the pixel looks black. In this way, black display of pixels, that is, writing into the pixels is performed.

  Here, even if the application of the voltage between the pixel electrodes is stopped, that is, even if the voltage applied between the pixel electrodes is set to 0 [V], positive charge is applied to the pixel electrode 4, and Since the negative charge is kept added, the black toner BT is kept attached to the pixel electrode 3. Therefore, even if the application of the voltage between the pixel electrodes is stopped, the pixel remains in a black display state. In other words, the pixel retains the written state.

  Next, a case where the pixel performs white display will be described. In this case, the polarity of the voltage applied to the pixel electrode 3 and the pixel electrode 4 is changed, and a potential of 0 is applied to the pixel electrode 4 and a potential of 60 is applied to the pixel electrode 3. A voltage of 60 [V] is applied in the direction. As a result, a positive charge is added to the pixel electrode 3 and a negative charge is added to the pixel electrode 4.

  A charge transport layer 5 is also applied to the pixel electrode 3, and the charge transport layer 5 has a function of injecting the positive charge of the pixel electrode 3 into the black toner BT. The black toner BT that is in contact with the charge transport layer 5 is positively charged when a positive charge is injected by the charge transport layer 5. The positively charged black toner BT has a Coulomb attractive force with the pixel electrode 4 to which a negative charge is applied, and moves toward the pixel electrode 4 and adheres to the pixel electrode 4.

  FIG. 6A is a cross-sectional view of the pixel when the black toner BT adheres to the pixel electrode 4, and FIG. 6B is a plan view when the pixel is observed from above the upper substrate 1. As shown in FIG. 6B, when viewed from above the upper substrate 1, the black toner BT adheres to the pixel electrode 4 so that only the white particles WT are visually recognized, so that the pixel looks white. Also in this case, since the black toner BT needs to obtain a sufficient Coulomb force for response, the magnitude of the voltage applied between the pixel electrodes needs to be larger than a certain voltage. At this time, when viewed from above the upper substrate 1, the black toner BT adheres to the pixel electrode 4 so that only the white particles WT are visually recognized, so that the pixel appears white. In this way, white display of the pixels, that is, erase of writing is performed.

  Here, even if the application of the voltage between the pixel electrodes is stopped, that is, even if the voltage applied between the pixel electrodes is set to 0 [V], negative charge is applied to the pixel electrode 4 and Maintains a state in which positive charges are respectively added, so that the black toner BT maintains a state of being attached to the pixel electrode 4. Therefore, even if the application of the voltage between the pixel electrodes is stopped, the pixel remains in a white display state.

  As described above, in the display element 10, when a display voltage is applied between the pixel electrodes 3 and 4, a pixel corresponding to the electrode is displayed (display state is rewritten), and display voltage application is stopped. After that, the display state is maintained.

In the present embodiment, the toner display is applied to the display element 10, but other electronic papers such as a twisting ball display, a microcapsule type electrophoretic display, an electrohydrodynamic display, a cholesteric liquid crystal display, and the like The present invention may be applied to a display device having characteristics.
[2.3 Combinations of voltages applied to each block]
Next, a combination of voltages applied to each block of the drive circuit 50 by the scan driver SD and the address driver AD will be described with reference to FIG. For convenience of explanation, the drive circuit 50 of the electronic paper 100 will be described below as having the configuration shown in FIG. 1 unless otherwise specified.

  In the present embodiment, priority is given to minimizing the maximum half-selected voltage (condition 1 is given priority), and a voltage is applied to each block by the combination of equation (43) described in 1.3 (D) above. Shall. Here, in order to reduce the number of power supplies, the voltage Vs applied to the selected block of the scanning line is set to 0 [V]. Therefore, the voltage Vb applied to the selected block of the data line is 60 [V] which is the display voltage, and the voltage Vw applied to the non-selected block of the data line is 12 [V], which is applied to the non-selected block of the scanning line. The voltage Vi to be used is 48 [V].

  FIG. 7 is a diagram illustrating an example of voltages applied to each power supply end and each pixel in the drive circuit 50 according to the present embodiment. FIG. 7A illustrates rewriting of the pixel at coordinates (X1, Y1). (B) is a case where rewriting is not performed.

  When a voltage is applied to each block in the above combination, as shown in FIG. 7, the maximum half-select voltage is 36 [V], and the most half-select voltage is −36 [V]. As described above, the maximum half-select voltage is greatly reduced as compared with the conventional method (45 [V]). On the other hand, the absolute value of the most half-selected voltage is higher than that of the conventional method (−30 [V]). Therefore, the combination of the applied voltages in the present embodiment is effective for a display element that has a low threshold voltage but is unlikely to cause a decrease in contrast with respect to the half-selected voltage.

Moreover, since the voltage applied to each block is a combination of only positive voltages, the number of circuits can be simplified.
[2.4 Driving Sequence in Driving Circuit]
Next, a driving sequence in the driving circuit 50 will be described with reference to FIGS. 8 and 9 assuming that the driving circuit has the configuration shown in FIG.

  FIG. 8 is a display example of an image on the display element 10. In the display example shown in FIG. 8, the columns Y1 to Y3 and Y7 to 9 are displayed in black, and the columns Y4 to Y6 are displayed in white. FIG. 9 is a diagram showing a driving sequence of the driving circuit 50 when the image of FIG. 8 is displayed. The drive sequence in FIG. 9 is applied to the power supply terminals Xa1 to Xa3 and Xb1 to Xb3 of the scanning lines in the drive circuit 50 and to the power supply terminals Ya1 to Ya3 and Yb1 to Yb3 of the data lines. The magnitude of the voltage is shown.

  First, in the first period T1, the display element 10 is subjected to a refresh operation for erasing previous display contents and making the charge holding state in the display panel uniform. In order to make the charge holding state uniform, it is effective to apply a voltage higher than the normal writing voltage between the pixel electrodes. Therefore, a pulse voltage having a positive voltage of 60 to 100 [V] is used. As a refresh pulse, it is necessary to apply a plurality of times alternately to the scanning line and the data line. In order to make the final display white, a refresh pulse is finally applied to the scanning lines, and the refresh operation ends. Specifically, for example, when a refresh pulse of 100 [V] is applied between the pixel electrodes to display in the order of white display, black display, and white display, as shown in FIG. A refresh pulse having a voltage of 100 [V] is simultaneously applied to Xa1 to Xa3 and Xb1 to Xb3 to perform white display. Thereafter, a refresh pulse having a voltage of 100 [V] is simultaneously applied to the power supply ends Ya1 to Ya3 and Yb1 to Yb3 of the data line to perform black display. After that, a refresh pulse having a voltage of 100 [V] is simultaneously applied to the power supply terminals Xa1 to Xa3 and Xb1 to Xb3 of the scanning lines to perform white display. As described above, by alternately applying a voltage higher than the normal writing voltage to each of the scanning lines and the data lines, a refresh operation capable of making the charge holding state in the display panel uniform can be performed.

  In the next period T2, writing is performed on the pixel at the coordinates (X1, Y1). In order to write to the pixel, it is necessary to apply a voltage higher than the threshold voltage 45 [V] between the pixel electrodes. In the driving sequence of FIG. 9, the pixel electrode is based on the electrical characteristics described above. Writing to the pixel is performed by applying a voltage of 60 [V] in between. In the electronic paper 100 according to this embodiment, in order to apply a voltage of 60 [V] between the pixel electrodes, a potential of 0 [V] is applied to the scanning line X1, and a potential of 60 [V] is applied to the data line Y1. Apply. Specifically, in order to apply a potential of 0 [V] to the scanning line X1, a voltage of 0 [V] is simultaneously applied to the power feeding ends Xa1 and Xb1 of the scanning line. At the same time, in order to apply a potential of 60 [V] to the data line Y1, a pulse voltage having a voltage of 60 [V] is simultaneously applied to the power supply ends Ya1 and Yb1 of the data line. Thereby, a voltage of 60 [V] is applied between the pixel electrodes in the pixel at the coordinates (X1, Y1), and writing to the pixel is performed. At the same time, a pulse voltage having a voltage of 48 [V] is simultaneously applied to the feeding ends Xa2, Xa3, Xb2, and Xb3 of the scanning line, and the feeding ends Ya2, Ya3, Yb2, and Yb3 of the data line are applied. On the other hand, a pulse voltage having a voltage of 12 [V] is applied simultaneously. As a result, the voltage shown in FIG. 7A is applied to each pixel of the display element 10 as a whole. For example, the maximum half-select voltage of 36 [V] is applied between the pixel electrodes in the pixel at the coordinates (X2, Y1), and the maximum half-selection of −36 [V] is performed between the pixel electrodes in the pixels at the coordinates (X5, Y5). A voltage is applied, but since both are lower than the threshold voltage, writing to the pixel is not performed. Note that the optimum value of the width of these pulses is determined from the magnitude of the applied voltage, the width between the upper substrate 1 and the lower substrate 2, the amount of charge per pixel, the capacitance of a capacitor connected in series, and the like.

  In the period T3, writing is performed on the pixel at the coordinates (X1, Y2). Specifically, a voltage of 0 [V] is simultaneously applied to the power feeding ends Xa1 and Xb1 of the scanning line, and simultaneously, a voltage of 60 [V] is simultaneously applied to the power feeding ends Ya1 and Yb2 of the data line. The pulse voltage which has is applied. As a result, a voltage of 60 [V] is applied between the pixel electrodes in the pixel at coordinates (X1, Y2), and writing to the pixel is performed. At the same time, a pulse voltage having a voltage of 48 [V] is simultaneously applied to the feeding ends Xa2, Xa3, Xb2, and Xb3 of the scanning lines, and the feeding ends Ya2, Ya3, Yb1, and Yb3 of the data lines are applied. On the other hand, a pulse voltage having a voltage of 12 [V] is applied simultaneously.

  In the period T4, writing is performed on the pixel at the coordinates (X1, Y3). Specifically, a voltage of 0 [V] is simultaneously applied to the power supply terminals Xa1 and Xb1 of the scanning line, and simultaneously, a voltage of 60 [V] is simultaneously applied to the power supply terminals Ya1 and Yb3 of the data line. The pulse voltage which has is applied. Thereby, a voltage of 60 [V] is applied between the pixel electrodes in the pixel at the coordinates (X1, Y3), and writing to the pixel is performed. At the same time, a pulse voltage having a voltage of 48 [V] is simultaneously applied to the power supply ends Xa2, Xa3, Xb2 and Xb3 of the scanning lines, and the power supply ends Ya2, Ya3, Yb1 and Yb2 of the data lines are applied. On the other hand, a pulse voltage having a voltage of 12 [V] is applied simultaneously.

  By the operations in the periods T2 to T4 described above, the display of the pixels at the intersections of the scanning lines X1 and the data lines Y1 to Y3 is completed.

  In the period T5, writing of pixels at the intersection of the scanning line X1 and the data lines Y4 to Y6 is not performed. Specifically, first, since writing to the pixel at the coordinates (X1, Y4) is not performed, a voltage of 0 [V] is simultaneously applied to the power feeding ends Xa1 and Xb1 of the scanning lines. At the same time, a pulse voltage having a voltage of 48 [V] is simultaneously applied to the feeding ends Xa2, Xa3, Xb2, and Xb3 of the scanning line. At the same time, a pulse voltage having a voltage of 12 [V] is simultaneously applied to the scanning lines Ya1 to Ya3 and Yb1 to Yb3. As a result, the voltage shown in FIG. 7B is applied to each pixel of the display element 10 as a whole. As a result, a half-select voltage of 12 [V] is applied between the pixel electrodes in the pixel at the coordinates (X1, Y4), but writing to the pixel is not performed because it is lower than the threshold voltage. This operation is repeated for the data lines Y5 and Y6. Thereby, the display of the pixel at the intersection of the scanning line X1 and the data lines Y4 to Y6 is completed.

  In the period T6, writing to the pixel at the intersection of the scanning line X1 and the data lines Y7 to Y9 is performed. Specifically, first, writing is performed on the pixel at the coordinates (X1, Y7). A voltage of 0 [V] is simultaneously applied to the feeding ends Xa1 and Xb1 of the scanning line, and simultaneously, a pulse voltage having a voltage of 60 [V] is simultaneously applied to the feeding ends Ya3 and Yb1 of the data line. To do. Thereby, a voltage of 60 [V] is applied between the pixel electrodes in the pixel at the coordinates (X1, Y7), and writing to the pixel is performed. At the same time, a pulse voltage having a voltage of 48 [V] is simultaneously applied to the feeding ends Xa2, Xa3, Xb2, and Xb3 of the scanning lines, and the feeding ends Ya1, Ya2, Yb2, and Yb3 of the data lines are applied. On the other hand, a pulse voltage having a voltage of 12 [V] is applied simultaneously. And the operation | movement similar to the operation | movement from the period T3-T4 is repeated also about data line Y8 and -Y9. As a result, writing to the pixel at the intersection of the scanning line X1 and the data lines Y7 to Y9 is performed.

In the period T7, the pixels at the intersections of the scanning line X2 and the data lines Y1 to Y9 are displayed.
Specifically, first, writing is performed on a pixel at coordinates (X2, Y1). In order to apply a potential of 0 [V] to the scanning line X2, a voltage of 0 [V] is simultaneously applied to the power feeding ends Xa1 and Xb2 of the scanning line. At the same time, in order to apply a potential of 60 [V] to the data line Y1, a pulse voltage having a voltage of 60 [V] is simultaneously applied to the power supply ends Ya1 and Yb1 of the data line. As a result, a voltage of 60 [V] is applied between the pixel electrodes in the pixel at coordinates (X2, Y1), and writing to the pixel is performed. At the same time, a pulse voltage having a voltage of 48 [V] is simultaneously applied to the feeding ends Xa2, Xa3, Xb1, and Xb3 of the scanning lines, and the feeding ends Ya2, Ya3, Yb2, and Yb3 of the data lines are applied. On the other hand, a pulse voltage having a voltage of 12 [V] is applied simultaneously. And the operation | movement similar to the operation | movement to the period T3-T6 is repeated also about data line Y2-Y9. Thereby, the display of the pixels at the intersections of the scanning line X2 and the data lines Y1 to Y9 is completed.

  In the period T8, in order to apply a potential of 0 [V] to the scanning line X3, a voltage of 0 [V] is simultaneously applied to the power feeding ends Xa1 and Xb3 of the scanning line, and the power feeding ends Xa2 and Xa3 of the scanning line are applied. , Xb1 and Xb2 are simultaneously applied with a pulse voltage having a voltage of 48 [V]. For the data lines Y1 to Y9, the same operation as that in the period T2 to T7 is repeated. Thereby, the display of the pixels at the intersections of the scanning line X3 and the data lines Y1 to Y9 is completed.

  By repeating the operations similar to the operations in the periods T2 to T8 described above for the scanning lines X4 to X9, it is possible to display all the pixels.

  As described above, according to the present embodiment, when a certain pixel on the display element 10 is displayed, the scan driver SD and the address driver AD apply the display voltage between the pixel electrodes corresponding to the pixel. In addition to applying a voltage to the selected block of the scan line and the data line, a voltage that lowers the maximum absolute value of the half-select voltage applied between the other electrodes is set to the non-selected block of the scan line and the data line. Therefore, the half-selection voltage applied to the non-selected pixels becomes lower, and problems such as a decrease in contrast of the display image and erroneous selection can be improved.

Further, the scan driver SD applies 0 [V] to the selected block of the scan line, and the address driver AD applies 60 [V], which is the display voltage to the selected block of the data line, to the non-selected block of the data line. Since the scan driver SD applies 12 [V] to the non-selected block of the scan line, 48 [V], respectively, the absolute value of the maximum half-selected voltage is the minimum −36 [V]. Can be suppressed.
[2.5 Modification 1]
Next, a first modification according to this embodiment will be described with reference to FIG.

  In the above-described embodiment, priority is given to minimizing the maximum half-select voltage. However, in the present modification, priority is given to minimizing the most half-select voltage (condition 2 takes priority), and the above 1 It is assumed that a voltage is applied to each block by the combination of Expression (44) described in .3 (D). Here, also in this modification, the voltage Vs applied to the selected block of the scanning line is set to 0 [V] in order to reduce the number of power supplies. Therefore, the voltage Vb applied to the selected block of the data line is 60 [V] as the display voltage, and the voltage Vw applied to the non-selected block of the data line is 20 [V], and is applied to the non-selected block of the scanning line. The voltage Vi to be used is 40 [V].

  FIG. 10 is a diagram illustrating an example of voltages applied to each power supply end and each pixel in the drive circuit 50 according to the first modification of the present embodiment. FIG. 10A is a pixel at coordinates (X1, Y1). (B) is a case where rewriting is not performed.

  When a voltage is applied to each block in the above combination, as shown in FIG. 10, the maximum half-select voltage is 40 [V], which is higher than the half-select voltage (36 [V]) in the above embodiment. However, it is sufficiently lower than the conventional method (45 [V]). The half-maximum selection voltage is −20 [V], and its absolute value is greatly reduced as compared with the conventional method (−30 [V]). Therefore, the combination of applied voltages in this modification is effective for a display element that tends to cause a decrease in contrast with respect to a half-select voltage, for example.

  As described above, according to this modification, the scan driver SD and the address driver AD select the scan line and the data line so that the display voltage is applied between the pixel electrodes corresponding to the display target pixel. In addition to the voltage applied to the block, the maximum absolute value of the half-selection voltage applied between the other electrodes and the absolute value of the most frequently applied half-selection voltage are both reduced. Since it is applied to the selected block, the half-select voltage applied to the non-selected pixels is lower, and depending on the specifics of the display element 10, problems such as lower contrast of the display image and erroneous selection are improved than in the above embodiment. can do.

Further, the scan driver SD applies 0 [V] to the selected block of the scan line, and the address driver AD applies 60 [V], which is the display voltage to the selected block of the data line, to the non-selected block of the data line. Since the scan driver SD applies 40 [V] to 20 [V] to the non-selected block of the scan line, the maximum half-select voltage can be suppressed to 40 [V] lower than the conventional one. The half-maximum selection voltage can be suppressed to −20 [V] whose absolute value is lower than that of the conventional one.
[2.6 Modification 2]
Next, a second modification according to the present embodiment will be described with reference to FIG.

  In the drive circuit 50 according to the above-described embodiment, the capacitor is connected to both sides of the scan line and the data line so as to be electrostatically coupled to the scan driver SD and the address driver AD. In the case of the scanning line, a case where a capacitor is connected to only one side and is electrostatically coupled to the scan driver SD will be described.

  FIG. 11 is a schematic diagram illustrating a simplified example of a schematic configuration of the drive circuit 60 according to the second modification of the present embodiment.

  As shown in FIG. 11, each of the scanning lines X1 to X9 has the left end feeding end combined with the feeding ends Xa1 to Xa3 in units of three via a capacitor Cs to form respective blocks. The scanning lines X1 to X9 branch to the right side of the capacitor Cs, and are grouped into the power supply terminals Xb1 to Xb3 in units of three via the capacitor Cs to form respective blocks. On the other hand, the feeding end at the right end of the scanning lines X1 to X9 is open and is not connected to the capacitor and the scan driver.

  As is clear from FIG. 11, in the drive circuit 60, as in the above embodiment, the feeding ends of the nine scanning lines are divided into six blocks in total on only one side, and the nine scanning lines are also divided. Each block on the left side of the capacitor Cs shares only one scanning line with the three blocks on the right side. The scan driver SD that supplies a voltage to the scan line is electrostatically coupled to the power supply terminals Xa1 to Xa3 and Xb1 to Xb3 of each block via a capacitor Cs. Therefore, as a whole, six scan drivers SD are attached.

  In other words, the drive circuit 60 may be considered to be one in which the scanning lines of the drive circuit 50 are folded at the right end and overlapped, and the electrical characteristics of both are basically equivalent.

  Therefore, according to this modification, even when a voltage is applied to each block in the same combination as in the above embodiment, the same effect as in the above embodiment can be obtained.

  In the same manner as in the present modification, a capacitor may be connected to only one side of the data line.

It is the schematic diagram which simplified the example of the drive circuit 20 in an electrostatic coupling system. In the drive circuit shown in FIG. 1, the voltage applied to each power supply end and each pixel is shown as a variable, and (a) shows a case where the pixel at the coordinates (X1, Y1) is rewritten, (b ) Is a case where rewriting is not performed. It is a schematic diagram which shows an example of schematic structure of the electronic paper 100 which concerns on this embodiment. 3 is a cross-sectional view showing an example of the structure of one pixel on the display element 10. FIG. It is sectional drawing and a top view of one pixel on the display element 10 when performing black display. It is sectional drawing and the top view of one pixel on the display element 10 when performing white display. In the drive circuit 50 according to the present embodiment, FIG. 6 is a diagram illustrating an example of voltages applied to each power supply end and each pixel, and (a) is a case where rewriting of the pixel at coordinates (X1, Y1) is performed. (B) is a case where rewriting is not performed. 3 is a display example of an image on the display element 10. It is a figure which shows the drive sequence of the drive circuit 50 in the case of displaying the image of FIG. In the drive circuit 50 which concerns on the modification 1 of this embodiment, it is the figure which showed an example of the voltage applied to each electric power feeding end and each pixel, (a) rewrites the pixel of a coordinate (X1, Y1). (B) is a case where rewriting is not performed. It is the schematic diagram which simplified the example of schematic structure of the drive circuit 60 which concerns on the modification 2 of this embodiment. It is the schematic diagram which simplified the example of the drive circuit in a simple matrix system. It is a figure which shows an example of the voltage applied to each scanning line and data line and each pixel in a simple matrix system, (a) is a case where the pixel of the coordinate (X1, Y1) is rewritten, (b) is This is a case where rewriting is not performed. It is a figure which shows the other example of the voltage applied to each scanning line and data line and each pixel in a simple matrix system, (a) is a case where rewriting of the pixel of a coordinate (X1, Y1) is performed, (b ) Is a case where rewriting is not performed. It is a figure which shows an example of the voltage applied to each scanning line, data line, and each pixel in the conventional driving method of the electrostatic coupling method, and (a) is a case of rewriting the pixel at coordinates (X1, Y1). Yes, (b) is a case where rewriting is not performed. It is a figure which shows the other example of the voltage applied to each scanning line and data line and each pixel in the conventional drive method of an electrostatic coupling system, (a) rewrites the pixel of a coordinate (X1, Y1). (B) is a case where rewriting is not performed.

Explanation of symbols

DESCRIPTION OF SYMBOLS 1 Upper substrate 2 Lower substrate 3, 4 Pixel electrode 5, 6 Charge transport layer 10 Display element 20, 30, 50, 60 Drive circuit 100 Electronic paper BT Black toner WT White particle AD Address driver SD Scan driver

Claims (6)

A display element for displaying an image, a plurality of scanning lines and a plurality of data lines arranged on the display element so as to cross each other, and connected to each of the scanning lines and the data lines corresponding to each intersection a pair of electrodes, and a driving means for applying a voltage to a feeding point located at two positions in the scanning lines and the data lines, respectively, the feed point in the two positions are grouped in respectively predetermined number of units is connected to the drive means for each feeding point group, the other feeding point at a given number of the scanning lines of the same of said one to the feeding point group feeding point belongs among the plurality of scanning lines, different said feed The other feeding points of a predetermined number of the data lines belonging to a point group and belonging to the same feeding point group among the plurality of data lines belong to different feeding point groups. like The feeding point group is formed, the feed point in the two places, each said drive means and is electrostatically coupled, through the display voltage is applied between the pair of electrodes, the pair of on the display device A display device in which pixels corresponding to electrodes are displayed and maintains the display state even after application of the display voltage is stopped,
When the driving means displays a certain pixel on the display element, a voltage is applied so that the display voltage is applied between the pair of electrodes corresponding to the pixel. together with the feed point located at two positions in the scan lines and the data lines, respectively is applied to the first said feed point belonging respectively maximum the display of the absolute value of the voltage applied between the other of said pair of electrodes A display device, wherein a voltage that is lower than three- fourths of the voltage is applied to the second feeding point group excluding the first feeding point group. The display device according to claim 1,
The driving means applies a predetermined voltage to the first feeding point group of either the scanning line or the data line, and applies a voltage that becomes the display voltage to the other first feeding point group. The other second feeding point group is set to a voltage that is 1/5 of the display voltage, and the one second feeding point group is set to 4/5 of the display voltage. A display device characterized by applying a voltage relative to each of the predetermined voltages. The display device according to claim 1,
The drive means is applied the largest number between the other pair of electrodes so that the maximum absolute value of the voltage applied between the other pair of electrodes is lower than three-fourths of the display voltage. A display device characterized in that a voltage whose absolute value is lower than half of the display voltage is applied to the second feeding point group. The display device according to claim 3,
The driving means applies a predetermined voltage to the first feeding point group of either the scanning line or the data line, and applies a voltage that becomes the display voltage to the other first feeding point group. The other second feeding point group is set to a voltage that is one third of the display voltage, and the one second feeding point group is set to two thirds of the display voltage. A display device characterized by applying a voltage relative to each of the predetermined voltages. The display device according to any one of claims 1 to 4,
The scanning lines are N scanning lines,
The data lines are M data lines,
The feeding points at two locations on the scanning line are grouped into the feeding point group of √N units, respectively.
2. The display device according to claim 1, wherein the feeding points at two locations on the data line are grouped into the feeding point group of √M units. A display element for displaying an image, a plurality of scanning lines and a plurality of data lines arranged on the display element so as to cross each other, and connected to each of the scanning lines and the data lines corresponding to each intersection a pair of electrodes, and a driving means for applying a voltage to a feeding point located at two positions in the scanning lines and the data lines, respectively, the feed point in the two positions are grouped in respectively predetermined number of units is connected to the drive means for each feeding point group, the other feeding point at a given number of the scanning lines of the same of said one to the feeding point group feeding point belongs among the plurality of scanning lines, different said feed The other feeding points of a predetermined number of the data lines belonging to a point group and belonging to the same feeding point group among the plurality of data lines belong to different feeding point groups. like The feeding point group is formed, the feed point in the two places, each said drive means and is electrostatically coupled, through the display voltage is applied between the pair of electrodes, the pair of on the display device A voltage application method in a display device in which a pixel corresponding to an electrode is displayed and maintains its display state even after application of the display voltage is stopped,
When displaying a certain pixel on the display element, the driving means is connected to the pair of electrodes such that the display voltage is applied between the pair of electrodes corresponding to the pixel. together with the feed point located at two positions in the scan lines and the data lines, respectively is applied to the first said feed point belonging respectively maximum the display of the absolute value of the voltage applied between the other of said pair of electrodes A voltage applying method comprising: applying a voltage that is lower than three- fourths of the voltage to the second feeding point group excluding the first feeding point group.

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