JP5091920B2 - Manufacturing method of semiconductor wafer - Google Patents

Description

The present invention relates to single crystal semiconductor layer on the surface of the semiconductor substrate in the manufacture how the semiconductor wafer to crystal growth.

Conventionally, semiconductor crystal growth technology is often based on the consistency of lattice constants, which is used as a starting point for molecular beam epitaxy (MBE) and metal organic chemical vapor deposition (MOCVD). We have developed crystal growth technology of lattice mismatch system using non-equilibrium epitaxial methods such as Deposition). For example, Patent Document 1 discloses a nitride-based semiconductor device in which a laminate composed of an amorphous nitride layer / GaN buffer layer is formed on the surface of a sapphire substrate and then a crystal nitride-based semiconductor layer is crystal-grown. .

JP-A-9-18053

  However, in the technique described in Patent Document 1, the lattice constant of the nitride-based semiconductor has a lattice mismatch of about 10% or more with the lattice constant of the sapphire substrate. In addition, crystal growth while maintaining a covalent bond with the base generally causes many crystal defects at the interface in the case of a lattice mismatch system, which improves the crystallinity of the grown crystal thin film. There is a limit.

On the other hand, high-quality and large-diameter nitride semiconductor substrates are still under development, and the technology to realize crystal growth of single-crystal nitride semiconductors with large-diameter and higher quality is strong despite being a lattice mismatched substrate. It was desired.

The present invention has been made in order to solve such problems. A semiconductor wafer that achieves crystal growth of a high-quality single crystal nitride semiconductor with few crystal defects while using a lattice-mismatched substrate. an object of the present invention is to provide a manufacturing how.

In order to achieve the above object, a semiconductor wafer manufacturing method of the present invention includes a step of providing a graphene layer (110) on a surface of a first substrate (101), and peeling the graphene layer from the first substrate. Then, a single crystal is formed at the center of the honeycomb structure showing the step of bonding the peeled graphene layer to the second substrate by intermolecular force and the arrangement of carbon atoms of the graphene layer (110) on the second substrate. The step of adsorbing one element constituting the crystal of the semiconductor layer (114) and another element different from the one element constituting the crystal are bonded to the one element, and the single crystal semiconductor layer (114 ) And a step of crystal-growing the single crystal semiconductor layer (114) on the surface of the first layer. However, the numbers in parentheses are examples.

In the semiconductor wafer in which a single crystal semiconductor layer (114) grown crystal on the surface of the base plate (101) (400), wherein the substrate (101), the graphene layer provided on the surface of the substrate (101) (110 ) And a single crystal semiconductor layer (114) crystal-grown on the surface of the graphene layer, and the single crystal semiconductor layer (114) has a honeycomb structure showing an arrangement of carbon atoms of the graphene layer (110). One element constituting the crystal of the single crystal semiconductor layer (114) can be adsorbed at the center, and another element different from the one element constituting the crystal can be bonded to the one element. However, the numbers in parentheses are examples.

According to the present invention, while using the lattice-mismatched substrate, it is possible to provide a manufacturing how the semiconductor wafer to achieve the crystal growth of the crystal defects is less high quality single crystal nitride semiconductor.

It is sectional drawing for demonstrating the structure of the semiconductor substrate and crystal growth layer in the 1st Embodiment of this invention. It is sectional drawing for demonstrating the manufacturing process of the semiconductor substrate in 1st Embodiment. It is sectional drawing for demonstrating the example of a specific structure of the single crystal nitride semiconductor wafer in 1st Embodiment. It is a flowchart which shows the manufacturing process of the single crystal nitride semiconductor wafer in 1st Embodiment. It is sectional drawing for demonstrating the specific structural example of the semiconductor substrate and single crystal nitride semiconductor wafer in the 2nd Embodiment of this invention.

For the production how a semiconductor wafer according to the present invention, with reference to FIGS, illustrating a first embodiment to the second embodiment. These drawings schematically show the embodiment of the present invention, and the relationship between the shape and size of each component does not limit the technical scope of the present invention. Moreover, in describing the embodiment, portions having similar configurations or functions are denoted by the same reference numerals, and repeated description thereof may be omitted.

(First embodiment)
1 to 4 are diagrams for explaining a first embodiment of the present invention. Hereinafter, the present embodiment will be described with reference to these drawings.

  FIG. 1A to FIG. 1B are diagrams showing specific examples in which an epitaxial graphene layer is formed on the surface of a SiC substrate.

  FIG. 1A is a configuration diagram of a graphene layer growth substrate 200 in which an epitaxial graphene layer 110 is formed on the surface of a SiC substrate 101. The graphene layer growth substrate 200 is formed by forming the epitaxial graphene layer 110 on the surface of the SiC substrate 101 by high-temperature hydrogen etching treatment and high-temperature heating in a vacuum (see, for example, JP 2009-62247 A). The epitaxial graphene layer 110 is composed of, for example, three graphene layers 111a, 111b, and 111c. This graphene layer does not need to be composed of three layers and can have any number of layers.

  FIG. 1B is a structural diagram of the epitaxial graphene layer 110, which is formed by stacking three graphene layers 111 a, 111 b, and 111 c, and has weak force such as van der Waals force without covalent bonding between the layers. Are physically connected. The carbon atoms C constituting the graphene layer 111a are arranged in a plane and have a honeycomb structure in which carbon atoms in the same plane are bonded by a covalent bond. Physically connected. Therefore, the graphene substrate 100 provided with the graphene layer 111a on the surface of the SiC substrate 101 can be manufactured by peeling and transferring the sheet-like graphene layer 111a from the substrate.

  Next, a manufacturing process of the graphene substrate 100 and a single crystal nitride semiconductor wafer using the graphene substrate 100 will be described with reference to FIGS. FIG. 2A to FIG. 2E are diagrams for explaining a manufacturing process of the graphene substrate 100. FIG. 3 is a configuration diagram of a single crystal nitride semiconductor wafer 300 in which a nitride semiconductor layer 114 is formed on the surface of the graphene substrate 100. FIG. 4 is a flowchart showing a manufacturing process of the graphene substrate 100 and the single crystal nitride semiconductor wafer 300 using the graphene substrate 100.

  First, the epitaxial graphene layer 110 is formed on the surface of the SIC substrate 101, and the graphene layer growth substrate 200 is prepared (S1). Next, as shown in FIG. 2A, as an adhesive layer for peeling off one graphene layer 111a from the epitaxial graphene layer 110 formed on the surface of the SiC substrate 101, a graphene layer is formed on the surface of the epitaxial graphene layer 110. A metal adhesion layer 120 that easily diffuses from the surface of the layer 110 to the inside is formed (S2). As the metal adhesion layer 120, for example, a titanium Ti layer is formed on the entire surface of the wafer by vacuum deposition. Accordingly, since the Ti of the titanium Ti layer 120 diffuses into the graphene layer 111a, the graphene layer 111a and the titanium Ti layer 120 are firmly bonded to each other by an adhesive effect such as an anchor effect, so that the graphene layers 111a, 111b, and 111c It has a stronger bonding force than the intermolecular force that bonds.

Next, as shown in FIG. 2B, a support adhesive layer 122 that secures high adhesion to the surface of the metal adhesive layer 120 is formed on the surface of the metal adhesive layer 120, and the support adhesive layer 122 A support 124 for peeling and supporting the graphene layer 111a from the SiC substrate 101 is bonded to the surface (S3). Next, as shown in FIG. 2C, the support 124 and the SiC substrate 101 are pulled with a tension F that is at least larger than the intermolecular force between the graphene layers 111 (S4), and the graphene layer 111a and , 111b.
In FIG. 2C, the metal adhesive layer 120 is peeled off with the graphene layer 111a attached thereto, but a plurality of graphene layers, for example, the graphene layers 111a and 111b are attached to the metal adhesive layer 120. It is good also as what is made to peel by.

  The SiC substrate 101 has a tetrahedral crystal structure, but when two layers are stacked as one period, a plane having hexagonal symmetry exists. For this reason, the SiC substrate 101 is similar to the graphene layer 111c in that it has hexagonal symmetry, but it does not have hexagonal symmetry in the single-layer bonding surface. Therefore, the SiC substrate 101 and the graphene layer 111c are covalently bonded, and have a strong bonding force due to a bond as well as a weak bond due to the regularity of the potential. That is, the bond between the graphene layers 111a, 111b, and 111c is weak, and the bond between the SiC substrate 101 and the graphene layer 111c is strong.

Next, as shown in FIG. 2D, a bonding layer 132 is formed on the surface of another substrate 130, and the graphene layer 111a is directly pressed and adhered to the surface of the bonding layer 132 to be bonded and fixed (S5). . The surface of another substrate 130 and the surface of the graphene layer 111a are bonded by intermolecular force. The bonding layer 132 is a layer for realizing a good bonded state. Here, a good bonding state means that the bonding strength is uniform within the bonding surface, and no void is generated at the bonding interface, and no crack is generated between the bonding surfaces when bonded. Another substrate 130 may be, for example, a Si substrate, and the bonding layer 132 may be a SiO ₂ layer.

  Next, as shown in FIG. 2E, the metal adhesive layer 120, the support adhesive layer 122, and the support 124 are removed from the surface of the graphene layer 111a (S6). The metal adhesive layer 120, the support adhesive layer 122, and the support 124 are removed by chemically etching away the metal adhesive layer 120 using an acid such as boiling acid. In this way, the graphene substrate 100 including the graphene layer 111a on the surface of another substrate 130 is completed (S7). Next, as shown in FIG. 3, a single crystal nitride semiconductor layer 114 is grown on the surface of the graphene substrate 100 to complete the single crystal nitride semiconductor wafer 300 (S8). Thereby, the bonding layer 132 formed on the surface of another substrate 130 and the graphene layer 111a, or the graphene layer 111a and the nitride semiconductor layer 114 are bonded by an intermolecular force.

  In the case of bonding by intermolecular force, it is preferable that the surface of the nitride semiconductor layer 114 or the graphene layer 111a has at least nanometer order flatness. Here, the flatness of the nanometer order is a nanometer whose surface roughness (maximum height difference between peaks and valleys: Rrv) measured with an atomic force microscope (AFM) is a single digit. That is, it means that Rrv is a value smaller than 10 nm. More preferably, the Rrv on the surface of the bonding layer formed on the surface of another substrate 130 is preferably 3 nm or less.

Another substrate 130 is preferably a ceramic substrate such as a Si substrate or an AlN substrate, a glass substrate, a quartz substrate, a plastic substrate, or a metal substrate. The bonding layer 132 formed on the surface of another substrate 130 is a material selected from, for example, SiO ₂ , SiN, SiON, PSG, BSG, SOG, metal, and organic matter. The bonding layer 132 can be formed by a plasma CVD method, a CVD method, a sputtering method, or the like.
The bonding may be bonding by intermolecular force, atom diffusion through a bonding interface, compound formation, or the like.

  Here, crystal growth of a gallium nitride GaN thin film as the nitride semiconductor layer 114 will be described as a specific example. The graphene substrate 100 is placed in a crystal growth apparatus such as an MBE apparatus or an MOCVD apparatus, and the graphene substrate 100 is heated to supply gallium (Ga) and active nitrogen. The active nitrogen is supplied by an electron cyclone resonance (ECR) or a radical source for high frequency excitation.

  Nitride semiconductor layer 114, in particular, gallium nitride GaN, has a hexagonal columnar crystal structure, and nitrogen N atoms on the end face are planarly bonded in a hexagonal shape. In the graphene layer 111a, carbon C is planarly bonded in a hexagonal shape (FIG. 1B). A hexagonal shape of nitrogen N is disposed between carbon C atoms, and the nitride semiconductor layer 114 and the graphene layer 111a are physically coupled using only the regularity of the surface potential without being covalently coupled. Since gallium Ga does not have a covalent bond with the graphene layer 111a, crystal defects due to lattice mismatch are unlikely to occur. Further, by growing the second layer, the third layer,... And the gallium nitride GaN on the surface of the first gallium nitride GaN, a predetermined number of single crystal gallium nitride layers can be formed. .

  Since the first gallium nitride GaN layer is unlikely to have crystal defects due to lattice mismatch with the graphene layer 111a, the gallium nitride GaN layer has few crystal defects and becomes an extremely high quality single crystal semiconductor layer. . For example, a semiconductor wafer having a high-quality single-crystal gallium nitride layer with few crystal defects on the surface of a large-diameter Si substrate can be obtained.

According to the first embodiment of the present invention, the single crystal nitride semiconductor layer 114 is grown on the surface of the graphene substrate 100 in which the graphene layer 111a is bonded to the surface of another substrate 130 by intermolecular force bonding. There is an effect.
(1) Since there is no covalent bond and only regular surface potential regularity between the graphene layer 111a and the nitride semiconductor layer 114 is used for crystal growth, there is no generation of crystal defects due to lattice mismatch at the interface.
(2) As another substrate 130, an inexpensive and large-diameter substrate such as a Si substrate can be used, so that an inexpensive single-crystal nitride semiconductor layer growth wafer can be obtained.
(3) It is possible to select from a wide range of options as another substrate 130, and it is possible to select a substrate that is optimal for the application.

(Modification)
In the first embodiment, the embodiment in which the gallium nitride GaN layer is formed on the surface of the graphene layer 111a has been described as a specific example. However, the embodiment can be applied to crystal growth of the nitride semiconductor layer 114 other than the gallium nitride GaN. As nitride semiconductor layers other than GaN, Al _X Ga _1-X N (1 ≧ x ≧ 0), In _X Ga _1-X N (1 ≧ x ≧ 0), Al _X In _1-X N (1 ≧) x ≧ 0).

  Furthermore, in this embodiment, since only regular surface potential regularity possessed by the graphene layer 111a and having no covalent bond is used for crystal growth, the method of crystal growth on the surface of the graphene layer 111a is used in a high lattice mismatch system. As a quality semiconductor crystal growth method, it can be applied to crystal growth of semiconductor layers other than nitride semiconductors, such as III-V, II-VI, and IV-IV compound semiconductor materials.

(Second Embodiment)
Next, a second embodiment of the present invention will be described. The second embodiment is different from the first embodiment in that the single crystal semiconductor layer is grown using a substrate on which a graphene layer is grown in the second embodiment.

  Hereinafter, a second embodiment will be described with reference to FIG. FIG. 5A is a view showing a graphene layer growth substrate 200. As shown in FIG. 5A, an epitaxial graphene layer 110 is formed on the surface of the SiC substrate 101 by the method described in the first embodiment, and a graphene layer growth substrate 200 in which the epitaxial graphene layer 110 is grown is produced. To do. The epitaxial graphene layer 110 is composed of three layers (111a, 111b, 111c).

  Next, the graphene layer growth substrate 200 is placed in a crystal growth chamber, and gallium nitride GaN is grown by MBE, MOCVD, or the like. Gallium Ga and active nitrogen are introduced, and gallium Ga is adsorbed at the center of the honeycomb structure showing the atomic structure of carbon atoms in the graphene layer, thereby forming a six-fold symmetric first layer. Active nitrogen is bonded thereto to form a first layer of hexagonal gallium nitride GaN (h-GaN). The active nitrogen is supplied by electron cyclone resonance or a high frequency excited radical source. Further, the gallium nitride single crystal semiconductor layer is grown in order so that the second layer, the third layer,...

FIG. 5B is a diagram illustrating a semiconductor wafer 400 in which a nitride semiconductor layer 114 is formed on the surface of the graphene layer growth substrate 200. Nitride semiconductor layer is, for _{example, Al X Ga l-X N} (1 ≧ x ≧ 0), Al X In 1-X N (1 ≧ x ≧ 0), In X Ga 1-X N (1 ≧ x ≧ 0) a semiconductor layer composed of one or more materials selected from. In addition, a compound semiconductor material containing nitrogen may be provided.

  According to the second embodiment of the present invention, the substrate to be used is limited compared to the first embodiment, but it is simpler in that it is not necessary to transfer the graphene layer 111a to another substrate 130. Although it is a lattice mismatch system, it is possible to grow a high-quality single crystal semiconductor layer free from crystal defects in which the SiC substrate 101 and the graphene layer 110 are bonded by intermolecular force.

(Modification)
Although the SiC substrate 101 is used in the second embodiment, an epitaxial graphene layer 110 is formed on the surface of the Si substrate using a Si substrate instead of the SiC substrate 101, and the semiconductor layer is formed on the surface of the epitaxial graphene layer 110. Crystal growth may be performed.

  Although the embodiments of the present invention have been described above, the present invention is not limited to the scope of the embodiments described above, but extends to the technical scope of each claim described in the claims.

DESCRIPTION OF SYMBOLS 100 Graphene substrate 101 SiC substrate 110 Epitaxial graphene layer 111, 111a, 111b, 111c Graphene layer 114 Nitride semiconductor layer 120 Metal adhesion layer 122 Support adhesion layer 124 Support 130 Separate substrate 132 Bonding layer 200 Graphene layer growth substrate 300 Single Crystal nitride semiconductor wafer 400 Single crystal nitride semiconductor wafer

Claims (2)

A step of providing a graphene layer on the surface of the first substrate;
Peeling the graphene layer from the first substrate and bonding the peeled graphene layer to the second substrate by intermolecular force;
A step of adsorbing one element constituting the crystal of the single crystal semiconductor layer to the center of the honeycomb structure showing the arrangement of carbon atoms of the graphene layer on the second substrate;
A step in which another element different from the one element constituting the crystal is bonded to the one element to form a first layer of the single crystal semiconductor layer;
And a step of crystal-growing the single crystal semiconductor layer on the surface of the first layer. The single crystal semiconductor layer includes:
The method for producing a semiconductor wafer according to claim 1, wherein the semiconductor wafer is a nitride semiconductor layer containing at least one element selected from In, Ga, and Al.

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