JP5131817B2 - Semiconductor device, manufacturing method thereof, and manufacturing apparatus used therefor - Google Patents

Description

  The present invention relates to a semiconductor device, a manufacturing method thereof, and a manufacturing apparatus used therefor, and more particularly to a semiconductor device having a gate electrode, a source electrode and a drain electrode, a manufacturing method thereof, and a manufacturing apparatus used therefor.

  Nitride-based compound semiconductor materials such as GaN, InGaN, AlGaN, and AlInGaN have a larger band gap energy than GaAs-based materials, and thus electronic devices using these have high heat resistance and excellent high-temperature operation.

  In particular, electronic devices such as FET (Field Effect Transistor) using GaN are expected to be applied as power supply devices. Here, consider using an FET as a power supply device.

  When a power supply circuit such as a converter or an inverter is configured using an existing circuit, the FET is required to exhibit normally-off characteristics. In the FET using GaN, as shown in FIG. 27, a buffer layer 102 made of GaN, an electron transit layer 103 made of undoped GaN, and the electron transit layer 103 are formed on a substrate 101 such as a sapphire substrate. In comparison, a layer structure (heterojunction structure) is formed by sequentially stacking electron supply layers 105 made of undoped AlGaN, which are thinner.

  In the FET having this structure, a high-concentration two-dimensional electron gas 104 is generated in the undoped GaN layer 103 due to strain generated due to a difference in lattice constant between the undoped AlGaN layer 105 and the undoped GaN layer 103 and spontaneous polarization of the undoped AlGaN layer 105. It is formed. Therefore, when a gate electrode is simply formed on the undoped AlGaN layer 105, the high electron mobility transistor having this heterojunction structure has a source electrode 107 and a drain electrode 107 in a state where no voltage is applied to the gate electrode 106. So-called normally-on operation where current continues to flow between. Therefore, there is a problem in that a so-called normally-off operation in which no current flows between the source electrode 107 and the drain electrode 107 without applying a voltage to the gate electrode 106 cannot be realized.

  As a solution, there is a method of reducing the thickness T1 of the electron supply layer 105 immediately below the gate electrode 106 as shown in FIG. That is, there is a method in which at least the thickness T1 of the electron supply layer 105 positioned immediately below the gate electrode 106 is made thinner than the thickness T3 of other portions (see Patent Document 1).

By reducing the thickness T1 of the electron supply layer 105 corresponding to the portion immediately below the gate electrode 106, the pinch-off voltage V _{T of} that portion increases. Therefore, in a state where no voltage is applied to the gate electrode 106, the two-dimensional electron gas layer 104 in the portion disappears and the portion is depleted. This makes it possible to realize a high electron mobility transistor that performs a so-called normally-off operation in which no current flows between the source electrode 107 and the drain electrode 107 when no voltage is applied to the gate electrode 106.

  In addition, for the source electrode 107 and the drain electrode 107, it is desired to reduce the contact resistance in order to reduce the on-resistance. As a solution, there is a method of reducing the distance between the electrode 107 and the two-dimensional electron gas layer 104 by reducing the thickness T2 of the electron supply layer 105 immediately below the source electrode 107 and the drain electrode 107, respectively. As described above, since the etching of the electron supply layer 105 leads to depletion due to the disappearance of the two-dimensional electron gas layer 104, the remaining thickness T2 of the electron supply layer 105 must be strictly controlled.

Further, as disclosed in Japanese Patent Application Laid-Open No. 2004-363346, there is a method of etching by a laser ablation method using a band difference between GaN and AlGaN.
JP 2005-183733 A JP 2004-363346 A

  However, when the etching for forming the holes 105a and 105b in the electron supply layer 105 is performed for normally-off as described above, the voltage at which the semiconductor device is turned on due to etching variations, so-called threshold voltage, varies. was there.

  Further, in order to reduce the resistance, when the electron supply layer 105 is etched, the contact resistance varies due to etching variations, or the contact resistance increases due to excessive etching.

  In the method described in Japanese Patent Application Laid-Open No. 2004-363346, GaN in the electron transit layer may be etched, and it is difficult to control the strict etching depth of the electron supply layer.

  The present invention has been made in view of the above problems, and an object thereof is to accurately control the formation depth of a hole (recess) for forming an electrode in a semiconductor device having a nitride compound semiconductor material. It is to provide a semiconductor device, a manufacturing method thereof, and a manufacturing apparatus used therefor.

The semiconductor device of the present invention is a semiconductor device having a gate electrode, a source electrode, and a drain electrode, and includes an electron transit layer and an electron supply layer. The electron transit layer is made of GaN. The electron supply layer is bonded to the electron transit layer and has a larger band gap energy than the electron transit layer, and is an Al _x In _y Ga _1-xy N layer (0 ≦ x ≦ 1, 0 ≦ y ≦ 1, It has a multilayer structure of 0 ≦ x + y ≦ 1). The multilayer structure includes a first layer that is opaque to light having a predetermined wavelength λ, and a second layer having a composition different from that of the first layer. The first layer generates photoluminescence light for detecting the etching end point by being irradiated with light having a predetermined wavelength λ. In at least one of the formation portion of the gate electrode, the source electrode, and the drain electrode, a hole extending in the first layer from the surface opposite to the electron transit layer side of the electron supply layer toward the second layer is formed. ing. The first layer includes a plurality of flag layers, and each of the plurality of flag layers has a composition of Al _x In _y Ga _{1 -xy} N with different x. Each position of the plurality of flag layers has periodicity.

  According to the semiconductor device of the present invention, when forming a hole in at least one of the gate electrode, the source electrode, and the drain electrode, the formation depth of the hole is determined by observing the photoluminescence light generated from the first layer. Can be accurately controlled.

  In addition, since the second layer having a composition different from that of the first layer is below the first layer, the formation speed of the hole is reduced from the moment when the hole penetrates the first layer and reaches the second layer. This makes it possible to control the hole formation depth more accurately.

In the semiconductor device of the present invention, the first layer includes a plurality of flag layers, and each of the plurality of flag layers has a composition of Al _x In _y Ga _{1 -xy} N with different x.

  Since the composition of the plurality of flag layers is different, the observed photoluminescence light is different depending on the flag layer being etched, so that the etching position can be observed.

Preferably, in the semiconductor device of the above SL as a set multiple flags layers with periodicity in each position, the first layer including a plurality of sets of pair of flag layer.

  In the semiconductor device described above, preferably, the position of each set of the plurality of flag layers has periodicity.

  Thus, by providing periodicity in the multilayer film and counting its periodic structure, the formation state of the holes can be accurately observed.

Preferably, in the above semiconductor device, the flag layer in each of the plurality of sets of flag layers has a larger x in the composition of Al _x In _y Ga _1-xy N as the flag layer is closer to the electron transit layer.

  In the above semiconductor device, the hole is preferably formed so as to penetrate the first layer and reach the second layer.

  In the above semiconductor device, the hole is preferably formed so as to have a bottom surface in the first layer.

Preferably, in the above semiconductor device, a layer having the largest x in the composition of Al _x In _y Ga _{1 -xy} N in the electron supply layer is exposed at the bottom surface of the hole.

  The method for manufacturing a semiconductor device of the present invention is a method for manufacturing a semiconductor device having a gate electrode, a source electrode, and a drain electrode, and includes the following steps.

An electron transit layer made of GaN is formed. Al _x In _y Ga _{1 -xy} N layer (0 ≦ x ≦ 1, 0 ≦ y ≦ 1, 0 ≦ x + y ≦ 1) bonded to the electron transit layer and having a larger band gap energy than the electron transit layer. The electron supply layer having a multilayer structure is formed. The multilayer structure is formed to include a first layer that is opaque to light having a predetermined wavelength λ, and a second layer having a composition different from that of the first layer. In at least one of the formation portion of the gate electrode, the source electrode, and the drain electrode, a hole extending in the first layer from the surface opposite to the electron transit layer side of the electron supply layer toward the second layer is etched. It is formed. The end point of etching is detected by measuring the photoluminescence light generated from the first layer by irradiating light of a predetermined wavelength λ when forming the hole. The first layer includes a plurality of flag layers, and each of the plurality of flag layers is formed such that x is different from each other in the composition of Al _x In _y Ga _{1 -xy} N, and at each position of the plurality of flag layers. It is formed so as to have periodicity.

  According to the method for manufacturing a semiconductor device of the present invention, since the end point of etching is detected by measuring the photoluminescence light generated from the first layer by irradiating light of a predetermined wavelength λ when forming the hole, The formation depth of the hole can be accurately controlled. Thereby, since the thickness of the electron supply layer on the electron transit layer can be accurately controlled, uniform normally-off characteristics or low ohmic resistance can be realized.

  A semiconductor device manufacturing apparatus of the present invention is a manufacturing apparatus used for etching for forming a hole in the semiconductor device manufacturing method described above, and is a predetermined device for generating photoluminescence light only in the first layer. A light source that emits light of wavelength λ is provided.

  According to the semiconductor device manufacturing apparatus of the present invention, since the light source that emits the light for generating the photoluminescence light is provided only in the first layer, the etching state can be accurately determined by measuring the photoluminescence light. Can know.

  Preferably, the semiconductor device manufacturing apparatus further includes a light receiver for receiving the photoluminescence light generated in the first layer.

  Preferably, the semiconductor device manufacturing apparatus further includes an optical fiber for guiding the photoluminescence light generated in the first layer to the light receiver.

  Preferably, in the semiconductor device manufacturing apparatus, the optical fiber is extended above an object to be processed including an electron transit layer and first and second layers.

  As described above, according to the present invention, when forming a hole in at least one of the gate electrode, the source electrode, and the drain electrode, the photoluminescence light generated from the first layer is observed to observe the hole. The formation depth can be accurately controlled. For this reason, uniform normally-off characteristics or low ohmic resistance can be realized.

Embodiments of the present invention will be described below.
(Embodiment 1)
FIG. 1 is a cross-sectional view schematically showing a configuration of a semiconductor device according to the first embodiment of the present invention. Referring to FIG. 1, a buffer layer 2 made of, for example, AlN or GaN is formed on a substrate 1 made of, for example, silicon. On this buffer layer 2, an electron transit layer 3 made of, for example, GaN is formed. An electron supply layer is formed on the electron transit layer 3.

This electron supply layer is made of a material that is bonded to the electron transit layer 3 and has a band gap energy larger than that of the electron transit layer 3, and is an Al _x In _y Ga _1-xy N layer (0 ≦ x ≦ 1, 0 ≦ y ≦ 1, 0 ≦ x + y ≦ 1).

The multilayer structure of the electron supply layer includes a first layer that is opaque to light of a predetermined wavelength λ (for example, a He-Cd laser having a wavelength of 325 nm), and a second layer made of a material having a composition different from that of the first layer. Including layers. The multilayer structure of the electron supply layer includes, for example, an Al _x1 Ga _{1 -x1} N layer 8, an Al _y1 Ga _{1 -y1} N layer 9, an Al _x2 Ga _{1 -x2} N layer 10, and an Al _y2 Ga _{1 -y2} N. It has a layer 11 and an Al _x3 Ga _1-x3 N layer 12.

The Al _x1 Ga _{1 -x1} N layer 8, the Al _x2 Ga _{1 -x2} N layer 10 and the Al _x3 Ga _{1 -x3} N layer 12 correspond to the second layer. Since the Al _x1 Ga _{1 -x1} N layer 8 and the Al _x2 Ga _{1 -x2} N layer 10 correspond to the etching stopper layer in this embodiment, each of x1 and x2 in the above composition preferably has a maximum value. x1, x2 = 1. The thickness of the Al _x1 Ga _{1 -x1} N layer 8 is 1 nm, for example, and the thickness of the Al _x2 Ga _{1 -x2} N layer 10 is 3 nm, for example. Further, _{x3 in} the composition of the Al _x3 Ga _1-x3 N layer 12 is, for example, x3 = 0.25, and the thickness of the Al _x3 Ga _1-x3 N layer 12 is 14 nm.

The Al _y1 Ga _{1 -y1} N layer 9 and the Al _y2 Ga _{1 -y2} N layer 11 correspond to the first layer described above, and in the present embodiment correspond to the flag layer. Here, when, for example, a He—Cd laser having a wavelength of 325 nm is used as the light having a predetermined wavelength λ, y 1 and y 2 in the composition of the Al _y1 Ga _{1 -y1} N layer 9 and the Al _y2 Ga _{1 -y2} N layer 11 are used. If <0.168, each of these layers 9 and 11 is opaque to the laser of the above wavelength. In the present embodiment, y1 in the above composition is, for example, y1 = 0.15, and y2 is, for example, y2 = 0.14. Thus, the flag layer closer to the electron transit layer 3 has a higher Al ratio in the composition ratio. The thicknesses of both the Al _y1 Ga _{1 -y1} N layer 9 and the Al _y2 Ga _{1 -y2} N layer 11 are, for example, 1 nm.

  In this embodiment, since y1 and y2 are different, the wavelengths of the photoluminescence light generated from the flag layers 9 and 11 are different. Therefore, it becomes easy to measure the position of the end point of etching by measuring the photoluminescence light with, for example, a spectroscope and a CCD (Charge Coupled Device). When y1 = y2 and the composition of each of the flag layers 9 and 11 is the same, the wavelength of the photoluminescence light generated from each of the flag layers 9 and 11 is the same. Even in this case, if the number of times the flag layer has been etched is measured, the position of the end point of etching can be measured.

  In at least one of the formation portions of the gate electrode 15, the source electrode 19, and the drain electrode 19, holes are formed in the multilayer structure of the electron supply layer. In the present embodiment, holes 13 and 14 are formed in the formation portions of the gate electrode 15, the source electrode 19, and the drain electrode 19.

Each of the holes 13 and 14 is formed from the surface opposite to the surface on the electron transit layer 3 side of the electron supply layer (the lower surface in the drawing) (the upper surface in the drawing) toward the second layer. It is formed to extend into one layer. In the present embodiment, each of the holes 13 and 14 is formed so as to penetrate the first layer and reach the second layer. More specifically, the hole 13 is formed so as to penetrate the Al _x3 Ga _{1 -x3} N layer 12 and the Al _y2 Ga _{1 -y2} N layer 11 and reach the Al _x2 Ga _{1 -x2} N layer 10. . The hole 14 penetrates the Al _x3 Ga _{1 -x3} N layer 12, the Al _y2 Ga _{1 -y2} N layer 11, the Al _x2 Ga _{1 -x2} N layer 10 and the Al _y1 Ga _{1 -y1} N layer 9, and the Al _x1. It is formed to reach the Ga _1-x1 N layer 8. At the bottom surfaces of these holes 13 and 14, the surface of the electron supply layer having the highest Al ratio is exposed.

  The gate electrode 15 is formed so as to fill the hole 13. Each of the source electrode 19 and the drain electrode 19 is formed so as to fill the hole 14. Thereby, the remaining film thickness of the electron supply layer under the gate electrode 15 is 5 nm, and the remaining film thickness of the electron supply layer under each of the source electrode 19 and the drain electrode 19 is 1 nm.

Next, a method for manufacturing the semiconductor device of the present embodiment will be described.
2 to 10 are schematic cross-sectional views illustrating the method of manufacturing the semiconductor device according to the first embodiment of the present invention in the order of steps. Referring to FIG. 2, a buffer layer 2 made of, for example, AlN or GaN and an electron transit layer 3 made of, for example, GaN are sequentially stacked on a substrate 1 made of, for example, silicon. An electron supply layer is formed on the electron transit layer 3.

In the formation of the electron supply layer, an Al _x1 Ga _{1 -x1} N layer 8, an Al _y1 Ga _{1 -y1} N layer 9, an Al _x2 Ga _{1 -x2} N layer 10, and an Al _x1 Ga _{1 -x1} N layer 9 are formed on the electron transit layer 3. _{The y2Ga1 -y2N} layer 11 and the _{Alx3Ga1 -x3N} layer 12 are sequentially stacked.

Referring to FIG. 3, a photoresist pattern 16 is formed by applying a photoresist 16 on the Al _x3 Ga _1-x3 N layer 12 and then exposing and developing. Using the photoresist pattern 16 as a mask, etching is performed on the surface of the electron supply layer exposed from the photoresist pattern 16.

  Referring to FIG. 4, the etching described above is performed while irradiating light of a predetermined wavelength λ (for example, a He—Cd laser having a wavelength of 325 nm) and observing photoluminescence light generated from the flag layer of the electron supply layer, or Etching and observation of photoluminescence light are repeated many times. By this light irradiation, photoluminescence light is generated from the flag layer 11 before or at the beginning of etching, so that photoluminescence light is observed.

Since the Al _x3 Ga _1-x3 N layer 12 is set to x3 = 0.25, it is transparent to, for example, a He—Cd laser having a wavelength of 325 nm. For this reason, no photoluminescence light is generated from the Al _x3 Ga _1-x3 N layer 12.

By the etching described above, holes 13 and 14 are formed in the Al _x3 Ga _{1 -x3} N layer 12 of the electron supply layer, and the holes 13 and 14 are gradually deepened. Eventually, when the holes 13 and 14 penetrate the Al _x3 Ga _{1 -x3} N layer 12 and the flag layer 11 begins to be etched, the intensity of the photoluminescence light from the flag layer 11 decreases. Etching is temporarily stopped when the intensity of the photoluminescence light from the flag layer 11 disappears or when the photoluminescence light from the flag layer 9 starts to be observed.

At this point, the holes 13 and 14 penetrate at least the flag layer 11 and reach the Al _x2 Ga _{1 -x2} N layer 10. That is, the end point of etching can be detected by measuring the photoluminescence light from the flag layer 11.

Here, when the Al ratio in the composition of the Al _x2 Ga _1-x2 N layer 10 is increased (that is, when x2 is increased), the etching speed of the Al _x2 Ga _1-x2 N layer 10 is significantly reduced. Therefore, the in-plane uniformity at the bottom surfaces of the holes 13 and 14 can be improved.

Referring to FIG. 5, thereafter, a photoresist 17 is formed in the hole 14. In this state, the surface of the Al _x2 Ga _1-x2 N layer 10 is exposed from the hole 13.

  Referring to FIG. 6, gate electrode conductive layer 15 is formed so as to fill hole 13 and cover resist patterns 16 and 17. Thereafter, the resist patterns 16 and 17 are peeled off by a lift-off method, and the resist patterns 16 and 17 and the gate electrode conductive layer 15 thereon are removed.

Referring to FIG. 7, the gate electrode 15 is formed by leaving the gate conductive layer in the hole 13 by the lift-off method described above. Further, the surface of the Al _x2 Ga _{1 -x2} N layer 10 is exposed from the hole 14.

Referring to FIG. 8, a resist pattern 18 is formed on Al _x3 Ga _1-x3 N layer 12 and on gate electrode 15 except for holes 14 by using a normal photolithography technique. Using this resist pattern 18 as a mask, the surface of the Al _x2 Ga _1-x2 N layer 10 exposed from the photoresist pattern 18 is etched.

  Referring to FIG. 9, the above etching is performed by irradiating light with a predetermined wavelength λ (for example, a He—Cd laser with a wavelength of 325 nm) and observing photoluminescence light from the flag layer 9 or etching and photoluminescence. It is performed while repeating the observation of light many times. Due to this light irradiation, photoluminescence light is generated from the flag layer 9 before or at the beginning of etching, so that photoluminescence light is observed.

Since the Al _x2 Ga _{1 -x2} N layer 10 is set to x2 = 1, it is transparent to, for example, a He—Cd laser having a wavelength of 325 nm. Therefore, no photoluminescence light is generated from the Al _x2 Ga _1-x2 N layer 10.

By the etching described above, the hole 14 is gradually deepened. Eventually, when the hole 14 penetrates the Al _x2 Ga _{1 -x2} N layer 10 and the flag layer 9 begins to be etched, the intensity of the photoluminescence light from the flag layer 9 decreases. Etching is stopped when the intensity of the photoluminescence light from the flag layer 9 disappears or when the photoluminescence light from the electron transit layer 3 made of GaN starts to be observed.

At this time, the hole 14 penetrates at least the flag layer 9 and reaches the Al _x1 Ga _{1 -x1} N layer 8. That is, the end point of etching can be detected by measuring the photoluminescence light from the flag layer 9.

Here, when the Al _x1 Ga _1-x1 N layer 8 is opaque to a He—Cd laser having a wavelength of 325 nm, for example, the photoluminescence light from the Al _x1 Ga _1-x1 N layer 8 is etched when the flag layer 9 is etched. Is observed. Further, if the Al ratio in the composition of the Al _x1 Ga _1-x1 N layer 8 is increased (that is, if x1 is increased), the etching speed of the Al _x1 Ga _1-x1 N layer 8 is significantly reduced. The Al _x1 Ga _1-x1 N layer 8 can be used as an etching stop layer.

  Referring to FIG. 10, source / drain electrode conductive layer 19 is formed so as to fill hole 14 and cover resist pattern 18. Thereafter, the resist pattern 18 is peeled off by a lift-off method, and the resist pattern 18 and the source / drain electrode conductive layer 19 thereon are removed.

  Referring to FIG. 1, the source / drain conductive layer in hole 14 is left by the lift-off method described above to form source electrode 19 and drain electrode 19. Thereby, the semiconductor device of the present embodiment is manufactured.

  According to the present embodiment, when the holes 13 and 14 are formed in the formation portion of the gate electrode 15, the source electrode 19 and the drain electrode 19, the photoluminescence light from the flag layers 9 and 11 is observed to observe the holes 13 and 14. The formation depth of 14 can be accurately controlled.

Since the Al _x1 Ga _{1 -x1} N layer 8 and the Al _x2 Ga _{1 -x2} N layer 10 having a composition different from that of the flag layers 9 and 11 are respectively located under the flag layers 9 and 11, the holes 13 and 14 From the moment when it passes through the flag layers 9 and 11 and reaches the Al _x1 Ga _{1 -x1} N layer 8 or the Al _x2 Ga _{1 -x2} N layer 10, the formation speed of the holes 13 and 14 can be reduced. Control of the formation depth of 13 and 14 becomes more accurate.

(Embodiment 2)
FIG. 11 is a cross-sectional view schematically showing a configuration of the semiconductor device according to the second embodiment of the present invention. FIG. 12 is a partially enlarged sectional view showing a region P1 in FIG. 11 in an enlarged manner.

  With reference to FIGS. 11 and 12, the configuration of the semiconductor device of the present embodiment is mainly different from the configuration of the first embodiment in the configuration of the electron supply layer.

The electron supply layer is made of a material that is bonded to the electron transit layer 3 and has a larger band gap energy than the electron transit layer 3, and is an Al _x In _y Ga _1-xy N layer (0 ≦ x ≦ 1, 0 ≦ y ≦ 1, 0 ≦ x + y ≦ 1).

  The electron supply layer has a multilayer structure in which a first layer that is opaque to light of a predetermined wavelength λ (for example, a He—Cd laser having a wavelength of 325 nm) and a second layer made of a material having a composition different from that of the first layer Including layers.

The second layer includes, for example, an Al _x1 Ga _{1 -x1} N layer 22, an Al _x2 Ga _{1 -x2} N layer 24, and an Al _x3 Ga _{1 -x3} N layer 26.

The first layer has a plurality of flag layer groups 21, 23 and 25. The flag layer group 21 is formed between the electron transit layer 3 and the Al _x1 Ga _{1 -x1} N layer 22, and the flag layer group 23 includes the Al _x1 Ga _{1 -x1} N layer 22 and the Al _x2 Ga _{1- The} flag layer group 25 is formed between the Al _x2 Ga _{1 -x2} N layer 24 and the Al _x3 Ga _{1 -x3} N layer 26.

Each of the plurality of flag layer groups 21, 23, 25 has a configuration in which a plurality of flag layers are stacked. In the present embodiment, for example, the flag layer groups 21, 23, 25 have a configuration in which three flag layers are stacked. Yes. Specifically, the flag layer group 21 includes an Al _y1a Ga _{1 -y1a} N layer 21a, an Al _y1b Ga _{1 -y1b} N layer 21b, an Al _y1c Ga _{1 -y1c} N layer 21c, and an Al ratio different from each other in composition. have. The flag layer group 23 includes an Al _y2a Ga _{1 -y2a} N layer 23a, an Al _y2b Ga _{1 -y2b} N layer 23b, and an Al _y2c Ga _{1 -y2c} N layer 23c having different Al ratios in the composition. Yes. The flag layer group 25 includes an Al _y3a Ga _{1 -y3a} N layer 25a, an Al _y3b Ga _{1 -y3b} N layer 25b, and an Al _y3c Ga _{1 -y3c} N layer 25c having different Al ratios in the composition. .

Each of the flag layers 21a to 21c, 23a to 23c, and 25a to 25c has a film thickness of 0.5 nm. For this reason, in each of the flag layer groups 21, 23, and 25, the position of the flag layer has periodicity. Each of the flag layer groups 21, 23, 25 has a total thickness of 1.5 nm, and the Al _x1 Ga _1-x1 N layer 22 between the flag layer group 21 and the flag layer group 23. The Al _x2 Ga _1-x2 N layer 24 between the flag layer group 23 and the flag layer group 25 has a thickness of 1 nm. For this reason, the position of each flag layer group of the plurality of flag layer groups 21, 23, 25 also has periodicity.

In each composition of each flag layer, y1a, y2a and y3a are, for example, 0.1, y1b, y2b, and y3b are, for example, 0.12, and y1c, y2c, and y3c are, for example, 0.14. Thus, in each of the flag layer groups 21, 23, and 25, the flag layer closer to the electron transit layer 3 has a higher Al ratio in the composition ratio. In the composition of the second layer, x1, x2 and x3 are, for example, 0.25. Thereby, for example, each flag layer becomes opaque with respect to a He—Cd laser having a wavelength of 325 nm, and the Al _x1 Ga _{1 -x1} N layer 22, the Al _x2 Ga _{1 -x2} N layer 24 and the Al _x3 Ga forming the second layer. Each of the _1-x3 N layers 26 is transparent.

The film thickness of the Al _x3 Ga _1-x3 N layer 26 is, for example, 20 nm.
In each formation part of the gate electrode 15, the source electrode 19 and the drain electrode 19, holes 13 and 14 are formed in the multilayer structure of the electron supply layer. The hole 13 is formed so as to penetrate the Al _x3 Ga _{1 -x3} N layer 26 and the flag layer group 25 and reach the Al _x2 Ga _{1 -x2} N layer 24. The hole 14 includes an Al _x3 Ga _1-x3 N layer 26, a flag layer group 25, an Al _x2 Ga _1-x2 N layer 24, a flag layer group 23, an Al _x1 Ga _1-x1 N layer 22 and an Al _y1c Ga _1- It is formed so as to reach the _Al y1b Ga _1-y1b N layer 21b through the _Y1C N layer 21c. The hole 14 is formed so as not to penetrate the flag layer group 21, that is, to have a bottom surface in the flag layer group 21.

  The gate electrode 15 is formed so as to fill the hole 13. Each of the source electrode 19 and the drain electrode 19 is formed so as to fill the hole 14. Thereby, the remaining film thickness of the electron supply layer under the gate electrode 15 is 5 nm, and the remaining film thickness of the electron supply layer under each of the source electrode 19 and the drain electrode 19 is 1 nm.

  Since the configuration other than the above is substantially the same as the configuration of the first embodiment, the same elements are denoted by the same reference numerals and the description thereof is omitted.

Next, a method for manufacturing the semiconductor device of the present embodiment will be described.
13 to 21 are schematic cross-sectional views showing the method of manufacturing the semiconductor device according to the second embodiment of the present invention in the order of steps. FIG. 13B is a partially enlarged sectional view showing the electron supply layer portion of FIG. FIG. 20B is a partially enlarged sectional view showing a region P2 in FIG.

  Referring to FIGS. 13A and 13B, a buffer layer 2 made of, for example, AlN and GaN and an electron transit layer 3 made of, for example, GaN are sequentially stacked on a substrate 1 made of, for example, silicon. Is done. An electron supply layer is formed on the electron transit layer 3.

In the formation of the electron supply layer, a flag layer group 21, an Al _x1 Ga _1-x1 N layer 22, a flag layer group 23, an Al _x2 Ga _1-x2 N layer 24, The flag layer group 25 and the Al _x3 Ga _1-x3 N layer 26 are sequentially stacked.

In the flag layer group 21, an Al _y1a Ga _{1 -y1a} N layer 21a, an Al _y1b Ga _{1 -y1b} N layer 21b, and an Al _y1c Ga _{1 -y1c} N layer 21c are stacked in order. Is formed. In the flag layer group 23, an Al _y2a Ga _1-y2a N layer 23a, an Al _y2b Ga _1-y2b N layer 23b, and an Al _y2c Ga _1-y2c N layer 23c are sequentially stacked. Is formed. In the flag layer group 25, an Al _y3a Ga _{1 -y3a} N layer 25a, an Al _y3b Ga _{1 -y3b} N layer 25b, and an Al _y3c Ga _{1 -y3c} N layer 25c are stacked in order. Is formed.

Referring to FIG. 14, a photoresist pattern 16 is formed by applying a photoresist 16 on an Al _x3 Ga _{1 -x3} N layer 26 and then exposing and developing. Using the photoresist pattern 16 as a mask, etching is performed on the surface of the electron supply layer exposed from the photoresist pattern 16.

Referring to FIG. 15, the above etching is performed while irradiating light of a predetermined wavelength λ (for example, a He—Cd laser having a wavelength of 325 nm) and observing photoluminescence light from the flag layer of the electron supply layer or etching. And observation of photoluminescence light is repeated many times. With this light irradiation, photoluminescence light is generated from the Al _y3c Ga _1-y3c N layer 25c before or at the beginning of etching, so that photoluminescence light is observed.

Since the Al _x3 Ga _1-x3 N layer 26 is set to x3 = 0.25, it is transparent to, for example, a He—Cd laser having a wavelength of 325 nm. For this reason, no photoluminescence light is generated from the Al _x3 Ga _1-x3 N layer 26.

By the etching described above, holes 13 and 14 are formed in the Al _x3 Ga _{1 -x3} N layer 26 of the electron supply layer, and the holes 13 and 14 are gradually deepened. Eventually, when the holes 13 and 14 penetrate the Al _x3 Ga _{1 -x3} N layer 26 and the Al _y3c Ga _{1 -y3c} N layer 25c begins to be etched, the photoluminescence light from the Al _y3c Ga _{1 -y3c} N layer 25c Strength decreases. When holes 13, 14 through the _Al y3c Ga _1-y3c N layer 25c reaches the _Al y3b Ga _1-y3b N layer 25b, photoluminescence from _Al y3b Ga _1-y3b N layer 25b is observed. Similarly, when holes 13 and 14 reaches the Al _y3a Ga _1-y3a N layer 25a through the _Al y3b Ga _1-y3b N layer 25b, photoluminescence from Al _y3a Ga _1-y3a N layer 25a is observed The Advances etching of Al _y3a Ga _1-y3a N layer 25a, when the lost strength of photoluminescence light from Al _y3a Ga _1-y3a N layer 25a, or If photoluminescence is beginning to be observed from the flag layer group 23 Etching is once stopped.

At this time, the holes 13 and 14 penetrate at least the flag layer group 25 and reach the Al _x2 Ga _{1 -x2} N layer 24. That is, by measuring the photoluminescence light from the flag layer group 25, the etching end point can be detected.

Here, if the Al ratio in the composition of the Al _x2 Ga _1-x2 N layer 24 is increased (that is, if x2 is increased), the etching speed of the Al _x2 Ga _1-x2 N layer 24 is significantly reduced. Therefore, the in-plane uniformity at the bottom surfaces of the holes 13 and 14 can be improved.

Referring to FIG. 16, thereafter, a photoresist 17 is formed in the hole 14. In this state, the surface of the Al _x2 Ga _1-x2 N layer 24 is exposed from the hole 13.

  Referring to FIG. 17, gate electrode conductive layer 15 is formed so as to fill hole 13 and cover resist patterns 16 and 17. Thereafter, the resist patterns 16 and 17 are peeled off by a lift-off method, and the resist patterns 16 and 17 and the gate electrode conductive layer 15 thereon are removed.

Referring to FIG. 18, the gate electrode 15 is formed by leaving the gate conductive layer in hole 13 by the lift-off method described above. Further, the surface of the Al _x2 Ga _{1 -x2} N layer 24 is exposed from the hole 14.

Referring to FIG. 19, resist pattern 18 is formed on Al _x3 Ga _1-x3 N layer 26 and on gate electrode 15 except on hole 14 by using a normal photolithography technique. Using this resist pattern 18 as a mask, the surface of the Al _x2 Ga _{1 -x2} N layer 24 exposed from the photoresist pattern 18 is etched.

Referring to FIGS. 20A and 20B, the etching described above is performed by irradiating light with a predetermined wavelength λ (for example, a He—Cd laser with a wavelength of 325 nm) and observing photoluminescence light from the flag layer group 23. While etching or observation of photoluminescence light is repeated many times. By this light irradiation, photoluminescence light is generated from the flag layer group 23 before or at the beginning of etching, so that photoluminescence light is observed. When the hole 14 passes through the Al _x2 Ga _{1 -x2} N layer 24 and the flag layer group 23 and reaches the Al _x1 Ga _{1 -x1} N layer 22, the uppermost Al _y1c Ga _{1 -y1c} N layer of the flag layer group 21 The photoluminescence light of 21c is observed.

Photoluminescence from the etching of the _Al y1c Ga _1-y1c N layer 21c progresses, when the lost strength of photoluminescence light from _Al y1c Ga _1-y1c N layer 21c, or _Al y1b Ga _1-y1b N layer 21b Etching is stopped when light begins to be observed.

At this time, the hole 14 penetrates at least the Al _y1c Ga _{1 -y1c} N layer 21c and reaches the Al _y1b Ga _{1 -y1b} N layer 21b. That is, the end point of etching can be detected by measuring the photoluminescence light from the flag layer.

Since the Al _x1 Ga _{1 -x1} N layer 22 and the Al _x2 Ga _{1 -x2} N layer 24 are set to x1, x2 = 0.25, they are transparent to, for example, a He-Cd laser having a wavelength of 325 nm. . Therefore, no photoluminescence light is generated from the Al _x1 Ga _{1 -x1} N layer 22 and the Al _x2 Ga _{1 -x2} N layer 24.

  Referring to FIG. 21, source / drain electrode conductive layer 19 is formed so as to fill hole 14 and cover resist pattern 18. Thereafter, the resist pattern 18 is peeled off by a lift-off method, and the resist pattern 18 and the source / drain electrode conductive layer 19 thereon are removed.

  Referring to FIG. 11, by the lift-off method described above, source / drain conductive layers in holes 14 are left to form source electrode 19 and drain electrode 19. Thereby, the semiconductor device of the present embodiment is manufactured.

  According to the present embodiment, when the holes 13 and 14 are formed in the formation portion of the gate electrode 15, the source electrode 19 and the drain electrode 19, the photoluminescence light from the flag layers 9 and 11 is observed to observe the holes 13 and 14. The formation depth of 14 can be accurately controlled.

Further, since the Al _x2 Ga _1-x2 N layer 24 having a composition different from that of the flag layer group 25 is below the flag layer group 25, the hole 13 penetrates the flag layer group 25 and the Al _x2 Ga _1-x2 N layer 24. It becomes possible to slow down the formation speed of the hole 13 from the moment of reaching, and the control of the formation depth of the hole 13 becomes more accurate.

The _Al y1c Ga _1-y1c for N layer _21c Al y1b Ga _1-y1b N layer 21b of a different composition than the are under the _Al y1c Ga _1-y1c N layer 21c, holes 14 _Al y1c Ga _1-y1c N The formation speed of the hole 14 can be reduced from the moment when the layer 21c passes through the layer 21c and reaches the Al _y1b Ga _{1 -y1b} N layer 21b, and the formation depth of the hole 14 can be controlled more accurately.

(Embodiment 3)
In the present embodiment, the configuration of an etching apparatus will be described as a manufacturing apparatus used for etching in the manufacturing methods of the first and second embodiments.

  FIG. 22 is a schematic sectional view showing a first example of the configuration of the etching apparatus. Referring to FIG. 22, the etching apparatus has an etchant chamber 31, a light source 32, and a light receiver 33. The light source 32 is, for example, a He—Cd laser device having a wavelength of 325 nm, and is disposed in the etchant chamber 31 so that the light 40 emitted from the light source 32 can be irradiated onto the sample. The light receiver 33 is a photodiode, for example, and is disposed in the etchant chamber 31 so as to receive the photoluminescence light 41 from the flag layer included in the sample 30.

  A plurality of light sources 32 are arranged, and a plurality of light receivers 33 are also arranged corresponding to each of the plurality of light sources 32. Each of the plurality of light sources 32 is disposed immediately above the sample (wafer) 30. Each of the plurality of light receivers 33 is also disposed immediately above the sample (wafer) 30.

  As described above, by arranging the light source 32 and the light receiver 33 in the etching apparatus, the photoluminescence light 41 from the flag layer included in the sample 30 can be observed. Thereby, holes for forming the gate electrode, the source electrode, and the drain electrode can be formed with good controllability by etching.

  The light receiver 33 may be a photodiode, but in this case, the wavelength of the photoluminescence light from the flag layer is unknown. Therefore, if a spectroscope and a CCD are used as the light receiver 33, the wavelength of the photoluminescence light from the flag layer can be observed, and if a flag layer having a different Al ratio in the composition is used, the type of the flag layer is discriminated. Can do.

  Further, the etching apparatus may include a movable mirror 34 as a mechanism for changing (scanning) the irradiation direction of the light 40 emitted from the light source 32 as shown in FIG.

  The etching apparatus may have a light source 32 and a movable mirror 34 outside the etchant chamber 31 as shown in FIG. In this case, the light 40 emitted from the light source 32 and scanned by the mirror 34 passes through the window 35 provided in the etchant chamber 31 and is irradiated to the sample 30.

  The etching apparatus may have an optical fiber 36 as shown in FIG. In this case, by drawing the optical fiber 36 from the inside of the etchant chamber 31 to the outside, the photoluminescence light is guided to the external light receiver (the spectroscope 37 and the CCD 38). The optical fiber 36 is preferably drawn from the inside of the etchant chamber 31 to the outside by being stretched upward from the sample 30.

  The etching apparatus may have an optical fiber 39 as shown in FIG. In this case, by inserting the optical fiber 39 from the outside to the inside of the etchant chamber 31, the light emitted from the light source 32 outside is guided to the inside of the etchant chamber 31 so as to irradiate the sample 30.

  In the above embodiment, the case where the electron supply layer has a laminated structure of a transparent layer and a flag layer with respect to light having a predetermined wavelength λ has been described. However, the electron supply layer emits light having a predetermined wavelength λ. On the other hand, it may have a laminated structure composed of only opaque layers.

  In the above embodiment, the layer functioning as an etching stopper layer when etching the electron supply layer may be AlN.

  In the above embodiment, the flag layer is a layer that functions as an electron supply layer and is opaque to light having a predetermined wavelength λ (for example, a He—Cd laser). Further, the function as the electron supply layer is to have a band gap energy that is hetero-bonded with the electron transit layer and larger than that of the electron transit layer.

  In the above embodiment, the electron supply layer is a layer above the electron transit layer, but when the electron supply layer has a GaN multilayer structure (for example, an AlN / GaN multilayer film), The GaN layer in the multilayer film is also regarded as a part of the electron supply layer.

  In the above embodiment, the case where the thickness of the electron supply layer under the gate electrode 15 is larger than the thickness of the electron supply layer under the source electrode 19 and the drain electrode 19 has been described. The thickness of the electron supply layer may be smaller than the thickness of the electron supply layer under the source electrode 19 and the drain electrode 19. When the thickness of the electron supply layer under the gate electrode 15 is larger than the thickness of the electron supply layer under the source electrode 19 and the drain electrode 19, the gate electrode 15 is formed before the source electrode 19 and the drain electrode 19. Will be formed. On the other hand, when the thickness of the electron supply layer under the gate electrode 15 is smaller than the thickness of the electron supply layer under the source electrode 19 and the drain electrode 19, the source electrode 19 and the drain electrode 19 are preceded by the gate electrode 15. Will be formed.

  In the above embodiment, photoluminescence light has been described as the spectrum to be observed. This photoluminescence light is light generated from a semiconductor layer excited by a light source (for example, a laser light source). Since the wavelength of the photoluminescence light is determined by the band gap of the generated semiconductor layer, when a plurality of semiconductor layers having different band gaps are stacked, it can be specified from which layer the light is generated.

  However, in the present invention, the spectrum to be observed is not limited to photoluminescence light, but may be, for example, a reflection spectrum, or may be scattered light in a broad sense. Moreover, the shape of the observed spectrum may be different, or the temporal change may be different. The wavelength λ used for the light source need not be a single wavelength light source. In short, it is only necessary to determine the flag layer without changing the gist of the present invention.

In the above embodiment, the case where the layer constituting the multilayer structure of the electron supply layer is the Al _x Ga _1-x N layer has been described, but the Al _x In _y Ga _1-xy N layer to which In is added is used. There may be.

  In the above embodiment, the He-Cd laser has been described as the light of the predetermined wavelength λ, but other than this, a solid laser (YLF (Yttrium Lithium Fluoride), YAG (Yttrium Aluminum Garnet), YV04 (Yttrium Vanadate)) ), A semiconductor laser or the like may be used. Further, since the energy of the oscillation wavelength only needs to be larger than the band gap of GaN, the second harmonic can be used. The light source used may not be a single wavelength light source, and the light used may not be a laser, but may be a white light source and has a band band.

  The embodiment disclosed this time should be considered as illustrative in all points and not restrictive. The scope of the present invention is defined by the terms of the claims, rather than the description above, and is intended to include any modifications within the scope and meaning equivalent to the terms of the claims.

  The present invention can be particularly advantageously applied to a semiconductor device having a gate electrode, a source electrode, and a drain electrode, a manufacturing method thereof, and a manufacturing apparatus used therefor.

1 is a cross sectional view schematically showing a configuration of a semiconductor device in a first embodiment of the present invention. It is a schematic sectional drawing which shows the 1st process of the manufacturing method of the semiconductor device in Embodiment 1 of this invention. It is a schematic sectional drawing which shows the 2nd process of the manufacturing method of the semiconductor device in Embodiment 1 of this invention. It is a schematic sectional drawing which shows the 3rd process of the manufacturing method of the semiconductor device in Embodiment 1 of this invention. It is a schematic sectional drawing which shows the 4th process of the manufacturing method of the semiconductor device in Embodiment 1 of this invention. It is a schematic sectional drawing which shows the 5th process of the manufacturing method of the semiconductor device in Embodiment 1 of this invention. It is a schematic sectional drawing which shows the 6th process of the manufacturing method of the semiconductor device in Embodiment 1 of this invention. It is a schematic sectional drawing which shows the 7th process of the manufacturing method of the semiconductor device in Embodiment 1 of this invention. It is a schematic sectional drawing which shows the 8th process of the manufacturing method of the semiconductor device in Embodiment 1 of this invention. It is a schematic sectional drawing which shows the 9th process of the manufacturing method of the semiconductor device in Embodiment 1 of this invention. It is sectional drawing which shows schematically the structure of the semiconductor device in Embodiment 2 of this invention. It is a partial expanded sectional view which expands and shows the area | region P1 of FIG. It is a schematic sectional drawing which shows the 1st process of the manufacturing method of the semiconductor device in Embodiment 2 of this invention. It is a schematic sectional drawing which shows the 2nd process of the manufacturing method of the semiconductor device in Embodiment 2 of this invention. It is a schematic sectional drawing which shows the 3rd process of the manufacturing method of the semiconductor device in Embodiment 2 of this invention. It is a schematic sectional drawing which shows the 4th process of the manufacturing method of the semiconductor device in Embodiment 2 of this invention. It is a schematic sectional drawing which shows the 5th process of the manufacturing method of the semiconductor device in Embodiment 2 of this invention. It is a schematic sectional drawing which shows the 6th process of the manufacturing method of the semiconductor device in Embodiment 2 of this invention. It is a schematic sectional drawing which shows the 7th process of the manufacturing method of the semiconductor device in Embodiment 2 of this invention. It is a schematic sectional drawing which shows the 8th process of the manufacturing method of the semiconductor device in Embodiment 2 of this invention. It is a schematic sectional drawing which shows the 9th process of the manufacturing method of the semiconductor device in Embodiment 2 of this invention. It is a schematic sectional drawing which shows the 1st example of a structure of an etching apparatus. It is a schematic sectional drawing which shows the 2nd example of a structure of an etching apparatus. It is a schematic sectional drawing which shows the 3rd example of a structure of an etching apparatus. It is a schematic sectional drawing which shows the 4th example of a structure of an etching apparatus. It is a schematic sectional drawing which shows the 5th example of a structure of an etching apparatus. It is a schematic sectional drawing which shows the 6th example of a structure of an etching apparatus.

Explanation of symbols

1 substrate, 2 buffer layer, 3 electron travel layer, 8 Al _x1 Ga _1-x1 N layer, 9,11 flag layer, 10 Al _x2 Ga _1-x2 N layer, 12 Al _x3 Ga _1-x3 N layer, 13, 14 hole, 15 gate electrode, 16, 17, 18 photoresist pattern, 19 source electrode, drain electrode, 21, 23, 25 flag layer group, 21a Al _y1a Ga _1-y1a N layer, 21b Al _y1b Ga _1-y1b N Layer, 21c Al _y1c Ga _1-y1c N layer, 22 Al _x1 Ga _1-x1 N layer, 23a Al _y2a Ga _1-y2a N layer, 23b Al _y2b Ga _1-y2b N layer, 23c Al _y2c Ga _1-y2c N layer Layer, 24 Al _x2 Ga _1-x2 N layer, 25a Al _y3a Ga _1-y3a N layer, 25b Al _y3b Ga _1-y3b N layer, 25c Al _y3c Ga _1-y3c N layer, 26 Al _x3 Ga _1-x3 N Layer, 30 samples, 31 etchant chamber, 32 light source, 33 light receiver, 34 mm Chromatography, 35 window, 36 and 39 optical fibers, 37 spectrometer.

Claims (12)

A semiconductor device having a gate electrode, a source electrode and a drain electrode,
An electron transit layer made of GaN;
Al _x In _y Ga _1-xy N layer (0 ≦ x ≦ 1, 0 ≦ y ≦ 1, 0 ≦ x + y) bonded to the electron transit layer and having a larger band gap energy than the electron transit layer. An electron supply layer having a multilayer structure of ≦ 1),
The multilayer structure includes a first layer opaque to light of a predetermined wavelength λ, and a second layer having a composition different from that of the first layer,
The first layer generates photoluminescence light for detecting an etching end point by being irradiated with light having the predetermined wavelength λ.
In the formation portion of at least one of the gate electrode, the source electrode, and the drain electrode, the first layer from the surface opposite to the electron transit layer side of the electron supply layer toward the second layer A hole extending inside is formed ,
The first layer includes a plurality of flag layers, and each of the plurality of flag layers has a composition of Al _x In _y Ga _{1 -xy} N, and x is different from each other,
A semiconductor device having periodicity at each position of the plurality of flag layers . 2. The semiconductor device according to claim 1 , wherein each of the plurality of flag layers each having a periodicity in position is taken as one set, and the first layer includes a plurality of sets of the one set of flag layers. The semiconductor device according to claim 2 , wherein each set of the plurality of sets of flag layers has periodicity. 4. The semiconductor according to claim 3 , wherein the flag layer in each of the plurality of sets of flag layers has a larger x in the composition of Al _x In _y Ga _1-xy N as the flag layer is closer to the electron transit layer. apparatus. Said holes, said first formed to a layer of through reaching the second layer, the semiconductor device according to any one of claims 1-4. Said holes, said first inside the layer is formed to have a bottom surface, the semiconductor device according to any one of claims 1-4. The semiconductor device according to claim 6 , wherein a layer having the largest x in the composition of Al _x In _y Ga _{1 -xy} N among the electron supply layers is exposed at a bottom surface of the hole. A method of manufacturing a semiconductor device having a gate electrode, a source electrode, and a drain electrode,
Forming an electron transit layer made of GaN;
Al _x In _y Ga _1-xy N layer (0 ≦ x ≦ 1, 0 ≦ y ≦ 1, 0 ≦ x + y) bonded to the electron transit layer and having a larger band gap energy than the electron transit layer. A step of forming an electron supply layer having a multilayer structure of ≦ 1),
The multilayer structure is formed to include a first layer that is opaque to light having a predetermined wavelength λ, and a second layer having a composition different from that of the first layer, and the gate electrode, In the formation part of at least one of the source electrode and the drain electrode, a hole extending in the first layer from the surface opposite to the electron transit layer side of the electron supply layer toward the second layer Comprising a step of forming by etching;
Detecting the end point of etching by measuring the photoluminescence light generated from the first layer by irradiating light of the predetermined wavelength λ at the time of forming the hole ,
The first layer includes a plurality of flag layers, and each of the plurality of flag layers is formed such that x is different from each other in the composition of Al _x In _y Ga _{1 -xy} N, and each of the plurality of flag layers A method for manufacturing a semiconductor device, which is formed so as to have periodicity in the position of A manufacturing apparatus used for etching for forming the hole in the method for manufacturing a semiconductor device according to claim 8 ,
The manufacturing apparatus provided with the light source which emits the light of the said predetermined wavelength (lambda) for generating the said photo-luminescence light only in the said 1st layer. The manufacturing apparatus according to claim 9 , further comprising a light receiver for receiving photoluminescence light generated in the first layer. The manufacturing apparatus according to claim 10 , further comprising an optical fiber for guiding the photoluminescence light generated in the first layer to the light receiver. The manufacturing apparatus according to claim 11 , wherein the optical fiber is extended above an object to be processed including the electron transit layer and the first and second layers.

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