JP5152165B2 - Inspection method of silicon wafer - Google Patents

Description

The present invention relates to a technique suitable for use in a silicon wafer inspection method and apparatus mainly by a CZ (Czochralski) method by a copper precipitation method (Cu precipitation method) which is a defect evaluation method for semiconductor wafers.

Patent Document 1 discloses copper deposition as a method for accurately measuring an area where agglomerates of vacancy-type point defects are present on a silicon wafer instead of using a laser scattering particle counter (LSPC). Cite the law. This method is sensitive and useful even at about 0.06 μm or less, which is below the detection limit of LSPC.

However, inspection of wafers made from crystals grown under complete crystal growth conditions without the presence of vacancy-type point defect aggregates (inspection for presence of minute vacancy-type defect aggregates not detected by LSPC) When used in the above, the density of vacancy-type point defect aggregates is low, and the boundary with the complete crystal region where no aggregates are present is less clear than in conventional crystals. Therefore, it is necessary to increase inspection accuracy, and precise control of copper deposition sensitivity is required. In addition, since the existence of conditions that cause copper deposition that is not defective due to abnormal breakdown of the oxide film has been found, it is necessary to consider the conditions in order to perform the inspection accurately. This phenomenon is important because it is remarkable in the case of inspection of a complete crystal wafer.

Japanese Patent No. 3241296 JP-A-8-261957 JP 2000-91172 A JP 2002-83853 A

In the copper deposition method, the dummy wafer is processed and copper ions are eluted in methanol from the upper electrode made of pure copper before performing the copper deposition of the wafer that is the sample to be inspected. It was sufficient to manage with the conditions of dummy processing in the method.
However, it has been found that there is a problem that the reproducibility of inspection results is poor when high inspection accuracy is required, such as inspection of a complete crystal wafer.
In the conventional method, the illuminance at the time of copper deposition has not been controlled. When evaluating conventional crystals, the detection sensitivity did not change even when the illuminance was different. However, when high inspection accuracy is required, such as inspection of a complete crystal wafer, the reproducibility of the inspection results It turns out that there is a problem of lack.
In the conventional method, when a complete crystal wafer is inspected, the number of copper precipitates may be higher than that of a defective wafer even though it is a complete crystal, and the inspection result is unstable.

The present invention has been made in view of the above circumstances, and intends to achieve the following object.
1. To cope with the required accuracy improvement of wafer inspection.
2. To improve the stability and reproducibility of evaluation in inspection.
3. Inspect multiple wafers with the same methanol solution and be able to carry out with the same sensitivity.

The method for inspecting a silicon wafer according to the present invention is a method for condensing minute void-type defects of 0.06 μm or less in a silicon wafer prepared from a crystal grown under a complete crystal growth condition in which no agglomerates of hole-type point defects exist. An inspection method for the presence or absence of aggregates,
In a copper deposition apparatus having upper and lower electrodes, the silicon wafer on which a surface insulating film is formed is mounted, an electrolyte solution is injected into the deposition apparatus, and an external voltage is applied to the upper and lower electrodes, In the method of inspecting the crystal defects on the surface of the silicon wafer by a copper deposition method of depositing copper on the defect site of the wafer,
The copper deposition method includes forming an insulating film as an oxide film having a thickness in the range of 25 to 150 nm on the top surface of the bare wafer, peeling the oxide film on the back surface of the wafer, and near the surface of the wafer. And the step of precipitating copper on the defect site by dielectric breakdown of the insulating film on the defect site formed in,
The step of performing the copper deposition includes mounting a dummy wafer in a container-shaped copper deposition apparatus including upper and lower plates made of copper to which an external voltage can be applied, and sidewalls, and the deposition. Injecting a solvent into the apparatus, applying an external voltage to the upper plate and the lower plate on which the dummy wafer is mounted, performing a dummy process for eluting copper ions, and desorbing the dummy wafer from the copper deposition apparatus Mounting a target wafer in the copper deposition apparatus, and applying an external voltage to the upper and lower plates to deposit copper on a defective portion of the target wafer,
The amount of light applied to the silicon wafer for setting the generation amount of electron-hole pairs generated in the silicon layer to a predetermined state;
Set a resistance value between the upper electrode and the lower electrode of the electrolyte solution,
While performing the copper deposition treatment in a state where the effective electric field applied to the insulating film is set in a range of 3 to 6 MV / cm to avoid copper deposition due to abnormal dielectric breakdown not caused by defects,
When performing a plurality of treatments with the same electrolyte solution, the variation in the electrolyte solution resistance value is set within 5%, and the amount of light applied to the silicon wafer is set constant, and the wafer is irradiated. As a light source to make the light illuminance constant, a monochromatic light source with energy more than that required to generate electron-hole pairs in silicon is used to manage by light quantity, and the unit of electron-hole pairs per unit time per unit volume By controlling the amount of generation, the resistance value of the depletion layer that appears through the inversion layer, which is a low resistance layer, immediately below the thermal oxide film on the wafer surface when an external voltage is applied to the upper and lower plates is managed. This solved the above problem.
In the present invention, the electrolyte solution resistance value is maintained constant during each inspection through a plurality of inspections. When the electrolyte solution resistance value is too low, a new solution is added, and the electrolyte solution resistance When the value is too high, the dummy process is added to adjust the value to a predetermined value range, and the variation of the electrolyte solution resistance value can be set within 5% .
In the present invention, a voltage obtained by subtracting a voltage drop due to the electrolyte solution resistance value from the voltage applied between the upper and lower plates is applied to the resistance value of the oxide film and the resistance value of the depletion layer. Thus, the effective electric field (voltage applied to the oxide film / oxide film thickness), which is the ratio between the thickness of the oxide film and the applied voltage, reduces the resistance of the depletion layer, which is a condition for causing abnormal dielectric breakdown, to 0. In such a case, the maximum value may be controlled so as not to exceed 6 MV / cm.

In the method for inspecting a silicon wafer according to the present invention, a silicon wafer on which a surface insulating film is formed is mounted in a copper deposition apparatus having upper and lower electrodes (plates), and an electrolyte solution is injected into the deposition apparatus, In the copper deposition method in which an external voltage is applied to the upper and lower electrodes (plates), and copper is deposited on the defective portion of the wafer,
The above problem was solved by performing the copper deposition treatment in a state where the resistance value between the upper electrode and the lower electrode of the electrolyte solution (methanol solution containing copper ions) was set to a predetermined value.
In the method for inspecting a silicon wafer according to the present invention, a silicon wafer on which a surface insulating film is formed is mounted in a copper deposition apparatus having upper and lower electrodes (plates), and an electrolyte solution is injected into the deposition apparatus, In the copper deposition method in which an external voltage is applied to the upper and lower electrodes (plates), and copper is deposited on the defective portion of the wafer,
The copper deposition process is performed with the amount of electron-hole pairs generated in the silicon layer set to a predetermined state by setting the amount of light (illuminance) applied to the silicon wafer to a predetermined range. The above problem was solved.
In the method for inspecting a silicon wafer according to the present invention, a silicon wafer on which a surface insulating film is formed is mounted in a copper deposition apparatus having upper and lower electrodes (plates), and an electrolyte solution is injected into the deposition apparatus, In the copper deposition method in which an external voltage is applied to the upper and lower electrodes (plates), and copper is deposited on the defective portion of the wafer,
A resistance value between the upper electrode and the lower electrode of the electrolyte solution (methanol solution containing copper ions);
The amount of light (illuminance) applied to the silicon wafer for setting the generation amount of electron-hole pairs generated in the silicon layer to a predetermined state,
Set the applied voltage to be applied between the upper electrode and the lower electrode,
The above problem has been solved by performing the copper deposition treatment in a state where the effective electric field applied to the insulating film is set in a range in which copper deposition due to abnormal dielectric breakdown not caused by defects is avoided.
In the present invention, it is also possible to employ means for setting an effective electric field applied to the insulating film in a range of 6 MV / cm or less.
The silicon wafer inspection apparatus of the present invention is a copper deposition apparatus for injecting an electrolyte solution by mounting a silicon wafer having a surface insulating film formed therein,
A copper deposition inspection apparatus having upper and lower electrodes for applying an external voltage to deposit copper on a defective portion of the wafer,
When the copper deposition process is performed, the above-mentioned problem is solved by enabling the resistance value between the upper electrode and the lower electrode of the electrolyte solution to be set to a predetermined value.
The silicon wafer inspection apparatus of the present invention is a copper deposition apparatus for injecting an electrolyte solution by mounting a silicon wafer having a surface insulating film formed therein,
A copper deposition inspection apparatus having upper and lower electrodes for applying an external voltage to deposit copper on a defective portion of the wafer,
When performing copper deposition, the amount of electron-hole pairs generated in the silicon layer can be set to a predetermined state by setting the amount of light (illuminance) applied to the silicon wafer to a predetermined range. As a result, the above-mentioned problems have been solved.
The silicon wafer inspection apparatus of the present invention is a copper deposition apparatus for injecting an electrolyte solution by mounting a silicon wafer having a surface insulating film formed therein,
A copper deposition inspection apparatus having upper and lower electrodes for applying an external voltage to deposit copper on a defective portion of the wafer,
When performing copper deposition treatment,
A resistance value between the upper electrode and the lower electrode of the electrolyte solution;
The amount of light (illuminance) applied to the silicon wafer for setting the generation amount of electron-hole pairs generated in the silicon layer to a predetermined state,
Set the applied voltage to be applied between the upper electrode and the lower electrode,
The above problem has been solved by making it possible to set the effective electric field applied to the insulating film within a range that avoids copper precipitation due to abnormal dielectric breakdown not caused by defects.
In the present invention, it is preferable that an effective electric field applied to the insulating film can be set in a range of 6 MV / cm or less.

The copper deposition method according to the present invention includes a step of forming an insulating film having a predetermined thickness on the top surface of a bare wafer, a step of peeling an oxide film on the back surface of the wafer, and a defect site formed near the surface of the wafer. And subjecting the upper insulating film to dielectric breakdown to deposit copper at the defect site. Here, the insulating layer may be an oxide layer formed by thermal oxidation, and the step of depositing copper is performed by applying a voltage to the upper and lower portions of the wafer after placing the wafer in a specific electrolyte solution. This is preferably performed by adjusting the thickness of the insulating film and the strength of the voltage.

On the other hand, the step of removing the oxide film on the back surface of the wafer is performed only on a part of the back surface of the wafer, and the working time can be shortened, preferably using HF vapor.

Meanwhile, more specifically, the step of depositing copper may be performed by placing a dummy wafer in a container-shaped copper deposition apparatus including upper and lower plates made of copper to which an external voltage can be applied and sidewalls. Mounting a dummy wafer), injecting a solvent into the deposition apparatus, applying an external voltage to the upper and lower plates to elute copper ions, and removing the dummy wafer from the copper deposition apparatus. A desorption step; a step of mounting a target wafer in the copper deposition apparatus; and a step of applying an external voltage to the upper and lower plates to deposit copper on a defective portion of the target wafer. is there.

It is preferable to use a dummy wafer having an oxide film formed on the upper surface thereof and use methanol as a solvent for the electrolyte solution.
The voltage applied to the upper and lower plates in the step of eluting the copper ions is in the range of 10 to 200V, and the strength of the voltage applied to the upper and lower plates in the step of depositing the copper. As described later, the effective electric field applied to the insulating film is set to 6 MV / cm or less, more preferably in the range of 3 to 6 MV / cm.

The inventors of the present application have examined and investigated factors related to the stability of the inspection in accordance with the demand for further inspection accuracy.

As for the voltage applied to the oxide film, the applied voltage applied between the upper and lower electrodes is the resistance value Rm ′ of the methanol solution M, the resistance value R of the insulating film (thermal oxide film) 34, and the movement existing under the insulating film 34. The voltage is divided and determined by the resistance value Rh of the depletion layer (depletion region) 32 (p-type only) having no charge (see FIG. 1).
On the other hand, the dielectric breakdown of the oxide film 34 is determined by the effective electric field (voltage applied to the oxide film / oxide thickness) applied to the oxide film, as can be understood from the oxide film dielectric breakdown inspection using the polysilicon electrode. Therefore, it was foreseen that highly accurate inspection would be possible if the voltage applied to the oxide film 34 was controlled to be constant.
In order to realize this, the present invention performs management such that the resistance value Rm ′ of the methanol solution M and the resistance value of the depletion region Rh become constant.

<Management of methanol resistance>
In the conventional method that manages under the conditions of the dummy process, the methanol solution M is adjusted 10 times, and the variation of the methanol resistance value Rm (hereinafter referred to as the methanol resistance value) between the upper electrode (copper electrode) 12 and the lower electrode 10 is examined. It was.
As a result, a variation of about 15% was observed in the CV value (standard deviation / average value).
Further, a ratio of the average value of the methanol resistance value Rm and the current value flowing between the upper and lower electrodes 10 and 12 during copper deposition (the resistance value of the oxide film 34) R + (the resistance value of the depletion region 32) Rh ( It was found that the resistance value of methanol / the resistance value of the oxide film and the depletion layer) = (Rm / R + Rh) was 0.13. Although the resistance of the oxide film 34 is usually on the order of GΩcm ² or more, in fact, when copper is deposited, the FN current flows and the resistance value decreases to ^two MΩcm ² units. It turned out that there was no difference.
Note that the FN (Fowler-Nordheim) current refers to a tunnel leakage current that flows when a high voltage is applied to an oxide film that is an insulating film.

From this, it was found that since the variation in the resistance value of methanol greatly affects the effective electric field applied to the oxide film 34, it is necessary to strictly manage the methanol resistance value Rm.

As a management method of the methanol resistance value Rm, if the methanol resistance value Rm is too low, add a new solution, and if the methanol resistance value Rm is too high, add a copper ion elution treatment to the range of the management value. Adjustments were made. Specifically, the methanol resistance value Rm was measured, and after adjusting by the above method, it was confirmed that it was within the control value, and then the copper deposition treatment was performed. It turns out that it is easy to control within 5% of the control value if you are familiar with the adjustment work.
Here, it is preferable to set the methanol resistance value Rm within 5% of the predetermined control value.
Further, it has been found that if this method is used, a plurality of times of copper deposition treatment with the same methanol solution M can be carried out with the same sensitivity without change over time.

The factor that determines the methanol resistance value Rm is mainly the copper ion Cu ²⁺ concentration, but it is expected that ions generated by electrolysis of methanol as a solvent or water dissolved from the atmosphere will also affect the methanol resistance value Rm. Is done. However, if the methanol resistance value Rm between the upper and lower electrodes 10 and 12 is managed, the effective electric field applied to the oxide film 34 becomes constant, so that the sensitivity of the oxide film dielectric breakdown is determined.
Since the copper deposition is caused by a leakage current flowing through the dielectric breakdown point of the oxide film 34, the number of copper deposition points 40 is determined regardless of the copper ion concentration. Therefore, it was found that if the methanol resistance value Rm is managed, the inspection result is not affected even if there is some variation in the copper ion concentration, and a highly accurate evaluation can be performed.

Patent Document 4 describes that the copper ion concentration is managed by conductivity so as to be a certain value or more. In such conductivity management, Teflon ( A change in the distance between the upper electrode (copper electrode) 12 and the wafer 30 due to a change in the size of a copper deposition tank composed of a registered trademark or the like becomes an error factor for a voltage drop in methanol.
If the methanol resistance value Rm is directly controlled between the upper electrode 12 and the lower electrode 10 as in the present invention, the voltage drop in methanol becomes constant even if the distance between the upper and lower electrodes changes. This method is superior to conductivity management.

<Management of illuminance>
In the present invention, the accuracy of the inspection has been improved by the management of the resistance value Rm of methanol, but it has been found that when the above inspection method is performed at different locations, there is a problem that a difference occurs between the inspection results of both. As a result of investigating the cause, it was found that the ambient illuminance at the time of copper deposition was different.
The resistance value of the depletion layer 32 is determined by the semiconductor theory that it is determined by the generation amount of electron-hole pairs generated in the depletion layer 32 by thermal or light irradiation, thereby eliminating variations in illuminance during copper deposition. This is necessary to stabilize the voltage applied to the oxide film 34. As a result of adjusting and managing the illuminance in this way, the inspection results of the two coincided, and the problem was solved.

Patent Document 2 describes that the amount of deposition is controlled by changing the illuminance because the copper deposition size changes depending on the illuminance. However, in the present invention, the precipitation size hardly changes even when the illuminance is changed. Only changed.

In addition, the inventors of the present application have confirmed with an optical microscope that when the illuminance is low, the copper deposition size becomes small and is not overlooked by visual inspection. The above-mentioned patent document is an application as a defect position detection method by TEM observation, where the applied voltage is small, the amount of flowing current is six orders of magnitude less than the copper deposition of the present invention, and the insulation of the oxide film This is a completely different phenomenon from the present case because the inventors have inferred the difference in the form of copper ions in methanol as a cause of the difference in the amount of adhesion depending on the illuminance, under conditions that do not cause destruction.
It can be determined that the number of copper deposits increases / decreases depending on the illuminance, as the illuminance increases, the resistance of the depletion region 32 decreases, and as a result, the voltage applied to the oxide film increases and the dielectric breakdown point increases.

As described above, the illuminance dependence is noticeable in p-type wafers because there is a high-resistance depletion region near the surface under the oxide film during the copper deposition process, but there is a depletion region in the n-type wafer during the copper deposition process. However, since the resistance of the silicon wafer is sufficiently lower than the resistance value of the methanol and the oxide film, the influence of the illuminance is considered to be small. However, since the resistance value of the silicon wafer also theoretically changes depending on the illuminance, it is desirable to manage the illuminance. In particular, in the case of the p-type, in order to perform more precise management, a monochromatic light source having an energy higher than that required for generating electron-hole pairs in silicon is used, and management is performed by the amount of light. It is desirable to manage the generation amount per unit time and the resistance value of the depletion layer more easily than the present invention.

In addition, the importance of managing methanol resistance and illuminance is particularly important when testing complete crystal wafers that have no surface defects, and wafers such as hydrogen anneal, argon anneal, and epitaxial that have a complete surface layer only. It turned out to be important.

That is, it has been found that there is a condition in which abnormal copper deposition occurs when the methanol resistance value Rm decreases or the illuminance increases in a state where the methanol resistance value Rm and the illuminance are not controlled. In the case of a perfect crystal, it has been found that this phenomenon occurs extremely extremely, and it may be misjudged that the quality is lower than that of a defective wafer. As described above, it has been found that if appropriate conditions are not set, copper deposition may occur despite the absence of surface defects.

Although a similar phenomenon is reported in Patent Document 3, it can be determined that it is based on a phenomenon different from the present invention. In Patent Document 3, in the FZ, epi, hydrogen annealing CZ, and IG wafers, when the electric field strength exceeds 5 MV / cm, copper precipitation due to the FN current occurs and the wafer cannot be evaluated. It is described that the condition is set to cm or less. Furthermore, in Patent Document 3, when these types of wafers are subjected to copper deposition under conditions exceeding 5 MV / cm, the oxide film such as CZ wafer is different from copper deposition due to dielectric breakdown, and copper deposition due to FN current occurs. It is disclosed to occur.
However, under the conditions implemented in the present invention, the inventors of the present application have an FN current of 1 μA / cm ² or more flowing even when the effective electric field applied to the oxide film is about 4 to 6 MV / cm. It has been confirmed that it has not occurred. The inventors of the present application have also found a phenomenon in which copper deposition starts due to abnormal dielectric breakdown of the oxide film at about 6 MV / cm or more. This is considered to indicate that the discovery according to the present invention is a phenomenon completely different from the above phenomenon.

For comparison, copper deposition was performed on a wafer made from a crystal with vacancy-type point defect agglomerates slightly out of pulling conditions and a complete crystal wafer under conditions that caused abnormal dielectric breakdown. The part was observed with an optical microscope, but it could not be distinguished by shape whether it was due to defects or abnormal dielectric breakdown.

Furthermore, as a result of detaching copper and the oxide film in order with nitric acid and hydrofluoric acid and observing with a high resolution SEM, 0.1 μm-sized square pyramid-shaped pits were uniformly observed, and the copper deposits were still indistinguishable. It was.
Here, if 0.1 μm sized pits or agglomerates of hole-type point defects are present on the wafer surface or the surface layer, they should be detected by LSPC and LSTD. It is thought that it did not exist. Therefore, it can be concluded that this pit is generated when copper is deposited.

On the other hand, when this complete crystal wafer was subjected to the oxide film dielectric breakdown inspection of the polysilicon electrode, it was confirmed that there was no problem at all, and that only the breakdown considered to be intrinsic breakdown occurred in the TDDB test.

The abnormal dielectric breakdown occurs when the resistance of the depletion region 32 is 0 and the effective electric field applied to the oxide film 34 (voltage applied to the oxide film / oxide film thickness) is greater than about 6 MV / cm. It is thought that.
This is estimated by applying a voltage obtained by subtracting the voltage drop in the methanol solution M from the voltage applied between the upper and lower electrodes 10 and 12 to the oxide film 34 and the depletion region (p-type) 32. is there.

Although it is unlikely that the dielectric breakdown of the oxide film 34 occurs at such a low electric field of about 6 MV / cm, copper ions adhere to the surface of the oxide film 34, which diffuses in the oxide film 34 and has a film quality. This phenomenon suggests the possibility of causing deterioration.

As described above, in the evaluation of the wafer 30 by the copper deposition method, it is important to set the illuminance condition, the methanol resistance condition, and the applied voltage condition between the upper and lower electrodes so as not to cause abnormal copper deposition due to abnormal dielectric breakdown.

As described above, it has been found that the conditions under which abnormal dielectric breakdown occurs cannot be applied to inspection of high quality wafers such as perfect crystal wafers.

Even if the defect density of a wafer made of a conventional crystal is inspected under the condition that an abnormal dielectric breakdown of a complete crystal wafer occurs, the observed copper deposits are observed to be defective or due to abnormal dielectric breakdown. However, it is considered that this condition should not be applied because it is indistinguishable.

It should be noted that a wafer produced from a crystal grown under complete crystal conditions is too small in size for agglomerates of vacancy-type point defects even if the latest LSPC or LSTD is used. Moreover, it is not detected as FPD for the same reason. Currently, the only evaluation methods that can detect agglomerates of vacancy-type point defects are the oxide film dielectric breakdown inspection and the copper deposition method.

The silicon wafer inspection apparatus according to the present invention includes a copper deposition device for injecting an electrolyte solution by mounting a silicon wafer having a surface insulating film formed therein, and applying an external voltage to deposit copper on the defective portion of the wafer. An upper and lower electrode to be deposited;
When performing the copper deposition treatment, the resistance value between the upper electrode and the lower electrode of the electrolyte solution can be set to a predetermined value,
Alternatively, when performing the copper deposition process, the amount of electron-hole pairs generated in the silicon layer is set to a predetermined state by setting the amount of light (illuminance) applied to the silicon wafer to a predetermined range. Being settable,
Alternatively, the silicon for setting the resistance value between the upper electrode and the lower electrode of the electrolyte solution and the amount of electron-hole pairs generated in the silicon layer to a predetermined state when performing copper deposition treatment The amount of light (illuminance) applied to the wafer and the applied voltage applied between the upper electrode and the lower electrode are set, and the effective electric field applied to the insulating film is changed to copper deposition due to abnormal dielectric breakdown not caused by defects. Can be set in a range that avoids,
Furthermore, since the effective electric field applied to the insulating film can be set in a range of 6 MV / cm or less, the above inspection method can be applied.

According to the silicon wafer inspection method and apparatus of the present invention, the following effects can be obtained.
(1) The copper solution is applied to the surface insulating film at the time of copper deposition by performing a copper deposition process with the resistance value between the upper electrode and the lower electrode of the electrolyte solution (a methanol solution containing copper ions) set to a predetermined value. It is possible to make the effective electric field constant and improve the defect inspection accuracy and its stability.
(2) The copper deposition process with the amount of electron-hole pairs generated in the silicon layer set to a predetermined state by setting the amount of light (illuminance) applied to the silicon wafer to a predetermined range. By performing the above, the resistance value of the depletion layer can be set to be constant, thereby stabilizing the effective electric field applied to the insulating film and preventing variations in the inspection result.
(3) A resistance value between the upper electrode and the lower electrode of the electrolyte solution (a methanol solution containing copper ions) and a generation amount of electron-hole pairs generated in the silicon layer are set to a predetermined state. The amount of light (illuminance) applied to the silicon wafer and the applied voltage applied between the upper electrode and the lower electrode are set, and the effective electric field applied to the insulating film is caused by abnormal dielectric breakdown not caused by defects. It is possible to maintain the accuracy of the inspection by performing the copper precipitation process in a state set to a range of 6 MV / cm or less to avoid copper precipitation, and to apply it to inspection of high quality wafers such as perfect crystal wafers. It becomes possible.
(4) The silicon wafer inspection apparatus according to the present invention includes a copper deposition apparatus for injecting an electrolyte solution by mounting a silicon wafer having a surface insulating film formed therein, and applying an external voltage to the defect portion of the wafer. Since the above-described conditions (states) can be set, the inspection method of the present invention can be implemented.

It is a schematic cross section which shows one Embodiment of the inspection method of the silicon wafer which concerns on this invention. It is the schematic which shows one Embodiment of the inspection apparatus of the silicon wafer which concerns on this invention. It is a graph which shows the relationship between the copper precipitation count value and methanol resistance value in the Example of this invention. It is a graph which shows the copper precipitation count value in the Example of this invention, and the relationship of illumination intensity (Sample A: There exists an aggregate of a hole type | mold point defect). It is a graph which shows the copper precipitation count value in the Example of this invention, and the relationship (sample B: perfect crystal) of illumination intensity.

Hereinafter, an embodiment of a silicon wafer inspection method and apparatus according to the present invention will be described with reference to the drawings.

  As the wafer to be inspected in the present embodiment, a bare wafer crystal-grown by the Czochralski method is applied. Wafer cleaning is performed on the wafer in order to remove external contamination sources such as particles existing on the wafer as a pretreatment.

  Subsequently, the wafer is put into a diffusion device such as an electric furnace, and thermal oxidation is performed to form an oxide film on the wafer. The thickness of the thermal oxide film is selected within the range of 25 to 150 nm, and by using such an oxide film, the copper film is continuously formed regardless of the history of the wafer. Precipitation can be achieved satisfactorily.

  Subsequently, in order to secure an electrical path between the lower part of the wafer and the lower electrode during copper deposition described later, the wafer is covered with an insulating film called a thermal oxide film. A part of the film is peeled off. Although the entire backside of the wafer can be peeled off, it is sufficient to ensure a minimum electrical path. Stripping is performed using hydrogen fluoride (HF) vapor.

Next, the wafer is washed with pure water to remove residues such as etching gas.
Thereafter, copper is deposited on the target wafer on which the oxide film is formed.

The inspection apparatus in the present embodiment is a copper deposition apparatus for performing copper deposition. This inspection apparatus includes a lower plate (electrode plate) made of gold-plated copper as shown in FIGS. ) 10 and an upper plate (electrode plate) 12 made of pure copper in which many small holes are formed at equal intervals so that light can be irradiated onto the wafer surface. These plates 10 and 12 are predetermined by spacers 16. And a side wall portion 14 surrounding the plates 10 and 12 in plan view, and a predetermined space is formed in the interior thereof, and this space is a wafer seating portion on which a wafer is placed. 20
Connection terminals are connected to the lower plate 10 and the upper plate 12, respectively, and a voltage is variably applied to the upper and lower plates by an external power source 18.

  The wafer seating portion 20 is configured as a space sufficient to put in and out the wafer. The side wall 14 and the spacer 16 are made of an insulating material such as Teflon (registered trademark).

  Hereinafter, the steps of the silicon wafer inspection method according to this embodiment will be described.

First, a dummy wafer is mounted on the lower plate 10 in the copper deposition apparatus shown in FIG. A dummy wafer having an oxide film with a thickness of 50 nm is used. The dummy wafer is mounted after lifting the upper plate 12 of the copper deposition apparatus.
Subsequently, the upper plate 10 is installed, and methanol, for example, is injected as a solvent for the electrolyte solution into the copper deposition apparatus until the upper plate 10 is submerged.

  Next, a positive voltage is applied to the upper plate 10 made of pure copper immersed in methanol with respect to the lower plate 12 to elute the copper ions into the methanol. In the step of eluting the copper ions, the value of the voltage applied to the upper and lower plates was maintained at 50 V for 30 minutes in the present embodiment.

  Next, after removing and attaching the dummy wafer, the methanol resistance value was adjusted by the above-described method so as to obtain a predetermined resistance value. Subsequently, the wafer to be inspected 30 is mounted in the wafer seating portion 20. As shown in FIG. 1, the wafer 30 has a thermal oxide layer (oxide film) 34 that is an insulating film.

Next, when an external voltage is applied to the upper and lower plates 10 and 12, the inversion layer 33, which is a low resistance layer, is directly below the thermal oxide film 34 on the surface of the substrate 31, and a high resistance depletion region (depletion layer is directly below it). ) 32 appears. At the same time, by applying voltage, copper ions Cu ²⁺ are deposited as precipitated copper 40 on the surface of the wafer 30 at a point 35 where a dielectric breakdown occurs and a low-resistance current path is formed in the oxide film. The strength of the voltage applied between the upper and lower plates 10 and 12 in the stage of depositing the deposited copper 40 is such that the effective electric field applied to the insulating film 34 is 6 MV / cm or less, more preferably 3 to 6 MV / cm, as will be described later. Set to be within the range of.

As described above, when there are crystal defects such as pits on the surface of the wafer 30, a local oxide film 34 seaming phenomenon occurs along the periphery of the defect, and a negative voltage is applied to the lower plate 10. Then, dielectric breakdown of the oxide film 34 occurs at the site where the seaning phenomenon occurs, and the copper cation Cu ²⁺ in the electrolyte solution is reduced by the leak current (electron current) flowing through the site, and the defect site In 35, copper Cu is deposited as deposited copper 40.

  Then, after copper is deposited on the wafer 30 to be inspected in a copper deposition apparatus, an analysis is performed regarding the distribution, density, and the like of defective portions on the wafer.

In this embodiment, the effective electric field applied to the insulating film 34 is set in the above range because the upper electrode 12 of the electrolyte solution (methanol solution containing copper ions Cu ²⁺ ) M A resistance value Rm between the electrodes 10, a resistance value Rh of the silicon layer (depletion layer) 32, and an applied voltage applied between the upper electrode 12 and the lower electrode 10 are set and applied to the insulating film 34. This is because the copper deposition treatment is performed so as to avoid the copper deposition due to the abnormal dielectric breakdown that is not caused by the defects.
Here, since the resistance value Rh of the depletion layer 32 changes according to the amount of electron-hole pairs generated in the depletion region (depletion layer) 32, the silicon wafer is deposited during copper deposition in order to set this. The illuminance of the light L irradiated to 30 is controlled.

  Furthermore, the methanol resistance value Rm is preferably maintained constant during each inspection through a plurality of inspections.

Here, when copper is deposited in a state where the methanol resistance value Rm varies, the resistance value R of the oxide film 34 is not different from the methanol resistance value Rm by about one digit, so that it is applied to the insulating film 34. Therefore, the effective electric field applied to the oxide film 34 is greatly affected, so that the number of oxide film defects causing dielectric breakdown changes and the inspection result is not stable.
In addition, when the voltage applied to the insulating film 34 is not constant, there is a possibility that this effective electric field cannot be controlled within a predetermined range. In this case, the effective electric field applied to the insulating film 34 is a threshold value. There is a possibility that copper deposition resulting from abnormal dielectric breakdown will occur beyond the above, and dielectric breakdown will occur in addition to the defective portion 35 to be inspected, resulting in copper deposition at the failure point and failing to obtain the desired inspection result. Therefore, it is not preferable.

As a management method of the methanol resistance value Rm, when the methanol resistance value Rm is too low, a new solution is added. When the methanol resistance value Rm is too high, a dummy process is added to adjust the range to a predetermined value range. can do. Specifically, the measured value of the methanol resistance value Rm is set to an error (ΔRm / Rm ₀ ) within 5% of the initial value Rm ₀ or (Rm / R + Rh) is about 0.13, for example. It is preferable to set this value within 5%.

  By setting the methanol resistance value Rm constant, it is possible to make the voltage applied to the oxide film 34 constant and improve the inspection accuracy (sensitivity) and its stability.

  Further, by making the illuminance of the light L applied to the wafer 30 constant, the amount of electron-hole pairs generated by light irradiation in the depletion layer 32 can be made constant, so that the illuminance at the time of copper deposition By eliminating the variation, it is possible to set the resistance value Rh of the depletion layer 32 to be constant, whereby the voltage applied to the insulating film 34 can be stabilized. As a result, it is possible to prevent variations in the inspection results.

  Here, in the case of the p-type in particular, in the case of the p-type, a monochromatic light source having energy higher than that necessary for generating electron-hole pairs in silicon is used for more precise management, and management is performed according to the amount of light. It is desirable to manage the generation amount of the hole pair per unit time and to manage the resistance value of the depletion layer 32.

  In addition, by controlling the methanol resistance value Rm and the illuminance, surface defects can be detected when inspection is performed on wafers such as hydrogen annealing, argon annealing, and epitaxial wafers that have no surface defects and that have a complete surface layer only. It is particularly important that copper precipitation can be prevented despite the absence of copper.

  That is, a voltage obtained by subtracting the voltage drop caused by the methanol resistance value Rm ′ from the voltage applied between the upper and lower plates 10 and 12 is applied to the resistance value R of the oxide film 34 and the resistance value Rh of the depletion layer 32. Thus, the effective electric field (voltage applied to the oxide film / oxide thickness) applied to the oxide film 34 is a condition that causes abnormal dielectric breakdown, “maximum when the resistance Rh of the depletion layer 32 is zero. It is possible to control so as not to exceed “about 6 MV / cm”.

If it exceeds about 6 MV / cm, copper ions adhering to the surface of the oxide film may diffuse in the oxide film 34 and the film quality may be deteriorated to cause abnormal dielectric breakdown.
In the wafer inspection method by the copper deposition method of this embodiment, the illuminance condition of the wafer 30, the methanol resistance value Rm condition, and the applied voltage condition between the upper and lower electrode plates 10 and 12 are prevented from causing abnormal copper deposition due to abnormal dielectric breakdown. By setting to, it is possible to apply to inspection of high quality wafers such as perfect crystal wafers.

  Embodiments of the present invention will be described below with reference to the drawings.

As Example 1, a wafer prepared from a crystal (p-type, resistivity: 10 Ωcm) grown at a slightly higher pulling speed than the pulling condition of the 8 ″ perfect crystal was used and oxidized at 950 ° C. for 140 minutes in dry oxygen. After forming a thermal oxide film of 50 nm by the treatment, the back oxide film is peeled off with HF vapor, the resistance value of methanol is 2.64 MΩcm ² , 3.27 MΩcm ² , 3.90 MΩcm ² , and the illuminance conditions at the time of copper deposition are Copper deposition was performed at 4.8 Lux (fluorescent lamp, on the wafer surface) and an applied voltage between the upper and lower electrodes of 35 V for 10 minutes.
The result is shown in FIG.

  FIG. 3 shows that the number of copper deposits decreases with increasing methanol resistance. In addition, the copper precipitation distribution is determined based on the oxide film breakdown map and the aggregate of void-type point defects predicted from the oxygen precipitate distribution after heat treatment of the sample sliced in the pulling axis direction of the crystal grown by changing the pulling rate. Distributed disk and ring shapes were seen for all methanol resistance values.

As Example 2, a wafer (sample A) prepared from a crystal (p-type, resistivity: 10 Ωcm) grown under conditions where the pulling rate is slightly higher than the pulling condition of 8 ″ perfect crystal, and a wafer (sample A) prepared from the perfect crystal ( Sample B) was oxidized in dry oxygen at 950 ° C. for 140 minutes to form a 50 nm thermal oxide film, the back oxide film was peeled off with HF vapor, and the resistance of methanol was 3.27 MΩcm ² , Illumination conditions at the time of copper deposition are 2.1 Lux, 4.8 Lux, 9.1 Lux, 13.8 Lux, 23.6 Lux (fluorescent lamp, on the wafer surface), and the applied voltage between the upper and lower electrodes is 35 V, 25 V for 10 minutes. Precipitation was performed.
The results are shown in FIGS.

Here, the effective electric field applied to the oxide film changes because the voltage drop of the depletion layer varies depending on the illumination conditions. Therefore, when the effective electric field range is determined in consideration of this voltage drop, when the methanol resistance value is 3.27 MΩcm ² , the initial current value that flows when copper is deposited is 1.6 μA / cm ² , 25 V under the condition of an applied voltage of 35 V. it was 1.3μA / cm ² at conditions, and, in the case of the resistance value 10Ωcm of the silicon wafer, if the band bend amount 0.87V to thermally inversion layer is sufficiently generated, and, in When the range of the effective electric field applied to the oxide film is obtained from the case where electron-hole pairs are sufficiently generated by light irradiation and the voltage drop becomes zero, the range of 5.9 to 6.1 MV / cm at 35 V is obtained. Yes, at 25 V, it is 4.1 to 4.3 MV / cm.

FIG. 4 shows that the number of copper deposits increases as the illuminance increases. And at the applied voltage 35V, there were many copper precipitation numbers rather than 25V. Further, in Sample A, the copper precipitation distribution was observed in all illuminance conditions, with the disk and ring shapes being the distribution shape of the aggregates of the expected vacancy-type point defects.
From FIG. 5, in sample B, the copper precipitation distribution is 35 V, and almost no copper precipitation is observed in 2.1 Lux and 4.8 Lux, but the number increases rapidly between 4.8 Lux and 9.1 Lux. You can see that Moreover, the copper precipitation distribution was in-plane uniform.

However, in Sample B, no copper deposition was observed under all illuminance conditions at 25V.
The sample B is a sample in which no defect was detected by an oxide film dielectric breakdown inspection using a polysilicon electrode (TDDB electrode coverage 80%). It has been confirmed that the same results can be obtained with hydrogen annealed wafers and epitaxial wafers that are completely crystallized only on the surface layer. Therefore, the origin of the copper deposit at 35V is not a defect such as a pit or scratch. It can be judged that there is no.

10 Lower plate (electrode)
12 Upper plate (electrode)
14 Side wall part 16 Spacer 18 External power supply 20 Wafer seating part 30 Wafer 32 Depletion layer 34 Insulating film (oxide layer)

Claims (3)

This is a method for inspecting the presence or absence of minute void-type defect aggregates of 0.06 μm or less in a silicon wafer prepared from a crystal grown under the complete crystal growth conditions without the presence of void-type point defect aggregates. And
In a copper deposition apparatus having upper and lower electrodes, the silicon wafer on which a surface insulating film is formed is mounted, an electrolyte solution is injected into the deposition apparatus, and an external voltage is applied to the upper and lower electrodes, In the method of inspecting the crystal defects on the surface of the silicon wafer by a copper deposition method of depositing copper on the defect site of the wafer,
The copper deposition method includes forming an insulating film as an oxide film having a thickness in the range of 25 to 150 nm on the top surface of the bare wafer, peeling the oxide film on the back surface of the wafer, and near the surface of the wafer. And the step of precipitating copper on the defect site by dielectric breakdown of the insulating film on the defect site formed in,
The step of performing the copper deposition includes mounting a dummy wafer in a container-shaped copper deposition apparatus including upper and lower plates made of copper to which an external voltage can be applied, and sidewalls, and the deposition. Injecting a solvent into the apparatus, applying an external voltage to the upper plate and the lower plate on which the dummy wafer is mounted, performing a dummy process for eluting copper ions, and desorbing the dummy wafer from the copper deposition apparatus Mounting a target wafer in the copper deposition apparatus, and applying an external voltage to the upper and lower plates to deposit copper on a defective portion of the target wafer,
The amount of light applied to the silicon wafer for setting the generation amount of electron-hole pairs generated in the silicon layer to a predetermined state;
Set a resistance value between the upper electrode and the lower electrode of the electrolyte solution,
While performing the copper deposition treatment in a state where the effective electric field applied to the insulating film is set in a range of 3 to 6 MV / cm to avoid copper deposition due to abnormal dielectric breakdown not caused by defects,
When performing a plurality of treatments with the same electrolyte solution, the variation in the electrolyte solution resistance value is set within 5%, and the amount of light applied to the silicon wafer is set constant, and the wafer is irradiated. As a light source to make the light illuminance constant, a monochromatic light source with energy more than that required to generate electron-hole pairs in silicon is used to manage by light quantity, and the unit of electron-hole pairs per unit time per unit volume By controlling the amount of generation, the resistance value of the depletion layer that appears through the inversion layer, which is a low resistance layer, immediately below the thermal oxide film on the wafer surface when an external voltage is applied to the upper and lower plates is managed . A method for inspecting a silicon wafer.   In order to maintain the electrolyte solution resistance value constant during each inspection through a plurality of inspections, if the electrolyte solution resistance value is too low, a new solution is added, and the electrolyte solution resistance value is too high. 2. The method for inspecting a silicon wafer according to claim 1, wherein the dummy process is added to adjust to a predetermined value range, and the variation of the electrolyte solution resistance value is set within 5%. A voltage obtained by subtracting a voltage drop due to the electrolyte solution resistance value from the voltage applied between the upper and lower plates is applied to the resistance value of the oxide film and the resistance value of the depletion layer, thereby causing the oxidation. When the effective electric field (voltage applied to the oxide film / oxide film thickness), which is the ratio between the film thickness and the applied voltage, sets the resistance of the depletion layer to 0, which is a condition for causing abnormal dielectric breakdown, 3. The method for inspecting a silicon wafer according to claim 1, wherein control is performed so that the maximum value does not exceed 6 MV / cm.

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