JP5162999B2 - Semiconductor integrated circuit design method and design apparatus - Google Patents

Description

  The present invention relates to a semiconductor integrated circuit design method and design apparatus, and more particularly to a semiconductor integrated circuit design method and design apparatus to which a Monte Carlo method is applied.

  Conventionally, in semiconductor integrated circuits (for example, silicon (Si) LSI), impurities are generally introduced by ion implantation, and the Monte Carlo method is applied as means for simulating the ion implantation distribution. Has been. In particular, in the case of low acceleration energy, there is a problem with the accuracy of the experimental data, so the Monte Carlo method is often used to predict the distribution near the peak.

  By the way, since the Monte Carlo calculation takes time, a parameter is extracted from the calculation result and a database in which the parameter is extracted is used. Further, when extracting the parameter, a fitting function (for example, Pearson IV distribution) is used. ) Is prepared.

  Conventionally, as a fitting function, what is normally applied to Pearson IV distribution is proposed (for example, refer nonpatent literature 1).

Furukawa Shizujiro et al., “Theoretical Considerations on Lateral Spread of Implanted Ions”, Jpn. J. Appl. Phys. Vol. 11 (1972), pp134- 142, No. 2, February 5, 1972

  FIG. 1 is a diagram conceptually showing a manufacturing process of a semiconductor integrated circuit in which impurities are implanted into a substrate. Here, reference numeral 101 denotes a semiconductor substrate (substrate), 102a to 102c denote masks, and 111a to 111c denote impurity regions (regions into which impurities are implanted).

  FIG. 1A shows, for example, boron (B), arsenic (As), or phosphorus (P) with respect to the region 111a in the substrate 101 such as silicon (Si) which is a portion between the masks 102a and 102b. ) And the like, and FIG. 1B shows a step of ion-implanting the impurity ID into the regions 111b and 111c in the substrate 101, which are portions on both sides of the mask 103a. ing.

  Here, in the substrate 101, the y-axis is taken in the depth (thickness) direction from the surface (SF) into which the impurity ID is implanted, and the x-axis is taken in the lateral direction (the right direction is positive in the figure). Then, a simulation is performed by obtaining a distribution function indicating the distribution of the impurity ID. The obtained distribution function is used, for example, for determining a voltage to be applied to the impurity ID corresponding to a desired region into which the impurity ID is implanted.

  FIG. 2 is a flowchart showing an example of processing in the conventional method for designing a semiconductor integrated circuit, and FIG. 3 is a diagram for conceptually explaining the method for designing the semiconductor integrated circuit shown in FIG.

  As shown in FIG. 2 and FIG. 3, in the conventional semiconductor integrated circuit design method (for example, simulation processing of ion implantation distribution performed by applying the Monte Carlo method), first, Monte Carlo calculation is performed in step ST11 ( In step ST12, the moment parameter is calculated (see FIG. 3B).

  Here, the Monte Carlo calculation in step ST11 is performed only on the portion where the substrate 101 actually exists, that is, from the surface SF of the substrate 101 in FIG. 1A and FIG. Only to do.

Next, the process proceeds to step ST13 to generate a distribution (a function defined in the entire region), and further proceeds to step ST14 to perform fitting of parameters R _p , ΔR _p , γ and β.

  As described above, since the Monte Carlo calculation takes time, a parameter is extracted from the calculation result, a database in which the parameter is extracted is used, and a fitting function is prepared when the parameter is extracted.

  By the way, for example, at low acceleration energy, the ion-implanted impurity escapes not only from the substrate but also from the surface. That is, the implanted impurity ID is not only inside the substrate 101 (in the depth direction from the surface SF: the positive direction of the y axis) but also in the direction in which the impurity ID is implanted from the surface SF (the negative direction of the y axis). ) Also escapes the particles (ions) of the impurity ID, so that the resulting distribution has a discontinuous surface discontinuity.

  Furthermore, since the fitting function is smooth in the entire region, the accuracy is deteriorated even if the moment of the discontinuous Monte Carlo distribution on the surface as described above is extracted and returned to the fitting function. Therefore, for example, the actual situation is that the moment is calibrated manually to fit the fitting function.

  An object of the present invention is to provide a design method and a design apparatus for a semiconductor integrated circuit capable of accurately reproducing a Monte Carlo calculation result without moment calibration in view of the above-described problems of the related art.

  According to the first aspect of the present invention, there is provided a method for designing a semiconductor integrated circuit to which a Monte Carlo method is applied. When processing a substrate, a pseudo negative substrate is assumed for a negative region where the substrate does not exist. A step of performing a Monte Carlo calculation using the substrate and the hypothetical pseudo negative substrate, calculating a moment parameter from a result obtained by the Monte Carlo calculation, and using the calculated moment parameter. And a step of generating a distribution defined in the entire area. A method for designing a semiconductor integrated circuit is provided.

  According to the second aspect of the present invention, in a semiconductor integrated circuit design apparatus to which the Monte Carlo method is applied, when processing a substrate, a pseudo negative substrate is assumed for a negative region where the substrate does not exist. Means for performing a Monte Carlo calculation using the substrate and the assumed pseudo-negative substrate, a means for calculating a moment parameter from the result obtained by the Monte Carlo calculation, and using the calculated moment parameter. And a means for generating a distribution defined in the entire region. A semiconductor integrated circuit design apparatus is provided.

  According to the third aspect of the present invention, there is provided a design program for a semiconductor integrated circuit to which a Monte Carlo method is applied. When a computer processes a substrate, a pseudo negative substrate is applied to a negative region where the substrate does not exist. A procedure for performing a Monte Carlo calculation using the substrate and the assumed pseudo-negative substrate, a procedure for calculating a moment parameter from a result obtained by the Monte Carlo calculation, and the calculated moment A design program for a semiconductor integrated circuit is provided that executes a procedure for generating a distribution defined in the entire region using parameters to perform a design of the semiconductor integrated circuit.

  According to the present invention, it is possible to provide a semiconductor integrated circuit design method and design apparatus capable of accurately reproducing a Monte Carlo calculation result without moment calibration.

  Embodiments of a semiconductor integrated circuit design method and design apparatus according to the present invention will be described below in detail with reference to the accompanying drawings.

  FIG. 4 is a diagram for explaining the application of the Monte Carlo method in the method for designing a semiconductor integrated circuit according to the present invention.

  The method for designing a semiconductor integrated circuit according to the present invention is, for example, a simulation of a step of implanting impurities (ion implantation) into a substrate by applying a Monte Carlo method. Processing is performed assuming a pseudo negative substrate for the region.

  That is, as shown in FIG. 4, not only the positive region of the y axis where the substrate (101) exists, but also the negative region of the y axis where there is no actual substrate (air exists) Assuming that there is a pseudo substrate (pseudo negative substrate) with the same characteristics, the Monte Carlo calculation is performed on the entire area of both the actual substrate and the pseudo negative substrate to obtain the impurity distribution. Yes.

  FIG. 5 is a flowchart showing an example of processing in the semiconductor integrated circuit design method according to the present invention, and FIG. 6 is a diagram for conceptually explaining the semiconductor integrated circuit design method shown in FIG.

  As shown in FIGS. 5 and 6, the process in the semiconductor integrated circuit design method of this embodiment (for example, the simulation process of ion implantation distribution performed by applying the Monte Carlo method) is first performed on the substrate in step ST1. When processing is performed, a pseudo negative substrate is assumed for a negative region where the substrate does not exist, and Monte Carlo calculation is performed for all regions of both the actually existing substrate and the pseudo negative substrate (FIG. 6A). reference).

Next, the process proceeds to step ST2, and moment parameters (parameters R _p , ΔR _p , γ, and β) are calculated from the results obtained by the Monte Carlo calculation (see FIG. 6B).

  In step ST3, the calculated moment parameter is used to generate an impurity distribution (distribution function) (see FIG. 6C). That is, the processing of step ST3 is performed not only on the y-axis positive region where the substrate (101) exists, but also on the y-axis negative region where the substrate does not actually exist. Will occur.

  Note that the semiconductor integrated circuit design method of the present embodiment does not require manual fitting as in the prior art, so that not only the Pearson IV (Pearson IV) distribution but also a Gaussian (Gauss) distribution, etc. It is possible to perform a wide range of fitting on the analytic function.

  FIG. 7 is a diagram showing an example of a distribution function obtained by processing by a design program for a semiconductor integrated circuit according to the present invention.

  FIG. 7A shows the distribution N (x) of the impurity ID implanted when the impurity ID is ion-implanted into the region 111a between the portions covered with the masks 102a and 102b of FIG. , Y) shows the function (distribution function), and FIG. 7B shows the case where the impurity ID is ion-implanted into the regions 111b and 111c on both sides of the mask 103a shown in FIG. Is a function of the distribution N (x, y) of the impurity ID implanted.

  That is, as shown in FIG. 7A, the impurity ID distribution N (x, y) in the case of FIG. 1A is expressed by the equation (1) and also shown in FIG. 7B. As described above, the distribution N (x, y) of the impurity ID in the case of FIG. 1B is expressed by Expression (2). As shown in FIG. 7B, the impurity ID distribution N (x, y) in the case of FIG. 1B can also be expressed as a two-dimensional distribution as shown in Expression (3).

  As a result, parameters can be automatically extracted from the calculation result of the Monte Carlo method to obtain a highly accurate analysis model, and the two-dimensional concentration distribution can be analyzed analytically using the automatically extracted parameters. Predictions can be done automatically.

  FIG. 8 is a diagram showing a simulation result obtained by the method for designing a semiconductor integrated circuit according to the present invention in comparison with a conventional one. In the simulation shown in FIG. 8, the result of Monte Carlo calculation when boron as an impurity (ID) is ion-implanted into the silicon substrate (101) at 0.1 KeV is the same as the case of the actual substrate in the prior art. This shows a comparison with a case where an actual substrate according to the present embodiment and a substrate in the air (pseudo negative substrate: a negative region where no substrate actually exists) are considered.

  As is clear from FIG. 8, the curve of the result of Monte Carlo calculation using only the actual substrate of the prior art (described as “Monte Carlo (only in the substrate)” in FIG. 8) and the Pearson IV distribution evaluated from this Monte Carlo calculation ( In FIG. 8, it can be seen that there is a considerable deviation in the curve of “only in the substrate”.

  On the other hand, the curve of the result of Monte Carlo calculation (described as “Monte Carlo (in air)” in FIG. 8) when considering the actual substrate of the present invention and the pseudo negative substrate in the air, and the Monte Carlo calculation It can be seen that the curves of the Pearson IV distribution (described as “in air” in FIG. 8) evaluated from the above agree very well.

  Thus, it can be seen that by applying the present invention, the Monte Carlo calculation result can be accurately reproduced without moment calibration.

  FIG. 9 is a diagram for explaining an example of a medium recording a design program for a semiconductor integrated circuit to which the present invention is applied. In FIG. 9, reference numeral 10 denotes a semiconductor integrated circuit design processing apparatus (computer), 20 denotes a program (data) provider, and 30 denotes a portable recording medium.

  The present invention is given as a program (data) for the processing apparatus 10 as shown in FIG. 9 and executed by the processing apparatus 10, for example. The processing device 10 includes an arithmetic processing device main body 11 including a processor, and a processing device side memory (for example, a RAM (Random Access Memory) that stores a result of giving or processing a program (data) to the arithmetic processing device main body 11. ) Or hard disk) 12 or the like. The program provided to the processing device 10 is loaded and executed on the main memory of the processing device 10.

  The program provider 20 has means (line destination memory: for example, DASD (Direct Access Storage Device)) 21 for storing the program, and provides the program to the processing apparatus 10 via a line such as the Internet, or The data is provided to the processing apparatus 10 via a portable recording medium 30 such as an optical disk such as a CD-ROM or DVD, a magnetic disk, or a magnetic tape. Needless to say, the medium on which the design program of the semiconductor integrated circuit according to the present invention is recorded includes the processing device side memory 12, the line destination memory 21, the portable recording medium 30, and the like.

  The present invention is suitable for simulating the distribution of impurities injected into a substrate by applying the Monte Carlo method, but is not limited to this, and is a design technique for a semiconductor integrated circuit to which the Monte Carlo method is applied. Can be widely applied.

It is a figure which shows notionally the manufacturing process of the semiconductor integrated circuit which inject | pours an impurity with respect to a board | substrate. It is a flowchart which shows an example of the process in the design method of the conventional semiconductor integrated circuit. FIG. 3 is a diagram for conceptually explaining a design method of the semiconductor integrated circuit shown in FIG. 2. It is a figure for demonstrating application of the Monte Carlo method in the design method of the semiconductor integrated circuit concerning this invention. It is a flowchart which shows an example of the process in the design method of the semiconductor integrated circuit which concerns on this invention. FIG. 6 is a diagram for conceptually explaining a design method of the semiconductor integrated circuit shown in FIG. 5. It is a figure which shows the example of the distribution function obtained by the process by the design program of the semiconductor integrated circuit which concerns on this invention. It is a figure which shows the simulation result by the design method of the semiconductor integrated circuit concerning this invention compared with the conventional one. It is a figure for demonstrating the example of the medium which recorded the design program of the semiconductor integrated circuit to which this invention is applied.

Explanation of symbols

DESCRIPTION OF SYMBOLS 10 Processing device 11 Arithmetic processing device main body 12 Processing device side memory 20 Program (data) provider 21 Means for storing program (line destination memory)
30 Portable recording media

Claims (7)

A method of designing a semiconductor integrated circuit using a Monte Carlo method,
Assuming a pseudo negative substrate for a negative region where the substrate does not exist when processing on a substrate;
Performing a Monte Carlo calculation using the substrate and the assumed pseudo-negative substrate;
Calculating moment parameters from the results obtained by the Monte Carlo calculation;
Generating a distribution defined over the entire region using the calculated moment parameter, and a method for designing a semiconductor integrated circuit. 2. The semiconductor integrated circuit design method according to claim 1, wherein the semiconductor integrated circuit design method is applied to a processing step of a semiconductor integrated circuit in which impurities are implanted into the substrate.
A design method of a semiconductor integrated circuit, wherein a totaling range of the distribution of the impurities injected into the substrate is variable, and the total impurity distribution can be totaled even in a negative region where the substrate does not exist. The method of designing a semiconductor integrated circuit according to claim 1 or 2,
The step of calculating the moment parameter comprises extracting a moment parameter dependent on a depth in a lateral direction with respect to the surface of the substrate from a result obtained by the Monte Carlo calculation. The method of designing a semiconductor integrated circuit according to claim 3,
The step of generating the distribution includes generating a two-dimensional distribution according to the extracted lateral depth-dependent moment parameter. The method for designing a semiconductor integrated circuit according to any one of claims 1 to 4,
The step of generating the distribution includes fitting to a Piazone IV distribution. A device for designing a semiconductor integrated circuit using a Monte Carlo method,
Means for assuming a pseudo-negative substrate for a negative region in which the substrate does not exist when processing a substrate;
Means for performing a Monte Carlo calculation using the substrate and the assumed pseudo-negative substrate;
Means for calculating a moment parameter from the result obtained by the Monte Carlo calculation;
Means for generating a distribution defined over the entire region using the calculated moment parameter, and a design apparatus for a semiconductor integrated circuit. A program for designing a semiconductor integrated circuit to which a Monte Carlo method is applied.
When performing processing on a substrate, a procedure for assuming a pseudo negative substrate for a negative region where the substrate does not exist;
A procedure for performing a Monte Carlo calculation using the substrate and the assumed pseudo-negative substrate;
A procedure for calculating a moment parameter from the result obtained by the Monte Carlo calculation;
And a step of generating a distribution defined in the entire region using the calculated moment parameter, and a semiconductor integrated circuit design is performed.

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