JP5334904B2 - Information processing apparatus, information processing apparatus identification method, information processing apparatus identification program, and motherboard - Google Patents

Description

  The present invention relates to an information processing apparatus, an information processing apparatus identification method, an information processing apparatus identification program, and a motherboard.

  A user can connect an electronic device such as a printer device to an information processing device such as a computer and use the printer device via the information processing device (see, for example, Patent Document 1).

  In particular, in financial institutions, a passbook printer or image reader, a cash card reader / writer with an IC (Integrated Circuit) chip, a keyboard that can easily perform operations such as depositing and withdrawing, etc. A wide variety of electronic devices that are unique to financial institutions are connected and used. For this reason, an information processing apparatus used in a financial institution uses a circuit board (sub board) provided with connectors, to which an electronic device can be connected so as to individually correspond to each financial institution. Specifically, such a sub board can be connected to a circuit board (mother board) of the information processing apparatus, and various electronic devices can be connected via the sub board. In addition, by maintaining the motherboard of the information processing device as it is and changing the sub board to another type, it is possible to change the number and type of electronic devices to be connected to the information processing device. The motherboard of the information processing apparatus can be shared.

Japanese Patent Laid-Open No. 3-15940

  However, even if a sub board is connected to the motherboard of the information processing apparatus, the type and number of interfaces corresponding to the sub board are not recognized on the motherboard side. For this reason, in the motherboard of the information processing apparatus, it is necessary to execute a controller (control unit) that can control all interfaces to an operable state, and power consumption increases with an increase in extra processing. There was a problem.

  The present application has been made in view of such points, and an object thereof is to provide an information processing apparatus capable of identifying an interface corresponding to a sub board, an information processing apparatus identification method, an information processing apparatus identification program, and a motherboard. And

To achieve the above object, in an information processing apparatus electronic device is connected, the interface corresponding to the electronic device is installed, a removable board with identification information for identifying the self, corresponding to the previous SL identification information An interface information storage unit that stores interface information regarding the type of the interface installed on the board and the number of each type, and an identification that acquires the identification information of the board when the board is connected an information acquisition unit, based on the identification information acquisition unit acquired before Symbol identification information, from the interface information in which the interface information storage unit stores, identifies the connected the board is installed in the board identified the information processing apparatus Hisage having an identifying unit that identifies the type and the number of said interface It is.

In order to achieve the above object, a program for causing a computer to execute the same method and the same processing as those of the above information processing apparatus is provided.
In order to achieve the above object, an interface corresponding to an electronic device is installed, and the interface installed on the board is associated with the identification information of a removable board having identification information for identifying itself. An interface information storage unit that stores interface information related to the type of the board and the number of each type, an identification information acquisition unit that acquires the identification information of the board when the board is connected, and the identification information acquisition unit based on the previous SL identification information, from the interface information in which the interface information storage unit stores, identifies the connected the board, identifying the type and the number of the interfaces installed in the board identified A motherboard having an identification unit is provided.

  According to the information processing apparatus, the information processing apparatus identification method, the information processing apparatus identification program, and the motherboard, it is possible to execute only necessary processing and prevent an increase in power consumption.

It is a figure which shows the structure and function of the information processing apparatus which concern on 1st Embodiment. It is a figure which shows the hardware structural example of the information processing apparatus which concerns on 2nd Embodiment. It is a figure which shows the hardware structural example of the input-output interface of the information processing apparatus which concerns on 2nd Embodiment. It is a figure which shows the hardware structural example of the sub board of the information processing apparatus which concerns on 2nd Embodiment. It is a block diagram which shows the function with which the information processing apparatus which concerns on 2nd Embodiment is provided. It is a figure which shows the specific example of the table with which the information processing apparatus which concerns on 2nd Embodiment is provided. It is a flowchart which shows the process sequence for performing identification with the information processing apparatus which concerns on 2nd Embodiment.

Hereinafter, embodiments will be described in detail with reference to the drawings.
[First Embodiment]
FIG. 1 is a diagram illustrating a configuration and a function of the information processing apparatus according to the first embodiment.

When the sub board 3 corresponding to various interfaces is connected, the information processing apparatus 1 can identify the interface corresponding to the sub board 3.
As shown in FIG. 1, the information processing apparatus 1 includes a motherboard 2 and a sub board 3 that is detachably connected to the motherboard 2, and the sub board 3 corresponds to various interfaces. Yes.

  The motherboard 2 includes an interface information storage unit 2a, an identification information acquisition unit 2b, an identification unit 2c, a switching unit 2d, and an interface control unit 2e. Has been.

  The interface information storage unit 2a stores interface information representing an interface corresponding to the sub board 3 and associated with identification information 3a of the sub board 3 described later. The interface information is information representing USB (Universal Serial Bus), LAN, parallel, and the like, for example.

The identification information acquisition unit 2b acquires the identification information 3a of the sub board 3 when the sub board 3 is connected to the connection connector 2f.
Based on the acquired identification information 3a, the identification unit 2c identifies the interface corresponding to the connected sub board 3 from the interface information stored in the interface information storage unit 2a.

The switching unit 2d switches on / off states of functions of the interface control unit 2e described later according to the identification result of the identification unit 2c.
The interface control unit 2e controls the interface corresponding to the sub board 3 to an operable state. The interface control unit 2e is installed according to the type of interface, and each interface control unit 2e is switched between the on state and the off state by the switching unit 2d.

The connection connector 2f is connected to the sub board 3, and transmission / reception of signals between the mother board 2 and the sub board 3 is executed via the connection connector 2f.
The information processing apparatus 1 is arranged on the mother board 2, for example, a CPU (Central Processing Unit), a RAM (Random Access Memory), an HDD (Hard Disk Drive), and the like (not shown). Are realized as computers connected to each other via a bus. In this case, the functions of the identification information acquisition unit 2b and the identification unit 2c are realized by a predetermined program by the CPU, for example. The switching unit 2d and the interface control unit 2e are realized as a circuit on the mother board 2 on which a CPU is mounted, for example.

  On the other hand, the sub board 3 includes identification information 3a for identifying itself, and further includes a connection connector 3b that can be connected to the connection connector 2f of the motherboard 2, and an interface connector 3c that can correspond to various interfaces. Is installed. The electronic device connected to the interface connector 3c of the sub board 3 transmits and receives signals to and from the motherboard 2 via the sub board 3 connected to the connection connector 2f.

Next, an example of a method for identifying the sub board 3 in the information processing apparatus 1 having such a configuration and function will be described.
First, when the connection connector 3b of the sub board 3 is connected to the connection connector 2f of the motherboard 2, the identification information acquisition unit 2b acquires the identification information 3a of the sub board 3.

  Next, the identification unit 2c refers to the interface information in the interface information storage unit 2a based on the identification information 3a acquired by the identification information acquisition unit 2b, and identifies the interface corresponding to the connected sub board 3.

The switching unit 2d turns on only the function of the interface control unit 2e that controls the interface corresponding to the sub board 3 to an operable state in accordance with the identification result of the identification unit 2c.
Only the interface control unit 2e that is turned on controls the interface to be operable.

Thereafter, when a predetermined electronic device is connected to the interface of the sub board 3, the electronic device is recognized and used on the mother board 2 side.
In this way, in the information processing apparatus 1, when the sub-board 3 having the identification information 3a corresponding to the predetermined interface is connected to the mother board 2, the identification unit 2c of the mother board 2 is based on the identification information. The interface corresponding to the connected sub board 3 is identified by referring to the interface information.

  Thereby, in the mother board 2, only the function of the interface control unit 2e for controlling the interface corresponding to the sub board 3 to the operable state is made available, and the interface control unit 2e related to the interface not corresponding to the sub board 3 is used. This function is not available (off).

Therefore, in the mother board 2, an increase in power consumption corresponding to the processing is suppressed along with an extra processing load.
Further, in such an information processing apparatus 1, it is not necessary to mount a control device corresponding to the interface, such as a general purpose expansion interface such as a LAN card, on the sub board 3, and the interface can be controlled to be operable. For this reason, it is possible to suppress an increase in cost such as installation of a control device on the sub board 3 and to reduce the size of the information processing apparatus 1 as the sub board 3 is downsized. Further, in the information processing apparatus 1, the corresponding interface is controlled to be operable by the mother board 2. For this reason, the operation | work for setting BIOS (Basic Input / Output System) of the motherboard 2 according to the kind and number of interfaces can be abbreviate | omitted. Moreover, it is possible to deal with various interfaces by exchanging the sub board 3 as required for one motherboard 2, and it is possible to increase the interface variations. Can be realized.

[Second Embodiment]
Next, the information processing apparatus will be specifically described.
FIG. 2 is a diagram illustrating a hardware configuration example of the information processing apparatus according to the second embodiment.

  As illustrated in FIG. 2, the information processing apparatus 10 includes a motherboard 20 and a sub board 30 that is detachably connected to the motherboard 20, and connects an electronic device to an interface installed on the sub board 30. Can do.

The motherboard 20 is provided with a CPU 20a, a RAM 20b, an HDD 20c, and an input / output interface 20d. These parts are connected to each other by a bus 20e.
The CPU 20a comprehensively controls the entire information processing apparatus 10 and the interface of the sub board 30 by executing various programs stored in a storage medium such as the RAM 20b.

  The RAM 20b temporarily stores at least part of an OS (Operating System) and programs to be executed by the CPU 20a. The RAM 20b stores various data necessary for processing by the CPU 20a.

  The HDD 20c stores the OS and application programs on the information processing apparatus 10. The HDD 20c stores various data necessary for processing by the CPU 20a.

  The input / output interface 20d is connected to the connection connector 30c of the sub board 30 via the connection connector 20f, and executes transmission / reception of a predetermined signal to / from an interface of the sub board 30 described later. Further, the input / output interface 20d receives identification information 31 (FIG. 5) described later from the sub board 30 via the connection connector 20f. Details of the configuration of the input / output interface 20d will be described later.

  On the other hand, the sub-board 30 is provided with an identification circuit 30a and an electronic device interface 30b. Further, the sub board 30 is provided with a connection connector 30c connected to the connection connector 20f of the mother board 20, and an interface connector 30d corresponding to various interfaces.

The identification circuit 30a transmits a predetermined response signal as identification information 31 (FIG. 5) to the mother board 20 when power is supplied to the mother board 20.
The electronic device interface 30b transmits and receives signals between the interface connector 30d and the connection connector 30c.

  In FIG. 2, a monitor 40, a mouse 50, and a keyboard 60 are connected to the interface connector 30d as a specific example in FIG. On the other hand, the CPU 20a of the mother board 20 performs signal transmission / reception via the input / output interface 20d and the sub board 30. The detailed description of the sub board 30 will be described later.

Next, the details of the configuration of the input / output interface 20d will be further described.
FIG. 3 is a diagram illustrating a hardware configuration example of the input / output interface of the information processing apparatus according to the second embodiment.

As shown in FIG. 3, the input / output interface 20d includes a chip set 20g, a switching unit 20j, an audio control unit 20k, and a network control unit 20l.
The chip set 20g inputs a signal from the sub-board 30 via the connection connector 20f, and executes predetermined processing on the input signal to output a predetermined signal. Output: General purpose input / output) 20i is installed. For example, in GPIOa and GPIOb of GPIO 20i, the identification information 31 from the sub board 30 is input via the connection connector 20f. A signal corresponding to the identification information 31 input by the chipset 20g is output from GPIO1 and GPIO2.

  Also, the USB control unit 20h is arranged in the chip set 20g, and the USB connected to the sub board 30 can be used when the USB control unit 20h is in the on state. Note that the USB control unit 20h performs communication using a USB connected to each of the plurality of USB connectors 30d2 and 130d2 (FIGS. 4A and 4B) provided on the sub board 30 via the connection connector 20f. It is possible to control.

  The switching unit 20j receives signals from GPIO1 and GPIO2, and switches each control function of the audio control unit 20k and the network control unit 20l, which will be described later, between an on state and an off state. Specifically, as shown in FIG. 3, switching elements (transistor elements) to which signals from GPIO1 and GPIO2 are input are arranged in the switching unit 20j. The switch element switches the control functions of the audio control unit 20k and the network control unit 20l to an on state / off state, respectively, according to signals from GPIO1 and GPIO2.

  The audio control unit 20k can control the audio connector 130d1 (FIG. 4B) provided on the sub board 30 to be used effectively when the audio control unit 20k is in the on state.

The network control unit 201 can control the LAN connector 30d1 (FIG. 4A) provided on the sub board 30 to be effectively used when the network control unit 201 is in the on state.
The audio control unit 20k and the network control unit 20l are examples of a control unit that controls an interface connectable to the sub board 30, and can be appropriately arranged corresponding to the interface. As the control unit corresponding to the interface is disposed, the switching element is also disposed in the switching unit 20j.

A specific example of the sub board 30 connected to the connection connector 20f electrically connected to the input / output interface 20d having such a configuration will be described below.
FIG. 4 is a diagram illustrating a hardware configuration example of a sub board of the information processing apparatus according to the second embodiment.

  As specific examples of the sub board 30 of the information processing apparatus 10 illustrated in FIG. 2, the sub boards A and B can be applied. 4A shows the sub board A, and FIG. 4B shows the sub board B.

  As shown in FIG. 4A, the sub board A first has ID pins a and b as the identification circuit 30a. When the motherboard 20 is powered on, the ID pins a and b send a response signal “high (= 1)” from the ID pin a to GPIOa of the chipset 20 g, and from the ID pin b to “low (= 0)”. Is output as the identification information 31 of the sub board A to the GPIOb of the chip set 20g. The response signal output from the ID pins a and b at this time is represented as (1, 0).

The interface connector 30d of the sub board A includes a LAN connector 30d1 connected to the LAN and a USB connector 30d2 to which up to four USBs can be connected.
On the other hand, the sub board B has ID pins a and b as the identification circuit 30a as shown in FIG. 4B. The response signal is output to GPIOa of the chip set 20g, and the response signal of “1” from the ID pin b is output to the GPIOb of the chip set 20g as (0, 1) as the identification information 31 of the sub board B, respectively.

  The interface connector 30d of the sub board B includes an audio connector 130d1 to which a speaker is connected and a USB connector 130d2 to which up to two USBs can be connected.

  In the case of FIG. 4, four patterns ((a, b) = (0, 0), (0, 1), (1, 0), (1, 1) are formed by two ID pins a and b. )) Sub-board 30 can be identified. Further, the number of ID pins is not limited to two, and one or three or more ID pins can be installed according to the number of types of sub-boards 30.

Next, control functions provided in the information processing apparatus 10 will be described.
FIG. 5 is a block diagram illustrating functions provided in the information processing apparatus according to the second embodiment.
When the sub-board 30 corresponding to various interfaces is connected, the information processing apparatus 10 identifies the sub-board 30 and identifies the interface corresponding to the sub-board 30 and puts the interface into an operable state. Only the control function to be controlled can be switched on.

  The motherboard 20 of the information processing apparatus 10 includes an interface information table 21, a switching process information table 22, and a BIOS 23, and the sub board 30 includes identification information 31 for identifying itself.

  The interface information table 21 shows interface information in which the identification information 31 is associated with the sub board 30 and the interface corresponding to the sub board 30.

  The switching process information table 22 indicates switching process information for switching the control function for controlling the interface corresponding to the sub board 30 to the operable state.

Here, the details of the interface information table 21 and the switching process information table 22 will be described.
FIG. 6 is a diagram illustrating a specific example of a table provided in the information processing apparatus according to the second embodiment.

  6A shows the interface information table 21, and FIG. 6B shows the switching process information table 22. Further, the interface information table 21 indicates the interfaces that can correspond to the sub boards A and B and the number of the interfaces.

  In the interface information table 21, as shown in FIG. 6A, sub boards A and B are associated with ID pins a and b. Furthermore, the numbers of “USB”, “LAN”, and “AUDIO” are shown as interfaces corresponding to the sub-boards A and B, respectively.

Specifically, when the ID pins a and b are (1, 0) as the identification information 31, the sub board A is associated.
Further, as shown in FIG. 4A, the sub board A can support the LAN connector 30d1 and the USB connector 30d2 capable of supporting up to four USBs. 4. “1” is set in “LAN”. On the other hand, since no audio connector is installed on the sub board A, “AUDIO” is set to 0.

Further, when the ID pins a and b are (0, 1) as the identification information 31, the sub board B is associated.
Further, as shown in FIG. 4B, the sub-board B can be connected to the audio connector 130d1 and the USB connector 130d2 capable of supporting up to two USBs. 2. “1” is set in “AUDIO”. On the other hand, since no LAN connector is installed in the sub board B, 0 is set in “LAN”.

  On the other hand, in the switching processing information table 22, as shown in FIG. 6B, when “USB1 to 4”, “LAN”, and “AUDIO” are enabled, they are disabled as “1”. In this case, it is set to “0”.

  The switching setting unit 23c described later refers to the switching processing information table 22 according to the identification result of the interface corresponding to the sub board 30 of the interface information table 21, and controls the interface to be operable (valid). The on / off state of is switched.

  Specifically, from the switching processing information table 22, in the case of sub board A, “USB 1 to 4”, “LAN” is set to “valid (= 1)”, and “AUDIO” is set to “invalid (= 0)”. Set to.

In the case of the sub board B, “USB1, 2” and “AUDIO” are set to “1”, and “USB3, 4” and “LAN” are set to “0”.
Returning to FIG. 5, the BIOS 23 can specify the interface corresponding to the sub board 30 from the identification information 31 of the sub board 30 and switch the state of the control function that controls the interface to be operable.

The BIOS 23 includes an identification information acquisition unit 23a, an identification unit 23b, and a switching setting unit 23c that execute such processing.
The identification information acquisition unit 23 a acquires the identification information 31 from the sub board 30. At the time of acquisition, the identification information acquisition unit 23a receives signals from the ID pins a and b of the sub board 30 from GPIOa and GPIOb as shown in FIG.

  The identification unit 23b refers to the interface information table 21 based on the identification information 31 acquired by the identification information acquisition unit 23a, identifies the connected sub board 30, and selects an interface corresponding to the sub board 30. Identify.

  For example, the identification unit 23b identifies that the sub board B is connected from the interface information table 21 based on the ID pins a and b (0, 1) of the identification information 31 acquired by the identification information acquisition unit 23a. . Furthermore, it is possible to specify from the interface information table 21 that the sub-board B is provided with the USB connector 130d2 and the audio connector 130d1 that can support up to two USBs.

  The switching setting unit 23c controls the interface corresponding to the sub board 30 to an operable state according to the switching processing information table 22 based on the interface corresponding to the sub board 30 identified by the identifying unit 23b. Determine the on / off state of the function. Further, the switching setting unit 23c notifies the USB control unit 20h of a switching request for controlling any one of the four USBs to be operable based on the determination result. Further, the switching setting unit 23c notifies the switching unit 20j of a switching request for the audio control unit 20k or the network control unit 20l based on the determination result.

Next, a processing procedure for identifying the sub board 30 performed in the information processing apparatus 10 will be described with reference to FIG. 7 together with FIG.
FIG. 7 is a flowchart illustrating a processing procedure for executing identification in the information processing apparatus according to the second embodiment.

First, as initial settings, interface information is stored in the interface information table 21 and switching processing information is stored in the switching processing information table 22 in advance.
With the power of the motherboard 20 turned off, the connection connector 30c of the sub board 30 is connected to the connection connector 20f of the motherboard 20.

[Step S11]
When power is turned on to the motherboard 20, the BIOS 23 is activated to initialize main components (for example, the CPU 20a, the RAM 20b, the chip set 20g, etc.) that require the minimum operation.

[Step S12]
After completion of the initialization, the identification information acquisition unit 23a of the BIOS 23 acquires signals from the ID pins a and b as the identification information 31 of the sub board 30.

[Step S13]
The identification unit 23b of the BIOS 23 refers to the interface information table 21 based on the identification information 31 acquired by the identification information acquisition unit 23a, identifies the sub board 30 connected to the motherboard 20, and supports the sub board 30. Identify the interface that was created.

[Step S14]
The switching setting unit 23c of the BIOS 23 refers to the switching processing information table 22 based on the identification result of step S13, and sets the on / off state of the control function that controls the interface corresponding to the sub board 30 to the operable state. Determine switching. Based on the determination result, the switching setting unit 23c notifies the USB control unit 20h and the switching unit 20j of the switching request.

[Step S15]
The USB control unit 20h sets the USB connector of the sub board 30 to be valid based on the switching request in step S14. In addition, the switching unit 20j sets at least one of the audio control unit 20k and the network control unit 20l to be valid based on the switching request in step S14.

  When the above setting is completed, normal initialization processing is executed thereafter. After that, when the USB and LAN are connected to the interface of the sub board 30, the interface is recognized and used on the mother board 20 side. Become.

Next, the identification process of the sub board 30 in the information processing apparatus 10 will be specifically described.
First, a case where the sub board A (FIG. 4A) is connected to the mother board 20 of the information processing apparatus 10 will be described.

  When the power of the motherboard 20 is turned off and the connector 20c of the sub-board A is connected to the connector 20f of the motherboard 20 and then the motherboard 20 is turned on, the BIOS 23 is activated and the minimum operation is required. The main component is initialized (step S11).

The identification information acquisition unit 23a of the BIOS 23 refers to the ID pins a and b of the sub board A and acquires (1,0) of the identification information 31 from the ID pins a and b (step S12).
The identification unit 23b of the BIOS 23 refers to the interface information table 21 (FIG. 6A) based on the identification information 31 (1,0) acquired by the identification information acquisition unit 23a, and the sub unit connected to the motherboard 20 is connected. Identify board A. Further, it is specified that the interface corresponding to the sub board A is four USB and LAN (step S13).

  The switching setting unit 23c of the BIOS 23 refers to the switching processing information table 22 (FIG. 6B), a USB control unit 20h that controls the USBs 1 to 4 of the USB connector 30d2 of the sub board A to an operable state, and a LAN. It is determined to switch the control function with the network control unit 20l that controls the connector 30d1 to an operable state. Furthermore, the switching setting unit 23c notifies the USB control unit 20h and the switching unit 20j of the switching request based on the determination result (step S14).

  Based on the switching request, the USB control unit 20h sets the USBs 1 to 4 of the USB connector 30d2 to “1” and controls the USBs 1 to 4 to be operable. Further, the switching unit 20j switches the network control unit 20l to the on state based on the switching request, and the network control unit 20l controls the LAN connector 30d1 to the operable state.

  By such control, the LAN connector 30d1 and the USB connector 30d2 of the sub board A can be normally used while the audio control unit 20k is kept on.

Next, a case where the sub board B (FIG. 4B) is connected to the mother board 20 of the information processing apparatus 10 will be described.
Similarly to the above, after the power supply of the motherboard 20 is turned off, the connection connector 30c of the sub board B is connected to the connection connector 20f of the motherboard 20, and then the power is supplied to the motherboard 20 (step S11).

The identification information acquisition unit 23a of the BIOS 23 refers to the ID pins a and b of the sub board B, and acquires (0, 1) of the identification information 31 from the ID pins a and b (step S12).
The identification unit 23b of the BIOS 23 refers to the interface information table 21 (FIG. 6A) based on the identification information 31 (0, 1) acquired by the identification information acquisition unit 23a. Identify board B. Further, it is specified that the interface corresponding to the sub board B is two USB and audio (step S13).

  The switching setting unit 23c of the BIOS 23 refers to the switching processing information table 22 (FIG. 6B), a USB control unit 20h that controls the USBs 1 and 2 of the USB connector 130d2 of the sub board B to an operable state, and an audio. It is determined that the control function with the audio control unit 20k that controls the connector 130d1 to be operable is switched to the ON state. Furthermore, the switching setting unit 23c notifies the USB control unit 20h and the switching unit 20j of the switching request based on the determination result (step S14).

  Based on the switching request, the USB control unit 20h sets the USBs 1 and 2 of the USB connector 130d2 to “1” and controls the USBs 1 and 2 to be operable. Further, the switching unit 20j switches the audio control unit 20k to the on state based on the switching request, and the audio control unit 20k controls the audio connector 130d1 to be operable.

  By such control, the audio connector 130d1 and the USB connector 130d2 of the sub board B can be normally used while the network control unit 201 is maintained in the off state.

  As described above, in the mother board 20 of the information processing apparatus 10, only the control function for controlling the interface corresponding to the sub board 30 to the operable state is made available. On the other hand, the control function for controlling the interface not corresponding to the sub board 30 to the operable state is maintained in an unusable (off) state.

Therefore, in the mother board 20, the power consumption corresponding to the processing is reduced along with the burden of extra processing.
Further, in such an information processing apparatus 10, it is not necessary to mount a control device corresponding to the interface, such as a general-purpose expansion interface such as a LAN card, on the sub board 30, and the interface can be controlled to be operable. For this reason, it is possible to suppress an increase in cost such as installation of a control device on the sub board 30 and to reduce the size of the information processing apparatus 10 as the sub board 30 is downsized. Further, in the information processing apparatus 10, the corresponding interface is controlled to be operable by the motherboard 20. For this reason, the operation | work for setting BIOS of the motherboard 20 according to the kind and number of interfaces can be abbreviate | omitted. In addition, it is possible to deal with various interfaces by replacing the sub-board 30 with respect to one motherboard 20 as necessary, and it is possible to increase interface variations. Can be realized.

  Note that some of the processing functions described above can be realized by a computer. In that case, a program describing the processing contents of the functions that the information processing apparatus should have is provided. By executing the program on a computer, the above processing functions are realized on the computer. The program describing the processing contents can be recorded on a computer-readable recording medium. Examples of the computer-readable recording medium include a magnetic storage device, an optical disk, a magneto-optical recording medium, and a semiconductor memory. Magnetic storage devices include hard disk devices (HDD), flexible disks (FD), magnetic tapes, and the like. Optical discs include DVD, DVD-RAM, CD-ROM / RW, and the like. Magneto-optical recording media include MO (Magneto-Optical disk).

  When distributing the program, for example, a portable recording medium such as a DVD or a CD-ROM in which the program is recorded is sold. It is also possible to store the program in a storage device of a server computer and transfer the program from the server computer to another computer via a network.

  The computer that executes the program stores, for example, the program recorded on the portable recording medium or the program transferred from the server computer in its own storage device. Then, the computer reads the program from its own storage device and executes processing according to the program. The computer can also read the program directly from the portable recording medium and execute processing according to the program. In addition, each time a program is transferred from a server computer connected via a network, the computer can sequentially execute processing according to the received program.

  Further, at least a part of the above processing functions can be realized by an electronic circuit such as a DSP (Digital Signal Processor), an ASIC (Application Specific Integrated Circuit), or a PLD (Programmable Logic Device).

DESCRIPTION OF SYMBOLS 1,10 Information processing apparatus 2,20 Mother board 2a Interface information storage part 2b, 23a Identification information acquisition part 2c, 23b Identification part 2d, 20j Switching part 2e Interface control part 2f, 3b, 20f, 30c Connection connector 3,30, A , B Sub board 3a Identification information 3c, 30d Interface connector 20a CPU
20b RAM
20c HDD
20d Input / output interface 20e Bus 20g Chipset 20h USB controller 20i GPIO
20k audio control unit 20l network control unit 21 interface information table 22 switching processing information table 23 BIOS
23c switching setting unit 30a identification circuit 30b electronic device interface 30d1 LAN connector 30d2, 130d2 USB connector 31 identification information 130d1 audio connector 40 monitor 50 mouse 60 keyboard a, b ID pin

Claims (6)

In an information processing apparatus to which an electronic device is connected,
An interface corresponding to the electronic device is installed, and a detachable board having identification information for identifying itself,
Associated with the prior SL identification information, and the interface information storage unit that stores the interface information on the type and number of each such class of the installed said interface to said board,
When the board is connected, an identification information acquisition unit that acquires the identification information of the board;
Based on said prior Symbol identification information identifying information acquiring unit has acquired, from the interface information in which the interface information storage unit stores, identifies the connected the board, the installation has been said interface to said board identified An identification unit for identifying the type and the number ;
An information processing apparatus comprising: For the identification information acquisition unit, the board outputs an identification signal corresponding to the identification information,
The information processing apparatus according to claim 1, further comprising: An interface control unit for controlling the interface installed on the board to an operable state;
A switching unit that switches the interface control unit corresponding to the interface identified by the identification unit to a valid state;
The information processing apparatus according to claim 1, further comprising: In an information processing apparatus identification method to which an electronic device is connected,
Said electronic device interface corresponding is installed, when removable board with identification information for identifying itself is connected, it acquires the identification information before Symbol board,
Based on the collected Tokushi the previous SL identification information associated with the prior SL identification information, from the interface information about the number of each type and the type of the installed said interface to said board, to identify the connected the board , identifying the type and the number of the interfaces installed in the board identified,
A method for identifying an information processing apparatus. In an identification program for an information processing device to which an electronic device is connected,
On the computer,
When an interface corresponding to the electronic device is installed and a detachable board having identification information for identifying itself is connected, the identification information of the board is acquired,
Based on the acquired pre-Symbol identification information associated with the prior SL identification information, from the interface information about the number of each type and the type of the installed said interface to said board, to identify the connected said board, make identifying the type and the number of the installed the interface to the board identified,
An identification program for an information processing apparatus, characterized by causing a process to be executed. An interface corresponding to the identification information of a detachable board having identification information for identifying itself, in which an interface corresponding to the electronic device is installed, and an interface related to the type of the interface installed on the board and the number of each type An interface information storage unit for storing information;
When the board is connected, an identification information acquisition unit that acquires the identification information of the board;
Based on said prior Symbol identification information identifying information acquiring unit has acquired, from the interface information in which the interface information storage unit stores, identifies the connected the board, the installation has been said interface to said board identified An identification unit for identifying the type and the number ;
A motherboard characterized by comprising:

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