JP5399980B2 - Dry etching method - Google Patents

Description

  The present invention relates to a dry etching method for InP.

  Responding to recent high-speed and large-capacity communication technologies, expectations for semiconductor devices such as transistors capable of high-speed operation manufactured using InP-based materials instead of GaAs-based materials used in the past have increased. doing.

  In order to sufficiently bring out the performance of a semiconductor device in a high frequency band such as the millimeter wave band, a via formation technique that makes it possible to strengthen the ground, improve the heat dissipation of the semiconductor device, and facilitate mounting on a substrate is important. In order to realize this technique, an etching technique for forming a via hole penetrating the substrate is required in a semiconductor device (InP substrate) thinned to a thickness of about 50 to 100 μm.

  Since the InP substrate thinned to a thickness of about 50 to 100 μm is very brittle, it is necessary to perform the process by attaching it to a support substrate such as glass using an adhesive, but the heat resistance of such an adhesive Is as low as 200 ° C. or less. Considering the process margin, the etching temperature is desirably 180 ° C. or lower.

  The wet etching method can etch an InP substrate at about room temperature, but the amount of side etching that causes the etching to proceed in the plane direction of the substrate is large, and InP has an etching rate depending on the crystal plane direction compared to GaAs. Since the anisotropy is strong, it is difficult to form a via hole having a practical size.

  On the other hand, in the dry etching method, the amount of side etching can be reduced, and crystal anisotropy is not a problem. However, when chlorine gas that enables dry etching of InP is used, the vapor pressure of indium chloride, which is a reaction product of InP and chlorine gas, is low. Needed. Therefore, there is a problem that a sufficient etching rate cannot be obtained at 200 ° C. or lower.

  Technology for enabling dry etching at a lower temperature (about 100 ° C.) by using hydrogen iodide gas or a mixed gas of hydrogen iodide gas and chlorine gas to solve the above-described problem of dry etching using chlorine gas. Has been proposed (see Non-Patent Document 1).

K. Kotani, et.al., “High Etch Rate and Low Temperature InP Backside Via Etching Using HI-based Inductively Coupled Plasma”, 2004 International Conference on Indium Phosphide and Related Materials, Conference proceedings, 16th IPRM, pp.717-720 , 2004

  When dry etching with hydrogen iodide gas is performed, the substrate temperature can be etched at around 100 ° C., so a general photoresist is used as a mask pattern. However, if the etching power is increased in order to increase the etching rate, the temperature of the mask surface rises considerably, so that the mask pattern is deformed and a desired shape cannot be obtained. In order to suppress the deformation of the mask pattern, it is necessary to keep the etching power low, and there is a problem that a sufficient etching rate cannot be obtained. The same applies to the case of hydrogen bromide gas often used for etching an InP substrate.

  On the other hand, there is a method of using a metal such as nickel having excellent heat resistance as a mask used for etching. However, in dry etching, the mask metal is also slightly etched. A part of the etched metal is reattached to the via hole portion, and the reattached matter becomes a fine mask pattern, resulting in a problem of lack of stability such as generation of an etching residue.

  The present invention has been made to solve the above-described problems, and an object of the present invention is to improve productivity by enabling an InP substrate to be etched at a high speed by a dry etching method even at a low temperature.

The dry etching method of the present invention includes a first insulating layer forming step of forming a first insulating layer made of an inorganic insulating material on a semiconductor substrate made of InP, and a first insulating layer made of an organic insulating material on the first insulating layer. A second insulating layer forming step of forming two insulating layers, and a mask pattern forming step of patterning the first insulating layer and the second insulating layer to form a mask pattern having an opening through which the surface of the semiconductor substrate is exposed And selectively etching the semiconductor substrate using the mask pattern as a mask by a dry etching method using hydrogen iodide gas or hydrogen bromide gas at a temperature condition of 180 ° C. or lower to form an opening pattern in the semiconductor substrate. at least a opening pattern formation step of the organic insulating material is heat resistant temperature 180 ° C. or higher, polyimide, Benzoshikurobu Emissions, polybenzoxazole, is characterized in that one selected from among arylene ether based polymer, siloxane-based polymer, and an aromatic hydrocarbon-based polymer.
In one configuration example of the dry etching method of the present invention, the inorganic insulating material is selected from silicon oxide, silicon nitride, and silicon oxynitride .

  As described above, according to the present invention, hydrogen iodide gas or hydrogen bromide is formed using the mask pattern formed of the first insulating layer made of an inorganic insulating material and the second insulating layer made of an organic insulating material as a mask. Since the semiconductor substrate made of InP is etched by a dry etching method using a gas, an excellent effect is obtained that the semiconductor substrate made of InP can be etched at a high speed by the dry etching method even at a low temperature. In the present invention, even when a thin semiconductor substrate is attached to a support substrate with an adhesive, high-speed etching is possible at a temperature lower than the heat resistant temperature of the adhesive. In the present invention, since the etching power can be kept low, deformation of the mask pattern can be suppressed. In the present invention, since it is not necessary to use a metal such as nickel for the mask used for etching, etching can be performed in a stable state.

FIG. 1A is a cross-sectional view showing a state in each step of a dry etching method according to an embodiment of the present invention. FIG. 1B is a cross-sectional view showing a state in each step of the dry etching method according to the embodiment of the present invention. FIG. 1C is a cross-sectional view showing a state in each step of the dry etching method according to the embodiment of the present invention. FIG. 1D is a cross-sectional view showing a state in each step of the dry etching method according to the embodiment of the present invention. FIG. 1E is a cross-sectional view showing a state in each step of the dry etching method according to the embodiment of the present invention. FIG. 1F is a cross-sectional view showing a state in each step of the dry etching method according to the embodiment of the present invention. FIG. 1G is a cross-sectional view showing a state in each step of the dry etching method according to the embodiment of the present invention. FIG. 1H is a cross-sectional view showing a state in each step of the dry etching method according to the embodiment of the present invention. FIG. 1I is a cross-sectional view showing a state in each step of the dry etching method according to the embodiment of the present invention.

  Hereinafter, embodiments of the present invention will be described with reference to the drawings. First, as shown in FIG. 1A, an InP substrate 101 is bonded onto a glass support substrate 102 using an adhesive 103, for example. Next, as shown in FIG. 1B, the InP substrate 101 is polished to reduce the thickness to 50 μm.

  Next, as shown in FIG. 1C, a first insulating layer 104 made of an inorganic insulating material is formed on the InP substrate 101. For example, the first insulating layer 104 having a thickness of about 0.1 μm may be formed by depositing silicon oxide on the InP substrate 101 by sputtering.

  Next, as shown in FIG. 1D, a second insulating layer 105 made of an organic insulating material is formed on the first insulating layer 104. For example, benzocyclobutene, which is an organic insulating material, is applied by spin coating, and this coating film is heat-treated under a heating condition of 180 ° C. for 1 hour to be thermally cured, whereby the second insulating layer 105 having a layer thickness of 15 μm. May be formed. Thus, by using an organic insulating material, a thick insulating layer exceeding 10 μm can be easily formed.

  In this embodiment, since the second insulating layer 105 is formed using an organic insulating material, a large stress does not occur even if the thickness of the second insulating layer 105 is increased, and the InP substrate 101 can be prevented from being damaged. As is well known, when an inorganic insulating material such as silicon oxide or silicon nitride is formed in a layer having a thickness of about 10 μm, a large stress is generated, and a crack or the like is generated in a substrate on which such a layer is formed. There is a case. On the other hand, in this embodiment, by using the organic insulating material as described above, the InP substrate 101 is not damaged even when a thick layer of 15 μm is formed.

  Further, according to the present embodiment, since the first insulating layer 104 is provided between the second insulating layer 105 and the InP substrate 101, the second insulating layer 105 made of an organic insulating material from the InP substrate 101 is provided. It becomes possible to suppress peeling. In general, the organic insulating material does not have good adhesion to the InP substrate. On the other hand, the inorganic insulating material layer has good adhesion to both the organic insulating material layer and the InP substrate. Therefore, by providing the first insulating layer 104, peeling of the second insulating layer 105 can be suppressed. Thus, since the first insulating layer 104 is formed to improve adhesion, it may be formed to have a uniform film thickness, for example, and may have a layer thickness of about 0.1 μm as described above. Therefore, the presence of the first insulating layer 104 does not generate a large stress, and the InP substrate 101 is not damaged.

  Next, as illustrated in FIG. 1E, a resist pattern 106 including an opening 106 a is formed on the second insulating layer 105. For example, a resist pattern 106 may be formed by applying a well-known photoresist to form a photoresist film having a thickness of about 20 μm and patterning the formed photoresist film by a known photolithography technique. The resist pattern 106 is formed with a thickness of about 20 μm.

Next, as shown in FIG. 1F, the second insulating layer 105 and the first insulating layer 104 are patterned by selective etching using the resist pattern 106 as a mask to form an opening 107 through which the surface of the InP substrate 101 is exposed. To do. For example, the second insulating layer 105 and the first insulating layer 104 may be selectively etched by a reactive ion etching (RIE) method using a mixed gas of CF ₄ and oxygen.

  Next, the resist pattern 106 is removed, and a mask pattern 108 having an opening 107 is formed on the InP substrate 101 as shown in FIG. 1G. The mask pattern 108 includes a first insulating layer 104 and a second insulating layer 105 and includes an opening 107. The resist pattern 106 can be removed (peeled) by dissolving it in an organic solvent, for example. At this time, the second insulating layer 105 made of benzocyclobutene does not dissolve in a general organic solvent that dissolves the photoresist. In other words, an organic solvent that does not dissolve the second insulating layer 105 may be used to remove the resist pattern 106.

  Next, by selectively etching the InP substrate 101 using the mask pattern 108 as a mask, for example, by dry etching using hydrogen iodide gas, a via hole (opening pattern) 109 is formed in the InP substrate 101 as shown in FIG. 1H. Form. For example, the InP substrate 101 may be etched by a reactive ion etching method using hydrogen iodide gas at a temperature condition of about 100 ° C.

Finally, if the mask pattern 108 is removed, as shown in FIG. 1I, an InP substrate 101 having a via hole 109 therethrough is obtained. For example, the mask pattern 108 composed of the first insulating layer 104 and the second insulating layer 105 can be selectively removed by reactive ion etching using a mixed gas of CF ₄ and oxygen.

According to the above-described embodiment, 50 μm is obtained by a generally used semiconductor device manufacturing process such as dry etching using a gas such as CF ₄ , oxygen, and hydrogen iodide gas, spin coating, and peeling using a solvent. A penetrating opening pattern can be formed on an InP substrate having a thickness exceeding. Thus, according to the present embodiment, the etching rate can be increased even at a low temperature, and productivity can be improved.

  It should be noted that the present invention is not limited to the embodiment described above, and that many modifications can be implemented by those having ordinary knowledge in the art within the technical idea of the present invention. It is obvious. For example, in this embodiment, silicon oxide is used as the inorganic insulating material. However, the present invention is not limited to this. For example, an inorganic insulating material such as silicon nitride or silicon oxynitride may be used.

  In this embodiment, the temperature condition is set to 100 ° C. in the dry etching process of the InP substrate using hydrogen iodide gas or hydrogen bromide gas, but this temperature condition may be 180 ° C. or less.

  In this embodiment, benzocyclobutene is used as the organic insulating material. However, the organic insulating material is not limited to this, and polyimide, polybenzoxazole, arylene ether polymer, siloxane polymer, or aromatic hydrocarbon polymer. An organic insulating material such as can be used. These organic insulating materials may be photosensitive or non-photosensitive, and may have a heat resistance temperature equal to or higher than the temperature condition in the dry etching process of the InP substrate using hydrogen iodide gas or hydrogen bromide gas.

  In the dry etching process using hydrogen iodide gas or hydrogen bromide gas, the temperature condition may be set to 180 ° C. at the maximum as described above. Therefore, the heat resistance temperature of the organic insulating material may be 180 ° C. or higher. it is conceivable that. Therefore, as the organic insulating material, any one of benzocyclobutene, polyimide, polybenzoxazole, arylene ether-based polymer, siloxane-based polymer, and aromatic hydrocarbon-based polymer having a heat resistant temperature of 180 ° C. or higher may be used. . With these materials, pattern deformation or alteration is not caused in the dry etching process under a temperature condition of 180 ° C. or lower.

  In this embodiment, hydrogen iodide gas or hydrogen bromide gas is used in the dry etching process of the InP substrate. However, this dry etching is not limited to only hydrogen iodide or hydrogen bromide. Alternatively, a mixed gas in which hydrogen iodide or hydrogen bromide is the main gas and argon, helium, nitrogen, or oxygen is added may be used.

  In this embodiment, the RIE method using a photoresist as a mask is used in the patterning process of the organic insulating material. However, when the organic insulating material is photosensitive, patterning is performed by a general photolithography technique. Also good.

  The present invention can be applied to InP dry etching technology.

  DESCRIPTION OF SYMBOLS 101 ... InP board | substrate, 102 ... Support substrate, 103 ... Adhesive agent, 104 ... 1st insulating layer, 105 ... 2nd insulating layer, 106 ... Resist pattern, 106a ... Opening part, 107 ... Opening part, 108 ... Mask pattern, 109 ... via hole (opening pattern).

Claims (2)

A first insulating layer forming step of forming a first insulating layer made of an inorganic insulating material on a semiconductor substrate made of InP;
A second insulating layer forming step of forming a second insulating layer made of an organic insulating material on the first insulating layer;
A mask pattern forming step of patterning the first insulating layer and the second insulating layer to form a mask pattern having an opening through which the surface of the semiconductor substrate is exposed;
An opening for selectively etching the semiconductor substrate using the mask pattern as a mask by a dry etching method using hydrogen iodide gas or hydrogen bromide gas at a temperature condition of 180 ° C. or lower to form an opening pattern in the semiconductor substrate And at least a pattern forming step ,
The organic insulating material is selected from polyimide, benzocyclobutene, polybenzoxazole, arylene ether-based polymer, siloxane-based polymer, and aromatic hydrocarbon-based polymer having a heat resistant temperature of 180 ° C. or higher. A dry etching method characterized by the above. The dry etching method according to claim 1 ,
The dry etching method, wherein the inorganic insulating material is selected from silicon oxide, silicon nitride, and silicon oxynitride.

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