JP5708285B2 - Semiconductor light emitting device and semiconductor light emitting device - Google Patents

Description

  The present invention relates to a semiconductor light emitting element and a semiconductor light emitting device.

  In a semiconductor light emitting device, a bonding pad is usually formed on a transparent electrode at a portion connected to a bonding wire such as gold (Au). Recently, flip chip bonding (FC) mounting technology has been developed in which a semiconductor light emitting element formed on a substrate that is transparent to the emission wavelength is turned over and mounted on a circuit board (submount) or package.

  For example, Patent Document 1 discloses a translucent substrate, a semiconductor layer in which an n-type semiconductor layer / a light emitting layer / p-type semiconductor layer are stacked, a negative electrode bonded to the n-type semiconductor layer, and a p-type semiconductor layer. There is described a flip-chip type semiconductor light emitting device including a positive electrode bonded to the positive electrode and a positive electrode pad and a negative electrode pad connected to the positive electrode and the negative electrode, respectively.

JP 2007-173269 A

By the way, according to the FC mounting technology, the absorption of light emitted from the light emitting layer tends to decrease by reducing the film thickness of the transparent conductive layer constituting the positive electrode. On the other hand, when the film thickness of the transparent conductive layer is excessively reduced, the sheet resistance tends to increase. Therefore, current diffusion becomes poor, and the forward voltage (Vf) may increase.
In addition, light is output from the light emitting layer in directions other than the substrate side and the opposite side of the substrate, and there is a problem that such light does not contribute to improvement of light extraction efficiency.
An object of the present invention is to improve the light extraction efficiency by suppressing the increase of the forward voltage (Vf) and increasing the light emission output (Po) in the FC (flip chip) mounting technology of the semiconductor light emitting device. .

According to the present invention, the following [1] to [10] are provided.
[1] The invention according to claim 1 is the first semiconductor layer having the first conductivity type, the light emitting layer, and the second conductivity type having the second conductivity type opposite to the first conductivity type. A stacked semiconductor layer on which the semiconductor layers are stacked, a first electrode connected to the first semiconductor layer, and a second electrode provided on a surface of the second semiconductor layer, The electrode includes a transparent conductive layer having a plurality of film thickness portions that are thicker than other portions and exhibiting light transmittance with respect to light emitted from the light emitting layer, and is laminated on the transparent conductive layer. And a first insulating layer having a first refractive index and exhibiting optical transparency with respect to light emitted from the light emitting layer, and a second refractive index higher than the first refractive index. A multilayer insulating layer configured by alternately laminating second insulating layers exhibiting optical transparency with respect to light emitted from the layer, and on the multilayer insulating layer A metal reflective layer exhibiting reflective to light emitted from the light emitting layer and having a stacked and electrically conductive, said formed through a multilayer insulating layer, electrically to the thickness of one end the transparent conductive layer And a conductor portion electrically connected to the metal reflective layer at the other end.

[2] In the invention according to claim 2, the transparent conductive layer has a base portion formed so as to continuously cover the surface of the second semiconductor layer, and a film thickness from the base portion on the multilayer insulating layer side. 2. The semiconductor light emitting element according to claim 1, comprising a plurality of the film thickness portions formed so as to have large convex portions.
[3] The invention according to claim 3 is the semiconductor light-emitting element according to claim 2, wherein the convex portions of the transparent conductive layer are arranged on the base portion with a certain interval. .
[4] In the invention according to claim 4, the film-thickness portion of the transparent conductive layer includes a first convex portion disposed on the base portion with a certain interval, and the first convex portion being connected to each other. a semiconductor light-emitting device according to claim 2 or 3, characterized in that it constitutes a grid pattern and a second protrusion linear binding.
The arrangement pattern of the plurality of film thickness portions formed on the transparent conductive layer is not limited to the lattice pattern, and a predetermined interval is provided on the base portion that continuously covers the surface of the second semiconductor layer. Patterns formed at regular intervals or randomly (referred to as “isolated patterns”) may be used.
[5] The invention according to claim 5 is characterized in that the multilayer insulating layer has a structure in which one second insulating layer is sandwiched between two first insulating layers. It is a semiconductor light emitting element of any one.
[6] The invention according to claim 6 is characterized in that the multilayer insulating layer has the first refractive index on the surface on the transparent conductive layer side and on the surface on the metal reflective layer side, respectively. The semiconductor light-emitting device according to claim 1, wherein
[7] The semiconductor device according to any one of [1] to [6], wherein a plurality of the conductor portions are formed so as to be distributed over the entire multilayer insulating layer. It is a light emitting element.
[8] The invention according to claim 8 is used for a first connector used for electrical connection between the first electrode and the outside, and an electrical connection between the second electrode and the outside. A semiconductor light emitting element according to claim 1, further comprising a second connector.

[9] An invention according to claim 9 is a semiconductor light emitting device including a semiconductor light emitting element and a circuit board on which the semiconductor light emitting element is mounted, the semiconductor light emitting element including an n-type semiconductor layer, a light emitting layer, and a p-type. A laminated semiconductor layer in which semiconductor layers are laminated; a negative electrode connected to the n-type semiconductor layer; and a positive electrode provided on a surface of the p-type semiconductor layer, wherein the positive electrode is opposite to the laminated semiconductor layer side A transparent conductive layer having a plurality of convex portions and containing indium; and a layer that is laminated on the convex portion side of the transparent conductive layer and has a first refractive index and emits light with respect to light emitted from the light emitting layer. A first insulating layer exhibiting transparency and a second insulating layer having a second refractive index higher than the first refractive index and exhibiting optical transparency with respect to light emitted from the light emitting layer are alternately arranged. A multilayer insulating layer formed by laminating, and silver laminated on the multilayer insulating layer Wherein the metal reflective layer exhibiting reflective to light emitted from the light-emitting layer, electrically connected and the other end the said projecting portion of the one end is formed through the multilayer dielectric layer is the transparent conductive layer together comprises A semiconductor light emitting device including a plurality of conductor portions electrically connected to the metal reflective layer, wherein the circuit board is disposed to face the positive electrode of the semiconductor light emitting element.
[10] The invention according to claim 10 is characterized in that the circuit board includes a pair of wirings respectively connected to the negative electrode and the positive electrode of the semiconductor light emitting element by connectors. This is a semiconductor light emitting device.

  According to the present invention, the forward voltage (Vf) is increased as compared with a semiconductor light emitting device not having a multilayer insulating layer composed of a plurality of insulating layers having different refractive indexes from a transparent conductive layer not having a plurality of film thickness portions. The light emission output (Po: unit mW) increases while suppressing the above.

It is a cross-sectional schematic diagram which shows an example of a semiconductor light-emitting device. It is a cross-sectional schematic diagram which shows an example of a semiconductor light-emitting device. It is a plane schematic diagram which shows an example of a semiconductor light-emitting device. It is a cross-sectional schematic diagram which shows an example of a laminated semiconductor. It is a cross-sectional schematic diagram which shows an example of a 1st electrode. It is a cross-sectional schematic diagram which shows an example of a 2nd electrode. It is a cross-sectional schematic diagram of a part of the second electrode shown in FIG. It is a cross-sectional schematic diagram which shows an example of the layer structure of a multilayer insulating layer. It is a figure which shows an example of the arrangement pattern of the film thickness part provided in the transparent conductive layer. It is a figure which shows an example of the grid | lattice pattern of the film thickness part provided in the transparent conductive layer. It is a figure which shows another example of the isolated pattern of the film thickness part provided in the transparent conductive layer. It is a figure which shows another example of the arrangement pattern of the film thickness part provided in the transparent conductive layer. It is a figure which shows the measurement result of angle distribution of the emitted light intensity in a semiconductor light-emitting device.

  DESCRIPTION OF EMBODIMENTS Hereinafter, embodiments (embodiments) for carrying out the present invention will be described in detail. The present invention is not limited to the following embodiments, and various modifications can be made within the scope of the invention. The drawings used are examples for explaining the present embodiment and do not represent actual sizes.

<Semiconductor light emitting device 1>
FIG. 1 is a schematic cross-sectional view showing an example of a semiconductor light emitting device 1 to which the present embodiment is applied. The semiconductor light emitting device 1 includes a semiconductor light emitting element 10 that emits light and a submount 15 as an example of a circuit board. The submount 15 fixes the semiconductor light emitting element 10 and is provided with wiring for supplying power to the semiconductor light emitting element 10.

The semiconductor light emitting device 10 includes a substrate 110, an intermediate layer 120, a base layer 130, and a laminated semiconductor layer 100. The semiconductor light emitting element 10 includes a first electrode 180 that functions as a negative electrode and a second electrode 170 that functions as a positive electrode, as an example of a pair of positive and negative connection electrodes. The laminated semiconductor layer 100 includes an n-type semiconductor layer 140, a light emitting layer 150, and a p-type semiconductor layer 160, as will be described later. Note that the first electrode 180 is provided in a part of the stacked semiconductor layer 100 that is cut away.
In addition, a protective layer 190 is provided to cover the surface and side surfaces of the intermediate layer 120, the base layer 130, and the stacked semiconductor layer 100 except for part of the surfaces of the first electrode 180 and the second electrode 170. Details of the semiconductor light emitting element 10 will be described later.

  The submount 15 includes a submount substrate 10B, submount wirings 11 and 12 provided on the submount substrate 10B, the first electrode 180 and the second electrode 170 of the semiconductor light emitting element 10, and the submount wirings 11 and 12. Bumps 21 and 22 are provided as an example of connectors that electrically connect the two.

  In FIG. 1, the semiconductor light emitting element 10 has the substrate 110 side positioned on the upper side. That is, the semiconductor light emitting element 10 is turned over and mounted on the submount 15. Thus, mounting the semiconductor light emitting element 10 upside down on the submount 15 is called flip chip (FC) mounting or flip chip (FC) bonding. Further, since the semiconductor light emitting device 10 is mounted upside down, this mounting format is also referred to as face-down (FD) mounting.

  The light extraction in this embodiment will be described. Of the light emitted from the laminated semiconductor layer 100 of the semiconductor light emitting element 10 (specifically, the light emitting layer 150 in FIG. 2 described later), the light (arrow B) traveling toward the substrate 110 is extracted outside (arrow D). ). On the other hand, of the light emitted from the light emitting layer 150, the light traveling to the second electrode 170 side (arrow A) is provided on the second electrode 170 and is reflective to the light emitted from the light emitting layer 150. The light is reflected by a reflective layer (a multilayer insulating layer 172 and a second metal reflective layer 173a shown in FIG. 6, which will be described later), is taken out toward the substrate 110 side, and taken out to the outside (upward direction in FIG. 1). In addition, there is also light extracted from the side surfaces of the stacked semiconductor layer 100, the intermediate layer 120, and the base layer 130 to the outside. Hereinafter, a detailed configuration will be described in the order of the submount 15 and the semiconductor light emitting element 10.

(Submount 15)
The submount substrate 10B of the submount 15 is not particularly limited, and for example, an insulating or conductive material such as a ceramic substrate, an AlN (aluminum nitride) substrate, an Al (aluminum) substrate, a Cu (copper) substrate, or a glass epoxy substrate. Various substrates can be selected and used.
When a conductive substrate such as an Al substrate is used, at least one of the submount wirings 11 and 12 is provided via an insulating layer in order to electrically insulate the submount wirings 11 and 12 from the submount substrate 10B. It has been.
As the bumps 21 and 22 that connect the first electrode 180 and the second electrode 170 of the semiconductor light emitting element 10 and the submount wirings 11 and 12 of the submount substrate 10B, for example, Au (Sn (tin) added Au (tin) Au-Sn alloy) balls and solder balls can be used. In particular, an Au—Sn alloy having a heating temperature of about 300 ° C. at the time of connection (crimping) is preferable.
Hereinafter, a detailed configuration of the semiconductor light emitting element 10 will be described.

<Semiconductor light emitting element 10>
FIG. 2 is a schematic cross-sectional view showing an example of the semiconductor light emitting device 10. FIG. 3 is a schematic plan view showing an example of the semiconductor light emitting element 10 viewed from the III direction in FIG. FIG. 4 is a schematic cross-sectional view showing an example of a laminated semiconductor constituting the semiconductor light emitting element 10. 2 is a cross-sectional view taken along the line II-II of the semiconductor light emitting device 10 shown in FIG.
As shown in FIG. 2, the semiconductor light emitting element 10 includes a substrate 110, an intermediate layer 120 stacked on the substrate 110, and a base layer 130 stacked on the intermediate layer 120. In addition, the semiconductor light emitting element 10 includes a laminated semiconductor layer 100 that is laminated on the base layer 130. The stacked semiconductor layer 100 includes an n-type semiconductor layer 140 as a first semiconductor layer having the first conductivity type, a light-emitting layer 150 stacked on the n-type semiconductor layer 140, and a light-emitting layer from the base layer 130 side. A p-type semiconductor layer 160 serving as a second semiconductor layer having a second conductivity type opposite to the first conductivity type stacked on 150 is formed.

  The semiconductor light emitting element 10 includes a stacked p-type semiconductor layer 160, a light emitting layer 150, a first electrode 180, and a second electrode 170. The first electrode 180 is formed on the semiconductor layer exposed surface 140 c exposed by cutting out a part of the n-type semiconductor layer 140. The second electrode 170 is formed on the upper surface 160 c of the p-type semiconductor layer 160. The detailed structure of the first electrode 180 and the second electrode 170 will be described later.

  The semiconductor light emitting device 10 includes a first electrode 180 and a second electrode 170, a p-type semiconductor layer 160, a light emitting layer 150, and a part of the n-type semiconductor layer 140 (on the light emitting layer 150 side from the semiconductor layer exposed surface 140c). A protective layer 190 is further provided. However, the protective layer 190 is formed on the entire side wall surface of the p-type semiconductor layer 160, the light emitting layer 150, and a part of the n-type semiconductor layer 140 (on the light emitting layer 150 side with respect to the semiconductor layer exposed surface 140c) and part of the substrate 110 It is formed so as to cover the upper surface 110c.

  A part of the upper surface in FIG. 2 is exposed to the first electrode 180 and is used for electrical connection with the outside by a bump (first connector) 21 as will be described later. A first opening 180a is formed. Similarly, with respect to the second electrode 170, a part of the upper surface in FIG. 2 is exposed and, as will be described later, the bump (second connector) 22 is electrically connected to the outside. A second opening 170a used in the above is formed.

  The semiconductor light emitting device 10 of the present embodiment has a structure in which a first electrode 180 and a second electrode 170 are formed on one surface side opposite to the substrate 110. In this semiconductor light emitting device 10, the first electrode 180 is a negative electrode and the second electrode 170 is a positive electrode, and the stacked semiconductor layer 100 (more specifically, the p-type semiconductor layer 160, the light emitting layer 150, and the n is interposed therebetween). The light emitting layer 150 emits light by passing a current through the type semiconductor layer 140).

Next, as shown in FIG. 3, when viewed in plan (schematic plan view of the semiconductor light emitting element 10 shown in FIG. 2 from the III direction), the first electrode 180 is one of the substrates 110 having a square planar shape. It is formed in a part close to the corner part. The first electrode 180 is formed on the exposed semiconductor layer exposed surface 140c, and a first opening 180a used for electrical connection with the outside is formed on the upper surface of the first electrode 180. ing.
The second electrode 170 is formed so as to cover substantially the entire upper surface 160c of the p-type semiconductor layer 160, except for a portion that is partially removed by means such as etching to form the first electrode 180. Yes. On the upper surface of the second electrode 170, the second electrode 170 is exposed, and a second opening 170a used for electrical connection with the outside is formed. Further, as will be described later, a plurality of conductor portions 176 are provided to electrically connect the film thickness portion 171b provided in the transparent conductive layer 171 (see FIG. 6) constituting the second electrode 170 and the metal reflective layer. ing. In FIG. 3, the protective layer 190 that covers the surfaces of the first electrode 180 and the second electrode 170 is omitted.
Next, each layer of the semiconductor light emitting element 10 will be described.

(Substrate 110)
The substrate 110 is not particularly limited as long as a group III nitride semiconductor crystal is epitaxially grown on the surface, and various substrates can be selected and used. However, as will be described later, the semiconductor light emitting element 10 of the present embodiment is flip-chip mounted so as to extract light from the substrate 110 side, and thus has light transmittance with respect to light emitted from the light emitting layer 150. It is preferable. For example, sapphire, zinc oxide, magnesium oxide, zirconium oxide, magnesium aluminum oxide, gallium oxide, indium oxide, lithium gallium oxide, lithium aluminum oxide, neodymium gallium oxide, lanthanum strontium aluminum tantalum, strontium titanium oxide, titanium oxide, etc. A substrate 110 can be used.
Further, among the above materials, it is particularly preferable to use sapphire whose C surface is a main surface as the substrate 110. When sapphire is used as the substrate 110, an intermediate layer 120 (buffer layer) is preferably formed on the C surface of sapphire.

(Laminated semiconductor layer 100)
The laminated semiconductor layer 100 as an example of the group III nitride semiconductor layer is a layer made of, for example, a group III nitride semiconductor, and as shown in FIG. 2, an n-type semiconductor layer 140, a light emitting layer are formed on the substrate 110. The layers 150 and p-type semiconductor layer 160 are stacked in this order. As shown in FIG. 4, each of the n-type semiconductor layer 140, the light emitting layer 150, and the p-type semiconductor layer 160 may be composed of a plurality of semiconductor layers. The laminated semiconductor layer 100 may further be referred to as including the base layer 130 and the intermediate layer 120. Here, the n-type semiconductor layer 140 conducts electricity in the first conductivity type using electrons as carriers, and the p-type semiconductor layer 160 conducts electricity in the second conductivity type using holes as carriers. Do.
Note that although the stacked semiconductor layer 100 can be formed with a good crystallinity when formed by the MOCVD method, a semiconductor layer having a crystallinity superior to that of the MOCVD method can be formed by optimizing the conditions also by the sputtering method. . Hereinafter, description will be made sequentially.

(Intermediate layer 120)
The intermediate layer 120 is preferably made of polycrystalline _{Al x Ga 1-x N (} 0 ≦ x ≦ 1) , and more preferably those of the single crystal _{Al x Ga 1-x N (} 0 ≦ x ≦ 1) .
As described above, the intermediate layer 120 can be, for example, made of polycrystalline Al _x Ga _1-x N (0 ≦ x ≦ 1) and having a thickness of 0.01 to 0.5 μm. If the thickness of the intermediate layer 120 is less than 0.01 μm, the intermediate layer 120 may not sufficiently obtain an effect of relaxing the difference in lattice constant between the substrate 110 and the base layer 130. In addition, when the thickness of the intermediate layer 120 exceeds 0.5 μm, the film forming process time of the intermediate layer 120 becomes longer and the productivity may be lowered, although the function as the intermediate layer 120 is not changed. There is.
The intermediate layer 120 has a function of reducing the difference in lattice constant between the substrate 110 and the base layer 130 and facilitating formation of a C-axis oriented single crystal layer on the (0001) plane (C plane) of the substrate 110. . Therefore, the base layer 130 with better crystallinity can be stacked via the intermediate layer 120. In the present embodiment, it is preferable to form the intermediate layer 120, but it may not be performed.

  The intermediate layer 120 may have a hexagonal crystal structure made of a group III nitride semiconductor. The group III nitride semiconductor crystal forming the intermediate layer 120 preferably has a single crystal structure. By controlling the growth conditions, the group III nitride semiconductor crystal grows not only in the upward direction but also in the in-plane direction to form a single crystal structure. Therefore, by controlling the film forming conditions of the intermediate layer 120, the intermediate layer 120 made of a crystal of a group III nitride semiconductor having a single crystal structure can be obtained. When the intermediate layer 120 having such a single crystal structure is formed on the substrate 110, the buffer function of the intermediate layer 120 works effectively, so that the group III nitride semiconductor formed thereon has a good orientation. It becomes a crystal film having the property and crystallinity.

(Underlayer 130)
As the underlayer 130, Al _x Ga _y In _z N (0 ≦ x ≦ 1, 0 ≦ y ≦ 1, 0 ≦ z ≦ 1, x + y + z = 1) can be used, but Al _x Ga _1-x N It is preferable to use (0 ≦ x <1) because the base layer 130 with good crystallinity can be formed.
The film thickness of the underlayer 130 is preferably 0.1 μm or more, more preferably 0.5 μm or more, and most preferably 1 μm or more. An Al _x Ga _1-x N layer with good crystallinity is more easily obtained when the thickness is increased. Further, the film thickness of the underlayer 130 is preferably 15 μm or less, and more preferably 10 μm or less, in terms of production cost.
In order to improve the crystallinity of the underlayer 130, it is desirable that the underlayer 130 is not doped with impurities. However, when p-type or n-type conductivity is required, acceptor impurities or donor impurities can be added.

(N-type semiconductor layer 140)
As shown in FIG. 4, for example, an n-type semiconductor layer 140 using electrons as carriers as an example of a first semiconductor layer having a first conductivity type includes an n-contact layer 140a and an n-cladding layer 140b. Preferably it is done. The n contact layer 140a can also serve as the n clad layer 140b. In addition, the base layer 130 described above may be included in the n-type semiconductor layer 140.
The n contact layer 140 a is a layer for providing the first electrode 180. The n contact layer 140a is preferably composed of an Al _x Ga _1-x N layer (0 ≦ x <1, preferably 0 ≦ x ≦ 0.5, more preferably 0 ≦ x ≦ 0.1). .

The n-contact layer 140a is preferably doped with an n-type impurity, and the n-type impurity is preferably 1 × 10 ¹⁷ to 1 × 10 ²⁰ / cm ³ , preferably 1 × 10 ¹⁸ to 1 × 10 ¹⁹ / cm. ^It is preferable that it is contained at a concentration of ³ in that good ohmic contact with the second electrode 170 can be maintained. Although it does not specifically limit as an n-type impurity, For example, Si, Ge, Sn, etc. are mentioned, Preferably Si and Ge are mentioned.
The film thickness of the n contact layer 140a is preferably set to 0.5 μm to 5 μm, and more preferably set to a range of 1 μm to 3 μm. When the thickness of the n-contact layer 140a is in the above range, the crystallinity of the semiconductor is maintained well.

An n-clad layer 140b is preferably provided between the n-contact layer 140a and the light emitting layer 150. The n-cladding layer 140b is a layer that injects carriers into the light emitting layer 150 and confines carriers. The n-clad layer 140b can be formed of AlGaN, GaN, GaInN, or the like. In the present specification, the composition ratio of each element may be omitted and described as AlGaN or GaInN. Alternatively, a heterojunction of these structures or a superlattice structure in which a plurality of layers are stacked may be used. When the n-cladding layer 140b is formed of GaInN, it is desirable to make it larger than the band gap of GaInN of the light emitting layer 150.
The thickness of the n-cladding layer 140b is not particularly limited, but is preferably 0.005 to 0.5 μm, and more preferably 0.005 to 0.1 μm. The n-type doping concentration of the n-clad layer 140b is preferably 1 × 10 ¹⁷ to 1 × 10 ²⁰ / cm ³ , more preferably 1 × 10 ¹⁸ to 1 × 10 ¹⁹ / cm ³ . A doping concentration within this range is preferable in terms of maintaining good crystallinity and reducing the operating voltage of the light emitting element.

  When the n-cladding layer 140b is a layer including a superlattice structure, a detailed illustration is omitted, but an n-side first layer made of a group III nitride semiconductor having a thickness of 100 angstroms or less and It may include a structure in which an n-side second layer made of a group III nitride semiconductor having a composition different from that of the n-side first layer and having a film thickness of 100 angstroms or less is stacked. Further, the n-cladding layer 140b may include a structure in which n-side first layers and n-side second layers are alternately and repeatedly stacked. The GaInN and GaN alternate structures or GaInN having different compositions. It is preferable that they have an alternating structure.

(Light emitting layer 150)
As the light emitting layer 150 stacked on the n-type semiconductor layer 140, a single quantum well structure or a multiple quantum well structure can be employed.
As the well layer 150b having a quantum well structure as shown in FIG. 4, a group III nitride semiconductor layer made of Ga _1-y In _y N (0 <y <0.4) is usually used. The film thickness of the well layer 150b can be set to a film thickness that provides a quantum effect, for example, 1 to 10 nm, and preferably 2 to 6 nm, from the viewpoint of light emission output.
In the case of the light emitting layer 150 having a multiple quantum well structure, the Ga _1-y In _y N is used as the well layer 150b, and Al _z Ga _1-z N (0 ≦ z <0), which has a larger band gap energy than the well layer 150b. .3) is defined as a barrier layer 150a. The well layer 150b and the barrier layer 150a may or may not be doped with impurities by design.
In the present embodiment, the light emitting layer 150 outputs blue light (emission wavelength λ = about 400 nm to 465 nm).

(P-type semiconductor layer 160)
As shown in FIG. 4, for example, a p-type semiconductor layer 160 having holes as carriers, which is an example of a second semiconductor layer having a second conductivity type, is generally formed of a p-clad layer 160a and a p-contact layer 160b. Consists of The p contact layer 160b can also serve as the p clad layer 160a.
The p-cladding layer 160a is a layer that performs confinement of carriers in the light emitting layer 150 and injection of carriers. The p-cladding layer 160a is not particularly limited as long as it has a composition larger than the band gap energy of the light-emitting layer 150 and can confine carriers in the light-emitting layer 150, but is preferably Al _x Ga _1-x N. (0 <x ≦ 0.4).

It is preferable that the p-cladding layer 160a is made of such AlGaN from the viewpoint of confining carriers in the light-emitting layer 150. The film thickness of the p-cladding layer 160a is not particularly limited, but is preferably 1 to 400 nm, more preferably 5 to 100 nm.
The p-type doping concentration of the p-clad layer 160a is preferably 1 × 10 ¹⁸ to 1 × 10 ²¹ / cm ³ , more preferably 1 × 10 ¹⁹ to 1 × 10 ²⁰ / cm ³ . When the p-type dope concentration is in the above range, a good p-type crystal can be obtained without reducing the crystallinity.
The p-cladding layer 160a may have a superlattice structure in which a plurality of layers are stacked, and preferably has an alternating structure of AlGaN and AlGaN or an alternating structure of AlGaN and GaN.

The p contact layer 160 b is a layer for providing the second electrode 170. The p contact layer 160b is preferably Al _x Ga _1-x N (0 ≦ x ≦ 0.4). When the Al composition is in the above range, it is preferable in that good crystallinity and good ohmic contact with the second electrode 170 can be maintained.
When a p-type impurity (dopant) is contained at a concentration of 1 × 10 ¹⁸ to 1 × 10 ²¹ / cm ³ , preferably 5 × 10 ^{19 to} 5 × 10 ²⁰ / cm ³ , good ohmic contact can be obtained. It is preferable in terms of maintenance, prevention of crack generation, and good crystallinity. Although it does not specifically limit as a p-type impurity, For example, Preferably Mg is mentioned.
The thickness of the p contact layer 160b is not particularly limited, but is preferably 10 nm to 500 nm, and more preferably 50 nm to 200 nm. When the film thickness of the p-contact layer 160b is within this range, it is preferable in terms of light emission output.

(First electrode 180)
FIG. 5 is a schematic cross-sectional view showing an example of the first electrode 180.
The first electrode 180 includes a first metal reflective layer 181 stacked on the semiconductor layer exposed surface 140c of the n-type semiconductor layer 140, and a first metal 180 in order from the first metal reflective layer 181 in FIG. A first diffusion barrier layer 182a, a second diffusion barrier layer 182b, a third diffusion barrier layer 182c, and a fourth diffusion barrier layer 182d in the electrode 180 are laminated. A first bonding layer 182e is stacked on the fourth diffusion prevention layer 182d of the first electrode 180, and further stacked so as to cover the first bonding layer 182e except for an exposed portion of the first bonding layer 182e. 1 protective adhesion layer 183. Any of the first diffusion prevention layer 182a to the fourth diffusion prevention layer 182d may be omitted depending on the material configuration.

(First metal reflective layer 181)
As shown in FIG. 5, a first metal reflective layer 181 is stacked on the n-type semiconductor layer 140. Therefore, a material with good adhesion to the n-type semiconductor layer 140 is preferable. The central portion of the first metal reflective layer 181 has a constant film thickness and is substantially flat. On the other hand, the end of the first metal reflective layer 181 is gradually thinned so that the n-type semiconductor is thin. The layer 140 is formed to be inclined with respect to the upper surface (semiconductor layer exposed surface 140c). Examples of the first metal reflective layer 181 include aluminum (Al) or an Al alloy. Note that an adhesion layer may be formed before the first metal reflective layer 181 is formed. The first metal reflective layer 181 may be made of a metal such as Al (aluminum), Ni (nickel), Nd (neodymium), Ag (silver), or an alloy including at least one of them. In addition, since the 1st metal reflective layer 181 also has the function to supply electric power to the n-type semiconductor layer 140, it is preferable that the resistance value is low. The film thickness of the first metal reflective layer 181 is preferably in the range of 80 nm to 200 nm. When the film thickness is excessively thin, the reflectance as the reflective layer tends to decrease. If the film thickness is excessively thick, the manufacturing cost of the semiconductor light emitting element 10 tends to increase.

(First diffusion prevention layer 182a to fourth diffusion prevention layer 182d)
The first diffusion prevention layer 182a to the fourth diffusion prevention layer 182d in the first electrode 180 diffuse the metal constituting the first metal reflection layer 181 in contact with the metal constituting the fourth diffusion prevention layer 182d. Suppress.
The fourth diffusion preventing layer 182d suppresses diffusion of the metal constituting the third diffusion preventing layer 182c in contact with the metal constituting the first bonding layer 182e. The first diffusion prevention layer 182a, the second diffusion prevention layer 182b, and the third diffusion prevention layer 182c in the first electrode 180 are made of a metal (in this example, Ag (silver) in the first metal reflection layer 181. )) And the metal constituting the fourth diffusion preventing layer 182d (in this example, Pt (platinum)) is suppressed. The fourth diffusion prevention layer 182d is formed of a metal (Ta (tantalum) in this example) constituting the third diffusion prevention layer 182c in contact and a metal (Au (gold) in this example) constituting the first bonding layer 182e. )) Diffusion is suppressed.
In the first electrode 180, the first diffusion prevention layer 182a, the second diffusion prevention layer 182b, the third diffusion prevention layer 182c, and the fourth diffusion prevention layer 182d are formed so as to cover the entire area of the first metal reflection layer 181. Has been. The central portion of each diffusion prevention layer has a constant thickness and is substantially flat, while the thickness of each end portion gradually decreases, so that the n-type semiconductor layer 140 is exposed to the semiconductor layer. Inclined with respect to the surface 140c.

Each diffusion prevention layer (182a to 182d) is preferably one having an ohmic contact with the layer in contact with each layer and a low contact resistance with the layer in contact.
In the present embodiment, Ta (tantalum) is used as the first diffusion preventing layer 182a, TaN (tantalum nitride) is used as the second diffusion preventing layer 182b, Ta (tantalum) is used as the third diffusion preventing layer 182c, and the fourth diffusion preventing layer 182d is used. Pt (platinum) is used.
The film thickness of the first diffusion preventing layer 182a is preferably in the range of 20 nm to 200 nm. The film thickness of the second diffusion preventing layer 182b is preferably used in the range of 1 nm to 50 nm. The thickness of the third diffusion preventing layer 182c is preferably in the range of 20 nm to 200 nm. The film thickness of the fourth diffusion prevention layer 182d is preferably in the range of 50 nm to 200 nm.

(First bonding layer 182e)
As shown in FIG. 5, a first bonding layer 182e is stacked on the top surfaces of the first diffusion prevention layer 182a to the fourth diffusion prevention layer 182d. The first bonding layer 182e is formed so as to cover the entire area of the first diffusion prevention layer 182a to the fourth diffusion prevention layer 182d. The central portion of the first bonding layer 182e has a certain thickness and is formed almost flat. The end portion side of the first bonding layer 182e is formed so as to be inclined with respect to the semiconductor layer exposed surface 140c of the n-type semiconductor layer 140 by gradually decreasing the film thickness.

  The first bonding layer 182e includes at least one metal layer as in a second bonding layer 174 (see FIG. 6) of the second electrode 170 described later. In this case, for example, Au (gold) is used for the outermost metal layer which is the outermost layer. The total thickness of the first bonding layer 182e is preferably set to 100 nm to 2 μm. When the film thickness is excessively thin, the resistance tends to increase. If the film thickness is excessively thick, the manufacturing cost of the light emitting element tends to increase.

(First protective adhesion layer 183)
As shown in FIG. 5, a first protective adhesion layer 183 is laminated on the first bonding layer 182e. The first protective adhesion layer 183 is formed so as to cover a region excluding the exposed portion of the first bonding layer 182e. The central portion of the first protective adhesion layer 183 has a constant film thickness and is substantially flat, while the end portion of the first protective adhesion layer 183 is the semiconductor layer exposed surface 140c of the n-type semiconductor layer 140. It is inclined with respect to. The end portion on the side surface side of the first protective adhesion layer 183 is provided so as to be in contact with the semiconductor layer exposed surface 140 c of the n-type semiconductor layer 140.

  The first protective adhesion layer 183 is provided to improve the physical adhesion between the first bonding layer 182e made of Au (gold) and the protective layer 190, for example. In the present embodiment, the first protective adhesion layer 183 is made of Ta (tantalum). However, Ti (titanium) can also be used as the first protective adhesion layer 183. The film thickness of the first protective adhesion layer 183 is preferably in the range of 1 nm to 50 nm. If the film thickness is excessively small, the adhesion with the protective layer 190 and the first bonding layer 182e tends to decrease. When the film thickness is excessively large, the working time in the etching process becomes long, and the manufacturing cost of the semiconductor light emitting element 10 tends to increase.

(Second electrode 170)
Next, the configuration of the second electrode 170 will be described. FIG. 6 is a schematic cross-sectional view showing an example of the second electrode 170.
As shown in FIG. 6, the second electrode 170 includes a transparent conductive layer 171 stacked on the upper surface 160c of a p-type semiconductor layer 160 as a second semiconductor layer, and a multilayer stacked on the upper surface of the transparent conductive layer 171. An insulating layer 172 and a second metal reflective layer 173a stacked on the upper surface of the multilayer insulating layer 172 are stacked. On the upper surface of the second metal reflective layer 173a, the first diffusion prevention layer 173b, the second diffusion prevention layer 173c, and the third diffusion prevention in the second electrode 170 are sequentially arranged upward from the second metal reflection layer 173a in FIG. A layer 173d and a fourth diffusion prevention layer 173e are stacked. Further, a second bonding layer 174 is laminated on the upper surface of the fourth diffusion preventing layer 173e, and a second protective adhesion layer 175 is laminated so as to cover the second bonding layer 174 except for an exposed portion of the second bonding layer 174. have.
As shown in FIG. 6, the transparent conductive layer 171 includes a base portion 171a having a substantially constant thickness and a convex portion 171b as a film thickness portion having a thickness larger than that of the base portion 171a. Further, a conductor provided through the multilayer insulating layer 172 and having one end electrically connected to the film thickness portion (= convex portion 171b) of the transparent conductive layer 171 and the other end electrically connected to the second metal reflective layer 173a. Part 176. The transparent conductive layer 171 excludes the peripheral portion of the upper surface 160c of the p-type semiconductor layer 160, which has been partially removed by means such as known etching, in order to form the first electrode 180 (see FIG. 5). It is formed on almost the entire surface. The transparent conductive layer 171, the multilayer insulating layer 172, and the conductor part 176 will be described later.

(Transparent conductive layer 171)
As shown in FIG. 6, in this embodiment, the transparent conductive layer 171 includes a continuous base 171a formed so as to cover the upper surface 160c of the p-type semiconductor layer 160, and a side opposite to the p-type semiconductor layer 160 side. It is comprised from the several convex part 171b as a film thickness part provided in the multilayer insulation layer 172 side. The portion of the transparent conductive layer 171 provided with the convex portion 171b constitutes a film thickness portion having a larger thickness than other portions.
Although not shown, the present invention is not limited to this embodiment mode, and the convex portion 171b of the transparent conductive layer 171 may be provided on the p-type semiconductor layer 160 side of the base portion 171a in order to form a film thickness portion. In that case, the transparent conductive layer 171 is formed in a flat shape on the multilayer insulating layer 172 side.

FIG. 7 is a diagram illustrating the main part of the second electrode 170.
As shown in FIG. 7, the thickness of the transparent conductive layer 171 where the convex portion 171b is not provided (referred to as the thickness (x) of the base portion 171a) is selected from the range of 5 nm to 150 nm in this embodiment. be able to. In the present embodiment, it is preferably selected from the range of 20 nm to 100 nm. For example, as reference data, the sheet resistance of the transparent conductive layer 171 composed of the thickness (x) of the base 171a not having the convex portion 171b depends on the manufacturing method, but is infinite when the film thickness is 10 nm (∞ When the film thickness is 20 nm, it is 250 Ω / □, when the film thickness is 25 nm, 175 Ω / □, when the film thickness is 50 nm, 72 Ω / □, when the film thickness is 100 nm, 29 Ω / □, When the thickness is 200 nm, it is 15Ω / □.
If the thickness (x) of the base portion 171a is excessively thin, ohmic contact with the p-type semiconductor layer 160 is difficult to occur, and the forward voltage (Vf) tends to increase. When the thickness (x) of the base portion 171a is excessively thick, there is a tendency that it is not preferable in terms of light emission from the light emitting layer 150 and light transmittance of the reflected light from the second metal reflective layer 173a.
In the present embodiment, the central portion of the base portion 171a has a constant film thickness and is formed substantially flat with respect to the upper surface 160c of the p-type semiconductor layer 160, while the end portion side of the base portion 171a has a film thickness. By gradually becoming thinner, the p-type semiconductor layer 160 is formed so as to be inclined with respect to the upper surface 160c.

  In this embodiment, the thickness (y) of the film thickness portion in which the convex portion 171b is provided on the base portion 171a is selected from the range of 100 nm to 300 nm. However, there is a relationship of y> x. In addition, the thickness (y) of the film thickness portion is preferably selected from the range of 150 nm to 250 nm. When the thickness (y) of the film thickness portion is excessively thin or excessively thick, there is a tendency that it is not preferable in terms of light emission from the light emitting layer 150 and light transmittance of the reflected light from the second metal reflective layer 173a. Note that the transparent conductive layer 171 is preferably used as a thin film having a specific thickness or less because of its light absorption in use in the FC mounting technology.

In the present embodiment, the width (φ ₁ ) of the film thickness portion in which the convex portion 171b is provided on the base portion 171a is selected from the range of 10 μm to 30 μm. Moreover, it is preferably selected from the range of 15 μm to 25 μm. When the width (φ ₁ ) of the film thickness part is excessively large, the light intensity from the reflective layer tends to be affected by light absorption by the film thickness part. When the width (φ ₁ ) of the film thickness portion is excessively small, alignment with the through hole (conductor portion 176: diameter φ ₂ ) in the multilayer insulating layer 172 tends to be difficult. In the present embodiment, the width (φ ₁ ) of the film thickness portion (= convex portion 171b) is set to 18 μm.

  Note that the cross-sectional shape of the film thickness portion including the convex portion 171b in plan view is not particularly limited, and is circular, elliptical, triangular, square, rectangular, trapezoidal, pentagonal, other polygons (including star shape), wedge shape, etc. Is mentioned. Moreover, the cross-sectional shape of the convex part 171b in the vertical direction is not particularly limited, and examples thereof include a rectangle, a trapezoid, a cone, a pyramid, and a wedge. Moreover, the film thickness part of the convex part 171b may have a grid | lattice pattern comprised from the linear part which couple | bonds the convex part 171b which has these cross-sectional shapes (after-mentioned). Furthermore, the planar cross-sectional area of the convex part 171b is not particularly limited, and the planar cross-sectional area of each of the plurality of convex parts 171b includes the same or different cases.

  The plurality of film thickness portions including the convex portions 171b in the transparent conductive layer 171 are provided at a predetermined interval (pitch l). In the present embodiment, the pitch l is selected from the range of 10 μm to 120 μm. Moreover, it is preferably selected from the range of 20 μm to 100 μm. When the pitch l is excessively large, the ratio (A / B) of the film thickness portion provided with the convex portions 171b to the transparent conductive layer 171 is reduced, the effect of the invention is reduced, and the forward voltage (Vf) is increased. Tend. When the pitch l is excessively small, the ratio (A / B) increases, and the light emission intensity tends not to improve.

  As shown in FIGS. 9-12, in this Embodiment, the area of the transparent conductive layer 171 which has the convex part 171b is an area of 5%-60% with respect to the total area of the transparent conductive layer 171 which has the base part 171a. It is provided in the range of rate (%). The area ratio (%) is also referred to as the occupied area ratio (%) of the convex portion 171b. Furthermore, the transparent conductive layer 171 having the convex portion 171b is preferably provided in an area ratio (%) range of 7% to 50%, and more preferably in an area ratio (%) range of 8% to 40%.

Furthermore, in the present invention, a structure of a multilayer insulating layer 172 described later and a plurality of film thickness portions including the convex portion 171b are arranged in a lattice pattern or at an equal interval or at random with a predetermined interval (isolated pattern). ), The light emission intensity of the front light of the semiconductor light emitting element 10 in the flip chip is remarkably increased. Further, by providing a plurality of film thickness portions including the convex portion 171b in the isolated pattern, the reflection effect of light from the light emitting layer 150 is enhanced, and the light emission output of the semiconductor light emitting element 10 is increased.
In addition, it is preferable to provide the isolated pattern at the above-described occupation area ratio (%) because the light emission output of the semiconductor light emitting element 10 can be increased and the forward voltage (Vf) can be lowered to an optimum range.
The size of the semiconductor light emitting device 10 to which the present invention is applied is not particularly limited. For example, a rectangular chip having a side of 1 cm or less is preferable, and a rectangular chip of 1 mm or less or a 350 μm square chip. And long chips are used.

The material forming the transparent conductive layer 171 is an oxide conductive material, and a material that transmits at least about 80% of light having a wavelength emitted from the light emitting layer 150 is used. For example, part of an oxide containing In (indium) is preferable in that both light transmittance and conductivity are superior to other transparent conductive films. As the conductive oxide containing In, for example, ITO (indium tin oxide (In ₂ O ₃ —SnO ₂ )), IZO (indium zinc oxide (In ₂ O ₃ —ZnO)), IGO (indium gallium oxide ( In ₂ O ₃ —Ga ₂ O ₃ )), ICO (indium cerium oxide (In ₂ O ₃ —CeO ₂ )) and the like. In these, for example, a dopant such as fluorine may be added. For example, as the oxide not containing In, for example, a conductive material such as SnO ₂ , ZnO ₂ , or TiO ₂ doped with carriers can be used. Using these materials, the transparent conductive layer 171 can be formed by conventional means well known in the art. In addition, after the transparent conductive layer 171 is formed, thermal annealing may be performed for the purpose of making the transparent conductive layer 171 transparent and further reducing the resistance.

In this embodiment mode, a material having a crystal structure can be used as the material of the transparent conductive layer 171. For example, a light-transmitting material containing an In ₂ O ₃ crystal having a hexagonal crystal structure or a bixbite structure (for example, ITO, IZO, etc.) is particularly preferable. Further, for example, when using IZO containing an In ₂ O ₃ crystal having a hexagonal crystal structure, it can be processed into a specific shape using an amorphous IZO film having excellent etching properties. The structure can be transferred to a structure including a crystal and processed into an electrode having higher translucency than an amorphous IZO film.

  In addition, as the IZO film used for the transparent conductive layer 171, it is preferable to use a composition having the lowest specific resistance. For example, the ZnO concentration in IZO is preferably 1 to 20% by mass, more preferably 5 to 15% by mass, and particularly preferably 10% by mass.

Heat treatment of the IZO film used for the transparent conductive layer 171 is desirably performed in an atmosphere containing no O _2, as the atmosphere containing no O _2, or an inert gas atmosphere such as N ₂ atmosphere, or such as N ₂ non An atmosphere of a mixed gas of active gas and H ₂ can be given, and it is desirable to use an N ₂ atmosphere or a mixed gas atmosphere of N ₂ and H ₂ . When the heat treatment of the IZO film is performed in an N ₂ atmosphere or a mixed gas atmosphere of N ₂ and H ₂ , for example, the IZO film is crystallized into a film containing In ₂ O ₃ crystals having a hexagonal structure, It is possible to effectively reduce the sheet resistance of the IZO film.

  The heat treatment temperature of the IZO film is preferably 500 ° C. to 1000 ° C. If the heat treatment temperature is excessively low, the IZO film cannot be sufficiently crystallized, and the light transmittance of the IZO film tends not to be sufficiently high. If the heat treatment temperature is excessively high, the IZO film is crystallized, but the light transmittance tends not to be sufficiently high. In this case, the semiconductor layer under the IZO film may be deteriorated.

In the case of crystallizing an amorphous IZO film, the crystal structure in the IZO film differs depending on the film formation conditions, heat treatment conditions, and the like. However, in the embodiment of the present invention, the transparent conductive layer 171 is not limited to a material in terms of adhesiveness to other layers, but is preferably a crystalline material, and particularly in the case of crystalline IZO, bixbite. It may be IZO including an In ₂ O ₃ crystal having a crystal structure or IZO including an In ₂ O ₃ crystal having a hexagonal structure. In particular, IZO containing In ₂ O ₃ crystal having a hexagonal structure is preferable.

  In particular, an IZO film crystallized by heat treatment has a high work function because it has better adhesion to the p-type semiconductor layer 160 than an amorphous IZO film. In addition, an IZO film crystallized by heat treatment has a lower resistance value than an amorphous IZO film, and thus is preferable in that the forward voltage Vf can be reduced when the semiconductor light emitting device 10 is configured.

(Multilayer insulating layer 172)
As shown in FIG. 6, the multilayer insulating layer 172 is formed on the upper surface of the transparent conductive layer 171 so as to follow the surface shape of the transparent conductive layer 171. The multilayer insulating layer 172 includes a first insulating layer having a first refractive index (n _L ) and exhibiting optical transparency with respect to light emitted from the light emitting layer 150 and a second higher than the first refractive index. Second insulating layers having a refractive index (n _H ) (n _L <n _H ) and exhibiting light transmittance with respect to light emitted from the light emitting layer 150 are alternately stacked. The multilayer insulating layer 172 functions as a reflective film that reflects light output from the light emitting layer 150 in combination with the second metal reflective layer 173a. In the present embodiment, as will be described later, a conductor portion 176 formed so as to penetrate the multilayer insulating layer 172 is provided.
The multilayer insulating layer 172 has a reflectivity of about 90%, preferably 95% or more, with respect to the light output from the light emitting layer 150, and has a lower refractive index and an insulating property than the transparent conductive layer 171.

FIG. 8 is a schematic cross-sectional view showing an example of the layer structure of the multilayer insulating layer 172.
As described above, the multilayer insulating layer 172 includes the first insulating layer 172a having the first refractive index and the second insulating layer 172b having the second refractive index higher than the first refractive index alternately. It is configured by stacking. In particular, in this embodiment, a configuration in which one second insulating layer 172b is sandwiched between two first insulating layers 172a is employed. In the example shown in FIG. 8, a five-layered second insulating layer 172b is sandwiched between six first-insulating layers 172a to have a total of 11 layers.

As the first insulating layer 172a and the second insulating layer 172b, a material having high light transmission performance with respect to light output from the light emitting layer 150 is used. Here, as the first insulating layer 172a, for example, SiO ₂ (silicon oxide: refractive index 1.48 (450 nm wavelength)) or MgF ₂ (magnesium fluoride) can be used. As the second insulating layer 172b, TiO ₂ (titanium oxide), Ta ₂ O ₅ (tantalum oxide: refractive index 2.16 (550 nm wavelength)), ZrO ₂ (zirconium oxide), HfO ₂ (hafnium oxide), Nb ₂ O ₅ (niobium oxide) can be used. However, if the refractive index relationship with the second insulating layer 172b is satisfied, the TiO ₂ , Ta ₂ O ₅ , ZrO ₂ , HfO ₂ , and Nb ₂ O _{5 are} added to the first insulating layer 172a. May be used.

In this embodiment mode, SiO ₂ (silicon oxide) is used as the first insulating layer 172a, and Ta ₂ O ₅ (tantalum oxide) is used as the second insulating layer 172b. These have high light transmittance with respect to light of the light emission wavelength λ (= 400 nm to 450 nm) of the light emitting layer 150.
Note that when the emission wavelength λ of the light-emitting layer 150 is further shorter and emits light in the near-ultraviolet region, Nb ₂ O ₅ (niobium oxide), ZrO ₂ (zirconium oxide), HfO ₂ (oxidation) is used as the second insulating layer 172b. It is desirable to use a material having an optical band gap larger than TiO ₂ (titanium oxide), such as hafnium. However, even when the light-emitting layer 150 emits light in the ultraviolet region, SiO ₂ (silicon oxide) can be used for the first insulating layer 172a.

In this embodiment mode, the layer thickness d _L of the first insulating layer 172a and the layer thickness d _H of the second insulating layer 172b are the light emission wavelength λ (nm) and the light emission wavelength λ at the light emission wavelength λ. refractive index _{n L} of the first insulating layer 172a, when the refractive index _{n H} of the second insulating layer 172b at the emission wavelength lambda _(n L _<n H), the equation (1) and (2) shown below Is set based on. In the formula, R represents an arbitrary real number.

(Conductor portion 176)
As shown in FIG. 6, each of the plurality of conductor portions 176 is formed through the multilayer insulating layer 172, one end is electrically connected to the convex portion 171 b of the transparent conductive layer 171, and the other end is a second metal reflecting member. It is provided so as to be electrically connected to the layer 173a. A plurality of conductor portions 176 are formed on the entire second electrode 170, and a current flowing through each conductor portion 176 becomes a current used for light emission of the light emitting layer 150. In this embodiment, a plurality of conductor portions 176 are provided, current is diffused over the entire surface of the p-type semiconductor layer 160 on the surface of the upper surface 160c of the p-type semiconductor layer 160, and unevenness in light emission in the light-emitting layer 150 is reduced. Yes.

Each diameter (φ ₂ ) (see FIG. 7) of the conductor portion 176 is the width (φ ₁ ) of the film thickness portion (= convex portion 171b) of the transparent conductive layer 171 described above or the convex portion 171b as described above. In the case of one unit provided with an arrangement pattern (isolated pattern) formed at equal intervals or at random with a predetermined interval, they are provided within a range equal to or smaller than the diameter (φ ₁ ). In the present specification, φ ₁ is simply referred to as a diameter (φ ₁ ). In the present embodiment, the diameter (φ ₂ ) of the conductor portion 176 is smaller than the φ ₁ of the film thickness portion of the transparent conductive layer 171 and is selected from the range of 5 μm to 30 μm. Moreover, it is preferably selected from the range of 5 μm to 20 μm. In the present embodiment, the diameter (φ ₂ ) of the conductor portion 176 is 8 μm. Note that the cross-sectional shape of the conductor portion 176 in plan view is not particularly limited, and examples thereof include a circle, an ellipse, a triangle, a square, a rectangle, a trapezoid, a pentagon, and other polygons (including a star), a wedge shape, and the like.

  The conductor portion 176 can be formed by, for example, filling a through hole formed by dry etching or lift-off into a multilayer insulating layer 172 formed in advance with a conductive material. The conductor portion 176 is formed using at least one conductive material, and may be formed using a plurality of conductive materials. Examples of the conductive material used for forming the conductor portion 176 include amorphous IZO / silver alloy / Ta. In the present embodiment, by providing a plurality of conductor portions 176 in the multilayer insulating layer 172, the entire surface of the p-type semiconductor layer 160 is uniformly provided on the surface of the second electrode 170 via the transparent conductive layer 171. Spread current. This makes it possible to improve light emission unevenness in the light emitting layer 150. The conductor portion 176 is applied to the wall surface and bottom surface of the through hole formed by dry etching or lift-off. Alternatively, the through hole of the multilayer insulating layer 172 may be formed as a metal filled.

(Second metal reflective layer 173a)
As shown in FIG. 6, the second metal reflective layer 173 a is formed so as to cover the entire area of the multilayer insulating layer 172. The central portion of the second metal reflective layer 173a has a constant film thickness and is substantially flat, while the end portion of the second metal reflective layer 173a is gradually thinned so that the p-type semiconductor layer 160 is thin. The upper surface 160c is inclined. Since the second metal reflective layer 173a also has a function of supplying power to the p-type semiconductor layer 160, it is necessary to keep the contact resistance low.

The second metal reflective layer 173a is made of a metal such as Ag (silver), Pd (palladium), Cu (copper), Nd (neodymium) Al (aluminum), Ni (nickel), Cr (chromium), and at least one of them. It is comprised with the alloy containing. In particular, when silver or a silver alloy is used as the second metal reflective layer 173a, it is preferable because it has high light reflectivity with respect to light having a wavelength in a blue to green region emitted from the light emitting layer 150. . When silver is used as the second metal reflective layer 173a, heat resistance and high temperature and high humidity resistance may not be sufficient depending on the use environment, and a silver alloy is preferably used.
The film thickness of the second metal reflective layer 173a is preferably used in the range of 80 nm to 200 nm. When the film thickness is excessively thin, the reflectance as the reflective layer tends to decrease. If the film thickness is excessively thick, the manufacturing cost of the semiconductor light emitting element 10 tends to increase.

(First diffusion prevention layer 173b to fourth diffusion prevention layer 173e)
The first diffusion prevention layer 173b to the fourth diffusion prevention layer 173e in the second electrode 170 diffuse the metal constituting the second metal reflection layer 173a in contact and the metal constituting the fourth diffusion prevention layer 173e. Suppress.
The fourth diffusion prevention layer 173e suppresses diffusion of the metal constituting the third diffusion prevention layer 173d in contact with the metal constituting the second bonding layer 174. The first diffusion prevention layer 173b, the second diffusion prevention layer 173c, and the third diffusion prevention layer 173d are a metal (Ag (silver) in this example) constituting the second metal reflection layer 173a in contact, and the fourth Diffusion of the metal (Pt (platinum) in this example) constituting the diffusion preventing layer 173e is suppressed. The fourth diffusion prevention layer 173e is composed of a metal (Ta (tantalum) in this example) constituting the third diffusion prevention layer 173d in contact and a metal (Au (gold) in this example) constituting the second bonding layer 174. )) Diffusion is suppressed.

  In the second electrode 170, the first diffusion prevention layer 173b, the second diffusion prevention layer 173c, the third diffusion prevention layer 173d, and the fourth diffusion prevention layer 173e are formed so as to cover the entire area of the second metal reflection layer 173a. Has been. In the second electrode 170, the first diffusion prevention layer 173b to the fourth diffusion prevention layer 173e are formed so as to cover the entire area of the second metal reflection layer 173a. The central portion of each diffusion prevention layer has a constant film thickness and is substantially flat, while the respective end portions are gradually thinned and inclined with respect to the upper surface 160 c of the p-type semiconductor layer 160. Is formed.

It is preferable that the diffusion prevention layers (173b to 173e) in the second electrode 170 have an ohmic contact with the layer in contact with each layer and have a small contact resistance with the layer in contact with the layer.
In the present embodiment, Ta (tantalum) is used as the first diffusion prevention layer 173b, TaN (tantalum nitride) is used as the second diffusion prevention layer 173c, Ta (tantalum) is used as the third diffusion prevention layer 173d, and the fourth diffusion prevention layer 173e is used. Pt (platinum) is used.
The film thickness of the first diffusion preventing layer 173b is preferably in the range of 20 nm to 200 nm. The film thickness of the second diffusion prevention layer 173c is preferably in the range of 1 nm to 50 nm. The film thickness of the third diffusion preventing layer 173d is preferably in the range of 20 nm to 200 nm. The film thickness of the fourth diffusion prevention layer 173e is preferably used in the range of 50 nm to 200 nm.

(Second bonding layer 174)
As shown in FIG. 6, the second bonding layer 174 is laminated on the upper surface of the fourth diffusion preventing layer 173e so as to cover the second metal reflective layer 173a. The second bonding layer 174 is formed so as to cover the entire region of the fourth diffusion prevention layer 173e. The central portion of the second bonding layer 174 has a certain film thickness and is formed almost flat. In the present embodiment, the end portion side of the second bonding layer 174 is formed so as to be inclined with respect to the upper surface 160 c of the p-type semiconductor layer 160 by gradually decreasing the film thickness.

  The second bonding layer 174 as a connection layer used for electrical connection with the outside includes at least one metal layer so as to be in contact with the innermost fourth diffusion prevention layer 173e and the like. Further, for example, Au (gold) is used for the outermost metal layer which is the outermost layer. Further, in the present embodiment, a single layer film of Au (gold) is used as the second bonding layer 174. The film thickness of the second bonding layer 174 is preferably in the range of 100 nm to 2 μm. When the film thickness is excessively thin, the resistance tends to increase. If the film thickness is excessively thick, the manufacturing cost of the light emitting element tends to increase.

(Second protective adhesion layer 175)
As shown in FIG. 6, a second protective adhesion layer 175 is laminated on the upper surface and side surfaces of the second bonding layer 174 so as to cover the second bonding layer 174. The second protective adhesion layer 175 is formed so as to cover the region excluding the exposed portion of the second bonding layer 174. The central portion of the second protective adhesion layer 175 has a constant thickness and is substantially flat, while the end portion of the second protective adhesion layer 175 is inclined with respect to the upper surface 160 c of the p-type semiconductor layer 160. Is formed. The end portion on the side surface side of the second protective adhesion layer 175 is provided so as to be in contact with the upper surface 160 c of the p-type semiconductor layer 160.

The second protective adhesion layer 175 as an example of the adhesion layer is provided to improve physical adhesion between the second bonding layer 174 made of Au (gold) and the protection layer 190. In the present embodiment, the second protective adhesion layer 175 is made of, for example, Ta (tantalum). Further, Ti (titanium) can be used as the second protective adhesion layer 175.
The film thickness of the second protective adhesion layer 175 is preferably in the range of 5 nm to 50 nm. If the film thickness is excessively thin, the adhesion between the second bonding layer 174 and the protective layer 190 tends to be reduced. If the film thickness is excessively thick, the working time in the etching process becomes long, and the manufacturing cost of the semiconductor light emitting element 10 tends to increase.

(Protective layer 190)
As shown in FIG. 5 or FIG. 6, the protective layer 190 made of silicon oxide such as SiO ₂ has the first electrode except for a part of the first electrode 180 and a part of the second electrode 170. 180 and the first electrode 180, and a part of the p-type semiconductor layer 160, the light-emitting layer 150, and the n-type semiconductor layer 140 (the light-emitting layer 150 side from the semiconductor layer exposed surface 140c (see FIG. 2)). Are stacked. The protective layer 190 has a function as a protective layer for suppressing water and the like from entering the light emitting layer 150, the second electrode 170, and the first electrode 180 from the outside, and among the light emitted from the light emitting layer 150, Light that is not reflected directly toward the substrate 110 but is not reflected by the second metal reflective layer 173a of the second electrode 170 or the first metal reflective layer 181 of the first electrode 180 is reflected toward the substrate 110. It functions as an auxiliary reflective layer. The thickness of the protective layer 190 is usually provided in the range of 50 nm to 1 μm. If the thickness of the protective layer 190 is too small, the function as the protective film may be impaired, and the light emission output tends to decrease in a short time depending on the use environment.

(Bumps 21 and 22)
The bumps (connectors) 21 and 22 shown in FIG. 1 are not limited to ball bumps or solder bumps formed in advance on the mounting substrate side. For example, the first electrodes 180 and the first bumps on the semiconductor light emitting element 10 side A bump may be formed in advance on the second electrode 170 using a plating method or vapor deposition.
In the present embodiment, bumps can be formed on the semiconductor light emitting element 10 side by this method. In particular, since bumps can be formed for each wafer by a photolithography process, a large-diameter wafer of 4 inches or more has an advantage that the production load can be greatly reduced as compared to forming bump balls for each mounting substrate. .

(Planar shape of film thickness part)
FIG. 9 is a diagram showing an example of an arrangement pattern of the film thickness portions (convex portions 171b) provided in the transparent conductive layer 171. As shown in FIG. FIG. 9 is a schematic plan view of the convex portion 171b viewed from the IX direction in the schematic cross-sectional view of the second electrode 170 shown in FIG. In FIG. 9, the protective layer 190 that covers the surfaces of the first electrode 180 and the second electrode 170 is omitted. In addition, the conductor portion 176 (see FIG. 6 or 7) is displayed as a circular blank portion (diameter φ ₂ = 8 μm) in the central portion of the convex portion 171b.
9A to 9C show a plurality of film thickness portions (convex portions 171b) spaced apart from each other (pitch l) in the semiconductor light emitting device 10 in which the length (L) of one side of the substrate 110 is 350 mm. FIG. 6 is a diagram showing a pattern (referred to as an “isolated pattern”) arranged on the entire second electrode 170 by providing a pattern.

As described above, the shape of the convex portion 171b provided on the base portion 171a so that the transparent conductive layer 171 has a film thickness portion is, for example, a circle having a predetermined diameter (φ ₁ = 18 μm) in plan view. The plurality of convex portions 171b are provided at a predetermined interval (pitch l) over the entire base portion 171a. Then, in a pair of adjacent rows, the protrusions 171b in the adjacent rows are arranged so as to be shifted in the parallel direction by (1/2) of the pitch l.
Here, in FIG. 9A, the pitch 1 of the plurality of convex portions 171b is 42.4 μm (pattern 1). In FIG. 9B, the pitch 1 of the plurality of convex portions 171b is 35.4 μm (pattern 2). In FIG. 9C, the pitch 1 of the plurality of convex portions 171b is 30 μm (pattern 3).

FIG. 10A to FIG. 10C are diagrams illustrating an example of a lattice pattern of film thickness portions (convex portions 171 b) provided in the transparent conductive layer 171. In the semiconductor light emitting device 10 in which the length (L) of one side of the substrate 110 is 350 mm, the shape of the convex portion 171b that forms the film thickness portion together with the base portion 171a of the transparent conductive layer 171 has a predetermined diameter (in plan view) It has a grid pattern composed of a plurality of circular portions (first convex portions) having φ ₁ = 18 μm) and linear portions (second convex portions) connecting these circular portions. . The conductor portion 176 (see FIG. 6 or 7) is formed only at the central portion of the convex portion 171b of the circular portion, and is displayed as a circular blank portion (diameter φ ₂ = 8 μm) as in FIG. .
The film thickness of the linear portion has the same film thickness as that of the convex portion 171b described above, and the width of the linear portion is the planar length of the convex portion 171b (in the case where the convex portion 171b is circular, the diameter is Or a size smaller than that, and is usually selected within a range of 5 μm to 18 μm. In this embodiment, it is 8 μm.

In FIG. 10 (a), the pattern of the film thickness portion has a plurality of convex portions 171b having a circular cross section (φ ₁ = 18 μm) as shown in FIG. 9 (a) (pattern 1) described above. = 42.4 μm apart, and a lattice pattern is formed by connecting these convex portions 171b by a plurality of linear portions (pattern 4). In the pattern 4, the linear portion is formed so as to intersect with one side of the base 171a of the transparent conductive layer 171 at an angle of approximately 45 degrees. In FIG. 10B, the pattern of the film thickness portion is a plurality of circular (φ ₁ = 18 μm) convex portions 171b, and other convex portions 171b are parallel to one side of the base portion 171a. A grid pattern connected by linear portions is formed (pattern 5). In FIG. 10C, the pattern of the film thickness portion is formed as a lattice pattern combining (pattern 4) of FIG. 10 (a) and (pattern 5) of FIG. 10 (b) (pattern 6). .

FIG. 11A to FIG. 11C are diagrams showing another example of the isolated pattern of the film thickness portion (convex portion 171 b) provided in the transparent conductive layer 171. In the semiconductor light emitting device 10 in which the length (L) of one side of the substrate 110 is 350 mm, as described above, the shape of the convex portion 171b provided on the base portion 171a has a predetermined diameter (φ ₁ = 18 μm) in plan view. It is circular. As in FIG. 9, the conductor portion 176 (see FIG. 6 or 7) is displayed as a circular blank portion (diameter φ ₂ = 8 μm) in the central portion. The plurality of convex portions 171b are formed with a predetermined interval (pitch l) over the entire base portion 171a. And in a pair of adjacent row | line | column, it arrange | positions so that it may not mutually shift with the convex part 171b of an adjacent row | line | column.
In FIG. 11A, the pitch 1 of the plurality of convex portions 171b is 27 μm (IZODOT II- (1)). In FIG.11 (b), the pitch 1 of the some convex part 171b is 25 micrometers (IZODOT II- (2)). In FIG.11 (c), the pitch 1 of the some convex part 171b is 23 micrometers (IZODOT II- (3)).

FIG. 12 is a diagram illustrating another example of the arrangement pattern of the film thickness portions (convex portions 171 b) provided in the transparent conductive layer 171. 12A to 12D, the first electrode 180 of the semiconductor light emitting element 10 is provided in the central portion of the n-type semiconductor layer 140, and the circular first opening 180 a of the semiconductor light emitting element 10. It is formed in the central part.
The film thickness portion of the transparent conductive layer 171 is formed by disposing a plurality of convex portions 171b at a predetermined interval on the base portion 171a of the transparent conductive layer 171 except for the portion where the first opening 180a is formed. It is configured. As described above, the shape of the convex portion 171b provided on the base portion 171a is a circular shape having a predetermined diameter (φ ₁ = 18 μm) in plan view. As in FIG. 9, the conductor portion 176 (see FIG. 6 or 7) is displayed as a circular blank portion (diameter φ ₂ = 8 μm) in the central portion.

  FIG. 12A shows an isolated pattern of the film thickness portion (convex portion 171b). In the semiconductor light emitting device 10 in which the length (L) of one side (L) of the substrate 110 is 500 mm, the plurality of convex portions 171b are provided at predetermined intervals (56 μm) over the entire base portion 171a, and are adjacent to each other. In this row, the protrusions 171b in the adjacent row are arranged so as to be shifted in the parallel direction by (1/2) of the pitch l (IZODOT- (1)).

  FIG. 12B shows another embodiment of the isolated pattern of the film thickness portion. In the semiconductor light emitting device 10 in which the length (L) of one side of the substrate 110 is 500 mm, the plurality of convex portions 171 b are provided at a predetermined interval (25 μm) over the entire base portion 171 a and are adjacent to each other. In this row, the projections 171b in the next row are arranged so as not to be shifted from each other (IZODOT- (2)).

FIG. 12C shows a lattice pattern in which a plurality of convex portions 171b are connected by a plurality of linear portions in the semiconductor light emitting device 10 in which the length (L) of one side of the substrate 110 is 500 mm. The straight portion is formed so as to intersect with one side of the base portion 171a of the transparent conductive layer 171 at an angle of about 45 degrees (IZODOT- (3)).
In the semiconductor light emitting device 10 in which the length (L) of one side of the substrate 110 is 500 mm, the interval (pitch l) between the plurality of convex portions 171b arranged in parallel to one side of the base portion 171a is 82 μm. In a pair of adjacent rows, the protrusions 171b in the adjacent rows are arranged so as to be shifted from each other in a parallel manner with a pitch l (1/2 (= 41 μm)). The width of the straight portion is 8 μm. The conductor portion 176 (see FIG. 6 or 7) is formed only at the central portion of the convex portion 171b of the circular portion, and is displayed as a circular blank portion (diameter φ ₂ = 8 μm) as in FIG. . Further, the four convex portions 171b provided around the first opening 180a are joined by a film thickness portion having a width of 8 μm formed so as to follow the shape of the first opening 180a.

  FIG. 12D shows the semiconductor light emitting device 10 in which the length (L) of one side of the substrate 110 is 500 mm, and a plurality of convex portions 171b are connected by a plurality of linear portions parallel to one side of the base portion 171a. As shown in FIG. 12C, a composite pattern in which the lattice pattern is combined with the lattice pattern formed so as to intersect with one side of the base portion 171a of the transparent conductive layer 171 at an angle of about 45 degrees as shown in FIG. It is formed (IZODOT- (4)).

(Mounting process on submount)
The semiconductor light emitting device 10 shown in FIG. 1 is mounted on the submount substrate 10B through the following operation, for example. First, after a TiW / Au film is formed on the entire surface of the semiconductor light emitting device 10 by a known sputtering method, a resist having the first opening 180a and the second opening 170a opened by a known photolithography technique is formed. Then, Au of a predetermined thickness is grown on the first electrode 180 and the second electrode 170 by a known film formation method, and bumps 21 and 22 are formed. The light emitting chip is placed over the submount 15 using an AlN substrate, and the semiconductor light emitting element 10 and the submount 15 are arranged so that the submount wirings 11 and 12 correspond to the bumps 21 and 22 of the semiconductor light emitting element 10, respectively. Are aligned and electrically connected. AuSn (20% by mass to 25% by mass) is formed by vapor deposition.

  Hereinafter, the present invention will be described in more detail based on examples. However, the present invention is not limited to the following examples unless it exceeds the gist.

(Examples 1-2, Comparative Example 1)
As shown in FIG. 2, in the semiconductor light emitting device 10 having a side of 500 μm square (square), the second electrode 170 shown in FIG. 6 has a pattern of the film thickness portion of the transparent conductive layer 171 made of IZO. The shape having a lattice pattern (IZODOT- (3)) in FIG.
Here, the transparent conductive layer 171 was formed in two types in which the thickness (x) of the base 171a was 25 nm and 50 nm. The thickness (y) of the film thickness portion in each transparent conductive layer 171 is 200 nm. The shape of the convex portion 171b is a circle having a diameter (φ ₁ ) of 18 μm. The interval (pitch l) between the plurality of convex portions 171b is 82 μm. Further, the width of the linear portion connecting the convex portions 171b is 8 μm. Moreover, the occupation area ratio (%) of the convex part 171b is 15%.

Next, a multilayer insulating layer 172 having a total of 11 layers is formed on the upper surface of the transparent conductive layer 171 by sandwiching the five second insulating layers 172b between the six first insulating layers 172a. Filmed. The first insulating layer 172a was formed using SiO ₂ (silicon oxide: refractive index 1.48 (450 nm wavelength) (film thickness 76 nm). The second insulating layer 172b was formed using Ta ₂ O ₅ (tantalum oxide). : Refractive index 2.16 (550 nm wavelength)) (film thickness 54 nm) The total thickness (H) of the multilayer insulating layer 172 in the second electrode 170 is 726 nm. The metal reflection layer 173a was formed using silver (Ag) and aluminum (Al).
Further, the conductor portion 176 (diameter φ ₂ = 8 μm) is made of (amorphous IZO / silver alloy) so that one end of the conductor portion 176 and the transparent conductive layer 171 are electrically connected only on the upper surface of the convex portion 171b. Formed. The LED characteristics of the four types of semiconductor light emitting devices 10 prepared in this way were measured.

Further, as a comparative example, SiO ₂ (silicon oxide) is used instead of the multilayer insulating layer 172 on the upper surface of the transparent conductive layer (IZO) having a constant thickness (200 nm), and the thickness (5Q = 380 nm) Two types of semiconductor light emitting elements were prepared by the same operation as described above except that an insulating layer was formed.
The thickness of SiO ₂ (silicon oxide) insulation layer formed using (5Q), using the emission wavelength of the refractive index n and the light emitting layer 150 of SiO ₂ (silicon oxide) lambda (nm) defined Q = (λ / 4n) which is five times the numerical value (380 nm).

  Next, as shown in FIG. 1, these six types of semiconductor light emitting elements 10 were each mounted on a submount 15 to prepare six flip-chip type semiconductor light emitting devices 1. Subsequently, LED characteristics of each of these six semiconductor light emitting devices 1 were measured. The results are shown in Table 1. In Table 1, Vf is a forward voltage (unit: V), and Po is a light emission output (unit: mW).

From the results shown in Table 1, FC (flip chip) prepared using a semiconductor light emitting device 10 having a multilayer conductive layer 172 composed of a laminate of a plurality of layers having different refractive indexes and a transparent conductive layer 171 having a plurality of film thickness portions. ) Type semiconductor light emitting device (Examples 1A to 2A), the light emission output Po at Po @ 20 mA is 32.94 mW when the second metal reflective layer is silver (Ag) (base (x) 25 nm of transparent conductive layer) And 32.85 mW (base (x) 50 nm of transparent conductive layer). On the other hand, in a semiconductor light emitting device (Comparative Example 1A; thickness equivalent to 5Q) provided with a conventional transparent conductive layer having no plurality of film thickness portions and a single insulating layer made of SiO ₂ (silicon oxide), Po is used. The light emission output Po at @ 20 mA is 30.16 mW when the second metal reflective layer is silver (Ag).
Similarly, when the second metal reflective layer is aluminum (Al), the thickness is 31.20 mW (base (x) 25 nm of transparent conductive layer) and 31.55 mW (base (x) 50 nm of transparent conductive layer). On the other hand, in the semiconductor light emitting device (Comparative Example 1A) provided with the conventional transparent conductive layer and the single insulating layer made of SiO ₂ (silicon oxide), the light emission output Po at Po @ 20 mA is the second metal reflective layer. Is aluminum (Al), it is 27.25 mW.
On the other hand, the forward voltage (Vf) is 2.93 V (base of transparent conductive layer (x) 25 nm) and 2.91 V (base of transparent conductive layer (x)) when the second metal reflective layer is silver (Ag). 50 nm). On the other hand, in the semiconductor light emitting device (Comparative Example 1A) including the conventional transparent conductive layer and the single insulating layer made of SiO ₂ (silicon oxide), the forward voltage (Vf) at Po @ 20 mA is When the metal reflective layer is silver (Ag), it is 3.07V, and when the second metal reflective layer is aluminum (Al), it is 4.31V.

Further, the FC (flip chip) type semiconductor light emitting device prepared by using the semiconductor light emitting element 10 having the multilayer insulating layer 172 composed of a laminate of a plurality of layers having different refractive indexes from the transparent conductive layer 171 having a plurality of film thickness portions. In Examples 1B to 2B, the light emission output Po at Po @ 80 mA is 113.01 mW (base (x) 25 nm of the transparent conductive layer) and 113.14 mW when the second metal reflective layer is silver (Ag). This is the base (x) 50 nm of the transparent conductive layer. On the other hand, in the semiconductor light emitting device (Comparative Example 1B) provided with a conventional transparent conductive layer having no plurality of film thickness portions and a single insulating layer made of SiO ₂ (silicon oxide), the light emission output at Po @ 80 mA. Po is 103.80 mW when the second metal reflective layer is silver (Ag).
Similarly, when the second metal reflective layer is aluminum (Al), the thickness is 107.22 mW (base (x) 25 nm of transparent conductive layer) and 108.96 mW (base (x) 50 nm of transparent conductive layer). On the other hand, in the semiconductor light emitting device (Comparative Example 1B) provided with the conventional transparent conductive layer and the single insulating layer made of SiO ₂ (silicon oxide), the light emission output Po at Po @ 80 mA is the second metal reflective layer. Is aluminum (Al), it is 93.82 mW.
On the other hand, the forward voltage (Vf) is 3.23 V (base of transparent conductive layer (x) 25 nm) and 3.19 V (base of transparent conductive layer (x) when the second metal reflective layer is silver (Ag). 50 nm). On the other hand, in the semiconductor light emitting device (Comparative Example 1B) provided with the conventional transparent conductive layer and the single insulating layer made of SiO ₂ (silicon oxide), the forward voltage (Vf) at Po @ 80 mA is When the metal reflective layer is silver (Ag), it is 3.38V, and when the second metal reflective layer is aluminum (Al), it is 4.94V.

Thus, from the result shown in Table 1, it prepared using the semiconductor light-emitting element 10 which has the multilayer insulating layer 172 which consists of the laminated body of the transparent conductive layer 171 which has a some film thickness part, and a several layer from which a refractive index differs. The FC (flip chip) type semiconductor light emitting device (Examples 1 to 2) includes a conventional transparent conductive layer having no plurality of film thickness portions and a single insulating layer made of SiO ₂ (silicon oxide). It can be seen that the light emission output (Po: mW) increases while suppressing an increase in the forward voltage (Vf: V) as compared with the semiconductor light emitting element.
From this result, the multilayer insulating layer 172 composed of a laminate of a plurality of layers having different refractive indexes is combined with the second metal reflective layer 173a and has an excellent function as a reflective film that reflects the light output from the light emitting layer 150. It can be seen that Further, by using the transparent conductive layer 171 having a plurality of film thickness portions, a forward voltage (Vf: V) substantially the same as that in the case of using a conventional transparent conductive layer not having a plurality of film thickness portions is maintained. You can see that

In addition, although detailed data is not described in this embodiment column, the transparent conductive layer 171 having the convex portions 171b related to the transparent conductive layer 171 described above has an area ratio (%) of 8% to 40%. It is particularly preferable in terms of the light emission output and the forward voltage to be provided in the range, and it has been found that optimum conditions exist.
That is, under the condition where the area ratio (%) of the convex portion 171b exceeds 60%, the light emission output is higher than the light emission output under the condition of the area ratio (%) of 8% to 40%. Declined. In this condition range, the forward voltage remained low. On the other hand, when the area ratio (%) of the convex portion 171b is less than 8%, the light emission output is higher than the light emission output under the condition of the area ratio (%) of 8% to 40%. The forward voltage (Vf: V) also remained high.

Although detailed data description is omitted in the present embodiment column, the interval (pitch l) between the plurality of convex portions 171b is not limited to 82 μm used in the first and second embodiments, but is also shown in FIG. 12 A pattern (isolated pattern) as shown in FIG. 12 was examined, and it was confirmed that the interval (pitch l) between the convex portions 171b is preferably in the range of 10 μm to 120 μm.
When the pitch l is excessively large, the ratio (A / B) of the film thickness portion provided with the convex portions 171b to the transparent conductive layer 171 is reduced, and the effect of the above-described invention is reduced. In particular, there was a tendency for the forward voltage (Vf) to increase. When the pitch l was excessively small, the ratio (A / B) was increased, and the tendency that the emission intensity was not improved was observed.

FIG. 13 is a diagram showing the measurement result of the angular distribution of the emission intensity in the semiconductor light emitting device 1. FIG. 13A shows the semiconductor light emitting device 1 used in Example 1A (the thickness (x) of the base portion 171a of the transparent conductive layer 171: 25 nm / multilayer insulating layer 172), and the metal of the second metal reflective layer 173a is silver. It is a measurement result in the case of (Ag) (thick line: multilayer Ag increased reflection) and in the case of aluminum (Al) (thin line: multilayer Al increased reflection).
FIG. 13B shows the semiconductor light emitting device 1 used in Example 2A (the thickness (x) of the base portion 171a of the transparent conductive layer 171: 50 nm / multilayer insulating layer 172). The metal of the second metal reflective layer 173a is silver. It is a measurement result in the case of (Ag) (thick line: multilayer Ag increased reflection) and in the case of aluminum (Al) (thin line: multilayer Al increased reflection).
FIG. 13C shows a semiconductor light emitting device used in Comparative Example 1A (transparent conductive layer (IZO) / SiO ₂ (silicon oxide) insulating layer (thickness: 380 nm) having a constant thickness (200 nm)). This is a measurement result when the metal of the two-metal reflective layer 173a is silver (Ag) (thick dotted line: single layer Ag increased reflection) and aluminum (Al) (thin dotted line: single layer Al increased reflection).

From the results shown in FIG. 13, an FC (prepared using a semiconductor light emitting device 10 in which a transparent conductive layer 171 having a plurality of film thickness portions and a multilayer insulating layer 172 composed of a stack of a plurality of layers having different refractive indexes are combined. In the case of the flip chip) type semiconductor light emitting device (Examples 1A to 2A) (FIGS. 13A to 13B), the emission intensity at 90 degrees (referred to as “front light”) is 2000 (no unit). I understand that it exceeds.
In contrast, an FC (flip chip) type prepared using a semiconductor light-emitting element having a single transparent insulating layer made of a conventional transparent conductive layer (IZO) and SiO ₂ (silicon oxide) having no plurality of film thickness portions. In the case of the semiconductor light emitting device (Comparative Example 1A) (FIG. 13C), it can be seen that the emission intensity (front light) at an angle of 90 degrees does not reach 1500 (no unit).
Thereby, it can be seen that the front light increases in the semiconductor light emitting device 1 to which the present exemplary embodiment is applied.

DESCRIPTION OF SYMBOLS 1 ... Semiconductor light-emitting device, 10 ... Semiconductor light-emitting element, 10B ... Submount board | substrate, 11, 12 ... Submount wiring, 15 ... Submount, 21,22 ... Bump (connector), 100 ... Multilayer semiconductor layer, 110 ... Substrate 110c, 160c ... upper surface, 120 ... intermediate layer, 130 ... underlayer, 140 ... n-type semiconductor layer, 140c ... exposed semiconductor layer, 150 ... light emitting layer, 160 ... p-type semiconductor layer, 170 ... second electrode, 171 ... transparent conductive layer, 171a ... base, 171b ... convex part, 172 ... multilayer insulating layer, 173a ... second metal reflective layer, 174 ... second bonding layer, 175 ... second protective adhesion layer, 176 ... conductor part, 180 ... 1st electrode, 180a ... 1st opening part, 181 ... 1st metal reflective layer, 182e ... 1st bonding layer, 183 ... 1st protective adhesion layer, 190 ... Protective layer

Claims (10)

A laminated semiconductor layer in which a first semiconductor layer having a first conductivity type, a light emitting layer, and a second semiconductor layer having a second conductivity type exhibiting conductivity opposite to the first conductivity type are laminated; ,
A first electrode connected to the first semiconductor layer;
A second electrode provided on the surface of the second semiconductor layer,
The second electrode is
A transparent conductive layer having a plurality of film thickness portions having a larger film thickness than other portions and exhibiting light transmittance with respect to light emitted from the light emitting layer;
A first insulating layer that is laminated on the transparent conductive layer and has a first refractive index and exhibits light transmittance with respect to light emitted from the light emitting layer, and a second higher than the first refractive index. A multilayer insulating layer configured by alternately laminating a second insulating layer having a refractive index of 2 and exhibiting optical transparency with respect to light emitted from the light emitting layer;
A metal reflective layer laminated on the multilayer insulating layer and having conductivity and exhibiting reflectivity with respect to light emitted from the light emitting layer ;
A conductive portion provided through the multilayer insulating layer, having one end electrically connected to the film thickness portion of the transparent conductive layer and the other end electrically connected to the metal reflective layer. A semiconductor light emitting device.   The transparent conductive layer includes a base formed so as to continuously cover the surface of the second semiconductor layer, and a plurality of protrusions formed on the multilayer insulating layer side so as to have a convex portion having a thickness larger than the base. The semiconductor light-emitting element according to claim 1, wherein   The semiconductor light emitting device according to claim 2, wherein the convex portions of the transparent conductive layer are disposed on the base portion with a certain interval. The thickness of the transparent conductive layer includes a first protrusion disposed on the base provided with a constant interval, and the second protrusion linear binding together the first protrusion 4. The semiconductor light-emitting element according to claim 2, wherein a lattice-like pattern is formed.   5. The semiconductor light-emitting element according to claim 1, wherein the multilayer insulating layer has a structure in which one second insulating layer is sandwiched between two first insulating layers. 6.   The multilayer insulating layer includes the first insulating layer having the first refractive index on a surface on the transparent conductive layer side and on a surface on the metal reflective layer side, respectively. 4. The semiconductor light emitting device according to any one of 3 above.   The semiconductor light emitting device according to claim 1, wherein a plurality of the conductor portions are formed so as to be distributed over the entire multilayer insulating layer.   A first connector used for electrical connection between the first electrode and the outside; and a second connector used for electrical connection between the second electrode and the outside. The semiconductor light-emitting device according to claim 1, wherein the semiconductor light-emitting device is a light-emitting device. A semiconductor light emitting device comprising a semiconductor light emitting element and a circuit board on which the semiconductor light emitting element is mounted,
The semiconductor light emitting element is
a laminated semiconductor layer in which an n-type semiconductor layer, a light emitting layer, and a p-type semiconductor layer are laminated, a negative electrode connected to the n-type semiconductor layer, and a positive electrode provided on a surface of the p-type semiconductor layer,
The positive electrode is
A transparent conductive layer having a plurality of protrusions on the side opposite to the laminated semiconductor layer side and containing indium;
From the first insulating layer, which is laminated on the convex portion side of the transparent conductive layer and has a first refractive index and exhibits light transmittance with respect to light emitted from the light emitting layer, and the first refractive index A multilayer insulating layer configured by alternately laminating second insulating layers having a high second refractive index and exhibiting optical transparency with respect to light emitted from the light emitting layer;
A metal reflective layer laminated on the multilayer insulating layer and containing silver and exhibiting reflectivity with respect to light emitted from the light emitting layer ;
A plurality of conductor portions formed through the multilayer insulating layer and having one end electrically connected to the convex portion of the transparent conductive layer and the other end electrically connected to the metal reflective layer;
The circuit board is disposed so as to face the positive electrode of the semiconductor light emitting element.   10. The semiconductor light emitting device according to claim 9, wherein the circuit board includes a pair of wirings connected to the negative electrode and the positive electrode of the semiconductor light emitting element by connectors.

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