JP5831002B2 - Oscillators and electronics - Google Patents

Description

The present invention relates to a technique for suppressing frequency drift of startup in the oscillator.

  In electronic equipment, a temperature compensated oscillator that oscillates at a stable frequency in a certain temperature range is known. Patent Document 1 discloses a small piezoelectric device using a piezoelectric vibrator. The piezoelectric vibrator draws a temperature characteristic of a cubic curve having an inflection point near room temperature as an AT cut, for example. In order to accurately correct the third-order temperature characteristic of the piezoelectric vibrator, a temperature sensor and a temperature correction circuit for detecting a change in ambient temperature are mounted inside the IC chip. The temperature sensor is composed of a diode or the like, for example, and detects the voltage value of the diode that changes according to the ambient temperature as a temperature change. Based on the temperature change information obtained by the temperature sensor, a temperature correction voltage is generated, and this correction voltage is applied to a voltage-controlled oscillation circuit to cancel and stabilize the third-order temperature characteristic of the piezoelectric vibrator. The frequency can be obtained. Patent Document 2 discloses a temperature compensated oscillator that uses a startup correction voltage that compensates for a temperature compensation error at startup. Patent Document 3 discloses an oscillation device that controls an oscillation frequency using an auxiliary capacitor. Patent Documents 4 and 5 disclose temperature compensated oscillators using a switched capacitor circuit.

JP 2008-136169 A JP 2008-271355 A JP 2007-318203 A Japanese Utility Model Publication No. 5-20407 JP-A-5-75036

In Patent Document 1, active elements around the oscillation circuit and the output driver generate heat during start-up, so that a minute temperature error occurs between the IC chip and the piezoelectric vibrator, and the frequency drifts immediately after start-up (with time elapses). A phenomenon in which the frequency slightly fluctuates) and it is difficult to obtain a stable frequency. As a temperature compensated oscillator used in the GPS system, it is necessary to suppress the frequency drift immediately after startup to several tens of ppb or less (for example, 50 ppb or less).
Patent Document 2 is for solving this problem. A frequency drift caused by a temperature error between the heat generation of the IC chip at the time of activation and the operating temperature of the piezoelectric vibrator is measured in advance. By generating a start-up correction voltage to be corrected and applying it to the variable capacitance element in the oscillation circuit, the frequency drift is reduced.
However, with the configuration as in Patent Document 2, there is a problem that the clock generation circuit for generating the startup correction voltage is always in operation and it is difficult to reduce power consumption.
On the other hand, the present invention provides a method for obtaining a very stable frequency by reducing frequency drift fluctuation at the time of startup with lower power consumption.

The present invention, vibration and a Doko and a variable capacitance element, an oscillation circuit outputs an oscillation signal oscillated at a frequency corresponding to a control voltage, wherein are entered into the variable capacitance element, to correct the frequency of the oscillating signal and a correction circuit for generating correction data for the correction circuit outputs the signal obtained by dividing the oscillation signal, the frequency division enable signal for stopping the division operations are entered and vessels, co when counting the output signal of the frequency divider, a counter circuit for outputting a pre-Symbol enable signal to said frequency divider, p bits (where p output signal as a clock signal of the frequency divider is positive Japanese a shift register to generate parallel data, said parallel data by encoding q bits (where q is provided with an encoder for generating the correction data of a positive integer) of an integer) To provide you that the oscillator with.
According to this the oscillator with low power consumption more as compared with the configuration in which the frequency divider is not stopped, it is possible to output the correction data corresponding to the elapsed time from startup.

In a preferred embodiment, this oscillators is the correction data output from the encoder into an analog signal, and a digital / analog converter for outputting a correction signal, the control based on the signal inputted from the temperature sensor to generate a voltage, it may be a control voltage generating circuit configured to correct the control voltage based on the correction signal.
According to this the oscillator, using a control voltage in accordance with the correction data, it is possible to perform the control according to the elapsed time from the time of start-up.

In another preferred embodiment, this the oscillator includes a control voltage generating circuit for generating the control voltage based on the input signals from the temperature sensor, and a plurality of capacitive elements, based on the correction data, said plurality of You may provide the some switching element which controls the connection of each of a capacitive element and the said oscillation circuit.
According to this the oscillator, by using a capacitive element connected in accordance with the correction data, it is possible to perform control was according to the elapsed time from the start.

In still another preferred embodiment, the frequency dividing number of the frequency divider may be variable.
According to this the oscillator, it is possible to change the time for compensating circuit operates.

In still another preferred embodiment, the number of bits p of the shift register may be variable.
According to this the oscillator, it is possible to change the time resolution of the correction data.

In still another preferred embodiment, the number of bits q of the encoder may be variable.
According to this the oscillator, it is possible to change the time resolution of the correction data.

In still another preferred embodiment, 2 to the power of q may be p or more.
According to this the oscillator, it is possible to improve the utilization efficiency of the data output from the shift register.

Further, the present invention provides an electronic apparatus having an electronic circuit that operates using the any one of the oscillators, the oscillation signal output from the pre-Symbol oscillator.
According to this electronic device, it is possible to output correction data corresponding to the elapsed time from the start-up with lower power consumption compared to a configuration in which the frequency divider does not stop.

1 is a schematic cross-sectional view showing a configuration of a temperature compensated oscillator 1 according to a first embodiment. FIG. 6 is a diagram illustrating temperature characteristics of the vibrator 11. The figure which illustrates the fluctuation | variation of the oscillation frequency of the temperature compensation oscillator which concerns on a prior art. 1 is a diagram showing a circuit configuration of a temperature compensated oscillator 1. FIG. The figure which illustrates the capacity-voltage characteristic of a variable capacity element. The figure which illustrates reference voltage Vref and temperature compensation voltage Vc. FIG. 3 is a diagram illustrating a circuit configuration of a shift register 33. The figure which illustrates the data output from the shift register 33. The figure which illustrates offset voltage. The figure which illustrates the time variation of the frequency deviation in the temperature compensation oscillator 1. The figure which shows the circuit structure of the temperature compensation oscillator 2 which concerns on 2nd Embodiment. It is a figure which shows the structure of the electronic device.

1. First Embodiment FIG. 1 is a schematic cross-sectional view showing a configuration of a temperature compensated crystal oscillator (TCXO , an example of an oscillator ) 1 according to a first embodiment . The temperature compensated oscillator 1 includes a sheet substrate 81, a vibrator substrate 82, a vibrator 11, an IC chip 83, and a cap 84. The temperature compensated oscillator 1 generally has a configuration in which the vibrator 11 is disposed on the IC chip 83. The vibrator substrate 82 has a space 90 inside. The vibrator 11 is installed so as to be accommodated in the space 90. The vibrator 11 is bonded to the vibrator substrate 82 by an adhesive member 88. The vibrator substrate 82 is provided with a hole 89. The vibrator 11 is electrically connected to the terminal 87 via an adhesive member 88 filled in the hole 89. An IC chip 83 is attached on the sheet substrate 81. The IC chip 83 is connected to the connection member 86 through the wire 91. The connecting member is connected to the terminal 87. An oscillation circuit using the vibrator 11 is formed on the IC chip 83.

FIG. 2 is a diagram illustrating the temperature characteristics of the vibrator 11. The horizontal axis represents temperature, and the vertical axis represents frequency deviation. The frequency deviation is based on the frequency at 25 ° C. In this example, the vibrator 11 is an AT-cut quartz crystal vibrator. The vibrator 11 has a characteristic (solid line in FIG. 2) approximated by a cubic curve having an inflection point near room temperature (25 ° C.). In order to compensate for this temperature variation, the IC chip 83 is formed with a temperature sensor, a nonvolatile memory, and a temperature compensation voltage (control voltage) generation circuit. The temperature compensation voltage generation circuit compensates the temperature characteristic of the vibrator 11 using the temperature information output from the temperature sensor and the temperature characteristic of the vibrator 11 stored in the nonvolatile memory (see FIG. 2). A voltage for generating a broken line is output.

  FIG. 3 is a diagram illustrating the fluctuation (drift) of the oscillation frequency when the temperature compensated oscillator according to the related art is started. The horizontal axis represents the time since the temperature compensated oscillator was started, and the vertical axis represents the frequency deviation. In this example, the oscillation frequency immediately after the start of the temperature compensated oscillator is several tens of ppb lower than the reference frequency. This is because, for example, in the configuration in which the transducer substrate 82 is provided between the transducer 11 and the temperature sensor (IC chip 83) as shown in the configuration of FIG. This is considered to be due to a temperature difference between the IC chip 11 and the IC chip 83. Immediately after startup, the measurement result of the temperature sensor shows a temperature higher than the temperature of the vibrator 11 due to heat generated by the active element provided in the IC chip. Since the temperature compensation voltage generation circuit generates a temperature compensation voltage based on this incorrect temperature, it is considered that the oscillation frequency of the temperature compensation oscillator deviates from the reference frequency. When time elapses from the activation of the temperature compensated oscillator, heat is conducted from the IC chip 83 to the vibrator 11, and the temperatures of both become substantially equal. When the IC chip 83 and the vibrator 11 reach substantially the same temperature, the temperature sensor measures the correct temperature, and the deviation from the reference frequency is reduced by the temperature compensation voltage.

  For example, in a temperature compensated oscillator used for a GPS receiver, it may be required that the frequency fluctuation at startup is suppressed to several tens of ppb or less. However, for example, the characteristics shown in FIG. 3 cannot satisfy this requirement.

  FIG. 4 is a diagram showing a circuit configuration of the temperature compensated oscillator 1. The temperature compensation oscillator 1 includes an oscillation circuit 10, an amplifier 20, a drift correction circuit 30, a DA converter 40, a temperature compensation voltage generation circuit 50, and a temperature sensor 60.

  The oscillation circuit 10 is a circuit that outputs a signal oscillated at a frequency corresponding to a temperature compensation voltage input from the outside. The oscillation circuit 10 has a reference voltage input terminal to which the reference voltage Vref is input, a temperature compensation voltage input terminal to which the temperature compensation voltage Vc is input, and a reference signal output terminal. The oscillation circuit 10 outputs a reference signal oscillated at a frequency corresponding to the reference voltage Vref and the temperature compensation voltage Vc from the output terminal. The oscillation circuit 10 includes a vibrator 11 (an example of a piezoelectric vibrator), an amplifier 12, a resistor element 13, a variable capacitor element 14, a variable capacitor element 15, a capacitor element 16, a resistor element 17, and a resistor element. 18. The vibrator 11, the amplifier 12, the resistance element 13, the variable capacitance element 14, and the variable capacitance element 15 form a so-called Colpitts oscillation circuit. The capacitive element 16 is a capacitive element for cutting off a direct current, and one end thereof is grounded. The resistance element 17 and the resistance element 18 are resistance elements for interrupting alternating current.

  FIG. 5 is a diagram illustrating the capacitance-voltage characteristics (CV characteristics) of the variable capacitance element 14 and the variable capacitance element 15. The variable capacitance element 14 and the variable capacitance element 15 are elements using a capacitance between a gate and a back gate of a four-terminal FET (Field Effect Transistor), for example. The horizontal axis indicates the gate-back gate voltage VGB, and the vertical axis indicates the capacitance. In this example, the capacitances of the variable capacitance element 14 and the variable capacitance element 15 increase in accordance with the increase of the voltage VGB in a range of V1 <VGB <V2 (V1 <0 and V2> 0).

  Refer to FIG. 4 again. The temperature compensation voltage Vc output from the temperature compensation voltage generation circuit 50 is applied to the back gate side of the variable capacitance element 14 and the variable capacitance element 15. A reference voltage Vref is applied to the gate sides of the variable capacitance elements 14 and 15 via the resistance elements 17 and 18. That is, a voltage corresponding to the difference between the reference voltage Vref and the temperature compensation voltage Vc is applied to the variable capacitance element 14 and the variable capacitance element 15. The oscillation frequency in the oscillation circuit 10 depends on the capacitance of the variable capacitance element 14 and the variable capacitance element 15. Therefore, the oscillation frequency in the oscillation circuit 10 can be controlled by applying the constant reference voltage Vref and the temperature compensation voltage Vc generated according to the temperature from the outside.

  The temperature sensor 60 outputs a temperature signal indicating the temperature. The temperature sensor 60 is, for example, a diode whose voltage varies with temperature. The temperature compensation voltage generation circuit 50 has a temperature signal input terminal to which a temperature signal is input, a correction signal input terminal to which an offset voltage correction signal is input, and an output terminal. The temperature compensation voltage generation circuit 50 outputs the temperature compensation voltage Vc generated according to the temperature signal output from the temperature sensor 60 and the offset voltage correction signal output from the DA converter 40 from the output terminal. The temperature compensation voltage generation circuit 50 includes a tertiary circuit 51, a primary circuit 52, a zero-order circuit 53, and a nonvolatile memory 54. The tertiary circuit 51 outputs a voltage obtained by a cubic function of temperature according to the temperature signal. The primary circuit 52 outputs a voltage obtained by a linear function of temperature according to the temperature signal. The coefficients of the cubic function and the linear function are stored in the nonvolatile memory 54. The nonvolatile memory 54 stores a coefficient corresponding to the temperature characteristics of the vibrator 11 and the IC chip 83. The tertiary circuit 51 and the primary circuit 52 read a coefficient from the nonvolatile memory 54 and output a voltage obtained using the coefficient. The zero-order circuit 53 outputs an offset voltage (zero-order term of temperature) according to the offset voltage correction signal output from the DA converter 40. Details of the offset voltage will be described later. The adder 55 adds the output signals from the tertiary circuit 51, the primary circuit 52, and the zero-order circuit 53. The adder 55 outputs the voltage obtained by the addition as the temperature compensation voltage Vc. In this embodiment, an example of generating a temperature compensation voltage up to the third order component is shown, and the order of the compensation voltage generation circuit is not limited. Furthermore, higher order components (quaternary circuit, quintic circuit) may be included. In summary, the temperature compensation voltage generation circuit 50 generates the temperature compensation voltage Vc based on the signal input from the temperature sensor 60, and corrects and outputs the temperature compensation voltage Vc based on the correction signal.

  FIG. 6 is a diagram illustrating the reference voltage Vref and the temperature compensation voltage Vc. The reference voltage Vref is a constant voltage with respect to temperature. The temperature compensation voltage Vc has a temperature dependency that compensates for the temperature dependency shown in FIG.

  Refer to FIG. 4 again. The amplifier 20 amplifies the output signal from the oscillation circuit 10. The amplifier 20 functions as a so-called output buffer. The amplifier 20 outputs a reference signal from the output terminal of the temperature compensated oscillator 1.

  The drift correction circuit 30 outputs drift correction data based on the reference signal. The drift correction circuit 30 has a reference signal input terminal and a correction data output terminal. The drift correction circuit 30 includes a frequency divider 31, a counter 32, a shift register 33, and an encoder 34.

  The frequency divider 31 outputs a signal obtained by dividing the reference signal by N. The frequency divider 31 has an oscillation signal input terminal, an enable signal input terminal (an example of an enable terminal), and a frequency division signal output terminal. The oscillation signal input terminal is connected to the oscillation signal input terminal of the drift correction circuit 30. The frequency divider 31 outputs a signal obtained by dividing the reference signal by N while the L level signal (an example of the first level) is input to the enable signal input terminal from the frequency division signal output terminal. When an H level signal (an example of the second level) is input from the enable signal input terminal, the frequency divider 31 stops its operation. In this example, the division period 31 divides the reference signal by 512 (N = 512). For example, when the oscillation frequency of the reference signal is 16 MHz, the frequency of the signal obtained by dividing this by 512 is 31.25 kHz. That is, the frequency divider 31 has an enable terminal that outputs a signal obtained by dividing the oscillation signal and receives an enable signal for stopping the frequency dividing operation.

  The counter 32 (an example of a counter circuit) is a p-bit counter. The counter 32 measures a time corresponding to p periods using the reference signal divided by N as a clock signal. The counter 32 has a clock signal input terminal and a counter signal output terminal. The clock signal input terminal is connected to the divided signal output terminal. The counter signal output terminal is connected to the enable signal input terminal. The counter 32 outputs an L level signal from the counter signal output terminal at the start of operation. The counter 32 outputs an H level signal from the counter signal output terminal when a time corresponding to p cycles elapses using the reference signal divided by N as a clock signal. In this example, the counter 32 is a 127-bit counter (p = 127). The counter 32 uses a clock signal of 31.25 kHz (one cycle of 32 μsec) and outputs a signal at H level from the counter signal output terminal when a time corresponding to 127 cycles (about 4 msec) has elapsed. That is, the counter 32 counts the output signal of the frequency divider 31 and supplies the output signal to the frequency divider 31 as an enable signal.

  The shift register 33 is a serial input parallel output type p-bit shift register. The shift register 33 has a clock signal input terminal CLK, a load signal input terminal Load, a data signal input terminal DIN, and a parallel signal output terminal. The shift register 33 operates using the signal input from the clock signal input terminal as a clock signal, shifts the data by 1 bit every cycle, and outputs the data as p-bit data from the parallel signal output terminal. That is, the shift register 33 generates parallel data of a predetermined number of bits using the output signal of the frequency divider 31 as a clock signal.

  FIG. 7 is a diagram illustrating a circuit configuration of the shift register 33. The shift register 33 has p sets of selectors 331 and flip-flops 332. In the example of FIG. 7, the shift register 33 has a total of 127 flip-flops 332 from the 0th stage to the 126th stage. The selector 331 has a first input terminal (DIN), a second input terminal (Hi), a third input terminal (Load), and an output terminal. The selector 331 outputs a signal input from the first input terminal from the output terminal when an L level signal is input to the third input terminal. When an H level signal is input to the third input terminal, the selector 331 outputs the signal input from the second input terminal from the output terminal. In the 0th stage selector 331, the first input terminal is connected to the data input terminal DIN. The second input terminal is connected to an H level power line. The third input terminal is connected to the load signal input terminal. The flip-flop 332 is a delay flip-flop. The flip-flop 332 has a data signal input terminal, a clock signal input terminal, and an output terminal. The data signal input terminal is connected to the output terminal of the selector 331. The flip-flop 332 delays the signal input from the data signal input terminal by one cycle and outputs it from the output terminal. In the selector 331 at the first stage and thereafter, the first input terminal is connected to the output terminal of the preceding flip-flop 332. According to this configuration, the shift register 33 delays the signal input from the data signal input terminal DIN to the subsequent flip-flop 332 by one cycle while the L level signal is input as the load signal. To do. The data signal input terminal DIN is connected to an H level power supply line, and an H level signal (logical value “1”) is input thereto. When an H level signal is input as a load signal, all the selectors 331 output an H level signal.

  FIG. 8 is a diagram illustrating data output from the shift register 33. In the first period, the output data is all 0 from the 0th bit to the 126th bit. In the second period, the 0th bit data becomes 1. In the third period, the data of the first bit and the 0th bit becomes 1. In the i-th period, the data from the 0th bit to the (i−1) th bit becomes 1. In the 128th period, all data from the 0th bit to the 126th bit becomes 1. That is, the data output from the shift register 33 indicates the period after the temperature-compensated oscillator 1 is activated, depending on the number of bits having a value of 1.

Refer to FIG. 4 again. The encoder 34 encodes the p-bit data output from the shift register 33 into q-bit data. The encoder has an input terminal and an output terminal. In this example, the encoder 34 encodes 128-bit data input from the input terminal into 7-bit data (q = 7). The data output from the shift register 33 is a 127-bit bit string, which is considered to indicate one of 128 values from 0 to 127. The encoder 34 converts this value into a 7-bit (2 ⁷ = 128) binary number. The encoder 34 outputs this 7-bit data from the correction data output terminal as drift correction data.

  As a whole, the drift correction circuit 30 operates using the reference signal output from the oscillation circuit 10. After the oscillation circuit 10 is activated (after starting oscillation), q-bit drift correction data is output until the p period elapses using a signal obtained by dividing the reference signal by N as a clock signal. When the p period elapses, the H level signal output from the counter 32 is supplied to the enable signal input terminal of the frequency divider 31. When an H level signal is input from the enable signal input terminal, the frequency divider 31 stops operating. When the frequency divider 31 stops operating, the clock signal is not supplied to the counter 32 and the shift register 33. When the clock signal is not supplied, the counter 32 and the shift register 33 stop operating. Even after the operation is stopped, the counter 32 continues to output an H level signal as long as the power supply voltage is supplied. Similarly, the shift register 33 continues to output data in which all bit values are 1. The encoder 34 continues to output data corresponding to the voltage after a predetermined time has elapsed.

  The DA converter 40 (an example of a digital / analog converter) converts the digital data output from the drift correction circuit 30 into an analog signal. The DA converter 40 has a digital input terminal and an analog output terminal. The digital input terminal is connected to the correction data output terminal of the drift correction circuit. The analog output terminal is connected to the zero-order circuit 53 of the temperature compensation voltage generation circuit 50. The DA converter 40 converts the drift correction data into an analog signal and outputs it from the analog output terminal. That is, the DA converter converts the correction data output from the encoder 34 into an analog signal and outputs it as a correction signal.

  FIG. 9 is a diagram illustrating an offset voltage output from the zeroth-order circuit 53. The horizontal axis indicates the time since the temperature compensated oscillator 1 is started, and the vertical axis indicates the offset voltage Dcal. When the operation time ts (in this example, about 4 milliseconds) corresponding to p periods of the N-divided signal has elapsed, the offset voltage Vos becomes constant. Before the operation time ts, the offset voltage Vos has a characteristic that compensates for the time variation of the frequency deviation illustrated in FIG. 3 (for example, the time change of the voltage is large immediately after startup, and thereafter the time change of the voltage gradually decreases. Characteristic). In FIG. 9, the voltage-time characteristic is represented as a smooth curve, but the resolution of the time axis is ts / p. For example, when ts = about 4 msec and p = 127, the resolution of the time axis is about 32 μsec. Further, the drift correction circuit 30 can output 128 kinds of data when q = 7 and data of 2 to the qth power. For example, when the resolution of the temperature compensation voltage is 5 μV and the voltage sensitivity of the frequency fluctuation in the oscillation circuit is 100 ppm / V (that is, when the resolution of the frequency fluctuation axis is 500 ppt), the voltage is changed in 5 μV steps. Considering this, it is possible to compensate for frequency fluctuations in the range of 500 ppt × 128 = 64 ppb. That is, according to the temperature compensated oscillator 1, it is possible to correct the frequency variation with a time resolution of about 32 μs for about 4 milliseconds after the start-up. The coefficients indicating the characteristics of FIG. 9 are stored in the nonvolatile memory 54. The zero-order circuit 53 reads this coefficient from the non-volatile memory 54 and generates an offset voltage Vos corresponding to the elapsed time from the startup.

  FIG. 10 is a diagram illustrating the time variation of the frequency deviation in the temperature compensated oscillator 1. The horizontal axis indicates the time since the temperature compensated oscillator 1 is started, and the vertical axis indicates the frequency deviation. The solid line in the figure shows the frequency deviation due to the temperature compensated oscillator 1, and the broken line in the figure shows the frequency deviation (in the prior art) of FIG. According to the temperature compensated oscillator 1, the oscillation frequency is stabilized more quickly than when a constant offset voltage is used regardless of time. In the temperature compensated oscillator 1, after a predetermined time has elapsed, the drift correction circuit 30 stops its operation including the frequency divider 31. Therefore, power consumption can be reduced compared to a configuration in which the frequency divider continues to operate.

2. Second Embodiment FIG. 11 is a diagram illustrating a circuit configuration of a temperature compensated oscillator 2 according to a second embodiment. The temperature compensated oscillator 2 is different from the temperature compensated oscillator 1 in the following points. First, the oscillation circuit 10 has q sets of a capacitor element 101 and a transistor 102 (an example of a switching element). The temperature compensation voltage generation circuit 50 does not have a correction signal input terminal, and outputs a constant temperature compensation voltage Vc regardless of the elapsed time from the startup. The temperature compensated oscillator 2 does not have the DA converter 40.

In the temperature compensated oscillator 2, q capacitive elements 101 are provided in parallel with the variable capacitive element 14 and the variable capacitive element 15. Of the q capacitive elements 101, the i-th element is represented as a capacitive element 101 (i). The same applies to the transistor 102. One end of the capacitor 101 (i) is grounded, and the other end is connected to the source of the transistor 102 (i). The drain of the transistor 102 (i) is connected to the gate side of the variable capacitance element 14. The gate of the transistor 102 (i) is connected to the output terminal of the i-th bit of drift correction data. When the value of the i-th bit of the drift correction data is “1”, an H level signal is input to the gate of the transistor 102 (i), and the source / drain of the transistor 102 (i) is conducted. When the source / drain of the transistor 102 (i) becomes conductive, the capacitor 101 (i) is connected to the oscillation loop of the oscillation circuit 10 and the oscillation frequency changes. The frequency change depends on the capacitance connected to the oscillation loop. When the capacitance of the capacitive element 101 (i) is expressed as C (i) and the value of the i-th bit of the drift correction data is expressed as d (i) (d (i) = 0 or 1), the q capacitive elements 101 are combined. The capacity Ct is
Ct = Σ {C (i) · d (i)}
It is expressed. The value of the capacitance C (i) is determined so that the frequency change due to the combined capacitance compensates for the time change in FIG.

  Compared to the temperature compensated oscillator 1, the temperature compensated oscillator 2 does not have the DA converter 40, and therefore drift correction data can be generated with a simpler circuit configuration.

3. Other Embodiments The present invention is not limited to the above-described embodiments, and various modifications can be made. Hereinafter, some modifications will be described. Two or more of the following modifications may be used in combination.

3-1. Modification 1
FIG. 12 is a diagram illustrating a configuration of an electronic device 1000 according to the first modification. The electronic device 1000 includes a temperature compensated oscillator 1, a CPU (Central Processing Unit) 5, a GPS (Global Positioning System) receiver 6, a memory 7, and a display 8. In this example, the electronic device 1000 is a mobile phone. The GPS receiver 6 (an example of an electronic circuit) operates using the reference signal output from the temperature compensated oscillator 1 as a clock signal. According to this example, even when the temperature compensated oscillator 1 and the GPS receiver 6 are operated intermittently, for example, a clock signal with a stable frequency fluctuation can be supplied with lower power consumption. Electronic device 1000 is not limited to a mobile phone. Electronic device 1000 may be a device other than a mobile phone, such as a personal computer, a watch, a portable game machine, a home appliance, an automobile, or an electronic book reader. In addition, the electronic device 1000 may include a temperature compensated oscillator 2 instead of the temperature compensated oscillator 1.

3-2. Modification 2
The electronic device 1000 may have a configuration in which the frequency division number N of the frequency divider 31 is changed by the control of the CPU 5. In the embodiment, the example (N = 512) of dividing the reference signal of 16 MHz by 512 has been described. For example, when the reference signal of 16 MHz is divided by 256 (N = 256), the frequency is 62.5 kHz, that is, one cycle. Is 16 μs. As described above, when the frequency division number N is decreased, the time resolution is increased and the operation time of the drift correction circuit 30 is decreased. Conversely, when the frequency division number N is increased, the time resolution is decreased and the operation time of the drift correction circuit 30 is increased. The CPU 5 may change the frequency division number N of the frequency divider 31 according to the operation of the OS or the application program.

3-3. Modification 3
The electronic apparatus 1000 may have a configuration in which the bit number p of the counter 32 and the shift register 33 is changed under the control of the CPU 5. In the embodiment, the 127-bit (p = 127) counter 32 has been described as an example. For example, when a counter 32 of 255 bits (p = 255) is used, the operation time ts is about 8 milliseconds corresponding to 255 cycles. As described above, when the number of bits p of the counter 32 is increased, the operation time ts of the drift correction circuit 30 is increased. Conversely, when the bit number p of the counter 32 is decreased, the operation time ts of the drift correction circuit 30 is decreased.

3-4. Modification 4
The electronic apparatus 1000 may have a configuration in which the bit number q of the encoder 34 changes under the control of the CPU 5. When the resolution of the temperature compensation voltage is constant (the resolution of frequency fluctuation is constant), increasing the number of bits q of the encoder 34 increases the frequency fluctuation range that can be compensated. Conversely, if the bit number q of the encoder 34 is reduced, the range of frequency fluctuations that can be compensated is reduced. In order to effectively use the functions of the encoder 34 and the shift register 33, it is desirable that 2 to the qth power is p or more.

3-5. Modification 5
In the first embodiment, the encoder 34 outputs linear data with respect to time as correction data, and the 0th-order circuit 53 outputs a (non-linear) offset voltage corresponding to the characteristics of the vibrator 11 with respect to the correction data. The example to do was explained. However, the encoder 34 may output nonlinear data shown in FIG. 9 with respect to time as correction data, and the zero-order circuit 53 may simply output a linear voltage with respect to the offset voltage correction signal. .

3-6. Modification 6
The configuration of the temperature compensated oscillator 1 or the temperature compensated oscillator 2 is not limited to that illustrated in FIGS. 4 and 11. For example, some of these elements may be omitted. For example, the temperature compensated oscillator 1 may not include the DA converter 40, the temperature compensated voltage generation circuit 50, and the temperature sensor 60. In this case, the temperature compensated oscillator 1 exchanges signals with an external device corresponding to the DA converter 40, the temperature compensated voltage generation circuit 50, and the temperature sensor 60. In another example, the resonator 11 is not limited to a crystal resonator. Instead of the crystal resonator, a SAW (Surface Acoustic Wave) resonator may be used.

DESCRIPTION OF SYMBOLS 1 ... Temperature compensated oscillator, 2 ... Temperature compensated oscillator, 5 ... CPU, 6 ... GPS receiver, 7 ... Memory, 8 ... Display, 10 ... Oscillator, 11 ... Vibrator, 12 ... Amplifier, 13 ... Resistive element, 14 DESCRIPTION OF SYMBOLS ... Variable capacitance element, 15 ... Variable capacitance element, 16 ... Capacitance element, 17 ... Resistance element, 18 ... Resistance element, 20 ... Amplifier, 30 ... Drift correction circuit, 31 ... Frequency divider, 32 ... Counter, 33 ... Shift register 34 ... Encoder, 40 ... DA converter, 50 ... Temperature compensation voltage generation circuit, 51 ... Tertiary circuit, 52 ... Primary circuit, 53 ... Zero order circuit, 54 ... Non-volatile memory, 55 ... Adder, 60 ... Temperature sensor, 81 ... sheet substrate, 82 ... vibrator substrate, 83 ... IC chip, 84 ... cap, 86 ... connecting member, 87 ... terminal, 88 ... adhesive member, 89 ... hole, 90 ... space, 91 ... wire, 01 ... capacitive element, 102 ... transistor, 331 ... selector, 332 ... flip-flop, 1000 ... electronic equipment

Claims (8)

An oscillation circuit having an oscillator and a variable capacitance element, and outputting an oscillation signal oscillated at a frequency according to a control voltage input to the variable capacitance element;
A correction circuit for generating correction data for correcting the frequency of the oscillation signal,
The correction circuit includes:
And outputs a signal obtained by dividing the oscillation signal, the frequency of the enable signal is input Ru stopping the division of operating divider,
A counter circuit that counts the output signal of the frequency divider and outputs the enable signal to the frequency divider when the count indicates that a predetermined time has elapsed from the time of startup ,
A shift register for generating parallel data of p bits (where p is a positive integer) using the output signal of the frequency divider as a clock signal;
And an encoder that encodes the parallel data and generates the correction data of q bits (where q is a positive integer). A digital / analog converter that converts the correction data output from the encoder into an analog signal and outputs the analog signal;
2. A control voltage generating circuit that generates the control voltage based on a signal input from a temperature sensor and corrects and outputs the control voltage based on the correction signal. The oscillator described. A control voltage generation circuit for generating the control voltage based on a signal input from a temperature sensor;
A plurality of capacitive elements;
The oscillator according to claim 1, further comprising: a plurality of switching elements that control connection between each of the plurality of capacitive elements and the oscillation circuit based on the correction data. The oscillator according to any one of claims 1 to 3, wherein a frequency dividing number of the frequency divider is variable. The oscillator according to claim 4, wherein the number of bits p of the shift register is variable. Oscillator of claim 4 or 5, wherein the number of bits q of the encoder is variable. The oscillator according to any one of claims 1 to 6, wherein 2 to the power of q is p or more. An oscillator according to any one of claims 1 to 7,
And an electronic circuit that operates using the oscillation signal output from the oscillator.

Images