JP6233000B2 - Nonvolatile semiconductor memory - Google Patents

Description

  The present invention relates to a nonvolatile semiconductor memory.

  Since the nonvolatile memory retains data even after the power is turned off, the power consumption during standby can be reduced to zero. However, currently used nonvolatile memories are inferior to volatile random access memories (RAMs) in terms of operation speed, reliability, and price. For example, a flash memory, which is one of the nonvolatile memories, injects and takes out electrons through an oxide film that is an insulator, so that the deterioration of the oxide film gradually progresses, and the maximum number of erase / write operations is several. Limited to 10,000 times.

Similarly, a resistance change type memory (ReRAM) which is a nonvolatile memory has a capacitor structure in which a metal oxide which is a resistance change material is sandwiched between electrodes. As the metal oxide, NiO, TiO ₂ , Cu ₂ O, Ta ₂ O ₅ , CoO, or the like that has high affinity with the CMOS process is often used. However, these transition metal oxide resistance change memories have four problems. First, a forming process for forming an electric conduction path by applying a high voltage of, for example, 5 to 6 V is necessary. Second, transition metals are a source of contamination for silicon semiconductor production lines. Third, since the principle of operation is not clear, a guideline for quantitatively controlling the resistance change has not been obtained. Fourthly, a noble metal electrode having a high resistance to oxidation is often used for a memory using an oxide, and it is necessary to reduce costs and save resources.

  Among other nonvolatile memories, for example, a phase change memory (PRAM) has a limit in the number of rewrites because it causes a phase change of the film. In addition, since the ferroelectric memory (FeRAM) and the magnetoresistive memory (MRAM) often use a transition metal, it is necessary to pay attention to contamination of the production line.

  A channel region formed in the semiconductor substrate; a pair of diffusion layer regions formed so as to sandwich the channel region; a charge holding portion formed on the channel region via a first insulating film; and charge holding A semiconductor memory device having a gate electrode formed on a portion with a second insulating film interposed therebetween is known (for example, see Patent Document 1). The charge holding unit holds charged particles inside and can store information according to different distribution states of the held charged particles.

JP 2007-109895 A

  As described above, the conventional nonvolatile memory has a problem that the number of erasable and writable times is small. In addition, since the write voltage, erase voltage, and read voltage of the nonvolatile memory are high, there is a problem of high power consumption.

  An object of the present invention is to provide a nonvolatile semiconductor memory that consumes less power and can increase the number of erasable and writable times.

The nonvolatile semiconductor memory includes a silicon substrate, a source region formed in the silicon substrate, a drain region formed in the silicon substrate, and the silicon substrate between the source region and the drain region. is formed on top of the channel region, possess a silicon oxide film which lithium is doped, and the silicon film of undoped formed on the silicon oxide film and a gate electrode formed on said silicon film the silicon substrate is lightly doped n-type impurity-doped n-type silicon substrate, or impurities Ru silicon substrate der undoped undoped.

  Since lithium ions move in the silicon oxide film, they are not easily deteriorated, and the number of erasable and writable times can be increased. In addition, since the writing voltage, the erasing voltage, and the reading voltage can be reduced, power consumption can be reduced.

1A and 1B are diagrams illustrating a configuration example of the nonvolatile semiconductor memory according to the present embodiment. FIG. 2 is a diagram illustrating an example of a writing process of the nonvolatile semiconductor memory. 3A and 3B are diagrams illustrating an example of read processing of the nonvolatile semiconductor memory. FIG. 4 is a diagram illustrating an example of the erasing process of the nonvolatile semiconductor memory.

FIG. 1A is a cross-sectional view illustrating a configuration example of the nonvolatile semiconductor memory according to the present embodiment. The nonvolatile semiconductor memory includes a silicon (Si) substrate 101, a source region 102, a drain region 103, a silicon oxide film 104, a silicon film 105, and a gate electrode 106. The silicon substrate 101 is an n-type silicon substrate doped (added) with a low-concentration n-type impurity (dopant), or a non-doped silicon substrate not doped with an impurity. The silicon substrate 101 is connected to the ground potential node. The source region 102 is a p ⁺ -type silicon region formed on the surface of the silicon substrate 101 and doped with a high-concentration p-type impurity. The drain region 103 is a p ⁺ -type silicon region formed on the surface of the silicon substrate 101 and doped with a high-concentration p-type impurity. The silicon oxide film 104 is an SiO ₂ film formed on the silicon substrate 101 and on the channel region between the source region 102 and the drain region 103 and doped with lithium (Li). The silicon film 105 is a non-doped silicon film formed on the silicon oxide film 104 and not doped with impurities. The gate electrode 106 is formed on the silicon film 105.

FIG. 1B is a diagram showing the composition of the silicon oxide film 104 doped with lithium. Lithium in the silicon oxide film (SiO ² ) 104 is ionized to become monovalent positive ions Li ⁺ and has a stable arrangement as shown in FIG. The silicon oxide film 104 is sandwiched between the silicon substrate 101 and the silicon film 105. Since the positive lithium ion Li ⁺ has a property of bonding with oxygen (O) of SiO ² , it cannot move to the silicon substrate 101 or the silicon film 105 and is confined inside the silicon oxide film 104 doped with lithium. When there is an interface between silicon (Si) and a silicon oxide film (SiO ² ), the first oxygen (O) atom layer from the interface is in a more stable position, and the oxygen (O) atom layer Positive lithium ion Li ⁺ segregates. That is, positive lithium ions Li ⁺ in the silicon oxide film 104 are likely to segregate in the vicinity of the interface with the silicon substrate 101 or in the vicinity of the interface with the silicon film 105 in the silicon oxide film 104. The bond energy between oxygen atoms and lithium atoms in the vicinity of the interface is about 2 eV, and the structure is stable up to about 400 ° C. Further, at a temperature higher than this, positive lithium ions Li ⁺ diffuse in the silicon oxide film 104.

Next, an example of a method for manufacturing a nonvolatile semiconductor memory will be described. First, a lightly doped n-type silicon substrate doped with 10 ¹⁵ / cm ³ (about 10 ¹⁸ / cm ³ or less) of P, As, or Sb atoms is used as the silicon substrate 101.

Next, the source region 102 and the drain region 103 of the silicon substrate 101 are locally doped by ion implantation with B, Al, or Ga at a concentration of about 10 ²⁰ / cm ³ . A source region 102 and a drain region 103 are formed.

Next, a silicon oxide film (SiO ₂ ) 104 having a thickness of 5 to 100 nm is formed on the silicon substrate 101 by dry oxidation.

Next, metal lithium is vapor-deposited on the back surface of the silicon substrate 101, and metal lithium is diffused from the back surface of the silicon substrate 101 into the silicon oxide film 104 by heat treatment. For example, in the case of the silicon substrate 101 having a thickness of 250 μm, lithium can be diffused by heat treatment at a temperature of 380 to 400 ° C. for 3 to 15 minutes. Since there are no oxygen atoms in the silicon substrate 101, lithium passes smoothly through the silicon substrate 101 and is stably bonded in the silicon oxide film 104 as shown in FIG. Thus, positive lithium ions Li ⁺ of 10 ¹³ / cm ² or more are introduced to the silicon oxide film 104 side at the interface between the silicon substrate 101 and the silicon oxide film 104.

  Next, a non-doped silicon film 105 which is not doped with impurities is formed on the silicon oxide film 104 by a chemical vapor deposition (CVD) method.

  Next, an Au gate electrode 106 is formed on the silicon film 105. The gate electrode material may be another metal such as Al.

  Thereafter, an erasing process shown in FIG. 4 is performed in order to reset the nonvolatile semiconductor memory to a storage state of “0” that is not written.

FIG. 4 is a diagram illustrating an example of the erasing process of the nonvolatile semiconductor memory. In the erase process, a source voltage Vs of 0 V is applied to the source region 102, a drain voltage Vd of 0 V is applied to the drain region 103, and a negative erase voltage -Vw is applied to the gate electrode 106 as the gate voltage Vg. The absolute value Vw of the erase voltage −Vw is, for example, 2.4 eV>Vw> 1.8 eV. As a result, positive lithium ions Li ⁺ move from the interface region between the silicon oxide film 104 and the silicon substrate 101 toward the silicon film 105 in the silicon oxide film 104. That is, by applying a negative erase voltage −Vw with respect to the potential of the silicon substrate 101 to the gate electrode 106, lithium ions Li ⁺ in the silicon oxide film 104 diffuse in the silicon oxide film 104 or in the silicon oxide film 104. In FIG. 2, the silicon film 105 and the silicon oxide film 104 are trapped in the interface region. This state is a storage state of “0” in the nonvolatile semiconductor memory.

Since the binding energy of oxygen atoms and lithium atoms in the interface region between the silicon substrate 101 and the silicon oxide film 104 is about 2 eV, the absolute value Vw of the erase voltage −Vw is set to Vw> 1.8 eV. When the absolute value Vw exceeds 2.4 eV, hydrogen (H) trapped in the silicon oxide film 104 or in the interface region between the silicon and the silicon oxide film 104 starts to move, and the interface region between the silicon and the silicon oxide film 104 is moved. There is a concern that excessive hydrogen ions H ⁺ and dangling bonds may be generated and the memory state may be changed. Therefore, the absolute value Vw is set to 2.4 eV> Vw. Therefore, the absolute value Vw is preferably 2.4 eV>Vw> 1.8 eV.

FIG. 2 is a diagram illustrating an example of a writing process of the nonvolatile semiconductor memory. In the writing process, a source voltage Vs of 0 V is applied to the source region 102, a drain voltage Vd of 0 V is applied to the drain region 103, and a positive write voltage Vw is applied to the gate electrode 106 as the gate voltage Vg. The absolute value of the write voltage Vw is the same as the absolute value of the erase voltage -Vw. The write voltage Vw is, for example, 2.4 eV>Vw> 1.8 eV. By applying the write voltage Vw to the gate electrode 106, lithium ions Li ⁺ distributed in the silicon oxide film 104 diffuse in the silicon oxide film 104 and move to the silicon substrate 101 side. That is, by applying a positive write voltage Vw with respect to the potential of the silicon substrate 101 to the gate electrode 106, the lithium ions Li ⁺ in the silicon oxide film 104 are converted into the silicon substrate 101 and the silicon oxide film 104 in the silicon oxide film 104. It is trapped in the interface region. This state is the storage state “1” of the nonvolatile semiconductor memory.

  If the erase process of FIG. 4 is performed after the write process of FIG. 2, the nonvolatile semiconductor memory can be changed from the storage state of “1” to the storage state of “0”.

  3A is a diagram illustrating an example of a read process of the nonvolatile semiconductor memory in the storage state “1” in FIG. 2, and FIG. 3B is a nonvolatile semiconductor in the storage state “0” in FIG. It is a figure which shows the example of the read-out process of memory. In the reading process, the source voltage Vs is applied to the source region 102, the drain voltage Vd is applied to the drain region 103, and the reading voltage is applied to the gate electrode 106 as the gate voltage Vg.

In the memory state of “0” in FIG. 3B, the lithium ions Li ⁺ diffuse in the silicon oxide film 104 or the silicon film 105 and the silicon oxide film in the silicon oxide film 104 as shown in FIG. 104 is trapped in the interface region. That is, lithium ions Li ⁺ are not trapped (segregated) in the interface region between the silicon substrate 101 and the silicon oxide film 104 in the silicon oxide film 104. As a result, when a read voltage is applied to the gate electrode 106, a hole current flows from the source region 102 toward the drain region 103. When the hole current flows, it can be determined that the nonvolatile semiconductor memory is in the “0” storage state.

In the memory state “1” in FIG. 3A, lithium ions Li ⁺ are trapped (segregated) in the interface region between the silicon substrate 101 and the silicon oxide film 104 in the silicon oxide film 104 as shown in FIG. Has been. As a result, even when a read voltage is applied to the gate electrode 106, the hole current flows from the source region 102 to the drain region 103 due to the positive charge of lithium ions Li ⁺ trapped in the interface region between the silicon substrate 101 and the silicon oxide film 104. Does not flow. When the hole current does not flow, it can be determined that the nonvolatile semiconductor memory is in the “1” storage state.

  As described above, at the time of reading, the storage state of “0” and the storage state of “1” of the nonvolatile semiconductor memory can be distinguished by the presence / absence of a current flowing from the source region 102 to the drain region 103.

  The gate voltage (read voltage) Vg is Vth1 <Vg <Vth0 <0. Here, the threshold voltage Vth0 is a threshold voltage of the gate voltage in the storage state of “0” in FIG. That is, the threshold voltage Vth0 is a gate voltage that serves as a boundary between the presence and absence of current flowing between the source region 102 and the drain region 103 in the storage state “0” in FIG. The threshold voltage Vth1 is a threshold voltage of the gate voltage in the storage state “1” in FIG. That is, the threshold voltage Vth1 is a gate voltage that serves as a boundary between the presence and absence of current flowing between the source region 102 and the drain region 103 in the storage state “1” in FIG.

When a gate voltage (read voltage) Vg is applied to the gate electrode 106, hot electrons having energy depending on the absolute value of the gate voltage (read voltage) Vg are generated. When hot electrons having energies of 2 eV and 2.4 eV or more are generated, lithium and hydrogen receive energy from the hot electrons and break bonds. In the case of lithium, diffusion in the silicon oxide film 104 causes hydrogen atoms H ⁺ and dangling bonds to be generated at the interface between the silicon substrate 101 and the silicon oxide film 104 in the case of hydrogen. As a result, the storage state of the nonvolatile semiconductor memory may be changed, so that the gate voltage (read voltage) Vg satisfies the conditions of 0>Vth0>Vg> Vth1 and Vg> −1.8 eV. To do. The threshold voltages Vth0 and Vth1 are determined according to the surface density of lithium ions Li ⁺ at the interface between the silicon substrate 101 and the silicon oxide film 104. Since the surface density of the lithium ion Li ^{+ in} the “0” storage state is extremely small, the threshold voltage Vth0 is approximately 0V. When the surface density of the lithium ion Li ⁺ in the memory state of “1” is 10 ¹³ / cm ² , the threshold voltage Vth1 is about −1.5 eV.

As described above, the threshold voltage Vth1 is determined in proportion to the surface density of lithium ions Li ⁺ at the interface between the silicon substrate 101 and the silicon oxide film 104. The areal density of lithium ions Li ⁺ can be controlled by the temperature and time during lithium diffusion in the above heat treatment. When the surface density of lithium ion Li ⁺ is 10 ¹³ / cm ² , the threshold voltage Vth1 is about −1.5 eV. When a voltage lower than the threshold voltage Vth1 is applied to the gate electrode 106, a current flows even in the memory state “1” in FIG. Therefore, the gate voltage (read voltage) Vg is −1.5 eV <Vg. In the storage state “0” in FIG. 3B, lithium ions Li ⁺ trapped in the interface region between the silicon substrate 101 and the silicon oxide film 104 are compared with the storage state “1” in FIG. Since it is overwhelmingly small, the threshold voltage Vth0 is substantially 0V. Therefore, the gate voltage (read voltage) Vg is actually preferably 0> Vg ≧ −1 eV.

  Further, since the nonvolatile semiconductor memory is a p-channel type, Vd ≦ Vs, and as a characteristic, even if the drain-source voltage Vds increases, the drain current does not increase and becomes substantially constant. Use "Region". Here, Vds = Vd−Vs. Therefore, the drain-source voltage Vds is Vds <Vg−Vth0 <0.

  Therefore, for example, when Vs = 0V, the relationship Vd <Vg <0 is established. If the gate voltage (read voltage) Vg is about -1 eV, the drain voltage Vd may be a negative value having an absolute value of about several eV.

In the present embodiment, lithium in the silicon oxide film 104 is ionized. When a write voltage is applied between the gate electrode 106 and the silicon substrate 101, the lithium ions Li ⁺ move only in the silicon oxide film 104, and then the silicon oxide film 104 even if the absolute value of the gate voltage Vg is reduced. It remains in the interface region between the silicon substrate 101 and the silicon oxide film 104. When a read voltage is applied to the gate electrode 106, there is a difference in the presence or absence of current flowing in the channel region of the silicon substrate 101 depending on whether or not lithium ions Li ⁺ are segregated in the interface region between the silicon substrate 101 and the silicon oxide film 104. Arise. By utilizing this difference, the storage state of “1” or “0” of the nonvolatile semiconductor memory can be determined.

As shown in FIG. 1B, the positive lithium ion Li ⁺ has a property of binding to oxygen (O) in the silicon oxide film (SiO ² ) 104 and thus moves to the silicon substrate 101 and the silicon film 105. However, it is confined inside the silicon oxide film 104. The binding energy of lithium (Li) and oxygen (O) is sufficiently smaller than the binding energy of silicon (Si) and oxygen (O). Therefore, the probability that the silicon oxide film 104 is deteriorated due to repeated bond formation and dissociation by the writing process and the erasing process is much smaller than that of an existing flash memory. Therefore, it is possible to manufacture a nonvolatile semiconductor memory in which the silicon oxide film 104 is hardly deteriorated. In addition, since the write voltage, the erase voltage, and the read voltage are smaller than those of an existing flash memory, power consumption can be reduced.

As described above, since the lithium ions Li ⁺ move in the silicon oxide film 104, they are not easily deteriorated, and the number of erasable and writable times can be increased. In addition, since the writing voltage, the erasing voltage, and the reading voltage can be reduced, power consumption can be reduced.

  The above-described embodiments are merely examples of implementation in carrying out the present invention, and the technical scope of the present invention should not be construed in a limited manner. That is, the present invention can be implemented in various forms without departing from the technical idea or the main features thereof.

101 Silicon substrate 102 Source region 103 Drain region 104 Silicon oxide film 105 Silicon film 106 Gate electrode

Claims (8)

A silicon substrate;
A source region formed in the silicon substrate;
A drain region formed in the silicon substrate;
A silicon oxide film formed on the silicon substrate and on a channel region between the source region and the drain region and doped with lithium;
A non-doped silicon film formed on the silicon oxide film;
Have a gate electrode formed on the silicon film,
The silicon substrate is non-volatile semiconductor memory low concentration n-type impurity-doped n-type silicon substrate, or impurities, characterized in silicon substrate der Rukoto undoped undoped.   By applying a positive write voltage with respect to the potential of the silicon substrate to the gate electrode, lithium ions in the silicon oxide film are trapped in the interface region between the silicon substrate and the silicon oxide film in the silicon oxide film. The non-volatile semiconductor memory according to claim 1. 3. The nonvolatile semiconductor memory according to claim 2, wherein the positive write voltage is higher than 1.8 eV and lower than 2.4 eV. By applying a negative erasing voltage with respect to the potential of the silicon substrate to the gate electrode, lithium ions in the silicon oxide film diffuse in the silicon oxide film, or the silicon film and the silicon oxide film in the silicon oxide film the nonvolatile semiconductor memory according to any one of claims 1-3, characterized in that it is trapped in the interface region of the silicon oxide film. 5. The nonvolatile semiconductor memory according to claim 4, wherein the negative erase voltage is a voltage higher than −2.4 eV and lower than −1.8 eV. When a read voltage is applied to the gate electrode, a source voltage is applied to the source region, and a drain voltage is applied to the drain region, lithium ions in the silicon oxide film are formed in the silicon oxide film and the silicon substrate and When trapped in the interface region of the silicon oxide film, no current flows between the source region and the drain region, and lithium ions in the silicon oxide film are in the silicon oxide film and the silicon substrate and the silicon. the nonvolatile semiconductor memory according to any one of claims 1 to 5 when not trapped in the interface region of the oxide film and a current flows between the source region and the drain region. The nonvolatile semiconductor memory according to claim 6, wherein the read voltage is −1 eV or more and lower than 0 V. The source region and the drain region, the non-volatile semiconductor memory according to any one of claims 1-7, characterized in that a p-type silicon region.

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