JP6252948B2 - DC / DC converter - Google Patents

Description

  The present invention generally relates to a DC / DC converter, and more particularly to a DC / DC converter including a full bridge type conversion circuit.

  Conventionally, a switching power supply (DC / DC converter) is known in which a direct current input is converted into alternating current using a conversion circuit, then transformed using a transformer, and further converted into direct current using an output circuit. For example, it is disclosed in Patent Document 1. The conventional example described in Patent Document 1 includes a transformer, a full bridge type switching circuit (conversion circuit) provided between the input terminal and the transformer, an output circuit provided between the output terminal and the transformer, and a conversion And a control circuit for controlling the phase shift of the circuit.

  In this conventional example, a phase shift control system is employed to reduce switching loss when the switch elements constituting the conversion circuit are turned on.

  The control circuit

JP 2004-140913 A

  However, in the above-described conventional example, the phase shift control is performed on the conversion circuit. Therefore, there is a possibility that noise current may flow due to fluctuation of the common mode (common mode) voltage on the input side of the conversion circuit (or the primary side of the transformer). It was.

  The present invention has been made in view of the above points, and aims to reduce the switching loss when the switch elements constituting the conversion circuit are turned on and to stabilize the common mode voltage on the input side of the conversion circuit. An object of the present invention is to provide a DC / DC converter that can handle the above.

The DC / DC converter of the present invention has four switch elements, and a full bridge type conversion circuit that converts an input DC voltage into an AC voltage and a primary winding are electrically connected to the conversion circuit. A clamp circuit, which is electrically connected between the transformer, the conversion circuit, and the primary winding, forms a closed circuit in which a primary current flows together with the primary winding, and has a switch for opening and closing the closed circuit; A control circuit for controlling on / off of the four switch elements and the switch, and electrically connected to an intermediate potential point of an input voltage of the conversion circuit and a secondary winding of the transformer, The intermediate potential point of the output voltage of the output circuit that converts the AC voltage induced in the next winding into a DC voltage and outputs it is electrically connected to a common reference potential .

  The present invention can reduce the switching loss when the switching elements constituting the conversion circuit are turned on, and can stabilize the common mode voltage on the input side of the conversion circuit.

1 is a circuit diagram showing a DC / DC converter according to Embodiment 1. FIG. In the DC / DC converter which concerns on Embodiment 1, it is a figure which shows the operation | movement waveform in 1st control. 3A to 3D are operation explanatory diagrams in the first control in the DC / DC converter according to the first embodiment. 4A to 4D are operation explanatory diagrams in the first control in the DC / DC converter according to the first embodiment, respectively. It is a circuit diagram which shows the DC / DC converter which concerns on a comparative example. 6A to 6C are explanatory diagrams of the operation of the DC / DC converter according to the comparative example. 7A is a circuit diagram of a clamp circuit in the DC / DC converter according to the first embodiment, and FIG. 7B is an explanatory diagram of the clamp circuit in the DC / DC converter according to the first embodiment. 8A is a circuit diagram of another configuration of the clamp circuit in the DC / DC converter according to the first embodiment, and FIG. 8B is an explanatory diagram of another configuration of the clamp circuit in the DC / DC converter according to the first embodiment. . In the DC / DC converter which concerns on Embodiment 2, it is a figure which shows the operation | movement waveform in 2nd control. 10A to 10C are operation explanatory diagrams in the second control in the DC / DC converter according to the second embodiment, respectively. 11A to 11C are operation explanatory diagrams in the second control in the DC / DC converter according to the second embodiment, respectively. In the DC / DC converter which concerns on Embodiment 3, it is a figure which shows the operation | movement waveform in 3rd control. FIGS. 13A to 13D are operation explanatory diagrams in the third control in the DC / DC converter according to the third embodiment. 14A to 14D are operation explanatory diagrams in the third control in the DC / DC converter according to the third embodiment, respectively. In the DC / DC converter which concerns on Embodiment 3, it is a figure which shows the operation | movement waveform in 4th control. FIGS. 16A to 16D are operation explanatory diagrams in the fourth control in the DC / DC converter according to the third embodiment. FIGS. 17A to 17D are operation explanatory diagrams in the fourth control in the DC / DC converter according to the third embodiment. 18A to 18D are circuit diagrams each showing a clamp circuit configured by connecting two switches in parallel. 19A to 19C are circuit diagrams each showing a clamp circuit configured by connecting two switches in series. It is a circuit diagram which shows the drive circuit of each switching element and each switch. It is a circuit diagram which shows the clamp circuit comprised from one bidirectional switch. It is a circuit diagram which shows the clamp circuit provided with the current detection circuit.

(Embodiment 1)
The DC / DC converter 1 according to the first embodiment of the present invention includes a conversion circuit 2, a transformer T1, a clamp circuit 5, and a control circuit 4, as shown in FIG. The conversion circuit 2 is a full-bridge circuit that includes four switch elements Q1 to Q4 and converts an input DC voltage into an AC voltage. In the transformer T1, the primary winding T11 is electrically connected to the output of the conversion circuit 2. The clamp circuit 5 is electrically connected between the conversion circuit 2 and the primary winding T11, and forms a closed circuit with the primary winding T11 through which the primary current I1 flows. The clamp circuit 5 includes switches QC1 and QC2 that open and close the closed circuit. The control circuit 4 controls the four switch elements Q1 to Q4 and the switches QC1 and QC2.

  Hereinafter, the DC / DC converter 1 of the present embodiment will be described in detail. However, the configuration described below is only an example of the present invention, and the present invention is not limited to the following embodiment, and the technical idea according to the present invention is not deviated from this embodiment. Various changes can be made in accordance with the design or the like as long as they are not.

  As shown in FIG. 1, the DC / DC converter 1 of the present embodiment includes a conversion circuit 2, a transformer T <b> 1, an output circuit 3, a control circuit 4, and a clamp circuit 5. A DC power source DC1 is electrically connected to the first input point 11 and the second input point 12 of the DC / DC converter 1. Hereinafter, the voltage applied between the first input point 11 and the second input point 12 (that is, the power supply voltage of the DC power supply DC1) is referred to as “input voltage V1”. A load is electrically connected to the first output point 13 and the second output point 14 of the DC / DC converter 1. Hereinafter, the voltage applied between the first output point 13 and the second output point 14 is referred to as “output voltage V2”.

  Between the first input point 11 and the second input point 12 of the DC / DC converter 1, a series circuit of two capacitors C1 and C2 is electrically connected. The circuit constants (capacitance) of the capacitors C1 and C2 are the same value. Further, a series circuit of two capacitors C4 and C5 is electrically connected between the first output point 13 and the second output point 14 of the DC / DC converter 1. The circuit constants (capacitance) of the capacitors C4 and C5 are the same value. The connection points of the capacitors C1 and C2 and the connection points of the capacitors C4 and C5 are each electrically connected to a casing (not shown) that houses the DC / DC converter 1 (that is, the reference potential). Grounded to point 15 (circuit ground)). Therefore, assuming that the potential of the reference potential point 15 is zero and the input voltage V1 is E1 [V], the potential of the first input point 11 is E1 / 2 [V], and the potential of the second input point 12 is -E1. / 2 [V]. Assuming that the output voltage V2 is E2 [V], the potential of the first output point 13 is represented by E2 / 2 [V], and the potential of the second output point 14 is represented by -E2 / 2 [V].

  The conversion circuit 2 is a full-bridge inverter that includes a first switch element Q1, a second switch element Q2, a third switch element Q3, and a fourth switch element Q4. In the DC / DC converter 1 of the present embodiment, the switch elements Q1 to Q4 are each an IGBT (Insulated Gate Bipolar Transistor). The switch elements Q1 to Q4 may be composed of other semiconductor switch elements such as bipolar transistors and MOSFETs (Metal-Oxide-Semiconductor Field-Effect Transistors).

  In the conversion circuit 2, the series circuit of the first switch element Q1 and the second switch element Q2 and the series circuit of the third switch element Q3 and the fourth switch element Q4 are electrically connected in parallel. The collectors of the switch elements Q1 and Q3 are electrically connected to the first input point 11 on the high potential side. The emitters of the switch elements Q2 and Q4 are electrically connected to the second input point 12 on the low potential side. A connection point between the emitter of the first switch element Q1 and the collector of the second switch element Q2 and a connection point between the emitter of the third switch element Q3 and the collector of the fourth switch element Q4 are a pair of outputs of the conversion circuit 2. It has become a point.

  Body diodes D11 to D14 exist between the collectors and emitters of switch elements Q1 to Q4, respectively. Here, the recovery diode built in the IGBT is referred to as a “body diode”. Parasitic capacitances C11 to C14 exist between the collectors and emitters of the switching elements Q1 to Q4, respectively.

  The transformer T1 includes a primary winding T11 and a secondary winding T12. The primary winding T1 and the secondary winding T12 are electrically insulated from each other. The primary winding T <b> 11 is electrically connected to a pair of output points of the conversion circuit 2. The secondary winding T12 is electrically connected to a pair of input points of the output circuit 3. The turn ratio between the primary winding T11 and the secondary winding T12 is appropriately set according to the range of the input voltage V1 and the range of the output voltage V2 to be supplied to the load. Further, a leakage inductance exists in the transformer T1. In FIG. 1, an inductor L1 electrically connected in series to the primary winding T11 indicates a leakage inductance of the transformer T1. The inductor L1 is not limited to the leakage inductance of the transformer T1, and may be separately provided as one component. Further, in the following description, when simply referred to as “primary winding T11”, it means “primary winding T11 and inductor L1”.

  As shown in FIG. 1, parasitic capacitances CP1 and CP2 exist between the primary winding T11 and the secondary winding T12 of the transformer T1. In the following description, the current flowing through the primary winding T11 is “primary side current I1”, the voltage applied to the primary winding T11 is “primary side voltage V11”, and the voltage induced in the secondary winding T12 is “two”. This will be referred to as “secondary voltage V12”. The primary side voltage V11 is also a voltage across the clamp circuit 5.

  The output circuit 3 includes a rectifier circuit 31 and a smoothing circuit 32. The rectifier circuit 31 includes a first diode D1 and a second diode D2. The first diode D1 has an anode electrically connected to the first end of the secondary winding T12 and a cathode electrically connected to one end of an inductor L2 described later. The second diode D2 has an anode electrically connected to the second end of the secondary winding T12 and a cathode electrically connected to one end of the inductor L2. One end of the inductor L2 is electrically connected to the first output point of the pair of output points of the rectifier circuit 31. Further, the intermediate tap T121 of the secondary winding T12 is electrically connected to the second output point of the pair of output points of the rectifier circuit 31. The rectifier circuit 31 includes an AC voltage induced between the first end of the secondary winding T12 and the intermediate tap T121, and an AC voltage induced between the second end of the secondary winding T12 and the intermediate tap T121. Each voltage is converted into a pulsating voltage and output.

  The smoothing circuit 32 includes an inductor L2 and a capacitor C3. The inductor L2 is electrically connected between the output point on the high potential side of the rectifier circuit 31 and the first output point 13. The capacitor C3 is electrically connected between the first output point 13 and the second output point 14. The smoothing circuit 32 smoothes the pulsating voltage output from the rectifying circuit 31 and outputs a DC voltage. That is, the output circuit 3 is electrically connected to the secondary winding T12 of the transformer T1, converts the AC voltage induced in the secondary winding T12 into a DC voltage (output voltage V2), and outputs it. The output circuit 3 may be composed of a series resonance circuit and a rectifier circuit 31, or may be composed of a current limiting element and a rectifier circuit 31.

  The control circuit 4 has, for example, a microcomputer (microcomputer) as a main configuration, and executes various processes by executing programs stored in a memory (not shown). The program may be provided through a telecommunication line or may be provided by being stored in a storage medium. The control circuit 4 includes a first drive signal G1 for the first switch element Q1, a second drive signal G2 for the second switch element Q2, a third drive signal G3 for the third switch element Q3, and a fourth drive for the fourth switch element Q4. The signal G4 is given. The drive signals G1 to G4 are all PWM (Pulse Width Modulation) signals. Further, the control circuit 4 gives the fifth drive signal G5 to the first switch QC1 of the clamp circuit 5 to be described later, the sixth drive signal G6 to the second switch QC2, and switches the switches QC1 and QC2 on and off, The clamp circuit 5 is controlled.

  The clamp circuit 5 is composed of a series circuit of a first switch QC1 and a second switch QC2. In the DC / DC converter 1 of the present embodiment, the switches QC1 and QC2 are each IGBTs. The switches QC1 and QC2 may be composed of other semiconductor switch elements such as bipolar transistors and MOSFETs. The collector of the first switch QC1 is electrically connected to the first point of the pair of output points of the conversion circuit 2, and is electrically connected to the first end of the primary winding T11. The collector of the second switch QC2 is electrically connected to the second point of the pair of output points of the conversion circuit 2 and electrically connected to the second end of the primary winding T11. The emitter of the first switch QC1 and the emitter of the second switch QC2 are electrically connected.

  Body diodes D21 and D22 exist between the collectors and emitters of the switches QC1 and QC2, respectively. Here, the recovery diode built in the IGBT is referred to as a “body diode”. Parasitic capacitances C21 and C22 exist between the collectors and emitters of the switches QC1 and QC2, respectively. The body diodes D21 and D22 have their anodes electrically connected to the emitters of the switches QC1 and QC2, respectively, and their cathodes electrically connected to the collectors of the switches QC1 and QC2, respectively.

  The clamp circuit 5 forms a closed circuit through which the primary current I1 flows together with the primary winding T11 in accordance with the on / off of the switches QC1 and QC2. The switches QC1 and QC2 are switches that open and close this closed circuit.

  Hereinafter, the operation of the DC / DC converter 1 of the present embodiment will be described. In the DC / DC converter 1 of the present embodiment, the control circuit 4 controls the conversion circuit 2 and the clamp circuit 5 by executing the first control that sequentially repeats the first mode to the eighth mode shown in Table 1 below. To do. Table 1 shows the states of the switch elements Q1 to Q4 and the switches QC1 and QC2 in each mode, and the primary side voltage V11. Moreover, the ON / OFF timing for each mode of the switch elements Q1 to Q4 and the switches QC1 and QC2, and the waveform of the primary side voltage V11 are shown in FIG.

  Each mode will be specifically described below with reference to FIGS. 3A to 3D and FIGS. 4A to 4D. 3A to 3D and FIGS. 4A to 4D, switch elements (or switches) surrounded by circles indicate an on state, and switch elements (or switches) not surrounded by a circle indicate an off state. 3A to 3D and 4A to 4D, dotted arrows indicate current paths. In FIGS. 3A to 3D and FIGS. 4A to 4D, the capacitors C1 and C2 are not shown.

  In the first mode, as shown in FIG. 3A, the switch elements Q1, Q4 are in the on state, and the switch elements Q2, Q3 and the switches QC1, QC2 are in the off state. In this mode, the primary-side current I1 flows through a path that passes through the DC power supply DC1, the first switch element Q1, the primary winding T11, the fourth switch element Q4, and the DC power supply DC1 in order. In this mode, energy is stored in the leakage inductance (inductor L1) by applying the power supply voltage of the DC power supply DC1.

  When shifting from the first mode to the second mode, as shown in FIG. 3B, the switch elements Q1, Q4 are switched off. In this mode, since energy is stored in the leakage inductance (inductor L1), the primary-side current I1 passes through the primary winding T11, the body diode D13, the DC power supply DC1, the body diode D12, and the primary winding T11 in this order. Continue to flow.

  When the second mode is shifted to the third mode, the second switch QC2 is turned on as shown in FIG. 3C. In this mode, the primary current I1 flows through a path that passes through the primary winding T11, the second switch QC2, the body diode D21, and the primary winding T11 in this order. That is, in this mode, the primary side current I1 flows through the closed circuit formed by the primary winding T11 and the clamp circuit 5, so that the energy accumulated in the leakage inductance (inductor L1) is maintained.

  When shifting from the third mode to the fourth mode, as shown in FIG. 3D, the second switch QC2 is switched off. In this mode, since the energy accumulated in the leakage inductance (inductor L1) remains, the primary side current passes through the primary winding T11, the body diode D13, the DC power supply DC1, the body diode D12, and the primary winding T11 in this order. I1 flows. At this time, the primary side voltage V11 becomes −E1 [V], and the body diodes D12 and D13 of the switch elements Q2 and Q3 become conductive, so that the voltage applied to the switch elements Q2 and Q3 becomes almost zero.

  When shifting from the fourth mode to the fifth mode, as shown in FIG. 4A, the switch elements Q2 and Q3 are turned on. Here, in the fourth mode, since the voltages applied to the switching elements Q2 and Q3 are substantially zero, the switching elements Q2 and Q3 are switched on by soft switching (Zero Volt Switching: ZVS). In this mode, the primary current I1 flows through a path that passes through the DC power source DC1, the third switch element Q3, the primary winding T11, the second switch element Q2, and the DC power source DC1 in order. That is, in the fifth mode, the primary current I1 flows in the opposite direction to the first mode. In this mode, energy is stored in the leakage inductance (inductor L1) by applying the power supply voltage of the DC power supply DC1.

  When shifting from the fifth mode to the sixth mode, as shown in FIG. 4B, the switch elements Q2, Q3 are switched off. In this mode, since energy is stored in the leakage inductance (inductor L1), the primary-side current I1 passes through the primary winding T11, the body diode D11, the DC power supply DC1, the body diode D14, and the primary winding T11 in this order. Continue to flow.

  When shifting from the sixth mode to the seventh mode, the first switch QC1 is turned on as shown in FIG. 4C. In this mode, the primary current I1 flows through a path that passes through the primary winding T11, the first switch QC1, the body diode D22, and the primary winding T11 in this order. That is, in this mode, the primary side current I1 flows through the closed circuit formed by the primary winding T11 and the clamp circuit 5, so that the energy accumulated in the leakage inductance (inductor L1) is maintained.

  When shifting from the seventh mode to the eighth mode, as shown in FIG. 4D, the first switch QC1 is switched off. In this mode, since the energy accumulated in the leakage inductance (inductor L1) remains, the primary side current passes through the primary winding T11, the body diode D11, the DC power supply DC1, the body diode D14, and the primary winding T11 in this order. I1 flows. At this time, the primary side voltage V11 becomes E1 [V], and the body diodes D11 and D14 of the switch elements Q1 and Q4 become conductive, so that the voltage applied to the switch elements Q1 and Q4 becomes almost zero.

  When the eighth mode is shifted to the first mode, the switch elements Q1 and Q4 are turned on as shown in FIG. 3A. Here, in the eighth mode, since the voltage applied to the switch elements Q1 and Q4 is substantially zero, the switch elements Q1 and Q4 are switched on by soft switching (Zero Volt Switching: ZVS). Hereinafter, the control circuit 4 repeatedly executes the first mode to the eighth mode.

  In the first control, the first mode and the fifth mode correspond to inversion control for inverting the polarity of the output voltage (primary side voltage V11) of the conversion circuit 2. In the third mode and the seventh mode, in order to maintain the energy stored in the leakage inductance (inductor L1) of the transformer T1, the primary side current I1 is applied to the closed circuit formed by the primary winding T11 and the clamp circuit 5. This corresponds to the first recirculation control. In other words, the first return control is a control in which the primary current I1 is supplied to the closed circuit in order to maintain the energy accumulated in the inductance component (inductor L1) on the closed circuit. Further, the fourth mode and the eighth mode correspond to the second return control in which the primary side current flows through the conversion circuit 2 after the first return control.

  As described above, when the control circuit 4 executes the first control, the primary side voltage V11 has the waveform shown in FIG. The control circuit 4 changes the duty ratio between the drive signals G1 and G4 applied to the switch elements Q1 and Q4 and the drive signals G2 and G3 applied to the switch elements Q2 and Q3, so that the output voltage V2 becomes a desired DC voltage. Control to be

  Here, a phase shift control type DC / DC converter 100 will be described as a comparative example of the DC / DC converter 1 of the present embodiment. As shown in FIG. 5, the DC / DC converter 100 does not include the clamp circuit 5, and the control circuit 400 controls the phase shift of the conversion circuit 2. Is different. The control circuit 400 performs phase shift control for changing the phases of the drive signals G3 and G4 with respect to the phases of the drive signals G1 and G2, thereby controlling the output voltage V2 to be a desired DC voltage.

  In the DC / DC converter 100, the control circuit 400 can take three modes shown in FIGS. 6A to 6C by controlling the phase shift of the conversion circuit 2. In the mode shown in FIG. 6A, the switch elements Q1, Q4 are in the on state, and the switch elements Q2, Q3 are in the off state. In this mode, the primary-side current I1 flows through a path that passes through the DC power supply DC1, the first switch element Q1, the primary winding T11, the fourth switch element Q4, and the DC power supply DC1 in order. In this mode, energy is stored in the leakage inductance (inductor L1) by applying the power supply voltage of the DC power supply DC1.

  Next, when the mode shown in FIG. 6A is shifted to the mode shown in FIG. 6B, the first switch element Q1 is turned off and the fourth switch element Q4 is turned on. When shifting to this mode, the second switch element Q2 is turned on after the body diode D12 becomes conductive. Therefore, the second switch element Q2 is turned on by soft switching. In this mode, in order to maintain the energy of the leakage inductance (inductor L1), the primary-side current I1 flows through a path that sequentially passes through the primary winding T11, the fourth switch element Q4, the second switch element Q2, and the primary winding T11. .

  Next, when the mode shown in FIG. 6B is shifted to the mode shown in FIG. 6C, the fourth switch element Q4 is turned off and the third switch element Q3 is turned on. When shifting to this mode, the third switch element Q3 is turned on after the body diode D13 is turned on. For this reason, the third switch element Q3 is turned on by soft switching.

  Here, as shown in FIG. 5, a parasitic capacitance C <b> 100 exists between the first line electrically connected to the first end of the primary winding T <b> 11 and the reference potential point 15. Similarly, a parasitic capacitance C101 exists between the second line electrically connected to the second end of the primary winding T12 and the reference potential point 15. The connection point of these parasitic capacitors C100 and C101 is hereinafter referred to as “common potential point 16”.

  The potential of the common potential point 16 is an intermediate potential between the potential of the first input point 11 and the potential of the second input point 12 when the switch elements Q1 and Q4 are on as shown in FIG. 6A. 6C, when the switch elements Q2 and Q3 are turned on, the potential of the common potential point 16 is an intermediate potential between the potential of the first input point 11 and the potential of the second input point 12. On the other hand, when the switch elements Q2 and Q4 are on as shown in FIG. 6B, the potential of the common potential point 16 becomes the potential of the second input point 12. Although not shown, when the switch elements Q1 and Q3 are turned on in the phase shift control process, the potential of the common potential point 16 becomes the potential of the first input point 11. That is, when the control circuit 400 executes phase shift control, the potential at the common potential point 16 varies.

  As described above, in the DC / DC converter 100 of the comparative example, the switch elements Q1 to Q4 constituting the conversion circuit 2 can be switched on by soft switching. However, in this DC / DC converter 100, as described above, the potential between the common potential point 16 and the voltage between the reference potential point 15 and the common potential point 16 (that is, the input-side common mode ( There is a problem that the common mode) voltage) fluctuates. In this DC / DC converter 100, the fluctuation of the common mode voltage on the input side becomes the noise source N1, and the noise current is generated through the four paths RT1 to RT4 shown in FIG. May flow.

  Here, in order to switch on the switching elements Q1 to Q4 of the conversion circuit 2 by soft switching, it is necessary to pass the current through the body diodes D11 to D14 of the switching elements Q1 to Q4 to be switched on next. In order to prevent the noise current from flowing, the energy stored in the leakage inductance (inductor L1) must be maintained so that the potential of the common potential point 16 does not fluctuate until soft switching is performed. There's a problem.

  Therefore, the DC / DC converter 1 of this embodiment solves the above problem by including the clamp circuit 5. That is, the DC / DC converter 1 of the present embodiment is accumulated in the leakage inductance (inductor L1) of the transformer T1 by flowing the primary current I1 through the closed circuit formed by the primary winding T11 and the clamp circuit 5. Maintaining energy. For this reason, the DC / DC converter 1 of this embodiment can maintain the energy accumulated in the leakage inductance (L1) so that the potential of the common potential point 16 does not fluctuate. Therefore, in the DC / DC converter 1 of this embodiment, it is possible to switch on by soft switching of the switch elements Q1 to Q4 constituting the conversion circuit 2 without adopting the phase shift control method.

  As described above, the DC / DC converter 1 of the present embodiment includes the clamp circuit 5 that forms a closed circuit together with the primary winding T11. For this reason, the DC / DC converter 1 of this embodiment can reduce the switching loss when the switch elements Q1 to Q4 constituting the conversion circuit 2 are turned on without adopting the phase shift control method. . In addition, the DC / DC converter 1 of the present embodiment includes the clamp circuit 5 so that the energy accumulated in the leakage inductance (inductor L1) of the transformer T1 is maintained without changing the potential of the common potential point 16. . That is, the DC / DC converter 1 of the present embodiment can stabilize the common mode voltage on the input side of the conversion circuit 2 as compared with the DC / DC converter 100 of the comparative example. As a result, the DC / DC converter 1 according to the present embodiment has an advantage that the fluctuation of the common mode voltage on the input side of the conversion circuit 2 is suppressed and the noise current hardly flows.

  The DC / DC converter 1 of this embodiment includes a series circuit of capacitors C1 and C2 and a series circuit of capacitors C4 and C5. The connection point of the capacitors C1 and C2 and the connection of the capacitors C4 and C5 The point is electrically connected to the circuit ground. That is, in the DC / DC converter 1 of the present embodiment, the intermediate potential point of the input voltage V1 of the conversion circuit 2 and the intermediate potential point of the output voltage V2 of the output circuit 3 are electrically connected to a common circuit ground. ing. Therefore, the DC / DC converter 1 of the present embodiment can reduce the outflow of common mode noise to the reference potential point 15 (circuit ground). Note that whether or not to adopt the configuration is arbitrary.

  By the way, in the DC / DC converter 1 of the present embodiment, for example, when shifting from the sixth mode to the eighth mode via the seventh mode, the first switch QC1 of the clamp circuit 5 is turned on / off in a short period of time. Can be switched. In this case, the power consumption PL1 of the clamp circuit 5 may increase. This point will be described below with reference to FIGS. 7A and 7B. In the following description, the current flowing through the clamp circuit 5 is referred to as “clamp current IC1”, and the voltage applied to the clamp circuit 5 is referred to as “clamp voltage VC1”.

  That is, as shown in FIG. 7B, when the first switch QC1 is turned off, the first switch QC1 may be turned off before the clamp voltage VC1 reaches the zero voltage. In this case, both the clamp current IC1 and the clamp voltage VC1 may increase, and the power consumption PL1 may increase.

  Therefore, in the DC / DC converter 1 of the present embodiment, the clamp circuit 5 includes a current detection circuit 51 that detects the clamp current IC1 and a voltage detection circuit 52 that detects the clamp voltage VC1, as shown in FIG. 8A. It may be. Then, the control circuit 4 may soft-switch the first switch QC1 based on the detection results of the current detection circuit 51 and the voltage detection circuit 52.

  In the example shown in FIG. 8B, the control circuit 4 switches the first switch QC1 off when the clamp voltage VC1 detected by the voltage detection circuit 52 reaches zero voltage. For this reason, since the clamp voltage VC1 becomes very small, the power consumption PL1 of the clamp circuit 5 can be reduced. Further, the control circuit 4 may switch the first switch QC1 on when the clamp current IC1 detected by the current detection circuit 51 reaches zero current. Even in this case, since the clamp current IC1 becomes very small, the power consumption PL1 of the clamp circuit 5 can be reduced.

(Embodiment 2)
Hereinafter, the DC / DC converter 1 according to Embodiment 2 of the present invention will be described. Note that in the DC / DC converter 1 of the present embodiment, the description of the components common to the DC / DC converter 1 of the first embodiment is omitted as appropriate. In the DC / DC converter 1 of the present embodiment, the control circuit 4 controls the conversion circuit 2 and the clamp circuit 5 by executing the second control that sequentially repeats the first mode to the sixth mode shown in Table 2 below. To do. Table 2 shows the states of the switch elements Q1 to Q4 and the switches QC1 and QC2 in each mode, and the primary side voltage V11. Moreover, the ON / OFF timing for each mode of the switch elements Q1 to Q4 and the switches QC1 and QC2, and the waveform of the primary side voltage V11 are shown in FIG.

  Each mode will be specifically described below with reference to FIGS. 10A to 10C and FIGS. 11A to 11C. In FIGS. 10A to 10C and FIGS. 11A to 11C, switch elements (or switches) surrounded by circles indicate an on state, and switch elements (or switches) not surrounded by a circle indicate an off state. Also, in FIGS. 10A to 10C and FIGS. 11A to 11C, dotted arrows indicate current paths. In FIGS. 10A to 10C and FIGS. 11A to 11C, the capacitors C1 and C2 are not shown.

  In the first mode, as shown in FIG. 10A, the switch elements Q1, Q4 and the second switch QC2 are in the on state, and the switch elements Q2, Q3 and the first switch QC1 are in the off state. In this mode, the primary-side current I1 flows through a path that passes through the DC power supply DC1, the first switch element Q1, the primary winding T11, the fourth switch element Q4, and the DC power supply DC1 in order. In this mode, energy is stored in the leakage inductance (inductor L1) by applying the power supply voltage of the DC power supply DC1.

  When shifting from the first mode to the second mode, as shown in FIG. 10B, the switch elements Q1 and Q4 are switched off. In this mode, since energy is stored in the leakage inductance (inductor L1), the primary current I1 continues to flow through a path that passes through the primary winding T11, the second switch QC2, the body diode D21, and the primary winding T11 in this order. That is, in this mode, the primary side current I1 flows through the closed circuit formed by the primary winding T11 and the clamp circuit 5, so that the energy accumulated in the leakage inductance (inductor L1) is maintained.

  When shifting from the second mode to the third mode, as shown in FIG. 10C, the second switch QC2 is switched off. In this mode, since the energy accumulated in the leakage inductance (inductor L1) remains, the primary side current passes through the primary winding T11, the body diode D13, the DC power supply DC1, the body diode D12, and the primary winding T11 in this order. I1 flows. At this time, the primary side voltage V11 becomes −E1 [V], and the body diodes D12 and D13 of the switch elements Q2 and Q3 become conductive, so that the voltage applied to the switch elements Q2 and Q3 becomes almost zero.

  When the mode is shifted from the third mode to the fourth mode, as shown in FIG. 11A, the switch elements Q2 and Q3 and the first switch QC1 are turned on. Here, in the third mode, since the voltage applied to the switch elements Q2 and Q3 is substantially zero, the switch elements Q2 and Q3 are switched on by soft switching (Zero Volt Switching: ZVS). In this mode, the primary current I1 flows through a path that passes through the DC power source DC1, the third switch element Q3, the primary winding T11, the second switch element Q2, and the DC power source DC1 in order. That is, in the fourth mode, the primary current I1 flows in the opposite direction to the first mode. In this mode, energy is stored in the leakage inductance (inductor L1) by applying the power supply voltage of the DC power supply DC1.

  When shifting from the fourth mode to the fifth mode, as shown in FIG. 11B, the switch elements Q2 and Q3 are switched off. In this mode, since energy is stored in the leakage inductance (inductor L1), the primary current I1 continues to flow through a path that passes through the primary winding T11, the first switch QC1, the body diode D22, and the primary winding T11 in this order. That is, in this mode, the primary side current I1 flows through the closed circuit formed by the primary winding T11 and the clamp circuit 5, so that the energy accumulated in the leakage inductance (inductor L1) is maintained.

  When shifting from the fifth mode to the sixth mode, as shown in FIG. 11C, the first switch QC1 is switched off. In this mode, since the energy accumulated in the leakage inductance (inductor L1) remains, the primary side current passes through the primary winding T11, the body diode D11, the DC power supply DC1, the body diode D14, and the primary winding T11 in this order. I1 flows. At this time, the primary side voltage V11 becomes E1 [V], and the body diodes D11 and D14 of the switch elements Q1 and Q4 become conductive, so that the voltage applied to the switch elements Q1 and Q4 becomes almost zero.

  When the sixth mode is shifted to the first mode, the switch elements Q1 and Q4 are turned on as shown in FIG. 10A. Here, in the sixth mode, since the voltages applied to the switching elements Q1 and Q4 are substantially zero, the switching elements Q1 and Q4 are switched on by soft switching (here, Zero Volt Switching: ZVS). . Hereinafter, the control circuit 4 repeatedly executes the first mode to the sixth mode.

  In the second control, the first mode and the fourth mode correspond to inversion control. The second mode and the fifth mode correspond to the first reflux control, and the third mode and the sixth mode correspond to the second reflux control.

  When the control circuit 4 executes the second control as described above, the primary side voltage V11 has a waveform shown in FIG. That is, in the second control, the control corresponding to the second mode and the sixth mode in the first control is omitted. In other words, in the second control, the control circuit 4 executes the reversal control, and after executing the reversal control until the next reversal control is performed, the first recirculation control, the second recirculation control, Is running.

  For this reason, in the DC / DC converter 1 according to the present embodiment, the polarity of the primary side voltage V11 is inverted when shifting from the first mode to the second mode and when shifting from the fourth mode to the fifth mode. There is no. That is, in the DC / DC converter 1 according to the present embodiment, when the first mode is shifted to the second mode and when the fourth mode is shifted to the fifth mode, the primary current I1 is supplied to the body diodes D11 to D14. Do not flush. For this reason, the DC / DC converter 1 of the present embodiment has an advantage that no recovery loss occurs when the body diodes D11 to D14 shift from the forward direction state to the reverse blocking state. Further, the DC / DC converter 1 of the present embodiment needs to switch the switches QC1 and QC2 from off to on when shifting from the first mode to the second mode and when shifting from the third mode to the fourth mode. Therefore, switching loss can be reduced.

(Embodiment 3)
Hereinafter, the DC / DC converter 1 according to Embodiment 3 of the present invention will be described. Note that in the DC / DC converter 1 of the present embodiment, the description of the components common to the DC / DC converter 1 of the first embodiment is omitted as appropriate. In the DC / DC converter 1 of the present embodiment, the control circuit 4 controls the conversion circuit 2 and the clamp circuit 5 by executing the third control that sequentially repeats the first mode to the sixth mode shown in Table 3 below. To do. Table 3 shows the states of the switch elements Q1 to Q4 and the switches QC1 and QC2 in each mode, and the primary side voltage V11. FIG. 12 shows the ON / OFF timing of each of the switch elements Q1 to Q4 and the switches QC1 and QC2, and the waveform of the primary voltage V11.

  Each mode will be specifically described below with reference to FIGS. 13A to 13D and FIGS. 14A to 14D. However, the first mode (see FIG. 13A), the third mode (see FIG. 13D), the fourth mode (see FIG. 14A), and the sixth mode (see FIG. 14D) are the same as the second control, so here Then, explanation is omitted. In FIGS. 13A to 13D and 14A to 14D, switch elements (or switches) surrounded by circles indicate an on state, and switch elements (or switches) not surrounded by a circle indicate an off state. Further, in FIGS. 13A to 13D and FIGS. 14A to 14D, dotted arrows indicate current paths. In FIGS. 13A to 13D and FIGS. 14A to 14D, the capacitors C1 and C2 are not shown.

  When shifting from the first mode to the 2-1 mode, as shown in FIG. 13B, the switch elements Q1, Q4 are switched off. In this mode, since energy is stored in the leakage inductance (inductor L1), the primary current I1 continues to flow through a path that passes through the primary winding T11, the second switch QC2, the body diode D21, and the primary winding T11 in this order. In other words, in this mode, since the primary current I1 flows through the body diode D21, a loss represented by the product of the forward voltage and the forward current occurs in the body diode D21.

  When shifting from the 2-1 mode to the 2-2 mode, as shown in FIG. 13C, the first switch QC1 is turned on. For this reason, in this mode, the primary current I1 continues to flow through a path that passes through the primary winding T11, the second switch QC2, the first switch QC1, and the primary winding T11 in this order. That is, in this mode, the loss in the body diode D21 is reduced by synchronously rectifying the clamp circuit 5.

  When shifting from the fourth mode to the 5-1 mode, as shown in FIG. 14B, the switch elements Q2 and Q3 are switched off. In this mode, since energy is stored in the leakage inductance (inductor L1), the primary current I1 continues to flow through a path that passes through the primary winding T11, the first switch QC1, the body diode D22, and the primary winding T11 in this order. That is, in this mode, since the primary current I1 flows through the body diode D22, a loss represented by the product of the forward voltage and the forward current occurs in the body diode D22.

  When shifting from the 5-2 mode to the sixth mode, as shown in FIG. 14C, the second switch QC2 is turned on. For this reason, in this mode, the primary side current I1 continues to flow through a path that passes through the primary winding T11, the first switch QC1, the second switch QC2, and the primary winding T11 in this order. That is, in this mode, the loss in the body diode D22 is reduced by synchronously rectifying the clamp circuit 5.

  In the third control, the first mode and the fourth mode correspond to inversion control. The 2-1 mode, the 2-2 mode, the 5-1 mode, and the 5-2 mode correspond to the first reflux control. Further, the 3-1 mode and the 3-2 mode, and the 6-1 mode and the 6-2 mode correspond to the second reflux control.

  As described above, in the DC / DC converter 1 of this embodiment, the control circuit 4 synchronously rectifies the clamp circuit 5 in the first return control. In other words, in the third control, the control circuit 4 synchronously rectifies the two switches QC1 and QC2 when closing the closed circuit. For this reason, the DC / DC converter 1 of this embodiment can reduce the loss in the body diodes D21 and D22 of the switches QC1 and QC2 constituting the clamp circuit 5. The period of the 2-1 mode is preferably shorter than the period of the 2-2 mode in order to reduce the loss in the body diode D21. Similarly, the period of the 5-1 mode is preferably shorter than the period of the 5-2 mode in order to reduce the loss in the body diode D22.

  By the way, in the third control, both the first switch QC1 and the second switch QC2 are turned off when shifting from the 2-2 mode to the third mode and when shifting from the 5-2 mode to the sixth mode. However, other control may be used. That is, the control circuit 4 may control the conversion circuit 2 and the clamp circuit 5 by executing a fourth control that sequentially repeats the first mode to the sixth mode shown in Table 4 below. Table 4 shows the states of the switch elements Q1 to Q4 and the switches QC1 and QC2 in each mode, and the primary side voltage V11. FIG. 15 shows the ON / OFF timing of each mode of the switch elements Q1 to Q4 and the switches QC1 and QC2, and the waveform of the primary side voltage V11.

  Each mode will be specifically described below with reference to FIGS. 16A to 16D and FIGS. 17A to 17D. However, since the first mode (see FIG. 16A), the 2-1 mode (see FIG. 16B), and the 2-2 mode (see FIG. 16C) are the same as the third control, the description thereof is omitted here. . Similarly, the fourth mode (see FIG. 17A), the 5-1 mode (see FIG. 17B), and the 5-2 mode (see FIG. 17C) are the same as in the third control, and thus the description thereof is omitted here. To do.

  In FIGS. 16A to 16D and FIGS. 17A to 17D, switch elements (or switches) surrounded by circles indicate an on state, and switch elements (or switches) not surrounded by a circle indicate an off state. In FIGS. 16A to 16D and FIGS. 17A to 17D, dotted arrows indicate current paths. In FIGS. 16A to 16D and FIGS. 17A to 17D, the capacitors C1 and C2 are not shown.

  When the mode is shifted from the 2-2 mode to the third mode, the second switch QC2 is turned off as shown in FIG. 16D. In this mode, since the energy accumulated in the leakage inductance (inductor L1) remains, the primary side current passes through the primary winding T11, the body diode D13, the DC power supply DC1, the body diode D12, and the primary winding T11 in this order. I1 flows. At this time, the primary side voltage V11 becomes −E1 [V], and the body diodes D12 and D13 of the switch elements Q2 and Q3 become conductive, so that the voltage applied to the switch elements Q2 and Q3 becomes almost zero.

  When shifting from the 5-2 mode to the sixth mode, as shown in FIG. 17D, the first switch QC1 is switched off. In this mode, since the energy accumulated in the leakage inductance (inductor L1) remains, the primary side current passes through the primary winding T11, the body diode D11, the DC power supply DC1, the body diode D14, and the primary winding T11 in this order. I1 flows. At this time, the primary side voltage V1 becomes E1 [V], and the body diodes D11 and D14 of the switch elements Q1 and Q4 become conductive, so that the voltage applied to the switch elements Q1 and Q4 becomes almost zero.

  In the third control, as shown in FIG. 12, it is necessary to switch the first switch QC1 between on, off, and on during the period from the 2-2 mode to the fourth mode. Similarly, in the third control, it is necessary to switch the second switch QC2 between on, off, and on during the period from the 5-2 mode to the first mode, as shown in FIG. This is because in the third mode and the sixth mode, both the switches QC1 and QC2 are turned off to cause the primary current I1 to flow through the conversion circuit 2. As described above, in the third control, it is necessary to repeatedly switch on / off the first switch QC1 and the second switch QC2 in a short period of time. For this reason, elements capable of high-speed operation must be used as the first switch QC1 and the second switch QC2, which may increase the cost.

  On the other hand, in the fourth control, as shown in FIG. 15, it is not necessary to switch on / off the first switch QC1 during the period from the 2-2 mode to the fourth mode. Similarly, in the fourth control, as shown in FIG. 15, it is not necessary to switch on / off the second switch QC2 during the period from the 5-2 mode to the first mode. This is because, in the third mode and the sixth mode, only one of the switches QC1 and QC2 is turned off, so that the primary current I1 flows in the conversion circuit 2. In other words, in the fourth control, the control circuit 4 maintains any one of the two switches QC1 and QC2 in the on state when the closed circuit is opened. That is, in the fourth control, it is not necessary to switch on / off of the first switch QC1 and the second switch QC2 in a short period. For this reason, since the element | device of low speed operation | movement can be used as 1st switch QC1 and 2nd switch QC2, it is possible to reduce cost.

  Incidentally, in the DC / DC converters 1 of the first to third embodiments, the clamp circuit 5 has a configuration in which the first switch QC1 and the second switch QC2 are electrically connected in series. May be. For example, the clamp circuit 5 may be configured by electrically connecting the first switch QC1 and the second switch QC2 in parallel as shown in FIGS. 18A to 18D. In other words, the two switches QC1 and QC2 may be electrically connected in parallel between the pair of output points of the conversion circuit 2. In the clamp circuit 5 shown in FIG. 18A, the series circuit of the first switch QC1 and the diode D51 and the series circuit of the second switch QC2 and the diode D52 are electrically connected in parallel. Further, in the clamp circuit 5 shown in FIG. 18B, the positional relationship between the first switch QC1 and the diode D51 is opposite to that in the clamp circuit 5 shown in FIG. 18A, and the position between the second switch QC2 and the diode D52. The relationship is reversed. In the clamp circuit 5 shown in FIG. 18C, the switches QC1 and QC2 are replaced with n-channel enhancement type MOSFETs as compared with the clamp circuit 5 shown in FIG. 18A. Also, in the clamp circuit 5 shown in FIG. 18D, the switches QC1 and QC2 are replaced with n-channel enhancement type MOSFETs, as compared with the clamp circuit 5 shown in FIG. 18B.

  In the above configuration, the switches QC1 and QC2 and the diodes D51 and D52 can be individually selected. Further, in the above configuration, the loss in the reverse recovery time of the body diodes D21 and D22 can be small compared to the configuration in which the switches QC1 and QC2 are electrically connected in series.

  Moreover, the clamp circuit 5 may be configured by electrically connecting a first switch QC1 and a second switch QC2 in series as shown in FIGS. 19A to 19C, for example. In other words, the two switches QC1 and QC2 may be electrically connected in series between the pair of output points of the conversion circuit 2. In the clamp circuit 5 shown in FIG. 19A, the positional relationship between the first switch QC1 and the second switch QC2 is opposite to that of the clamp circuit 5 shown in FIG. Further, in the clamp circuit 5 shown in FIG. 19B, the switches QC1 and QC2 are replaced with n-channel enhancement type MOSFETs as compared with the clamp circuit 5 shown in FIG. Also, in the clamp circuit 5 shown in FIG. 19C, the positional relationship between the first switch QC1 and the second switch QC2 is opposite to that of the clamp circuit 5 shown in FIG. 19B.

  In the above configuration, the diodes D51 and D52 are not required as compared with the clamp circuit 5 shown in FIGS. 18A to 18D, and the number of elements constituting the circuit can be reduced. Further, in the above configuration, as described in the description of the DC / DC converter 1 of the third embodiment, the clamp circuit 5 can be synchronously rectified, so that loss can be reduced. Further, in the above configuration, for example, when the current detection circuit 51 is necessary, only one current detection circuit 51 is required because the current flow path is one.

  In particular, in the clamp circuit 5 shown in FIG. 19A, as shown in FIG. 20, the emitters of the two switches QC1 and QC2 are electrically connected to any one of the four switch elements Q1 to Q4 of the conversion circuit 2, respectively. Is done. Further, the four switch elements Q1 to Q4 and the two switches QC1 and QC2 are each composed of an IGBT. Here, the emitter of the first switch QC1 is electrically connected to the emitter of the third switch element Q3, and the emitter of the second switch QC2 is electrically connected to the emitter of the first switch element Q1.

  Here, as shown in FIG. 20, the drive signals G1 to G6 are amplified by the drive circuits 61 to 66, respectively, and then given to the switch elements Q1 to Q4 and the switches QC1 and QC2. Since it is necessary to apply a voltage between the gates and the emitters of the switch elements Q1 to Q4 and the switches QC1 and QC2, the drive circuits 61 to 66 set the emitter potentials of the switch elements Q1 to Q4 and the switches QC1 and QC2 respectively. A drive power supply that is used as a reference potential is required.

  In the configuration shown in FIG. 20, the emitter potentials of the first switch element Q1 and the second switch QC2 are the common first emitter potential EP1. The emitter potential of each of the second switch element Q2 and the fourth switch element Q4 is a common second emitter potential EP2. Further, the emitter potentials of the third switch element Q3 and the first switch QC1 become the common third emitter potential EP3. Therefore, in this configuration, the first driver circuit 61 and the sixth driver circuit 66 can be driven by the first drive power source PS1 having the first emitter potential EP1 as a reference potential. Further, in this configuration, the second driver circuit 62 and the fourth driver circuit 64 can be driven by the second drive power source PS2 having the second emitter potential EP2 as a reference potential. In addition, the third driver circuit 63 and the fifth driver circuit 65 can be driven by the third drive power source PS3 having the third emitter potential EP3 as a reference potential.

  As described above, in this configuration, there is no need to provide a dedicated drive power supply for each of the switch elements Q1 to Q4 and the switches QC1 and QC2, and therefore the number of drive power supplies can be reduced and the circuit can be downsized. In addition, with this configuration, the number of drive power supplies can be reduced, so that the manufacturing cost can also be reduced. In the clamp circuit 5 shown in FIG. 18B, the same effect can be obtained by electrically connecting the emitters of the two switches QC1 and QC2 to any one of the four switch elements Q1 to Q4 of the conversion circuit 2, respectively. Can be played. In the clamp circuit 5 shown in FIGS. 18C and 18B, the sources of the two switches QC1 and QC2 are electrically connected to the emitters of the four switch elements Q1 to Q4 of the conversion circuit 2, respectively. Similar effects can be achieved.

  In addition, the clamp circuit 5 may include a bidirectional switch element QC3 as shown in FIG. The bidirectional switch element QC3 is composed of, for example, a gallium nitride (GaN) semiconductor element. In this configuration, the number of elements constituting the clamp circuit 5 can be reduced, and the clamp circuit 5 can be simplified and downsized.

  In the DC / DC converter 1 of the present embodiment, the clamp circuit 5 may include a current detection circuit 51 as shown in FIG. Then, the control circuit 4 may switch off the switches QC1 and QC2 when the current value of the clamp current IC1 detected by the current detection circuit 51 exceeds a certain value. With this configuration, the operation of the clamp circuit 5 can be stopped when an excessive current flows through the clamp circuit 5. Therefore, in this configuration, the elements constituting the clamp circuit 5 can be protected and the entire circuit of the DC / DC converter 1 can be protected.

DESCRIPTION OF SYMBOLS 1 DC / DC converter 2 Conversion circuit 3 Output circuit 4 Control circuit 5 Clamp circuit Q1-Q4 Switch element QC1, QC2 Switch T1 Transformer T11 Primary winding L1 Inductor (leakage inductance)

Claims (10)

A full-bridge conversion circuit that has four switch elements and converts an input DC voltage into an AC voltage;
A transformer whose primary winding is electrically connected to the output of the converter circuit;
A clamp circuit that is electrically connected between the conversion circuit and the primary winding, forms a closed circuit in which a primary current flows with the primary winding, and includes a switch that opens and closes the closed circuit;
A control circuit for controlling the four switch elements and the switch ;
An output circuit that is electrically connected to the intermediate potential point of the input voltage of the conversion circuit and the secondary winding of the transformer, converts the AC voltage induced in the secondary winding into a DC voltage, and outputs the DC voltage. A DC / DC converter characterized in that the intermediate potential point of the output voltage is electrically connected to a common reference potential . The control circuit includes:
Performing inversion control to invert the polarity of the output voltage of the converter circuit;
And after performing the inversion control until the next inversion control is executed,
A first return control for flowing a primary current through the closed circuit in order to maintain energy stored in an inductance component on the closed circuit;
2. The DC / DC converter according to claim 1, wherein after the first return control, a second return control in which the primary side current flows to the conversion circuit is executed. 3. A voltage detection circuit for detecting a voltage applied to the clamp circuit;
3. The DC / DC converter according to claim 1, wherein the control circuit performs soft switching on the switch based on a detection result of the voltage detection circuit. The clamp circuit includes two of the switches,
4. The DC / DC converter according to claim 1, wherein the two switches are electrically connected in parallel between a pair of output points of the conversion circuit. 5. The clamp circuit includes two of the switches,
4. The DC / DC converter according to claim 1, wherein the two switches are electrically connected in series between a pair of output points of the conversion circuit. 5. 6. The DC / DC converter according to claim 5, wherein the control circuit synchronously rectifies the two switches when the closed circuit is closed. The DC / DC converter according to claim 6, wherein the control circuit maintains one of the two switches in an on state when the closed circuit is opened. The four switch elements and the two switches are each composed of an insulated gate bipolar transistor,
8. The DC / D according to claim 4, wherein the emitters of the two switches are electrically connected to any one of the emitters of the four switch elements, respectively.
C converter. 4. The DC / DC converter according to claim 1, wherein the clamp circuit includes a bidirectional switch element as the switch. 5. A current detection circuit for detecting a current flowing through the clamp circuit;
10. The DC / DC according to claim 1, wherein the control circuit switches the switch off when a current value detected by the current detection circuit exceeds a predetermined value. 11.
Converter .

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