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JP6316616B2 - Built-in component board - Google Patents
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JP6316616B2 - Built-in component board - Google Patents

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JP6316616B2
JP6316616B2 JP2014025890A JP2014025890A JP6316616B2 JP 6316616 B2 JP6316616 B2 JP 6316616B2 JP 2014025890 A JP2014025890 A JP 2014025890A JP 2014025890 A JP2014025890 A JP 2014025890A JP 6316616 B2 JP6316616 B2 JP 6316616B2
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electronic component
external electrode
component
substrate
embedded
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JP2015153886A (en
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松本 健太郎
健太郎 松本
秀和 唐澤
秀和 唐澤
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Koa Corp
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Koa Corp
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    • HELECTRICITY
    • H10SEMICONDUCTOR DEVICES; ELECTRIC SOLID-STATE DEVICES NOT OTHERWISE PROVIDED FOR
    • H10WGENERIC PACKAGES, INTERCONNECTIONS, CONNECTORS OR OTHER CONSTRUCTIONAL DETAILS OF DEVICES COVERED BY CLASS H10
    • H10W70/00Package substrates; Interposers; Redistribution layers [RDL]
    • H10W70/01Manufacture or treatment
    • H10W70/05Manufacture or treatment of insulating or insulated package substrates, or of interposers, or of redistribution layers
    • H10W70/08Manufacture or treatment of insulating or insulated package substrates, or of interposers, or of redistribution layers by depositing layers on the chip or wafer, e.g. "chip-first" RDLs
    • H10W70/09Manufacture or treatment of insulating or insulated package substrates, or of interposers, or of redistribution layers by depositing layers on the chip or wafer, e.g. "chip-first" RDLs extending onto an encapsulation that laterally surrounds the chip or wafer, e.g. fan-out wafer level package [FOWLP] RDLs
    • HELECTRICITY
    • H10SEMICONDUCTOR DEVICES; ELECTRIC SOLID-STATE DEVICES NOT OTHERWISE PROVIDED FOR
    • H10WGENERIC PACKAGES, INTERCONNECTIONS, CONNECTORS OR OTHER CONSTRUCTIONAL DETAILS OF DEVICES COVERED BY CLASS H10
    • H10W70/00Package substrates; Interposers; Redistribution layers [RDL]
    • H10W70/60Insulating or insulated package substrates; Interposers; Redistribution layers
    • HELECTRICITY
    • H10SEMICONDUCTOR DEVICES; ELECTRIC SOLID-STATE DEVICES NOT OTHERWISE PROVIDED FOR
    • H10WGENERIC PACKAGES, INTERCONNECTIONS, CONNECTORS OR OTHER CONSTRUCTIONAL DETAILS OF DEVICES COVERED BY CLASS H10
    • H10W72/00Interconnections or connectors in packages
    • H10W72/851Dispositions of multiple connectors or interconnections
    • H10W72/853On the same surface
    • HELECTRICITY
    • H10SEMICONDUCTOR DEVICES; ELECTRIC SOLID-STATE DEVICES NOT OTHERWISE PROVIDED FOR
    • H10WGENERIC PACKAGES, INTERCONNECTIONS, CONNECTORS OR OTHER CONSTRUCTIONAL DETAILS OF DEVICES COVERED BY CLASS H10
    • H10W72/00Interconnections or connectors in packages
    • H10W72/851Dispositions of multiple connectors or interconnections
    • H10W72/874On different surfaces
    • HELECTRICITY
    • H10SEMICONDUCTOR DEVICES; ELECTRIC SOLID-STATE DEVICES NOT OTHERWISE PROVIDED FOR
    • H10WGENERIC PACKAGES, INTERCONNECTIONS, CONNECTORS OR OTHER CONSTRUCTIONAL DETAILS OF DEVICES COVERED BY CLASS H10
    • H10W72/00Interconnections or connectors in packages
    • H10W72/90Bond pads, in general
    • H10W72/941Dispositions of bond pads
    • H10W72/9413Dispositions of bond pads on encapsulations
    • HELECTRICITY
    • H10SEMICONDUCTOR DEVICES; ELECTRIC SOLID-STATE DEVICES NOT OTHERWISE PROVIDED FOR
    • H10WGENERIC PACKAGES, INTERCONNECTIONS, CONNECTORS OR OTHER CONSTRUCTIONAL DETAILS OF DEVICES COVERED BY CLASS H10
    • H10W74/00Encapsulations, e.g. protective coatings
    • H10W74/01Manufacture or treatment
    • H10W74/019Manufacture or treatment using temporary auxiliary substrates
    • HELECTRICITY
    • H10SEMICONDUCTOR DEVICES; ELECTRIC SOLID-STATE DEVICES NOT OTHERWISE PROVIDED FOR
    • H10WGENERIC PACKAGES, INTERCONNECTIONS, CONNECTORS OR OTHER CONSTRUCTIONAL DETAILS OF DEVICES COVERED BY CLASS H10
    • H10W90/00Package configurations
    • H10W90/701Package configurations characterised by the relative positions of pads or connectors relative to package parts
    • H10W90/721Package configurations characterised by the relative positions of pads or connectors relative to package parts of bump connectors
    • H10W90/722Package configurations characterised by the relative positions of pads or connectors relative to package parts of bump connectors between stacked chips
    • HELECTRICITY
    • H10SEMICONDUCTOR DEVICES; ELECTRIC SOLID-STATE DEVICES NOT OTHERWISE PROVIDED FOR
    • H10WGENERIC PACKAGES, INTERCONNECTIONS, CONNECTORS OR OTHER CONSTRUCTIONAL DETAILS OF DEVICES COVERED BY CLASS H10
    • H10W90/00Package configurations
    • H10W90/701Package configurations characterised by the relative positions of pads or connectors relative to package parts
    • H10W90/731Package configurations characterised by the relative positions of pads or connectors relative to package parts of die-attach connectors
    • H10W90/732Package configurations characterised by the relative positions of pads or connectors relative to package parts of die-attach connectors between stacked chips

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  • Production Of Multi-Layered Print Wiring Board (AREA)
  • Structures For Mounting Electric Components On Printed Circuit Boards (AREA)

Description

本発明は、チップ抵抗器等の電子部品が絶縁性の樹脂層に埋め込まれている部品内蔵型基板に係り、特に、樹脂層に搭載した他の電子部品が内蔵の電子部品と導通されている部品内蔵型基板に関するものである。   The present invention relates to a component-embedded substrate in which electronic components such as chip resistors are embedded in an insulating resin layer, and in particular, other electronic components mounted on the resin layer are electrically connected to the built-in electronic component. The present invention relates to a component-embedded substrate.

近年、電子機器の小型・軽量化や回路構成の複雑化に伴って、チップ抵抗器等の電子部品を回路基板の表面だけでなく内層にも実装して部品実装密度を高めるようにした部品内蔵型基板が実用に供されている。   In recent years, electronic components such as chip resistors are mounted not only on the circuit board surface but also on the inner layer to increase the component mounting density as electronic devices become smaller and lighter and circuit configurations become more complex. A mold substrate is in practical use.

この種の部品内蔵型基板では、通常、絶縁性の樹脂層からなる配線基板に電子部品を埋め込んだ後、この樹脂層にレーザ光を照射してビアホールを形成すると共に、そのビアホール内に銅メッキ処理等からなる接続ビアを形成することにより、内蔵された電子部品の外部電極と接続ビアとを接続するようにしている(例えば、特許文献1参照)。ここで、樹脂層としては一般的に不透明樹脂が使用されているため、樹脂層にビアホールを形成する際に内蔵された電子部品の外部電極を目視することができず、ビアホールの形成位置がずれて電子部品の外部電極と正しく接続されなくなる虞がある。   In this type of component-embedded substrate, an electronic component is usually embedded in a wiring substrate made of an insulating resin layer, and then a via hole is formed by irradiating the resin layer with a laser beam, and copper plating is formed in the via hole. By forming a connection via made of processing or the like, the external electrode of the built-in electronic component and the connection via are connected (for example, see Patent Document 1). Here, since an opaque resin is generally used as the resin layer, the external electrodes of the built-in electronic components cannot be visually observed when forming the via hole in the resin layer, and the via hole formation position is shifted. There is a risk that the external electrode of the electronic component is not correctly connected.

そこで従来より、ビアホールの形成位置と電子部品の外部電極とが多少ずれても問題ないように、表面電極に比べて裏面電極の面積を大きく設定したチップ抵抗器(電子部品)を予め準備しておき、かかるチップ抵抗器を表面電極の形成面を下向きにした状態で樹脂層に埋め込むようにした部品内蔵型基板が提案されている(例えば、特許文献2参照)。   Therefore, a chip resistor (electronic component) is prepared in advance so that the area of the back electrode is set larger than that of the front electrode so that there is no problem even if the via hole formation position and the external electrode of the electronic component are slightly shifted. In addition, a component-embedded substrate has been proposed in which such a chip resistor is embedded in a resin layer with the surface electrode formation surface facing downward (see, for example, Patent Document 2).

特許文献2に開示された従来技術では、樹脂層に内蔵される電子部品の裏面電極が大きな面積に形成されているため、樹脂層にレーザ光を照射してビアホールを形成する際に、ビアホールの形成位置が正規の位置に対して多少ずれたとしても、ビアホールと外部電極(裏面電極)を確実に接続させることができる。   In the prior art disclosed in Patent Document 2, since the back electrode of the electronic component built in the resin layer is formed in a large area, when forming the via hole by irradiating the resin layer with laser light, Even if the formation position is slightly deviated from the normal position, the via hole and the external electrode (back electrode) can be reliably connected.

特開2001−53447号公報JP 2001-53447 A 特開2011−199188号公報JP 2011-199188 A

しかしながら、部品内蔵型基板に用いられる電子部品の小型化は促進される傾向にあり、例えば0603サイズ(0.6mm×0.3mm)と呼ばれる小型のチップ抵抗器になると、外部電極となる裏面電極の面積を大きくすることに限界があるため、特許文献2に開示された従来技術を採用しても十分な効果を期待することはできなくなる。特に、樹脂層として硬化時の収縮率が大きな絶縁性樹脂(例えばエポキシ系樹脂)を使用した場合、絶縁性樹脂の収縮に伴って電子部品の実装位置にずれが生じてしまうため、外部電極の大きさに限界のある小型の電子部品を用いると、ビアホールの僅かな位置ずれによって外部電極との接続が不完全になる虞がある。   However, miniaturization of electronic components used for component-embedded substrates tends to be promoted. For example, in the case of a small chip resistor called 0603 size (0.6 mm × 0.3 mm), a back electrode serving as an external electrode Therefore, even if the conventional technique disclosed in Patent Document 2 is adopted, a sufficient effect cannot be expected. In particular, when an insulating resin (for example, epoxy resin) having a large shrinkage rate at the time of curing is used as the resin layer, the mounting position of the electronic component is displaced with the shrinkage of the insulating resin. When a small electronic component having a limit in size is used, there is a possibility that the connection with the external electrode becomes incomplete due to a slight misalignment of the via hole.

また、樹脂層の表面に形成した配線パターンに他の電子部品を実装し、この電子部品を樹脂層に埋め込んだ電子部品と導通させる場合、特許文献1や特許文献2に開示された従来技術のように、絶縁層にビアホールを形成して配線パターンと内蔵部品の外部電極とを導通させると、ビアホールによって配線基板の薄型化が妨げられてしまうことになる。特に、これら2つの電子部品がそれぞれ絶縁層に内蔵されている多層基板の場合、各層に形成されるビアホールの長さが累積されて配線基板全体の厚みが非常に厚くなるだけでなく、上層の絶縁層の表面から下層に埋め込まれた電子部品の外部電極までの距離が長くなるため、ビアホールの孔明け加工やビアホール内のメッキ形成が困難になるという問題が発生する。   Further, when another electronic component is mounted on the wiring pattern formed on the surface of the resin layer, and this electronic component is electrically connected to the electronic component embedded in the resin layer, the conventional technology disclosed in Patent Literature 1 and Patent Literature 2 is used. As described above, when the via hole is formed in the insulating layer and the wiring pattern and the external electrode of the built-in component are electrically connected, the via hole prevents the wiring board from being thinned. In particular, in the case of a multilayer substrate in which these two electronic components are each incorporated in an insulating layer, the length of the via holes formed in each layer is accumulated, resulting in a very thick wiring board as a whole. Since the distance from the surface of the insulating layer to the external electrode of the electronic component embedded in the lower layer becomes longer, there arises a problem that drilling of the via hole and plating formation in the via hole become difficult.

本発明は、このような従来技術の実情に鑑みてなされたもので、その目的は、内蔵の電子部品に対して他の電子部品を簡単かつ確実に導通させることができると共に薄型化に好適な部品内蔵型基板を提供することにある。   The present invention has been made in view of the actual situation of the prior art, and an object of the present invention is to allow other electronic components to be easily and reliably conducted with respect to a built-in electronic component and to be suitable for thinning. The object is to provide a component-embedded substrate.

上記の目的を達成するために、本発明の部品内蔵型基板は、ベース基板に外部電極を有する第1電子部品が埋め込まれていると共に、前記ベース基板に外部電極を有する第2電子部品が搭載されている部品内蔵型基板において、前記第1電子部品の前記外部電極が前記第2電子部品の前記外部電極よりも大きな面積に設定されており、これら両外部電極どうしを直接重ねて導通させることにより、前記第1電子部品の前記外部電極の一部が前記第2電子部品の端面から露出するように構成した。 To achieve the above object, the component-embedded substrate of the present invention has the first electronic component having the external electrode embedded in the base substrate and the second electronic component having the external electrode mounted on the base substrate. in component-embedded type substrate being, said being set to a larger area than the external electrode of the first said external electrode of the electronic component and the second electronic component, Ru into conduction overlapping these two external electrodes each other directly Thus, a part of the external electrode of the first electronic component is exposed from the end surface of the second electronic component.

このように構成された部品内蔵型基板では、ベース基板に内蔵された第1電子部品の外部電極とベース基板に表面実装された第2電子部品の外部電極とが、ビアホールを介さずに直接重ね合わされて導通状態となっているため、ビアホールの位置ずれに起因する導通不良を解消することができると共に、ビアホールを省略した分だけ薄型化を図ることができる。しかも、第1電子部品の外部電極が第2電子部品の外部電極よりも大きな面積に設定されており、これら両外部電極を重ね合わせることにより、第1電子部品の外部電極の一部が第2電子部品の外部電極から露出するようになっているため、導電性接着剤や半田(クリーム半田)等の接着材料を用いて第1電子部品と第2電子部品を固着する際に、接着材料が両外部電極の接着面から外部電極の露出個所にはみ出し易くなって固着性を高めることができる。 In the component built-in type substrate configured as described above, the external electrode of the first electronic component built in the base substrate and the external electrode of the second electronic component surface-mounted on the base substrate are directly overlapped without via holes. Thus, since the conductive state is established, it is possible to eliminate the conduction failure due to the positional deviation of the via hole, and it is possible to reduce the thickness by omitting the via hole. In addition, the external electrode of the first electronic component is set to have a larger area than the external electrode of the second electronic component, and by overlapping these external electrodes, a part of the external electrode of the first electronic component is the second. Since it is exposed from the external electrode of the electronic component, when the first electronic component and the second electronic component are fixed using an adhesive material such as a conductive adhesive or solder (cream solder), the adhesive material is It becomes easy to protrude from the adhesion surface of both external electrodes to the exposed part of the external electrode, and the fixing property can be improved.

上記の構成において、ベース基板に第1電子部品を内蔵する手段は特に限定されないが、ベース基板に埋め込み用孔が設けられており、この埋め込み用孔に充填された樹脂層の内部に第1電子部品を埋め込むようにすることが好ましい。   In the above configuration, the means for incorporating the first electronic component in the base substrate is not particularly limited, but the base substrate is provided with an embedding hole, and the first electron is placed inside the resin layer filled in the embedding hole. It is preferable to embed the part.

上記の構成において、第2電子部品が、第1電子部品の外部電極を接続ランドとして固着された外部電極と、ベース基板上の配線パターンを接続ランドとして固着された外部電極とを有していると、第2電子部品に備えられる一対の外部電極のうち、一方の外部電極については第1電子部品の外部電極を接続ランドとして利用できるため、ベース基板上に必要とされる配線パターンの接続ランドを削減することができる。 In the above configuration, the second electronic component has an external electrode fixed with the external electrode of the first electronic component as the connection land, and an external electrode fixed with the wiring pattern on the base substrate as the connection land. Of the pair of external electrodes provided in the second electronic component, for one of the external electrodes, the external electrode of the first electronic component can be used as the connection land, so that the connection land of the wiring pattern required on the base substrate can be used. Can be reduced.

本発明の部品内蔵型基板によれば、ベース基板に内蔵された第1電子部品に対してベース基板に表面実装された第2電子部品を簡単かつ確実に導通させることができると共に、ビアホールを省略した分だけ薄型化を図ることができる。 According to the component-embedded substrate of the present invention, the second electronic component surface-mounted on the base substrate can be easily and reliably conducted with respect to the first electronic component embedded in the base substrate, and a via hole is omitted. It is possible to reduce the thickness as much as possible.

本発明の第1実施形態例に係る部品内蔵型基板の断面図である。It is sectional drawing of the component built-in type board | substrate which concerns on the example of 1st Embodiment of this invention. 第1実施形態例に係る部品内蔵型基板の製造工程を示す説明図である。It is explanatory drawing which shows the manufacturing process of the component built-in type board | substrate which concerns on the example of 1st Embodiment. 本発明の第2実施形態例に係る部品内蔵型基板の断面図である。It is sectional drawing of the component built-in type board | substrate which concerns on the 2nd Example of this invention. 本発明の第3実施形態例に係る部品内蔵型基板の断面図である。It is sectional drawing of the component built-in type board | substrate which concerns on the example of 3rd Embodiment of this invention. 本発明の第4実施形態例に係る部品内蔵型基板の断面図である。It is sectional drawing of the component built-in type board | substrate which concerns on the example of 4th Embodiment of this invention.

発明の実施の形態について図面を参照して説明すると、図1に示すように、本発明の第1実施形態例に係る部品内蔵型基板1は、エポキシ樹脂やポリイミド等の絶縁性樹脂からなるベース基板2と、このベース基板2に内蔵された第1電子部品3と、ベース基板2上に搭載された第2電子部品4と、ベース基板2の表面に設けられた配線パターン5等によって主に構成されている。   DESCRIPTION OF THE PREFERRED EMBODIMENTS Referring to the drawings, an embodiment of the invention will be described. As shown in FIG. 1, a component-embedded substrate 1 according to a first embodiment of the present invention is a base made of an insulating resin such as epoxy resin or polyimide. Mainly by the substrate 2, the first electronic component 3 built in the base substrate 2, the second electronic component 4 mounted on the base substrate 2, the wiring pattern 5 provided on the surface of the base substrate 2, etc. It is configured.

ベース基板2には埋め込み用孔2aが形成されており、第1電子部品3は埋め込み用孔2aに充填された絶縁性の樹脂層6の内部に埋め込まれている。第1電子部品3は例えばチップ抵抗器であり、詳細については図示省略されているが、この第1電子部品3の上面側には一対の第1表面電極や、第1表面電極に接続された抵抗体、抵抗体を覆う保護層、保護層の端部を覆う第2表面電極、第2表面電極を覆う外部電極3a等が設けられており、第1電子部品3の下面側には一対の裏面電極が設けられている。   An embedding hole 2a is formed in the base substrate 2, and the first electronic component 3 is embedded inside an insulating resin layer 6 filled in the embedding hole 2a. The first electronic component 3 is, for example, a chip resistor. Although details are not shown, the upper surface of the first electronic component 3 is connected to a pair of first surface electrodes or a first surface electrode. A resistor, a protective layer that covers the resistor, a second surface electrode that covers an end of the protective layer, an external electrode 3a that covers the second surface electrode, and the like, are provided on the lower surface side of the first electronic component 3. A back electrode is provided.

第2電子部品4もチップ抵抗器であり、詳細については図示省略されているが、第2電子部品4の上面側には一対の表面電極や、表面電極に接続された抵抗体、抵抗体を覆う保護層が設けられており、第2電子部品4の下面側には外部電極4aとして機能する一対の裏面電極が設けられている。この第2電子部品4は一方の外部電極4aが第1電子部品3の外部電極3aと直接重なるようにベース基板2上に搭載され、これら外部電極3a,4aが導電性接着剤を用いて接続されると共に、第2電子部品4の他方の外部電極4aが導電性接着剤を用いて配線パターン5に接続されている。   The second electronic component 4 is also a chip resistor, and details thereof are omitted. However, a pair of surface electrodes, a resistor connected to the surface electrode, and a resistor are provided on the upper surface side of the second electronic component 4. A covering protective layer is provided, and a pair of backside electrodes functioning as the external electrodes 4 a are provided on the lower surface side of the second electronic component 4. The second electronic component 4 is mounted on the base substrate 2 so that one external electrode 4a directly overlaps the external electrode 3a of the first electronic component 3, and these external electrodes 3a and 4a are connected using a conductive adhesive. At the same time, the other external electrode 4a of the second electronic component 4 is connected to the wiring pattern 5 using a conductive adhesive.

次に、上記の如く構成された部品内蔵型基板1の製造方法について、図2を参照しながら説明する。   Next, a manufacturing method of the component built-in substrate 1 configured as described above will be described with reference to FIG.

まず、図2(a)に示すように、ベース基板2の片面に銅箔からなる配線材料7を貼り付けた後、この配線材料7を公知のフォトリソグラフィ技術を用いてパターニングすることにより、図2(b)に示すように、ベース基板2の片面に配線パターン5を形成する。次に、ベース基板2に例えばレーザ光を照射することにより、図2(c)に示すように、ベース基板2の所定位置に埋め込み用孔2aを穿設する。   First, as shown in FIG. 2A, after a wiring material 7 made of copper foil is attached to one surface of the base substrate 2, the wiring material 7 is patterned by using a known photolithography technique. As shown in FIG. 2B, the wiring pattern 5 is formed on one side of the base substrate 2. Next, by irradiating the base substrate 2 with, for example, a laser beam, an embedding hole 2a is formed at a predetermined position of the base substrate 2 as shown in FIG.

次に、この状態のままベース基板2を反転し、図2(d)に示すように、配線パターン5に剥離板8を貼り付けて埋め込み用孔2aの一方の開口端を塞いだ後、図2(e)に示すように、第1電子部品3を埋め込み用孔2a内に挿入して剥離板8上に載置する。その際、第1電子部品3は外部電極3aを下に向けた水平姿勢で埋め込み用孔2a内に収納されるため、一対の外部電極3aの表面が平坦な剥離板8に当接することになる。   Next, the base substrate 2 is inverted in this state, and as shown in FIG. 2D, a release plate 8 is attached to the wiring pattern 5 to close one opening end of the embedding hole 2a. As shown in FIG. 2 (e), the first electronic component 3 is inserted into the embedding hole 2 a and placed on the release plate 8. At this time, since the first electronic component 3 is housed in the embedding hole 2a in a horizontal posture with the external electrode 3a facing downward, the surfaces of the pair of external electrodes 3a abut against the flat peeling plate 8. .

次に、図2(f)に示すように、ベース基板2の上面にPEEKやPEI等の熱可塑性樹脂フィルムを被せ、これを加熱・加圧することで埋め込み用孔2aの内部に樹脂層6を充填する。しかる後、ベース基板2を反転して剥離板8を剥がすと、図2(g)に示すように、ベース基板2の上面から第1電子部品3の外部電極3aと配線パターン5が露出し、これら外部電極3aと配線パターン5が同一平面内に位置することになる。   Next, as shown in FIG. 2 (f), the upper surface of the base substrate 2 is covered with a thermoplastic resin film such as PEEK or PEI, and this is heated and pressurized to form a resin layer 6 inside the embedding hole 2a. Fill. Thereafter, when the base substrate 2 is reversed and the release plate 8 is peeled off, the external electrodes 3a and the wiring patterns 5 of the first electronic component 3 are exposed from the upper surface of the base substrate 2, as shown in FIG. These external electrodes 3a and the wiring pattern 5 are located in the same plane.

次に、第1電子部品3の外部電極3aと配線パターン5の所定箇所に導電性接着剤を塗布した後、図2(h)に示すように、ベース基板2上に第2電子部品4を搭載することにより、第2電子部品4の両外部電極4aを導電性接着剤を介して第1電子部品3の外部電極3aと配線パターン5にそれぞれ接着する。その結果、ベース基板2の埋め込み用孔2aに内蔵された第1電子部品3の外部電極3aと、ベース基板2の表面に実装された第2電子部品4の外部電極4aとが、ビアホールを介さずに直接重ね合わされて導通状態となり、図1に示すような実装構造を有する部品内蔵型基板1が完成する。   Next, after applying a conductive adhesive to predetermined portions of the external electrode 3a and the wiring pattern 5 of the first electronic component 3, the second electronic component 4 is placed on the base substrate 2 as shown in FIG. 2 (h). By mounting, both external electrodes 4a of the second electronic component 4 are bonded to the external electrodes 3a of the first electronic component 3 and the wiring pattern 5 through a conductive adhesive. As a result, the external electrode 3a of the first electronic component 3 incorporated in the embedding hole 2a of the base substrate 2 and the external electrode 4a of the second electronic component 4 mounted on the surface of the base substrate 2 are connected via via holes. Instead, they are superposed directly into a conductive state, and the component-embedded substrate 1 having a mounting structure as shown in FIG. 1 is completed.

以上説明したように、第1実施形態例に係る部品内蔵型基板1では、ベース基板2の埋め込み用孔2aに樹脂層6が充填され、この樹脂層6に埋め込まれた内蔵部品である第1電子部品3の外部電極3aと、ベース基板2に搭載された表面実装部品である第2電子部品4の外部電極4aとが、ビアホールを介さずに直接重ね合わされて導通状態となっているため、ビアホールの位置ずれに起因する導通不良を解消することができると共に、ビアホールを省略した分だけ薄型化を図ることができる。   As described above, in the component-embedded substrate 1 according to the first embodiment, the resin layer 6 is filled in the embedding hole 2 a of the base substrate 2, and the first component that is the embedded component embedded in the resin layer 6. Since the external electrode 3a of the electronic component 3 and the external electrode 4a of the second electronic component 4 which is a surface mounting component mounted on the base substrate 2 are directly superimposed without via holes, they are in a conductive state. It is possible to eliminate the conduction failure due to the position shift of the via hole and to reduce the thickness by omitting the via hole.

また、樹脂層6に埋め込まれた第1電子部品3の外部電極3aとベース基板2の表面に設けられた配線パターン5とが同一平面内に位置しており、これら外部電極3aと配線パターン5に第2電子部品4の両外部電極4aが重ねられているため、第2電子部品4の外部電極4aが第1電子部品3の外部電極3aに対して傾くことなく平行な姿勢で密着されることになり、両者の導通の信頼性を極めて安定したものにすることができる。   Further, the external electrode 3a of the first electronic component 3 embedded in the resin layer 6 and the wiring pattern 5 provided on the surface of the base substrate 2 are located in the same plane, and the external electrode 3a and the wiring pattern 5 are arranged. Since the external electrodes 4a of the second electronic component 4 are overlapped with each other, the external electrodes 4a of the second electronic component 4 are in close contact with the external electrodes 3a of the first electronic component 3 in a parallel posture without being inclined. As a result, the reliability of conduction between the two can be made extremely stable.

ここで、上記した第1実施形態例では、第2電子部品4の両外部電極4aを第1電子部品3の外部電極3aとベース基板2上の配線パターン5に対してそれぞれ導電性接着剤を用いて接着する場合について説明したが、以下に説明する第2実施形態例や第3実施形態例のように、導電性接着剤の代わりに半田を用いて接着することも可能である。   Here, in the above-described first embodiment, both the external electrodes 4a of the second electronic component 4 are made of conductive adhesive with respect to the external electrodes 3a of the first electronic component 3 and the wiring pattern 5 on the base substrate 2, respectively. However, it is also possible to use solder instead of the conductive adhesive as in the second and third embodiments described below.

図3に示すように、本発明の第2実施形態例に係る部品内蔵型基板20では、第1電子部品3の外部電極3aと第2電子部品4の外部電極4aは平面的にほぼ同じ大きさであるが、第2電子部品4の外部電極4aが第1電子部品3の外部電極3aに対して互いの接触面の面内方向にずらして重ね合わされているため、それに伴って第1電子部品3の外部電極3aの一部が第2電子部品4の端面から露出するようになっている。   As shown in FIG. 3, in the component-embedded substrate 20 according to the second embodiment of the present invention, the external electrode 3a of the first electronic component 3 and the external electrode 4a of the second electronic component 4 are substantially the same in plan view. However, since the external electrode 4a of the second electronic component 4 is superimposed on the external electrode 3a of the first electronic component 3 so as to be shifted in the in-plane direction of the mutual contact surface, the first electron is accordingly accompanied. A part of the external electrode 3 a of the component 3 is exposed from the end surface of the second electronic component 4.

このように構成された第2実施形態例に係る部品内蔵型基板20においては、導電性接着剤や半田(クリーム半田)等の接着材料を用いて第1電子部品3と第2電子部品4を固着する際に、この接着材料が両外部電極3a,4aの接着面から外部電極3aの露出箇所にはみ出し易くなるため、接着材料の逃げ場所が確保されて固着性を高めることができる。特に、接着材料として半田を用いた場合、接着面から外部電極3aの露出箇所にはみ出した半田が第2電子部品4の端面にフィレット9を形成するため、第1電子部品3と第2電子部品4の固着性が非常に良好なものとなる。   In the component-embedded substrate 20 according to the second embodiment configured as described above, the first electronic component 3 and the second electronic component 4 are bonded using an adhesive material such as a conductive adhesive or solder (cream solder). When the adhesive material is fixed, the adhesive material easily protrudes from the adhesion surface of the external electrodes 3a and 4a to the exposed portion of the external electrode 3a, so that a place for the adhesive material to escape is secured and the adhesiveness can be improved. In particular, when solder is used as the adhesive material, the solder that protrudes from the adhesive surface to the exposed portion of the external electrode 3a forms a fillet 9 on the end surface of the second electronic component 4, so the first electronic component 3 and the second electronic component The adhesion of No. 4 is very good.

図4に示すように、本発明の第3実施形態例に係る部品内蔵型基板30では、第1電子部品3の外部電極3aは第2電子部品4の外部電極4aよりも大きな面積に設定されており、大きい方の外部電極3a上に小さい方の外部電極4aを重ねることにより、第1電子部品3の外部電極3aの一部が第2電子部品4の端面から露出するようになっている。その際、第1電子部品3の上面側に設けられた外部電極3aの面積自体を大きくし、この外部電極3aに対して第2電子部品4の外部電極4aを導通するようにしても良いが、第1電子部品3に表面電極と裏面電極を導通する端面電極を設けると共に、これら端面電極と表面電極および裏面電極を覆う外部電極部を設け、裏面電極のみが設けられた裏面の外部電極部に対して第2電子部品4の外部電極4aを導通するようにすると、第1電子部品3に大きくて平坦な外部電極を容易に設けることが可能になる。   As shown in FIG. 4, in the component-embedded substrate 30 according to the third embodiment of the present invention, the external electrode 3a of the first electronic component 3 is set to have a larger area than the external electrode 4a of the second electronic component 4. A portion of the external electrode 3a of the first electronic component 3 is exposed from the end face of the second electronic component 4 by overlapping the smaller external electrode 4a on the larger external electrode 3a. . At that time, the area itself of the external electrode 3a provided on the upper surface side of the first electronic component 3 may be increased, and the external electrode 4a of the second electronic component 4 may be electrically connected to the external electrode 3a. The first electronic component 3 is provided with an end face electrode that conducts the surface electrode and the back face electrode, and an external electrode portion that covers the end face electrode, the front face electrode, and the back face electrode is provided. On the other hand, if the external electrode 4a of the second electronic component 4 is made conductive, the first electronic component 3 can be easily provided with a large and flat external electrode.

このように構成された第3実施形態例に係る部品内蔵型基板30においても、導電性接着剤や半田(クリーム半田)等の接着材料を用いて第1電子部品3と第2電子部品4を固着する際に、この接着材料が両外部電極3a,4aの接着面から外部電極3aの露出箇所にはみ出し易くなるため、接着材料の逃げ場所が確保されて固着性を高めることができる。特に、接着材料として半田を用いた場合、接着面から外部電極3aの露出箇所にはみ出した半田が第2電子部品4の端面にフィレット9を形成するため、第1電子部品3と第2電子部品4の固着性が非常に良好なものとなる。   Also in the component-embedded substrate 30 according to the third embodiment configured as described above, the first electronic component 3 and the second electronic component 4 are bonded using an adhesive material such as a conductive adhesive or solder (cream solder). When the adhesive material is fixed, the adhesive material easily protrudes from the adhesion surface of the external electrodes 3a and 4a to the exposed portion of the external electrode 3a, so that a place for the adhesive material to escape is secured and the adhesiveness can be improved. In particular, when solder is used as the adhesive material, the solder that protrudes from the adhesive surface to the exposed portion of the external electrode 3a forms a fillet 9 on the end surface of the second electronic component 4, so the first electronic component 3 and the second electronic component The adhesion of No. 4 is very good.

図5は本発明の第4実施形態例に係る部品内蔵型基板40の断面図であり、この部品内蔵型基板40は、前述した第1電子部品3と第2電子部品4がそれぞれ絶縁層に内蔵された多層基板となっている。すなわち、ベース基板2の樹脂層6に埋め込まれた第1電子部品3とベース基板2上に搭載された第2電子部品4は、第1乃至第3実施形態例と同様に互いの外部電極3a,4aどうしを直接重ね合わせて導通状態となっており、第2電子部品4もベース基板2に積層された絶縁性の上部樹脂層41の内部に埋め込まれている。上部樹脂層41の表面には配線パターン42が設けられており、第1電子部品3と第2電子部品4は上部樹脂層41に設けられた接続ビア43を介して配線パターン42に接続されている。   FIG. 5 is a cross-sectional view of a component-embedded substrate 40 according to a fourth embodiment of the present invention. The component-embedded substrate 40 includes the first electronic component 3 and the second electronic component 4 described above as insulating layers. It is a built-in multilayer substrate. That is, the first electronic component 3 embedded in the resin layer 6 of the base substrate 2 and the second electronic component 4 mounted on the base substrate 2 are connected to each other's external electrodes 3a as in the first to third embodiments. , 4a are directly overlapped to be in a conductive state, and the second electronic component 4 is also embedded in an insulating upper resin layer 41 laminated on the base substrate 2. A wiring pattern 42 is provided on the surface of the upper resin layer 41, and the first electronic component 3 and the second electronic component 4 are connected to the wiring pattern 42 via connection vias 43 provided in the upper resin layer 41. Yes.

上記の如く構成された部品内蔵型基板40の製造方法について簡単に説明すると、ベース基板2の樹脂層6に埋め込まれた第1電子部品3に対して第2電子部品4を導通させるまでの工程は図2の(a)〜(h)と同じであり、しかる後に、第2電子部品4を覆うようにPEEKやPEI等の熱可塑性樹脂フィルムをベース基板2上に敷設し、これを加熱・加圧して上部樹脂層41を形成する。次に、上部樹脂層41にレーザ光を照射して第1電子部品3の外部電極3aと第2電子部品4の上面側の外部電極4bに達するビアホールを形成した後、そのビアホールの内部を含めて上部樹脂層41の表面全体に銅メッキ等を施すことでビアホールの内部に接続ビア43を形成し、最後に表面のメッキ層をエッチングして配線パターン42を形成する。   The manufacturing method of the component-embedded substrate 40 configured as described above will be briefly described. Steps until the second electronic component 4 is electrically connected to the first electronic component 3 embedded in the resin layer 6 of the base substrate 2. 2 is the same as (a) to (h) in FIG. 2, and thereafter, a thermoplastic resin film such as PEEK or PEI is laid on the base substrate 2 so as to cover the second electronic component 4, and this is heated and The upper resin layer 41 is formed by applying pressure. Next, the upper resin layer 41 is irradiated with laser light to form via holes reaching the external electrode 3a of the first electronic component 3 and the external electrode 4b on the upper surface side of the second electronic component 4, and then the inside of the via hole is included. Then, the connection via 43 is formed inside the via hole by performing copper plating or the like on the entire surface of the upper resin layer 41, and finally, the wiring pattern 42 is formed by etching the plating layer on the surface.

このように構成された第4実施形態例に係る部品内蔵型基板40では、下層のベース基板2の樹脂層6に埋め込まれた第1電子部品3の外部電極3aと、上層の上部樹脂層41に埋め込まれた第2電子部品4の外部電極4aとが、ビアホールを介さずに直接重ね合わされて導通状態となっているため、ビアホールの位置ずれに起因する導通不良を解消することができると共に、上部樹脂層41の表面から第1電子部品3の外部電極3aまでの距離がビアホールを省略した分だけ短くなるため、ビアホールの孔明け加工やビアホール内のメッキ形成を容易に行うことができる。   In the component-embedded substrate 40 according to the fourth embodiment thus configured, the external electrode 3a of the first electronic component 3 embedded in the resin layer 6 of the lower base substrate 2 and the upper resin layer 41 of the upper layer are provided. Since the external electrode 4a of the second electronic component 4 embedded in the conductive layer is directly superimposed without being via a via hole and is in a conductive state, it is possible to eliminate the conduction failure due to the misalignment of the via hole, Since the distance from the surface of the upper resin layer 41 to the external electrode 3a of the first electronic component 3 is reduced by the amount corresponding to the omission of the via hole, drilling of the via hole and plating formation in the via hole can be easily performed.

また、多層基板の上下各層に第1電子部品3と第2電子部品4が互いに平行な姿勢で内蔵されており、第2電子部品4の外部電極4aが第1電子部品3の外部電極3aに対して傾くことなく密着されているため、両者の導通の信頼性を極めて安定したものにすることができると共に、ビアホールの形成時に深さが変わってしまうことを防止できる。   In addition, the first electronic component 3 and the second electronic component 4 are incorporated in the upper and lower layers of the multilayer substrate in a parallel posture, and the external electrode 4 a of the second electronic component 4 is connected to the external electrode 3 a of the first electronic component 3. Since they are in close contact with each other without being inclined, the reliability of the conduction between them can be made extremely stable, and the depth can be prevented from changing during the formation of the via hole.

なお、上記第1乃至第4実施形態例では、ベース基板2に内蔵される第1電子部品やその第1電子部品に導通される第2電子部品としてチップ抵抗器を例示して説明したが、チップコンデンサやICチップ等の外部電極を有する他の電子部品を用いることも可能である。   In the first to fourth embodiments, the chip resistor is exemplified as the first electronic component built in the base substrate 2 and the second electronic component conducted to the first electronic component. It is also possible to use other electronic parts having external electrodes such as a chip capacitor and an IC chip.

1,20,30,40 部品内蔵型基板
2 ベース基板
2a 埋め込み用孔
3 第1電子部品
3a 外部電極
4 第2電子部品
4a 外部電極
5 配線パターン
6 樹脂層
7 配線材料
8 剥離板
9 フィレット
41 上部樹脂層
42 配線パターン
43 接続ビア
1, 20, 30, 40 Component-embedded substrate 2 Base substrate 2a Embedding hole 3 First electronic component 3a External electrode 4 Second electronic component 4a External electrode 5 Wiring pattern 6 Resin layer 7 Wiring material 8 Release plate 9 Fillet 41 Upper part Resin layer 42 Wiring pattern 43 Connection via

Claims (3)

ベース基板に外部電極を有する第1電子部品が埋め込まれていると共に、前記ベース基板に外部電極を有する第2電子部品が搭載されている部品内蔵型基板において、
前記第1電子部品の前記外部電極が前記第2電子部品の前記外部電極よりも大きな面積に設定されており、これら両外部電極どうしを直接重ねて導通させることにより、前記第1電子部品の前記外部電極の一部が前記第2電子部品の端面から露出するようにしたことを特徴とする部品内蔵型基板。
In the component-embedded substrate in which the first electronic component having the external electrode is embedded in the base substrate and the second electronic component having the external electrode is mounted on the base substrate ,
Wherein is set to a larger area than the external electrode of the first said external electrode of the electronic component and the second electronic component, the Rukoto to conduct overlapping these two external electrodes each other directly, the first electronic component A component-embedded substrate characterized in that a part of the external electrode is exposed from an end surface of the second electronic component .
請求項1の記載において、前記ベース基板に埋め込み用孔が設けられており、前記第1電子部品は前記埋め込み用孔に充填された樹脂層の内部に埋め込まれていることを特徴とする部品内蔵型基板。   2. The built-in component according to claim 1, wherein an embedding hole is provided in the base substrate, and the first electronic component is embedded in a resin layer filled in the embedding hole. Mold substrate. 請求項1または2の記載において、前記第2電子部品は、前記第1電子部品の前記外部電極を接続ランドとして固着された外部電極と、前記ベース基板上の配線パターンを接続ランドとして固着された外部電極とを有していることを特徴とする部品内蔵型基板。 3. The second electronic component according to claim 1, wherein the second electronic component is fixed using the external electrode of the first electronic component fixed as a connection land and the wiring pattern on the base substrate as a connection land. A component-embedded substrate having an external electrode .
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