JP6316616B2 - 部品内蔵型基板 - Google Patents
部品内蔵型基板 Download PDFInfo
- Publication number
- JP6316616B2 JP6316616B2 JP2014025890A JP2014025890A JP6316616B2 JP 6316616 B2 JP6316616 B2 JP 6316616B2 JP 2014025890 A JP2014025890 A JP 2014025890A JP 2014025890 A JP2014025890 A JP 2014025890A JP 6316616 B2 JP6316616 B2 JP 6316616B2
- Authority
- JP
- Japan
- Prior art keywords
- electronic component
- external electrode
- component
- substrate
- embedded
- Prior art date
- Legal status (The legal status is an assumption and is not a legal conclusion. Google has not performed a legal analysis and makes no representation as to the accuracy of the status listed.)
- Expired - Fee Related
Links
Classifications
-
- H—ELECTRICITY
- H10—SEMICONDUCTOR DEVICES; ELECTRIC SOLID-STATE DEVICES NOT OTHERWISE PROVIDED FOR
- H10W—GENERIC PACKAGES, INTERCONNECTIONS, CONNECTORS OR OTHER CONSTRUCTIONAL DETAILS OF DEVICES COVERED BY CLASS H10
- H10W70/00—Package substrates; Interposers; Redistribution layers [RDL]
- H10W70/01—Manufacture or treatment
- H10W70/05—Manufacture or treatment of insulating or insulated package substrates, or of interposers, or of redistribution layers
- H10W70/08—Manufacture or treatment of insulating or insulated package substrates, or of interposers, or of redistribution layers by depositing layers on the chip or wafer, e.g. "chip-first" RDLs
- H10W70/09—Manufacture or treatment of insulating or insulated package substrates, or of interposers, or of redistribution layers by depositing layers on the chip or wafer, e.g. "chip-first" RDLs extending onto an encapsulation that laterally surrounds the chip or wafer, e.g. fan-out wafer level package [FOWLP] RDLs
-
- H—ELECTRICITY
- H10—SEMICONDUCTOR DEVICES; ELECTRIC SOLID-STATE DEVICES NOT OTHERWISE PROVIDED FOR
- H10W—GENERIC PACKAGES, INTERCONNECTIONS, CONNECTORS OR OTHER CONSTRUCTIONAL DETAILS OF DEVICES COVERED BY CLASS H10
- H10W70/00—Package substrates; Interposers; Redistribution layers [RDL]
- H10W70/60—Insulating or insulated package substrates; Interposers; Redistribution layers
-
- H—ELECTRICITY
- H10—SEMICONDUCTOR DEVICES; ELECTRIC SOLID-STATE DEVICES NOT OTHERWISE PROVIDED FOR
- H10W—GENERIC PACKAGES, INTERCONNECTIONS, CONNECTORS OR OTHER CONSTRUCTIONAL DETAILS OF DEVICES COVERED BY CLASS H10
- H10W72/00—Interconnections or connectors in packages
- H10W72/851—Dispositions of multiple connectors or interconnections
- H10W72/853—On the same surface
-
- H—ELECTRICITY
- H10—SEMICONDUCTOR DEVICES; ELECTRIC SOLID-STATE DEVICES NOT OTHERWISE PROVIDED FOR
- H10W—GENERIC PACKAGES, INTERCONNECTIONS, CONNECTORS OR OTHER CONSTRUCTIONAL DETAILS OF DEVICES COVERED BY CLASS H10
- H10W72/00—Interconnections or connectors in packages
- H10W72/851—Dispositions of multiple connectors or interconnections
- H10W72/874—On different surfaces
-
- H—ELECTRICITY
- H10—SEMICONDUCTOR DEVICES; ELECTRIC SOLID-STATE DEVICES NOT OTHERWISE PROVIDED FOR
- H10W—GENERIC PACKAGES, INTERCONNECTIONS, CONNECTORS OR OTHER CONSTRUCTIONAL DETAILS OF DEVICES COVERED BY CLASS H10
- H10W72/00—Interconnections or connectors in packages
- H10W72/90—Bond pads, in general
- H10W72/941—Dispositions of bond pads
- H10W72/9413—Dispositions of bond pads on encapsulations
-
- H—ELECTRICITY
- H10—SEMICONDUCTOR DEVICES; ELECTRIC SOLID-STATE DEVICES NOT OTHERWISE PROVIDED FOR
- H10W—GENERIC PACKAGES, INTERCONNECTIONS, CONNECTORS OR OTHER CONSTRUCTIONAL DETAILS OF DEVICES COVERED BY CLASS H10
- H10W74/00—Encapsulations, e.g. protective coatings
- H10W74/01—Manufacture or treatment
- H10W74/019—Manufacture or treatment using temporary auxiliary substrates
-
- H—ELECTRICITY
- H10—SEMICONDUCTOR DEVICES; ELECTRIC SOLID-STATE DEVICES NOT OTHERWISE PROVIDED FOR
- H10W—GENERIC PACKAGES, INTERCONNECTIONS, CONNECTORS OR OTHER CONSTRUCTIONAL DETAILS OF DEVICES COVERED BY CLASS H10
- H10W90/00—Package configurations
- H10W90/701—Package configurations characterised by the relative positions of pads or connectors relative to package parts
- H10W90/721—Package configurations characterised by the relative positions of pads or connectors relative to package parts of bump connectors
- H10W90/722—Package configurations characterised by the relative positions of pads or connectors relative to package parts of bump connectors between stacked chips
-
- H—ELECTRICITY
- H10—SEMICONDUCTOR DEVICES; ELECTRIC SOLID-STATE DEVICES NOT OTHERWISE PROVIDED FOR
- H10W—GENERIC PACKAGES, INTERCONNECTIONS, CONNECTORS OR OTHER CONSTRUCTIONAL DETAILS OF DEVICES COVERED BY CLASS H10
- H10W90/00—Package configurations
- H10W90/701—Package configurations characterised by the relative positions of pads or connectors relative to package parts
- H10W90/731—Package configurations characterised by the relative positions of pads or connectors relative to package parts of die-attach connectors
- H10W90/732—Package configurations characterised by the relative positions of pads or connectors relative to package parts of die-attach connectors between stacked chips
Landscapes
- Production Of Multi-Layered Print Wiring Board (AREA)
- Structures For Mounting Electric Components On Printed Circuit Boards (AREA)
Description
2 ベース基板
2a 埋め込み用孔
3 第1電子部品
3a 外部電極
4 第2電子部品
4a 外部電極
5 配線パターン
6 樹脂層
7 配線材料
8 剥離板
9 フィレット
41 上部樹脂層
42 配線パターン
43 接続ビア
Claims (3)
- ベース基板に外部電極を有する第1電子部品が埋め込まれていると共に、前記ベース基板に外部電極を有する第2電子部品が搭載されている部品内蔵型基板において、
前記第1電子部品の前記外部電極が前記第2電子部品の前記外部電極よりも大きな面積に設定されており、これら両外部電極どうしを直接重ねて導通させることにより、前記第1電子部品の前記外部電極の一部が前記第2電子部品の端面から露出するようにしたことを特徴とする部品内蔵型基板。 - 請求項1の記載において、前記ベース基板に埋め込み用孔が設けられており、前記第1電子部品は前記埋め込み用孔に充填された樹脂層の内部に埋め込まれていることを特徴とする部品内蔵型基板。
- 請求項1または2の記載において、前記第2電子部品は、前記第1電子部品の前記外部電極を接続ランドとして固着された外部電極と、前記ベース基板上の配線パターンを接続ランドとして固着された外部電極とを有していることを特徴とする部品内蔵型基板。
Priority Applications (1)
| Application Number | Priority Date | Filing Date | Title |
|---|---|---|---|
| JP2014025890A JP6316616B2 (ja) | 2014-02-13 | 2014-02-13 | 部品内蔵型基板 |
Applications Claiming Priority (1)
| Application Number | Priority Date | Filing Date | Title |
|---|---|---|---|
| JP2014025890A JP6316616B2 (ja) | 2014-02-13 | 2014-02-13 | 部品内蔵型基板 |
Publications (2)
| Publication Number | Publication Date |
|---|---|
| JP2015153886A JP2015153886A (ja) | 2015-08-24 |
| JP6316616B2 true JP6316616B2 (ja) | 2018-04-25 |
Family
ID=53895852
Family Applications (1)
| Application Number | Title | Priority Date | Filing Date |
|---|---|---|---|
| JP2014025890A Expired - Fee Related JP6316616B2 (ja) | 2014-02-13 | 2014-02-13 | 部品内蔵型基板 |
Country Status (1)
| Country | Link |
|---|---|
| JP (1) | JP6316616B2 (ja) |
Families Citing this family (1)
| Publication number | Priority date | Publication date | Assignee | Title |
|---|---|---|---|---|
| JP7661155B2 (ja) * | 2021-07-05 | 2025-04-14 | 三菱電機エンジニアリング株式会社 | プリント基板の製造方法 |
Family Cites Families (4)
| Publication number | Priority date | Publication date | Assignee | Title |
|---|---|---|---|---|
| JPH04304659A (ja) * | 1991-04-01 | 1992-10-28 | Nec Corp | 混成集積回路装置 |
| JPH0650383U (ja) * | 1992-12-02 | 1994-07-08 | 株式会社東芝 | プリント基板 |
| JPH09199824A (ja) * | 1995-11-16 | 1997-07-31 | Matsushita Electric Ind Co Ltd | プリント配線板とその実装体 |
| JP2001053447A (ja) * | 1999-08-05 | 2001-02-23 | Iwaki Denshi Kk | 部品内蔵型多層配線基板およびその製造方法 |
-
2014
- 2014-02-13 JP JP2014025890A patent/JP6316616B2/ja not_active Expired - Fee Related
Also Published As
| Publication number | Publication date |
|---|---|
| JP2015153886A (ja) | 2015-08-24 |
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