JP6357869B2 - 炭化珪素半導体装置の製造方法 - Google Patents
炭化珪素半導体装置の製造方法 Download PDFInfo
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- Electrodes Of Semiconductors (AREA)
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Description
最初に本発明の実施態様を列記して説明する。
[本発明の実施形態の詳細]
以下、本発明の実施の形態について図に基づいて説明する。なお、以下の図面において、同一または相当する部分には同一の参照番号を付し、その説明は繰り返さない。また、本明細書中の結晶学的記載においては、個別方位を[]、集合方位を<>、個別面を()、集合面を{}でそれぞれ示している。また結晶学上の指数が負であることは、通常、”−”(バー)を数字の上に付すことによって表現されるが、本明細書中では数字の前に負の符号を付している。
上述した「特殊面」について詳しく説明する。上述したように、側面SW(図3参照)は、特にベース領域13上において特殊面を有することが好ましい。以下、側面SWが特殊面を有する場合について説明する。
一般に、ポリタイプ4Hの炭化珪素単結晶を(000−1)面から見ると、図16に示すように、Si原子(またはC原子)は、A層の原子(図中の実線)と、この下に位置するB層の原子(図中の破線)と、この下に位置するC層の原子(図中の一点鎖線)と、この下に位置するB層の原子(図示せず)とが繰り返し設けられている。つまり4つの層ABCBを1周期としてABCBABCBABCB・・・のような周期的な積層構造が設けられている。
2 炭化珪素エピタキシャル層
10 炭化珪素基板
10a 第1の主面
10b 第2の主面
11 単結晶基板
12 ドリフト領域(第1不純物領域)
13 ベース領域(第2不純物領域)
13a 境界面
14 ソース領域(第3不純物領域)
15 ゲート酸化膜
16 ソース電極
18 コンタクト領域
19 ソース配線層
20 ドレイン電極
21 層間絶縁膜
27 ゲート電極
40 エッチングマスク
BT 底部
C1,C2 接点
CD チャネル方向
D1,D2 角度
EX 矢印
MC プロット群
S1 第1の面
S2 第2の面
SQ,SR 複合面
SW 側面
SW1 第1側面部
SW2 第2側面部
TQ 凹部
TR トレンチ
Claims (9)
- 主面を有する炭化珪素基板を準備する工程を備え、
前記炭化珪素基板は、第1導電型を有する第1不純物領域と、前記第1不純物領域上に設けられ前記第1導電型と異なる第2導電型を有する第2不純物領域と、前記第2不純物領域上に設けられ前記第1導電型を有し前記主面の少なくとも一部を構成する第3不純物領域とを含み、さらに、
前記炭化珪素基板の前記主面に、前記第3不純物領域および前記第2不純物領域を貫通して前記第1不純物領域に至る側面と、前記第1不純物領域に位置する底部とを有するトレンチを形成する工程とを備え、
前記側面は、前記主面と連接する第1側面部と、前記第1側面部と前記底部とを繋ぐ第2側面部とを有し、
前記第1側面部と前記第2側面部との接点は、前記第3不純物領域に位置し、
前記第1側面部と前記第2側面部との接点を通り、かつ前記主面と平行な直線と、前記第1側面部とが形成する角度は、前記第1不純物領域と前記第2不純物領域との境界面と、前記第2側面部とが形成する角度よりも小さく、さらに、
前記トレンチの前記第1側面部において前記第3不純物領域に接し、前記トレンチの前記第2側面部において前記第3不純物領域と前記第2不純物領域とに接し、かつ前記トレンチの前記底部において前記第1不純物領域に接するゲート酸化膜を形成する工程と、
前記ゲート酸化膜上に設けられたゲート電極と形成する工程とを備え、
前記主面と前記第1側面部との接点上の前記ゲート酸化膜の部分の厚みは、前記第2不純物領域上の前記ゲート酸化膜の部分の厚みよりも大きく、
前記トレンチを形成する工程は、塩素を含む第1ガスを用いて前記炭化珪素基板をエッチングする工程を含み、
前記炭化珪素基板をエッチングする工程は、前記第1ガスと、酸素、フッ素および水素の少なくともいずれかを含む第2ガスとを用いて前記炭化珪素基板をエッチングする第1工程と、
前記第1工程における前記第2ガスの流量よりも前記第2ガスの流量を減少させた後、前記第1ガスと、前記第2ガスとを用いて前記炭化珪素基板をエッチングする第2工程とを含む、炭化珪素半導体装置の製造方法。 - 前記ゲート酸化膜を形成する工程は、1300℃以下で前記炭化珪素基板を酸化する工程を含む、請求項1に記載の炭化珪素半導体装置の製造方法。
- 前記第1ガスは、塩素およびインターハロゲン化合物からなる群から選択される少なくともいずれかを含む、請求項1または請求項2に記載の炭化珪素半導体装置の製造方法。
- 前記第2工程において、前記第2ガスの導入を停止した後、前記第1ガスを用いて前記炭化珪素基板がエッチングされる、請求項1〜請求項3のいずれか1項に記載の炭化珪素半導体装置の製造方法。
- 前記第2ガスは、酸素、フッ素、水素、六フッ化硫黄、四フッ化炭素、塩化水素、一酸化塩素、二酸化塩素、一酸化二塩素および七酸化二塩素からなる群から選択される少なくともいずれかを含む、請求項1〜請求項4のいずれか1項に記載の炭化珪素半導体装置の製造方法。
- 前記トレンチを形成する工程は、700℃以上1000℃以下で前記炭化珪素基板をエッチングする工程を含む、請求項1〜請求項5のいずれか1項に記載の炭化珪素半導体装置の製造方法。
- 前記ゲート酸化膜を形成する工程後において、前記第1不純物領域と前記第2不純物領域との境界面と、前記第2側面部とが形成する角度は、50°以上65°以下である、請求項1〜請求項6のいずれか1項に記載の炭化珪素半導体装置の製造方法。
- 前記ゲート酸化膜を形成する工程後において、前記第1側面部と前記第2側面部との接点を通り、かつ前記主面と平行な直線と、前記第1側面部とが形成する角度は、20°以上50°未満である、請求項1〜請求項7のいずれか1項に記載の炭化珪素半導体装置の製造方法。
- 前記ゲート酸化膜を形成する工程後において、前記トレンチの前記底部上の前記ゲート酸化膜の部分の厚みは、前記第2不純物領域上の前記ゲート酸化膜の部分の厚みよりも大きい、請求項1〜請求項8のいずれか1項に記載の炭化珪素半導体装置の製造方法。
Priority Applications (4)
| Application Number | Priority Date | Filing Date | Title |
|---|---|---|---|
| JP2014104538A JP6357869B2 (ja) | 2014-05-20 | 2014-05-20 | 炭化珪素半導体装置の製造方法 |
| DE112015002342.9T DE112015002342B4 (de) | 2014-05-20 | 2015-04-09 | Verfahren zur Herstellung einer Siliziumkarbid-Halbleitervorrichtung |
| PCT/JP2015/061070 WO2015178120A1 (ja) | 2014-05-20 | 2015-04-09 | 炭化珪素半導体装置およびその製造方法 |
| US15/306,836 US10192967B2 (en) | 2014-05-20 | 2015-04-09 | Silicon carbide semiconductor with trench gate |
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| Country | Link |
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| US (1) | US10192967B2 (ja) |
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| Publication number | Priority date | Publication date | Assignee | Title |
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| JP6848317B2 (ja) * | 2016-10-05 | 2021-03-24 | 富士電機株式会社 | 半導体装置および半導体装置の製造方法 |
| WO2018088063A1 (ja) * | 2016-11-11 | 2018-05-17 | 住友電気工業株式会社 | 炭化珪素半導体装置 |
| DE112018003086B4 (de) * | 2017-11-13 | 2025-10-23 | Fuji Electric Co., Ltd. | Halbleitervorrichtung und verfahren zur herstellung einer halbleitervorrichtung |
| CN113838936B (zh) * | 2020-06-23 | 2025-10-17 | 意法半导体股份有限公司 | 具有改善短路性能的4H-SiC电子器件及其制造方法 |
| CN111785618A (zh) * | 2020-06-28 | 2020-10-16 | 上海华虹宏力半导体制造有限公司 | 沟槽栅结构的制作方法 |
| CN112530795A (zh) * | 2020-08-21 | 2021-03-19 | 中国工程物理研究院电子工程研究所 | 基于小角度深刻蚀工艺的碳化硅功率器件终端及制作方法 |
| JP2024069740A (ja) * | 2021-03-29 | 2024-05-22 | 住友電気工業株式会社 | 炭化珪素半導体装置 |
Family Cites Families (17)
| Publication number | Priority date | Publication date | Assignee | Title |
|---|---|---|---|---|
| JP3471473B2 (ja) * | 1994-04-06 | 2003-12-02 | 株式会社デンソー | 半導体装置及びその製造方法 |
| EP0676814B1 (en) * | 1994-04-06 | 2006-03-22 | Denso Corporation | Process of producing trench semiconductor device |
| JP4192281B2 (ja) * | 1997-11-28 | 2008-12-10 | 株式会社デンソー | 炭化珪素半導体装置 |
| JP2008311406A (ja) * | 2007-06-14 | 2008-12-25 | Toyota Motor Corp | 溝ゲート型SiC半導体装置の製造方法 |
| JP5556053B2 (ja) | 2009-04-27 | 2014-07-23 | 富士電機株式会社 | 炭化珪素半導体素子の製造方法 |
| JP5075280B2 (ja) * | 2009-10-23 | 2012-11-21 | パナソニック株式会社 | 半導体装置およびその製造方法 |
| JP5510309B2 (ja) * | 2010-12-22 | 2014-06-04 | 株式会社デンソー | 炭化珪素半導体装置およびその製造方法 |
| JP5668576B2 (ja) * | 2011-04-01 | 2015-02-12 | 住友電気工業株式会社 | 炭化珪素半導体装置 |
| JP5879770B2 (ja) * | 2011-06-27 | 2016-03-08 | 住友電気工業株式会社 | 半導体装置およびその製造方法 |
| JP5894383B2 (ja) | 2011-06-30 | 2016-03-30 | ローム株式会社 | 半導体装置およびその製造方法 |
| JP5834801B2 (ja) * | 2011-11-16 | 2015-12-24 | 住友電気工業株式会社 | 半導体装置の製造方法および半導体装置 |
| JP5806600B2 (ja) * | 2011-11-21 | 2015-11-10 | 住友電気工業株式会社 | 炭化珪素半導体装置の製造方法 |
| WO2013076890A1 (ja) * | 2011-11-21 | 2013-05-30 | パナソニック株式会社 | 半導体装置及びその製造方法 |
| JP2013175593A (ja) * | 2012-02-24 | 2013-09-05 | Rohm Co Ltd | 半導体装置およびその製造方法 |
| JP2013232533A (ja) * | 2012-04-27 | 2013-11-14 | Rohm Co Ltd | 半導体装置および半導体装置の製造方法 |
| JP2014007310A (ja) * | 2012-06-26 | 2014-01-16 | Sumitomo Electric Ind Ltd | 炭化珪素半導体装置の製造方法および炭化珪素半導体装置 |
| JP2014056882A (ja) * | 2012-09-11 | 2014-03-27 | Sumitomo Electric Ind Ltd | 炭化珪素半導体装置およびその製造方法 |
-
2014
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2015
- 2015-04-09 WO PCT/JP2015/061070 patent/WO2015178120A1/ja not_active Ceased
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| Publication number | Publication date |
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| US10192967B2 (en) | 2019-01-29 |
| DE112015002342T5 (de) | 2017-02-16 |
| DE112015002342B4 (de) | 2022-11-10 |
| US20170047415A1 (en) | 2017-02-16 |
| JP2015220407A (ja) | 2015-12-07 |
| WO2015178120A1 (ja) | 2015-11-26 |
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