JP6426255B2 - Gaming machine - Google Patents

Description

  The present invention relates to a gaming machine such as a pachislot machine.

  Conventionally, it is detected that a player operates a start lever by inserting a plurality of reels on each surface of which a plurality of symbols are arranged, game medals, coins and the like (hereinafter referred to as "game media"), It detects that the player has pressed the start switch requesting the start of rotation of the plurality of reels and the stop button provided corresponding to each of the plurality of reels, and requests to stop the rotation of the corresponding reel A stepping motor for outputting a signal, a stepping motor provided corresponding to each of a plurality of reels and transmitting the respective driving force to each reel, and a stepping motor based on a signal outputted by the start switch and the stop switch Control of the movement of the reels and a reel control unit for rotating and stopping each reel, and the start lever is operated. When it is detected, the lottery is performed based on the random number value, and the rotation of the reel is stopped based on the result of this lottery (hereinafter referred to as "internal winning combination") and the timing when the stop button is detected to be operated. A so-called pachislot gaming machine is known.

  As a game machine of this type, a game machine is proposed in Patent Document 1 that provides movable goods and effects by operating the goods.

JP, 2010-220889, A

  However, in such a conventional game machine, there is a problem that an error in control of the operation of the movable portion may cause an inconsistency in the cooperation of the operation of the movable portion and the movable portion can not operate normally. The

  The present invention provides a gaming machine capable of preventing the movable unit from being unable to operate normally even when there is an error in the control of the operation of the movable unit, causing a mismatch in linkage of the operation of the movable unit. The purpose is

A game machine according to the present invention comprises a movable portion (shutter device 200), a drive portion (lifting motors 240A and 240B, a rotary motor 231) for driving the movable portion, and the drive portion to achieve the above object. A control unit (sub control circuit 101) capable of controlling the operation mode of the movable unit by control, and detection means capable of detecting that the movable unit is at a predetermined position (origin sensor 270, descent sensor 271 and rotation A storage unit (the shutter operation data Y1 to Y8 (see FIGS. 72 to 79)) for operating the movable unit. Sub RAM 104), a consistency table (sub ROM 103, shutter operation combination determination table (see FIG. 80)) for securing the consistency of the operation of the movable portion, and the storage means A determination unit (sub CPU 102) capable of determining operation sequence data based on the previous operation data to be stored, the current operation data, and the consistency table; The operation control of the movable unit is performed based on the operation sequence data, and when the operation control of the movable unit is performed based on the operation sequence data, the movement of the movable unit is performed based on the detection condition of the detection unit. If it is determined that an abnormality has occurred, the movable unit is caused to execute the operation registered in advance, and the detection result of the detection means indicates that the movable unit is correctly executing the operation registered in advance. There line operation confirmed (shutter activation test process) of confirming, if the operation check result is normal, the actual process of moving the movable portion to a predetermined standby position It has a configuration that allows.

  With this configuration, the gaming machine according to the present invention prevents an incoherence in coordination of the operation of the movable portion and the inability of the movable portion to operate normally even if there is an error in the control of the operation of the movable portion be able to.

  According to the present invention, even if there is an error in the control of the operation of the movable portion, it is possible to prevent a mismatch in the linkage of the operation of the movable portion and prevent the movable portion from being unable to operate normally. Can be provided.

It is a figure showing a functional flow of a pachislot machine concerning an embodiment of the invention. BRIEF DESCRIPTION OF THE DRAWINGS It is a whole perspective view which shows the external structure of the pachi-slot machine which concerns on embodiment of this invention. It is a block diagram which shows the electric constitution of the pachi-slot machine which concerns on embodiment of this invention. It is a block diagram showing composition of a main control circuit of a pachislot machine concerning an embodiment of the invention. It is a block diagram showing composition of a sub control circuit of a pachislot machine concerning an embodiment of the invention. It is a rear view of the shutter apparatus of the pachi-slot machine which concerns on embodiment of this invention. It is AA sectional drawing in FIG. It is a front view which shows the state which accommodated the shutter member of the shutter apparatus of the pachi-slot machine which concerns on embodiment of this invention. It is a front view when the shutter member which concerns on embodiment of this invention exists in the shielding state (surface). It is a front view when the shutter member which concerns on embodiment of this invention exists in a half-opened state. It is a front view when the shutter member which concerns on embodiment of this invention exists in the shielding state (back surface). FIG. 1 is a perspective view of a shutter device according to an embodiment of the present invention. It is RT gaming state transition transition diagram in the pachislot machine which relates to the form of execution of this invention. It is a figure which shows the symbol arrangement | positioning table memorize | stored in main ROM. It is a figure showing the symbol code chart in the pachislot machine concerning the embodiment of the present invention. It is a figure which shows the symbol combination table memorize | stored in main ROM. It is a figure which shows the symbol combination table following FIG. It is a figure which shows the combination table classified by flag memorize | stored in main ROM. It is a figure which shows the combination table classified by flag following FIG. It is a figure which shows the internal lottery table (RT0 gaming state) memorize | stored in main ROM. It is a figure which shows the internal lottery table (RT1 game state) memorize | stored in main ROM. It is a figure which shows the internal lottery table (RT2 game state) memorize | stored in main ROM. It is a figure which shows the internal lottery table (RT3 gaming state) memorize | stored in main ROM. It is a figure which shows the internal lottery table (RT4 gaming state) memorize | stored in main ROM. It is a figure which shows the internal lottery table (RT5 gaming state) memorize | stored in main ROM. It is a figure which shows the internal lottery table (CB_RT0 game state in MB) memorize | stored in main ROM. It is a figure which shows the internal lottery table (CB_RT1 game state in MB) memorize | stored in main ROM. It is a figure which shows the internal lottery table (CB_RT2 game state in MB) memorize | stored in main ROM. It is a figure which shows the internal lottery table (CB_RT3 gaming state in MB) memorize | stored in main ROM. It is a figure which shows the internal lottery table (CB_RT4 game state in MB) memorize | stored in main ROM. It is a figure which shows the internal lottery table (CB_RT5 game state in MB) memorize | stored in main ROM. It is a figure which shows the rotation stop initialization table memorize | stored in main ROM. It is a figure which shows the drawing-in priority table memorize | stored in main ROM. It is a figure which shows the drawing-in priority selection table memorize | stored in main ROM. It is a figure which shows the 1st cylinder stop data table memorize | stored in main ROM. It is a figure which shows the search order table 00 memorize | stored in main ROM. It is a figure which shows the search order table 01 memorize | stored in main ROM. It is a figure which shows the symbol corresponding | compatible prize operation flag data table memorize | stored in main ROM. It is a figure which shows the out-of-reel action lottery table memorize | stored in main ROM. It is a figure which shows the out-of-reel action state transition lottery table stored in the main ROM for each mode. It is a figure which shows the special counter addition lottery table memorize | stored in main ROM. It is a figure which shows the modification of a special counter addition lottery table. It is a figure which shows the discharge | emission lottery table memorize | stored in main ROM. It is a figure which shows the modification of a discharge | emission lottery table. It is a figure which shows the internal winning combination storing area allocated to main RAM. It is a figure which shows the display combination storing area allocated to main RAM. It is a figure which shows the symbol code storage area allocated to main RAM. It is a figure which shows the carry over combination storage area allocated to main RAM. It is a figure which shows the game state flag storage area allocated to main RAM. It is a figure which shows the operation | movement stop button storage area allocated to main RAM. It is a figure which shows the pressing order storage area allocated to main RAM. It is a figure which shows the drawing-in priority data storage area allocated to main RAM. It is a figure which shows the sub determination combination number table referred by sub CPU. It is a figure which shows the sub determination combination identification table referred by sub CPU. It is a figure showing the number-of-games addition lottery table referred by sub CPU. It is a figure which shows the additional selection payment table referred by sub CPU. It is a figure which shows the ART first-hit-time addition selection lottery table referred by sub CPU. It is a figure which shows the ART addition selection random-selection table referred by sub CPU. FIG. 61 is a view following the FIG. 58, illustrating an ART addition selection / lottery table. It is a figure which shows the normal addition selection random-selection table referred by sub CPU. FIG. 61 is a diagram showing a normal addition selection lottery table following FIG. 60; It is a figure which shows the special function activation lottery table referred by sub CPU. It is a figure which shows the crushing number random-selection table referred by sub CPU. It is a figure which shows the additional selection continuation rate random determination table referred by sub CPU. It is a figure which shows the addition selection continuation rate random determination table following FIG. It is a figure which shows the addition selection continuation state lottery table referred by sub CPU. It is a figure which shows the additional selection payment lottery table referred by sub CPU. It is a figure which shows the addition game lottery table referred by sub CPU. It is a figure which shows the ART direct hit lottery table referred by sub CPU. It is a figure which shows the ART addition game direct matching random selection table referred by sub CPU. It is a figure which shows the step up sequence table referred by sub CPU. It is a figure which shows the shutter operation | movement sequence table corresponding to shutter operation data Y1 referred by sub CPU. It is a figure which shows the shutter operation | movement sequence table corresponding to shutter operation data Y2 referred by sub CPU. It is a figure which shows the shutter operation | movement sequence table corresponding to shutter operation data Y3 referred by sub CPU. It is a figure which shows the shutter operation | movement sequence table corresponding to shutter operation data Y4 referred by sub CPU. It is a figure which shows the shutter operation | movement sequence table corresponding to shutter operation data Y5 referred by sub CPU. It is a figure which shows the shutter operation | movement sequence table corresponding to shutter operation data Y6 referred by sub CPU. It is a figure which shows the shutter operation | movement sequence table corresponding to shutter operation data Y7 referred by sub CPU. It is a figure which shows the shutter operation | movement sequence table corresponding to shutter operation data Y8 referred by sub CPU. It is a figure which shows the shutter operation combination determination table referred by sub CPU. It is a figure which shows an example of the shutter operation | movement sequence storage area allocated to sub RAM. It is a figure which shows the internal award-winning group table for penalty determination referred by sub CPU. It is a figure which shows the error management area | region allocation table referred by sub CPU. It is a flow chart which shows main control processing of a pachislot machine concerning an embodiment of the invention. It is a flowchart which shows the processing at the time of the power activation performed in the main control processing shown in FIG. It is a flowchart which shows the medal reception / start check process performed in the main control process shown in FIG. It is a flowchart which shows the automatic insertion process performed in the medal reception / start check process shown in FIG. FIG. 85 is a flowchart showing an internal lottery process performed in the main control process shown in FIG. 84. It is a flowchart which shows the special counter process performed in the main control process shown in FIG. FIG. 85 is a flowchart showing a reel stop initial setting process executed in the main control process shown in FIG. 84. FIG. FIG. 85 is a flowchart showing a leading priority storage process executed in the main control process shown in FIG. 84 and the reel stop control process shown in FIG. 94; 91 is a flowchart showing a withdrawal priority order table selection process performed in the withdrawal priority order storage process shown in FIG. 91. FIG. 91 is a flowchart showing symbol code storage processing executed in the retraction priority storage processing shown in FIG. 91 and the reel stop control processing shown in FIG. 94; It is a flowchart which shows the reel stop control processing performed in the main control processing shown in FIG. It is a flowchart which shows the bonus end check process performed in the main control process shown in FIG. It is a flowchart which shows the bonus operation check process performed in the main control process shown in FIG. It is a flowchart which shows the interruption processing by control of main CPU which comprises the pachislot machine which concerns on embodiment of this invention. It is a flowchart which shows the input port check process performed in the interruption process shown in FIG. It is a flowchart which shows the data transmission process performed in the interruption process shown in FIG. 100 A flowchart showing a no-operation command communication data storage process performed in the data transmission process shown in FIG. 99. It is a flowchart which shows the power activation process of sub CPU which comprises the pachislot machine which concerns on embodiment of this invention. It is a flowchart which shows the lamp | ramp control task started in the power-on process shown in FIG. FIG. 102 is a flowchart showing a sound control task activated in the power-on process shown in FIG. 101. FIG. 102 is a flowchart showing a shutter control task activated in the power-on process shown in FIG. 101. FIG. 105 is a flowchart showing shutter effect reconstruction processing executed in the shutter control task shown in FIG. 104. FIG. It is a flowchart which shows the shutter control processing performed in the shutter control task shown in FIG. FIG. 102 is a flowchart showing a main task activated in the power on process shown in FIG. 101. It is a flowchart which shows the error generation monitoring process performed in the main task shown in FIG. It is a flowchart which shows the error cancellation monitoring processing performed in the main task shown in FIG. It is a flowchart which shows the main board | substrate communication task started in the power-on process shown in FIG. 110 is a flowchart showing command analysis processing executed in the main board communication task shown in FIG. 110. It is a flowchart which shows the animation task started in the power-on process shown in FIG. It is a flowchart which shows the command consistency determination process performed in the command analysis process shown in FIG. It is a flowchart which shows the effect content determination processing performed in the command analysis processing shown in FIG. It is a flowchart which shows the process at the time of start command reception performed in the effect content determination process shown in FIG. It is a flowchart which shows the fail safe process performed in the process at the time of start command reception shown in FIG. 115 is a flowchart showing a first gaming state-specific lottery process executed in the start command reception process shown in FIG. 115 is a flowchart showing a lock occurrence generation setting process executed in the start command reception process shown in FIG. 115; FIG. 115 is a flow chart showing a winning operation command reception process executed in the effect content determination process shown in FIG. 114; FIG. It is a flowchart which shows the penalty setting process performed in the process at the time of prize operation command reception shown in FIG. 119 is a flowchart showing a second gaming state-specific lottery process executed in the process for receiving a winning operation command shown in FIG. 119. 115 is a flowchart showing an error command reception process executed in the effect content determination process shown in FIG. 114; 115 is a flowchart showing a no-operation command reception process executed in the effect content determination process shown in FIG. 114; 123 is a flowchart showing step-up effect sequence state transition processing executed in the no-operation command reception processing shown in FIG. 123; 124 is a flowchart showing a special step-up process executed in the step-up effect sequence state transition process shown in FIG. 124. 125 is a flowchart showing step-up effect registration processing executed in the step-up effect sequence state transition process shown in FIG. 124 and the special step-up process shown in FIG. 125; It is a flowchart which shows the power failure detection process performed when it is detected that power supply was cut off by sub CPU. FIG. 102 is a flowchart showing a power failure return process executed in the power on process shown in FIG. 101; 117 is a flowchart showing a first general middle lottery process executed in the first gaming state-specific lottery process shown in FIG. 117. 130 is a flowchart showing a general middle first game lottery process executed in the first general middle lottery process shown in FIG. 129; FIG. 129 is a flow chart showing an ART additional selected stock lottery process executed in the first general middle lottery process shown in FIG. 129; FIG. 130 is a flowchart showing ART direct hit lottery processing executed in the first general middle lottery processing shown in FIG. 129; 117 is a flowchart showing a second general middle lottery process executed in the first gaming state-specific lottery process shown in FIG. 117. 121 is a flowchart showing a third general middle lottery process executed in the second gaming state-specific lottery process shown in FIG. 121. FIG. 117 is a flowchart showing a lottery processing during a first ART high probability performed in the first gaming state-specific lottery processing shown in FIG. 117. It is a flowchart which shows the 1st ART high probability inside lottery processing following FIG. FIG. 117 is a flowchart showing a lottery process during the second ART high probability performed in the first gaming state specific lottery process shown in FIG. 117. 121 is a flowchart showing a third ART high probability random selection process executed in the second gaming state-specific lottery process shown in FIG. 121. FIG. 117 is a flow chart showing a lottery process under preparation for the first ART performed in the first gaming state type lottery process shown in FIG. 117. FIG. 121 is a flowchart showing a second ART-in-provision lottery process executed in the second gaming state-specific lottery process shown in FIG. 121; FIG. 117 is a flowchart showing a lottery processing during the first ART executed in the first gaming state-specific lottery processing shown in FIG. 117. FIG. 141 is a flowchart showing a lottery processing during the first ART, following FIG. 141; FIG. 121 is a flow chart showing a lottery process in the second ART executed in the second gaming state-specific lottery process shown in FIG. 121. 117 is a flowchart showing lottery processing during first additional selection which is executed in the first gaming state-specific lottery processing shown in FIG. 117. FIG. 144 is a flowchart illustrating a lottery process during first additional selection, following FIG. 144; 117 is a flowchart showing lottery processing during second additional selection which is executed in the first gaming state-specific lottery processing shown in FIG. 117. FIG. 124 is a flowchart showing a lottery process during fourth additional selection which is executed in the no-operation command reception process shown in FIG. 123; FIG. 147 is a flowchart showing a fourth additional selection random determination process following FIG. 147; FIG. 140 is a flowchart showing first lock generation game state transition processing executed in the second general middle lottery processing shown in FIG. 133; FIG. FIG. 134 is a flowchart showing second lock generation game state transition processing executed in the third general middle lottery processing shown in FIG. 134 and the third ART high probability middle lottery processing shown in FIG. 138. 137 is a flowchart showing first game state ART middle transition processing which is executed in the second ART high probability middle lottery processing shown in FIG. 137. FIG. 134 is a flowchart showing transition processing during a second gaming state ART executed in the third general middle lottery processing shown in FIG. 134 and the third ART high probability middle lottery processing shown in FIG. 138. FIG. 137 is a flow chart showing a game state general medium transition process executed in the lottery process during the second ART high probability shown in FIG. 137. FIG. 136 is a flowchart showing a first normal addition selection random determination process executed in the first ART high probability internal lottery process shown in FIGS. 135 and 136. FIG. 133 is a flowchart showing a second general additional selection lottery process executed in the second general middle lottery process shown in FIG. 133 and the first gaming state ART middle transition process shown in FIG. 151. FIG. 140 is a flow chart showing a lottery processing directly attached to the number of ART games executed in the first ART preparation lottery processing shown in FIG. 139 and the first ART lottery processing shown in FIGS. 141 and 142. FIG. FIG. 141 is a flowchart showing an additional game stock lottery process executed in the first ART lottery shown in FIGS. 141 and 142 and the first additional selection selection lottery process shown in FIGS. 144 and 145; FIG. FIG. 117 is a flowchart showing lottery processing during normal return waiting executed in the first gaming state-specific lottery processing shown in FIG. 117. FIG. 117 is a flow chart showing a modification of lottery processing during additional game, which is executed in the first gaming state-specific lottery processing shown in FIG. 117. FIG. FIG. 160 is a flowchart showing a lottery process during an additional game, following FIG. 159; FIG. 160 is a diagram showing an addition counter lottery table referred to by the sub CPU in the variation of the lottery processing during addition gaming shown in FIGS. 159 and 160. It is a figure which shows the example of a display of the selection game screen displayed on a liquid crystal display device based on the addition selection payout table shown in FIG. FIG. 50 is a diagram showing a display example when it is possible to identify only a part of the elements on the selected game screen displayed on the liquid crystal display device based on the additional selection payout table shown in FIG. 49. FIG. 50 is a view showing a display example when all of the elements on the selected game screen displayed on the liquid crystal display device can be identified based on the additional payment selected table shown in FIG. 49. It is a figure which shows the example of a display of the result after one of the elements on the selection game screen displayed on the liquid crystal display device was selected. It is a figure which shows the example of a display of the error screen showing the error which generate | occur | produced in the pachislot machine which concerns on embodiment of this invention. It is a figure which shows the example of a display of the error information log | history screen showing the log | history of the error which generate | occur | produced in the pachislot machine which concerns on embodiment of this invention.

  A pachi-slot machine which is a gaming machine showing an embodiment of the present invention will be described with reference to FIGS. First, with reference to FIG. 1, a functional flow according to the embodiment of the gaming machine will be described.

  In the pachislot machine of the present embodiment, medals are used as game media for playing a game. In addition to the medals, coins, gaming balls, point data or tokens for gaming may be applied as gaming media.

  When medals are inserted by the player and the start lever is operated, one value (hereinafter, random number value) is extracted from random numbers in a predetermined numerical value range (for example, 0 to 65535).

  The internal lottery means performs lottery based on the extracted random number value to determine an internal winning combination. The internal lottery means is carried by a main control circuit described later. By the determination of the internal winning combination, a combination of symbols permitting display along the later-described winning determination line is determined. In addition, as a classification of combination of the symbol, it is something which relates to the “prize” to which the player is given a privilege such as payout of medals, operation of replay, activation of bonus, etc. Is provided.

  In addition, when the start lever is operated, rotation of the plurality of reels is performed. Thereafter, when the player presses the stop button corresponding to the predetermined reel, the reel stop control means performs control to stop the rotation of the corresponding reel based on the internal winning combination and the timing when the stop button is pressed. Do. The reel stop control means is responsible for the main CPU that executes reel stop control processing described later.

  In the pachi-slot machine, basically, control is performed to stop the rotation of the corresponding reel within a specified time (190 msec or 75 msec) after the stop button is pressed. In the present embodiment, the number of symbols moving with the rotation of the reel within this prescribed time is referred to as the “number of sliding symbols”. If the prescribed time is 190 msec, the maximum number of sliding symbols is determined to be four symbols, and if the prescribed time is 75 msec, the maximum number of sliding symbols is determined to one symbol.

  When an internal winning combination that permits combination display of symbols relating to winning is determined, the reel stop control means normally determines that a combination of symbols has a winning determination line within a prescribed time of 190 msec (for four symbols of symbols). Stop the rotation of the reel so that it is displayed as much as possible. In addition, the reel stop control means specifies, for example, for one or more reels, at the time of operation of a bonus bonus (CB) which is a second kind special character and a middle bonus (MB) for operating CB continuously. The rotation of the reel is stopped so that the combination of the symbols is displayed as much as possible along the winning determination line within a time of 75 msec (for one symbol). Furthermore, the reel stop control means uses various prescribed times corresponding to the game state to rotate the reel so that the combination of symbols whose display is not permitted by the internal winning combination is not displayed along the winning determination line. Stop it.

  Thus, when the rotations of the plurality of reels are all stopped, the prize determination means determines whether or not the combination of the symbols displayed along the prize determination line relates to a prize. The winning determination means is responsible for the main CPU that executes a winning search process described later. When it is determined by the winning determination means that the winning is determined, a bonus such as medal payout is given to the player. In the pachislot machine, the above series of flows are performed as one game.

  Further, in the pachislot machine, in the above-described series of flows, display of an image performed by an image display device such as a liquid crystal display device, output of light performed by various lamps, output of sound performed by a speaker, drive of a shutter by a shutter device A variety of renditions can be made using these or a combination of these.

  When the start lever is operated, a random number for presentation (hereinafter, random number for presentation) is extracted separately from the random number used to determine the internal winning combination described above. When the effect random number value is extracted, the effect content determination means determines by lottery the one to be executed this time out of a plurality of types of effect content associated with the internal winning combination. The effect content determination means is carried by a sub control circuit described later.

  When the contents of the effect are determined, the effect executing means interlocks with respective triggers such as the start of the rotation of the reels, the stop of the rotations of the respective reels, the determination of the presence or absence of a prize, etc. As described above, in the pachislot machine, the player has an opportunity or opportunity to know the determined internal winning combination (in other words, a combination of the symbols to be aimed) by executing the presentation content corresponding to the internal winning combination. Thus, the player's interest can be improved.

<Structure of pachislot machine>
Next, with reference to FIG. 2, an appearance structure of the pachi-slot machine in the present embodiment will be described.

[Appearance structure]
FIG. 2 is a perspective view showing the external structure of the pachi-slot machine 1.

  As shown in FIG. 2, the pachi-slot machine 1 is provided with an exterior body 2. The exterior body 2 has a cabinet 2a as a housing for accommodating a reel, a circuit board and the like, and a front door 2b attached to the cabinet 2a so as to be openable and closable. Handles 2c are provided on both side surfaces of the cabinet 2a (in FIG. 2, only the handle 2c on one side is shown). The handle 2 c is a recess to which the pachi-slot machine 1 is transported.

  A plurality of (for example, 21 pieces) symbols are displayed inside the cabinet 2a at predetermined intervals along the circumferential direction, and a plurality of (three in the present embodiment) reels 3L, 3C, 3R (FIG. 3) Reference) is housed.

  Hereinafter, the reels 3L, 3C, and 3R are referred to as a left reel 3L, a middle reel 3C, and a right reel 3R, respectively. Each of the reels 3L, 3C, 3R has a cylindrical reel body and a translucent sheet material mounted on the peripheral surface of the reel body. The above-mentioned plural (for example, 21) designs are drawn on the surface of the above-mentioned sheet material.

  The front door 2 b includes a door body 9 and a liquid crystal display device 11 as an image display means for displaying an image. The door body 9 is attached to the cabinet 2a so as to be openable and closable using a hinge (not shown). The hinge is provided at the left end of the door body 9 when the door body 9 is viewed from the front of the pachi-slot machine 1.

  The liquid crystal display device 11 is attached to an upper portion of the door main body 9 of the front door 2b so as to display, for example, an image relating to a game effect and information on the game. The liquid crystal display device 11 can display effects such as customization of a gaming machine and gaming machine information such as a gaming history, in addition to executing effects by displaying a video.

  Moreover, the front door 2b has the display window 4 which can make three reels 3L, 3C, 3R visually recognize. The display window 4 is composed of three left display windows 4L, middle display windows 4C, and right display windows 4R corresponding to the three reels 3L, 3C, 3R.

  The display windows 4L, 4C, 4R are provided at positions overlapping the arrangement areas of the three reels 3L, 3C, 3R when viewed from the front (player side), and in front of the three reels (player side Provided to be located at Therefore, the player can visually recognize the three reels 3L, 3C, 3R provided behind the display window 4 through the display windows 4L, 4C, 4R.

  In the present embodiment, the display windows 4L, 4C, 4R are arranged in series among the plurality of types of symbols drawn on each reel when the rotation of the corresponding reel provided behind them is stopped. It is set to a size that can display one pattern. That is, in the frame of the display windows 4L, 4C, 4R, upper, middle and lower areas are provided for each reel, and one symbol is displayed in each area. In the present embodiment, a line connecting the middle region of the left reel 3L, the middle region of the middle reel 3C, and the middle region of the right reel 3R is defined as a winning determination line for determining whether or not a winning is to be made.

  In addition, a protective glass 6 is disposed on the front side of the above-described reels 3L, 3C, 3R and the liquid crystal display device 11. As a result, the player can not directly touch the reels 3L, 3C, 3R and the liquid crystal display device 11.

  Further, a decorative member 7 is attached to an upper portion on the front side of the door body 9 so as to surround the protective glass 6. The decorative member 7 constitutes a part of the exterior of the pachi-slot machine 1 and includes an upper exterior member 7a, a pair of side exterior members 7b and a lower exterior member 7c.

  In particular, the upper exterior member 7 a is disposed above the liquid crystal display device 11 and in front of the shutter device 200 described later. Further, a pair of eyes 701 is formed in the upper exterior member 7a. The pair of eyes 701 is formed of a translucent member, and LEDs (not shown) included in the LED group 25 described later are disposed on the back side. Therefore, the pair of eyes 701 is configured to be lighted as necessary. Note that the LEDs for lighting the pair of eyes 701 are multicolor LEDs capable of emitting a plurality of colors. The upper exterior member 7a constitutes an exterior member.

  A pedestal 12 is formed at the center of the door body 9. The pedestal 12 includes various devices to be operated by the player (the medal insertion slot 13, the MAX bet button 14, the 1 bet button 15, the start lever 16, the stop buttons 17L, 17C, 17R, the selection button 18, the determination button 19) is provided.

  The medal insertion slot 13 is provided to receive medals dropped from the outside onto the pachi-slot machine 1 by the player. That is, the medal insertion slot 13 is for the player to insert a medal. The medal inserted from the medal insertion slot 13 is used for one game with the preset number (for example, 3) as the upper limit, and the portion exceeding the preset number is deposited inside the pachislot machine 1 Can (so-called credit function).

  The MAX bet button 14 and the 1 bet button 15 are provided to determine the number of medals to be used for one game from the medals deposited inside the pachislot machine 1. Although not shown in FIG. 2, the pedestal 12 is provided with a settlement button. The settlement button is provided to pull out (discharge) the medals deposited inside the pachislot machine 1.

  The start lever 16 is for starting rotation of all the reels (3L, 3C, 3R) according to the operation of the player, and constitutes start operation means.

  The stop buttons 17L, 17C, and 17R are provided in association with the left reel 3L, the middle reel 3C, and the right reel 3R, respectively, and are for stopping the rotation of the corresponding reels according to the player's operation. . The stop buttons 17L, 17C, 17R constitute stop operation means.

  Further, these stop buttons 17L, 17C, 17R are used when performing an operation related to information displayed on the liquid crystal display device 11. For example, when performing a selection operation on the display screen of the liquid crystal display device 11. Used for Hereinafter, the stop buttons 17L, 17C, and 17R are referred to as a left stop button 17L, a middle stop button 17C, and a right stop button 17R, respectively.

  The selection button 18 and the determination button 19 are used when performing various operations on the display screen of the liquid crystal display device 11.

  Further, the pedestal 12 is provided with a 7-segment display 28 formed of a 7-segment LED (Light Emitting Diode). The 7-segment display 28 has information such as the number of medals paid out to the player as a bonus (hereinafter referred to as the number of paid out), the number of medals deposited inside the pachislot machine 1 (hereinafter referred to as the number of credits) Display digitally.

  At the lower part of the door main body 9, a medal payout port 21, a medal receiving tray 22, speakers 23L, 23R and the like are provided. The medal payout opening 21 guides a medal discharged by the driving of a hopper device 43 described later to the outside. The medal receiver 22 stores the medals discharged from the medal payout opening 21. The speakers 23L and 23R output sounds such as sound effects and music corresponding to the contents of the effects.

  Furthermore, the pachi-slot machine 1 is provided with a lock mechanism that switches the front door 2b to the locked state or the unlocked state in a state where the front door 2b is closed. The lock mechanism is operated by inserting the door key 24 into the door key hole 1 c and rotating the door key 24.

  The door key 24 is inserted into the door key hole 1c and, for example, the front door 2b can be opened and closed by being turned right and the main control circuit 91 etc. is reset electrically or programmatically by being turned left. It is supposed to be. That is, the door key 24 has a reset function of resetting the pachi-slot machine 1 electrically or programmatically, in addition to the operation of the lock mechanism.

<Electric configuration of pachislot machine>
Next, the electrical configuration of the pachislot machine 1 will be described with reference to FIG. FIG. 3 is a block diagram showing the electrical configuration of the pachi-slot machine 1.

  As shown in FIG. 3, the pachislot machine 1 has a main control board 41 disposed in the cabinet 2a and a sub control board 42 disposed in the front door 2b. The main relay board 41 is electrically connected to the reel relay terminal board 51, the setting key type switch 52, the cabinet side relay board 53, the door relay terminal board 54, and the power supply board 44b of the power supply device 44. ing.

  The reel relay terminal plate 51 is disposed inside the reel bodies of the respective reels 3L, 3C, 3R. The reel relay terminal board 51 is electrically connected to the stepping motors 51L, 51C and 51R of the respective reels 3L, 3C and 3R, and the signals outputted from the main control board 41 to the stepping motors 51L, 51C and 51R are Relay. The setting key type switch 52 is used when changing the setting of the pachi-slot machine 1 or confirming the setting of the pachi-slot machine 1. The stepping motors 51L, 51C, 51R constitute symbol variation means.

  An external concentrated terminal plate 56, a hopper device 43, and a medal auxiliary storage switch 57 are electrically connected to the cabinet side relay board 53. The cabinet side relay board 53 relays a signal output from the main control board 41 to the external concentrated terminal plate 56, the hopper device 43 and the medal auxiliary storage switch 57. That is, the external concentrated terminal board 56, the hopper device 43, and the medal auxiliary storage switch 57 are connected to the main control board 41 via the cabinet side relay board 53.

  The external concentrated terminal plate 56 is attached to the cabinet 2 a and provided for outputting signals such as a medal insertion signal, a medal payout signal and a security signal to the outside of the pachi-slot machine 1.

  The medal auxiliary storage switch 57 penetrates a medal auxiliary storage (not shown). The medal auxiliary storage switch 57 detects whether the medal auxiliary storage is full of medals.

  A power switch 44 a is connected to the power supply substrate 44 b of the power supply device 44. The power switch 44a is turned on when the necessary power is supplied to the pachi-slot machine 1.

  In the door relay terminal board 54, the medal sensor 46, the door open / close monitoring switch 61, the BET switch 62, the settlement switch 63, the start switch 64, the stop switch board 65, the game operation display board 66, the selection switch 67, the determination switch 68, the door key The switch 24S (punching release switch) and the sub relay board 69 are connected. That is, the medal sensor 46, the door open / close monitoring switch 61, the BET switch 62, the settlement switch 63, the start switch 64, the stop switch board 65, the game operation display board 66, the selection switch 67, the determination switch 68, the door key switch 24S And the sub relay board 69 are connected to the main control board 41 through the door relay terminal board 54, and the selection switch 67 and the decision switch are connected to the sub control board 42 through the door relay terminal board 54 and the sub relay board 69. It is connected.

  The medal sensor 46 detects that the medal has passed through a selector (not shown), and outputs the detection result to the main control board 41. The door opening and closing monitoring switch 61 outputs a security signal for notifying the opening and closing of the front door 2 b to the outside of the pachi-slot machine 1. The BET switch 62 detects that the MAX bet button 14 and the 1 bet button 15 (see FIG. 2) are pressed by the player, and outputs the detection result to the main control board 41.

  The settlement switch 63 detects that the settlement button (not shown) has been pressed by the player, and outputs the detection result to the main control board 41. The start switch 64 detects that the player has operated the start lever 16 (start operation), and outputs the detection result to the main control board 41.

  The stop switch board 65 is a board that constitutes a circuit for stopping a rotating reel and a circuit for displaying a stoppable reel by an LED or the like. The stop switch substrate 65 is provided with a stop switch 17S (not shown, but provided with three switches corresponding to each of the three reels 3L, 3C, 3R). The stop switch 17S detects that the player has pressed the stop button 17L, 17C, 17R (stop operation). Further, the stop switch 17S constitutes a stop operation detecting means.

  The game operation display board 66 displays the number of inserted medals on the 7-segment indicator 28 when the three reels 3L, 3C, 3R are able to rotate and when the player plays a game again when accepting the insertion of medals. It is a substrate for A 7-segment display 28 and an LED 70 are connected to the game operation display board 66. The LED 70 lights, for example, a mark for displaying the start of the game and a mark for performing the re-game.

  The selection switch 67 detects that the selection button 18 has been pressed by the player, and outputs the detection result to the main control board 41 and the sub relay board 69. The determination switch 68 detects that the determination button 19 has been pressed by the player, and outputs the detection result to the main control board 41 and the sub relay board 69.

  The door key switch 24S detects that the door key 24 has been rotated in the left direction. Here, when the door key 24 is turned in the left direction, an error (abnormal state) of the pachi-slot machine 1 is reset.

  The sub relay board 69 relays a wire connecting the sub control board 42 and the main control board 41. Further, the sub relay board 69 relays a wire connecting the sub control board 42 and a plurality of boards disposed around the sub control board 42. That is, to the sub relay board 69, the sub control board 42, the sound I / O board 71, the LED board 72, the 24 h door opening and closing monitoring unit 74, and the shutter control board 78 are electrically connected.

  The sub relay board 69 not only relays the wiring connecting the sub control board 42 and the other boards, but also the sound data (compressed sound data) output from the sub control board 42 as the sound I Sound data is converted to data for voice output by a sound chip (not shown) mounted on the sub relay board 69 in order to output voice to the speakers 23L and 23R via the / O board 71 (uncompressed digital sound data Audio output data separated and amplified by the digital amplifier (not shown) for the speakers 23L and 23R to the sound I / O substrate 71, thereby outputting audio from the speakers 23L and 23R. .

  The sub control board 42 is connected to the main control board 41 via the door relay terminal plate 54 and the sub relay board 69. The sub control board 42 is electrically connected to the sound I / O board 71, the LED board 72, the 24 h door opening / closing monitoring unit 74, and the shutter control board 78 through the sub relay board 69. .

  The sound I / O board 71 outputs sound to the speakers 23L and 23R. The LED board 72 causes the LED group 25 showing one specific example of the light source to emit light in accordance with the effect executed by the control of the sub control circuit 101 (see FIG. 5), and displays the blinking pattern.

  The 24h door opening and closing monitoring unit 74 stores the history of opening and closing the front door 2b. When the front door 2b is opened, the 24h door open / close monitoring unit 74 outputs a signal for displaying an error on the liquid crystal display device 11 to the sub control board 42 (sub control circuit 101).

  The shutter control board 78 drives the shutter device 200 as the movable decorative portion in accordance with the effect performed by the control of the sub control circuit 101 (see FIG. 5). The shutter device 200 raises and lowers shutter members 201, 202, 203 and 204 described later by being driven and controlled by the shutter control board 78. Hereinafter, the shutter members 201, 202, 203 and 204 may be collectively referred to as "shutter".

  In addition, an origin sensor 270, a lowering sensor 271, and a rotation sensor 272 are connected to the shutter control board 78. The origin sensor 270 detects that the shutter members 201, 202, 203 and 204 of the shutter device 200 are at the origin, that is, at the exposed position (the position shown in FIG. 8).

  The lowering sensor 271 detects that the shutter members 201, 202, 203 and 204 have been lowered, that is, in the shielding position (the position shown in FIG. 9). Further, the rotation sensor 272 detects that the shutter members 201, 202, 203 and 204 are at the rotation origin.

  A liquid crystal relay substrate 77 is connected to the sub control substrate 42. The liquid crystal relay substrate 77 is a substrate for relaying a wire connecting the sub control substrate 42 and the liquid crystal display device 11.

<Main control circuit>
Next, the main control circuit 91 configured by the main control board 41 will be described with reference to FIG. FIG. 4 is a block diagram showing a configuration example of the main control circuit 91 of the pachi-slot machine 1.

  As shown in FIG. 4, the main control circuit 91 as a main control unit controls the progress of the game with the microcomputer 92 installed on the main control board 41 as a main component. The microcomputer 92 includes a main CPU 93, a main ROM 94 and a main RAM 95. The main control circuit 91 executes processing relating to the progress of the game.

  The main ROM 94 stores a control program executed by the main CPU 93, a data table, data for transmitting various control instructions (command signals) to the sub control circuit 101, and the like. The main RAM 95 is provided with a storage area for storing various data such as an internal winning combination determined by the execution of the control program.

  Here, the main CPU 93 configures cycle control means for performing control at a predetermined cycle by executing an interrupt process of the main CPU described later, and performs sub-control by executing data transmission processing described later. A command transmission means for sending a command to the circuit 101 is constituted, and a reel control means for controlling the plurality of reels 3L, 3C, 3R is constituted by executing a reel control process described later. The command includes a command triggered by the progress of the game and a non-operation command which is a command not triggered by the progress of the game.

  The command includes a command triggered by the progress of the game and a non-operation command which is a command not triggered by the progress of the game. The main CPU 93 transmits a non-operation command when executing a lock effect to be described later.

  To the main CPU 93, a clock pulse generation circuit 96, a frequency divider 97, a random number generator 98 and a sampling circuit 99 are connected. Clock pulse generation circuit 96 and frequency divider 97 generate clock pulses. The main CPU 93 executes the control program based on the generated clock pulse. The random number generator 98 generates a predetermined range of random numbers (e.g., 0 to 65535). The sampling circuit 99 extracts one value from the generated random numbers.

  The main CPU 93 counts the number of times of pulse output to the stepping motors 51L, 51C, 51R of the reels 3L, 3C, 3R after detecting the reel index. Thus, the main CPU 93 manages the rotation angles of the respective reels 3L, 3C, 3R (mainly, how many reels have been rotated).

  The reel index is information indicating that the reel has made one rotation. The reel index is provided, for example, at a predetermined position of each of the reels 3L, 3C, 3R and an optical sensor having a light emitting unit and a light receiving unit, and rotation of each of the reels 3L, 3C, 3R Detection is performed by a reel position detection unit (not shown) provided with a detection piece interposed therebetween.

  Here, management of the rotation angles of the respective reels 3L, 3C, 3R will be specifically described. The number of pulses output to the stepping motors 51 L, 51 C, 51 R is counted by a pulse counter provided in the main RAM 95. Then, each time the pulse counter counts the output of a predetermined number of times (for example, 16 times) necessary for the rotation of one symbol, the symbol counter provided in the main RAM 95 is incremented by one. The symbol counter is provided according to each reel 3L, 3C, 3R. The value of the symbol counter is cleared when a reel index is detected by a reel position detection unit (not shown).

  That is, in the present embodiment, by managing the symbol counter, it is managed to manage how many symbols have been rotated since the reel index was detected. Therefore, the position of each symbol of each reel 3L, 3C, 3R is detected with reference to the position where the reel index is detected.

  In the present embodiment, basically, the maximum number of sliding symbols is set to four symbols. Therefore, when the left stop button 17L is pressed, the symbols of the left reel 3L in the middle of the display window 4 and the respective symbols within the range up to the symbol four symbols ahead can be stopped at the middle of the display window 4 It becomes a good pattern.

<Sub control circuit>
Next, the sub control circuit 101 configured by the sub control substrate 42 will be described with reference to FIG. FIG. 5 is a block diagram showing a configuration example of the sub control circuit 101 of the pachi-slot machine 1.

  As shown in FIG. 5, the sub control circuit 101 is electrically connected to the main control circuit 91, and performs processing such as determination and execution of effects based on a command signal transmitted from the main control circuit 91. At the same time, control of various effect devices such as the liquid crystal display device 11, the shutter device 200, the LED group 25, and the speakers 23L and 23R is performed.

  In detail, the sub CPU 102 described later constitutes effect determining means for determining an effect based on a command transmitted from the main control circuit 91. For example, the sub CPU 102 configures a character object control unit that controls the operation of the shutter based on the determined effect (more specifically, refer to a shutter control task described later and various tables to which the shutter control task refers).

  The sub control circuit 101 basically has a sub CPU (processor) 102, a sub ROM 103, a sub RAM 104, a rendering processor (VDP, GPU etc.) 105, a drawing RAM 106, a driver 107 and a watchdog timer (hereinafter referred to as "WDT"). And 108).

  Further, in the sub ROM 103, control programs for managing data for effect (image), sound, light (LED group 25), driving of the shutter device 200, and communication are stored.

  The sub CPU 102 controls the output of the video, the sound, the light, and the driving of the shutter device 200 according to the control program stored in the sub ROM 103 according to the command signal transmitted from the main control circuit 91. The sub ROM 103 basically includes a program storage area and a data storage area.

  The program storage area stores a control program to be executed by the sub CPU 102. For example, in the control program, a main board communication task for controlling communication with the main control circuit 91, and a random number value for effect extraction, and command analysis processing for determining and registering effect contents (effect data) Is included. Further, the main task and the animation task for controlling the display of the image by the liquid crystal display device 11 (see FIG. 2) based on the determined effect contents, and the elevation and rotation of the shutter members 201, 202, 203 and 204 by the shutter device 200 are controlled. The shutter control task to be performed, the lamp control task to control the light output by the light source such as the LED group 25, the sound control task to control the sound output by the speakers 23L and 23R, and the like are included.

  The data storage area includes a storage area for storing various data tables, a storage area for storing effect data constituting each effect content, and a storage area for storing animation data relating to creation of a video. Also, a storage area for storing sound data relating to BGM and sound effects, a storage area for storing lamp data relating to a light on / off pattern, and the like are included.

  The sub RAM 104 is composed of a static RAM (SRAM) and a dynamic RAM (DRAM), and is a storage area for registering determined rendering contents and rendering data, and various internal winning combinations transmitted from the main control circuit 91 and the like. A storage area for storing data is provided.

  The sub CPU 102, the rendering processor 105, the drawing RAM (including the frame buffer) 105, and the driver 107 create an image according to the animation data specified by the effect content, and cause the liquid crystal display device 11 to display the created image. Further, the sub CPU 102 drives the shutter device 200 in accordance with the accessory movable data specified by the effect content.

  Further, the sub CPU 102 causes the speakers 23L and 23R to output a sound such as BGM according to the sound data designated by the contents of the effect. Further, the sub CPU 102 controls lighting and extinguishing of the LED group 25 in accordance with the lamp data designated by the contents of the effect.

  The WDT 108 is configured of a circuit for monitoring CPU operation, and includes a timer in the circuit. The sub CPU 102 is configured to reset the WDT 108 once in 33 ms, for example. The WDT 108 is configured to time out when a predetermined time (for example, 1 s) longer than 33 ms elapses, and outputs a reset signal to the sub CPU 102 when it is not reset before the time out. Thereby, the sub CPU 102 is restarted. The WDT 108 may be built in the sub CPU 102.

<Shutter device>
Next, the shutter device 200 will be described with reference to FIGS. The shutter device 200 takes various aspects with respect to the liquid crystal display device 11 by moving up and down and rotating the shutter members 201, 202, 203, 204.

  As various aspects, the aspect which exposes the liquid crystal display device 11 (refer FIG. 8), the aspect which shields the liquid crystal display device 11 (refer FIG. 9, FIG. 11), a liquid crystal display from the clearance gap of shutter member 201, 202, 203, 204 A mode in which the device 11 is turned over (see FIG. 10), and a mode in which the front surfaces 201a, 202a, 203a and 204a and the back surfaces 201b, 202b, 203b and 204b of the shutter members 201 202 203 204 are inverted (see FIG. 11) There is.

  FIGS. 6 and 7 are diagrams showing the configuration of the shutter device 200, and show one process in which the shutter members 201, 202, 203 and 204 are lowered one by one.

  As shown in FIG. 7, the shutter device 200 is provided on the front side of the pachi-slot machine 1 rather than the liquid crystal display device 11. In FIG. 7, the left side is the front side of the pachislot machine 1, and the right side is the rear side of the pachislot machine 1. Further, although not shown in FIG. 7, a protective glass 6 (see FIG. 2) is disposed on the front side (left side in the drawing) of the shutter device 200. Therefore, the shutter device 200 is provided between the protective glass 6 and the liquid crystal display device 11, and is disposed closer to the player than the liquid crystal display device 11.

  Here, FIG. 6 is a view of the shutter device 200 as viewed from the back side of the pachi-slot machine 1, that is, the liquid crystal display device 11 side.

  As shown in FIGS. 6 and 7, the shutter device 200 includes a shutter base 220, a plurality of (four in the present embodiment) plate-like shutter members 201, 202, 203 and 204, and elevating means. And a slider mechanism 210 and a rotation mechanism 230. The number of shutter members is not limited to four, and may be two or three, or five or more.

  The shutter base 220 is formed in a U-shaped plate shape, and is attached to the door main body 9 (see FIG. 2) of the front door 2b via a fastening member (not shown). The shutter base 220 is configured to include an upper piece portion 221 and a pair of side piece portions 222 and 223 integrally formed on both ends of the upper piece portion 221 in the longitudinal direction.

  In the pair of side pieces 222 and 223, elongated holes 222a, 222b, 222c, 223a, 223b and 223c are formed extending in the longitudinal direction (vertical direction), respectively. First and second sliders 211 and 212, which will be described later, are slidably attached to the elongated holes 222a and 223a in the vertical direction. In addition, a third slider 213, which will be described later, is slidably attached to the elongated holes 222b and 223b in the vertical direction. Furthermore, a fourth slider 214, which will be described later, is slidably attached to the elongated holes 222c and 223c in the vertical direction.

  The shutter members 201, 202, 203 and 204 can move up and down between a shielding position (the position shown in FIG. 9) for shielding the liquid crystal display device 11 and an exposure position (the position shown in FIG. 8) for exposing the liquid crystal display device 11. Is configured. Here, the exposure position (the position shown in FIG. 8) is provided above the shielding position (the position shown in FIG. 9).

  In other words, the shutter members 201, 202, 203 and 204 are in the standby position not blocking the display area of the liquid crystal display device 11 when in the exposure position, and when operating from the standby position, the liquid crystal display device 11 It is provided to block the display area of.

  As shown in FIGS. 7 and 12, the lifting and lowering unit 206 is configured to include lifting and lowering motors 240 A and 240 B, a tensioner 241, and a drive belt 242. Although FIG. 7 illustrates the elevation unit 206 on the side piece 223 side of the shutter base 220, the elevation unit 206 is also provided on the side piece 223 of the shutter base 220 (see FIG. 12). That is, as shown in FIG. 12, the elevating units 206 are respectively provided on the left and right of the shutter base 220 from the front side to the back side of the pachi-slot machine 1.

  In the present embodiment, the left and right lifting motors are distinguished as lifting motors 240A and 240B. In FIG. 7, only the right side lifting motor 240B is illustrated.

  As shown in FIGS. 7 and 12, the lift motors 240A and 240B are configured by, for example, stepping motors that can rotate in forward and reverse directions. The lift motors 240A and 240B are fixed inside the cover member 250 (see FIG. 12). The cover member 250 is fixed to the pair of side pieces 222 and 223 of the shutter base 220 so as to cover the lifting and lowering unit 206.

  The lift motors 240A and 240B are configured to rotate the drive pulley 244 by rotating a pinion gear (not shown). The drive pulley 244 is rotatably supported inside the cover member 250 (see FIG. 12). Further, a drive belt 242 is wound around the drive pulley 244.

  The tensioner 241 is attached to the inside of the cover member 250 (see FIG. 12), and has a tension pulley 241a always urged downward by a spring (not shown). The drive belt 242 is wound around the tension pulley 241a. Thus, the drive belt 242 is always maintained at a constant tension or more.

  The drive belt 242 is wound around a drive pulley 244 and a tension pulley 241a, and is rotationally driven by the lift motors 240A and 240B via the drive pulley 244. Further, a first slider 211 (see FIG. 6) is connected to the drive belt 242.

  Thus, the first slider 211 moves up and down as the drive belt 242 rotates. The lowermost shutter member 201 of the shutter members 201, 202, 203, and 204 is rotatably supported by the first slider 211.

  Therefore, the lifting and lowering unit 206 lifts and lowers the lowermost shutter member 201 among the shutter members 201, 202, 203 and 204 between the shielding position (position shown in FIG. 9) and the exposure position (position shown in FIG. 8). It is

  As shown in FIG. 6, the slider mechanism 210 moves the shutter members 202, 203 and 204 other than the lowermost shutter member 201 in conjunction with the lowermost shutter member 201 to a shield position (the position shown in FIG. 9) The lowermost shutter member 201 is connected to the other shutter members 202, 203 and 204 so as to move up and down between the position and the exposed position (the position shown in FIG. 8).

  Specifically, the slider mechanism 210 is configured to include a first slider 211, a second slider 212, a third slider 213, and a fourth slider 214. The first slider 211, the second slider 212, the third slider 213, and the fourth slider 214 rotatably support the shutter members 201, 202, 203, and 204, respectively.

  Thereby, the shutter members 201, 202, 203 and 204 are respectively the surfaces 201a, 202a, 203a and 204a (surfaces exposed in FIG. 9) and the image display surface 11a of the liquid crystal display device 11 (see FIG. 7). Is rotatably supported by the slider mechanism 210 so that the angle formed by

  The first slider 211 is vertically slidable along the long holes 222a and 223a of the pair of side pieces 222 and 223. The upper end portion of the first slider 211 is formed with a stopper portion (not shown) that can abut on the second slider 212. The stopper portion abuts on upper and lower contact surfaces (not shown) of the second slider 212 described later, thereby restricting the moving range of the first slider 211 with respect to the second slider 212.

  As shown in FIG. 6, the second slider 212 is slidable in the vertical direction along the long holes 222 a and 223 a of the pair of side pieces 222 and 223 as in the first slider 211.

  As shown in FIG. 7, the second slider 212 is formed with a recess 212A that is recessed on the side opposite to the image display surface side (left side in FIG. 7). On the upper and lower inner wall surfaces of the concave portion 212A, an abutting surface on which the stopper portion of the first slider 211 can abut is formed.

  FIG. 6 shows a state in which the first slider 211 and the second slider 212 overlap in the front-rear direction of the pachi-slot machine 1 (in FIG. 6, the direction orthogonal to the paper surface). Therefore, in FIG. 6, the stopper portion of the first slider 211 and the contact surfaces of the second slider 212 are caused by relative sliding between the first slider 211 and the second slider 212. The back sides of the two sliders 212 are configured to contact each other.

  Further, as shown in FIG. 6, the upper end portion of the second slider 212 is provided with an inner stopper portion 212c and an outer stopper portion 212d which respectively project in the left-right direction (left-right direction in FIG. 6) orthogonal to the vertical direction. It is done.

  The inner stopper portion 212 c abuts on upper and lower contact surfaces 213 a and 213 b of a third slider 213 described later to restrict the movement range of the second slider 212 with respect to the third slider 213. On the other hand, the outer stopper portion 212d restricts the movement range of the second slider 212 with respect to the fourth slider 214 by abutting on upper and lower contact surfaces 214a and 214b of the fourth slider 214 described later. .

  The third slider 213 can slide in the vertical direction along the long holes 222 b and 223 b of the pair of side pieces 222 and 223. The third slider 213 is formed with a recess 213A that is recessed on the image display surface side (right side in FIG. 7). On the upper and lower inner wall surfaces of the recess 213A, abutment surfaces 213a and 213b are formed, to which the inner stopper portion 212c of the second slider 212 can abut.

  The fourth slider 214 can slide in the vertical direction along the long holes 222 c and 223 c of the pair of side pieces 222 and 223. The fourth slider 214 is formed with a recessed portion 214A recessed on the image display surface side (right side in FIG. 7). On the upper and lower inner wall surfaces of the recess 214A, abutment surfaces 214a and 214b are formed, to which the outer stopper portion 212d of the second slider 212 can abut.

  Here, with reference to FIGS. 6-9, the operation of the above-described slider mechanism 210 when lowering the shutter members 201, 202, 203, 204 will be described.

  First, as shown in FIG. 8, when the lowermost shutter member 201 at the exposed position is lowered by the lifting unit 206, the other shutter members 202, 203, 204 also follow the lowermost shutter member 201 by their own weight. Go down.

  At this time, as shown in FIG. 6, first, the fourth slider 214 strikes the lowermost part of the long holes 222c and 223c, and the further downward movement is restricted. At this time, the contact surface of the upper portion of the second slider 212 is in contact with the stopper portion of the upper end portion of the first slider 211. Further, the inner stopper portion 212 c of the second slider 212 is in contact with the contact surface 213 a of the third slider 213.

  Then, the third slider 213 strikes the lowermost part of the long holes 222b and 223b, and the further downward movement is restricted. At this time, the abutment of the inner stopper portion 212c of the second slider 212 with the abutment surface 213a of the third slider 213 is cancelled.

  Then, the inner stopper portion 212c of the second slider 212 abuts on the abutment surface 213b of the third slider 213, and the further downward movement of the second slider 212 is restricted. At this time, the outer stopper portion 212 d of the second slider 212 abuts on the abutment surface 214 b of the fourth slider 214.

  Finally, the first slider 211 strikes the lowermost part of the long holes 222a and 223a, and the further downward movement is restricted. At this time, the stopper portion at the upper end portion of the first slider 211 comes in contact with the lower contact surface of the second slider 212. As a result, as shown in FIG. 9, the shutter members 201, 202, 203 and 204 stop at the shielding position.

  On the other hand, when the lowermost shutter member 201 in the shielding position (the position shown in FIG. 9) is raised by the raising and lowering unit 206, first, the stopper on the upper end of the first slider 211 is the upper portion of the second slider 212. Contact the contact surface.

  Then, the second slider 212 is pushed up by the first slider 211. Subsequently, when the second slider 212 rises together with the first slider 211, the inner stopper portion 212c of the second slider 212 abuts on the abutment surface 213a of the third slider 213.

  Thereafter, the third slider 213 is pushed up by the second slider 212. Subsequently, when the third slider 213 is raised together with the first slider 211 and the second slider 212, the outer stopper portion 212 d of the second slider 212 abuts on the abutment surface 214 a of the fourth slider 214.

  The fourth slider 214 is then pushed up by the second slider 212. Subsequently, when the fourth slider 214 rises together with the first slider 211, the second slider 212, and the third slider 213, the fourth slider 214 strikes the top of the elongated hole 223c and further rises It is regulated. As a result, the shutter members 201, 202, 203, and 204 stop at the exposure position (the position shown in FIG. 8).

  Here, as shown in FIG. 8, when the shutter members 201, 202, 203 and 204 are raised to the exposed position by the lifting and lowering unit 206, the respective surfaces 201 a, 202 a, 203 a and 204 a (see FIG. 9) While being turned upward, they are superimposed on each other and accommodated in the space on the back side of the upper exterior member 7a.

  The shutter members 201, 202, 203 and 204 respectively have rotation shafts (not shown) at both ends in the longitudinal direction, and these rotation shafts are rotatably supported by the first slider 211 to the fourth slider 214. ing. Thus, the shutter members 201, 202, 203 and 204 are configured to be rotatable.

  In addition, a rotating body (not shown) can be integrally rotated at one end of at least one of the rotation shafts of the shutter members 201, 202, 203, 204 (in the present embodiment, the end on the side piece 222 side). Is attached to The rotary body is engageable with an engagement member (not shown) of a rotation mechanism 230 described later.

  The rotation range of the above-mentioned rotating body is approximately 180 °. Thereby, the shutter members 201, 202, 203 and 204 can reverse the front surfaces 201a, 202a, 203a and 204a and the back surfaces 201b, 202b, 203b and 204b, respectively. The above-described rotating body is regulated by the first slider 211 to the fourth slider 214 so that the rotation range is approximately 180 °. For example, when a part of the rotating body is engaged with the protrusions provided on the first slider 211 to the fourth slider 214, the rotation range of the rotating body is restricted.

  Furthermore, the shutter members 201, 202, 203 and 204 are in the shielding position (the position shown in FIG. 9) by biasing members (for example, a rewinding type torsion spring etc.) provided between the respective rotary members and the respective sliders. The surfaces 201a, 202a, 203a and 204a are always urged in parallel to the image display surface 11a with the front surface of the pachi-slot machine 1 facing.

  On the other hand, in the exposed position (the position shown in FIG. 8), the shutter members 201, 202, 203, 204 fold over each other with the surfaces 201a, 202a, 203a, 204a facing upward against the biasing force of the biasing member. Thus, it is accommodated in the space on the back side of the upper exterior member 7a.

  When the shutter members 201, 202, 203, 204 are in the blocking position, the rotation mechanism 230 is in the state shown in FIG. 9 by the shutter members 201, 202, 203, 204, the state shown in FIG. The shutter members 201, 202, 203, and 204 are rotated so as to be in any of the states.

  Here, in the state shown in FIG. 9, the liquid crystal display device 11 is shielded in a state in which the surfaces 201a, 202a, 203a, 204a of the shutter members 201, 202, 203, 204 face the front side of the pachislot machine 1. is there.

  The state shown in FIG. 10 is a state in which the surfaces 201a, 202a, 203a and 204a of the shutter members 201, 202, 203 and 204 stop at an angle orthogonal to the image display surface 11a of the liquid crystal display device 11. That is, in the state shown in FIG. 10, the shutter members 201, 202, 203 and 204 are in the half-opened state, and the image display surface 11a can be visually recognized from the gap between these shutter members.

  The state shown in FIG. 11 is a state in which the liquid crystal display device 11 is shielded in a state where the back surfaces 201b, 202b, 203b and 204b of the shutter members 201, 202, 203 and 204 face the front side of the pachi-slot machine 1.

  As shown in FIG. 6, the rotation mechanism 230 is configured to include a rotation motor 231 as a drive portion, a rack portion (not shown) engaged with the pinion gear of the rotation motor 231, and an engagement member (not shown).

  As shown in FIG. 6, the rotary motor 231 is attached to the base member 238 below the side piece 222 of the shutter base 220. In addition, the base member 238 is being fixed to the door main body 9 via the fastening member which is not shown in figure.

  The rotation motor 231 is configured of, for example, a stepping motor that can adjust the rotation angle and can rotate in the forward and reverse directions. Further, a pinion gear (not shown) is attached to the drive shaft of the rotary motor 231 so as to be integrally rotatable.

  In the present embodiment, the stepping motors used as the elevation motors 240A and 240B and the rotary motor 231 are of two-phase excitation type, but the invention is not limited thereto. One-phase excitation type, one and two phase excitation types, Alternatively, it may be a microstep drive type, and may be a servomotor, a reluctance motor, or a coreless motor, as long as adjustment of the rotation angle and forward and reverse rotation are possible.

  Although not shown, the rack portion is formed of a long member along the extending direction of the side piece portion 222 (in the vertical direction in FIG. 6), and in response to the rotation of the pinion gear of the rotary motor 231. It is movable in the vertical direction.

  Further, in the rack portion, four engaging members engageable with the rotating members of the shutter members 201, 202, 203 and 204 are provided at predetermined intervals in the vertical direction. These engaging members are engaged with the rotating members of the shutter members 201, 202, 203 and 204, respectively, when the shutter members 201, 202, 203 and 204 are lowered to the shielding position (the position shown in FIG. 9). It has become.

  Further, each engaging member is configured to rotate with the movement of the rack portion in the vertical direction. For example, by engaging the gear portions formed in the engagement members with the gear portions formed in the rack portion, the engagement members can be rotated with the movement of the rack portion.

  The rotation mechanism 230 configured as described above can rotationally drive the engagement member by 180 ° by moving the rack portion up and down by driving the rotation motor 231, and the rotation motor 231 can be driven by a predetermined number of steps. By driving only, the engaging member can be rotationally driven by a predetermined driving amount.

  Therefore, the rotation mechanism 230 rotationally drives the engagement member in the forward and reverse directions by 180 ° by driving the rotation motor 231, whereby the front surfaces 201a, 202a, 203a, 204a of the shutter members 201, 202, 203, 204 and the rear surface The shutter members 201, 202, 203 and 204 can be rotated at the blocking position so that the members 201b, 202b, 203b and 204b are reversed.

  In addition, the rotation mechanism 230 rotates the engagement member by a predetermined drive amount (for example, 90 °) by driving the rotation motor 231, whereby the surfaces 201a, 202a, 203a, 204a of the shutter members 201, 202, 203, 204 are rotated. The shutter members 201, 202, 203 and 204 can be stopped at an angle orthogonal to the image display surface 11a (see FIG. 10).

  Here, raising and lowering and rotation of the shutter members 201, 202, 203 and 204 as described above are detected by the origin sensor 270, the lowering sensor 271 and the rotation sensor 272, respectively.

  The origin sensor 270 is disposed on the top of the side piece 223 of the shutter base 220, and is configured of, for example, a transmission type photo sensor. The origin sensor 270 detects the upper end of the fourth slider 214 to detect that the shutter members 201, 202, 203, and 204 are at the origin, that is, at the exposure position (the position shown in FIG. 8).

  The descent sensor 271 is disposed below the side piece 222 of the shutter base 220, and is configured of, for example, a transmissive photo sensor, like the origin sensor 270. The descent sensor 271 detects the lower end of the first slider 211 to detect that the shutter members 201, 202, 203 and 204 have been lowered, that is, in the shielding position (the position shown in FIG. 9).

  The rotation sensor 272 is disposed in the vicinity of the lower portion of the side piece portion 222 of the shutter base 220, and is configured of, for example, a transmission type photo sensor, like the origin sensor 270 and the lowering sensor 271. The rotation sensor 272 detects a detection piece (not shown) formed on the rack portion of the rotation mechanism 230, whereby the shutter members 201, 202, 203, 204 do not rotate (state shown in FIG. 9), that is, rotation. It detects that it is at the origin. In the present embodiment, in the rack portion, in addition to the detection piece for detecting the rotation origin, the shutter members 201, 202, 203, and 204 are in an inverted state (state shown in FIG. 11). A detectable piece is provided.

  The origin sensor 270, the lowering sensor 271, and the rotation sensor 272 described above are not limited to transmissive photosensors, but may be reflective photosensors or sensors other than photosensors such as micro switches. It is also good.

  Next, with reference to FIG. 12, a structure for causing the shutter members 201, 202, 203 and 204 to emit light will be described.

  As shown in FIG. 12, the shutter device 200 includes a light irradiation device 400 as light irradiation means for irradiating light to the shutter members 201, 202, 203, 204 from the side, and the light irradiation device 400 of the shutter members 201, 202, 203, 204. Two are provided on both end sides in the longitudinal direction. The light irradiation devices 400 are fixed to the side pieces 222 and 223 of the shutter base 220 via the support member 400a.

  The light irradiation device 400 includes four LEDs 401, 402, 403, and 404 arranged in the vertical direction corresponding to the shutter members 201, 202, 203, and 204, respectively. The LEDs 401, 402, 403, and 404 are included in the above-described LED group 25 (see FIG. 3).

  In addition, in the shutter members 201, 202, 203, and 204, at least a part of one surface (in the present embodiment, the back surfaces 201b to 204b) is provided with a decoration 500. This decoration 500 is drawn in any shape, and is not particularly limited to the shape shown in FIG.

  At the portions of the back surfaces 201b to 204b to which the decoration 500 has been applied, there are formed asperities for reflecting the light emitted from the LEDs 401, 402, 403 and 404 toward the front side of the pachislot machine 1 (see FIG. 2) . The unevenness has an inclined surface on which light emitted from the LEDs 401, 402, 403 and 404 can be reflected toward the front side of the pachi-slot machine 1.

  Further, in the present embodiment, the LEDs 401, 402, 403, and 404 are installed in the light irradiation device 400 in an inclined state so as to irradiate light at a predetermined angle with respect to the inclined surface of the unevenness. Here, the installation angles of the LEDs 401, 402, 403, and 404 are set to allow the light reflected by the inclined surface to be directed to the front side of the pachi-slot machine 1 with respect to the inclined surface. More strictly, preferably, the installation angle of the LEDs 401, 402, 403, 404 and the angle of the inclined surface are set in consideration of the incident angle and the reflection angle with respect to the inclined surfaces of the LEDs 401, 402, 403, 404.

[RT gaming state transition]
As shown in FIG. 13, in the pachislot machine 1, as the RT gaming state controlled by the main CPU 93, “RT0 gaming state”, “RT1 gaming state”, “RT2 gaming state”, “RT3 gaming state”, “RT4 There are "playing state" and "RT5 playing state".

  The “RT0 gaming state” and the “RT1 gaming state” are replay low probability states in which the internal winning probability of the internal winning combination relating to replay is low. The “RT2 gaming state” is a replaying probability state in which the internal winning probability of the internal winning combination relating to replay is higher than that of the “RT0 gaming state” and the “RT1 gaming state”. On the other hand, “RT3 gaming state”, “RT4 gaming state” and “RT5 gaming state” are replay high probability states in which the internal winning probability of the internal winning combination relating to replay is higher than that of “RT2 gaming state”.

  The RT gaming state is shifted between “RT0 gaming state”, “RT1 gaming state”, “RT2 gaming state”, “RT3 gaming state”, “RT4 gaming state” and “RT5 gaming state” when predetermined conditions are satisfied. Ru.

  For example, at the time of setting change, the RT gaming state shifts to "RT0 gaming state". In the “RT0 gaming state”, when any combination of “RT1 transition_1” to “RT1 transition_3” is displayed along the effective line, the RT gaming state transitions to “RT1 gaming state”.

  In addition, in the “RT1 gaming state”, when any combination of “RT2 transition lip_1” to “RT2 transition lip_3” is displayed along the effective line, the RT gaming state becomes “RT2 gaming state”. Transition. On the other hand, in the “RT1 gaming state”, when any combination of “RT5 transition lip_1” to “RT5 transition lip_16” is displayed along the effective line, the RT gaming state is “RT5 gaming state”. Transition.

  In addition, in the “RT2 gaming state”, when any combination of “RT3 transition lip 1” to “RT3 transition lip_16” is displayed along the effective line, the RT gaming state is “RT3 gaming state”. Transition.

  In addition, in the “RT3 gaming state”, when any combination of “RT4 transition lip 1” to “RT4 transition lip 13” is displayed along the effective line, the RT gaming state is “RT4 gaming state”. Transition. Furthermore, in the “RT3 gaming state”, when any combination of “RT5 transition lip_1” to “RT5 transition lip_16” is displayed along the activated line, the RT gaming state is “RT5 gaming state”. Transition.

  In addition, in the “RT4 gaming state” and the “RT5 gaming state”, when any combination of “RT3 transition lip 1” to “RT3 transition lip 16” is displayed along the effective line, the RT gaming state is It shifts to "RT3 gaming state".

  In addition, in RT1 gaming state, RT4 gaming state, and RT5 gaming state, any combination of RT0 rep, middle right push role_1 to middle right push role_8 is valid. When displayed along the line, the RT gaming state shifts to "RT0 gaming state".

  Furthermore, in the “RT2 gaming state” to “RT5 gaming state”, when any combination of “RT1 transition_1” to “RT1 transition_3” is displayed along the activated line, the RT gaming state is “RT1. Transition to the game state.

  As described above, the main CPU 93 constitutes gaming state transition means for transitioning the RT gaming state between a plurality of RT gaming states 0 to 5 in which the winning probability of the player's role of replay (replay) is different.

[Playing state of secondary control circuit]
As described above, while the RT gaming state is shifted by the main CPU 93, the sub CPU 102 determines the content of the effect to notify the stop operation of the reels 3L, 3C, 3R, thereby achieving the internal winning combination. The player is made to win or not win advantageously, or to shift the RT game machine.

  Here, a state in which the sub CPU 102 notifies the stop operation of the reels 3L, 3C, 3R so as to make the internal winning combination be won or not won for the player in an advantageous manner is referred to as "AT". Further, a state in which the AT gaming state is the replay high probability state is referred to as "ART".

  Therefore, during ART, it is possible to win the internal winning combination so that the number of winning medals is increased without inserting medals, so the more the number of ART games (the number of games), the more medals. It can be earned. For this reason, in the pachislot machine 1 according to the present embodiment, the addition of the number of games (also referred to as "addition") as the number of grants of ART greatly affects the acquisition of medals.

  The pachislot machine 1 according to the present embodiment is not only general but also ART high probability, ART, pseudo BB high probability, pseudo BB, wait for normal return, additional game and additional selection (also referred to as “selected game”) Take the game state.

  The ART high probability is a special gaming state in which the degree of expectation for the ART is higher than the gaming state in the middle, that is, it is easy to shift to the ART. The ART high probability is transferred by the sub CPU 102 when, for example, a predetermined number of games (for example, 600 games) have been consumed since the end of the previous ART when a predetermined condition is satisfied. Thus, the sub CPU 102 constitutes a special gaming state transition means.

  During the ART high probability, in a game which does not win any internal winning combination (hereinafter referred to as “a lost game”), is a lock for disabling the game operation by the player for a predetermined period performed in the next game (next game)? The main CPU 93 determines whether or not to be randomly selected.

  In addition, during ART high probability, in the off game, the specific stop operation order (for example, right push) for displaying the combination of the specified special symbol (in this embodiment, “蝙蝠”) on the effective line Whether to notify or not is determined by the sub CPU 102 by lottery and notified. As described above, the sub CPU 102 configures notification determination means and stop operation order notification means.

  Furthermore, during the ART high probability, as a result of the stop operation being performed in the above-described specific stop operation order, the special symbol is not displayed on the activated line as a result of the stop operation being performed. The main CPU 93 performs an out-of-reel action (demonstration during locking) of rotating at least one of the plurality of reels 3L, 3C, 3R so that the combination of symbols is displayed on the effective line. Thus, the main CPU 93 constitutes an in-lock effect means.

  It should be noted that, if the sub CPU 102 does not win ART during ART high probability, it performs transition lottery of the special mode with a predetermined probability, and when the gaming state shifts to the special mode, ART high probability until ART is won. You may make it shift repeatedly.

  Also, the sub CPU 102 shifts to the ART super-high probability with higher expectation for ART than the ART high probability with a predetermined winning probability, and during the ART super-high probability, the ART transition point is displayed each time the small combination wins internally. Along with the addition, the number of remaining ART super-high probability games may be maintained. At this time, when the ART transition point reaches a predetermined value by the end of the ART super-high probability, the sub CPU 102 determines to shift to ART.

  The pseudo BB high probability transitions when the predetermined condition is satisfied, for example, when winning a lottery when a specific internal winning combination is won, when the number of activated waiting games in the predetermined game number has elapsed. For the pseudo BB high probability, 10 games, 20 games and an infinite game are selected by lottery at the time of winning.

  Even if 10 games or 20 games are selected as the number of games with pseudo BB high probability, the additional lottery for the number of games with pseudo BB high probability is performed during the pseudo BB high probability. When the number of games with pseudo BB high probability exceeds 20 games by this additional lottery, an infinite game is selected as the number of games with pseudo BB high probability, and addition to the number of ART games is performed for each game.

  When an infinite game is selected as the number of games with pseudo BB high probability, the pseudo BB high probability continues until it shifts to pseudo BB. That is, transition to pseudo BB is determined. The sub CPU 102 transitions to the pseudo BB with a relatively high probability when it determines as the internal winning combination that the combination such as the RT5 transition lip 1 to the RT5 transition lip_16 can be displayed along the effective line during the pseudo BB high probability. Execute notification to make

  The pseudo BB is a mode to shift when the RT gaming state is changed from another RT gaming state to the RT5 gaming state. The simulated BB is more likely to have the addition of the ART in accordance with the internal winning combination than the case of the ART, and the number of games to be added is relatively large.

  The normal return waiting mode is a mode for causing the secondary gaming state to shift into the general state when the RT gaming state becomes a replay high probability of RT3 or more to a replaying probability of RT2 gaming state or less or a replay low probability. Further, when the secondary gaming state shifts while waiting for normal return, ART pullback and lottery are performed while waiting for normal return, and it is determined whether ART restarts or shifts during the general according to the lottery result.

  The extra game is a mode that shifts when the RT gaming state changes from the RT3 gaming state or the RT5 gaming state to the RT4 gaming state. In the additional game, the number of executions of the additional selection is stocked.

  The additional selection is executed at the time of locking after one unit game, when the number of executions of the additional selection is stocked in the RT3 gaming state to the RT5 gaming state. When the addition selection is executed, the liquid crystal display device 11 is displayed by the sub CPU 102 so that a plurality of elements associated with the number of ART addition games can not be identified as in the selection game screen shown in FIG. The first region is randomly arranged and displayed (first display state), and the number of elements corresponding to the number of ART-superimposed games is added to the second region of the liquid crystal display device 11 for each number of additional games. Is displayed. Thus, the sub CPU 102 configures display control means.

  That is, in FIG. 162, 13 elements associated with the number of added games of 10 games, one element associated with the number of added games of 100 games, and the number of added games of 300 games are associated. It indicates that one of the elements is displayed in random arrangement.

  In addition, depending on the state when winning the addition selection, as in the selection game screen shown in FIG. 163, when the number of addition games associated with at least one element among the plurality of elements is displayed so that it can be identified There is also a case (second display state) in which the number of added games associated with all elements can be identified as in the selected game screen shown in FIG.

  The elements arranged in the first region of the liquid crystal display device 11 are selected by, for example, the stop buttons 17L, 17C, 17R, and determined by the MAX bet button 14. Thus, the stop buttons 17L, 17C, 17R and the MAX bet button 14 constitute selection means.

  Further, the sub CPU 102 determines the number of added games associated with the element selected by the selecting unit as the number of ART added games. As described above, the sub CPU 102 arranges the elements and the elements randomly arranged in association with the number of ART added games as in the selected game screen shown in FIG. 162 displayed on the liquid crystal display device 11. For the first ART selection lottery table (see FIGS. 58 and 59) to be described later by the first ART selection lottery process (refer to FIG. 141 and FIG. 142) to be (Refer to FIG. 144 and FIG. 145) to determine the number of benefits by the lottery process (refer to FIG. 147 and FIG. 148) while referring to the additional selection payout table (see FIG. 56) described later The provision number determination means is comprised.

  As shown in FIG. 162, in a state where a plurality of elements associated with the number of ART added games are displayed so that the number of added games can not be identified, the sub CPU 102 performs a predetermined operation (selection button 18 or determination button An element may be selected at random from among a plurality of elements, provided that 19 is pressed or the like.

  Further, as shown in FIG. 162, in a state where a plurality of elements associated with the number of ART added games are displayed so that the number of added games can not be identified, the sub CPU 102 performs a predetermined operation (selection button 18 or The average of the numbers of games respectively associated with the plurality of elements may be determined as the addition number of the number of ART games, on condition that the determination button 19 is pressed).

  Further, as shown in FIG. 164, in a state where the number of added games associated with all the elements is displayed so as to be distinguishable, the sub CPU 102 performs a predetermined operation (pressing of the selection button 18 or the determination button 19). And so on), the most advantageous element for the player may be selected from a plurality of elements.

  When one element is selected by the operation by these selection means, the selected game element is displayed so that the number of added games corresponding to each element can be identified as in the selection game screen shown in FIG. 165. The number of games associated with is added to ART.

  In addition, the sub CPU 102 drives the shutter device 200 so that the shutter is lowered until it is half-opened after lowering the shutter in a state where the selected game screen as shown in FIG. 162 is displayed on the liquid crystal display device 11, for example. At this time, the sub CPU 102 may preferentially redisplay the element displayed on the liquid crystal display device 11.

  For example, the sub CPU 102 associates with all elements before the shutter is half-opened from a state in which a plurality of elements associated with the number of ART top games are displayed so that the number of top games can not be identified. It may be made to re-display on the liquid crystal display device 11 in the state displayed so that the number of added games can be identified respectively.

[Data table stored in main ROM]
14 to 44 show various data tables stored in the main ROM 94.

<Symbol arrangement table>
The symbol arrangement table shown in FIG. 14 represents the arrangement of symbols arranged on the surface of each of the left reel 3L, the middle reel 3C and the right reel 3R. The symbol arrangement table defines the correspondence between 21 symbol positions “0” to “20” and symbols corresponding to each of the symbol positions.

  The symbol positions “0” to “20” indicate the positions of the symbols arranged along the rotational direction in each of the left reel 3L, the middle reel 3C and the right reel 3R. The symbols corresponding to the symbol positions “0” to “20” can be identified by referring to the symbol arrangement table using the value of the symbol counter.

  As types of symbols, "card", "red 7", "rose", "watermelon 1", "bell", "replay", "cherry 1", "watermelon 2", "cherry 2" and "BAR" Contains.

  Here, “watermelon 1” and “watermelon 2” may be distinguishable as the main CPU 93 internally has different symbols, and in the present embodiment, the player can recognize like the same symbol. Design. Similarly, “Cherry 1” and “Cherry 2” may also be distinguishable as the main CPU 93 internally has different symbols, and in the present embodiment, symbols the same symbol and the player can respectively recognize I assume.

<Symbol code table>
As shown in FIG. 15, each symbol arranged on each reel 3L, 3C, 3R is specified by a symbol code table, and in this embodiment, it is distinguished by 1 byte (8 bits) data. The symbol code table shown in FIG. 15 represents symbol codes as data for specifying symbols disposed on the surfaces of the three reels 3L, 3C, 3R.

  For example, although the symbol arrangement table shown in FIG. 14 has been described as representing the arrangement of symbols arranged on the surface of each of left reel 3L, middle reel 3C and right reel 3R, it is actually stored in main ROM 94 The symbol arrangement table indicates the arrangement of symbol codes specifying the symbols arranged on the surface of each of the left reel 3L, the middle reel 3C and the right reel 3R.

  In the present embodiment, the symbols used in the pachislot machine 1 are "card", "red 7", "mochi", "watermelon 1", "bell", "replay", "cherry 1", "card 1" as described above. 10 types of watermelon 2 "," cherry 2 "and" BAR ".

  In the symbol code table, "1" is assigned as a symbol code for the "card" symbol. Also, "2" is assigned as a symbol code for the "red 7" symbol. Also, "3" is assigned as a symbol code for the "蝙蝠" symbol.

  Similarly, "4" to "10" are assigned as symbol codes for the "watermelon 1", "bell", "replay", "cherry 1", "watermelon 2", "cherry 2" and "BAR" symbols. It is done.

<Symbol combination table>
The symbol combination tables shown in FIG. 16 and FIG. 17 show combinations of symbols identified by storage area identification data represented by 22 bytes (hereinafter referred to as "combinations") and combinations displayed on effective lines. It is associated with the number of medals paid out. The symbol combination tables shown in FIG. 16 and FIG. 17 are given names and brief explanations (remarks) for each combination in order to make the invention easy to understand.

  For example, when a combination of "Replay-Replay-Red 7" called "RT1 Transition_1" is displayed along the active line, there is no payout of medals because it is "losing" as a winning combination. The RT gaming state shifts to the RT1 gaming state. “RT1 transition_2” and “RT1 transition_3” are similar to “RT1 transition_1”.

  When a combination of "replay-replay-bell" called "MB" is displayed along the effective line, the medals are not dispensed but the MB is activated. That is, when "MB" is displayed along the activated line, the main gaming state shifts to the MB operating state.

  When a combination of "replay-replay-replay" called "transition without rep" is displayed along the activated line, replay is activated and the RT gaming state is maintained.

  When a combination of “蝙蝠-蝙蝠-蝙蝠” called “symbol lip_1” is displayed along the activated line, replay is activated. “Symbol_rip_2” to “symbol_rip_12” are the same as “symbol_rip_1”.

  When a combination of “Bell-Bell-Red 7” called “RT2 Transition Lip_1” is displayed along the activated line, replay is activated and the RT gaming state shifts to the RT2 gaming state. “RT2 transition RIP_2” and “RT2 transition RIP_3” are the same as “RT2 transition RIP_1”.

  When a combination of “watermelon 1-replay-BAR” called “RT3 transition Lip 1” is displayed along the activated line, replay is activated and the RT gaming state shifts to the RT3 gaming state. “RT3 transition lip 2” to “RT3 transition lip 16” are the same as “RT3 transition lip 1”.

  When a combination of “watermelon 1-bell-bell” called “RT4 transition lip 1” is displayed along the activated line, replay is activated, and the RT gaming state shifts to the RT4 gaming state. “RT4 transition lip 2” to “RT4 transition lip 13” are the same as “RT4 transition lip 1”.

  When a combination of “Bell-card-BAR” called “RT5 transition Lip_1” is displayed along the activated line, replay is activated and the RT gaming state shifts to the RT5 gaming state. “RT5 transition lip 2” to “RT5 transition lip 16” are the same as “RT5 transition lip 1”.

  When a combination of "Replay-BAR-BAR" called "BAR TEMP 1" is displayed along the activated line, replay is activated. “BAR ten lip 2” is similar to “BAR ten lip 1”.

  When a combination of "watermelon 1-cherry 1-bell" called "medium chelip 1" is displayed along the activated line, replay is activated. "Medium chelip _2" to "medium chelip _11" are the same as "medium chelip _1".

  When a combination of “red 7-red 7-red 7” called “7 rep_RT5_01” is displayed along the activated line, replay is activated and the RT gaming state shifts to the RT5 gaming state. “7 Lip_RT5_02” to “7 Lip_RT5_06” are the same as “7 Lip_RT5_01”.

  When a combination of “red 7-replay-bell” called “7 rep_no transition _1” is displayed along the activated line, replay is activated but RT gaming state transition is not performed. "7 RIP _ NO TRANSITION _2" to "7 RIP _ NO TRANSITION _3" are the same as "7 RIP _ NO transition _1".

  When a combination of "bell-bell-bell" called "middle bell" is displayed along the effective line, nine medals are paid out. When a combination of "replay-bell-replay" called "bell crossdown" is displayed along the active line, 14 medals are paid out.

  When a combination of “watermelon 1-bell-replay” called “Bell_Koyama_1” is displayed along the active line, 13 medals are paid out. "Belle_Koyama_2" is similar to "Bell_Koyama_1".

  When a combination of "replay-bell-red 7" called "bell_small V_1" is displayed along the effective line, 14 medals are paid out. "Bell_small V_2" and "bell_small V_3" are the same as "bell_small V_1".

  If a combination of “watermelon 1-bell-BAR” called “bell_crossup_1” is displayed along the active line, 13 medals are paid out. “Bell_Cross-up_2” or “Bell_Cross-up_8” is the same as “Bell_Cross-up_1”.

  When a combination of “replay-watermelon 1-red 7” called “upper bell_A_1” is displayed along the effective line, one medal is paid out. The “upper bell _A_2” and the “upper bell _A_3” are the same as the “upper bell _A_1”.

  When a combination of “replay-watermelon 2-red 7” called “upper bell _ B 1” is displayed along the active line, one medal is paid out. The “upper bell _ B_2” and the “upper bell _ B _3” are the same as the “upper bell _ B _ 1”.

  When a combination of “Replay-Cherry 2-Red 7” called “upper bell 1” is displayed along the effective line, one medal is paid out. The “upper bell 2” and the “upper bell 3” are the same as the “upper bell 1”.

  When a combination of “Bell-Cherry 1-BAR” called “upper watermelon 1” is displayed along the effective line, four medals are paid out. “Upper watermelon 2” is the same as “upper watermelon 1”.

  When a combination of “watermelon 1-replay-bell” called “middle right push role_1” is displayed along the effective line, one medal is paid out and the RT gaming state is in the RT0 gaming state Transition. The “middle right pushing service _2” to the “middle right pushing service _ 8” are the same as the “middle right pushing utility 1”.

  When a combination of "red 7-BAR- 蝙蝠" called "one-sheet combination A" is displayed along the effective line, one medal is paid out. "One sheet B" and "one sheet C" are the same as "one sheet A".

  When a combination of "BAR-watermelon 1-BAR" called "Chai A_1" is displayed along the effective line, one medal is paid out. "Chei A_2" to "Chei A_31" are the same as "Chei A_1".

  When a combination of "watermelon 2-cherry 1-BAR" called "Chei B_1" is displayed along the effective line, one medal is paid out. "Chei B_2" to "Chei B_19" are the same as "Chei B_1".

<Combination Table by Flag>
The flag-specific combination tables shown in FIG. 18 and FIG. 19 show combinations that are permitted to be displayed on the valid line in accordance with the internal winning combination. As internal winning combinations in the present embodiment, “MB”, “no transition Lip A”, “no transition Lip B”, “SB Lip 1”, “SB Lip 2”, “SB Tempai”, “RT 2 Lip 2nd” , "RT2 Lip 3rd", "RT2K Lip 1st", "RT3 Lip 2nd", "RT3 Lip 3rd", "K_K_RT4", "7_RT4_K", "77_RT4_K", "7_K_77", "77_K_7", "reach_reach" _K "," 7 "," 7 "," 10 "," RT4 transition A "," RT4 transition B "," BAR 10 "," Cheer cheep "," Che ch BAR lip "," RT4K lip 1st "," RT4K Lip 2nd "," RT4K Lip 3rd "," RT5K Lip 1st "," Confirmation Bell "," Strong Bell "," Medium Correct Answer Bell "," Right Correct Answer Bell " There is a "right 321 correct bell", "watermelon", "chance eyes A", "chance eyes B", "chance eyes C", "weak cherry" and "strong cherry".

  For example, when the internal winning combination is "MB", the main CPU 93 permits the combination of "MB" to be displayed on the effective line. That is, when the internal winning combination is "MB", it means that the internal winning combination is made to MB.

  Similarly, when the internal winning combination is "SB Lip 1", the main CPU 93 selects a combination of "Transition None Lip", "RT 0 Lip" and "Symbol Lip 1" to "Symbol Lip 6" on the effective line. Allow to be displayed on

  In addition, when the internal winning combination is "RT4 transition A", the main CPU 93 displays a combination of "no transition lip" and "RT4 transition lip_1" to "RT4 transition lip_13" on the effective line. Allow

  In addition, when the internal winning combination is "decisive bell", the main CPU 93 selects "bell_crossdown", "bell_koyama_1" to "bell_koyama_2", and "bell_small V_1" to "bell". Allows the combination of _small V_3 and “bell_crossup_1” to “bell_crossup_8” to be displayed on the effective line.

<Internal lottery table>
The plurality of internal lottery tables shown in FIG. 20 to FIG. 31 are stored in the main ROM 94 corresponding to each gaming state and each number of inserted sheets, and show winning probability of each flag with a denominator of 65536 for each of settings 1 to 6 There is. In particular, in the present embodiment, an internal lottery table when the number of inserted sheets is “3” will be described.

  Here, FIGS. 20 to 25 show an internal lottery table when three RTS in each RT gaming state are performed when the main gaming state is in the general gaming state which is not the MB gaming state. For example, in the case of setting 1 in FIG. 20, the probability of “falling” is “33502/65536”, the probability that “MB” is internally won is “3930/65536”, and “transition none” is “internal”. The probability of winning is "8431/65536", and the probability of "certain bell" being internal winning is "1/65536", "middle correct bell", "right 312 correct bell" and "right 321 correct bell" are The internal winning probability is “5579/65536” in all cases, and the probability of “strong cherry” being internal winning is “330/65536”.

  Further, FIGS. 26 to 31 show internal lottery tables when three RTS in each RT gaming state are performed when the main gaming state is in the MB gaming state. For example, in the case of setting 1 in FIG. 26, the probability of “off” is “0/65536”, the probability that “CB role” is internally won is “56558/65536”, and “CB role _ no transition” The probability of internal winning of “A” is “8431/65536”, and the probability of internal winning of “CB role_SB lip 1” is “393/65536”. Here, "CB role" is all minor roles except for replay.

<Roller stop initialization table>
The rotation stop initial setting table shown in FIG. 32 is information for stopping the reels 3L, 3C, 3R, and is predetermined according to the internal winning combination. The main CPU 93 refers to the rotation stop initialization table to acquire the rotation stop number corresponding to the internal winning combination, and acquires various data for stopping the reels 3L, 3C, 3R. There is.

  Specifically, in the winding stop initial setting table, in addition to the pressing data classified by pressing order in association with the rotation stop number, table number selection data, and first change data table number after first stop The first stop data table number, the first stop after the first stop, and the search order table number are defined in accordance with the game state. These various data indicate various table numbers to be selected in the stop control of the reels 3L, 3C, 3R in accordance with the progress of the unit game.

  “Pressing order-based determination data” includes a drawing priority order table number and a drawing priority order selection table number. The “draw-in priority order table number” is a number for selecting the pull-up priority order table shown in FIG. Also, “draw-in priority order selection table number” is a number for selecting a pull-in priority order selection table shown in FIG.

  "Table number selection data" is a value to be referred to when stopping all reels when the first stop reel is other than the left reel 3L, and includes a stop table number and a change status.

  The "stop table number" is a number for selecting a stop table (not shown) which is referred to when stopping all reels when the first stop reel is other than the left reel 3L.

  The “change status” of the table number selection data is data for changing the line status of each game representing the line referred to in the stop table selected based on the stop table number.

  The first stop after the first stop change data table number, the first stop after the first stop data table, and the first stop after the first stop after the first stop The first stop reel is the first stop, that is, the left reel 3L Is the data to be referred to.

  The “first cylinder stop data table number” is used to select a first cylinder stop data table to be referred to when stopping the first cylinder from the first cylinder stop data table shown as an example in FIG. It is a number.

  “Initial data after first cylinder first stop” is data referred to when the second and third cylinders are stopped, and includes table numbers and line statuses. The "table number" is a number for selecting (not shown) a first stop and first stop data table which is referred to when stopping the second and third stop reels.

  The "change status" of the initial data after the first stop of the first cylinder is the line status of each game representing the line to be referred to in the stop data table of the first stop after the first stop which is selected based on the table number. It is data to change.

  "First change after first stop data table number" is to select the first change after first stop data table (not shown) for changing initial data after first stop after first stop (not shown) Data of

  The “search order table number” is a number for selecting a search order table for determining the number of sliding symbols from the search order tables shown in FIGS. 36 and 37.

<Import priority table>
The drawing priority order table shown in FIG. 33 indicates which combination is to be drawn in preferentially among the plurality of combinations that can be displayed within the drawing range corresponding to the internal winning combination. In FIG. 33, data of a winning operation flag representing a combination of combinations is omitted.

  In the attraction priority order table, the priority of attraction of the combination represented by the winning operation flag is shown. The “drop-in priority data” is information provided for the main CPU 93 to identify the pull-in priority.

  For example, in the case of the attraction priority table number "00", if it is determined that there is a possibility that "7 rep _ RT 5 _ 01" and "RT 5 transition rip 1" to "RT 5 transition rip _ 16" may win, "RT 5 transition Since “7 RIP _RT5 _ 01” has higher priority than rip _1 ”to“ RT5 transition rip _ 16 ”, stop control of the rotating reels 3L, 3C, 3R is performed so that“ 7 rip _RT5 _ 01 ”is preferentially drawn. It will be.

<Import priority selection table>
In the drawing priority order selection table shown in FIG. 34, the drawing priority order table numbers for the stop operation types indicating the order of the reel stop operation are associated with each drawing priority order selection table.

  For example, in the drawing priority order table selection number "01", when the first stop operation is "left", the drawing priority order table number "03" is associated and the first stop operation is "right". In this case, the attraction priority table number "16" is associated.

  In the pull-in priority order table selection data "01", when the first stop operation is "left" and the second stop operation is "middle" at the time of the second stop operation ("left → middle" in the figure), In the case where the pull-in priority order table number “03” is associated, and the first stop operation is “right” and the second stop operation is “left” at the second stop operation (“right → left” in the figure), The drawing priority order table number "16" is associated.

<First cylinder stop data table>
The first drum stop data table shown in FIG. 35 is referred to when the left reel 3L is stopped when the first stop reel is the left reel 3L. In the first cylinder stop data table, sliding symbol number determination data and change status are defined for the symbol position data representing the position of each symbol. In the present embodiment, seven first cylinder stop data tables "00" to "07" are used.

  “Sliding piece number determination data” is referred to specify sliding piece number determination data in the search order table shown in FIGS. 36 and 37, and “change status” is changed after the first cylinder first stop not shown. Referenced to identify change status in data table.

<Search order table>
The search order tables shown in FIGS. 36 and 37 are referred to in order to determine the number of sliding symbols of each reel 3L, 3C, 3R. In the present embodiment, two search order tables "00" and "01" are used. In the search order table, the number of sliding symbols is associated with the number determination data of sliding symbols according to the priority order.

  For example, in the search order table “00” shown in FIG. 36, when the number of sliding symbols determination data is “3”, the number of sliding symbols “3” has the highest priority, and then the number of sliding symbols “1” , “0”, “4”, “2” in descending order of priority.

  In this case, when it is possible to display the combination corresponding to the internal winning combination on the effective line when the corresponding reel is slid by 3 pieces, the number of sliding symbols “3” is selected and corresponds to the internal winning combination. If the combination can not be displayed on the effective line, the priority order is lowered until the combination can be displayed on the effective line.

  If the combination corresponding to the internal winning combination can not be displayed on the effective line even if the priority is lowered to the number of sliding symbols “2”, or in the case of “off” where there is no internal winning combination, the highest priority The number of sliding pieces “3” having a high order is selected.

<Symbol-corresponding winning operation flag data table>
The symbol-corresponding winning operation flag data table shown in FIG. 38 defines the correspondence between reel types and data of internal winning combinations that can be displayed according to the symbols of the respective reels displayed on the winning determination line. That is, by referring to the symbol corresponding prize operation flag data table, it is possible to determine the internal winning combination that can be displayed at that time. In addition, a symbol corresponding prize operation flag data table is provided corresponding to the symbol combination table shown in FIG.16 and FIG.17.

  For example, when the symbol "red 7" is stopped and displayed on the winning determination line of the left reel 3L, in the storage areas 1 to 22 corresponding to the symbol code "00000010" (red 7) in the reel type "left", A "1" is stored in the bit corresponding to the internal winning combination that can be displayed. The data of the symbol code storage area is updated by the logical product of the data defined in the symbol-corresponding winning operation flag data table and the data stored in the symbol code storage area shown in FIG.

<Release reel action lottery table>
When there is no internal winning combination as shown in FIG. 39, the so-called "right push" is performed with the first stop operation as "right" and the third stop operation as "left" when there is no internal winning combination. It is a table referred to when performing lottery of whether to generate a lock in the next game on condition that the game is performed.

  Here, the "lock" is to invalidate the game operation by the player for a predetermined period. In this embodiment, during locking, so-called reel actions in which the reels 3L, 3C, 3R rotate in various rotation modes to artificially align “symbols” (“蝙蝠” in this embodiment) are used. It is feasible.

  In the reel action lottery table, when winning "None", no lock occurs and "Aim", "Aim", "Aim" (Symbol), and "Aim (Around one symbol) If you win, you will get a lock.

  Here, in the case of "targeting", a lock occurs, but in particular, no reel action is executed in the next game. Also, in the case of "target", the reel action is executed but the "symbols" are not pseudo-aligned.

  Further, in the case of "target (symbol alignment)" and "target (rotation after symbol alignment)", reel actions in which "symbols" are pseudo-aligned in different rotation modes are executed. In the present embodiment, the ART is determined when a lock with a reel action of “aiming (symbol alignment)” and “aiming (symbol alignment after one round)” occurs.

  Furthermore, in the out-of-reel action lottery table, the winning probability as to whether or not to generate the lock is different for each mode of “normal”, “chance”, “big chance”, “decision preparation” and “decision”. The distribution probability of the action is also different.

  For example, in the “normal” mode, the winning probability of “none” is the highest at “48273/65536”, and the winning probability of “target (symbol alignment)” and “target (one symbol after alignment)” determined by ART. Are extremely low at "133/65536" and "30/65536", respectively.

  Also, in the "big chance" mode, the winning probability of "Aim (Symbol)" and "Aim (Symbol one round)" has "30000/65536" and "4536/65536" respectively, "Normal" or "Normal" Much higher than the chance.

  Further, in the "determined" mode, only "aiming (symbol alignment)" and "aiming (symbol alignment after one round)" determined by the ART are won. Note that the mode of “prepare for confirmation” is a mode committed to shift to the mode for “determination”.

  In addition, each mode of "normal", "chance", "big chance", "decision preparation" and "decision" changes separately regardless of the transition of the main gaming state or the RT gaming state, and between these modes The transition is performed by the main CPU 93 based on the off reel action state transition lottery table shown in FIG. Thus, the main CPU 93 constitutes a mode transition means.

<Release reel action state shift lottery table>
The out-of-reel action state transition lottery table shown in FIG. 40 defines transition probabilities for each mode of “normal”, “chance”, “big chance”, “decision preparation” and “decision”.

  The transition of each mode is performed with different transition probabilities depending on the internal winning combination types (including “losing”). Here, as the internal winning classification role related to the transition of each mode other than "falling", "rip · MB", "pushing bell · CB in operation", "weak chain · watermelon · strong bell", "strong cherry・ There are chance eyes "and" decision ".

  As internal winning combinations included in the internal winning combination types of "Rip · MB", "MB", "no transition Lip A", "no transition Lip B", "SB Lip 1", "SB Lip 2", " There are RT2 RIP 2nd, RT2 RIP 3rd, 不 7, 不 77, and テ ン tempe.

  Further, as internal winning combinations included in the internal winning combination types of “push order bell and CB in operation”, there are “middle correct answer bell”, “right 312 correct answer bell” and “right right correct answer bell”. In addition, as internal winning combinations included in the internal winning combination of "weak tea, watermelon, strong bell", there are "strong bell", "watermelon" and "weak cherry".

  In addition, as internal winning combinations included in the internal winning combination of "strong cherry chance eyes", there are "chance eye B", "chance eye C" and "strong cherry". Furthermore, as internal winning combinations included in the internal winning combination type of "decision", there are "medium chelip", "decisive bell" and "chance A".

  For example, in the "normal" mode, in the case of "off" where there is no internal winning combination, most of the "normal" mode is maintained with the probability of "120/128", while the internal winning combination type is "weak" In the case of Choi, watermelon, strong bell or "strong cherry, chance", the mode shifts to "chance" or higher.

  Further, in the "description preparation" mode, the mode is transitioned or maintained to the "description preparation" or higher mode, regardless of "disappearing" and each internal winning combination type described above. Further, in the "confirmed" mode, the "fixed" mode is maintained except for the "fall". When the internal winning combination type is "confirmed", the mode shifts to the "fixed" mode in each mode except for "fixed preparation".

  In this manner, the main CPU 93 refers to the out-of-reel action state shift lottery table to determine whether to shift the mode from the current mode to a mode in which it is determined that locking will be performed in the next game. And a mode demotion and lottery means for performing lottery of whether or not to shift the mode from the current mode to a mode in which it is determined that the lock is to be performed in the next game is low.

<Special counter addition lottery table>
The special counter addition lottery table shown in FIG. 41 is a table that is referred to when it is determined whether the value of the special counter is to be added or not, triggered by internal winning of MB. The lottery values of "hit" and "out" in the special counter addition lottery table are both "64". Therefore, the winning probabilities of "hit" and "out" are both "64/128".

  Here, in the case of "hit", the value of the special counter is added, and in the case of "off", the value of the special counter is not added, and the lottery based on the release / lottery table shown in FIG. 43 is performed.

  As described above, the main CPU 93 constitutes special game addition determination means for determining whether or not to add to the special counter by referring to the special counter addition lottery table in the special counter processing (see FIG. 89) described later. The special counter addition lottery table is not limited to that shown in FIG. 41, and may be replaced with one shown in FIG.

<Release lottery table>
The release / lottery table shown in FIG. 43 is a table that is referred to when release / lottery according to the value of the special counter is performed when “off” is won as a result of referring to the above-mentioned special counter addition / lottery table.

  The release / lottery table has different “hit” winning probabilities based on the RT gaming state and the value of the special counter. For example, when the value of the special counter is “1” and “2” in “RT1 gaming state”, the winning probability of “hit” is “0/65536”, and “hit” will not be won. In the release / lottery table, the notation “counter 1” indicates that the value of the special counter is “1”. The same applies to “counter 2” and thereafter.

  In addition, when the value of the special counter is “3” or more in “RT1 gaming state”, “hit” is won with a winning probability of “28/65536”. Further, even in the “RT3 gaming state” to the “RT5 gaming state”, it is the same as the “RT1 gaming state”.

  As described above, the main CPU 93 refers to the release lottery table in the special counter processing (see FIG. 89) to be described later, and based on the value of the special counter, adds to the number of ART games played by the sub CPU 102 Configure special game release lottery means to determine whether.

  In this embodiment, "RT" only when the value of the special counter is "3" or more, regardless of whether the RT gaming state is "RT1 gaming state" or "RT3 gaming state" to "RT5 gaming state". A discharge lottery table is defined to win the The release / lottery table is not limited to the one shown in FIG. 43, and as shown in FIG. 44, the winning probability may be replaced with one that becomes higher as the value of the special counter increases.

[Configuration of storage area allocated to main RAM]
45 to 52 show various storage areas allocated to the main RAM 95.

<Internal winning combination storage area>
The internal winning combination storing area shown in FIG. 45 is formed of 22 storage areas of the internal winning combination storing areas 1 to 22. In the internal winning combination storing areas 1 to 22, data (bit) corresponding to the combination corresponding to the internal winning combination in the combination table classified by flag shown in FIGS. 18 and 19 is set to 1, and other data are set. It is reset to 0.

<Display combination storage area>
The display combination storing area shown in FIG. 46 represents a combination which can be displayed along the effective line after each of the reels 3L, 3C, 3R is stopped. That is, the display combination storing area represents an internal winning combination that is won after all of the reels 3L, 3C, 3R have stopped. The display combination storing area is used by the main CPU 93 to identify a combination displayed along the effective line after all of the reels 3L, 3C, 3R are stopped. The display combination storing area has the same structure as the internal winning combination storing area.

<Symbol code storage area>
The symbol code storage areas shown in FIG. 47 are allocated as many as the number of valid lines, and each symbol code storage area has data that can be displayed along each valid line set to 1, and for reels 3L, 3C, 3R Data corresponding to the combination that can not be displayed along the valid line is reset to 0 according to the stop position. Further, in the upper 4 bits of the symbol code storage area 1, a symbol code which has been stopped recently in the corresponding effective line is stored.

<Holding part storage area>
In the carryover combination storage area shown in FIG. 48, data relating to the carryover combination is stored. For example, on the condition that the main gaming state is the MB carryover state, bit 0 of the carryover combination storage area is set to "1", and the corresponding bit is reset to "0" on the condition that the MB is operated. Be done.

<Playing state flag storage area>
In the gaming state flag storage area shown in FIG. 49, data relating to the RT gaming state is stored. For example, on the condition that the RT gaming state has become the RT5 gaming state, bit 2 of the gaming state flag storage area is set to "1", and bits 3 to 7 are reset to "0".

  Further, on condition that the RT gaming state is in the RT4 gaming state, bit 3 of the gaming state flag storage area is set to "1", and bits 2, 4 to 7 are reset to "0". Also, on condition that the RT gaming state is in the RT3 gaming state, bit 4 of the gaming state flag storage area is set to "1", and bits 2, 3, 5 to 7 are reset to "0".

  Further, on condition that the RT gaming state is in the RT2 gaming state, bit 5 of the gaming state flag storage area is set to "1", and bits 2 to 4, 6, 7 are reset to "0". Further, on condition that the RT gaming state is in the RT1 gaming state, the bit 6 of the gaming state flag storage area is set to "1", and the bits 2-5 and 7 are reset to "0". Further, on the condition that the RT gaming state has become the RT0 gaming state, bit 7 of the gaming state flag storage area is set to "1", and bits 2 to 6 are reset to "0".

<Actual stop button storage area>
The operation stop button storage area shown in FIG. 50 stores the states of the stop buttons 17L, 17C, and 17R. Bit 0 corresponds to the stop button 17L, and when the stop button 17L is operated, "1" is stored in bit 0.

  Similarly, bit 1 corresponds to the stop button 17C, and "1" is stored in bit 1 when the stop button 17C is operated. Also, bit 2 corresponds to the stop button 17R, and "1" is stored in bit 2 when the stop button 17R is operated.

  Bit 4 corresponds to the stop button 17L, and when the stop button 17L is valid, "1" is stored in the bit 4. Bit 5 corresponds to the stop button 17C, and when the stop button 17C is valid, "1" is stored in bit 5. The bit 6 corresponds to the stop button 17R, and when the stop button 17R is valid, "1" is stored in the bit 6.

  In the present embodiment, the effective stop button corresponds to the stop button 17L, 17C, 17R corresponding to the rotating reels 3L, 3C, 3R and capable of detecting the stop operation by the main CPU 93.

<Pressing order storage area>
The pressing order storage area shown in FIG. 51 is an area for storing information indicating the pressing order of the three stop buttons 17L, 17C, and 17R. Bit 0 corresponds to the pressing order "left → middle → right", and "1" is stored in bit 0 when the pressing order is "left → middle → right", and the other bits are "0". It is reset.

  Similarly, bit 1 corresponds to the pressing order "left → right → middle", bit 2 corresponds to the pressing order "middle → left → right", and bit 3 corresponds to the pressing order "middle → right → left" The bit 4 corresponds to the pressing order "right → left → middle", and the bit 5 corresponds to the pressing order "right → middle → left".

<Import priority data storage area>
The drawing priority data storage area shown in FIG. 52 includes a left reel drawing priority data storage area, a middle reel drawing priority data storage area, and a right reel drawing priority data storage area. The contents of the middle reel pull-in priority data storage area and the right reel pull-in priority data storage area are the same as those of the left reel pull-in priority data storage area. The data storage area will be described.

  The left reel pull-in priority data storage area stores pull-in priority data for each of the symbol position data. For example, among the draw-in priority order data of the draw-in priority order table shown in FIG. 33, any draw-in priority order data based on the status of the internal winning combination and the other reels 3C and 3R is stored for each symbol position.

[Data table referenced by sub CPU]
<Sub-judge holder number list>
The sub CPU 102 is configured to perform various types of lottery by the sub determination role corresponding to the internal winning combination and the lock number, in addition to the internal winning combination. In the present embodiment, sub-judge number numbers "0" to "17" are defined.

  FIG. 53 shows the correspondence between the sub determination role numbers and the names. The sub CPU 102 identifies the sub determination role by the sub determination role number, but in the present embodiment, the name of the sub determination role is used instead of the sub determination role number in order to facilitate understanding of the invention. explain.

  As shown in FIG. 53, the sub-decision player is “Loss”, “MB”, “rip”, “rip special”, “bell”, “strong bell”, “watermelon”, “weak che”, “strong che , "Cheer + R1", "Cheer Chep", "Cheer Chep + BAR", "Chance Eye", "Chance Eye", "Chance Eye + R1", "Chance Eye + R2", "Defining Part 1" and "Finalized There is a role 2 ".

<Sub-judge role identification table>
The sub-determination-combination identification table shown in FIG. 54 represents a sub-determination combination associated with the internal winning combination and the lock number. For example, when the internal winning combination is "weak cherry", when the lock number is "0", "1" or "6" to "10", the sub-judge is "weak", and the lock number is In the case where “2” or “5”, “decision part 1” is obtained.

<Number of games plus lottery table>
The number-of-games addition lottery table shown in FIG. 55 is referred to when the number of games to be added to the ART is extracted, and a lottery value of the number of games added to the ART is associated with the sub-decision player.

  In the present embodiment, for example, when the sub-decision player is "weak", "0 game" wins with probability "31968/32768" and "10 games" with probability "100/32768". Winning, "20 games" wins with a probability of "200/32768", "30 games" wins with a probability of "500/32768".

<Additional selected payout table>
The addition selection payout table shown in FIG. 56 shows a list of tables used at the time of addition selection. In each table, the number of games for each element to which IDs “1” to “15” are assigned is associated by the additional selected payout table.

  For example, in the table 12, "10 games" are associated with each element of "ID 1" to "ID 13", "100 game" is associated with the element of "ID 14", and an element of "ID 15" "300 games" is associated with.

  The respective elements are randomly arranged and displayed on the liquid crystal display device 11 by the sub CPU 102 so that the number of associated games can not be identified at the time of the addition selection. Here, the element associated with “0 game” represents that the element is not displayed on the liquid crystal display device 11 at the time of addition selection. For example, in the “table 17”, five elements “ID1” to “ID5” are displayed on the liquid crystal display device 11. In addition, although the element with which "0 game" was matched is displayed on the liquid crystal display device 11 at the time of addition selection, you may make it unselectable.

<ART first hit when added selection lottery table>
In the ART first hit upon addition selection lottery table shown in FIG. 57, lottery values are respectively associated with winning / not winning of the addition selection at ART first hit and the table used at the time of winning.

  For example, according to the ART first hit addition selected lottery table shown in FIG. 57, the lottery result is not won with the probability of “28665/32768”, “table 13” is won with the probability of “150/32768”, and “100 / "Table 14" wins with a probability of 32768 ".

<ART addition selection lottery table>
In the ART added selection lottery table shown in FIGS. 58 and 59, the winning / not winning of added selection and the lottery value of the table used at the winning are associated with the sub-decisionist in ART, respectively. There is.

  According to the ART added selection lottery table shown in FIGS. 58 and 59, for example, when the sub-decision player is "strong check", the lottery result is not won with the probability of "21913/32768" and "3500/32768" "Table 1" wins with the probability, and "Table 2" wins with the probability of "1000/32768".

<Normal addition selection selection lottery table>
In the normal addition selection lottery table shown in FIGS. 60 and 61, the lottery values of the winning selection / non-winning of the addition selection and the table used at the time of winning correspond to the sub-decision members in normal time not in ART. It is attached.

  According to the normal addition selection lottery table shown in FIGS. 60 and 61, for example, when the sub-decision player is "weak check", the lottery result is not won with the probability of "31092/32768" and "1600/32768" "Table 1" wins by the probability, and "table 2" wins by the probability of "70/32768".

<Special function trigger lottery table>
In the special function activation lottery table shown in FIG. 62, the special function is activated / non-activated with respect to the sub-judge who wins with the peep activation flag being “peep operation in progress” at the time of winning the additional selection. The lottery values are associated with the special function types of.

  Here, the special function is a function called "crush" that is displayed so that the number of games associated with at least one of the elements displayed on the liquid crystal display device 11 can be identified at the time of addition selection. It includes a function called "peep watch" in which a plurality of elements are displayed so that the number of games respectively associated with the elements displayed on the display device 11 can be identified.

  According to the special function activation lottery table shown in FIG. 62, for example, when the sub-decision player is "bell", "peep" is won with the probability of "327/32768" and the sub-judgment member is "strong bell". In the case, "crush" is won with the probability of "8192/32768".

<Smashed number lottery table>
The crush number lottery table shown in FIG. 63 is referred to when the "crush" is activated as a special function, and the number of elements that can be identified by the number of games is associated with the number of elements displayed on the liquid crystal display device 11. ing.

  For example, when the number of elements displayed on the liquid crystal display device 11 is five, that is, when there is a table having 10 elements to which "0 game" is associated, according to the crushed number lottery table shown in FIG. Is displayed so that the number of games associated with one element can be identified with the probability of "20768/32768", and the number of games associated with two elements can be identified with the probability of "8000/32768" And the number of games associated with the three elements can be identified with a probability of "4000/32768".

<Additional selection continuation rate lottery table>
The additional selection continuation rate lottery table shown in FIG. 64 and FIG. 65 is the ART first hit additional selection random selection table shown in FIG. 57, the ART additional selection random selection table shown in FIG. 58 and FIG. 59, or FIG. A lottery value of a continuation rate of addition selection is associated with a table (hereinafter, simply referred to as “base table”) won based on the normal addition selection lottery table shown in FIG.

  According to the additional selection continuation rate random determination table shown in FIGS. 64 and 65, for example, when the base table is “table 11,” “continuation rate 1%” is won with the probability of “24903/32768” and “6000 / "Continuity rate 33%" wins with probability 32768 ", Continuity 50% wins with probability" 1500/32768 ", Continuity 66% wins with probability" 300/32768 " "The continuation rate 80%" wins with the probability of "60/32768", and "the continuation rate 90%" wins with the probability of "5/32768".

<Additional selection continuation state lottery table>
The addition selection continuation state lottery table shown in FIG. 66 is the continuation / non-continuation of addition selection with respect to the sub-judge for each continuation ratio determined based on the addition selection continuation ratio lottery table shown in FIGS. 64 and 65. And the continuation value at the time of continuation are associated with the lottery value.

  According to the addition selection continuation state lottery table shown in FIG. 66, for example, when the sub-decision player is "bell" at "continuation rate 90%", the lottery result is discontinued with the probability of "3467/32768", "Continuation A" wins with the probability of "16100/32768", "Continuation B" wins with the probability of "300/32768", "Continuation D" wins with the probability of "12600/32768", "300" "Continuation E" wins with a probability of / 32768 ", and" continuation F "wins with a probability of" 1/32768 ".

<Additional selection payout lottery table>
The addition selection payout lottery table shown in FIG. 67 is a continuation state, that is, continuation / non-continuation of addition selection and a table used at continuation to the base table for each “continuation A” to “continuation F”. The lottery values of are associated with one another. In FIG. 67, only the "Continuation A" additional selected payout lottery table is illustrated, and the other continuous additional selected payout lottery tables are not illustrated.

  According to the additional selected payout lottery table shown in FIG. 67, for example, when the base table is “1” in “continuation A”, “table 1” wins with the probability of “20000/32768” and “5000/32768”. "Table 2" wins with probability of "Table 3" wins with probability of "2000/32768", "Table 10" wins with probability of "543/32768", and "150/32768" "Table 11" wins with probability.

<Additional game lottery table>
In the additional game lottery table shown in FIG. 68, winning / non-winning lottery values of the stock of the additional game are associated with the sub-decision players in the additional game. According to the additional game lottery table shown in FIG. 68, for example, when the sub-decision player is "weak", the stock of the additional game is not won with the probability of "32605/32768" and with the probability of "163/32768". Win a stock of extra games.

<ART direct hit lottery table>
The ART direct hit lottery table shown in FIG. 69 is referred to when the ART is not in progress or in ART preparation, and for each set value, a lottery value of ART disconnection / hit is associated with the sub-judge.

  According to the ART direct hit lottery table shown in FIG. 69, for example, when the sub-decision player in "setting 6" is "strong check", it will be "off" in ART with the probability of "32640/32768", "128 / It hits the ART with a probability of 32768 ".

<ART addition game direct match random lottery table>
In the ART-plus-game directly-sorted lottery table shown in FIG. 70, winning / non-winning lottery values of the stock of the plus game are respectively defined. According to the ART-plus-game directly-sorted lottery table shown in FIG. 70, the bonus game stock is not won with the probability of “30068/32768”, and the bonus game stock is won with the probability of “2700/32768”.

<Step-up sequence table>
The step-up sequence table shown in FIG. 71 is referred to by the sub CPU 102 when the main CPU 93 decides to lock and the sub CPU 102 decides step-up effect as the effect content. In the step-up sequence table, a sequence of effect data including a liquid crystal effect number and shutter operation data is associated with the lock number. Note that the remarks column in FIG. 71 is provided for the convenience of description, and is not included in the step-up sequence table.

  In the step-up sequence table shown in FIG. 71, the liquid crystal effect represents the type of liquid crystal effect performed by the liquid crystal display device 11. In the present embodiment, as the liquid crystal effects, there are effects of “effect 1” to “effect 6”, and the effect contents are different.

  The shutter operation data represents the type of a shutter operation sequence table described later. In the present embodiment, the shutter operation data includes shutter operation data specified by “Y1” to “Y8”, and these shutter operation data Y1 to Y8 are stored in the shutter operation sequence tables of FIGS. 72 to 79 described later. It corresponds. In the step-up sequence table, shutter operation data corresponding to the lock number is assigned at a predetermined timing.

  Here, the shutter operation data Y1 is an operation to lower the shutter members 201, 202, 203 and 204 at the exposure position (the position shown in FIG. 8) to the shielding position (the position shown in FIG. 9) %, That is, data corresponding to the shutter operation sequence table (see FIG. 72) for performing the operation of closing the shutter.

  In addition, the shutter operation data Y2 is a shutter operation sequence table (FIG. 73) for performing an operation (vibration at 100% elevation position) to vibrate the shutter members 201, 202, 203 and 204 at the blocking position (position shown in FIG. 9). Data).

  The shutter operation data Y3 is an operation to raise the shutter members 201, 202, 203 and 204 in the shielding position (the position shown in FIG. 9) to the exposure position (the position shown in FIG. 8) , That is, data corresponding to a shutter operation sequence table (see FIG. 74) for performing an operation of opening the shutter.

  The shutter operation data Y4 is a shutter operation sequence table (FIG. 75) for performing an operation (vibration at 0% elevation position) to vibrate the shutter members 201, 202, 203 and 204 at the exposure position (position shown in FIG. 8). Data).

  The shutter operation data Y5 is a shutter operation sequence for performing an operation (rotation 0% → rotation 50%) to rotate the shutter members 201, 202, 203, 204 at the shielding position (the position shown in FIG. 9) by 90 °. It is data corresponding to a table (see FIG. 76).

  Further, the shutter operation data Y6 performs an operation (oscillation at the 50% rotation position) for vibrating the shutter members 201, 202, 203 and 204 in the half open state (50% rotation) at the exposure position (the position shown in FIG. 8). Data corresponding to the shutter operation sequence table (see FIG. 77).

  In addition, the shutter operation data Y7 is a state before the shutter members 201, 202, 203, 204 in the half open state (50% rotation) or the reverse state (100% rotation) at the blocking position (the position shown in FIG. 9). It is data corresponding to a shutter operation sequence table (see FIG. 78) for performing an operation (rotation 50% or rotation 100% → rotation 0%) to return to the state (rotation 0%).

  In the shutter operation data Y8, the shutter members 201, 202, 203 and 204 in the state before rotation (rotation 0%) or in the half open state (rotation 50%) at the blocking position (position shown in FIG. 9) are reversed. It is data corresponding to a shutter operation sequence table (see FIG. 78) for performing an operation (rotation 0% or rotation 50% → rotation 100%) to rotate to the state (rotation 100%).

  In addition, the LED is an LED for lighting a pair of eyes 701 formed on the upper exterior member 7a (simply referred to as "eyes" in FIG. 71) and light irradiation for irradiating light to the shutter members 201, 202, 203 and 204. The light emission pattern and lighting pattern of the LEDs 401, 402, 403, and 404 (in FIG. 71, simply denoted as "shutter") of the device 400 are shown.

  For example, the light emission pattern of the "eye" may be lighted in any of the colors "white", "blue", "red", and "rainbow", and may be extinguished. The lighting pattern of the "shutter" includes lighting and extinguishing.

  In addition, counting is performed at various counts (for example, liquid crystal effects), assuming that the time required for the sub CPU 102 to receive a no-operation command from the main CPU 93 ("about 17 ms" in this embodiment) is one count. Indicates the value of the step counter that defines whether to execute or end the shutter operation and the operation related to the LED.

  The sub CPU 102 executes or terminates the various operations described above on condition that the value of the no-operation command reception counter, which is incremented by one each time the no-operation command is received, becomes equal to or more than the value of the step counter.

  For example, when the lock number 1 is determined, the sub CPU 102 causes the liquid crystal effect according to “effect 1” and the shutter operation according to the shutter operation data Y4 until the value of the no-operation command reception counter becomes “124”. The operation is performed such that the "eye" emits light in white and the "shutter" is turned on. Note that “time (ms)” described in the remarks is an approximate duration of these operations (= about 17 ms × 124 counts).

  Further, in the present embodiment, “0”, “1” and “2” are defined as triggers. When the trigger is "0", "none" and "1" are "pressing the MAX bet button 14" as no-operation command input information, the value of the no-operation command reception counter is defined in the step counter. Even if it is not more than the value, it is defined that the step-up sequence table is updated, that is, it shifts to the next operation.

  Also, “2” changes the step-up sequence table to the set position of trigger “1” when the value of the no-operation command reception counter reaches or exceeds the value of the specified step counter (loop to trigger “1”) Stipulates that The end of the loop to the trigger "1" depends on the program executed by the sub CPU 102.

<Shutter Operation Sequence Table>
In each shutter operation sequence table of FIGS. 72 to 79, the motors (right and left elevation motors 240A and 240B for raising and lowering the shutter, and rotation motors 231 for rotating the shutter) with prescribed pulse width and pulse number in the order of step numbers. The motor control direction is defined.

  In FIG. 72 to FIG. 79, “lift left” indicates the motor control direction of lift motor 240A, “lift right” indicates the motor control direction of lift motor 240B, and “rotation” indicates motor control of rotary motor 231. Indicates the direction.

  Here, the pulse width in each shutter operation sequence table represents the time on one side of the ON or OFF waveform, and the duty ratio of the pulse in the present embodiment is 1: 1. Therefore, “one pulse” in each shutter operation sequence table is pulse width × 2 (ms).

  For example, in a certain step, when the pulse width is 5 ms and the number of pulses is defined as 5, the processing time of the step is 5 ms × 2 × 5 = 50 ms. However, at the time of holding of the motor, which will be described later, only the OFF waveform is provided, so that the defined pulse width is one pulse.

  Moreover, "Non" in the column of the motor control direction indicates that data is not registered. For this reason, the motor described as "Non" in the column of the motor control direction is a motor not to be controlled. Note that "Non" in the motor control direction column is a notation for convenience, and 0xffff ("0x" is a hexadecimal identification symbol) or a value of -1 is defined as "Non".

  Also, "H" in the column of motor control direction represents holding the motor without excitation. For example, when the pulse width is 20 ms and the number of pulses is 1, it indicates that the motor is held for 20 ms without excitation. Note that "H" in the motor control direction column is a notation for convenience, and the value of 0x8 fff ("0x" is a hexadecimal identification symbol) is defined as "H".

  The left and right lifting motors 240 for lifting and lowering the shutters are excited in opposite phases from each other because of their mounting orientations, so they are respectively driven in the combination of "+-" and "-+".

  FIG. 72 shows a shutter operation sequence table corresponding to the shutter operation data Y1. As shown in FIG. 72, the shutter operation sequence table corresponding to the shutter operation data Y1 defines an operation sequence for closing the shutter.

  Here, in the case of the step number “3”, the process proceeds to the step of the step number “4” on the condition that the descent sensor 271 (see FIG. 6) in the special condition column detects that the shutter is lowered. It indicates that there is an intermediate process (process corresponding to S426, S427, and S431 to S433 in FIG. 106). The special processing in the column of special conditions is the same as in FIGS. 74, 78, 79, and 81 described later.

  The pulse number "300" defined here is the maximum number of excitations of the motor in one step defined for motor protection. Therefore, even if the pulse number "300" is exceeded, if the descent sensor 271 (see FIG. 6) does not detect that the shutter is lowered, it is processed as if an abnormality occurs in the lift motor 240A or 240B. It has become. Specifically, the movement of the shutter members 201, 202, 203 and 204 is stopped until the next power failure recovery (the power of the pachi-slot machine 1 is turned off once and then the power is turned on).

  FIG. 73 shows a shutter operation sequence table corresponding to the shutter operation data Y2. As shown in FIG. 73, the shutter operation sequence table corresponding to the shutter operation data Y2 defines an operation sequence for vibrating the shutter at the elevation 100% position.

  By executing the operation sequence shown in FIG. 73, vibration (blind vibration) occurs with the shutter closed. At this time, the shutter is not half-opened (blind closed).

  FIG. 74 shows a shutter operation sequence table corresponding to the shutter operation data Y3. As shown in FIG. 74, the shutter operation sequence table corresponding to the shutter operation data Y3 defines an operation sequence for opening the shutter.

  Here, in the case of the step number “2”, the process proceeds to the step of the step number “3” on the condition that the origin sensor 270 (see FIG. 6) detects that the shutter is at the origin.

  Also in this operation sequence, as in the operation sequence shown in FIG. 72, the elevation motor can not be detected if the origin sensor 270 (see FIG. 6) does not detect that the shutter is at the origin even if the pulse number "300" is exceeded. It is processed as if an abnormality has occurred in 240A or 240B. Specifically, the movement of the shutter members 201, 202, 203 and 204 is stopped until the next power failure recovery (the power of the pachi-slot machine 1 is turned off once and then the power is turned on).

  FIG. 75 shows a shutter operation sequence table corresponding to the shutter operation data Y4. As shown in FIG. 75, the shutter operation sequence table corresponding to the shutter operation data Y4 defines an operation sequence for vibrating the shutter at the 0% elevation position.

  By executing the operation sequence shown in FIG. 75, the shutter vibrates (lifts and lowers) with the shutter opened.

  FIG. 76 shows a shutter operation sequence table corresponding to the shutter operation data Y5. As shown in FIG. 76, the shutter operation sequence table corresponding to the shutter operation data Y5 defines an operation sequence for rotating the shutter which is neither reverse nor half open by 90 ° (rotation 0% → rotation 50%), which will be described later. This is also the data corresponding to the start of peeping when “peeping presence” is set in the peeping activation flag in step S922 (see FIG. 144) of the lottery processing during first additional selection.

  By executing the operation sequence shown in FIG. 76, the shutter is closed (blind open) while the shutter is closed.

  FIG. 77 shows a shutter operation sequence table corresponding to the shutter operation data Y6. As shown in FIG. 77, the shutter operation sequence table corresponding to the shutter operation data Y6 defines an operation sequence for vibrating the shutter in a half-opened state (50% rotation).

  By executing the operation sequence shown in FIG. 77, the shutter is closed and vibrates (blind vibration) in the half-opened state.

  FIG. 78 shows a shutter operation sequence table corresponding to the shutter operation data Y7. As shown in FIG. 78, the shutter operation sequence table corresponding to the shutter operation data Y7 is in the state before the reverse of the shutter in the half open state (50% rotation) or the reversed state (100% rotation) (0% rotation) If the peeping activation flag is set to "peeping" in step S922 (see FIG. 144) of the first additional selection, which will be described later, the peeping state is determined. It is data to finish.

  Here, in the step number “2”, the process proceeds to the step of the step number “3” on condition that the rotation sensor 272 (see FIG. 6) detects that the shutter is at the rotation origin. Also in this operation sequence, as in the operation sequence shown in FIG. 72, even if the number of pulses exceeds “300”, rotation sensor 272 (see FIG. 6) does not detect that the shutter is at the rotation origin. It is processed as that which abnormality generate | occur | produced in the motor 231. FIG. Specifically, the movement of the rotation mechanism 230 is stopped until the next power failure recovery (once the power of the pachi-slot machine 1 is turned off and then the power is turned on).

  FIG. 79 shows a shutter operation sequence table corresponding to the shutter operation data Y8. As shown in FIG. 79, the shutter operation sequence table corresponding to the shutter operation data Y8 is an operation sequence for inverting the shutter in the state before rotation (rotation 0%) or half open state (rotation 50%) (rotation 100%) It prescribes.

  Here, in the case of the step number “2”, the process proceeds to the step of the step number “3” on the condition that the rotation sensor 272 (see FIG. 6) detects that the shutter is in the reverse state. .

  Also in this operation sequence, as in the operation sequence shown in FIG. 72, even when the pulse number “300” is exceeded, it is not detected that the shutter is in the inverted state by the rotation sensor 272 (see FIG. 6). It is processed as that which abnormality generate | occur | produced in the rotary motor 231. As shown in FIG. Specifically, the movement of the rotation mechanism 230 is stopped until the next power failure recovery (once the power of the pachi-slot machine 1 is turned off and then the power is turned on).

<Shutter operation combination determination table>
The shutter operation combination determination table shown in FIG. 80 is a table for reconstructing the shutter operation sequence for the purpose of shutter operation protection based on the previously executed shutter operation and the shutter operation performed this time. Note that the shutter operation combination determination table corresponds to a product operation consistency table for securing the consistency of the shutter operation. Further, the shutter operation combination determination table is configured to be able to register a plurality of shutter operation effects (feature effects) based on the determination result of the consistency of the operation of the shutter.

  If the shutter is operated with the wrong combination of motion sequences, the originally unintended motion may be performed and the shutter may not move. For example, if the raising operation of the shutter is performed in a state where the shutter is inverted, damage to the elevation unit 206 or the like, burn-in of the elevation motor 240, or the like may occur, which may cause deterioration.

  In the present embodiment, when the combination of operations results in a combination of (error) operation sequences that inhibit the operation of the shutter device 200, the operation sequence is reconstructed using the shutter operation combination determination table. A reasonable operation can be imposed on the shutter, and the above-mentioned problems can be prevented.

  FIG. 81 exemplifies the combination of operation sequences stored in the shutter operation sequence storage area when the previous shutter operation data is “Y6” and the present shutter operation is “Y4”.

  When the shutter operation data is "Y6" last time and the shutter operation is a combination of "Y4" this time, the shutter is vibrated at the 50% elevation position, and then it is oscillated at the 0% elevation position. It can not be executed in combination with the operation sequence.

  Therefore, when the previous shutter operation data is "Y6" and the current shutter operation is a combination of "Y4", an operation sequence of shutter operation data Y7, Y3 and Y4 in order based on the shutter operation combination determination table shown in FIG. The combination of is reconstructed.

  The combination of the operation sequences reconstructed in this way is stored in the shutter operation sequence storage area as shown in FIG. The shutter operation sequence storage area is assigned to the sub RAM 104.

  Here, the sub CPU 102 configures an effect execution unit that executes the effect in steps according to the operation sequence stored in the shutter operation sequence storage area. Further, when the lock effect is being executed, the sub CPU 102 executes each step of the effect based on the cycle of reception of the non-operation command. The sub CPU 102 executes the effect operation by the shutter based on the execution of each step of the effect.

<Internal winning combination table for penalty judgment>
The internal determination combination table table for penalty determination shown in FIG. 82 represents a group of internal combination combinations referred to at the time of setting a penalty by the sub CPU 102. Note that the penalty means setting a state disadvantageous to the player (for example, not performing ART lottery). As described above, the sub CPU 102 configures a disadvantageous state setting unit that sets a penalty by referring to the internal determination combination table for penalty determination in a penalty setting process (see FIG. 120) described later.

  In the internal judgment combination table for penalty determination, the first to fourth award combinations are defined as the internal award combinations. The first winning combination group has internal winning combinations of “Dear”, “MB”, “No Transition Lip 1”, “No Transition Lip 2”, “SB Lip 1”, “SB Lip 2” and “SB Tempai” It consists of

  The second winning combination is “RT2 Lip 2nd”, “RT2 Lip 3rd”, “RT2K Lip 1st”, “RT3 Lip 2nd”, “RT3 Lip 3rd”, “Medium Correct Bell”, “Right 312 Correct Bell” and "Right 321 correct bell" is composed of each internal winning combination.

  The third winning combination group is “Attack”, “MB”, “No Transition Lip 1”, “No Transition Lip 2”, “SB Lip 1”, “SB Lip 2”, “SB Tempai”, “RT 2 Lip 2nd ',' RT2 Lip 3rd ',' RT2K Lip 1st ',' RT3 Lip 2nd ',' RT3 Lip 3rd ',' Medium Correct Answer Bell ',' Right 312 Correct Answer Bell 'and' Right 321 Correct Answer Bell ' It consists of

  The fourth winning combination group is constituted by internal winning combinations of "middle correct bell", "right 312 correct bell" and "right 321 correct bell".

<Error management area allocation table>
The error management area allocation table shown in FIG. 83 is referred to when the sub CPU 102 specifies the type of an error that has occurred when the main CPU 93 or the sub CPU 102 detects an error in the pachislot machine 1. The sub CPU 102 identifies the type of error that has occurred by referring to the error management area allocation table, and stores the identified error in the error management area of the sub RAM 104.

  In the error management area allocation table, an error occurrence source is associated with the type of the error. Sources of errors include "main", "sub", "main-sub", "sound", "lamp" and "shutter".

  Here, various errors relating to the main control board 41 (main CPU 93) and various devices (a hopper device, a medal auxiliary storage, a selector, a reel) connected to the main control board 41 (main CPU 93) are assigned to "main".

  For example, "DO" indicates a door open error that occurs when the front door 2b (see FIG. 2) is open, and "EE" indicates that each reel has stopped at a combination of symbols that does not hold true from the internal winning combination. Indicates an illegal hit error that occurs in.

  “HJ” indicates a hopper jam error that occurs when a medal is clogged in the hopper device 43 (see FIG. 3), and “HE” occurs when the hopper device 43 can not pay out a medal. Indicates hopper empty error.

  "CR" indicates an inserted medal retrogression error that occurs when the upstream and downstream medal sensors 46 (see FIG. 3) in the selector detect medals in the reverse order, and "CO" indicates the medals. The medal full error which occurs when the auxiliary storage switch 57 (see FIG. 3) is electrically conducted through the medals is shown.

  Also, "CJ" indicates an insertion medal passage check error that occurs when the medal sensor 46 does not detect the medal normally, and "CE" indicates that the medal sensor 46 has detected the medal for a predetermined time or more. Indicates the insertion medal passing time error that occurs in the case.

  Further, various errors relating to various devices mounted on the sub control board 42 are assigned to “sub”. For example, “GPU abnormality” is a high heat detection error that occurs when the detection temperature of a not-shown thermo sensor attached to the rendering processor (VDP, GPU, etc.) 105 reaches a predetermined temperature (for example, 100 ° C.) It shows.

  Also, “power failure abnormality” indicates a power failure detection error that occurs when the sub CPU 102 (see FIG. 5) is started without performing power failure detection processing normally, and “backup” is at power failure recovery. This shows a backup error that occurs when there is a sum value error in the backup area of the sub RAM 104.

  Further, various errors relating to command data (serial communication) transmitted from the main CPU 93 to the sub CPU 102 are assigned to “main-sub”. For example, “sequence” indicates a command sequence error that occurs when valid commands can not be received in a prescribed order.

  “Sum” is a command sum error that occurs when the sum operation result of the received command data excluding the sum value (also referred to as “SUM data”) of the received command data is different from the sum value of the received command data. “Command” indicates that the received command is “01H” to “10H” (01H and 10H) corresponding to various commands (eg, start command, reel stop command, no operation command, etc.) transmitted by the main CPU 93. "H" is a meaning of a hexadecimal number, and indicates, for example, a command error that occurs when 10H represents "16" in decimal number. Although the sum value is calculated by addition in the present embodiment, the present invention is not limited to this, and the sum value may be calculated by subtraction or exclusive OR.

  Further, “reception abnormality” is a main-sub reception error that occurs when there is a physical layer error (parity, fleming, overrun) in the reception data from the main CPU 93, and communication between the sub CPU and the sound IC It includes a reception error between the sound ICs which occurs when there is an abnormality, and a reception error between the LED boards which occurs when there is an abnormality in the communication between the sub CPU and the LED board.

  In addition, "non-communication" and "reception abnormality" are assigned to "sound" as various errors related to various devices (sound IC, amplifier) mounted on the sound I / O board 71 (see FIG. 3). There is.

  In addition, “no communication” and “reception abnormality” are assigned to the “lamps” as various errors related to the device (I2C communication IC) mounted on the LED substrate 72 (see FIG. 3).

  Further, various errors related to various sensors (the origin sensor 270, the lowering sensor 271, and the rotation sensor 272) connected to the shutter control board 78 (see FIG. 3) are assigned to the "shutter".

  For example, “rotation” means that the shutter is at the rotation origin by the rotation sensor 272 (see FIG. 6) even if the number of pulses exceeds “300” when the shutter is rotated according to the operation sequence shown in the shutter operation data Y7, Y8. Or an abnormality in the operation of the rotary motor 231 which occurs when it is not detected that the shutter is in the reverse state.

  Also, “right (down)” detects that the shutter is lowered by the descent sensor 271 (see FIG. 6) even if the pulse number exceeds “300” when closing the shutter according to the operation sequence shown in the shutter operation data Y1. It shows an abnormality in the operation of the lift motors 240A and 240B which occurs when the operation is not performed.

  Also, “left (upper)” indicates that the shutter is at the origin by the origin sensor 270 (see FIG. 6) even if the number of pulses exceeds “300” when the shutter is opened according to the operation sequence shown in the shutter operation data Y3. It shows an abnormality in the operation of the lift motors 240A and 240B that occurs when no detection is performed.

  When at least one of the various error factors described above is set in the error management area of the sub RAM 104, an error screen is displayed on the liquid crystal display device 11 as shown in FIG.

  In the error screen, an abbreviation (for example, “CE” to “DO” surrounded by a square in the middle in FIG. 166) to make it easy to understand an error occurring in response to an error detected by the main CPU 93. Is highlighted. This makes it possible to easily recognize from the outside which error is occurring.

[Main control processing]
The main CPU 93 of the main control board 41 executes various processes in accordance with the flowcharts shown in FIGS.

<Main control process>
FIG. 84 is a flowchart showing main control processing. The main control process described below starts when the pachi-slot machine 1 is powered on.

  First, when the pachi-slot machine 1 is powered on, the main CPU 93 executes a power-on process shown in FIG. 85 (S10). In the power-on process, it is determined whether the backup is normal or whether the setting has been properly changed, and the initialization process is performed according to the determination result.

  Next, the main CPU 93 executes an initialization process at the end of one game (one unit game) (S11). In this initialization process, for example, a storage area designated in advance to be initialized at the end of one game is initialized. By this initialization process, data stored in the internal winning combination storing area and the display combination storing area of the main RAM 95 are cleared.

  Next, the main CPU 93 executes medal acceptance / start check processing shown in FIG. 86 (S12). In the medal acceptance / start check process, a process of detecting a medal inserted by a player and a process of detecting a start operation are executed.

  Next, the main CPU 93 extracts three random number values (random number values 1 to 3), and stores them in the random number value storage area allocated to the main RAM 95 (S13). Here, the random number value 1 is a value used for internal lottery processing, and in the present embodiment, it is extracted from 0 to 65535.

  The random numbers 2 and 3 are values used for the other lottery processing, and in the present embodiment, they are extracted from 0 to 65535 and 0 to 255, respectively. The main CPU 93 does not have to constantly extract the random numbers 2 and 3 in step S13, and may extract them only when the random numbers 2 and 3 are used.

  Next, the main CPU 93 executes an internal lottery process shown in FIG. 88 (S14). The main CPU 93 that executes this internal lottery process constitutes an internal winning combination determination means.

  Next, the main CPU 93 executes special counter processing shown in FIG. 89 (S15). In this special counter processing, the main CPU 93 randomly determines whether to add the reference value of the number of ART gaming states, ie, the number of ART games, and decides to add the number of ART gaming states In the case, the reference value of the addition number is determined.

  Next, the main CPU 93 executes a reel stop initial setting process shown in FIG. 90 (S16). In the reel stop initialization process, each information (for example, stop table number etc.) related to the stop control of the reel is stored in the corresponding area of the main RAM 95 based on the result (internal winning combination) of the internal lottery process.

  Next, the main CPU 93 generates start command data to be transmitted from the main control board 41 to the sub control board 42, and stores the generated start command data in the communication data storage area allocated to the main RAM 95 (S17).

  The start command data represents, for example, the type of the game state flag, the type of the internal winning combination, the effect number for effect, the special counter, and the like.

  Next, the main CPU 93 executes wait processing (S18). In this weight processing, it is determined whether or not a predetermined time has elapsed from the previous game start (the start of the last unit game), and if it is determined that the predetermined time has not elapsed, the predetermined time has elapsed Wait until the waiting time is digested. The predetermined time in this weight processing, that is, the weight time, is set to, for example, 4.1 seconds from the start of the last unit game.

  Next, the main CPU 93 executes reel rotation start processing for rotating all the reels 3L, 3C, 3R according to the number of inserted medals (S19). Along with the reel rotation start processing, "0000111" is stored in the operation stop button storage area (see FIG. 50).

  Further, the reel rotation start process is executed by the interrupt process shown in FIG. This interrupt process is a process that is executed in a fixed cycle (1.1172 ms). The driving of the stepping motors 51L, 51C, 51R is controlled by this interruption processing, and the rotation of the reels 3L, 3C, 3R is started.

  Thereafter, the driving of the stepping motors 51L, 51C, 51R is controlled by this interrupt processing, and the rotation of the reels 3L, 3C, 3R is accelerated until the rotation reaches a constant speed. Further, when the rotation of the reels 3L, 3C, 3R reaches a constant speed, the driving of the stepping motors 51L, 51C, 51R is controlled by this interruption processing so that the reels 3L, 3C, 3R rotate at a constant speed. Maintained.

  The main CPU 93 executes the reel effect in the reel rotation start process when executing the reel effect of irregularly driving at least one of the reels 3L, 3C, 3R during the lock effect.

  As described above, the main CPU 93 executes the lock effect of the reels 3L, 3C, 3R for a predetermined period on condition that the specific condition of selecting any one of the lock numbers “1” to “6” described later is satisfied. Configure lock execution means.

  Next, the main CPU 93 generates reel rotation start command data to be transmitted from the main control board 41 to the sub control board 42, and stores the generated reel rotation start command data in the communication data storage area allocated to the main RAM 95 S20).

  By receiving the reel rotation start command data, the secondary control board 42 can recognize the reel rotation start, and can determine the timing and the like of executing various effects.

  Next, the main CPU 93 executes an attraction priority storage process (S21). In the drawing priority order storage process, a drawing priority order table selection process shown in FIG. 92 is executed, and the drawing priority order of all the symbols on the rotating reels 3L, 3C, 3R is determined. That is, in the leading priority storage process, stop information is stored in the leading priority data storage area shown in FIG. 52 for each symbol position of each rotating reel based on the internal winning combination.

  For example, for each symbol of each reel 3L, 3C, 3R, when the corresponding symbol is the stop permission, the pull-in priority data is stored in the pull-in priority data storage area based on the priority table, and no stop is made. In the case of permission (for example, when a combination that is not internally won wins), data representing stop prohibition is stored in the leading priority data storage area.

  Next, the main CPU 93 executes a reel stop control process shown in FIG. 94 (S22). By this processing, stop control of the reels 3L, 3C, 3R is performed. Next, the main CPU 93 executes a winning search process (S23).

  In this winning search process, all reels 3L, 3C, 3R are stopped, and after the press of the stop button corresponding to the reel stopped last by the player is released, it is displayed on the activated pay line The symbol combination and the symbol combination table are collated to determine the symbol combination displayed on the pay line.

  In addition, when the symbol combination displayed on the pay line is determined, the combination of the internal winning combination and the symbol is collated, and it is determined whether the symbol can be displayed on the pay line by the combination of the symbols corresponding to the internal winning combination. When the symbol combination not corresponding to the internal winning combination is displayed on the pay line, the main CPU 93 determines that an illegal hit error has occurred.

  When it is determined that an error has occurred, the main CPU 93 sets the generated error in an error storage area allocated to the main RAM 95, and error command data to notify the sub CPU 102 that an error has occurred. Are stored in the communication data storage area allocated to the main RAM 95.

  Specifically, the data stored in the symbol code storage area (see FIG. 47) and the data of the symbol combination table (see FIGS. 16 and 17) are collated, and the collation result is stored in the display combination storage area Ru.

  More specifically, data of the symbol code storage area is copied as it is to the display combination storage area. At that time, the symbol combination table is referred to, and the number of payouts is determined. By this winning a prize search processing, the combination of the symbols displayed in the display windows 4L, 4C, 4R is specified as all the reels 3L, 3C, 3R are stopped.

  Next, the main CPU 93 executes an RT transition process of transitioning the RT gaming state according to the symbol combination displayed on the pay line according to the transition shown in the RT gaming state transition transition diagram shown in FIG. (S24).

  Next, the main CPU 93 executes payout of the number of medals according to the displayed symbol combination based on the result of the winning search processing (S25). Along with the medal payout processing, control of the hopper device 43 and update of the number of credits are performed based on the payout number counter.

  Further, in the medal payout process, the payout operation of the hopper device 43 is monitored when the hopper device 43 is paid out. Specifically, when the main CPU 93 instructs the hopper device 43 to pay out the number of medals to be paid out in units of one, the payout medal detecting sensor (not shown) in the hopper device 43 detects the payout medals. If it is not possible, it is determined that there is no medal for dispensing in the hopper device 43, it is determined as a hopper empty error, and although the medal for payout is detected, the state for detecting the medal has exceeded a predetermined time (for example, 500 ms) To determine that the hopper jam error.

  When it is determined that an error has occurred, the main CPU 93 sets the generated error in an error storage area allocated to the main RAM 95, and error command data to notify the sub CPU 102 that an error has occurred. Are stored in the communication data storage area allocated to the main RAM 95.

  Then, after the error command transmission process is executed, the progress of the game is continued until the cause of the error generated in the hopper device 43 is canceled (for example, if the hopper empty error, the hopper device 43 is replenished with payout medals). The interruption (for example, the error code generated on the 7-segment display 48 is displayed, and the sub CPU 102 causes the liquid crystal display device 11 to display an error screen indicating that an error is occurring).

  Further, when the cause of the error of the hopper device 43 is released, the error set in the error storage area of the main RAM 95 is released, and in order to notify the sub CPU 102 that the error is released, the error command data is main An error command transmission process for storing in the communication data storage area allocated to the RAM 95 is executed (not shown). As for the error command data, for example, the release status of the error set in the error storage area is stored in the communication data storage area, and the game is resumed.

  Next, the main CPU 93 generates winning operation command data to be transmitted from the main control board 41 to the sub control board 42, and stores the generated winning operation command data in the communication data storage area allocated to the main RAM 95 (S26) . The winning operation command data represents, for example, the type of display combination, the number of medals paid out, and the like.

  Next, the main CPU 93 executes bonus end check processing shown in FIG. 95 (S27). By this bonus end check process, a process of respectively terminating the operation of CB or MB when the end condition of CB or MB is satisfied is executed.

  Next, the main CPU 93 executes a bonus operation check process shown in FIG. 96 (S28). By this bonus operation check process, a process of performing the operation of CB or MB based on the combination of the symbols displayed by the reels 3L, 3C, 3R is executed. After executing the process of step S28, the main CPU 93 executes the process of step S11.

<Power-on process>
FIG. 85 is a flow chart showing a power-on process executed in step S10 of the main control process shown in FIG.

  First, the main CPU 93 determines whether the backup is normal (S30). In this judgment processing, it is judged whether the backup is normal or not by error detection using a checksum value.

  For example, the main CPU 93 stores the setting value of the pachislot machine 1 and the check sum value calculated from the setting value of the pachislot machine 1 in the main RAM 95 as backup data, and the determination process at the time of power on (S30) , And reads the set value etc. and the checksum value stored in the main RAM 95.

  Here, the main CPU 93 compares the checksum calculated from the read setting value and the like with the checksum that has been backed up, and determines that the backup is normal if the comparison result matches.

  When the main CPU 93 determines that the backup is normal (YES), the main CPU 93 sets the backed up setting values and the like (S31). Thereby, when the backup is normal, the setting value before the power-off is set.

  After executing the processing of step S31, or when determining that the backup is not normal in step S30 (NO), the main CPU 93 turns on the setting change switch provided in the cabinet 2a of the pachislot machine 1 It is determined whether or not (S32). Here, when determining that the setting change switch is on (YES), the main CPU 93 executes initialization processing at the time of setting change (S33).

  In the initialization process at the time of setting change, for example, data stored in the internal winning combination storing area and the display combination storing area of the main RAM 95 are cleared, and the setting value is cleared.

  Next, the main CPU 93 generates initialization command data to be transmitted from the main control board 41 to the sub control board 42, and stores the generated initialization command data in the communication data storage area allocated to the main RAM 95 (S34) . The initialization command data represents, for example, the presence or absence of a setting value change and the setting value.

  Next, the main CPU 93 executes setting value change processing (S35). In the setting value changing process, for example, the setting value is selected from 1 to 6 in accordance with the operation result of the reset switch, and the setting value selected when the start lever 16 is operated is determined.

  Next, the main CPU 93 determines whether the setting change switch is in the on state (S36), and repeatedly executes the process of step S36 until the determination result in which the setting change switch is not in the on state is obtained.

  Here, when it is determined that the setting change switch is not in the on state (NO), the main CPU 93 generates and generates initialization command data to be transmitted from the main control board 41 to the sub control board 42. The initialization command data is stored in the communication data storage area allocated to the main RAM 95 (S37), and the power-on process ends.

  In step S32, when the main CPU 93 determines that the setting change switch is not on (NO), the main CPU 93 determines whether the backup is normal (S38). Here, if it is determined that the backup is not normal (NO), the main CPU 93 executes power-on error processing (S39).

  In the power-on error process, the main CPU 93 displays that the backup is not normal by an error display or the like. It should be noted that the main CPU 93 is configured not to release the error state depending on the operation of the stop release switch or the reset switch in the error (backup error) state in which the backup is not normal, and the setting change is newly made. Only when the error condition is to be cleared.

  If it is determined in step S38 that the backup is normal (YES), the main CPU 93 restores the state of the pachislot machine 1 to the state before the power failure based on the backup data stored in the main RAM 95. (S40), the power-on process ends.

<Medal acceptance and start check processing>
FIG. 86 is a flow chart showing the medal acceptance / start check process executed in step S12 of the main control process shown in FIG.

  First, the main CPU 93 determines whether or not there is an automatic input request (S50). In the case of winning the replay role in the previous unit game, medals are automatically inserted in the current unit game. That is, in the determination process of step S50, it may be determined whether or not a replay combination is won in the previous unit game.

  In step S50, when the main CPU 93 determines that there is an automatic insertion request (YES), the main CPU 93 executes an automatic insertion process shown in FIG. 87 (S51). In the automatic insertion process, the same number of medals as the medals inserted in the previous unit game are automatically inserted.

  Subsequently, the main CPU 93 generates medal insertion command data to be transmitted from the main control board 41 to the sub control board 42, and stores the generated medal insertion command data in the communication data storage area allocated to the main RAM 95. A transmission process is performed (S52). Here, the medal insertion command data represents, for example, the presence or absence of medal insertion, the value of the insertion number counter, the value of the credit counter, and the like.

  In step S50, when the main CPU 93 determines that there is no automatic insertion request (NO), the main CPU 93 permits reception of medals (S53). For example, the main CPU 93 drives a solenoid of a selector (not shown) to form a route so that the medal inserted into the medal insertion slot 13 passes through the inside of the selector.

  In step S50, when the main CPU 93 determines that there is an automatic insertion request (YES), the reception of medals is prohibited from the previous unit game, so processing regarding reception of medals is performed. Does not run.

  After the process of step S52 or S53 is executed, the main CPU 93 sets the maximum value of the number of medals inserted according to the gaming state (S54). In the present embodiment, the maximum number of inserted medals is three.

  Next, the main CPU 93 determines whether or not acceptance of medals is permitted (S55). Here, if it is determined that acceptance of medals is permitted (YES), the main CPU 93 executes medal insertion check processing for checking the number of inserted medals (S56). In this medal insertion check process, the value of the insertion number counter is updated according to the number of medals checked.

  However, in the medal insertion check process, when the medal sensor 46 detects that the medal has passed through the selector, the state of the medal sensor 46 is monitored to determine the passing state of the medal in the selector, and the medal is checked. When the state of the sensor 46 is different from the state when the normal medal is inserted (for example, when the medal sensor 46 is held for 100 ms or longer), the error related to the inserted medal is allocated to the main RAM 95 An error command transmission process (not shown) is executed which is set in the storage area and stores the error command data in the communication data storage area allocated to the main RAM 95. Here, as the error command data, for example, the occurrence state of the error set in the error storage area is stored in the communication data storage area.

  Then, the progress of the game is interrupted until the cause of the error generated in the selector is canceled (for example, the error code generated on the 7-segment display 48 is displayed, and the sub CPU 102 generates an error in the liquid crystal display device 11 Will display the error screen).

  Furthermore, when the cause of the error in the selector is released, the error set in the error storage area of the main RAM 95 is released, and the error command data is sent to the main RAM 95 to notify the sub CPU 102 that the error is released. An error command transmission process (not shown) is executed which is stored in the communication data storage area assigned to the. As for the error command data, for example, the release status of the error set in the error storage area is stored in the communication data storage area, and the game is resumed.

  The medal sensor 46 is constituted by two photosensors arranged at two places on the medal passing rail in the selector, and monitors the state of two photosensors (for example, the medal sensor on the upstream side and the medal sensor on the downstream side). Therefore, the inserted medal passage check error (when the downstream side medal sensor is turned on without the upstream side medal sensor being turned on), the inserted medal passage time error (upstream medal sensor or the downstream side medal) Detection of inserted medal retrogression error (when the medal sensor on the upstream side is turned on after the medal sensor on the downstream side is turned on) when either of the sensors is turned on for 100 ms or more) can do.

  Subsequently, the main CPU 93 generates medal insertion command data to be transmitted from the main control board 41 to the sub control board 42, and stores the generated medal insertion command data in the communication data storage area allocated to the main RAM 95. The transmission process is executed (S57).

  Next, the main CPU 93 determines whether medals can be inserted or credited (S58). In the present embodiment, the main CPU 93 satisfied the condition that the number of inserted sheets is 3 and the credit is 50 or that the automatic insertion process of step S51 is performed. When it is determined that medal insertion or credit is not possible and when the condition is not established, it is determined that medal insertion or credit is possible.

  When it is determined in step S58 that the insertion of medals or the credit is not possible (NO), the main CPU 93 prohibits the reception of medals (S59). For example, the main CPU 93 forms a path along which the medal inserted into the medal insertion slot 13 is discharged from the medal payout opening 21 without driving the solenoid of the selector.

  If it is determined in step S55 that acceptance of medals is not permitted (NO), if it is determined in step S58 that medal insertion or credit is possible (YES), or after the process of step S59 is executed. The main CPU 93 determines whether or not the number of inserted medals is the number that can start the game (S60).

  That is, the main CPU 93 determines whether or not the number of inserted medals is the number that can start unit game, according to the gaming state. In the present embodiment, the main CPU 93 determines whether or not three medals have been inserted.

  Here, if it is determined that the number of inserted medals is not the number that can start the game (NO), the main CPU 93 executes the processing of step S55. On the other hand, when it is determined that the number of inserted medals is the number that can start the game (YES), the main CPU 93 determines whether the start switch 64 is on (S61).

  Here, if it is determined that the start switch 64 is not on (NO), the main CPU 93 executes the process of step S55. On the other hand, if it is determined that the start switch 64 is on (YES), the main CPU 93 prohibits medal acceptance (S62), and ends the medal acceptance / start check process.

<Automatic input process>
FIG. 87 is a flow chart showing an automatic insertion process executed in step S51 of the medal reception / start check process shown in FIG.

  First, the main CPU 93 determines whether the value of the pseudo BB counter is larger than 0 (S70). Here, if it is determined that the value of the pseudo BB counter is larger than 0 (YES), the main CPU 93 subtracts one from the value of the pseudo BB counter (S71).

  Next, the main CPU 93 determines whether the value of the pseudo BB counter is 0 (S72). Here, if it is determined that the value of the pseudo BB counter is 0 (YES), the main CPU 93 sets a lock (for example, 5 seconds) at the end of pseudo BB (S73).

  Next, the main CPU 93 determines whether the MAX bet button 14 has been operated (S74). Here, if it is determined that the MAX bet button 14 has not been operated (NO), the main CPU 93 executes the processing of step S74. That is, the game can not be performed until the MAX bet button 14 is operated.

  On the other hand, if it is determined that the MAX bet button 14 has been operated (YES), the main CPU 93 releases the lock at the end of the pseudo BB (S75). Thus, the main CPU 93 constitutes a lock release unit.

  Next, the main CPU 93 generates pseudo BB end lock release command data to be transmitted from the main control board 41 to the sub control board 42, and stores the generated pseudo BB end lock release command data to the main RAM 95. The pseudo BB end lock release command transmission process stored in the area is executed (S76).

  As described above, the main CPU 93 transmits the pseudo BB end lock release command data from the main control board 41 to the sub control board 42, thereby ending the pseudo BB and releasing the pseudo BB end lock. The contents of the effect can be changed on the side of the sub control board 42 that the number of games in the ART gaming state is added. Specifically, the main CPU 93 can notify the player on the side of the secondary control board 42 that the number of games in the ART gaming state has been added.

  If it is determined in step S70 that the value of the pseudo BB counter is not larger than 0 (NO), if it is determined in step S72 that the value of the pseudo BB counter is not 0 (NO), or the process of step S76 is executed. Thereafter, the main CPU 93 sets the number of insertions equal to the number of insertions in the previous unit game (S77), and ends the automatic insertion processing. Specifically, the main CPU 93 copies the automatic insertion counter to the insertion number counter, clears the automatic insertion counter, and ends the automatic insertion process.

<Internal lottery process>
FIG. 88 is a flowchart showing an internal lottery process performed in step S14 of the main control process shown in FIG.

  First, the main CPU 93 sets an internal lottery table corresponding to the main gaming state and the RT gaming state in the main RAM 95 (S80). Specifically, the main CPU 93 sets an internal lottery table shown in any one of FIGS. 20 to 31 in the main RAM 95 in accordance with the gaming state.

  Next, the main CPU 93 acquires random number values stored in the random number value storage area (S81). Next, the main CPU 93 determines an internal winning combination based on the acquired random number value and the set internal lottery table, and stores it in the internal winning combination storage area (S 82).

  The lock number is extracted based on the internal winning combination stored in the internal winning combination storing area and the lock effect lottery table (not shown) according to the game state and the lock random number value (refresh register built in the main CPU 93) (S83), it stores in the lock number storage area of the lottery result (S84).

  In the present embodiment, the main CPU 93 acquires a random number value from a refresh register built in the main CPU 93 as a lock random number value, but the present invention is not limited to this, and an interrupt process described later (FIG. Software random numbers may be generated by the reference), and the generated random numbers may be used, or random numbers may be acquired from a random number generation circuit built in the main CPU 93. Alternatively, a random number generation circuit may be provided on the main control board 41, and the random number value may be acquired from the random number generation circuit.

  In addition, the lock numbers from 0 to 5 are determined as the lock numbers obtained by the lottery of the lock numbers, mainly “unquestioned 7”, “unquestioned 77”, “unexplained tempe”, “decisive bell”, “internal winning combination”. When the watermelon, the chance eye A, the chance eye B, the chance eye C, the weak cherry, and the strong cherry are won, the lock numbers 1 to 5 are determined. As described above, the main CPU 93 that executes the process of lottery of the lock number in step S83 constitutes short lock determination means.

  Next, the main CPU 93 determines whether the value of the carryover combination storage area (see FIG. 48) is “0” (S85). In this determination processing, it is determined whether bit 3 corresponding to "MB" of the carryover storage area is set to "1".

  If it is determined in step S85 that the value of the carryover combination storage area is not "0" (NO), the main CPU 93 ends the internal lottery process. On the other hand, when it is determined that the value of the carryover combination storage area is “0” (YES), the main CPU 93 determines the internal winning combination defined as the carryover combination in the internal winning combination stored in the internal winning combination storage area. The combination (for example, MB) is stored in the carryover combination storage area (see FIG. 48) (S86). In the process of step S86, for example, when "MB" is acquired as the internal winning combination, bit 3 corresponding to "MB" of the carryover combination storage area is set to "1", and the internal lottery process is ended.

<Special counter processing>
FIG. 89 is a flowchart showing the special counter process executed in step S15 of the main control process shown in FIG.

  First, the main CPU 93 determines whether the value of the special counter is greater than 0 (S90). Here, the main CPU 93 determines whether the special counter is operating. That is, if the value of the special counter is greater than 0, it can be determined that the special counter is operating.

  If it is determined in step S90 that the value of the special counter is not larger than 0 (NO), the main CPU 93 determines whether the gaming state satisfies the predetermined count start condition, specifically, the MB is internally won. It is determined whether or not (S91). If it is determined in step S90 that the value of the special counter is greater than 0 (YES), or if it is determined in step S91 that the MB is internally won (YES), the main CPU 93 acquires or generates a random number. A special counter addition lottery is performed to determine whether the value of the special counter is to be added or not by lottery (first probability) based on the special counter addition lottery table shown in FIG. 41 (S92).

  Next, the main CPU 93 determines whether the special counter addition lottery has been won (S93). Here, when it is determined that the special counter addition lottery has been won, the main CPU 93 adds "1" to the value of the special counter (S94). That is, the main CPU 93 counts up the special counter. Also, the value of the special counter is processed so as not to exceed 127. Thus, the main CPU 93 constitutes counting means.

  In step S93, the main CPU 93 determines whether or not the count end condition is satisfied. Specifically, the main CPU 93 acquires or generates a random number, and performs addition of ART game by the sub CPU 102 according to the value of the special counter by lottery based on the release lottery table shown in FIG. 43. Perform a release lottery (second probability) to determine whether or not (S95).

  Next, the main CPU 93 determines whether or not the release lottery has been won (S96), and when it is determined that the release lottery has been won, the valid flag is set in the special counter (1 is set in Bit 7) and the lock is set. In order to produce an effect, "6" is set in the lock number storage area of the main RAM 95 (S97), and the special counter processing is ended.

  As described above, the main CPU 93 constitutes count determination means for determining whether or not the value of the special counter is to be made valid when the count end condition is satisfied. The special counter is allocated to the main RAM 95 as an area of 1 byte (8 bits), the valid range of the count value is 0 to 127 (Bit 0 to Bit 6), and Bit 7 is allocated to set the result of the release lottery. It is done. Thus, the main CPU 93 executing the process of S97 constitutes a long lock determination means.

  Further, the main CPU 93 is a short lock determination unit configured when the lock number determined by the internal lottery processing is “0” to “5”, and the lock number determined by the special counter processing is “6”. The lock means is configured to perform a lock that invalidates the stop operation for a predetermined period when it is determined by the long lock determination means configured to perform the lock effect.

  Further, in the lock effect performed in accordance with the lock number “6”, unless the MAX bet button 14 is operated, a reel effect of a length corresponding to the count number determined by the special counter is performed.

  For example, when performing a reel effect set to one count 20 seconds, when the value of the special counter is 10, the reel effect is performed for 200 seconds with 10 sets of 20 seconds, and the MAX bet button is set as a predetermined condition The reel effect is canceled by operating 14.

  Therefore, when the value of the special counter is 10, the player can cancel the reel effect and release the lock by operating the MAX bet button 14 each time the reel effect occurs. The predetermined operation is not limited to the operation of the MAX bet button 14, but may be the operation of the start lever 16 or the stop buttons 17L, 17C, 17R.

  On the other hand, when determining that the release lottery has not been won, the main CPU 93 resets the value of the special counter to 0, and ends the special counter processing.

  In the special counter processing described above, an example has been described in which the main CPU 93 adds the value of the special counter on condition that the MB is internally won, but instead, the RT gaming state is RT4 gaming state The value of the special counter may be added on condition that it has shifted to the state of.

  In addition, every time the lock effect set in the main RAM 95 is executed in step S97 of the special counter process described above, for example, the sub CPU 102 adds 100 games to the number of ART games. That is, when the value of the special counter when winning the release lottery is “3”, the sub CPU 102 adds 300 games to the number of ART games.

  In step S91 of the special counter processing described above, when the main CPU 93 determines that the MB is internally won, the special counter addition lottery (steps S92, S93) is started to start addition of the special counter. The special counter may be started to be added according to the transition of the RT gaming state.

  Further, the addition of the number of ART games may be made to notify the sub CPU 102 of the number of additional games together with the reel effect after two games shifted from the RT4 gaming state to the RT3 gaming state.

<Reel stop initialization process>
FIG. 90 is a flow chart showing the reel stop initial setting process executed in step S16 of the main control process shown in FIG.

  First, the main CPU 93 refers to the rotation stop initial setting table, and acquires the rotation stop number based on the internal winning combination etc. (S100). The spinning stop initial setting table is a table in which various pieces of information used for the stop control are defined in association with the number of inserted sheets and the number of the spinning stop corresponding to the internal winning combination.

  Next, the main CPU 93 refers to the rotation stop initial setting table, and acquires each information based on the rotation stop number (S101). In this process, for example, the main CPU 93 determines the number of the stop table used at the time of the first to third stops and information necessary for performing the control change in the control change process (ie, the order in which the reels 3L, 3C, 3R are specified When stopping at a specific position, the information used to reselect the stop table is acquired.

  Information on the number of sliding pieces for the pressed position is directly or indirectly stored in the stop table, and using this information, the player is not disadvantaged and a false prize is not generated. , Is configured to stop at the developer's intended stop position.

  Subsequently, the main CPU 93 stores the rotating identifier in the symbol code storage area (see FIG. 47) (S102). That is, the main CPU 93 sets the bits of all the symbol code storage areas (except the unused area) to "1".

  Next, the main CPU 93 stores 3 in the stop button non-operation counter (S103), and ends the reel stop initialization processing. The stop button non-operation counter is for determining the number of stop buttons 17L, 17C, 17R for which the player has not performed a stop operation, and is stored in a predetermined area of the main RAM 95.

<Import priority storage process>
FIG. 91 is a flow chart showing the drawing priority storage process executed in step S21 of the main control process shown in FIG. 84 and step S165 of the reel stop control process shown in FIG.

  First, the main CPU 93 stores the value of the stop button non-operation counter in the main RAM 95 as the number of searches (S110). Next, the main CPU 93 executes search target reel determination processing for determining a search target reel (S111). In this process, for example, one reel on the left side among the rotating reels is determined as a search target reel.

  Next, the main CPU 93 executes pull-in priority order table selection processing shown in FIG. 92 (S112). In the drawing priority order table selection processing, one drawing priority order table number is selected from the drawing priority order table (see FIG. 33).

  Next, the main CPU 93 sets 21 (the number of symbols on each reel) to the number of symbol checks stored in the main RAM 95, and sets 0 at the search symbol position (S113).

  Next, the main CPU 93 executes symbol code storage processing shown in FIG. 93 (S114). In this symbol code storage process, the symbol code of the check symbol position data for checking the symbol position of the rotating reel is acquired.

  Next, the main CPU 93 updates the display combination storing area (see FIG. 46) based on the acquired symbol code and the symbol code storage area (see FIG. 47) (S115). Next, the main CPU 93 executes an acquisition priority data acquisition process (S116).

  In this pull-in priority order data acquisition process, the corresponding bit in the display combination storage area is 1 and the corresponding bit in the internal winning combination storage area (see FIG. 45) is 1 in step S112. Acquisition priority data is acquired with reference to the selected attraction priority table.

  In the drawing priority data acquisition process, “stop prohibition” (000H) is set for the symbol position that causes an erroneous prize when stopped, and internal winning is not performed, but erroneous prize does not occur even if stopped. For the symbol position, "stoppable" (001H) is set.

  Next, the main CPU 93 stores the acquired attraction priority data in the attraction priority data storage area corresponding to the search target reel (S117). Next, the main CPU 93 subtracts 1 from the number of symbol checks and adds 1 to the search symbol position (S118).

  Next, the main CPU 93 determines whether the number of symbol checks is 0 (S119). Here, if it is determined that the symbol check frequency is not 0 (NO), the main CPU 93 executes the processing of step S114.

  On the other hand, when it is determined that the number of symbol checks is 0 (YES), the main CPU 93 determines whether or not the search for the number of searches has been performed (S120). Here, if it is determined that the search for the number of searches has been performed (YES), the main CPU 93 ends the drawing priority storage process. On the other hand, if it is determined that the search for the number of searches has not been executed (NO), the main CPU 93 executes the processing of step S111.

<Import priority table selection process>
FIG. 92 is a flow chart showing a drawing priority order table selection process executed in step S112 of the drawing priority order storage process shown in FIG.

  First, the main CPU 93 determines whether pull-in priority order table selection data is set (S130). Here, if it is determined that the pull-in priority order table selection data is set (YES), the main CPU 93 refers to the pressing stop storage area (see FIG. 51) and the operation stop button storage area (see FIG. 50). Then, from the drawing priority order table selection table (not shown), set the drawing priority order table number corresponding to the drawing priority order table selection data (S131), and set the drawing priority order table according to the drawing priority order table number S132), the drawing priority order table selection process is ended.

  On the other hand, when it is determined that the drawing priority order table selection data is not set (NO), the main CPU 93 sets the drawing priority order table according to the drawing priority order table number (S132), and the drawing priority order table End the selection process.

<Symbol code storage process>
FIG. 93 is a flow chart showing a symbol code storage process executed in step S114 of the draw-in priority order storage process shown in FIG. 91 and in step S159 of the reel stop control process shown in FIG.

  First, the main CPU 93 sets valid line data (S140). In the present embodiment, the main CPU 93 sets a center line as an effective line. Next, the main CPU 93 sets the check symbol position data of the search target reel based on the search symbol position and the valid line data (S141). In the present embodiment, the main CPU 93 sets the middle symbol position of the left reel 3L as check symbol position data.

  Next, the main CPU 93 acquires the symbol code of the check symbol position data (S142), and ends the symbol code storage processing.

<Reel stop control processing>
FIG. 94 is a flow chart showing the reel stop control process executed in step S22 of the main control process shown in FIG.

  First, the main CPU 93 determines whether a valid stop button has been pressed (S150). This process is a process of determining whether a signal is output from the stop switch 7S. When the main CPU 93 determines that the effective stop button is not pressed (NO), the main CPU 93 repeatedly executes the process of step S150.

  On the other hand, when the main CPU 93 determines that the valid stop button has been pressed (YES), the pressing order storage area (see FIG. 51) and the operation stop button storage area (see FIG. 51) according to the pressed stop button. 50) and updated (S151).

  Here, the main CPU 93 stores the types of operation stop buttons corresponding to the first stop operation, the second stop operation, and the third stop operation in the pressing order storage area (see FIG. 51), and the pressing order storage area. The order of pressing the stop buttons 17L, 17C, 17R can be determined by referring to FIG.

  Subsequently, the main CPU 93 subtracts 1 from the stop button non-operation counter (S152), determines a search target reel from the operation stop button (S153), and stores the stop start position in the main RAM 95 based on the symbol counter ( S154). The stop start position is a symbol position corresponding to the symbol counter of the corresponding reel when the stop operation is detected by the stop switch 7S.

  Next, the main CPU 93 executes sliding symbol number determination processing (S155). The number of sliding symbols determination processing determines the number of sliding symbols specified at the stop start position based on the stop table selection data group selected based on the internal winning combination from the rotation stop initial setting table (see FIG. 32). Processing.

  Next, the main CPU 93 generates reel stop command data to be transmitted from the main control board 41 to the sub control board 42, and stores the generated reel stop command data in the communication data storage area allocated to the main RAM 95. The transmission process is executed (S156). The reel stop command data indicates the type of reel to be stopped, the stop start position, the number of sliding pieces (or the planned stop position), and the like.

  Next, the main CPU 93 determines a planned stop position based on the stop start position and the sliding piece number determination data, and stores it in the main RAM 95 (S 157). The planned stop position is a symbol position obtained by adding any one of predetermined numerical values “0” to “4” defined as the number of sliding symbols to the stop start position, and the symbol position at which the rotation of the reel is stopped. It is.

  Next, the main CPU 93 sets a planned stop position as a search symbol position (S158). Next, the main CPU 93 executes symbol code storage processing shown in FIG. 93 (S159).

  Next, the main CPU 93 updates the symbol code storage area from the symbol code acquired by the symbol code storage processing (S160). Next, the main CPU 93 performs control change processing (S161). In this control change process, the reel stop information group is updated when it is at a specific stop position.

  Next, the main CPU 93 determines whether the pressed stop button has been released (S162). This process is a process of determining whether or not the signal is not output from the stop switch 7S.

  When the main CPU 93 determines that the pressed stop button is not released (NO), the main CPU 93 repeatedly executes the process of step S162. On the other hand, when determining that the pressed stop button has been released (YES), the main CPU 93 executes reel stop command transmission processing (S163).

  The reel stop command generated in the reel stop command transmission process includes information of ON edge / OFF edge of the stop switch 7S. The information of the ON edge / OFF edge may be monitored by interrupt processing and transmitted to the sub control board 42.

  Next, the main CPU 93 determines whether the stop button non-operation counter is 0 or not (S164). Here, when it is determined that the stop button non-operation counter is not 0 (NO), the main CPU 93 executes the drawing priority storing process shown in FIG. 91 (S165), and executes the process of step S150. On the other hand, when it is determined that the stop button non-operation counter is 0 (YES), the main CPU 93 ends the reel stop control processing.

<Bonus end check processing>
FIG. 95 is a flow chart showing the bonus end check process executed in step S27 of the main control process shown in FIG.

  First, the main CPU 93 determines whether the main gaming state is the MB operating state, that is, whether the MB operating state flag stored in the gaming state flag storage area shown in FIG. 49 is on (S280).

  Here, if it is determined that the main gaming state is not the MB operating state (NO), the main CPU 93 ends the bonus end check processing. On the other hand, when determining that the main gaming state is the MB operating state (YES), the main CPU 93 executes CB termination processing for terminating the CB (S281).

  Next, the main CPU 93 updates the bonus end number counter (S282). Next, the main CPU 93 determines whether or not the value of the bonus end number counter is smaller than “0” (S283).

  Here, when the value of the bonus end number counter is not smaller than “0”, that is, the value of the bonus end number counter is “0” or more (NO), the main CPU 93 ends the bonus end check process. . On the other hand, if the value of the bonus end number counter is smaller than “0” (YES), the main CPU 93 executes an MB end process of turning off the MB operating state flag (S284).

  Next, the main CPU 93 generates bonus end command data to be transmitted from the main control board 41 to the sub control board 42, and stores the generated bonus end command data in the communication data storage area allocated to the main RAM 95. The hour command transmission process is executed (S285), and the bonus end check process is ended.

<Bonus operation check process>
FIG. 96 is a flowchart showing the bonus operation check process executed in step S28 of the main control process shown in FIG.

  First, the main CPU 93 determines whether the MB is in operation (S290). Here, if it is determined that the MB is in operation (YES), the main CPU 93 executes a CB operation process of operating the CB (S291), and ends the bonus operation check process.

  On the other hand, when determining that the MB is not in operation (NO), the main CPU 93 determines whether or not the MB is won (S292). Here, if it is determined that the MB has been won, the main CPU 93 executes an MB operation process for operating the MB (S293).

  Next, the main CPU 93 clears the value of the carryover combination storage area (S294). Thereafter, the main CPU 93 generates bonus start command data to be transmitted from the main control board 41 to the sub control board 42, and transmits the bonus start command data to be stored in the communication data storage area allocated to the main RAM 95. The process is executed (S295), and the bonus operation check process is ended.

  If it is determined in step S292 that the MB has not been won, the main CPU 93 determines whether replay is displayed (S296). Specifically, the main CPU 93 determines whether or not a combination of “replay-replay-replay” or the like called “transition without transition” is displayed along the effective line.

  If it is determined that the replay is not displayed (NO), the main CPU 93 ends the bonus operation check process. On the other hand, when it is determined that the replay is displayed (YES), the main CPU 93 makes an automatic insertion request to execute the automatic insertion processing in S51 of the medal reception / start check processing shown in FIG. 86 (S297) .

  Next, the main CPU 93 determines whether the RT5 message has been displayed (S298). Specifically, the main CPU 93 determines whether or not any combination of “RT5 transition RIP_1” to “RT5 transition RIP_16” or “7 RIP_RT5_01” to “7 RIP_RT5_06” is displayed along the effective line. To judge. Here, if it is determined that the RT5 message has not been displayed (NO), the main CPU 93 ends the bonus operation check process.

  On the other hand, if it is determined that the RT5 message has been displayed (YES), the main CPU 93 adds a predetermined game number to the value of the pseudo BB counter that counts the number of games in the pseudo BB, that is, the RT5 gaming state (S299). In the present embodiment, since the simulated BB continues 50 games from the game in which the simulated BB target replay is won internally, the predetermined number of games to be added to the value of the simulated BB counter is 51.

<Interrupt process by control of main CPU>
FIG. 97 is a flowchart showing an interrupt process under the control of the main CPU 93. This process is performed every 1.1172 ms.

  First, the main CPU 93 saves a register (S320). Next, the main CPU 93 executes an input port check process shown in FIG. 98 (S321). In this process, the main CPU 93 confirms the presence or absence of a signal transmitted to the sub control board 42.

  For example, the main CPU 93 stores, in the communication data storage area of the main RAM 95, input state command data representing on-edge and off-edge information of various switches including the on-edge and off-edge of the start switch 64 and the stop switch 7S.

  Next, the main CPU 93 executes timer update processing (S322). Subsequently, the main CPU 93 executes an effect timer update process (S323). Next, the main CPU 93 executes reel control processing for controlling the rotation of the reels 3L, 3C, 3R (S324).

  More specifically, the main CPU 93 starts to rotate the reels 3L, 3C, 3R in response to a request to start the rotation of the reels 3L, 3C, 3R, that is, the reels at a constant speed. Control is performed so that 3L, 3C and 3R rotate. Further, the main CPU 93 performs control so that the rotation of the reels 3L, 3C, and 3R corresponding to the stop operation is stopped in response to the stop operation.

  Next, the main CPU 93 executes lamp / 7SEG driving processing (S325). For example, the main CPU 93 displays the number of medals credited, the number of payouts, and the like on various display units.

  Next, the main CPU 93 executes data transmission processing for transmitting command data to the sub CPU 102 (S326). The data transmission process will be described later with reference to FIG.

  In addition, although an interrupt that occurs regularly is generated every 1.172 ms, since new command data is not sent during sending of command data, it is actually about 17 ms (15 interrupts). Command data is transmitted to the sub CPU 102 at intervals.

  Specifically, assuming that the transmission speed of command data is 4800 bps, 80 bits / 80-bit data can be transmitted to the 8-byte command data with the start bit and the stop bit added every 8 bits. 4800 bps = 16.666..., That is, about 17 ms, and thus, command data is actually transmitted to the sub CPU 102 at intervals of about 17 ms (15 interrupts).

  Next, the main CPU 93 restores the register (S327), and ends the periodically occurring interrupt processing.

<Input port check process>
FIG. 98 is a flowchart showing the input port check process executed in step S321 of the interrupt process under the control of the main CPU 93.

  First, the main CPU 93 stores the previous interrupt, that is, the state of the input port of the current input port state storage area of the main RAM 95 in the input port state storage area of the main RAM 95 before one interruption (S331). The current input port status is stored in the current input port status storage area of the main RAM 95 (S332).

  Thus, by allowing the state of the input port before one interrupt to be compared with the current state of the input port, the main CPU 93 can check the states of both input ports. Thus, it is checked whether the state of the input port has changed, for example, whether the MAX bet button 14 or the 1 bet button 15 has been pressed.

  Next, the main CPU 93 compares the input port state storage area before one interrupt with the current input port state storage area to generate the on edge and off edge states of the input port state, and the on edge and off edge states are stored in the main RAM 95. The on-edge storage area and the on-edge storage area are stored (S333), and the input port check process is ended.

  In the present embodiment, the on-edge refers to the state when the button is pressed, the off-edge refers to the state when the button is released, and the state from the on-edge state in which the button is kept pressed. The on-edge state is released in the next interrupt cycle, and the off-edge state is similarly turned off only when the button is released.

  Although not particularly defined in the present embodiment, the input port is not limited to one (eight bits) input port, and normally, there are a plurality of input ports. A signal for the number of bits allocated to each is input, and the start switch 64, the stop switch 17S, the MAX bet button 14, the 1 bet button 15, the medal insertion detection of the above described medal acceptance / start check processing, and the reel 3L. , 3C, 3R, etc. are assigned to a reel index sensor (not shown) or the like.

<Data transmission process>
FIG. 99 is a flowchart showing data transmission processing executed in step S326 of the interrupt processing under control of the main CPU 93.

  First, the main CPU 93 determines whether the transmission port has a vacancy (S340). Here, if it is determined that there is no space in the transmission port (NO), the main CPU 93 ends the data transmission process. The state in which the transmission port has no space means that the main CPU 93 is currently transmitting command data to the sub CPU 102.

  On the other hand, when it is determined that the transmission port is available (YES), the main CPU 93 determines whether there is transmission data as command data to be transmitted to the sub CPU 102 (S341).

  Specifically, when command data (for example, start command data etc.) is stored in the transmission data storage area allocated to the main RAM 95, the main CPU 93 determines that there is transmission data.

  Here, if it is determined that there is no transmission data (NO), the main CPU 93 executes a no-operation command communication data storage process shown in FIG. 100 (S340). If it is determined in step S341 that there is transmission data (YES), or after the process of step S340 is executed, the main CPU 93 sets 8 in the data number counter as the number of data for one packet (S343).

  Next, the main CPU 93 sets data stored in the communication data storage area to the transmission port (S 344), and updates the address of data to be set next to the transmission port in the communication data storage area, that is, one byte The communication data storage area address to be added is updated (S345).

  Next, the main CPU 93 causes the data number counter to decrement 1 (S346). Next, the main CPU 93 determines whether the value of the data number counter is 0 (S347). Here, if it is determined that the value of the data number counter is not 0 (NO), the main CPU 93 returns the data transmission process to step S344.

  On the other hand, if it is determined that the value of the data number counter is 0 (YES), the main CPU 93 sets a transmission start request for transmitting transmission data set in the transmission port to the sub CPU 102 in the communication register port. (S348). Next, the main CPU 93 clears the communication data storage area (S349), and ends the data transmission process.

  Specifically, the main CPU 93 sets data of one packet (8 bytes) of command data to be transmitted to the sub CPU 102 to a serial communication function (not shown) built in the main CPU 93, and then sets the communication register port of the serial communication function. Data transmission to the sub CPU 102 is started by setting the transmission request to.

  In the present embodiment, the main CPU 93 transmits command data to the sub CPU 102 using a serial communication function built in the main CPU 93. However, the present invention is not limited thereto. The command data may be transmitted to the sub CPU 102 by the serial communication circuit.

<No-operation command communication data storage processing>
FIG. 100 is a flowchart showing a no-operation command communication data storage process executed in step S342 of the data transmission process shown in FIG.

  First, the main CPU 93 determines whether there is a space in the communication data storage area (S360). Here, when it is determined that there is no space in the communication data storage area (NO), the main CPU 93 ends the non-operation command communication data storage processing.

  On the other hand, when it is determined that the communication data storage area has a vacancy (YES), the main CPU 93 stores the non-operation command (1 byte data) at the top (+0) of the vacancy area of the communication data storage area (S361) ).

  Next, the main CPU 93 stores the port status of the current input port status storage area in the area (+1 to +6) subsequent to the area storing the no-operation command of the communication data storage area (S362).

  Next, the main CPU 93 creates SUM data (sum value) of the data (+0 to +6) stored in steps S361 and S362, and in the area (+7) following the area storing the port status of the communication data storage area, The created SUM data is stored (S363), and the non-operation command communication data storage process is ended.

  In the present embodiment, although a specific calculation method of SUM is not specified, SUM data (sum value) can be calculated, for example, by addition. Moreover, as a calculation method of SUM data (sum value), calculation by subtraction or exclusive OR may be used without being limited to addition.

[Sub control process]
The sub CPU 102 of the sub control board 42 executes various processes in accordance with the flowcharts shown in FIGS.

<Power on processing>
FIG. 101 is a flowchart showing power on processing of the sub CPU 102 at the time of power on.

  First, the sub CPU 102 executes an initialization process (S370). In this process, the sub CPU 102 performs error check on the sub RAM 104 or the like and initializes the task system. The task system sets the processing cycle wait time of each of the lamp control task (4 ms), the sound control task (33 ms), and the shutter control task (1 ms).

  Next, the sub CPU 102 starts the lamp control task shown in FIG. 102 (S371). In the lamp control task, the lighting states of the various lamps of the LED group 25 are controlled via the LED substrate 72.

  Next, the sub CPU 102 activates the sound control task shown in FIG. 103 (S373). In the sound control task, the sub CPU 102 controls the sound output state from the speakers 23L and 23R via the sound I / O substrate 71.

  Next, the sub CPU 102 starts the shutter control task shown in FIG. 104 (S374). In the shutter control task, the shutter device 200 is controlled by the sub CPU 102 via the shutter control board 78.

  Next, the sub CPU 102 activates the main task shown in FIG. 107 (S375). In the main task, the sub CPU 102 executes drawing processing of the liquid crystal display device 11 and processing when an error occurs and when the error is canceled.

  Next, the sub CPU 102 starts the main board communication task shown in FIG. 110 (S376). In the main board communication task, the sub CPU 102 determines the effect to be performed by the pachi-slot machine 1 accompanying the reception and analysis of the command transmitted from the main control board 41.

  Next, the sub CPU 102 activates an animation task (S377). In the animation task, the sub CPU 102 selects an animation to be displayed on the liquid crystal display device 11 or the like.

  Next, the sub CPU 102 executes the power failure recovery process shown in FIG. 128 (S378). In the power failure recovery process, the sub CPU 102 executes a process when it returns to the state where power is supplied from the state where power is not supplied to the sub control board 42.

<Ramp control task>
FIG. 102 is a flow chart showing a lamp control task started in step S371 of the power on processing shown in FIG.

  First, the sub CPU 102 executes lamp-related data initialization processing (S380). Next, the sub CPU 102 executes a lamp data analysis process (S381). In the lamp data analysis process, a plurality of effect LED (for example, the effect LED group 25 disposed on the decorative member 7 and the reels 3L, 3C, and 3R disposed on each of the pachislot machines 1 and not shown) are provided. Control data for performing lamp effects and turning on / off of each LED according to registration data of lights etc.) is generated.

  Next, the sub CPU 102 executes a lamp effect execution process based on the control data generated in the lamp data analysis process (S381) (S382), executes the lamp effect execution process, and then executes the lamp control task process in step S381. Back to.

  Although not shown in FIG. 102, the lamp control task processing returns to step S 381 for less than 4 ms (4 msec − (lamp data analysis) because processing waits for the processing cycle after the lamp effect execution processing is executed. After the processing time of the processing + the processing time of the lamp effect execution processing) = the waiting time), the processing is performed in units of 4 ms in the lamp control task.

<Sound control task>
FIG. 103 is a flowchart showing the sound control task activated in step S373 of the power on processing shown in FIG.

  First, the sub CPU 102 executes initialization processing of sound related data related to the sound output state from the speakers 23L and 23R via the sound I / O substrate 71 (S390).

  Next, the sub CPU 102 executes analysis processing of sound data (S391). The sound data analysis process generates sound data according to registration data for outputting sound to the speakers 23L and 23R provided in the pachi-slot machine 1.

  Next, the sub CPU 102 executes the sound effect execution process (S392) based on the sound data generated in the sound data analysis process (S391), executes the sound effect execution process, and then executes the process of the sound control task. The process returns to step S391.

  Although not shown in FIG. 103, the process of the sound control task returns to step S 391 for 33 ms (33 msec − (sound data analysis) because the process cycle is waited after the sound effect execution process is executed. Since the processing time of the processing + the processing time of the sound effect execution processing) = the waiting time), the sound control task is processed in units of 33 ms.

<Shutter control task>
FIG. 104 is a flowchart showing the shutter control task activated in step S 374 of the power-on process shown in FIG. The shutter control task performs control related to driving and stopping of the lift motor 240A, the lift motor 240B, and the rotary motor 231.

  First, the sub CPU 102 executes a shutter start test process (S400). In the shutter activation test process, the sub CPU 102 executes the operation registered in advance to the shutter device 200 through the shutter control board 78 after the shutter is stored as shown in FIG. 8 through the shutter control board 78. Then, based on the detection results of the origin sensor 270, the descent sensor 271, and the rotation sensor 272, it is confirmed that the shutter device 200 is correctly executing each operation.

  When the sub CPU 102 can confirm that the shutter device 200 correctly executes each operation, the sub CPU 102 places the shutter in the accommodated state as shown in FIG. 8 via the shutter control board 78.

  Although the sub CPU 102 performs the shutter activation test only once when the power is turned on, the present invention is not limited thereto. An error in the shutter device 200 (detection of each sensor of the elevation motors 240A and 240B or the rotary motor 231) When an abnormality is detected, the shutter activation test is performed between the unit game and the unit game, and the error of the shutter device 200 is canceled by confirming that the shutter activation test process has been executed normally. You may do it.

  In this case, when the sub CPU 102 can not confirm that the shutter device 200 is correctly performing each operation, the sub CPU 102 may cause the liquid crystal display device 11 to display a message to that effect.

  After executing the shutter activation test process, the sub CPU 102 determines whether or not there is registered shutter operation data (S401). Here, if it is determined that there is registered shutter operation data (YES), the sub CPU 102 executes a shutter effect reconstruction process shown in FIG. 105 (S402).

  Next, the sub CPU 102 determines whether the shutter operation sequence stored in the shutter operation sequence storage area has reached the end position (S403). For example, when the sub CPU 102 detects “End Block” representing the end of the shutter operation sequence of the shutter operation sequence storage area illustrated in FIG. 81, the sub CPU 102 determines that the shutter operation sequence is ended.

  In the present embodiment, in FIG. 81 and FIG. 101, for convenience, it is written as “EndBlock” for the sake of convenience, but not limited to this, “0xffff” (“0x” is a value representing the end of the table) , An identification symbol representing a hexadecimal number in C language, etc., or "-1".

  If it is determined that the shutter operation sequence stored in the shutter operation sequence storage area has not reached the end position (NO), the sub CPU 102 executes the shutter control process shown in FIG. 106 (S404).

  On the other hand, if it is determined that the shutter operation sequence stored in the shutter operation sequence storage area has reached the end position (YES), or after the processing of step S404 is executed, the sub CPU 102 performs the shutter control task Is returned to step S401.

  Although not shown in FIG. 106, the sub CPU 102 waits for the processing cycle when returning the processing of the shutter control task to step S401, so it takes less than 1 ms to return the processing of the shutter control task to step S401. Since (1 m− (steps S401 to S403 or processing time of S404) = waiting time) comes after, the shutter control task is processed in units of 1 ms.

<Shutter effect reconstruction processing>
FIG. 105 is a flow chart showing a shutter effect reconstruction process executed in step S402 of the shutter control task shown in FIG.

  First, the sub CPU 102 acquires shutter operation data from the sub RAM 104 (S410), and acquires the previous shutter operation data from the sub RAM 104 (S411). Next, the sub CPU 102 acquires shutter operation combination data corresponding to the shutter operation data acquired in step S410 and the previous shutter operation data acquired in step S411 from the shutter operation combination determination table shown in FIG. 80 (S412). .

  Next, the sub CPU 102 constructs a shutter operation sequence as shown in FIG. 81 from the acquired shutter operation combination data, and stores the constructed shutter operation sequence in the shutter operation sequence storage area (S413). As described above, the sub CPU 102 configures an accessory operation construction unit that constructs presentation operation sequence data representing a shutter operation sequence of the shutter.

  Next, the sub CPU 102 sets the shutter operation data acquired in step S410 in the sub RAM 104 as the previous shutter operation data (S414). That is, the sub RAM 104 constitutes a character data storage unit.

  Next, the sub CPU 102 determines whether the sequence data stored in the shutter operation sequence storage area is EndBlock (S415). Here, if it is determined that the sequence data is EndBlock (YES), the sub CPU 102 ends the shutter effect reconstruction processing.

  In the shutter operation combination determination table (see FIG. 80) in step S412, "-" (-) in the shutter operation determination table as in the case where the current shutter operation data is "Y3" and the previous shutter operation data is "Y4". If 0xff or -2) is registered, it indicates that the shutter does not need to be operated.

  In this case, the sub CPU 102 stores EndBlock (0xffff or -1) in the area corresponding to the step number "1" of the shutter operation sequence storage area in step S413.

  If it is determined in step S415 that the sequence data is not EndBlock (NO), the sub CPU 102 acquires the number of pulses, the pulse width, and the excitation direction from the sequence data stored in the shutter operation sequence storage area (S416).

  Next, the sub CPU 102 sets each value of the pulse counter and the pulse width counter to 0 (S 417), and executes motor excitation output processing for outputting a pulse signal for exciting the motor (S 418). Finish.

  Specifically, in the motor excitation output processing, the sub CPU 102 selects the excitation phase of the elevation motor 240A, the elevation motor 240B, and the rotation motor 231 based on the excitation direction, the pulse width and the number of pulses acquired from the shutter operation sequence storage area. The excitation data is output to the corresponding output port.

  When the sub CPU 102 stops the elevating motor 240A, the elevating motor 240B, and the rotary motor 231 from the driving state, the sub CPU 102 outputs excitation data for stopping all phases to the output port.

<Shutter control processing>
FIG. 106 is a flowchart showing the shutter control process executed in step S404 of the shutter control task shown in FIG.

  First, the sub CPU 102 determines whether the pulse width of the pulse signal is equal to the value of the pulse width counter (S420). Here, if it is determined that the pulse width of the pulse signal is not equal to the value of the pulse width counter (NO), the sub CPU 102 adds 1 to the value of the pulse width counter (S421) and ends the shutter control process. Do.

  If it is determined in step S420 that the pulse width of the pulse signal is not equal to the value of the pulse width counter (NO), the motor excitation output process by the sub CPU 102 is not executed, so the excitation state of the motor being driven is It is held. The excitation state of the motor being driven is similarly held in the following steps where motor excitation output processing is not performed.

  On the other hand, if it is determined that the pulse width of the pulse signal is equal to the value of the pulse width counter (YES), the sub CPU 102 executes motor excitation output processing (S422). Next, the sub CPU 102 determines whether the number of pulses of the pulse signal is equal to the value of the pulse counter (S423).

  Here, if it is determined that the number of pulses of the pulse signal is not equal to the value of the pulse number counter (NO), the sub CPU 102 adds 1 to the value of the pulse counter (S424) and sets the value of the pulse width counter. Set 0 (S425).

  Next, the sub CPU 102 determines whether the number of pulses of the pulse signal is a prescribed maximum value (S426). Here, if it is determined that the pulse number of the pulse signal is not the maximum value (NO), the sub CPU 102 ends the shutter control process.

  In the present embodiment, the maximum value of the defined pulse number is "300", and the step number "3" in FIG. 72, the step number "2" in FIG. 74, the step number "2" in FIG. In the step in which the pulse number "300" is registered as in the step number "2" of FIG. 79 and the step numbers "2" and "8" of FIG. 81, the process described in the special condition column Is executed.

  If it is determined in S426 that the number of pulses of the pulse signal is the maximum value (YES), the sub CPU 102 determines whether the value of the pulse counter is a prescribed maximum value (S427).

  Here, if it is determined that the value of the pulse counter is the maximum value (YES), the sub CPU 102 initializes the shutter operation sequence storage area, and sets EndBlock at the beginning of the shutter operation sequence storage area (S428). .

  When the value of the pulse counter is the prescribed maximum value, the sub CPU 102 is in an abnormal state because the motor in operation is in an abnormal state. Output.

  Next, the sub CPU 102 executes motor excitation output processing (S429), and a detection target sensor error, that is, the elevation motor 240A, the elevation motor 240B, and the elevation target sensor 270 of the origin sensor 270, the descent sensor 271 and the rotation sensor 272. The error occurrence data of the rotary motor 231 is set in the error management area (S430), and the shutter control process is ended.

  If it is determined in step S427 that the value of the pulse counter is not the maximum value (NO), the sub CPU 102 determines whether the sensor to be detected is in the ON state (S431).

  Here, if it is determined that the sensor to be detected is not in the ON state (NO), the sub CPU 102 ends the shutter control process. On the other hand, if it is determined that the sensor to be detected is in the ON state (YES), or if it is determined in step S423 that the number of pulses of the pulse signal is equal to the value of the pulse number counter (YES), sub CPU 102 Updates the shutter operation sequence storage area (S432).

  Next, the sub CPU 102 acquires the number of pulses, the pulse width, and the excitation direction from the sequence data stored in the shutter operation sequence storage area (S433). Next, the sub CPU 102 sets each value of the pulse counter and the pulse width counter to 0 (S434), executes motor excitation output processing (S435), and ends the shutter control processing.

<Main task>
FIG. 107 is a flowchart showing the main task activated in step S375 of the power on processing shown in FIG.

  First, the sub CPU 102 executes VSYNC (Vertical Synchronization) interrupt initialization processing (S440), and executes VSYNC interrupt waiting (S441). The VSYNC interrupt initialization process is a process that makes it possible to receive an image sync signal as an interrupt signal, and the generation of the VSYNC interrupt signal occurs at the timing of frame switching of a drawn image, and one frame is 33 ms (approximately 30 FPS). Because of the above, the main task repeats the process in units of 33 ms including the processing time of the drawing process.

  Next, the sub CPU 102 executes a drawing process (S442). Next, the sub CPU 102 executes the error occurrence monitoring process shown in FIG. 108 (S443), and executes the error release monitoring process shown in FIG. 109 (S444). Next, the sub CPU 102 resets the WDT 108 (S445), and returns the processing of the main task to step S441.

  In the present embodiment, the WDT 108 is disposed in the sub control circuit 101 of the sub control board 42. However, the present invention is not limited thereto. If the WDT circuit is built in the sub CPU 102, the built in WDT circuit is included. May be used in place of the WDT 108.

<Error occurrence monitoring process>
FIG. 108 is a flowchart showing an error occurrence monitoring process executed in step S443 of the main task shown in FIG.

  First, the sub CPU 102 is in a state where the simplified error information history representing the history of errors has not been displayed, and the door key 24 has been turned to the left as a predetermined operation (hereinafter also referred to as “door key left rotation state”) Is judged whether 3 seconds or more have passed (S450).

  Here, if it is determined that the simple error information history is not displayed and the door key counterclockwise state is over 3 seconds (YES), the sub CPU 102 displays a display example as shown in FIG. A simplified error information history display request is made to cause the liquid crystal display device 11 to display an error information history screen representing the simplified error information history (S451).

  Note that with the simplified error information history display, the error information history screen that can be displayed by activating the hall menu (turning on the setting key type switch 52) can be operated simply without activating the hall menu. Is a screen display for confirming the status of occurrence and cancellation of an error of the pachislot machine 1.

  On the other hand, if it is determined that the simple error information history is not displayed yet or the door key counterclockwise state has not elapsed for 3 seconds or more (NO), the sub CPU 102 generates an error in the error management area (see FIG. 83). It is determined whether there is data (S452).

  Here, if it is determined that there is no error occurrence data in the error management area (NO), the sub CPU 102 ends the error occurrence monitoring process. On the other hand, when it is determined that the error occurrence data exists in the error management area (YES), the sub CPU 102 displays an error screen indicating an error according to the error occurrence data as shown in the display example of FIG. Is set (S 453), and a timer value of 3 minutes is set in the error display timer (S 454).

  As described above, the sub CPU 102 causes the liquid crystal display device 11 to display an image according to the predetermined condition such that the above-described simple error information history display request or the error management data has a predetermined condition such as error occurrence data. The image switching means to be displayed is configured.

  After executing the processing of step S451 or S454, the sub CPU 102 determines whether or not the secondary gaming state is in addition selection ("selected gaming") (S455). If it is determined that the element is in the middle (YES), the sub CPU 102 saves the element being selected (selected arrangement position) in the sub RAM 104 (S456).

  Specifically, the sub CPU 102 is operated by the selection unit on the condition that an error screen due to the occurrence of an error or an error information history screen due to a simple operation is displayed on the liquid crystal display device 11 in a state where an element is selected. Are invalidated, and selection state information is stored in the sub RAM 104. As described above, the sub CPU 102 configures selection information storage means.

  If it is determined in step S455 that the secondary gaming state is not selected for addition (NO), or after the processing in step S456, the sub CPU 102 displays the video data being displayed on the liquid crystal display device 11, speakers 23L and 23R. The sound data being output to, the lamp data being output to the plurality of effect LEDs, and the shutter operation data are saved in the sub RAM 104 (S457). Next, the sub CPU 102 sets the shutter operation data to Y3 (S458), and ends the error occurrence monitoring processing.

  If the error screen or the error information history screen is displayed on the liquid crystal display device 11 while the shutter is operating, the sub CPU 102 transmits, to the sub RAM 104, shutter operation data as movable information representing the state of the shutter. Store (retract) and move the shutter to the exposure position (the position shown in FIG. 8). As described above, the sub CPU 102 configures a movable state retracting unit.

<Error release monitoring process>
FIG. 109 is a flow chart showing an error release monitoring process executed in step S444 of the main task shown in FIG.

  First, the sub CPU 102 determines whether the simplified error information history in which the simplified error information history is displayed is being displayed and the door key counterclockwise state has been released (S470). Here, if it is determined that the simplified error information history is being displayed and the door key counterclockwise state is released (YES), the sub CPU 102 sets a simplified error information history display end request (S471).

  On the other hand, if it is determined that the simplified error information history is not being displayed or the door key counterclockwise state is not released (NO), the sub CPU 102 determines whether or not an error occurrence is being displayed (S472). .

  Here, if it is determined that the error occurrence display is not being performed (NO), the sub CPU 102 ends the error release monitoring process. On the other hand, if it is determined that the error occurrence display is in progress (YES), the sub CPU 102 determines whether or not there is an error release in the error management area (S473).

  Here, if it is determined that the error management area has an error release (YES), the sub CPU 102 clears the value of the error display timer to 0 (S474). On the other hand, when it is determined that the error management area does not release the error (NO), the sub CPU 102 subtracts 1 from the value of the error display timer (S475).

  In S473, the sub CPU 102 clears the error depending on whether the cause of the error during error display assigned to the error management area (see FIG. 83) is ON "1" or OFF "0". Determine the presence or absence.

  Next, the sub CPU 102 determines whether the value of the error display timer is 0 (S476). Here, if it is determined that the value of the error display timer is not 0 (NO), the sub CPU 102 ends the error release monitoring process.

  On the other hand, if it is determined that the value of the error display timer is 0 (YES), or after the process of step S474, the sub CPU 102 sets an error occurrence display end request (S477) to indicate the cause of the error. The error occurrence data is reset (deleted) from the error management area (S478).

  After executing the processing of step S <b> 471 or S <b> 478, the sub CPU 102 determines whether or not there is the effect data saved (S <b> 479). Here, if it is determined that there is no effect data saved in the sub RAM 104 (NO), the sub CPU 102 ends the error cancellation monitoring process.

  On the other hand, if it is determined that there is the effect data saved (YES), the sub CPU 102 restores the video data, the sound data, the lamp data, and the shutter operation data saved in the sub RAM 104 (S480).

  Next, the sub CPU 102 determines whether or not the additional gaming state is selected (S481). Here, if it is determined that the additional gaming state is not selected (NO), the sub CPU 102 ends the error cancellation monitoring process.

  On the other hand, if it is determined that the secondary gaming state is in addition selection (YES), the sub CPU 102 restores the selected element (selected arrangement position) saved in the sub RAM 104 and sets it as video data ( S482), the error cancellation monitoring process is ended.

  As described above, when the sub CPU 102 establishes the display end condition determined as YES in S470, S473, or S476, the liquid crystal display device 11 of the game screen of the image data being displayed saved (stored) in the sub RAM 104 in S457. And the movable state return means for returning the shutter to the shutter position before the error screen or the error information history screen is displayed on the liquid crystal display device 11 by restoring the shutter operation data saved in the sub RAM 104 .

  In addition, if the sub CPU 102 is in the sub game state in addition selection ("selected game") at S481, the sub CPU 102 causes the liquid crystal display device 11 to display the selected game screen, and the selected element saved in the sub RAM 104 ( The selected information return means is configured to return the selected payout position) to the selected game screen.

  In the present embodiment, when an error occurs in the pachislot machine 1, the error display is performed for 3 minutes, and then the presentation state before the error occurs is restored. However, depending on the contents of the generated error, As long as the cause of the error is not actually eliminated, the error display may be continued, and the time of the error display may be changed to any time (for example, 10 minutes).

<Main board communication task>
FIG. 110 is a flowchart showing the main board communication task started in step S376 of the power on processing shown in FIG.

  First, the sub CPU 102 executes initialization of the communication message queue allocated to the sub RAM 104 (S 490).

  Next, the sub CPU 102 acquires reception command data from the communication message queue (S491). The reception command data is transmitted as command data by the data transmission process (see FIG. 99) of the main CPU 93, and registered in the communication message queue by the reception interrupt process of the sub CPU 102.

  In addition, the sub CPU 102 determines whether or not there is a reception command (S492). In detail, the sub CPU 102 determines whether or not there is a reception command based on whether or not reception command data is registered in the communication message queue.

  Next, the sub CPU 102 executes a check of the received command (S493). Specifically, the sub CPU 102 determines whether or not the received command type is within a valid command value range (for example, the command type is 01H to 10H), and the data length of received command data (for example, 8 bytes) And the SUM value assigned to the last data (for example, the 8th byte of the reception data length of 8 bytes) of the reception command data (for example, the operation value from 1 byte to 7 bytes of the reception data length of 8 bytes (addition, The received command is checked by performing subtraction or exclusive OR) and matching on the SUM value.

  Next, the sub CPU 102 determines whether a valid command has been received (S494). Here, if it is determined that a valid command has not been received (NO), the sub CPU 102 returns the processing of the main board communication task to step S491.

  On the other hand, if it is determined that a valid command has been received (YES), the sub CPU 102 determines that the received command is a legitimate command, creates gaming information from the received command, and creates gaming information Are stored in the sub RAM 104 (S495). Next, the sub CPU 102 executes command analysis processing shown in FIG. 111 (S 496), and returns the processing of the main board communication task to step S 491.

  Since the main CPU 93 sends data to the sub CPU 102 every about 17 ms (see the interrupt processing under the control of the main CPU in FIG. 97 described above), the main board communication task takes a cycle of about 17 ms. The process is repeated.

<Command analysis process>
FIG. 111 is a flow chart showing command analysis processing executed in step S 496 of the main board communication task shown in FIG.

  First, the sub CPU 102 executes command consistency determination processing shown in FIG. 113 (S500). Next, the sub CPU 102 executes effect content determination processing shown in FIG. 114 (S501), executes animation data determination processing (S502), executes lamp data determination processing (S503), and executes sound data determination processing. The shutter operation data determination process is executed (S505), each data determined is registered in the RAM 103 (S506), and the command analysis process is ended.

  In each data determination process of the animation data determination process, the lamp data determination process, the sound data determination process, and the shutter operation data determination process, the sub CPU 102 performs the rendering data allocated for the rendering device according to the rendering content determined in the rendering content determination processing Decide. The effect data for each effect device is registered in the RAM 103 because it is referred to in the process of controlling each effect device.

  In the effect content determination process, a new effect is not necessarily determined. Basically, at the time of reception of a start command, which will be described later, becomes an opportunity for the effect to be determined, and in accordance with the content of the determined effect, continuation and change of the effect are made in the subsequent command reception process.

<Animation task>
FIG. 112 is a flow chart showing an animation task activated in step S377 of the power on processing shown in FIG.

  First, the sub CPU 102 checks the change with the previous game information (S510). Specifically, the sub CPU 102 is the game information in which the current game information updated by the interrupt process under control of the main CPU 93 shown in FIG. 97 is registered in the sub RAM 104 in the interrupt process up to the previous time. It is checked whether it is different game information or not.

  Next, the sub CPU 102 executes object control processing (S511). Specifically, when the check result in which the game information is changed is obtained in step S510, the sub CPU 102 controls the image according to the change in the game information.

  Subsequently, the sub CPU 102 executes animation task management processing (S512). Specifically, when the animation data is determined by the animation data determination process and the animation data is registered, the sub CPU 102 selects an image to be displayed for the determined effect (for example, moving image data for effect) And 3D polygon data moving within moving image data) and management information of the display order thereof, and manage the order of images displayed in various effects. After executing the animation task management process, the sub CPU 102 returns the process of the animation task to step S510.

<Command consistency determination process>
FIG. 113 is a flowchart showing command consistency determination processing executed in step S500 of the command analysis processing shown in FIG.

  First, the sub CPU 102 performs command sequence determination processing to determine whether the reception order of commands related to the progress of unit game among the commands received from the main control circuit 91 is different from the prescribed order (S515).

  In the present embodiment, the sub CPU 102 receives commands in the order of the medal insertion command, the start command, the reel rotation start command, the three reel stop commands, and the winning operation command except for the non-operation command and the error command. Ru.

  The sub CPU 102 determines whether or not an abnormality has occurred in the command sequence by determining whether or not a command has been received in this order, and determines that an abnormality has occurred in the command sequence. The "sequence" error in the error management area (see FIG. 83) is set.

  The “sequence” abnormality in the error management area of the sub RAM 104 is cleared by clearing the sub RAM 104 in the process upon receiving an initialization command (see step S 521 in FIG. 144) described later.

  For example, when the sub CPU 102 receives a start command in a state where a winning operation command has not been received in the previous unit game, or when receiving a winning operation command after receiving a reel stop command twice, etc. It is determined that an error has occurred in the command sequence.

  Next, the sub CPU 102 determines whether a start command has been received (S516). Here, if it is determined that the start command has not been received (NO), the sub CPU 102 ends the command consistency determination process.

  On the other hand, if it is determined that the start command has been received (YES), the sub CPU 102 determines whether the power failure detection abnormality flag indicating that the power supplied to the sub CPU 102 has been cut off in an abnormal state is ON. Whether or not the setting change flag is in the OFF state, and whether or not an error has occurred in the command sequence, more specifically, the “sequence” error in the error management area (see FIG. 83) of the sub RAM 104 is set. It is judged whether it is done or not (S517).

  Thus, the sub CPU 102 constitutes an operation abnormality detection unit for detecting an abnormal operation of the sub control circuit 101.

  When the setting change flag is in the OFF state, it indicates that the pachislot machine 1 has not been initialized as at the time of factory shipment, etc., and in detail, the SRAM constituting the sub RAM 104 is cleared. Represents Therefore, the sub CPU 102 does not receive an initialization command from the main control circuit 91 once, and the sub control circuit 101 has an abnormal operation (for example, a goto action) on condition that the start command is received. To detect that.

  If it is determined in S517 that the power failure detection abnormality flag is in the ON state, the setting change flag is in the OFF state, or an abnormality occurs in the command sequence (YES), the sub CPU 102 determines that the pachislot machine 1 is Assuming that it is operating in an abnormal state, the sub activation abnormal state flag is turned on (S518), and the command consistency determination process is ended.

  On the other hand, if it is determined that the power failure detection abnormality flag is not in the ON state, the setting change flag is not in the OFF state, and that an abnormality has not occurred in the command sequence (NO), the sub CPU 102 determines that the pachislot machine 1 is normal. Assuming that the operation is performed in the above state, the sub activation abnormal state flag is turned off (S519), and the command consistency determination process is ended.

<Determination content determination processing>
FIG. 114 is a flowchart showing an effect content determination process executed in step S501 of the command analysis process shown in FIG.

  First, the sub CPU 102 determines whether an initialization command has been received (S520). Here, if it is determined that the initialization command has been received (YES), the sub CPU 102 executes processing upon initialization command reception (S 521), turns on the setting change flag (S 522), and determines effect contents Finish.

  In the initialization command reception process, for example, effect data based on the information transmitted as the initialization command is set, and various management areas and work areas including a management area related to the progress of the game in the sub RAM 104 are initially set. Be

  On the other hand, when determining that the initialization command has not been received (NO), the sub CPU 102 determines whether or not the medal insertion command has been received (S523). Here, if it is determined that the medal insertion command has been received (YES), the sub CPU 102 executes a medal insertion command reception process (S 524), and ends the effect content determination process. In the medal insertion command reception process, for example, effect data based on the information transmitted as the medal insertion command is set.

  On the other hand, if it is determined that the medal insertion command has not been received (NO), the sub CPU 102 determines whether or not the start command has been received (S525). Here, if it is determined that the start command has been received (YES), the sub CPU 102 executes a start command reception process shown in FIG. 115 (S526), and ends the effect content determination process. In the start command reception process, for example, effect data is set based on the information transmitted as the start command.

  On the other hand, if it is determined that the start command has not been received (NO), the sub CPU 102 determines whether or not the reel rotation start command has been received (S527). Here, if it is determined that the reel rotation start command has been received (YES), the sub CPU 102 executes a reel rotation start command reception process (S528), and ends the effect content determination process. In the reel rotation start command reception process, for example, effect data is set based on the information transmitted as the reel rotation start command.

  On the other hand, if it is determined that the reel rotation start command has not been received (NO), the sub CPU 102 determines whether or not the reel stop command has been received (S529). Here, if it is determined that the reel stop command has been received (YES), the sub CPU 102 executes a reel stop command reception process (S530), and ends the effect content determination process. In the reel stop command reception process, for example, effect data based on the information transmitted as the reel stop command is set.

  On the other hand, if it is determined that the reel stop command has not been received (NO), the sub CPU 102 determines whether or not the winning operation command has been received (S531). Here, if it is determined that a winning operation command has been received (YES), the sub CPU 102 executes a winning operation command reception process shown in FIG. 119 (S532), and ends the effect content determination process. In the prize activation command reception process, for example, effect data is set based on information transmitted as a prize actuation command.

  On the other hand, if it is determined that the winning operation command has not been received (NO), the sub CPU 102 determines whether an error command has been received (S533). Here, if it is determined that an error command has been received (YES), the sub CPU 102 executes an error command reception process shown in FIG. 122 (S534), and ends the effect content determination process.

  On the other hand, if it is determined that an error command has not been received (NO), the sub CPU 102 determines whether a non-operation command has been received (S535). Here, if it is determined that a no-operation command has been received (YES), the sub CPU 102 executes a no-operation command reception process shown in FIG. 123 (S536), and ends the effect content determination process. On the other hand, if it is determined that the no-operation command has not been received (NO), the sub CPU 102 ends the effect content determination process. By executing the effect content determination process, the sub CPU 102 configures effect determination means.

<Process when receiving start command>
FIG. 115 is a flowchart showing a start command reception process executed in step S526 of the effect content determination process shown in FIG.

  First, the sub CPU 102 executes the failsafe process shown in FIG. 116 (S540). Next, the sub CPU 102 sets a temporary gaming state representing the gaming state determined in the previous game as the current secondary gaming state (S 541). Next, the sub CPU 102 determines whether the lock number is "6" (S542).

  Here, if it is determined that the lock number is “6” (YES), the sub CPU 102 adds a value obtained by multiplying the specified counter (for example, 100) by the count value of the special counter to the ART remaining game number At the same time, the count value of the special counter is set to the number of ART direct-on game notification games (S543). Thus, the sub CPU 102 configures advantageous game award determination means for determining the number of ART-added games based on the value counted by the special counter.

  On the other hand, if it is determined that the lock number is not "6" (NO), or after the processing of step S543 is executed, sub CPU 102 performs a lottery process according to the secondary gaming state, the first gaming state shown in FIG. Another lottery process is executed (S544).

  Next, the sub CPU 102 determines whether the RT gaming state is less than 2 (that is, the RT0 gaming state or the RT1 gaming state) (S545). Here, the RT gaming state is controlled by the main CPU 93 and sent from the main CPU 93 to the sub CPU 102 as a parameter given to the start command. Also, as described above, the RT gaming state takes any of the RT0 gaming state to the RT5 gaming state.

  Here, if it is determined that the RT gaming state is not less than 2 (NO), the sub CPU 102 determines whether the number of penalty games is 0 (S546). Here, if it is determined that the number of penalty games is 0 (YES), the sub CPU 102 resets the penalty state flag (S547).

  On the other hand, if it is determined that the number of penalty games is not 0 (NO), or after the process of step S547 is executed, the sub CPU 102 determines whether the number of penalty games is greater than 0 (S548).

  Here, if it is determined that the number of penalty games is greater than 0 (YES), the sub CPU 102 subtracts 1 from the number of penalty games (S549). On the other hand, if it is determined that the number of penalty games is not greater than 0 (NO), or after the process of step S549, the sub CPU 102 determines whether or not the number of grace games is greater than 0 (S550). Here, if it is determined that the number of grace games is greater than 0 (YES), the sub CPU 102 subtracts 1 from the number of grace games (S551).

  If it is determined in step S545 that the RT gaming state is less than 2 (YES), or if it is determined in S550 that the number of grace games is not greater than 0 (NO), or after the process of step S551 is executed, The sub CPU 102 extracts the contents of the effect based on the effect random number value from the sub game state, the internal winning combination, the RT game state and the lock number (S552).

  Next, the sub CPU 102 executes a lock generation effect setting process shown in FIG. 118 (S553), and ends the start command reception process.

<Fail-safe processing>
FIG. 116 is a flow chart showing the failsafe process performed in step S540 of the process at the time of start command reception shown in FIG.

  First, the sub CPU 102 determines whether or not the secondary gaming state is normally waiting for return, and whether or not the RT gaming state is less than 2 (S560). Here, if it is determined that the secondary gaming state is normal return waiting and the RT gaming state is less than 2 (YES), the sub CPU 102 determines whether the lock number before one game is "6" It is determined whether or not it is (S561).

  Here, if it is determined that the lock number before one game is not "6" (NO), the sub CPU 102 sets the temporary gaming state to "general" (S562), and the ceiling game number is the ceiling specified value. (For example, 1500) is set (S563), and the ART end flag is turned on (S564).

  In step S560, when it is determined that the secondary gaming state is not normally waiting for return, or the RT gaming state is not less than 2 (NO), the lock number before one game is determined to be "6" (YES), Alternatively, after executing the processing in step S564, the sub CPU 102 determines whether or not the RT gaming state is 2 or more (during ART high probability) (S565).

  Here, if it is determined that the RT gaming state is not 2 or more (NO), the sub CPU 102 ends the fail safe processing. On the other hand, if it is determined that the RT gaming state is 2 or more (YES), the sub CPU 102 determines whether the sub activation abnormal state flag is ON (S566).

  Here, if it is determined that the sub activation abnormal state flag is not ON (NO), the sub CPU 102 ends the fail safe processing. On the other hand, if it is determined that the sub activation abnormal state flag is ON (YES), the sub CPU 102 sets the grace game number to a grace predetermined value (for example, 30), and the penalty game number as a penalty low predetermined value ( For example, 8) is set, a penalty status flag is set (S567), and failsafe processing is ended.

  As described above, the sub CPU 102 configures a grace game number setting unit that sets the number of grace games as the predetermined number of grace games under the condition that the abnormal operation of the sub control circuit 101 is detected. In addition, the sub CPU 102 detects the abnormal operation of the sub control circuit 101 while the number of grace games is being digested, and during the number of penalty games for which the low penalty value is set as the predetermined game number. , Set the penalty.

  If the penalty state flag is already set in step S 567, the sub CPU 102 may add the grace specified value to the number of grace games. If the penalty state flag is already set in step S 567, the sub CPU 102 may add the low penalty value to the number of penalty games.

  Also, in step S 567, when the penalty state flag is already set, the sub CPU 102 sets the grace specified value to the grace game number on condition that the number of grace games is smaller than the grace specified value. It is also good.

  If the penalty state flag is already set in step S 567, the sub CPU 102 sets the penalty low prescription value to the penalty game quantity on condition that the penalty game quantity is smaller than the penalty low prescription value. May be

<First game state lottery processing>
FIG. 117 is a flow chart showing a first gaming state-specific lottery process executed in step S544 of the start command reception process shown in FIG.

  First, the sub CPU 102 determines whether the secondary gaming state is "general" (S570). Here, if it is determined that the secondary gaming state is "general" (YES), the sub CPU 102 executes a first general middle lottery process shown in FIG. 129 (S571). Next, the sub CPU 102 executes the second general inside lottery processing shown in FIG. 133 (S572), and ends the first gaming state-specific lottery processing.

  If it is determined in step S570 that the secondary gaming state is not "generally" (NO), the sub CPU 102 determines whether the secondary gaming state is "in the ART high probability" (S573). Here, if it is determined that the secondary gaming state is “in the ART high probability” (YES), the sub CPU 102 executes lottery processing during the first ART high probability shown in FIGS. 135 and 136 (S574). Next, the sub CPU 102 executes a lottery process during the second ART high probability shown in FIG. 137 (S575), and ends the first gaming state specific lottery process.

  If it is determined in step S573 that the sub gaming state is not "in the ART high probability" (NO), the sub CPU 102 determines whether the sub gaming state is "in the ART preparation" (S576). Here, if it is determined that the secondary gaming state is “in preparation for ART” (YES), the sub CPU 102 executes lottery processing during preparation of the first ART shown in FIG. 139 (S577), and by the first gaming state Finish the lottery process.

  If it is determined in step S576 that the secondary gaming state is not "in preparation for ART" (NO), the sub CPU 102 determines whether the secondary gaming state is "in ART" (S578). Here, if it is determined that the secondary gaming state is "in the ART" (YES), the sub CPU 102 executes lottery processing during the first ART shown in FIG. 141 and FIG. 142 (S579), and the first gaming state End the other lottery process.

  If it is determined in step S578 that the secondary gaming state is not "ART in progress" (NO), the sub CPU 102 determines whether the secondary gaming state is "additional selection in progress" (S580). Here, if it is determined that the secondary gaming state is “additionally selected” (YES), the sub CPU 102 executes lottery processing during the first addition selection shown in FIGS. 144 and 145 (S581). Next, the sub CPU 102 executes lottery processing during second addition selection shown in FIG. 146 (S582), and ends the first gaming state-specific lottery processing.

  If it is determined in step S580 that the secondary gaming state is not "additionally selected" (NO), the sub CPU 102 determines whether the secondary gaming state is "during an additional gaming" (S583). Here, if it is determined that the secondary gaming state is "in addition game" (YES), the sub CPU 102 executes lottery processing during the addition game (S584), and ends the first lottery processing by game state .

  If it is determined in step S583 that the secondary gaming state is not "additional game playing" (NO), the sub CPU 102 determines whether the secondary gaming state is "waiting for normal return" (S585).

  Here, if it is determined that the secondary gaming state is “waiting for normal return” (YES), the sub CPU 102 executes lottery processing during normal return waiting shown in FIG. 158 (S586), and the first gaming state End the other lottery process. On the other hand, if it is determined that the secondary gaming state is not "waiting for normal return" (NO), the sub CPU 102 ends the first gaming state-specific lottery processing.

<Effect setting process when lock occurs>
FIG. 118 is a flowchart of the lock occurrence effect setting process executed in step S553 of the start command reception process shown in FIG.

  First, the sub CPU 102 determines whether the lock number included in the start command data is any of "1" to "6" (S590). Here, if it is determined that the lock number included in the start command data is not any of “1” to “6” (NO), the sub CPU 102 ends the effect setting process at lock occurrence.

  On the other hand, if it is determined that the lock number included in the start command data is any of “1” to “6” (YES), sub CPU 102 executes step S552 of the start command reception process shown in FIG. It is determined whether the effect content determined by the lottery in step S is a step-up effect (S591).

  Here, if it is determined that the determined effect content is not a step-up effect (NO), the sub CPU 102 ends the effect setting process at lock occurrence. On the other hand, if it is determined that the determined effect content is step-up effect (YES), sub CPU 102 sets a step-up sequence table (see FIG. 71) corresponding to the lock number in sub RAM 104 (S592) .

  Next, the sub CPU 102 sets the value of the no-operation command reception counter to 0, sets the count value of the step-up sequence table to step-up count, and sets the value of the notification game counter to 0 (S593). The occurrence setting process is ended.

<Process when receiving prize operation command>
FIG. 119 is a flow chart showing a winning operation command reception process executed in step S532 of the effect content determination process shown in FIG.

  First, the sub CPU 102 executes a penalty setting process shown in FIG. 120 for setting the number of penalty games and the like (S600). Next, the sub CPU 102 executes a second gaming state-specific lottery process shown in FIG. 121 (S601), and ends the winning operation command reception process.

<Penalty setting process>
FIG. 120 is a flow chart showing a penalty setting process executed in step S600 of the winning operation command reception process shown in FIG.

  First, the sub CPU 102 determines whether or not the reels 3L, 3C, and 3R are stopped due to the irregular stop operation, that is, the irregular push (S610). As described above, the sub CPU 102 configures an irregular stop operation determination unit that determines whether the stop operation is a stop operation different from the predetermined stop operation order.

  Here, with the irregular push in this embodiment, when the RT gaming state is not less than 2 and the stop operation of the reels 3L, 3C, 3R is not notified, the reels 3C, 3R other than the reel 3L are first. It refers to a stopped operation.

  If it is determined in step S610 that the reels 3L, 3C, and 3R are not stopped due to the irregular push (NO), the sub CPU 102 ends the penalty setting process. On the other hand, if it is determined that the reels 3L, 3C, 3R have been stopped due to irregular pressing (YES), the sub CPU 102 determines whether the secondary gaming state is medium or ART high probability (S611) .

  Here, if it is determined that the secondary gaming state is medium or ART high probability (YES), the sub CPU 102 determines whether the penalty flag is OFF and the number of grace games is 0 or not. It judges (S612).

  Here, if it is determined that the penalty flag is OFF and the number of grace games is 0 (YES), the sub CPU 102 determines whether the internal winning combination is included in the first winning combination or not. To do (S613).

  Here, if it is determined that the internal winning combination is included in the first winning combination (YES), the sub CPU 102 sets a predetermined grace predetermined value (for example, 30 games) as the number of grace games (for example, S614), the penalty setting process is ended.

  If it is determined in step S612 that the penalty flag is not OFF or the number of grace games is not 0 (NO), the sub CPU 102 determines whether the MB is in operation and the internal winning combination is the second It is determined whether or not it is included in the winning combination (S615). Here, if it is determined that the MB is not in operation and the internal winning combination is not included in the second winning combination group (NO), the sub CPU 102 ends the penalty setting process.

  On the other hand, if it is determined that the MB is in operation or the internal winning combination is included in the second winning combination (YES), the sub CPU 102 sets the grace specified value (for example, 30) as the number of grace games. Set the penalty game number as the low disadvantage game number and set the penalty low specified value (for example, 8), set the penalty state flag as the disadvantage game state (S616), and finish the penalty setting process.

  If it is determined in step S613 that the internal winning combination is not included in the first winning combination (NO), the sub CPU 102 determines whether the MB is in operation and the internal winning combination is the third winning. It is determined whether it is included in the role group (S617). Here, if it is determined that the MB is not in operation and the internal winning combination is not included in the third winning combination group (NO), the sub CPU 102 ends the penalty setting process.

  On the other hand, if it is determined that the MB is in operation or the internal winning combination is included in the third winning combination (YES), the sub CPU 102 sets the grace game number as the grace game number, and the penalty game A penalty high prescribed value (for example, 20) is set to the number as the high disadvantage game number, a penalty status flag is set (S618), and the penalty setting process is ended.

  If it is determined in step S611 that the secondary gaming state is neither ordinary nor ART high probability (NO), the sub CPU 102 determines whether or not the secondary gaming state is normally waiting for recovery ( S619).

  Here, if it is determined that the secondary gaming state is not waiting for normal return (NO), the sub CPU 102 ends the penalty setting process. On the other hand, if it is determined that the secondary gaming state is normally waiting for return (YES), the sub CPU 102 determines whether the MB is in operation and the internal winning combination is included in the fourth winning combination group It is determined whether or not (S620).

  Here, if it is determined that the MB is not in operation and the internal winning combination is not included in the fourth winning combination group (NO), the sub CPU 102 ends the penalty setting process. On the other hand, if it is determined that the MB is in operation or the internal winning combination is included in the fourth winning combination (YES), the sub CPU 102 sets the grace game number as the grace game number, and the penalty game A penalty high specified value is set to the number, a penalty state flag is set (S621), and the penalty setting process is ended. As described above, in addition to executing the above-described fail-safe processing, the sub-CPU 102 configures a grace game number setting unit by executing the penalty setting processing.

  If the penalty state flag is already set in step S616, S618 or S621, the sub CPU 102 may add the grace prescribed value to the number of grace games.

  When the penalty status flag is already set in step S616, S618 or S621, the sub CPU 102 determines whether the penalty low prescribed value or the penalty high prescribed value (hereinafter referred to simply as the "penalty prescribed value") according to each step. ) May be added to the number of penalty games.

  If the penalty status flag is already set in step S616, S618 or S621, the sub CPU 102 sets the grace prescribed value as the grace game number on condition that the number of grace games is smaller than the grace prescribed value. You may do it.

  When the penalty state flag is already set in step S616, S618 or S621, the sub CPU 102 sets the penalty specification value to the penalty game number on the condition that the number of penalty games is smaller than the penalty specification value. You may do it.

<Second game state lottery processing>
FIG. 121 is a flow chart showing a second gaming state-specific lottery process executed in step S601 of the winning operation command reception process shown in FIG.

  First, the sub CPU 102 determines whether the secondary gaming state is "generally" (S630). Here, if it is determined that the secondary gaming state is "generally" (YES), the sub CPU 102 executes the third general lottery processing shown in FIG. 134 (S631), and the second gaming state-specific lottery End the process.

  If it is determined in step S630 that the secondary gaming state is not "generally" (NO), the sub CPU 102 determines whether the secondary gaming state is "in the ART high probability" (S632). Here, if it is determined that the secondary gaming state is "in the ART high probability" (YES), the sub CPU 102 executes the third ART high probability lottery process shown in FIG. 138 (S633), the second game End the state-specific lottery process.

  If it is determined in step S632 that the sub gaming state is not "in the ART high probability" (NO), the sub CPU 102 determines whether the sub gaming state is "in the ART preparation" (S634). Here, if it is determined that the secondary gaming state is “in preparation for ART” (YES), the sub CPU 102 executes lottery processing during second ART preparation shown in FIG. 140 (S635), and the second gaming state Finish the lottery process.

  If it is determined in step S634 that the sub gaming state is not "in preparation for ART" (NO), the sub CPU 102 determines whether or not the sub gaming state is "in ART" (S636). Here, if it is determined that the secondary gaming state is "in the ART" (YES), the sub CPU 102 executes a lottery processing in the second ART shown in FIG. 143 (S637), the lottery processing according to the second gaming state Finish. On the other hand, if it is determined that the secondary gaming state is not "during ART" (NO), the sub CPU 102 ends the second gaming state-specific lottery processing.

<Process when receiving error command>
FIG. 122 is a flowchart showing an error command reception process executed in step S534 of the effect content determination process shown in FIG.

  First, the sub CPU 102 determines whether the error command data includes the occurrence state of the error detected by the main CPU 93 (S640). Here, if it is determined that the error command data includes the occurrence state of the error detected by the main CPU 93 (YES), the sub CPU 102 determines the occurrence state of the error detected by the main CPU 93 as an error management area (FIG. 83). Set (see S641).

  If it is determined in step S640 that the error command data does not include the occurrence state of the error detected by the main CPU 93 (NO), the sub CPU 102 cancels the error cancellation state in which the error command data is detected by the main CPU 93. It is judged whether it contains (S642).

  Here, if it is determined that the error command data does not include the release status of the error detected by the main CPU 93 (NO), the sub CPU 102 ends the error command reception process.

  On the other hand, when it is determined that the error command data includes the release status of the error detected by the main CPU 93 (YES), the sub CPU 102 displays the release status of the error detected by the main CPU 93 in the error management area (see FIG. 83). ) (S643), and the error command reception process ends.

<Process when receiving no operation command>
FIG. 123 is a flow chart showing a no-operation command reception process executed in step S536 of the effect content determination process shown in FIG.

  First, the sub CPU 102 stores the state of the input port transmitted by the main CPU 93 in a non-operation command in the storage area (non-operation command input information) allocated to the sub RAM 104 (S650). The data added to the no-operation command is the state of the input port input by the main CPU 93.

  Subsequently, the sub CPU 102 executes the lottery process during the fourth addition selection shown in FIGS. 147 and 148 (S 651), and executes the step-up effect sequence state transition process shown in FIG. 124 (S 652). When the process ends.

<Step-up effect sequence state transition process>
FIG. 124 is a flowchart showing step-up effect sequence state transition processing executed in step S652 of the no-operation command reception processing shown in FIG.

  First, the sub CPU 102 determines whether the step count (the value of the step counter) is larger than 0 (S660). Here, if it is determined that the step count is not larger than 0 (NO), the sub CPU 102 ends the step-up effect sequence state transition process.

  On the other hand, if it is determined that the step count is greater than 0 (YES), the sub CPU 102 adds 1 to the value of the non-operation command reception counter (S661). Next, the sub CPU 102 determines whether the trigger of the effect data corresponding to the step count of the step-up sequence table (see FIG. 71) is “0” (S662).

  Here, if it is determined that the trigger is not "0" (NO), the sub CPU 102 executes the special step-up process shown in FIG. 125 (S663), and ends the step-up effect sequence state transition process.

  On the other hand, if it is determined that the trigger is "0" (YES), the sub CPU 102 determines whether the value of the no-operation command reception counter is equal to or greater than the step count (S664). Here, if it is determined that the value of the no-operation command reception counter is not greater than or equal to the step count (NO), the sub CPU 102 ends the step-up effect sequence state transition process.

  On the other hand, if it is determined that the value of the no-operation command reception counter is equal to or greater than the step count (YES), the sub CPU 102 updates the step-up sequence table (S665). Specifically, the sub CPU 102 refers to the next effect data in the step-up sequence table.

  Next, the sub CPU 102 determines whether or not the effect data referred to in the step-up sequence table is the table end (S666). Here, if it is determined that the effect data is the table end (YES), the sub CPU 102 sets the step count to 0 (S667), and ends the step-up effect sequence state transition process.

  Although not shown in FIG. 71, during division of the table divided by lock number (for example, between final data of lock number “1” and head data of lock number “2”, and lock number Below the final data of “6”, the table end of the step-up sequence table is arranged respectively. In general, 0xffff or -1 is used for the table end, and the same applies to this embodiment.

  On the other hand, if it is determined that the effect data is not the table end (NO), the sub CPU 102 executes the step-up effect registration process shown in FIG. 126 (S668), and ends the step-up effect sequence state transition process. By executing this step-up effect sequence state transition process, the sub CPU 102 configures effect execution means.

<Special step up process>
FIG. 125 is a flowchart showing the special step-up process performed in step S663 of the step-up effect sequence state transition process shown in FIG.

  First, the sub CPU 102 determines whether the trigger of effect data to be referred to in the step-up sequence table is "1" (S670). Here, if it is determined that the trigger is “1” (YES), the sub CPU 102 determines whether the non-operation command input information is the MAX bet button, and the value of the non-operation command reception counter is a step. It is determined whether the count is equal to or more (S671).

  Here, if it is determined that the non-operation command input information is not the MAX bet button and the value of the non-operation command reception counter is not more than the step count (NO), the sub CPU 102 ends the special step-up process. .

  On the other hand, if it is determined that the non-operation command input information is the MAX bet button or the value of the non-operation command reception counter is equal to or greater than the step count (YES), the sub CPU 102 updates the step-up sequence table. (S672).

  If it is determined in step S670 that the trigger is not "1" (NO), the sub CPU 102 determines whether the value of the no-operation command reception counter is equal to or greater than the step count or not, and the value of the notification game counter is directly attached to ART. It is determined whether it is less than the number of notified games and whether or not the trigger of the step-up sequence table is 2 (S673).

  Here, if it is determined that the value of the no-operation command reception counter is not greater than the step count, the value of the notification game counter is not less than the number of ART directly put-on notification games, or the trigger of the step-up sequence table is not 2 (NO And the sub CPU 102 ends the special step-up process.

  On the other hand, if it is determined that the value of the no-operation command reception counter is greater than or equal to the step count, the value of the notification game counter is less than the number of ART directly put-on notification games, and the trigger of the step-up sequence table is 2. (YES), the sub CPU 102 adds 1 to the value of the notification game counter, and changes the step-up sequence table to the set position where the trigger is "1" (S674). In detail, the sub CPU 102 refers to the effect data in which the trigger is set to "1" in the step-up sequence table.

  After executing the process of step S672 or S674, the sub CPU 102 executes the step-up effect registration process shown in FIG. 126 (S675), and ends the special step-up process.

  By executing this special step-up process, the sub CPU 102 integrates the division value and division value obtained by dividing the number of ART-superimposed games based on the value counted by the special counter each time the sub CPU 102 determines YES in step S671. The image control means is configured to cause the liquid crystal display device 11 to sequentially display information representing at least one of the values.

  For example, if the value counted by the special counter is 5 and the number of ART-added games is 500, the sub CPU 102 determines YES in step S671 five times.

  In this case, the sub CPU 102 causes the liquid crystal display device 11 to sequentially display information indicating the number of added games of 100 games as division values equally dividing 500 games by 5 each time the determination in step S671 is YES.

  Here, each time the sub CPU 102 determines YES in step S 671, the sub CPU 102 divides the 500 games into 5 equally divided divisions by 5, for example, 50 games, 100 games, 50 games, 100 games and 200 games added games Information representing the number may be displayed on the liquid crystal display device 11 sequentially.

  Further, each time when the sub CPU 102 determines YES in step S 671, the sub CPU 102 adds, for example, 100 games, 200 games, 300 games, 400 games, and 500 games as an integrated value of division values obtained by dividing 500 games by five. The information representing H may be sequentially displayed on the liquid crystal display device 11.

<Step-up effect registration process>
FIG. 126 is a flowchart showing the step-up effect registration process executed in step S668 of the step-up effect sequence state transition process shown in FIG. 124 and in step S675 of the special step-up process shown in FIG.

  First, the sub CPU 102 acquires registration data from the step-up sequence table (S 680). Next, the sub CPU 102 sets the count value of the registration data to the value of the step counter (S681).

  Next, the sub CPU 102 sets animation data of registration data in the area for animation data determination processing (S682), and sets lamp data of registration data in the area for ramp data determination processing (S683).

  Next, the sub CPU 102 sets the sound data of the registration data in the sound data determination processing area (S684), and sets the shutter operation data of the registration data in the shutter operation data determination processing area (S685). Finish the registration process.

<Power-off detection process>
FIG. 127 is a flowchart showing a power failure detection process executed when it is detected by the sub CPU 102 that the power is turned off.

  In the present embodiment, when the power supply voltage becomes 10.5 V or less, a power failure detection circuit (not shown) in sub control substrate 42 causes sub CPU 102 to generate an NMI (Non-Maskable Interrupt), and this NMI interrupt The power failure detection process is executed in In the power failure detection process, the sub CPU 102 turns on the power failure detection flag stored in the SRAM constituting the sub RAM 104 (S690).

  That is, when the sub CPU 102 is restarted by the WDT 108, the sub CPU 102 maintains the power supply detection flag in the OFF state. In the present embodiment, when the power failure detection circuit detects a drop in the power supply voltage, an NMI is generated to cause sub CPU 102 to execute the power failure detection process, but the present invention is not limited to this. If a drop in the power supply voltage is detected within another external interrupt provided in the sub CPU 102 or processing repeatedly executed in a fixed cycle such as a main task, the power failure detection processing is executed. It is also good.

<Power failure return process>
FIG. 128 is a flowchart showing a power failure recovery process executed in step S378 of the power on process shown in FIG.

  First, the sub CPU 102 initializes the work area of the sub RAM 104, in particular, the DRAM constituting the sub RAM 104 (S700). Next, the sub CPU 102 determines whether the power failure detection flag is ON (S701).

  Here, if it is determined that the power failure detection flag is ON (YES), the sub CPU 102 executes consistency check processing of the backup storage area (S702). Specifically, the sub CPU 102 executes the checksum of the backup storage area of the SRAM constituting the sub RAM 104, and copies the data of the backup storage area to the work area if the execution result of the checksum is normal.

  Next, the sub CPU 102 turns off the power failure detection flag, turns off the power failure detection abnormality flag (S703), and ends the power failure recovery process. On the other hand, if it is determined that the power failure detection flag is OFF (YES), the sub CPU 102 turns the power failure detection abnormality flag ON (S704), and ends the power failure recovery process.

<First general middle lottery process>
FIG. 129 is a flow chart showing the first general middle lottery process executed in step S571 of the first gaming state lottery process shown in FIG.

  First, the sub CPU 102 executes the first middle game first lottery processing shown in FIG. 130 (S710). Next, the sub CPU 102 determines whether the ART direct hit flag is OFF (S711).

  Here, if it is determined that the ART direct hit flag is OFF (YES), the sub CPU 102 determines whether the number of penalty games is 0 (S712). Here, if it is determined that the number of penalty games is 0 (YES), the sub CPU 102 subtracts 1 from the number of ART high probability activated games (S713).

  If it is determined in step S712 that the ART direct hit flag is OFF (NO), the sub CPU 102 determines whether the number of ART direct hit waiting games is 0 or more (S714). Here, if it is determined that the ART direct hit activation wait game number is 0 or more (YES), the sub CPU 102 subtracts 1 from the ART direct hit activation wait game number (S715).

  If it is determined in step S 712 that the number of penalty games is not 0 (NO), or if it is determined in step S 714 that the number of directly activated ART standby games is not 0 or more (NO), or step S 713 or step S 715 After execution of the process of (1), the sub CPU 102 executes the ART added selection stock lottery process shown in FIG. 131 (S716).

  Next, the sub CPU 102 executes ART direct hit lottery processing shown in FIG. 132 (S717), executes mini slot lottery processing (S718), and ends the first general middle lottery processing. Here, in the mini slot lottery process, when the replay is won in three consecutive games, the mini slot lottery is performed, and it is determined whether the ART is won or not by this lottery result.

  The winning probability of the mini slot lottery is 3% and 25% respectively selected with a 50% probability when the replay is won for three consecutive wins, and 25% is selected when the replay played four consecutive wins. The result of the mini slot lottery is displayed by the effect by the sub CPU 102 as the result of lottery by the slot machine displayed on the liquid crystal display device 11.

<General 1 game eyes lottery process>
FIG. 130 is a flowchart showing a general first middle game random determination process performed in step S710 of the first general middle lottery process shown in FIG.

  First, the sub CPU 102 sets the temporary gaming state to "general" (S720). Next, the sub CPU 102 sets a ceiling regulation value to the number of ceiling games (S721). Next, the sub CPU 102 turns on the ART end flag (S722).

  Next, the sub CPU 102 determines whether the ART end flag is ON (S723). Here, if it is determined that the ART end flag is ON (YES), the sub CPU 102 sets “ART end” as the game number management mode lottery type (S 724).

  On the other hand, if it is determined that the ART end flag is not ON (NO), the sub CPU 102 determines whether the ART high probability end flag is ON (S725). Here, if it is determined that the ART high probability end flag is not ON (NO), the sub CPU 102 ends the first middle-game first lottery processing.

  On the other hand, if it is determined that the ART high probability end flag is ON (YES), or after the processing of step S724, the sub CPU 102 turns the ART end flag OFF (S726), and the ART high probability end flag The game is turned off (S727), and the first middle game lottery processing is ended.

<ART addition selected stock lottery process>
FIG. 131 is a flow chart showing an ART additional selected stock lottery process executed in step S 716 of the first general inside lottery process shown in FIG.

  First, the sub CPU 102 determines whether the penalty state flag is ON and whether the RT gaming state is greater than 1 (S730). Here, if it is determined that the penalty state flag is ON or the RT gaming state is larger than 1 (YES), the sub CPU 102 ends the ART-plus-selected stock lottery process.

  On the other hand, if it is determined that the penalty state flag is not ON and the RT gaming state is not greater than 1 (NO), the sub CPU 102 determines whether the ART direct hit flag is ON, and the MB is not activated. Then, it is determined whether or not the internal winning combination is "medium chelip" or "finalized bell" (S731).

  Here, when it is determined that the ART direct hit flag is not ON, the MB is not in operation, and the internal winning combination is neither “medium cheering” nor “certain bell” (NO), the sub CPU 102 End the ART added selection stock lottery process.

  On the other hand, when it is determined that the ART direct hit flag is ON or MB is not operating and the internal winning combination is "medium cheering" or "finalized bell" (YES), sub CPU 102 performs the first normal operation. The additional selection lottery process is executed (S732), and the ART additional selected stock lottery process is ended.

<ART direct hit lottery process>
FIG. 132 is a flow chart showing ART direct hit lottery processing executed in step S717 of the first general inside lottery processing shown in FIG.

  First, the sub CPU 102 determines whether the penalty status flag is ON and whether the RT gaming status is greater than 1 (S740). Here, if it is determined that the penalty state flag is ON or the RT gaming state is larger than 1 (YES), the sub CPU 102 ends the ART direct hit lottery processing.

  On the other hand, if it is determined that the penalty state flag is not ON and the RT gaming state is not greater than 1 (NO), the sub CPU 102 determines whether the ART direct hit flag is ON (S741). Here, if it is determined that the ART direct hit flag is ON (YES), the sub CPU 102 performs ART direct hit lottery based on the ART direct hit lottery table shown in FIG. 69 (S742).

  Next, the sub CPU 102 determines whether or not the lottery result of the ART direct lottery is not won (S 743), and if it is determined that the lottery result is not successful (YES), the ART direct lottery process is performed. finish.

  On the other hand, if it is determined that the lottery result is not winning, that is, it is determined that the lottery result is winning (NO), the sub CPU 102 sets the ART direct hit flag ON (S744). Next, the sub CPU 102 sets a predetermined ART specified value as the number of remaining ART games (hereinafter referred to as "the number of remaining ART games") (S745), and ends the ART direct lottery processing.

<Second general middle lottery process>
FIG. 133 is a flow chart showing a second general middle lottery process executed in step S572 of the first gaming state lottery process shown in FIG.

  First, the sub CPU 102 determines whether the ART direct hit flag is ON (S 750). Here, if it is determined that the ART direct hit flag is ON (YES), the sub CPU 102 sets "in the ART" to the provisional gaming state (S751). Next, the sub CPU 102 executes a second normal addition selection lottery process shown in FIG. 155 (S752).

  On the other hand, if it is determined that the ART direct hit flag is not ON (NO), the sub CPU 102 determines whether the number of ART high probability activated games is 0 (S754). Here, if it is determined that the ART high probability activation game number is 0 (YES), the sub CPU 102 turns on the ART high probability transition flag (S 755), and sets the "ART high probability" to the provisional gaming state. (S756).

  If it is determined in step S754 that the ART high probability activated game number is not 0 (NO), or after the processing in step S752 or S756 is ended, the sub CPU 102 transitions to the gaming state upon the occurrence of the first lock shown in FIG. The process is executed (S757), and the second general middle lottery process is finished.

<Third general middle lottery process>
FIG. 134 is a flow chart showing a third general middle lottery process executed in step S631 of the second gaming state-specific lottery process shown in FIG.

  First, the sub CPU 102 executes transition processing during the second gaming state ART shown in FIG. 117 (S760). Next, the sub CPU 102 executes the game state transition process upon occurrence of the second lock shown in FIG. 115 (S 761), and ends the third general lottery process.

<First ART high probability middle lottery process>
FIGS. 135 and 136 are flowcharts showing a lottery process during the first ART high probability performed in step S574 of the first gaming state lottery process shown in FIG.

  First, the sub CPU 102 determines whether the ART high probability transition flag is ON (S770). Here, if it is determined that the ART high probability transition flag is ON (YES), the sub CPU 102 turns the ART high probability transition flag OFF (S771), and the ART high probability remaining game count ART high probability specified value Is set (S772).

  If it is determined in step S770 that the ART high probability transition flag is not ON (NO), or after the process of step S772 is executed, the sub CPU 102 determines whether the RT gaming state is greater than 1 (S773) .

  Here, if it is determined that the RT gaming state is not greater than 1 (NO), the sub CPU 102 determines whether the number of the out-of-back revival activation waiting game is greater than 0 (S774). Here, if it is determined that the number of escape revival activation waiting games is greater than 0 (YES), the sub CPU 102 subtracts 1 from the number of the revival activation invocation waiting games (S775).

  If it is determined in step S773 that the RT gaming state is greater than 1 (YES), or if it is determined in step S774 that the number of return revival activation waiting games is not greater than 0 (NO), or the process of step S775 is executed. After that, the sub CPU 102 determines whether the penalty state flag is ON and whether the RT gaming state is larger than 1 (S776).

  Here, if it is determined that the penalty state flag is ON or the RT gaming state is larger than 1 (YES), the sub CPU 102 adds 1 to the ART high probability total game number (S777).

  Next, the sub CPU 102 determines whether the lost recovery flag is ON and whether or not the number of the lost revival activation waiting game is 0 (S778). Here, if it is determined that the lost-out recovery flag is ON and the lost-out recovery activation waiting game count is 0 (YES), the sub CPU 102 executes the first normal addition selection lottery processing shown in FIG. 154. (S779).

  If it is determined in S776 that the penalty state flag is not ON and the RT gaming state is not greater than 1 (NO), it is determined in S778 that the out-of-back revival flag is not ON or the out-of-back revival activation wait game count is not 0 If not (NO) or after executing the process of step S779, the sub CPU 102 determines whether the MB is inoperative (S780).

  Here, if it is determined that the MB is inactive (YES), the sub CPU 102 subtracts 1 from the ART high probability remaining game number (S 781). On the other hand, if it is determined that the MB is not in operation (NO), that is, if it is determined that the MB is in operation, or after the processing of step S781 is executed, the sub CPU 102 causes the main CPU 93 to drop out of the reel action lottery It is determined whether or not the player is won (S782).

  Here, if it is determined that the out reel action lottery has been won (YES), the sub CPU 102 adds 1 to the aim occurrence frequency (S783). Next, the sub CPU 102 determines whether the result of the out-of-reel action lottery is “next lever alignment” (S 784).

  Here, if it is determined that the result of the out-of-reel action lottery is "next lever aligned" (YES), the sub CPU 102 determines whether the out-of-back recovery flag is OFF (S785).

  Here, if it is determined that the outlier recovery flag is OFF (YES), the sub CPU 102 turns on the outlier recovery flag (S786), and the ART high probability out-of-order recovery activation game number is set to the number of outlier recovery activation waiting games. Set (S787).

  If it is determined in step S782 that the lost reel action lottery has not been won (NO), and if it is determined in step S785 that the lost recovery flag is not OFF (NO), or after the process of step S787 has been performed The sub CPU 102 determines whether the determination standby flag is OFF and whether the out-of-reel action state acquired from the main at the start of the game is "confirmed" (S788).

  Here, if it is determined that the determination standby flag is OFF and the out-of-reel action state acquired from the main at the start of the game is "determined" (YES), the sub CPU 102 turns the determination standby flag ON. To do (S 789).

  In step S788, when it is determined that the determination standby flag is not OFF or the out-of-reel action state acquired from the main at the start of the game is not "confirmed" (NO), or after the processing of step S789 is executed, sub CPU 102 It is determined whether the confirmation waiting flag is ON (S790).

  Here, if it is determined that the determination standby flag is NO (YES), the sub CPU 102 adds 1 to the number of determination standby games (S791). If it is determined that the determination standby flag is not NO (NO), or after the processing of step S791 is executed, the sub CPU 102 ends the first ART high probability lottery processing.

<2nd ART high probability lottery process>
FIG. 137 is a flow chart showing a lottery process during the second ART high probability performed in step S575 of the first gaming state lottery process shown in FIG.

  First, the sub CPU 102 determines whether the lost revival flag is ON and whether or not the revival start waiting game number is 0 (S800). Here, if it is determined that the missing revival flag is not ON or the number of revival revenge activation waiting games is not 0 (NO), the sub CPU 102 determines whether the RT gaming state is less than 2 and the MB is not activated. It is determined whether or not the internal winning combination of the day is "SB Lip 1" or "SB Lip 2" (S801).

  In step S801, when it is determined that the RT gaming state is not less than 2 or the internal winning combination when MB is not operating is not "SB Lip 1" or "SB Lip 2" (NO), the sub CPU 102 determines the waiting standby It is determined whether the number of games is not 0 and whether or not the number of confirmed waiting games is equal to or more than the number of predetermined waiting prescribed games (S802).

  If it is determined in step S802 that the number of decided waiting prescribed games is 0 or the number of decided waiting games is not equal to or more than the number of decided waiting prescribed games (NO), the sub CPU 102 executes the game stop execution for effect display of the game start command. It is determined whether the number is "6" (S806).

  If it is determined in step S806 that the effect display game stop execution number for the game start command is not "6" (NO), the sub CPU 102 determines whether the number of ART high probability remaining games is 0 or not. (S807).

  If it is determined in step S 807 that the ART high probability remaining game number is 0 (YES), the sub CPU 102 determines the ART high probability remaining game number based on the addition lottery table (not shown) of the ART high probability remaining game number. The addition lottery process of the number of games is executed (S808).

  Next, the sub CPU 102 adds the lottery result of the addition lottery process of the ART high probability remaining game number to the ART high probability remaining game number (S809). Next, the sub CPU 102 determines whether the number of ART high probability remaining games is 0 or not (S810). Here, if it is determined that the ART high probability remaining game number is 0 (YES), the sub CPU 102 executes the general gaming state transition process shown in FIG. 153 (S811).

  In step S800, if it is determined that the lost revival flag is ON and the lost revival activation waiting game count is 0 (YES), the RT gaming state is less than 2 and the MB is not activated in step S801. If it is determined that the internal winning combination at the time is "SB Lip 1" or "SB Lip 2" (YES), then in Step S802, the number of determined waiting prescribed games is 0 or the number of determined waiting gamings is a determined waiting prescribed game If it is determined that the number is not more than (YES), or if it is determined in step S806 that the effect display game stop execution number for the game start command is "6" (YES), the sub CPU 102 is shown in FIG. The transition process during the first gaming state ART shown in is executed (S813). Next, the sub CPU 102 adds the ART specified value to the number of remaining ART games (S 814).

  If it is determined in step S 807 that the number of ART high probability remaining games is not 0 (NO), if it is determined in step S 810 that the number of ART high probability remaining games is not 0 (NO), or step S 811 is executed. Thereafter, the sub CPU 102 executes the first lock generation game state transition process shown in FIG. 149 (S812), and ends the second ART high probability random determination process.

<Third ART high probability lottery process>
FIG. 138 is a flow chart showing a lottery processing during the third ART high probability performed in step S633 of the second gaming state type lottery processing shown in FIG.

  First, the sub CPU 102 executes transition processing during the second gaming state ART shown in FIG. 152 (S820). Next, the sub CPU 102 executes the game state transition process at the time of the second lock occurrence shown in FIG. 150 (S 821), and ends the lottery process during the third ART high probability.

<First ART in preparation lottery process>
FIG. 139 is a flow chart showing a lottery processing during preparation of the first ART executed in step S577 of the first gaming state lottery processing shown in FIG.

  First, the sub CPU 102 executes lottery processing directly on the number of ART games shown in FIG. 156 (S830). Next, the sub CPU 102 performs normal addition selection lottery to select the number of games to be added to the ART based on the normal addition selection lottery table shown in FIGS. 60 and 61 (S 831).

  Here, the sub CPU 102 determines whether the lottery result of the normal addition selection lottery is a winning (S832). If it is determined that the lottery result is a winning (YES), the sub CPU 102 sets the lottery result in the basic payout table of stock individual information (S833).

  Next, the sub CPU 102 sets “per addition selection” in the stock flag of the stock individual information (S 834). Next, the sub CPU 102 performs the addition selection continuation state lottery where the continuation selection of the addition selection is lottery based on the ART addition selection continuation state lottery table shown in FIGS. 58 and 59 (S 835).

  Next, the sub CPU 102 sets the result of the addition selection continuation state lottery to the continuation state of stock individual information (S 836). Next, the sub CPU 102 stocks stock individual information in the storage area allocated to the sub RAM 104 (S837).

  If it is determined in step S832 that the lottery result of the normal addition selection lottery is not winning (NO), or after the process of step S837 is executed, sub CPU 102 is based on the additional game lottery table shown in FIG. A game lottery is performed to determine whether or not to play a game (S838).

  Here, the sub CPU 102 determines whether or not the lottery result of the additional game lottery is a winning (S839). Here, if it is determined that the lottery result is a winning (YES), the sub CPU 102 sets the "additional game" to the stock flag of the stock individual information (S840), and the stock individual information to the sub RAM 104. Stock in the storage area allocated to (S841).

  If it is determined in step S839 that the lottery result of the additional game lottery is not a winning (NO), or after the processing of step S841 is executed, the sub CPU 102 sets the provisional gaming state to "in ART" (S842) , 1st ART in preparation Finish the lottery process.

<Part 2 lottery process under preparation for ART>
FIG. 140 is a flow chart showing a lottery process under preparation for the second ART executed in step S635 of the second gaming state lottery process shown in FIG.

  First, the sub CPU 102 determines whether or not the provisional gaming state is "in the ART" (S850). Here, if it is determined that the provisional gaming state is not “during ART” (NO), the sub CPU 102 ends the lottery processing during the second ART preparation.

  On the other hand, if it is determined that the provisional gaming state is “in the ART” (YES), the sub CPU 102 determines whether the RT gaming state is 0 or not, and the internal winning combination is “middle correct answer bell,” right 312 It is determined whether it is the correct bell or the "right 321 correct bell" and whether the first stop reel is other than the left reel 3L (S851).

  Here, it is determined that the RT gaming state is 0, the internal winning combination is "middle correct bell", "right 312 correct bell" or "right 321 correct bell", and the first stop reel is other than the left reel 3L. If it is (YES), the sub CPU 102 ends the lottery processing under preparation of the second ART.

  On the other hand, when it is determined that the RT gaming state is not 0, the internal winning combination is not "middle correct bell", "right 312 correct bell" or "right 321 correct bell", or the first stop reel is not other than left reel 3L. (YES), the sub CPU 102 determines whether the RT gaming state after stopping the third stop reel is 3 or more (S 852).

  Here, if it is determined that the RT gaming state after the third stop reel is stopped is 3 or more (YES), the sub CPU 102 ends the lottery process during the second ART preparation. On the other hand, if it is determined that the RT gaming state after stopping the third stop reel is not 3 or more (NO), the sub CPU 102 sets the provisional gaming state to "in ART preparation" (S853), and the second ART Finish the lottery process during preparation.

<First ART during lottery process>
FIGS. 141 and 142 are flowcharts showing the lottery processing during the first ART executed in step S579 of the first gaming state lottery processing shown in FIG.

  First, the sub CPU 102 executes lottery processing directly on the number of ART games shown in FIG. 156 (S860). Next, the sub CPU 102 performs ART addition selection lottery to select the number of games to be added to the ART based on the ART addition selection lottery table shown in FIGS. 58 and 59 (S861).

  Here, the sub CPU 102 determines whether or not the lottery result of the ART addition selection lottery is a winning (S 862). Here, if it is determined that the lottery result is a winning (YES), the sub CPU 102 stores the lottery result in the basic payout table of stock individual information (S863).

  Next, the sub CPU 102 sets “per addition selection” in the stock flag of the stock individual information (S864). Next, the sub CPU 102 performs the addition selection continuation state lottery in which the continuation selection of the addition selection is lottery based on the addition selection continuation state lottery table shown in FIG. 66 (S865). Next, the sub CPU 102 sets the result of the additional selection continuation state lottery to the continuation state of stock individual information (S866).

  If it is determined in step S 862 that the lottery result of the ART addition selection lottery is not a winning (NO), or after the processing of step S 866 is executed, the sub CPU 102 does not operate the MB and the internal winning combination is “RT4 transition A Or "RT4 transition B" is determined (S867). Here, “RT4 transition A” or “RT4 transition B” is a special role.

  Here, if it is determined that the MB has not been activated and the internal winning combination is "RT4 shift A" or "RT4 shift B" (YES), based on the ART-plus-game directly-aligned lottery table shown in FIG. 70. , ART addition game is performed and the lottery is performed directly (S868).

  Here, the sub CPU 102 determines whether or not the lottery result of ART-plus-game directly-sorted lottery is a winning (S869). Here, if it is determined that the lottery result is a winning (YES), the sub CPU 102 sets the "additional game" to the stock flag of the stock individual information (S870). Next, the sub CPU 102 stocks stock individual information in the storage area allocated to the sub RAM 104 (S871).

  In step S867, when it is determined that the MB has not been activated and the internal winning combination is not "RT4 shift A" or "RT4 shift B" (NO), it is determined that the lottery result of ART added game direct alignment lottery is not winning After executing the processing of step S871, the sub CPU 102 executes an additional game stock lottery processing shown in FIG. 157 (S872).

  Next, the sub CPU 102 determines whether the number of remaining ART games is greater than 0, whether the additional game flag is OFF, and whether the post-BB post addition game flag is OFF (S880).

  Here, if it is determined that the number of ART remaining games is greater than 0, the additional game flag is OFF, and the pseudo BB after additional game flag is OFF (YES), the sub CPU 102 determines 1 from the number of ART remaining games. Is subtracted (S881).

  On the other hand, if it is determined that the number of remaining ART games is not greater than 0, the in-game flag is not OFF, or the pseudo-BB after-addition game flag is not OFF (NO), or after performing the process of step S881, The sub CPU 102 adds 1 to the ART total game number (S 882).

  Next, the sub CPU 102 sets the temporary gaming state to "during ART" (S883). Next, the sub CPU 102 determines whether the "additional game" is set to the stock flag being released (S885).

  Here, if it is determined that the "additional game" is set in the stock flag being released (YES), the sub CPU 102 sets the temporary gaming state to the "additional game" (S886). On the other hand, if it is determined that the "additional game" is not set in the stock flag being discharged (NO), the sub CPU 102 determines whether the "perl addition selection" is set in the stock flag being discharged. It judges (S887).

  Here, if it is determined that "per addition selection" is set in the stock flag being released (YES), the sub CPU 102 sets the temporary gaming state to "under selection" (S888).

  On the other hand, if it is determined that "per addition selection" is not set in the stock flag being discharged (NO), the sub CPU 102 discards the stock being discharged (S889). Next, the sub CPU 102 sets the stock type of the stock being released to "no stock while releasing" (S890).

  After executing the processing of step S 886, S 888 or S 890, the sub CPU 102 stores in the storage areas A to D whether or not the provisional gaming state is “in ART”, whether the number of remaining ART games is 0 or not. It is determined whether the individual information is not stored and whether the additional game in progress flag is OFF (S891).

  Here, when it is determined that the provisional gaming state is "in the ART", the number of remaining ART games is 0, the stock individual information is not stored in the storage areas A to D, and the in-play game flag is OFF. (YES), the sub CPU 102 performs ART pullback lottery where the lottery of ART pullback is performed with a predetermined probability (S892).

  Here, the sub CPU 102 determines whether the lottery result of the ART pullback lottery is “off” (S893), and determines that the lottery result of the ART pullback lottery is not “off” (NO), The lottery result is set to the ART pullback flag (S894), and the ART specified value is added to the number of remaining ART games (S895).

  In step S893, if the sub CPU 102 determines that the lottery result of the ART pullback lottery is “disappeared” (YES), or after executing the processing of step S895, the sub CPU 102 selects the number-of-games management mode lottery type "ART end" is set (S896). Next, the sub CPU 102 sets the temporary gaming state to "general" (S897), and sets an ART end flag (S898).

  In step S891, stock individual information is stored in any of storage areas A to D in which the provisional gaming state is not "in ART", the number of remaining ART games is not 0, or the in-game flag is not OFF. If it is determined (NO), or after the process of step S898 is executed, the sub CPU 102 ends the lottery process during the first ART.

<2nd ART lottery process>
FIG. 143 is a flow chart showing a lottery process during the second ART performed in step S637 of the second gaming state type lottery process shown in FIG.

  First, the sub CPU 102 determines whether the temporary gaming state is “generally” and the RT gaming state after the third stop reel is stopped is two or more (S900). Here, if it is determined that the provisional gaming state is "generally" and the RT gaming state after the third stop reel is stopped is 2 or more (YES), the sub CPU 102 enters the provisional gaming state " "Pending normal return" is set (S901). Next, the sub CPU 102 sets an ART end flag (S902).

  In step S900, when it is determined that the temporary gaming state is not "generally" or that the RT gaming state after stopping the third stop reel is not 2 or more (NO) or after performing the processing of step S902 The sub CPU 102 ends the lottery processing during the second ART.

<First additional selection while lottery processing>
FIGS. 144 and 145 are flowcharts showing lottery processing during first additional selection which is executed in step S581 of the first gaming state lottery processing shown in FIG.

  First, the sub CPU 102 sets the contents of the use table in the payout table before shuffle (S 910). Next, the sub CPU 102 determines whether or not the peeping activation flag is "peeping in operation" (S911).

  Here, if it is determined that the peeping activation flag is “peeping in operation” (YES), the sub CPU 102 sets the peeping activation flag to “none” (S912). On the other hand, if it is determined that the peeping activation flag is not "peeping in operation" (NO), or after the processing in step S912, the sub CPU 102 determines whether the peeping activation flag is "peeping" It is determined whether or not it is (S913).

  Here, if it is determined that the peeping activation flag is "peeping present" (YES), the sub CPU 102 sets the peeping activation flag to "peeping in operation" (S914). On the other hand, if it is determined that the peeping activation flag is not "peeping present" (NO), or after the processing in step S913, the sub CPU 102 determines whether the peeping activation flag is "peeping in operation" It is determined whether or not (S915).

  Here, if it is determined that the peeping activation flag is “peeping in operation” (YES), the sub CPU 102 performs the addition selection special function activation lottery based on the special function activation lottery table shown in FIG. 62. (S916).

  Next, the sub CPU 102 determines whether the lottery result of the additional selection special function activation lottery is “crush” (S917). Here, if it is determined that the lottery result of the additional selection special function activation lottery is “Crush” (YES), the sub CPU 102 counts the number of elements to be crushed and displayed based on the crushing number lottery table shown in FIG. The number of selected additional items is randomly selected (S918). Next, the sub CPU 102 sets the lottery result as the number of squashed pieces (S919), and sets 1 as the number of games to be added for selection of additional games (S920).

  In step S 917, when it is determined that the lottery result of the additional selection special function activation lottery is not “Crush” (NO), the sub CPU 102 determines whether the lottery result of the additional selection special function activation lottery is “peeping” or not It is determined (S921).

  If it is determined that the lottery result of the additional selection special function activation lottery is "peep" (YES), the sub CPU 102 sets "peep" in the peep activation flag (S922), and the additional selection is determined. The number of games is set to 2 (S923).

  If it is determined in step S921 that the lottery result of the additional selection special function activation lottery is not "peep" (NO), the sub CPU 102 sets 1 as the number of additional selection determination games (S924).

  If it is determined in step S915 that the peeping activation flag is not "peeping in operation" (NO), or after the process of step S920, S923 or S924 is executed, the sub CPU 102 determines that the number of games to be added is determined to be 1 It is determined whether or not (S925).

  Here, if it is determined that the number of added game selection determination games is 1 (YES), the sub CPU 102 performs the additional selection continued state lottery based on the additional selection continued state lottery table shown in FIG. 66 (S926) .

  Next, the sub CPU 102 determines whether or not the lottery result of the additional selection continued state lottery is not “discontinue” (S927), and when it is determined that the lottery result of the additional selection continued state lottery is not “discontinue” (YES), the lottery result is set in the continuous state payout table (S928).

  If it is determined in step S925 that the number of games selected for addition selection is not 1 (NO), if it is determined in step S927 that the lottery result of the addition selection continuation state lottery is not "discontinue" (NO), or, step S928 After execution of the process of (1), the sub CPU 102 determines whether the MB is inactive and the internal winning combination is "RT4 transition A" or "RT4 transition B" (S929).

  Here, if it is determined that the MB is inactive and the internal winning combination is "RT4 shift A" or "RT4 shift B" (YES), the sub CPU 102 selects ART-added-game directly-aligned lottery shown in FIG. 70. Based on the table, ART plus game is performed and the lottery is performed directly (S930).

  Here, the sub CPU 102 determines whether or not the lottery result of ART-plus-game direct-sorted lottery is a winning (S931). Here, if it is determined that the lottery result is a winning (YES), the sub CPU 102 sets the "additional game" to the stock flag of the stock individual information (S932).

  If it is determined in step S929 that the MB has not been activated and the internal winning combination is not "RT4 shift A" or "RT4 shift B" (NO), it is determined in step S931 that the lottery result of ART added game straight match lottery is not winning. If it is determined (NO), or after the process of step S932 is executed, the sub CPU 102 executes an additional game stock lottery process shown in FIG. 157 (S933).

  Next, the sub CPU 102 randomly determines the arrangement of the use table (S934), subtracts 1 from the number-of-addition game determination game number (S935), and ends the lottery process during the first additional selection.

<2nd addition selection during lottery process>
FIG. 146 is a flow chart showing lottery processing during second addition selection which is executed in step S582 of the first gaming condition-specific lottery processing shown in FIG.

  First, the sub CPU 102 determines whether or not the number of games to be added selection determination is 0 (S940). If it is determined that the number of games to be added for selection is 0 (YES), the addition shown in FIG. Selection continuation state The addition selection continuation state lottery based on the lottery table is performed (S941).

  Next, the sub CPU 102 determines whether the lottery result of the additional selection continuation state lottery is "discontinue" (S942), and determines that the lottery result of the additional selection continuation state lottery is "discontinue" (YES), the provisional gaming state is set to "during ART" (S943).

  On the other hand, if it is determined that the lottery result of the additional selection continuation state lottery is not "discontinuing" (NO), the sub CPU 102 determines that the lottery result of the additional selection continuation state lottery is "continuation D" to "continuation F". It is determined whether or not it is (S944).

  Here, if it is determined that the lottery result of the additional selection continuation state lottery is any of “continuation D” to “continuation F” (YES), the sub CPU 102 sets the provisional gaming state to “during ART”. (S945), clear the stock release precursor flag (S946).

  On the other hand, if it is determined that the lottery result of the additional selection continuation state lottery is not any of “continuation D” to “continuation F” (NO), the sub CPU 102 sets the temporary gaming state to “additionally selected”. (S947). If it is determined in step S940 that the number of games to be added selection determination is not 0 (NO), the sub CPU 102 sets the temporary gaming state to "additionally selected" (S948).

  After executing the processing of step S943, S946, S947 or S948, if the pseudo BB winning state is ON, the sub CPU 102 sets "between BB flags" as the provisional gaming state (S949).

  Next, the sub CPU 102 determines whether or not the additional game selection determination game number is 0 (S950). If it is determined that the additional game selection determination game number is 0 (YES), the additional game number acquisition permission is permitted. The flag is turned on (S951).

  On the other hand, if it is determined that the number of games selected for addition selection is not 0 (NO), or after the processing of step S951 is executed, the sub CPU 102 ends the lottery processing during second addition selection.

<Fourth addition during selection lottery process>
FIGS. 147 and 148 are flowcharts showing the fourth addition selection lottery process during the no-operation command reception process shown in FIG. 123, which is executed in step S651.

  First, the sub CPU 102 determines whether the additional game number acquisition permission flag is ON and the third stop reel has stopped (S960). Here, if it is determined that the additional game number acquisition permission flag is not ON or it is not after the third stop reel has stopped (NO), the sub CPU 102 ends the fourth additional selection selection lottery process.

  On the other hand, if it is determined that the additional game number acquisition permission flag is ON and it is after the third stop reel has been stopped (YES), the sub CPU 102 indicates whether the non-operation command input information represents the MAX bet button 14 It is determined whether or not (S961).

  Here, if it is determined that the no-operation command input information represents the MAX bet button 14 (YES), the sub CPU 102 turns off the additional game number acquisition permission flag (S 962), and the selected payout position (selected) The value corresponding to the element is added to the number of remaining ART games (S963). Next, the sub CPU 102 sets a value corresponding to the selected payout position as the number of additional selection notification games (S 964), and ends the fourth additional selection selection lottery process.

  If it is determined in step S 961 that the no-operation command input information does not represent the MAX bet button 14 (NO), the sub CPU 102 determines whether the no-operation command input information represents the left stop button 17 L. (S965).

  Here, if it is determined that the non-operation command input information represents the left stop button 17L (YES), the sub CPU 102 moves the selected payout position leftward by one element position, and the selected payout position is If it is within the selectable range, the selected payout position is shifted to the left by one element position (S966), and the lottery processing during the fourth addition selection is ended.

  On the other hand, when it is determined that the non-operation command input information does not represent the left stop button 17L (NO), the sub CPU 102 determines whether the non-operation command input information represents the right stop button 17R (S967). ).

  Here, if it is determined that the no-operation command input information indicates the right stop button 17R (YES), the sub CPU 102 moves the selected payout position rightward by one element position, and the selected payout position is If it is within the selectable range, the selected payout position is shifted rightward by one element position (S968), and the lottery processing during the fourth addition selection is ended.

  On the other hand, if it is determined that the non-operation command input information does not represent the right stop button 17R (NO), the sub CPU 102 determines whether the non-operation command input information represents the middle stop button 17C (S969). ).

  Here, if it is determined that the no-operation command input information represents the middle stop button 17C (YES), the sub CPU 102 moves the selected payout position downward by one element position, and the selected payout position is If it is within the selectable range, the selected payout position is shifted downward by one element position (S 970), and the lottery processing during the fourth addition selection is ended.

  On the other hand, when it is determined that the non-operation command input information does not represent middle stop button 17C (NO), sub CPU 102 determines whether the non-operation command input information represents selection button 18 or determination button 19 or not. (S971). Here, if it is determined that the non-operation command input information indicates neither the selection button 18 nor the determination button 19 (NO), the sub CPU 102 ends the fourth additional lottery selection lottery process.

  On the other hand, if it is determined that the no-operation command input information indicates the selection button 18 or the determination button 19 (YES), the sub CPU 102 determines whether the peeping activation flag is “peeping in operation” or not. (S972).

  Here, if it is determined that the peeping activation flag is “peeping in operation” (YES), the sub CPU 102 sets the selected payout position to a random position (S 973), and the fourth additional lottery is selected. End the process.

  On the other hand, if it is determined that "peeping operation is not in progress" (NO), the sub CPU 102 sets the selected payout position to a position where the maximum payout can be obtained (S974), and ends the fourth additional selection selection lottery process. Do.

  It should be noted that the above “if the selected payout position can be selected even if the selected payout position is moved by one element position in the left direction (right direction or downward direction)” (upper part of S966, S968, S970) Specifically, this is the execution condition of the process of determining the selected payout position to be performed in the lottery process during the fourth additional selection and the process of moving the selected payout position, for example, in FIG. When the left stop button 17L is pressed with the element (sixth element) selected, the selected payout position moves to the element (fifth element) at the right end of the upper row, but the selected payout position is an element If the number is less than the number or if the number of elements is exceeded, the process of moving the selected payout position by one element position is not performed. The same applies to the case where the right stop button 17R and the middle stop button 17C described later are pressed.

<Additional game lottery process>
During the additional game, the lottery process is executed by the sub CPU 102 for a predetermined number of games (for example, 10 games) in step S584 of the first gaming state lottery process shown in FIG.

  In the extra game during lottery processing, the sub CPU 102 notifies the stop operation of the reels 3L, 3C, 3R so that the RT gaming state does not transition from the RT4 gaming state, and the reel for making the small winning combination internally winning advantageous. The stop operation of 3L, 3C, 3R is notified.

  Further, the sub CPU 102 determines that “RT4 transition A”, “RT4 transition B”, “BAR ten”, “RT4K lip 1st”, “RT4K lip 2nd” and “RT4K lip 3rd” are determined as internal winning combinations. And a message prompting to display "BAR-BAR-BAR" along the effective line, and a stop operation of the reels 3L, 3C, 3R for displaying "BAR-BAR-BAR" along the effective line. Inform.

  Here, when “RT4 shift A” and “RT4 shift B” are determined as the internal winning combinations, the sub CPU 102 adds 1 to the number of games to be added to determine the addition.

<A game state transition process at the time of the first lock occurrence>
FIG. 149 is a flowchart showing first lock generation game state transition processing executed in step S757 of the second general middle lottery processing shown in FIG.

  First, the sub CPU 102 determines whether or not the game stop execution number for effect display of the game start command is "6" (S980), and the game stop execution number for effect display for the game start command is "6" If it is determined (YES), "in the ART" is set as the temporary gaming state (S981).

  In step S 980, when it is determined that the game display execution execution number for effect display of the game start command is not “6” (NO), or after executing the processing of step S 981, the sub CPU 102 is in the first lock occurrence game state End transition processing.

<A game state transition process at the time of the second lock occurrence>
FIG. 150 is a flowchart showing second lock generation game state transition processing executed in step S761 of the third general lottery processing shown in FIG. 134 and step S821 of the third ART high probability lottery processing shown in FIG. It is.

  First, the sub CPU 102 determines whether the game stop execution number for effect display for the game start command is "6" (S990), and the game stop execution number for effect display for the game start command is "6" If it is determined (YES), it is determined whether the RT gaming state after stopping the third stop reel is less than 3 and the gaming state is “waiting for normal return” (S991).

  Here, when it is determined that the RT gaming state after the third stop reel is less than 3 and the gaming state is “wait for normal return” (NO), the sub CPU 102 determines that the provisional gaming state is “ "Preparing ART" is set (S992).

  On the other hand, when it is determined that the RT gaming state after stopping the third stop reel is not less than 3 or the gaming state is not "wait for normal return" (NO), the sub CPU 102 sets the temporary gaming state to "ART Set "medium" (S993).

  In step S990, when it is determined that the game display execution execution number for effect display of the game start command is not "6" (NO), or after the processing of step S992 or S993 is executed, the sub CPU 102 generates the second lock The game state transition process is ended.

<First game state ART transition processing>
FIG. 151 is a flow chart showing the first gaming state ART transition processing executed in step S813 of the second ART high probability lottery processing shown in FIG. In the transition processing during the first gaming state ART, the sub CPU 102 sets "temporary gaming state" to "ART in progress" (S1000), and executes the second normal addition selection lottery processing shown in FIG. 155 (S1001).

<Second game state ART transition processing>
FIG. 152 is a flowchart showing transition processing during the second gaming state ART executed in step S760 of the third general lottery processing shown in FIG. 134 and step S820 of the third ART high probability lottery processing shown in FIG. is there.

  First, the sub CPU 102 determines whether or not the temporary gaming state is "in the ART" and the RT gaming state after the third stop reel is 2 or less (S1010), and the temporary gaming state is "ART" If it is determined that the RT gaming state after stopping the third stop reel is 2 or less (YES), then the provisional gaming state is set to "ART in preparation".

  In step S1010, when it is determined that the temporary gaming state is not "in the ART" or the RT gaming state after the third stop reel is not 2 or less (NO), or after the processing of step S1011 is performed , And the sub CPU 102 ends the transition processing during the second gaming state ART.

<A game state general middle transition processing>
FIG. 153 is a flowchart showing gaming state general medium transition processing which is executed in step S811 of the second ART high probability lottery processing shown in FIG. In the general gaming state transition process, the sub CPU 102 turns on the additional game ending flag (S1015), and sets the temporary gaming state to "general" (S1016).

<First normal addition selection lottery process>
FIG. 154 is a flow chart showing a first normal addition selection lottery process executed in step S779 of the first ART high probability lottery process shown in FIGS. 135 and 136.

  First, the sub CPU 102 performs normal addition selection lottery in which normal addition selection lottery is performed to select the number of games to be added to the ART based on the normal addition selection lottery table shown in FIGS. 60 and 61 (S1020). Here, the sub CPU 102 determines whether or not the lottery result of the normal addition selection lottery is not winning (S1021). If it is determined that the lottery result is not a winning result (YES), the sub CPU 102 ends the first normal addition selection lottery process.

  In step S91, when it is determined that the lottery result of the normal addition selection lottery is not not winning (NO), the sub CPU 102 sets the lottery result in the basic payout table of stock individual information (S1022).

  Next, the sub CPU 102 sets “per addition selection” in the stock flag of the stock individual information (S1023). Next, the sub CPU 102 performs the addition selection continuation state lottery where the continuation selection of the addition selection is lottery based on the addition selection continuation state lottery table shown in FIG. 66 (S1024). Next, the sub CPU 102 sets the result of the addition selection continuation state lottery to the continuation state of stock individual information (S1025), and ends the first normal addition selection lottery processing.

<Second normal addition selection lottery processing>
FIG. 155 is a flow chart showing a second normal addition selection lottery process executed in step S752 of the second general middle lottery process shown in FIG. 133 and step S1001 of the first gaming state ART middle transition process shown in FIG. is there.

  First, the sub CPU 102 performs ART first hit addition selected lottery based on the ART first hit added selection selection table shown in FIG. 57 (S1032), and determines whether the lottery result is not winning (S1033) ).

  Here, if it is determined that the lottery result of the ART first hit addition trial selection lottery is not won (YES), the sub CPU 102 ends the second normal addition selection lottery process. On the other hand, if it is determined that the lottery result of the ART first winning when added selection lottery is not not successful (NO), the sub CPU 102 sets the lottery result in the basic payout table of stock individual information (S1034).

  Next, the sub CPU 102 sets “per addition selection” in the stock flag of the stock individual information (S1035). Next, the sub CPU 102 performs the addition selection continuation state lottery in which the continuation selection of the addition selection is lottery based on the addition selection continuation state lottery table shown in FIG. 66 (S1036). Next, the sub CPU 102 sets the result of the addition selection continuation state lottery to the continuation state of stock individual information (S1037), and ends the second normal addition selection lottery processing.

<Art game number direct addition lottery processing>
FIG. 156 is a flowchart showing ART game number direct loading lottery processing executed in step S830 of the first ART preparation lottery processing shown in FIG. 139 and step S860 of the first ART lottery processing shown in FIGS. 141 and 142 is there.

  First, the sub CPU 102 performs lottery directly on the number of games to lottery the number of games to be added to the ART based on the number-of-games added lottery table shown in FIG. 55 (S1040), and determines whether the lottery result is greater than 0 or not. It judges (S1041). Here, if it is determined that the lottery result of the number-of-games direct-place lottery is larger than 0 (YES), the sub CPU 102 adds the lottery result to the number of remaining ART games (S1042).

  If it is determined in step S1041 that the lottery result of the number-of-games direct-place lottery is not greater than 0 (NO), or after the processing of step S1042 is executed, the sub CPU 102 ARTs the lottery result of the number-of-games direct placement lottery The number of games directly put on notice is set (S1043), and the lottery processing directly on number of ART games is finished.

<Additional game stock lottery processing>
FIG. 157 shows the additional game stock lottery processing executed in step S872 of the lottery processing during the first ART shown in FIGS. 141 and 142 and in step S933 of the lottery processing during the first additional selection shown in FIGS. It is a flowchart.

  First, the sub CPU 102 performs ART additional game stock lottery based on the additional game lottery table shown in FIG. 68 (S1050), and determines whether or not the lottery result is winning (S1051).

  Here, if it is determined that the lottery result of the ART added game stock lottery is a winning (YES), the sub CPU 102 sets the "added game" to the stock flag of the stock individual information (S1052).

  If it is determined in step S1051 that the lottery result of ART-added game stock lottery is not winning (NO), or after the process of step S1052, the sub CPU 102 ends the added-game stock lottery process.

<Normally waiting for return lottery process>
FIG. 158 is a flow chart showing lottery processing during normal return waiting to be executed in step S586 of the first gaming condition-specific lottery processing shown in FIG.

  First, the sub CPU 102 determines whether the MB is inactive and the internal winning combination is the "middle correct bell", the "right 312 correct bell" or the "right 321 correct bell" (S1060). Here, when it is determined that the MB is inactive and the internal winning combination is not "middle correct bell", "right 312 correct bell" or "right 321 correct bell" (NO), the sub CPU 102 enters the provisional gaming state. “Waiting for normal return” is set (S1061), and a return lottery process is performed to perform return lottery with a predetermined probability (S1062).

  On the other hand, if it is determined that the MB is not working and the internal winning combination is "middle correct bell", "right 312 correct bell" or "right 321 correct bell" (YES), sub CPU 102, ART end flag It is turned on (S1063), and "general" is set as the temporary gaming state (S1064).

  After executing the processing of step S1062 or S1064, the sub CPU 102 executes the first lock generation game state transition processing shown in FIG. 149 (S1065). Next, the sub CPU 102 determines whether the temporary gaming state is “waiting for normal return” or “generally in progress” (S1066).

  Here, if it is determined that the provisional gaming state is “waiting for normal return” or “generally in progress” (YES), the sub CPU 102 ends the lottery processing while waiting for normal return. On the other hand, if it is determined that the provisional gaming state is not "waiting for normal return" or "generally" (NO), the sub CPU 102 turns the ART end flag OFF (S1067) and clears the ART withdrawal flag ( In step S1068, the lottery process is ended while waiting for the normal return.

  As described above, the pachislot machine 1 according to the present embodiment increases the number of additions of the number of ART games with the first probability, and is determined on the condition that the number of additions of the number of ARTs game is determined. With the second probability that increases as the added number increases, it is determined whether the determined added number is added to the number of ART games.

  That is, the pachislot machine 1 according to the present embodiment lowers the probability that the number of ART games is added when the number of additions of ART is smaller than when the number of additions of ART is large. Therefore, it is possible to prevent excessive payout of medals and to prevent the player's interest from being reduced.

  In addition, the pachislot machine 1 according to the present embodiment is, in the additional game, for example, every time the combination of symbols constituting “RT4 transition A” or “RT4 transition B” is stopped on the effective line, “RT4 transition A” or “RT4” every time a combination of symbols making up “RT4 transition A” or “RT4 transition B” is displayed on the effective line in order to increase the number of lotteries per game for the addition number. It is possible to make the player expect a change in the benefit with respect to the display of “transition B”.

  Further, in the pachislot machine 1 according to the present embodiment, every time the reels 3L, 3C, 3R are stopped, the number of additions of the number of ART games among lottery results per game to the number of additions of the number of ARTs is In order to notify from the small lottery result, it is possible to keep the player's expectation from stopping the first reel to stopping the last reel.

  In addition, pachislot machine 1 according to the present embodiment is determined to perform the lock in the next game in the out game during ART high probability, and announcing a specific stop operation order (for example, right press) A specific stop operation order for displaying a combination of symbols (for example, "蝙蝠") on the effective line is informed on the condition that the determination is made.

  In addition, the pachislot machine 1 according to the present embodiment is locked in the next game on condition that the combination of symbols is not displayed on the activated line as a result of the stop operation being performed in the specific stop operation order. An "out-of-reel action" is performed to rotate at least one of the plurality of reels 3L, 3C, 3R so that the combination of symbols is displayed on the effective line.

  For this reason, the pachislot machine 1 according to the present embodiment does not change the RT gaming state, but based on whether or not locking is performed and whether or not a specific stop operation sequence is performed, the combination of symbols is performed. It is possible to change the display probability and to reduce the data area used.

  In addition, the pachislot machine 1 according to the present embodiment changes the mode from the current mode to a mode in which it is determined that the lock is to be performed in the next game based on the winning of a specific internal winning combination in the ART high probability. Perform a lottery on whether to make the transition.

  On the other hand, does the pachislot machine 1 according to the present embodiment shift the mode from the current mode to a mode in which it is determined that the lock is to be performed in the next game based on the non-winning of the winning combination in ART high probability? Perform a lottery on whether or not it is not.

  As a result, the pachislot machine 1 according to the present embodiment is more likely to be determined to perform the lock in the next game when the winning of a specific internal winning combination is continued during the ART high probability, while the ART high If the winning combination is not won during the probability, it will be difficult to decide to lock in the next game.

  Therefore, the pachislot machine 1 according to the present embodiment can provide relief to the probability of occurrence of lock in the ART high probability, and can improve interest in the ART high probability.

  Further, the pachislot machine 1 according to the present embodiment causes the player to select the addition number of the ART game number advantageous to the player, so that the number of games relatively large depending on the player's selection result Can be given to the ART, so that the player's interest in the ART can be maintained.

  In addition, the pachislot machine 1 according to the present embodiment is a game in which the player is made to select one element from among a plurality of elements in a state in which the player is notified of the distribution of the number of ART games to a plurality of elements. It is possible to improve the player's interest when making the player select an element.

  In addition, the pachislot machine 1 according to the present embodiment notifies the player of the number of ART games associated with at least one of the plurality of elements (a “crush” function). In order to allow the player to select one element among them, the player can select the element relatively advantageously, and it is possible to improve the player's interest when making the player select the element.

  Moreover, the pachislot machine 1 according to the present embodiment is subjected to a predetermined operation in a state in which a plurality of elements are made such that the number of ART games associated with each of the plurality of elements can not be identified. , The element is selected at random from among a plurality of elements, and in a state where a plurality of elements are made so that the number of ART games respectively associated with the plurality of elements can not be identified, the predetermined operation is performed As a condition, it is possible to simplify the player's selection of elements in order to select the most advantageous element for the player from among a plurality of elements.

  Further, the pachislot machine 1 according to the present embodiment determines the number of games associated with the selected element as an addition number of the number of ART games, on condition that one element is selected, and the predetermined number Since the average of the number of games associated with each of the plurality of elements is determined as the addition number of the number of ART games under the condition that the operation has been performed, it is also stable that the player aims at a large number of games. It is also possible to select the number of games played, and allow the player to select the game feature.

  Further, the pachislot machine 1 according to the present embodiment sets the number of grace games when the abnormal stop operation is performed, and the abnormal stop operation is performed again while the number of the grace games is digested. , Penalty not to ART lottery.

  Therefore, the pachislot machine 1 according to the present embodiment determines that the first irregular stop operation is an irregular stop operation performed unintentionally and does not impose a penalty, while the number of grace games is reduced. The second irregular stop operation made during this time is penalized by judging it as an intentional abnormal stop operation.

  Therefore, the pachislot machine 1 according to the present embodiment changes the weight of the penalty imposed on the player by the irregular stop operation performed unintentionally by the player and the irregular stop operation intentionally performed. As a result, it is possible to prevent a penalty from being imposed on the player who unintentionally performed the gear shift operation.

  In addition, the pachislot machine 1 according to the present embodiment may have been a deliberately anomalous stop operation when there is a winning combination due to an irregular stop operation in a state where the number of grace games is not set. Judging that it is high, a penalty is imposed while the number of games is smaller than the number of penalty games imposed when the second irregular stop operation is made. As a result, it is possible to change the weight of the penalty imposed on the player according to the level of the possibility of the irregular stop operation performed intentionally.

  In addition, in the pachislot machine 1 according to the present embodiment, when the player's role in replay is won, a specific operation (depression of the MAX bet button 14) is performed when a predetermined condition is satisfied. In order to stop the automatic insertion of medals up to the point, the time for performing effects due to the player's role in the re-game is secured sufficiently and the medal is inserted even if the player's role in the re-game wins The effect to be executed can be executed by the player's game operation.

  In addition, pachislot machine 1 according to the present embodiment switches the screen displayed on liquid crystal display device 11 to the selected game screen when the display end condition of the screen displayed on liquid crystal display device 11 is satisfied during the selected game. When the screen is switched, the selection state information stored in the sub RAM 104 is reflected on the selected game screen.

  Therefore, the pachislot machine 1 according to the present embodiment returns the selected game screen even when the selected game screen is switched to another screen during the selected game in which the number of ART added games is determined. In addition, the selection state of the selected game can be reproduced on the selected game screen.

  In addition, the pachislot machine 1 according to the present embodiment selects a game from an error screen displayed on the liquid crystal display device 11 when an error is detected during at least one of the main control circuit 91 and the sub control circuit 101. When returning the screen, the selected state of the selected game can be reproduced on the selected game screen.

  Further, the pachislot machine 1 according to the present embodiment can display the selected game screen from the error information history screen even if the error information history screen representing the history of errors is displayed on the liquid crystal display device 11 during the selected game. When returning, the selected state of the selected game can be reproduced on the selected game screen.

  In addition, the pachislot machine 1 according to the present embodiment displays the information representing at least one of the division value obtained by dividing the determined number of ART added games and the integrated value of the division value as liquid crystal display whenever a predetermined condition is satisfied. In order to cause the device 11 to sequentially display, it is possible to give the player a sense of expectation of being able to receive benefits more than the number of ART-superimposed games displayed on the liquid crystal display device 11.

  In addition, the pachislot machine 1 according to the present embodiment can prevent interruption of the effects relating to the number of ART-added games displayed on the liquid crystal display device 11 due to the game operation.

  In addition, the pachislot machine 1 according to the present embodiment changes the display time of the effect relating to the number of ART-added games displayed on the liquid crystal display device 11 according to the player's preference within a predetermined time range. be able to.

  In addition, when the image displayed on the liquid crystal display device 11 is switched while the shutter is operating, the pachi-slot machine 1 according to the present embodiment stores the shutter operation data representing the state of the shutter in the sub RAM 104. In order to ensure visibility of the image after switching, the shutter is moved to the exposure position, and when the display end condition of the image after switching is satisfied, the shutter is brought into a state represented by the shutter operation data stored in the sub RAM 104.

  For this reason, the pachislot machine 1 according to the present embodiment can continue the effect by the action of the character which has been executed before switching the image displayed on the liquid crystal display device 11, and the player can enjoy the game Can be suppressed.

  Further, the pachi-slot machine 1 according to the present embodiment stores shutter operation data in the sub RAM 104 and secures the visibility of the error screen when the display condition of the error screen is satisfied while the shutter is operating. The shutter is moved to the exposure position, and when the display end condition of the error screen is satisfied, the shutter is executed before displaying the error screen on the liquid crystal display device 11 in order to bring the shutter into the state represented by the movable information stored in the sub RAM 104. The effect by the operation of the shutter can be continued.

  Further, the pachi-slot machine 1 according to the present embodiment stores the shutter operation data in the sub RAM 104 when the display conditions of the error information history screen are satisfied while the shutter is operating, and the visibility of the error information history screen To ensure that the shutter operation data stored in the sub RAM 104 represents the shutter when the display end condition of the error information history screen is satisfied. It is possible to continue the effect by the operation of the shutter that has been executed before the screen is displayed.

  In addition, the pachislot machine 1 according to the present embodiment synchronizes with the non-operation command transmitted from the main control circuit 91 to the sub control circuit 101 on condition that the lock effect is being executed, the main control circuit 91. In order to execute the rendition by the sub-control circuit 101 and each step of rendition by the sub-control circuit 101, it is possible to eliminate the synchronization deviation between the rendition by the main control circuit 91 and the rendition by the sub-control circuit 101.

  Further, since the pachislot machine 1 according to the present embodiment executes the rendering operation by the shutter based on the execution of each step of the rendering, the lock effect by the main control circuit 91 and the sub control circuit 101 It is possible to eliminate the out-of-synchronization between the effects by the shutter.

  In addition, the pachislot machine 1 according to the present embodiment performs the shutter operation so that the operation of the shutter is matched based on the effect before being stored by the sub RAM 104 and the determined effect and the shutter operation combination determination table Control of shutter operation can be simplified to construct a sequence.

  In addition, even if there is an error in the control of the shutter operation, the pachi-slot machine 1 according to the present embodiment prevents the shutter from becoming inoperable due to a mismatch in the cooperation of the shutter operations. it can.

  Further, in the pachislot machine 1 according to the present embodiment, the game state of the main control circuit 91, the game state of the sub control circuit 101, and the internal winning combination are performed when the stop operation different from the predetermined stop operation order is performed. To set the disadvantageous state according to the size of the privilege that the player may be able to obtain by setting to the disadvantageous state based on the stop operation which is different from the predetermined stop operation order An adverse condition can be set appropriately for the operation.

  In addition, the pachislot machine 1 according to the present embodiment sets the number of grace games when an abnormal operation of the secondary control circuit 101 is detected, and while the unit game of the number of grace games is executed, the secondary control circuit The condition disadvantageous to the player is set on condition that the abnormal operation of 101 is detected again.

  That is, when it is detected that there is a possibility that an electrical goto action has been performed, the pachislot machine 1 according to the present embodiment is electrically operated while unit games of the number of grace games are executed. In order to set the disadvantageous state for the player on condition that it is detected that the goto action may have been performed again, the electric of the new signature is made without giving the player an unnecessary discomfort. Measures can be taken against Goto acts.

  Further, the pachislot machine 1 according to the present embodiment can perform the electrical goto action when receiving the start command from the main control circuit 91 when the power failure detection flag is in the off state at the time of power failure recovery. Since it can be determined that the sub CPU 102 has been stopped and restarted due to a factor that is also characteristic, it is possible to detect that there is an abnormal operation of the sub control circuit 101.

  Further, in the pachislot machine 1 according to the present embodiment, when the sub control circuit 101 receives the start command without receiving the initialization command from the main control circuit 91 once, the possibility of electrical goto action Since it can be determined that the sub control circuit 101 can not receive the initialization command even once due to a certain factor, it can be detected that there is an abnormal operation of the sub control circuit 101.

  Further, in the pachislot machine 1 according to the present embodiment, when the reception order of the commands relating to the progress of the unit game is different from the prescribed order, the sub control circuit 101 receives it by the factor having the possibility of electric goto action. Since it can be determined that there is a command that could not be made, it can be detected that there is an abnormal operation of the sub control circuit 101.

  In addition, the pachislot machine 1 according to the present embodiment is disadvantageous for the player by not setting the number of grace games when the merit is relatively small for the player even if the electric goto action is performed. Because it is not set, it is possible to suppress that all errors occurring in the pachislot machine 1 are determined to be a goto action.

  It should be noted that in the above-mentioned extra game during lottery processing, the sub CPU 102 adds 1 to the number of additional game selection determination games when “RT4 transition A” and “RT4 transition B” are determined as internal winning combinations. explained.

  On the other hand, in the additional game during the lottery process, the sub CPU 102 determines the number of ART games when “RT4 shift A” and “RT4 shift B” are determined as internal winning combinations as described below. It may be added.

  FIGS. 159 and 160 are flowcharts showing a modification of the lottery process in the additional game, which is executed in step S584 of the first gaming state lottery process shown in FIG.

  First, the sub CPU 102 determines whether it is time to shift to the additional game (S 1070). Here, if it is determined that the additional game transition is in progress (YES), the sub CPU 102 sets an additional game specified value to the number of remaining security games (S1071).

  If it is determined in step S1070 that the additional game transition is not in progress (NO), or after the process of step S1071 is executed, the sub CPU 102 determines whether the number of remaining secured games is 0 (S1072).

  Here, if it is determined that the security remaining game number is not 0 (NO), the sub CPU 102 turns on the security game in progress flag (S1073), and subtracts 1 from the security remaining game number (S1074).

  If it is determined in step S1072 that the number of remaining games to be secured is 0 (YES), or after the process of step S1074, the sub CPU 102 sets the row of the added counter A in the added counter lottery table shown in FIG. Based on the added-up game number, the added-up counter is subjected to lottery (S1075), and the lottery result is set in the added-up counter A (S1076).

  Next, the sub CPU 102 determines whether the counter B valid flag is ON (S1077). Here, if it is determined that the counter B effective flag is ON (YES), the sub CPU 102 adds the number of added games based on the row of the added counter B in the added counter lottery table shown in FIG. 161. The lottery is performed (S1078), and the lottery result is set in the additional counter B (S1079).

  Next, the sub CPU 102 determines whether the counter C valid flag is ON (S1080). Here, if it is determined that the counter C valid flag is ON (YES), the sub CPU 102 adds the number of added games based on the row of added counters C in the added counter lottery table shown in FIG. 161. The lottery is performed (S1081), and the lottery result is set in the additional counter C (S1082).

  If it is determined in step S1077 that the counter B valid flag is not ON (NO), if it is determined in step S1080 that the counter C valid flag is not ON (NO), or after the process of step S1082 is executed, The CPU 102 adds the values of the additional counters A, B and C to the number of ART remaining games (S1083).

  Next, the sub CPU 102 determines whether or not the internal winning combination is “RT4 transition A” or “RT4 transition B” in the MB non-operating state (S1084). Here, if it is determined that the internal winning combination is “RT4 shift A” or “RT4 shift B” in the MB non-operating state (YES), the sub CPU 102 determines whether the counter C valid flag is ON or not. Is determined (S1085).

  Here, if it is determined that the counter C effective flag is ON (YES), the sub CPU 102 randomly selects the additional game number of the additional game securing game number with the predetermined lottery probability (S1086), and adds the lottery result to the number of secured games (S1087).

  If it is determined in step S1085 that the counter C valid flag is not ON (NO), or after the process of step S1087, the sub CPU 102 determines whether the counter B valid flag is OFF (S1088). ). Here, if it is determined that the counter B valid flag is OFF (YES), the sub CPU 102 turns on the counter B valid flag (S1089).

  On the other hand, if it is determined that the counter B valid flag is not OFF (NO), the sub CPU 102 determines whether the counter C valid flag is OFF (S1090). Here, if it is determined that the counter C valid flag is OFF (YES), the sub CPU 102 turns on the counter C valid flag (S1091).

  In step S1084, when it is determined that the internal winning combination is not "RT4 shift A" or "RT4 shift B" in the MB non-operating state (NO), it is determined in step S1090 that the counter C valid flag is not OFF (NO) Or) after executing the process of step S1089 or S1091, the sub CPU 102 ends the lottery process during the additional game.

  As described above, the sub CPU 102 increases the number of lotteries per game with respect to the number of ART games each time the combination of symbols constituting “RT4 transition A” or “RT4 transition B” stops on the effective line.

  The sub CPU 102 displays the liquid crystal display so as to notify from the lottery result in which the addition number of the ART game number is small among the lottery results per game to the ART game number whenever the reels 3L, 3C, 3R are stopped. The content of the effect to be performed by the device 11 may be determined.

<Additional counter lottery table>
The addition counter lottery table shown in FIG. 161 is referred to by the sub CPU 102 in the variation of the lottery process during the addition game shown in FIGS. 159 and 160. In the addition counter lottery table, the extraction value of the number of games to be added is associated with the counter A, the counter B, and the counter C.

  Based on the added-up counter lottery table shown in FIG. 161, for example, the counter A wins 10 games with a probability of “31433/32768”, wins 20 games with a probability of “1000/32768”, and “300/32768” Win 30 games with probability, win 30 games with probability of 30/32768, and win 100 games with probability of 5/32768.

  Further, in the present embodiment, the pachislot machine 1 is described as not performing ART lottery in the state of imposing a penalty, but when the winning combination is made inside the ART, the ART is determined. You may give it. Further, in the state where the pachislot machine 1 imposes a penalty, the probability of winning the ART may be set low.

  Further, in the present embodiment, the pachislot machine 1 has described the example in which the number of games is applied as the number of granted ART advantageous to the player, but instead of the number of games, the number of sets consisting of a predetermined number of games is You may apply, you may apply the frequency | count of alerting | reporting (the number of times of navigation) for making the so-called increase combination in which a prize mode differs according to pushing order to win advantageously, the payout number of medals may be applied. A net increase number may be applied by subtracting the insertion number from the payout number.

  Further, in the present embodiment, as the transition condition of the RT gaming state, instead of the transition condition shown in FIG. 13, winning of a bonus such as MB, winning of the bonus operating part, completion of the bonus, RT gaming state The combination of specific symbols may be displayed as the combination of symbols to be transferred, or a predetermined number of unit games may be executed.

  In the present embodiment, although an example in which the gaming machine according to the present invention is applied to the pachislot machine 1 has been described, the present invention is not limited to this. A gaming machine according to the present invention uses pachinko balls using gaming balls as gaming media The present invention can also be applied to other gaming machines such as gaming machines.

(Supplementary note)
In the conventional gaming machine, when switching an image to be displayed on the image display device, such as when an error occurs in the gaming machine while the bonus is operating, the effect by the operation of the bonus is interrupted, When the error of the gaming machine is eliminated, if the effect by the operation of the prize is discontinued, there is a problem that the interest of the player in the game may be reduced.

  The present invention has been made to solve such problems, and it is an object of the present invention to provide a gaming machine capable of suppressing the decrease in the interest of the player in the game.

  The game machine according to the present invention is a game control means (main control circuit 91) that executes processing relating to the progress of the game to achieve the above object, and various effect devices (for example, liquid crystal display device 11, shutter device 200, LED group) 25 and an effect control means (sub control circuit 101) for controlling the speakers 23L and 23R), an image display means (liquid crystal display device 11) for displaying an image as an effect controlled by the effect control means, and the effect A movable decorative portion (shutter device 200) that operates as an effect controlled by the control means, wherein the movable decorative portion stands by at a standby position on the periphery of the image display unit and operates from the standby position In such a case, at least a part of the display area of the image display means is provided so as to block, and the effect control means comprises the game control means and the effect control means Image switching means (sub-CPU 102) for causing the image display means to display an image representing the abnormal state based on the detection of the abnormal state by at least one, and clocking based on the detection of the abnormal state Clocking means (sub-CPU 102) for starting the movement, and movable information representing the state of the movable decorative part when an image representing the abnormal state is displayed on the image display means when the movable decorative part is operating Is stored in the storage medium, and the movable decoration portion is moved to the standby position, and when the display end condition of the image representing the abnormal state is satisfied, the state represented by the movable information stored in the storage medium is the movable decoration portion. And the movable state return means (sub-CPU 102) for setting the display when the lapse of a predetermined time (for example, 3 minutes) is timed by the time measurement means. To establish the completion conditions.

  With this configuration, the gaming machine according to the present invention stores movable information representing the state of the movable decorative portion in the storage medium when the image displayed on the image display means is switched while the movable decorative portion is operating. In addition, the movable decorative portion is moved to the standby position to ensure visibility of the image after switching, and when the display end condition of the image after switching is satisfied, the state where the movable information stored in the storage medium represents the movable decorative portion Make it

  For this reason, the gaming machine according to the present invention can continue the effect by the action of the character which has been executed before switching the image displayed on the image display means, which reduces the interest of the player in the game It is possible to suppress the

  In the gaming machine according to the present invention, when the display condition of the error screen is satisfied while the movable decorative portion is operating, the movable information is stored in the storage medium, and the movable screen is movable to secure visibility of the error screen. The decorative part is moved to the standby position, and when the display end condition of the error screen is satisfied, the movable decorative part is executed before displaying the error screen on the image display means in order to make the movable information stored in the storage medium The effect by the operation of the movable decorative portion can be continued.

  Note that the effect control means stores the effect information in the storage means when the abnormal state is detected during an effect (for example, addition selection) in which the player's operation can be received by a predetermined operation means. When the display end condition of the image representing the abnormal state is satisfied, the effect may be restored based on the effect information.

  With this configuration, the gaming machine according to the present invention can continue the effects that were being performed before displaying the image representing the abnormal state on the image display means.

  According to the present invention, it is possible to provide a gaming machine capable of suppressing a decrease in the player's interest in the game.

1 Pachislot machine (game machine)
3L, 3C, 3R Reel 4 display window (symbol display means)
11 Liquid crystal display device (rendering device, image display means)
14 MAX bet button (selection method)
16 Start lever 17L, 17C, 17R Stop button (selection means)
17S stop switch (stop operation detection means)
23L, 23R speakers (demonstration equipment)
25 LED group (demonstration device)
51L, 51C, 51R Stepper motor (pattern changing means)
91 main control circuit 93 main CPU (count means, count determination means, lock means, cycle control means, command transmission means, reel control means, lock execution means, internal winning combination determination means, reel stop control means, prize determination means)
101 secondary control circuit 102 sub CPU (processor, display control means, advantageous number determination means, image switching means, selection information storage means, selection information return means, advantageous game provision determination means, image control means, image switching means, movable state Return means, effect execution means, effect determination means, character control means, disadvantageous state setting means, abnormal stop operation judgment means, grace game number setting means, operation abnormality detection means, goods operation construction means)
104 Sub RAM (storage medium, role data storage means)
108 WDT (watchdog timer)
200 Shutter device (rendering device, movable decoration)

Claims (1)

A movable part,
A drive unit for driving the movable unit;
A control unit capable of controlling an operation mode of the movable unit by controlling the drive unit;
And a detection unit capable of detecting that the movable portion is at a predetermined position.
The control unit
Storage means for storing operation data for operating the movable portion;
A consistency table for securing the consistency of the operation of the movable part;
A determination unit capable of determining operation sequence data based on the previous operation data stored by the storage unit, the current operation data, and the consistency table;
Performing operation control of the movable unit based on the operation sequence data determined by the determination unit;
If it is determined that an abnormality has occurred in the movable unit based on the detection condition of the detection unit while the operation control of the movable unit is being performed based on the operation sequence data, the operation registered in advance is used. is performed on the movable portion, the detection result of said detecting means, said had row operation check to ensure that the movable portion is accurately performing operations the previously registered, the operation check result is normal If it exists, a game machine that enables execution of processing for moving the movable part to a predetermined standby position.

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