JP6794076B2 - Game machine - Google Patents

Description

The present invention relates to a gaming machine such as a pachislot machine.

Conventionally, it is detected that a plurality of reels in which a plurality of symbols are arranged on each surface, a game medal, a coin, etc. (hereinafter referred to as "game medium") are inserted, and the start lever is operated by the player. Detects that the start switch that requests the start of rotation of a plurality of reels and the stop button provided corresponding to each of the plurality of reels are pressed by the player, and requests that the rotation of the corresponding reel be stopped. A stop switch that outputs a signal, a stepping motor that is provided corresponding to each of a plurality of reels and transmits each driving force to each reel, and a stepping motor based on the signals output by the start switch and the stop switch. It is equipped with a reel control unit that controls the operation of each reel and rotates and stops each reel, and when it detects that the start lever has been operated, a lottery is performed based on a random number value, and the result of this lottery (hereinafter, "" There is known a so-called pachislot game machine that stops the rotation of the reel based on the timing of detecting that the stop button has been operated (referred to as "internal winning combination").

As a gaming machine of this type, Patent Document 1 discloses a gaming machine that determines the number of advantageous games to be granted to a player when a predetermined condition is satisfied, and displays the determined number of grants on a liquid crystal display device as an effect. Proposed.

Japanese Unexamined Patent Publication No. 2013-099772

In recent years, there are known game machines in which a game control means is used to produce a reel during a lock period in which a game operation is invalidated for a predetermined period, and the effect control means is used to produce an accessory and a liquid crystal display. However, when a conventional game machine as disclosed in Patent Document 1 is applied to such a game machine, the effect and effect control by the game control means are caused by individual differences between the game control means and the effect control means. There is a problem that a synchronization shift may occur with the production by the means.

The present invention has been made to solve such a problem, and an object of the present invention is to provide a game machine capable of eliminating a synchronization gap between an effect by a game control means and an effect by an effect control means. And.

In order to achieve the above object, the game machine according to the present invention can control the effect based on the game control means (main control circuit 91) capable of executing the process related to the progress of the game and the command transmitted from the game control means. The effect control means (sub-CPU 102) is provided with the effect control means (sub-control circuit 101) and the effect execution means (sub CPU 102) that is controlled by the effect control means and can execute the effect step by step. The game control means is the effect control means. has transmittable command transmission means commands (main CPU 93), the said command transmission means commands triggered by the progress of a game (e.g., start command, the reel stop command), a trigger progression Yu technique A command that does not (for example, a non-operation command) is transmitted, and the effect control means receives a command that does not trigger the progress of the game at regular time intervals (for example, about 17 ms), and causes the progress of the game. When a reception counter (non-operation command reception counter) that updates the count each time a command that does not trigger is received is provided, and the effect execution means performs a specific effect that can be executed step by step (for example, a step-up effect) , When the reception counter reaches a predetermined value (value of the step counter), the effect of the predetermined step of the specific effect is executed or terminated, and a non-specific effect different from the specific effect (for example, effect content determination). When performing other effects determined by the process), it has a configuration in which the process of the effect step is not performed based on the reception counter reaching a predetermined value .

With this configuration, the game machine according to the present invention executes a specific effect step by step in synchronization with a command transmitted from the game control means to the effect execution means that does not trigger the progress of the game, so that the game control means is used. It is possible to eliminate the synchronization gap between the production and the production by the production execution means.

The gaming machine according to the present invention is provided with an operation detecting means (for example, a BET switch 62) capable of detecting a predetermined operation (for example, pressing of the MAX bet button 14) of the player, and is provided with the predetermined step of the specific effect. If the operation detecting means detects a predetermined operation of the player while the effect is being executed, the identification during execution even before the value of the reception counter reaches a value for executing the next effect step. The predetermined step of the effect may be completed.

According to the present invention, it is possible to provide a game machine capable of eliminating a synchronization gap between the effect of the game control means and the effect of the effect control means.

It is a figure which shows the functional flow of the pachislot machine which concerns on embodiment of this invention. It is an overall perspective view which shows the external structure of the pachislot machine which concerns on embodiment of this invention. It is a block diagram which shows the electric structure of the pachislot machine which concerns on embodiment of this invention. It is a block diagram which shows the structure of the main control circuit of the pachislot machine which concerns on embodiment of this invention. It is a block diagram which shows the structure of the sub-control circuit of the pachislot machine which concerns on embodiment of this invention. It is a rear view of the shutter device of the pachislot machine which concerns on embodiment of this invention. FIG. 6 is a cross-sectional view taken along the line AA in FIG. It is a front view which shows the state which accommodated the shutter member of the shutter device of the pachislot machine which concerns on embodiment of this invention. It is a front view when the shutter member which concerns on embodiment of this invention is in a shielding state (surface). It is a front view when the shutter member which concerns on embodiment of this invention is in a half-open state. It is a front view when the shutter member which concerns on embodiment of this invention is in a shielding state (back surface). It is a perspective view of the shutter device which concerns on embodiment of this invention. It is a RT game state transition transition diagram in the pachislot machine which concerns on embodiment of this invention. It is a figure which shows the symbol arrangement table stored in the main ROM. It is a figure which shows the symbol code table in the pachislot machine which concerns on embodiment of this invention. It is a figure which shows the symbol combination table stored in the main ROM. It is a figure which shows the symbol combination table following FIG. It is a figure which shows the combination table by a flag stored in the main ROM. It is a figure which shows the combination table by a flag following FIG. It is a figure which shows the internal lottery table (RT0 game state) stored in the main ROM. It is a figure which shows the internal lottery table (RT1 game state) stored in the main ROM. It is a figure which shows the internal lottery table (RT2 game state) stored in the main ROM. It is a figure which shows the internal lottery table (RT3 game state) stored in the main ROM. It is a figure which shows the internal lottery table (RT4 game state) stored in the main ROM. It is a figure which shows the internal lottery table (RT5 game state) stored in the main ROM. It is a figure which shows the internal lottery table (CB_RT0 game state in MB) stored in the main ROM. It is a figure which shows the internal lottery table (CB_RT1 game state in MB) stored in the main ROM. It is a figure which shows the internal lottery table (CB_RT2 game state in MB) stored in the main ROM. It is a figure which shows the internal lottery table (CB_RT3 game state in MB) stored in the main ROM. It is a figure which shows the internal lottery table (CB_RT4 game state in MB) stored in the main ROM. It is a figure which shows the internal lottery table (CB_RT5 game state in MB) stored in the main ROM. It is a figure which shows the rotation cylinder stop initial setting table stored in the main ROM. It is a figure which shows the pull-in priority table stored in the main ROM. It is a figure which shows the pull-in priority order selection table stored in the main ROM. It is a figure which shows the 1st body stop data table stored in the main ROM. It is a figure which shows the search order table 00 stored in the main ROM. It is a figure which shows the search order table 01 stored in the main ROM. It is a figure which shows the symbol correspondence winning operation flag data table stored in the main ROM. It is a figure which shows the off reel action lottery table stored in the main ROM. It is a figure which shows the off reel action state transition lottery table stored in the main ROM for each mode. It is a figure which shows the special counter addition lottery table stored in the main ROM. It is a figure which shows the modification of the special counter addition lottery table. It is a figure which shows the discharge lottery table stored in the main ROM. It is a figure which shows the modification of the discharge lottery table. It is a figure which shows the internal winning combination storage area allocated to the main RAM. It is a figure which shows the display combination storage area allocated to the main RAM. It is a figure which shows the symbol code storage area allocated to the main RAM. It is a figure which shows the carry-over combination storage area allocated to the main RAM. It is a figure which shows the game state flag storage area allocated to the main RAM. It is a figure which shows the operation stop button storage area allocated to the main RAM. It is a figure which shows the pressing order storage area allocated to the main RAM. It is a figure which shows the pull-in priority data storage area allocated to the main RAM. It is a figure which shows the sub determination combination number table which is referred by a sub CPU. It is a figure which shows the sub determination combination identification table referred by a sub CPU. It is a figure which shows the lottery table which adds the number of games referred by a sub CPU. It is a figure which shows the additional selective payout table which is referred by a sub CPU. It is a figure which shows the addition selection lottery table at the time of the first hit of ART referred by a sub CPU. It is a figure which shows the ART addition selection lottery table which is referred by a sub CPU. It is a figure which shows the ART addition selection lottery table following FIG. It is a figure which shows the normal addition selection lottery table which is referred by a sub CPU. It is a figure which shows the normal addition selection lottery table following FIG. It is a figure which shows the special function activation lottery table which is referred by a sub CPU. It is a figure which shows the crushed number lottery table which is referred by a sub CPU. It is a figure which shows the addition selection continuation rate lottery table which is referred by a sub CPU. It is a figure which shows the addition selection continuation rate lottery table following FIG. It is a figure which shows the addition selection continuation state lottery table which is referred by a sub CPU. It is a figure which shows the additional selective payout lottery table which is referred by a sub CPU. It is a figure which shows the additional game lottery table which is referred by a sub CPU. It is a figure which shows the ART direct hit lottery table which is referred by a sub CPU. It is a figure which shows the ART addition game direct alignment lottery table which is referred by a sub CPU. It is a figure which shows the step-up sequence table which is referred by a sub CPU. It is a figure which shows the shutter operation sequence table which corresponds to the shutter operation data Y1 which is referred by a sub CPU. It is a figure which shows the shutter operation sequence table corresponding to the shutter operation data Y2 referred by a sub CPU. It is a figure which shows the shutter operation sequence table corresponding to the shutter operation data Y3 referred by a sub CPU. It is a figure which shows the shutter operation sequence table which corresponds to the shutter operation data Y4 referred by a sub CPU. It is a figure which shows the shutter operation sequence table corresponding to the shutter operation data Y5 referred by a sub CPU. It is a figure which shows the shutter operation sequence table which corresponds to the shutter operation data Y6 referred by a sub CPU. It is a figure which shows the shutter operation sequence table corresponding to the shutter operation data Y7 referred by a sub CPU. It is a figure which shows the shutter operation sequence table corresponding to the shutter operation data Y8 referred by a sub CPU. It is a figure which shows the shutter operation combination determination table referred by a sub CPU. It is a figure which shows an example of the shutter operation sequence storage area allocated to a sub RAM. It is a figure which shows the internal winning combination group table for penalty determination which is referred by a sub CPU. It is a figure which shows the error management area allocation table which is referred by a sub CPU. It is a flowchart which shows the main control processing of the pachislot machine which concerns on embodiment of this invention. It is a flowchart which shows the power-on processing which is executed in the main control processing shown in FIG. FIG. 5 is a flowchart showing a medal acceptance / start check process executed in the main control process shown in FIG. 84. It is a flowchart which shows the automatic insertion process which is executed in the medal acceptance / start check process shown in FIG. FIG. 5 is a flowchart showing an internal lottery process executed in the main control process shown in FIG. 84. It is a flowchart which shows the special counter processing executed in the main control processing shown in FIG. 84. FIG. 5 is a flowchart showing a reel stop initial setting process executed in the main control process shown in FIG. 84. It is a flowchart which shows the pull-in priority order storage process which is executed in the main control process shown in FIG. 84 and the reel stop control process shown in FIG. 94. FIG. 5 is a flowchart showing a pull-in priority table selection process executed in the pull-in priority storage process shown in FIG. FIG. 5 is a flowchart showing a symbol code storage process executed in the pull-in priority order storage process shown in FIG. 91 and the reel stop control process shown in FIG. 94. FIG. 5 is a flowchart showing a reel stop control process executed in the main control process shown in FIG. 84. FIG. 5 is a flowchart showing a bonus end check process executed in the main control process shown in FIG. 84. FIG. 5 is a flowchart showing a bonus operation check process executed in the main control process shown in FIG. 84. It is a flowchart which shows the interrupt process by the control of the main CPU which comprises the pachislot machine which concerns on embodiment of this invention. FIG. 5 is a flowchart showing an input port check process executed in the interrupt process shown in FIG. 97. FIG. 5 is a flowchart showing a data transmission process executed in the interrupt process shown in FIG. 97. FIG. 5 is a flowchart showing a non-operation command communication data storage process executed in the data transmission process shown in FIG. 99. It is a flowchart which shows the power-on process of the sub CPU which comprises the pachislot machine which concerns on embodiment of this invention. It is a flowchart which shows the lamp control task which is activated in the power-on process shown in FIG. It is a flowchart which shows the sound control task which is activated in the power-on process shown in FIG. It is a flowchart which shows the shutter control task which is activated in the power-on process shown in FIG. It is a flowchart which shows the shutter effect reconstruction process executed in the shutter control task shown in FIG. 104. FIG. 5 is a flowchart showing a shutter control process executed in the shutter control task shown in FIG. 104. It is a flowchart which shows the main task which is activated in the power-on process shown in FIG. FIG. 5 is a flowchart showing an error occurrence monitoring process executed in the main task shown in FIG. 107. FIG. 5 is a flowchart showing an error release monitoring process executed in the main task shown in FIG. 107. It is a flowchart which shows the main board communication task which is started in the power-on process shown in FIG. FIG. 5 is a flowchart showing a command analysis process executed in the main board communication task shown in FIG. 110. It is a flowchart which shows the animation task which is activated in the power-on process shown in FIG. FIG. 5 is a flowchart showing a command consistency determination process executed in the command analysis process shown in FIG. 111. It is a flowchart which shows the effect content determination process executed in the command analysis process shown in FIG. 111. It is a flowchart which shows the process at the time of receiving the start command executed in the effect content determination process shown in FIG. 114. It is a flowchart which shows the fail-safe process which is executed in the process at the time of receiving a start command shown in FIG. 115. FIG. 5 is a flowchart showing a lottery process for each game state executed in the process at the time of receiving the start command shown in FIG. 115. FIG. 5 is a flowchart showing a lock occurrence effect setting process executed in the start command reception process shown in FIG. 115. It is a flowchart which shows the process at the time of receiving the winning operation command executed in the effect content determination process shown in FIG. 114. It is a flowchart which shows the penalty setting process which is executed in the process at the time of receiving a winning operation command shown in FIG. 119. It is a flowchart which shows the lottery processing by the 2nd game state executed in the process at the time of receiving a winning operation command shown in FIG. 119. It is a flowchart which shows the process at the time of receiving an error command executed in the effect content determination process shown in FIG. 114. It is a flowchart which shows the process at the time of receiving a non-operation command executed in the effect content determination process shown in FIG. 114. It is a flowchart which shows the step-up effect sequence state transition processing executed in the non-operation command reception processing shown in FIG. 123. It is a flowchart which shows the special step-up process executed in the step-up effect sequence state transition process shown in FIG. 124. FIG. 5 is a flowchart showing a step-up effect registration process executed in the step-up effect sequence state transition process shown in FIG. 124 and the special step-up process shown in FIG. 125. It is a flowchart which shows the power failure detection process which is executed when it is detected that the power supply was cut off by a sub CPU. FIG. 5 is a flowchart showing a power failure recovery process executed in the power-on process shown in FIG. 101. FIG. 5 is a flowchart showing a first general middle lottery process executed in the first game state-specific lottery process shown in FIG. 117. It is a flowchart which shows the 1st general middle game lottery process executed in the 1st general middle lottery process shown in FIG. 129. It is a flowchart which shows the ART addition selection stock lottery process which is executed in the 1st general middle lottery process shown in FIG. 129. FIG. 5 is a flowchart showing an ART direct hit lottery process executed in the first general middle lottery process shown in FIG. 129. FIG. 5 is a flowchart showing a second general middle lottery process executed in the first game state-based lottery process shown in FIG. 117. It is a flowchart which shows the 3rd general middle lottery processing executed in the 2nd game state-based lottery processing shown in FIG. 121. It is a flowchart which shows the 1st ART high-probability medium lottery processing executed in the 1st game state-specific lottery processing shown in FIG. 117. It is a flowchart which shows the 1st ART high-probability medium lottery processing following FIG. 135. FIG. 5 is a flowchart showing a second ART high-probability medium lottery process executed in the first game state-based lottery process shown in FIG. 117. It is a flowchart which shows the 3rd ART high-probability medium lottery processing executed in the 2nd game state-based lottery processing shown in FIG. 121. It is a flowchart which shows the 1st ART preparatory lottery processing executed in the 1st game state-based lottery processing shown in FIG. 117. It is a flowchart which shows the 2nd ART preparatory lottery processing executed in the 2nd game state-based lottery processing shown in FIG. 121. FIG. 5 is a flowchart showing a lottery process during the first ART executed in the lottery process according to the first game state shown in FIG. 117. It is a flowchart which shows the lottery processing in the 1st ART following FIG. 141. FIG. 5 is a flowchart showing a lottery process during the second ART executed in the lottery process according to the second game state shown in FIG. 121. FIG. 5 is a flowchart showing a first additional selection selected lottery process executed in the first game state-based lottery process shown in FIG. 117. It is a flowchart which shows the 1st addition selection selected lottery process following FIG. 144. FIG. 5 is a flowchart showing a second additional selection selected lottery process executed in the first game state-based lottery process shown in FIG. 117. It is a flowchart which shows the 4th addition selection selected lottery processing which is executed in the non-operation command reception processing shown in FIG. 123. It is a flowchart which shows the 4th addition selection selected lottery processing following FIG. 147. It is a flowchart which shows the game state transition process at the time of the 1st lock which is executed in the 2nd general middle lottery process shown in FIG. It is a flowchart which shows the game state transition process at the time of the 2nd lock which is executed in the 3rd general middle lottery process shown in FIG. 134 and the 3rd ART high probability middle lottery process shown in FIG. 138. FIG. 3 is a flowchart showing a transition process during the first game state ART executed in the second ART high-probability medium lottery process shown in FIG. 137. It is a flowchart which shows the 2nd game state ART middle transition process executed in the 3rd general middle lottery process shown in FIG. 134, and 3rd ART high probability medium lottery process shown in FIG. 138. It is a flowchart which shows the game state general middle transition process executed in the 2nd ART high probability middle lottery process shown in FIG. 137. It is a flowchart which shows the 1st normal addition selection lottery process which is executed in the 1st ART high probability medium lottery process shown in FIG. 135 and FIG. 136. It is a flowchart which shows the 2nd normal addition selection lottery processing which is executed in the 2nd general middle lottery processing shown in FIG. 133, and the 1st game state ART transition processing shown in FIG. 151. It is a flowchart which shows the ART game number direct addition lottery processing which is executed in the 1st ART preparatory lottery process shown in FIG. 139 and the 1st ART middle lottery process shown in FIG. 141 and FIG. 142. FIG. 5 is a flowchart showing an additional game stock lottery process executed in the first ART middle lottery process shown in FIGS. 141 and 142 and the first additional game stock lottery process shown in FIGS. 144 and 145. FIG. 5 is a flowchart showing a lottery process waiting for normal return, which is executed in the lottery process according to the first game state shown in FIG. 117. It is a flowchart which shows the modification of the lottery processing during an additional game executed in the lottery processing according to the 1st game state shown in FIG. 117. It is a flowchart which shows the lottery processing during an additional game following FIG. 159. It is a figure which shows the addition counter lottery table which is referred to by a sub CPU in the modification of the lottery processing during an addition game shown in FIGS. 159 and 160. It is a figure which shows the display example of the selection game screen displayed on the liquid crystal display device based on the additional selection payout table shown in FIG. 49. It is a figure which shows the display example when only a part element is identifiable among the elements on the selection game screen displayed on the liquid crystal display device based on the additional selection payout table shown in FIG. 49. It is a figure which shows the display example when all the elements on the selection game screen displayed on the liquid crystal display device can be identified based on the additional selection payout table shown in FIG. 49. It is a figure which shows the display example of the result after one of the elements on the selection game screen displayed on the liquid crystal display device is selected. It is a figure which shows the display example of the error screen which shows the error which occurred in the pachislot machine which concerns on embodiment of this invention. It is a figure which shows the display example of the error information history screen which shows the history of the error which occurred in the pachislot machine which concerns on embodiment of this invention.

A pachislot machine, which is a gaming machine showing an embodiment of the present invention, will be described with reference to FIGS. 1 to 167. First, the functional flow according to the embodiment of the gaming machine will be described with reference to FIG.

In the pachislot machine of the present embodiment, a medal is used as a game medium for playing a game. In addition to medals, coins, game balls, point data for games, tokens, and the like can also be applied as the game medium.

When a medal is inserted by the player and the start lever is operated, one value (hereinafter, random number value) is extracted from random numbers in a predetermined numerical range (for example, 0 to 65535).

The internal lottery means draws a lot based on the extracted random number value, and determines the internal winning combination. The main control circuit described later is responsible for this internal lottery means. By determining the internal winning combination, the combination of symbols that are allowed to be displayed along the winning determination line described later is determined. The types of symbol combinations include those related to "winning" in which benefits such as medal payout, re-game operation, and bonus operation are given to the player, and those related to other so-called "loss". Is provided.

Further, when the start lever is operated, a plurality of reels are rotated. After that, when the stop button corresponding to the predetermined reel is pressed by the player, the reel stop control means controls to stop the rotation of the corresponding reel based on the internal winning combination and the timing when the stop button is pressed. Do. The reel stop control means is carried by the main CPU that executes the reel stop control process described later.

In the pachislot machine, basically, control is performed to stop the rotation of the corresponding reel within a specified time (190 msec or 75 msec) from the time when the stop button is pressed. In the present embodiment, the number of symbols that move with the rotation of the reel within this specified time is referred to as the "number of sliding pieces". When the specified time is 190 msec, the maximum number of sliding pieces is set for 4 symbols, and when the specified time is 75 msec, the maximum number of sliding pieces is set for 1 symbol.

When the internal winning combination that allows the combination display of the symbols related to the winning is determined, the reel stop control means usually sets the combination of the symbols within the specified time of 190 msec (for 4 symbols) on the winning determination line. Stop the rotation of the reel so that it is displayed as much as possible along. Further, the reel stop control means is specified for one or more reels, for example, when the challenge bonus (CB) which is a second type special accessory and the middle bonus (MB) which continuously operates the CB are operated. Within the time of 75 msec (for one symbol), the rotation of the reel is stopped so that the combination of the symbols is displayed as much as possible along the winning determination line. Further, the reel stop control means uses various specified times corresponding to the gaming state to rotate the reel so that the combination of symbols whose display is not permitted by the internal winning combination is not displayed along the winning determination line. Stop it.

When all the rotations of the plurality of reels are stopped in this way, the winning determination means determines whether or not the combination of symbols displayed along the winning determination line is related to winning. The winning determination means is carried by the main CPU that executes the winning search process described later. When it is determined by the winning determination means that the prize is related to the prize, the player is given a privilege such as paying out a medal. In the pachislot machine, the above-mentioned series of flows is performed as one game.

Further, in the pachislot machine, in the above-mentioned series of flows, image display performed by an image display device such as a liquid crystal display device, light output performed by various lamps, sound output performed by a speaker, and shutter drive by a shutter device. , Or a combination of these is used to perform various effects.

When the start lever is operated, a random value for effect (hereinafter, random value for effect) is extracted in addition to the random value used for determining the internal winning combination described above. When the effect random value is extracted, the effect content determining means determines by lottery what to execute this time from a plurality of types of effect contents associated with the internal winning combination. A sub-control circuit, which will be described later, is responsible for determining the content of the effect.

When the content of the effect is determined, the effect executing means executes the corresponding effect in conjunction with each opportunity such as when the rotation of the reels starts, when the rotation of each reel stops, and when it is determined whether or not there is a prize. In this way, in the pachislot machine, the player has an opportunity to know or anticipate the determined internal winning combination (in other words, the combination of symbols to be aimed at) by executing the production content associated with the internal winning combination. It is provided to the player and can improve the interest of the player.

<Structure of pachislot machine>
Next, the appearance structure of the pachislot machine according to the present embodiment will be described with reference to FIG.

[Appearance structure]
FIG. 2 is a perspective view showing the external structure of the pachislot machine 1.

As shown in FIG. 2, the pachislot machine 1 includes an exterior body 2. The exterior body 2 has a cabinet 2a as a housing for accommodating a reel, a circuit board, and the like, and a front door 2b that is openably and closably attached to the cabinet 2a. Handles 2c are provided on both side surfaces of the cabinet 2a (only one side handle 2c is shown in FIG. 2). The handle 2c is a recess for carrying the pachi-slot machine 1.

Inside the cabinet 2a, a plurality of (for example, 21) symbols are displayed at predetermined intervals along the circumferential direction, and a plurality of reels (three in the present embodiment) 3L, 3C, 3R (FIG. 3). See) is housed.

Hereinafter, each reel 3L, 3C, 3R will be referred to as a left reel 3L, a middle reel 3C, and a right reel 3R, respectively. Each reel 3L, 3C, 3R has a reel body formed in a cylindrical shape and a translucent sheet material mounted on the peripheral surface of the reel body. The plurality of (for example, 21) symbols described above are drawn on the surface of the sheet material described above.

The front door 2b includes a door body 9 and a liquid crystal display device 11 as an image display means for displaying an image. The door body 9 is rotatably attached to the cabinet 2a using a hinge (not shown). The hinge is provided at the left end of the door body 9 when the door body 9 is viewed from the front of the pachislot machine 1.

The liquid crystal display device 11 is attached to the upper part of the door body 9 of the front door 2b so as to display, for example, an image related to a game effect or information related to the game. The liquid crystal display device 11 can perform an effect by displaying an image, and can display game table information such as customization of a game machine and game history.

Further, the front door 2b has a display window 4 capable of visually recognizing the three reels 3L, 3C and 3R. The display window 4 is composed of three left display windows 4L, a middle display window 4C, and a right display window 4R corresponding to the three reels 3L, 3C, and 3R.

These display windows 4L, 4C, 4R are provided at positions that overlap with the arrangement areas of the three reels 3L, 3C, 3R when viewed from the front (player side), and are in front of the three reels (player side). ) Is provided. Therefore, the player can visually recognize the three reels 3L, 3C, 3R provided behind the display window 4 through the display windows 4L, 4C, 4R.

In the present embodiment, the display windows 4L, 4C, and 4R are continuously arranged among a plurality of types of symbols drawn on each reel when the rotation of the corresponding reels provided behind them is stopped. It is set to a size that can display one pattern. That is, in the frame of the display windows 4L, 4C, 4R, upper, middle, and lower regions are provided for each reel, and one symbol is displayed in each region. Then, in the present embodiment, the line connecting the middle stage region of the left reel 3L, the middle stage region of the middle reel 3C, and the middle stage region of the right reel 3R is defined as a winning determination line for determining whether or not to win.

Further, a protective glass 6 is arranged on the front side of the reels 3L, 3C, 3R and the liquid crystal display device 11 described above. As a result, the player cannot directly touch the reels 3L, 3C, 3R and the liquid crystal display device 11.

Further, a decorative member 7 is attached to the upper portion of the door body 9 on the front surface side so as to surround the protective glass 6. The decorative member 7 constitutes a part of the exterior of the pachi-slot machine 1, and includes an upper exterior member 7a, a pair of side exterior members 7b, and a lower exterior member 7c.

In particular, the upper exterior member 7a is located above the liquid crystal display device 11 and in front of the shutter device 200, which will be described later. Further, a pair of eyes 701 are formed on the upper exterior member 7a. The pair of eyes 701 is composed of a translucent member, and LEDs (not shown) included in the LED group 25 described later are arranged on the back side thereof. Therefore, the pair of eyes 701 are designed to light up as needed. The LED that lights the pair of eyes 701 is a multi-color LED capable of emitting a plurality of colors. The upper exterior member 7a constitutes an exterior member.

A pedestal portion 12 is formed in the center of the door body 9. The pedestal portion 12 has various devices (medal insertion slot 13, MAX bet button 14, 1 bet button 15, start lever 16, stop button 17L, 17C, 17R, selection button 18, decision button) to be operated by the player. 19) is provided.

The medal slot 13 is provided to receive medals dropped on the pachislot machine 1 from the outside by the player. That is, the medal insertion slot 13 is for inserting medals by the player. The medals inserted from the medal insertion slot 13 are used for one game up to a preset number of medals (for example, 3), and the amount exceeding the preset number is deposited inside the pachislot machine 1. Can be (so-called credit function).

The MAX bet button 14 and the 1-bet button 15 are provided to determine the number of medals to be used in one game from the medals deposited inside the pachislot machine 1. Although not shown in FIG. 2, the pedestal portion 12 is provided with a settlement button. This checkout button is provided to pull out (discharge) the medals deposited inside the pachislot machine 1.

The start lever 16 is for starting the rotation of all reels (3L, 3C, 3R) according to the operation of the player, and constitutes a start operation means.

The stop buttons 17L, 17C, and 17R are provided in association with the left reel 3L, the middle reel 3C, and the right reel 3R, respectively, and are for stopping the rotation of each corresponding reel according to the operation of the player. .. These stop buttons 17L, 17C, 17R constitute a stop operation means.

Further, these stop buttons 17L, 17C, 17R are used when performing an operation related to information displayed on the liquid crystal display device 11, for example, when performing a selection operation on the display screen of the liquid crystal display device 11. Used for. Hereinafter, the stop buttons 17L, 17C, and 17R are referred to as a left stop button 17L, a middle stop button 17C, and a right stop button 17R, respectively.

The selection button 18 and the decision button 19 are used when performing various operations on the display screen of the liquid crystal display device 11.

Further, the pedestal portion 12 is provided with a 7-segment display 28 composed of a 7-segment LED (Light Emitting Diode). The 7-segment display 28 provides information such as the number of medals to be paid out to the player as a privilege (hereinafter, the number of medals to be paid out), the number of medals deposited inside the pachislot machine 1 (hereinafter, the number of credits), and the like. Display digitally.

A medal payout outlet 21, a medal tray 22, speakers 23L, 23R, and the like are provided at the lower part of the door body 9. The medal payout outlet 21 guides the medals discharged by driving the hopper device 43, which will be described later, to the outside. The medal tray 22 stores medals discharged from the medal payout outlet 21. In addition, the speakers 23L and 23R output sound effects, music, and the like corresponding to the content of the production.

Further, the pachi-slot machine 1 includes a lock mechanism for switching the front door 2b into a locked state or an unlocked state with the front door 2b closed. This lock mechanism is operated by inserting the door key 24 into the door key hole 1c and rotating the door key 24.

The door key 24 is inserted into the door key hole 1c, and for example, the front door 2b can be opened and closed by rotating clockwise, and the main control circuit 91 and the like are reset electrically or programmatically by rotating counterclockwise. It has become like. That is, the door key 24 has a reset function for electrically or programmatically resetting the pachislot machine 1 in addition to operating the lock mechanism.

<Electrical configuration of pachislot machines>
Next, the electrical configuration of the pachislot machine 1 will be described with reference to FIG. FIG. 3 is a block diagram showing an electrical configuration of the pachislot machine 1.

As shown in FIG. 3, the pachi-slot machine 1 has a main control board 41 arranged in the cabinet 2a and a sub control board 42 arranged in the front door 2b. The reel relay terminal board 51, the setting key type switch 52, the cabinet side relay board 53, the door relay terminal board 54, and the power supply board 44b of the power supply device 44 are electrically connected to the main control board 41. ing.

The reel relay terminal plate 51 is arranged inside the reel main body of each reel 3L, 3C, 3R. The reel relay terminal plate 51 is electrically connected to the stepping motors 51L, 51C, 51R of the reels 3L, 3C, 3R, and outputs a signal output from the main control board 41 to the stepping motors 51L, 51C, 51R. Relay. The setting key type switch 52 is used when changing the setting of the pachi-slot machine 1 or when confirming the setting of the pachi-slot machine 1. The stepping motors 51L, 51C, 51R constitute a symbol changing means.

The external centralized terminal plate 56, the hopper device 43, and the medal auxiliary storage switch 57 are electrically connected to the cabinet-side relay board 53. The cabinet-side relay board 53 relays signals output from the main control board 41 to the external centralized terminal board 56, the hopper device 43, and the medal auxiliary storage switch 57. That is, the external centralized terminal plate 56, the hopper device 43, and the medal auxiliary storage switch 57 are connected to the main control board 41 via the cabinet-side relay board 53.

The external centralized terminal plate 56 is attached to the cabinet 2a and is provided to output signals such as a medal insertion signal, a medal payout signal, and a security signal to the outside of the pachislot machine 1.

The medal auxiliary storage switch 57 penetrates the medal auxiliary storage (not shown). The medal auxiliary storage switch 57 detects whether or not the medal auxiliary storage is full of medals.

A power switch 44a is connected to the power supply board 44b of the power supply device 44. The power switch 44a is turned on when supplying the necessary power to the pachi-slot machine 1.

The door relay terminal board 54 includes a medal sensor 46, a door open / close monitoring switch 61, a BET switch 62, a settlement switch 63, a start switch 64, a stop switch board 65, a game operation display board 66, a selection switch 67, a decision switch 68, and a door key. The switch 24S (stop release switch) and the sub-relay board 69 are connected. That is, the medal sensor 46, the door open / close monitoring switch 61, the BET switch 62, the settlement switch 63, the start switch 64, the stop switch board 65, the game operation display board 66, the selection switch 67, the decision switch 68, and the door key switch 24S (stop release switch). ) And the sub-relay board 69 are connected to the main control board 41 via the door relay terminal board 54, and the selection switch 67 and the decision switch are connected to the sub-control board 42 via the door relay terminal board 54 and the sub-relay board 69. It is connected.

The medal sensor 46 detects that the medal has passed through a selector (not shown), and outputs the detection result to the main control board 41. The door open / close monitoring switch 61 outputs a security signal for notifying the open / close of the front door 2b to the outside of the pachislot machine 1. The BET switch 62 detects that the MAX bet button 14 and the 1-bet button 15 (see FIG. 2) have been pressed by the player, and outputs the detection result to the main control board 41.

The settlement switch 63 detects that the settlement button (not shown) has been pressed by the player, and outputs the detection result to the main control board 41. The start switch 64 detects that the start lever 16 has been operated by the player (start operation), and outputs the detection result to the main control board 41.

The stop switch board 65 is a board that constitutes a circuit for stopping a rotating reel and a circuit for displaying a stoptable reel by an LED or the like. The stop switch board 65 is provided with a stop switch 17S (not shown, but provided with three switches corresponding to each of the three reels 3L, 3C, and 3R). The stop switch 17S detects that each of the stop buttons 17L, 17C, 17R is pressed by the player (stop operation). Further, the stop switch 17S constitutes a stop operation detecting means.

The game operation display board 66 displays the number of inserted medals on the 7-segment display 28 when receiving the insertion of medals, when the three reels 3L, 3C, and 3R are rotatable and when the replay is performed. It is a substrate for making it. A 7-segment display 28 and an LED 70 are connected to the game operation display board 66. The LED 70, for example, lights a mark indicating the start of the game, a mark for replaying the game, and the like.

The selection switch 67 detects that the selection button 18 has been pressed by the player, and outputs the detection result to the main control board 41 and the sub-relay board 69. The determination switch 68 detects that the determination button 19 has been pressed by the player, and outputs the detection result to the main control board 41 and the sub-relay board 69.

The door key switch 24S detects that the door key 24 has been rotated to the left. Here, the error (abnormal state) of the pachi-slot machine 1 is reset by rotating the door key 24 to the left.

The sub-relay board 69 relays the wiring connecting the sub-control board 42 and the main control board 41. Further, the sub-relay board 69 relays the wiring connecting the sub-control board 42 and a plurality of boards arranged around the sub-control board 42. That is, the sub-control board 42, the sound I / O board 71, the LED board 72, the 24h door open / close monitoring unit 74, and the shutter control board 78 are electrically connected to the sub-relay board 69.

The sub-relay board 69 not only relays the wiring connecting the sub-control board 42 and other boards, but also sounds the sound data (compressed sound data) output from the sub-control board 42. Sound data is converted to audio output data by a sound chip (not shown) mounted on the sub-relay board 69 in order to output audio to the speakers 23L and 23R via the / O board 71 (uncompressed digital sound data). ), And the audio output data is separated and amplified for the speakers 23L and 23R by a digital amplifier (not shown), and the audio output data is output to the sound I / O board 71 to output the audio from the speakers 23L and 23R. ..

The sub-control board 42 is connected to the main control board 41 via the door relay terminal board 54 and the sub-relay board 69. Further, the sub-control board 42 is electrically connected to the sound I / O board 71, the LED board 72, the 24h door open / close monitoring unit 74, and the shutter control board 78 via the sub-relay board 69. ..

The sound I / O board 71 outputs audio to the speakers 23L and 23R. The LED board 72 causes the LED group 25, which shows a specific example of the light source, to emit light according to the effect executed by the control of the sub-control circuit 101 (see FIG. 5), and displays the blinking pattern.

The 24h door open / close monitoring unit 74 stores the open / close history of the front door 2b. Further, when the front door 2b is opened, the 24h door open / close monitoring unit 74 outputs a signal for displaying an error to the liquid crystal display device 11 to the sub control board 42 (sub control circuit 101).

The shutter control board 78 drives the shutter device 200 as a movable decorative portion according to the effect executed by the control of the sub control circuit 101 (see FIG. 5). The shutter device 200 moves up and down the shutter members 201, 202, 203, and 204, which will be described later, by being driven and controlled by the shutter control board 78. Hereinafter, the shutter members 201, 202, 203, and 204 may be collectively referred to as “shutter”.

Further, the origin sensor 270, the lowering sensor 271 and the rotation sensor 272 are connected to the shutter control board 78. The origin sensor 270 detects that the shutter members 201, 202, 203, and 204 of the shutter device 200 are at the origin, that is, at the exposed position (position shown in FIG. 8).

The lowering sensor 271 detects that the shutter members 201, 202, 203, and 204 are lowered, that is, they are in the shielding position (position shown in FIG. 9). Further, the rotation sensor 272 detects that the shutter members 201, 202, 203, 204 are at the rotation origin.

A liquid crystal relay board 77 is connected to the sub-control board 42. The liquid crystal relay board 77 is a board that relays the wiring connecting the sub-control board 42 and the liquid crystal display device 11.

<Main control circuit>
Next, the main control circuit 91 composed of the main control board 41 will be described with reference to FIG. FIG. 4 is a block diagram showing a configuration example of the main control circuit 91 of the pachislot machine 1.

As shown in FIG. 4, the main control circuit 91 as the main control unit controls the progress of the game with the microcomputer 92 installed on the main control board 41 as the main component. The microcomputer 92 includes a main CPU 93, a main ROM 94, and a main RAM 95. The main control circuit 91 executes a process related to the progress of the game.

The main ROM 94 stores a control program executed by the main CPU 93, a data table, data for transmitting various control commands (command signals) to the sub control circuit 101, and the like. The main RAM 95 is provided with a storage area for storing various data such as internal winning combinations determined by executing the control program.

Here, the main CPU 93 constitutes a cycle control means that performs control at a predetermined cycle by executing an interrupt process of the main CPU described later, and performs sub-control by executing a data transmission process described later. A command transmission means for transmitting a command to the circuit 101 is configured, and a reel control means for controlling a plurality of reels 3L, 3C, 3R is configured by executing a reel control process described later. The command includes a command triggered by the progress of the game and a non-operation command which is a command not triggered by the progress of the game.

The command includes a command triggered by the progress of the game and a non-operation command which is a command not triggered by the progress of the game. The main CPU 93 transmits a no-operation command when the lock effect described later is being executed.

A clock pulse generation circuit 96, a frequency divider 97, a random number generator 98, and a sampling circuit 99 are connected to the main CPU 93. The clock pulse generation circuit 96 and the frequency divider 97 generate a clock pulse. The main CPU 93 executes a control program based on the generated clock pulse. The random number generator 98 generates random numbers in a predetermined range (for example, 0 to 65535). The sampling circuit 99 extracts one value from the generated random numbers.

The main CPU 93 counts the number of times a pulse is output to the stepping motors 51L, 51C, 51R of each reel 3L, 3C, 3R after detecting the reel index. As a result, the main CPU 93 manages the rotation angles of the reels 3L, 3C, and 3R (mainly, how many symbols the reels have rotated).

The reel index is information indicating that the reel has made one revolution. This reel index is provided, for example, with an optical sensor having a light emitting unit and a light receiving unit, and is provided at a predetermined position on each reel 3L, 3C, 3R, and the light emitting unit and the light receiving unit are connected by rotation of each reel 3L, 3C, 3R. It is detected by a reel position detection unit (not shown) provided with a detection piece interposed between them.

Here, the management of the rotation angles of the reels 3L, 3C, and 3R will be specifically described. The number of pulses output to the stepping motors 51L, 51C, 51R is counted by a pulse counter provided in the main RAM 95. Then, each time the output of a predetermined number of pulses (for example, 16 times) required for rotation of one symbol is counted by the pulse counter, the symbol counter provided in the main RAM 95 is added one by one. The symbol counter is provided according to each reel 3L, 3C, 3R. The value of the symbol counter is cleared when the reel index is detected by the reel position detection unit (not shown).

That is, in the present embodiment, by managing the symbol counter, it is possible to manage how many symbols have been rotated since the reel index was detected. Therefore, the position of each symbol of each reel 3L, 3C, 3R is detected with reference to the position where the reel index is detected.

In the present embodiment, the maximum number of sliding pieces is basically set for four symbols. Therefore, when the left stop button 17L is pressed, the symbol of the left reel 3L in the middle of the display window 4 and each symbol within the range up to the symbol four ahead of the symbol can be stopped in the middle of the display window 4. It becomes a design.

<Sub-control circuit>
Next, the sub-control circuit 101 composed of the sub-control board 42 will be described with reference to FIG. FIG. 5 is a block diagram showing a configuration example of the sub-control circuit 101 of the pachi-slot machine 1.

As shown in FIG. 5, the sub-control circuit 101 is electrically connected to the main control circuit 91, and performs processing such as determination and execution of the effect content based on the command signal transmitted from the main control circuit 91. At the same time, it controls various production devices such as a liquid crystal display device 11, a shutter device 200, an LED group 25, and speakers 23L and 23R.

More specifically, the sub CPU 102, which will be described later, constitutes an effect determining means for determining an effect based on a command transmitted from the main control circuit 91. For example, the sub CPU 102 constitutes an accessory control means that controls the operation of the shutter based on the determined effect (for details, refer to the shutter control task and various tables referred to by the shutter control task described later).

The sub-control circuit 101 basically includes a sub CPU (processor) 102, a sub ROM 103, a sub RAM 104, a rendering processor (VDP, GPU, etc.) 105, a drawing RAM 106, a driver 107, and a watchdog timer (hereinafter referred to as "WDT"). ) 108 is included in the configuration.

Further, the sub ROM 103 stores a control program for managing image (video) for production, sound, light (LED group 25), driving of the shutter device 200, and communication data.

The sub CPU 102 controls the output of video, sound, and light and the drive of the shutter device 200 according to the control program stored in the sub ROM 103 in response to the command signal transmitted from the main control circuit 91. The sub ROM 103 is basically composed of a program storage area and a data storage area.

A control program executed by the sub CPU 102 is stored in the program storage area. For example, in the control program, a main board communication task for controlling communication with the main control circuit 91 and a command analysis process for extracting a random value for effect and determining and registering the effect content (effect data). Is included. Further, the main task and animation task that control the display of the image by the liquid crystal display device 11 (see FIG. 2) and the elevating and rotating of the shutter members 201, 202, 203, and 204 by the shutter device 200 are controlled based on the determined effect content. The shutter control task to control the light output by the light source such as the LED group 25, the sound control task to control the sound output from the speakers 23L and 23R, and the like are included.

The data storage area includes a storage area for storing various data tables, a storage area for storing effect data constituting each effect content, and a storage area for storing animation data related to video creation. Further, a storage area for storing sound data related to BGM and sound effects, a storage area for storing lamp data related to a pattern of turning on and off light, and the like are included.

The sub-RAM 104 is composed of SRAM (Static RAM) and DRAM (Dynamic RAM), and has various types such as a storage area for registering determined effect contents and effect data, and an internal winning combination transmitted from the main control circuit 91. A storage area for storing data is provided.

The sub CPU 102, the rendering processor 105, the drawing RAM (including the frame buffer) 105, and the driver 107 create an image according to the animation data specified by the effect content, and display the created image on the liquid crystal display device 11. Further, the sub CPU 102 drives the shutter device 200 according to the accessory movable data specified by the effect content.

Further, the sub CPU 102 causes the speakers 23L and 23R to output sounds such as BGM according to the sound data specified by the effect content. Further, the sub CPU 102 controls the lighting and extinguishing of the LED group 25 according to the lamp data specified by the effect content.

The WDT 108 is composed of a circuit for monitoring CPU operation, and includes a timer in the circuit. The sub CPU 102 is configured to reset the WDT 108, for example, once every 33 ms. The WDT 108 is configured to time out after a lapse of a predetermined time (for example, 1 s) longer than 33 ms, and if it is not reset by the time-out, a reset signal is output to the sub CPU 102. As a result, the sub CPU 102 is restarted. The WDT 108 may be built in the sub CPU 102.

<Shutter device>
Next, the shutter device 200 will be described with reference to FIGS. 6 to 12. The shutter device 200 takes various aspects with respect to the liquid crystal display device 11 by moving the shutter members 201, 202, 203, and 204 up and down and rotating them.

As various modes, the liquid crystal display device 11 is exposed (see FIG. 8), the liquid crystal display device 11 is shielded (see FIGS. 9 and 11), and the liquid crystal display is performed through the gaps between the shutter members 201, 202, 203, and 204. A mode in which the device 11 is viewed (see FIG. 10), and a mode in which the front surfaces 201a, 202a, 203a, 204a and the back surfaces 201b, 202b, 203b, 204b of the shutter members 201, 202, 203, 204 are inverted (see FIG. 11). There is.

6 and 7 are views showing the configuration of the shutter device 200, and show a process in which the shutter members 201, 202, 203, and 204 descend one by one.

As shown in FIG. 7, the shutter device 200 is provided on the front side of the pachi-slot machine 1 with respect to the liquid crystal display device 11. In FIG. 7, the left side is the front side of the pachislot machine 1, and the right side is the back side of the pachislot machine 1. Further, although not shown in FIG. 7, a protective glass 6 (see FIG. 2) is arranged on the front side (left side in the drawing) of the shutter device 200. Therefore, the shutter device 200 is provided between the protective glass 6 and the liquid crystal display device 11, and is arranged closer to the player than the liquid crystal display device 11.

Here, FIG. 6 is a view of the shutter device 200 as viewed from the back side of the pachi-slot machine 1, that is, the liquid crystal display device 11.

As shown in FIGS. 6 and 7, the shutter device 200 includes a shutter base 220, a plurality of plate-shaped shutter members 201, 202, 203, and 204 (four in the present embodiment), and as an elevating means. The elevating unit 206, the slider mechanism 210, and the rotation mechanism 230 are included. The number of shutter members is not limited to four, and may be two, three, or five or more.

The shutter base 220 is formed in a U-shaped plate shape and is attached to the door body 9 (see FIG. 2) of the front door 2b via a fastening member (not shown). Further, the shutter base 220 includes an upper piece portion 221 and a pair of side piece portions 222 and 223 integrally molded at both ends of the upper piece portion 221 in the longitudinal direction.

The pair of side piece portions 222 and 223 are formed with elongated holes 222a, 222b, 222c, 223a, 223b, and 223c extending in the longitudinal direction (vertical direction), respectively. A first slider 211 and a second slider 212, which will be described later, are slidably attached to the elongated holes 222a and 223a in the vertical direction. Further, a third slider 213, which will be described later, is slidably attached to the elongated holes 222b and 223b in the vertical direction. Further, a fourth slider 214, which will be described later, is slidably attached to the elongated holes 222c and 223c in the vertical direction.

The shutter members 201, 202, 203, and 204 can be raised and lowered between a shielding position that shields the liquid crystal display device 11 (position shown in FIG. 9) and an exposed position that exposes the liquid crystal display device 11 (position shown in FIG. 8). It is configured in. Here, the exposed position (position shown in FIG. 8) is provided above the shielding position (position shown in FIG. 9).

In other words, the shutter members 201, 202, 203, 204 are in the standby position that does not block the display area of the liquid crystal display device 11 when they are in the exposed position, and when they operate from the standby position, the liquid crystal display device 11 It is provided so as to block the display area of.

As shown in FIGS. 7 and 12, the elevating unit 206 includes elevating motors 240A and 240B, a tensioner 241 and a drive belt 242. In FIG. 7, the elevating unit 206 on the side piece 223 side of the shutter base 220 is shown, but the elevating unit 206 is also provided on the side piece 223 of the shutter base 220 (see FIG. 12). That is, as shown in FIG. 12, the elevating unit 206 is provided on the left and right sides of the shutter base 220 from the front side to the back side of the pachislot machine 1.

In the present embodiment, the left and right elevating motors are distinguished as elevating motors 240A and 240B, respectively. In FIG. 7, only the lifting motor 240B on the right side is shown.

As shown in FIGS. 7 and 12, the elevating motors 240A and 240B are composed of, for example, stepping motors capable of forward and reverse rotation. The elevating motors 240A and 240B are fixed inside the cover member 250 (see FIG. 12). The cover member 250 is fixed to the pair of side pieces 222 and 223 of the shutter base 220 so as to cover the elevating unit 206.

The elevating motors 240A and 240B are configured to rotate the drive pulley 244 by rotating a pinion gear (not shown). The drive pulley 244 is rotatably supported inside the cover member 250 (see FIG. 12). A drive belt 242 is wound around the drive pulley 244.

The tensioner 241 has a tension pulley 241a that is mounted inside the cover member 250 (see FIG. 12) and is constantly urged downward by a spring (not shown). A drive belt 242 is wound around the tension pulley 241a. As a result, the drive belt 242 is always maintained at a constant tension or higher.

The drive belt 242 is wound around the drive pulley 244 and the tension pulley 241a, and is orbitably driven by the elevating motors 240A and 240B via the drive pulley 244. Further, a first slider 211 (see FIG. 6) is connected to the drive belt 242.

As a result, the first slider 211 moves up and down with the circumferential drive of the drive belt 242. The lowermost shutter member 201 among the shutter members 201, 202, 203, and 204 is rotatably supported by the first slider 211.

Therefore, the elevating unit 206 elevates and elevates the lowest shutter member 201 among the shutter members 201, 202, 203, and 204 between the shielding position (position shown in FIG. 9) and the exposed position (position shown in FIG. 8). It is what makes you.

As shown in FIG. 6, the slider mechanism 210 interlocks the shutter members 202, 203, and 204 other than the lowest shutter member 201 with the lowest shutter member 201 to form a shielding position (position shown in FIG. 9). The lowermost shutter member 201 and other shutter members 202, 203, and 204 are connected so as to move up and down between the position and the exposed position (position shown in FIG. 8).

Specifically, the slider mechanism 210 includes a first slider 211, a second slider 212, a third slider 213, and a fourth slider 214. The first slider 211, the second slider 212, the third slider 213, and the fourth slider 214 rotatably support the shutter members 201, 202, 203, and 204, respectively.

As a result, the shutter members 201, 202, 203, 204 have the surfaces 201a, 202a, 203a, 204a (exposed surfaces in FIG. 9) and the image display surface 11a (see FIG. 7) of the liquid crystal display device 11. It is rotatably supported by the slider mechanism 210 so that the angle between the two is changed.

The first slider 211 is slidable in the vertical direction along the elongated holes 222a and 223a of the pair of side piece portions 222 and 223. A stopper (not shown) that can come into contact with the second slider 212 is formed at the upper end of the first slider 211. This stopper portion regulates the moving range of the first slider 211 with respect to the second slider 212 by contacting the upper and lower contact surfaces (not shown) of the second slider 212, which will be described later.

As shown in FIG. 6, the second slider 212, like the first slider 211, is slidable in the vertical direction along the elongated holes 222a and 223a of the pair of side piece portions 222 and 223.

As shown in FIG. 7, the second slider 212 is formed with a recess 212A recessed on the side opposite to the image display surface side (left side in FIG. 7). The upper and lower inner wall surfaces of the recess 212A are formed with contact surfaces on which the stopper portion of the first slider 211 can come into contact.

FIG. 6 shows a state in which the first slider 211 and the second slider 212 overlap each other in the front-rear direction (in FIG. 6, the direction orthogonal to the paper surface) of the pachi-slot machine 1. Therefore, in FIG. 6, the stopper portion of the first slider 211 and each contact surface of the second slider 212 are determined by the relative sliding of the first slider 211 and the second slider 212. The back side of the slider 212 of 2 is configured to be in contact with each other.

Further, as shown in FIG. 6, the upper end portion of the second slider 212 is provided with an inner stopper portion 212c and an outer stopper portion 212d protruding in the left-right direction (in the left-right direction in FIG. 6) orthogonal to the vertical direction, respectively. Has been done.

The inner stopper portion 212c regulates the movement range of the second slider 212 with respect to the third slider 213 by abutting on the upper and lower contact surfaces 213a and 213b of the third slider 213, which will be described later. On the other hand, the outer stopper portion 212d regulates the movement range of the second slider 212 with respect to the fourth slider 214 by abutting on the upper and lower contact surfaces 214a and 214b of the fourth slider 214, which will be described later. ..

The third slider 213 is slidable in the vertical direction along the elongated holes 222b and 223b of the pair of side piece portions 222 and 223. The third slider 213 is formed with a recess 213A recessed on the image display surface side (right side in FIG. 7). Contact surfaces 213a and 213b are formed on the upper and lower inner wall surfaces of the recess 213A so that the inner stopper portion 212c of the second slider 212 can come into contact with the inner wall surface.

The fourth slider 214 is slidable in the vertical direction along the elongated holes 222c and 223c of the pair of side piece portions 222 and 223. The fourth slider 214 is formed with a recess 214A recessed on the image display surface side (right side in FIG. 7). The upper and lower inner wall surfaces of the recess 214A are formed with contact surfaces 214a and 214b with which the outer stopper portion 212d of the second slider 212 can come into contact.

Here, the operation of the slider mechanism 210 described above when lowering the shutter members 201, 202, 203, 204 will be described with reference to FIGS. 6 to 9.

First, as shown in FIG. 8, when the lowest shutter member 201 in the exposed position is lowered by the elevating unit 206, the other shutter members 202, 203, and 204 also follow the lowest shutter member 201 due to their own weight. And descend.

At this time, as shown in FIG. 6, first, the fourth slider 214 hits the lowermost portion of the elongated holes 222c and 223c, and further downward movement is restricted. At this time, the contact surface on the upper portion of the second slider 212 is in contact with the stopper portion at the upper end of the first slider 211. Further, the inner stopper portion 212c of the second slider 212 is in contact with the contact surface 213a of the third slider 213.

Next, the third slider 213 abuts at the bottom of the elongated holes 222b, 223b, and further downward movement is restricted. At this time, the inner stopper portion 212c of the second slider 212 is eliminated from contacting the contact surface 213a of the third slider 213.

Next, the inner stopper portion 212c of the second slider 212 comes into contact with the contact surface 213b of the third slider 213, and the movement of the second slider 212 further downward is restricted. At this time, the outer stopper portion 212d of the second slider 212 comes into contact with the contact surface 214b of the fourth slider 214.

Finally, the first slider 211 abuts at the bottom of the elongated holes 222a, 223a, and further downward movement is restricted. At this time, the stopper portion at the upper end of the first slider 211 comes into contact with the contact surface at the lower end of the second slider 212. As a result, as shown in FIG. 9, the shutter members 201, 202, 203, and 204 are stopped at the shielding position.

On the other hand, when the lowermost shutter member 201 at the shielding position (position shown in FIG. 9) is raised by the elevating unit 206, first, the stopper portion at the upper end of the first slider 211 is located above the second slider 212. Contact the contact surface.

The second slider 212 is then pushed up by the first slider 211. Subsequently, when the second slider 212 rises together with the first slider 211, the inner stopper portion 212c of the second slider 212 comes into contact with the contact surface 213a of the third slider 213.

After that, the third slider 213 is pushed up by the second slider 212. Subsequently, when the third slider 213 rises together with the first slider 211 and the second slider 212, the outer stopper portion 212d of the second slider 212 comes into contact with the contact surface 214a of the fourth slider 214.

The fourth slider 214 is then pushed up by the second slider 212. Subsequently, when the fourth slider 214 rises together with the first slider 211, the second slider 212, and the third slider 213, the fourth slider 214 hits the uppermost portion of the slot 223c, and the rise is further increased. Be regulated. As a result, the shutter members 201, 202, 203, and 204 are stopped at the exposed positions (positions shown in FIG. 8).

Here, as shown in FIG. 8, when the shutter members 201, 202, 203, and 204 are raised to the exposed positions by the elevating unit 206, their respective surfaces 201a, 202a, 203a, and 204a (see FIG. 9) are exposed. They are superposed on each other in a state of being rotated so as to face upward, and are housed in the space on the back side of the upper exterior member 7a.

Further, the shutter members 201, 202, 203, and 204 have rotation axes (not shown) at both ends in the longitudinal direction, and these rotation axes are rotatably supported by the first sliders 211 to the fourth sliders 214. ing. As a result, the shutter members 201, 202, 203, and 204 are rotatably configured.

Further, a rotating body (not shown) can be integrally rotated at at least one end of each of the rotating shafts of the shutter members 201, 202, 203, and 204 (in the present embodiment, the end on the side piece 222 side). It is attached to. This rotating body can be engaged with an engaging member (not shown) of the rotating mechanism 230, which will be described later.

The rotation range of the above-mentioned rotating body is approximately 180 °. As a result, the shutter members 201, 202, 203, 204 can reverse the front surfaces 201a, 202a, 203a, 204a and the back surfaces 201b, 202b, 203b, 204b, respectively. The above-mentioned rotating body is regulated by the first sliders 211 to the fourth sliders 214 so that the rotation range thereof is approximately 180 °. For example, the rotation range of the rotating body is restricted by engaging a part of the rotating body with the protrusions provided on the first sliders 211 to the fourth sliders 214.

Further, the shutter members 201, 202, 203, and 204 are placed in a shielding position (position shown in FIG. 9) by an urging member (for example, a rewind type torsion spring or the like) provided between each rotating body and each slider. The surfaces 201a, 202a, 203a, and 204a are constantly urged so as to be parallel to the image display surface 11a with the surfaces 201a, 202a, 203a, and 204a facing the front side of the pachislot machine 1.

On the other hand, at the exposed position (position shown in FIG. 8), the shutter members 201, 202, 203, 204 fold each other with the surfaces 201a, 202a, 203a, 204a facing upward against the urging force of the urging member. In this way, it is accommodated in the space on the back side of the upper exterior member 7a.

The rotation mechanism 230 has the shutter members 201, 202, 203, 204 in the state shown in FIG. 9, the state shown in FIG. 10, and the state shown in FIG. 11 when the shutter members 201, 202, 203, 204 are in the shielding position. The shutter members 201, 202, 203, and 204 are rotated so as to be in any of the above states.

Here, the state shown in FIG. 9 is a state in which the surfaces 201a, 202a, 203a, 204a of the shutter members 201, 202, 203, 204 face the front side of the pachi-slot machine 1 and the liquid crystal display device 11 is shielded. is there.

The state shown in FIG. 10 is a state in which the surfaces 201a, 202a, 203a, 204a of the shutter members 201, 202, 203, 204 are stopped at an angle orthogonal to the image display surface 11a of the liquid crystal display device 11. That is, in the state shown in FIG. 10, the shutter members 201, 202, 203, and 204 are in the half-open state, and the image display surface 11a can be visually recognized from the gap between the shutter members.

The state shown in FIG. 11 is a state in which the back surfaces 201b, 202b, 203b, 204b of the shutter members 201, 202, 203, 204 face the front side of the pachi-slot machine 1 and the liquid crystal display device 11 is shielded.

As shown in FIG. 6, the rotation mechanism 230 includes a rotation motor 231 as a drive unit, a rack portion (not shown) that meshes with the pinion gear of the rotation motor 231 and an engagement member (not shown).

As shown in FIG. 6, the rotary motor 231 is attached to the base member 238 below the side piece 222 of the shutter base 220. The base member 238 is fixed to the door body 9 via a fastening member (not shown).

The rotation motor 231 is composed of, for example, a stepping motor whose rotation angle can be adjusted and which can rotate forward and reverse. Further, a pinion gear (not shown) is integrally rotatably attached to the drive shaft of the rotary motor 231.

In the present embodiment, the stepping motors used as the elevating motors 240A and 240B and the rotary motor 231 are of the two-phase excitation type, but are not limited to the one-phase excitation type and the one- and two-phase excitation types. Alternatively, it may be a microstep drive type, or may be a servo motor, a reluctance motor, or a coreless motor as long as the rotation angle can be adjusted and forward / reverse rotation is possible.

Although not shown, the rack portion is composed of a long member along the extending direction (vertical direction in FIG. 6) of the side piece portion 222, and corresponds to the rotation of the pinion gear of the rotary motor 231. It is movable in the vertical direction.

Further, the rack portion is provided with four engaging members with which the rotating bodies of the shutter members 201, 202, 203, and 204 can be engaged, at predetermined intervals in the vertical direction. These engaging members engage with the rotating bodies of the shutter members 201, 202, 203, and 204, respectively, when the shutter members 201, 202, 203, and 204 are lowered to the shielding position (position shown in FIG. 9). It has become.

Further, each engaging member is configured to rotate as the rack portion moves in the vertical direction. For example, by engaging the gear portion formed in each engaging member with the gear portion formed in the rack portion, each engaging member can be rotated as the rack portion moves.

The rotary mechanism 230 configured in this way can rotate the engaging member by 180 ° by moving the rack portion in the vertical direction by driving the rotary motor 231 and can drive the rotary motor 231 in a predetermined number of steps. It is also possible to rotationally drive the engaging member by a predetermined driving amount by driving only.

Therefore, the rotation mechanism 230 rotates the engaging member 180 ° in the forward and reverse directions by driving the rotary motor 231 to rotate the front surfaces 201a, 202a, 203a, 204a and the back surface of the shutter members 201, 202, 203, 204. The shutter members 201, 202, 203, 204 can be rotated at the shielding position so that the 201b, 202b, 203b, and 204b are inverted.

Further, the rotation mechanism 230 rotates the engaging member by a predetermined driving amount (for example, 90 °) by driving the rotary motor 231 to rotate the surfaces 201a, 202a, 203a, 204a of the shutter members 201, 202, 203, 204. Can stop the shutter members 201, 202, 203, 204 at an angle orthogonal to the image display surface 11a (see FIG. 10).

Here, the raising and lowering and rotation of the shutter members 201, 202, 203, and 204 as described above are detected by the origin sensor 270, the lowering sensor 271, and the rotation sensor 272, respectively.

The origin sensor 270 is arranged above the side piece 223 of the shutter base 220, and is composed of, for example, a transmissive photo sensor. The origin sensor 270 detects that the shutter members 201, 202, 203, and 204 are at the origin, that is, the exposed position (position shown in FIG. 8) by detecting the upper end of the fourth slider 214.

The lowering sensor 271 is arranged below the side piece 222 of the shutter base 220, and like the origin sensor 270, is composed of, for example, a transmissive photo sensor. By detecting the lower end of the first slider 211, the lowering sensor 271 detects that the shutter members 201, 202, 203, and 204 are lowered, that is, they are in the shielding position (position shown in FIG. 9).

The rotation sensor 272 is arranged near the lower portion of the side piece portion 222 of the shutter base 220, and is composed of, for example, a transmissive photo sensor, like the origin sensor 270 and the lowering sensor 271. The rotation sensor 272 detects a detection piece (not shown) formed on the rack portion of the rotation mechanism 230, so that the shutter members 201, 202, 203, and 204 are not rotating (state shown in FIG. 9), that is, rotation. Detects that it is at the origin. In the present embodiment, in addition to the detection piece for detecting the rotation origin, the shutter members 201, 202, 203, and 204 are in an inverted state (state shown in FIG. 11) in the rack portion. A detectable detection piece is provided.

The origin sensor 270, the lowering sensor 271 and the rotation sensor 272 described above are not limited to the transmission type photo sensor, but may be a reflection type photo sensor, or a sensor other than the photo sensor such as a micro switch. May be good.

Next, with reference to FIG. 12, a structure for causing the shutter members 201, 202, 203, and 204 to emit light will be described.

As shown in FIG. 12, the shutter device 200 includes a light irradiation device 400 as a light irradiation means for irradiating the shutter members 201, 202, 203, 204 with light from the side, and the shutter members 201, 202, 203, 204. Two are provided on both ends in the longitudinal direction. Further, these light irradiation devices 400 are fixed to the side pieces 222 and 223 of the shutter base 220 via the support member 400a, respectively.

The light irradiation device 400 has four LEDs 401, 402, 403, and 404 arranged side by side in the vertical direction corresponding to the shutter members 201, 202, 203, and 204, respectively. LEDs 401, 402, 403, and 404 are included in the above-mentioned LED group 25 (see FIG. 3).

Further, the shutter members 201, 202, 203, 204 are decorated with decoration 500 on at least a part of one surface (in the present embodiment, the back surfaces 201b to 204b). The decoration 500 is drawn in any shape and is not particularly limited to the shape shown in FIG.

Concavities and convexities that reflect the light emitted from the LEDs 401, 402, 403, and 404 toward the front side of the pachislot machine 1 (see FIG. 2) are formed on the back surfaces 201b to 204b where the decoration 500 is applied. .. The unevenness has an inclined surface on which the light emitted from the LEDs 401, 402, 403, 404 can be reflected toward the front side of the pachislot machine 1.

Further, in the present embodiment, the LEDs 401, 402, 403, and 404 are installed in the light irradiation device 400 in an inclined state so as to irradiate the uneven inclined surface with light at a predetermined angle. Here, the installation angles of the LEDs 401, 402, 403, and 404 are angles at which the inclined surface can be irradiated with the irradiation light such that the light reflected on the inclined surface is directed to the front side of the pachislot machine 1. Strictly speaking, it is preferable that the installation angle of the LEDs 401, 402, 403, 404 and the angle of the inclined surface are set in consideration of the incident angle and the reflection angle of the LEDs 401, 402, 403, 404 with respect to the inclined surface.

[RT game state transition]
As shown in FIG. 13, the pachi-slot machine 1 has "RT0 game state", "RT1 game state", "RT2 game state", "RT3 game state", and "RT4" as RT game states controlled by the main CPU 93. There are "game state" and "RT5 game state".

The "RT0 game state" and the "RT1 game state" are replay low probability states in which the internal winning probability of the internal winning combination related to the re-game is low. Further, the "RT2 game state" is a replay-during probability state in which the internal winning probability of the internal winning combination related to the re-game is higher than that of the "RT0 game state" and the "RT1 game state". On the other hand, the "RT3 game state", "RT4 game state" and "RT5 game state" are replay high probability states in which the internal winning probability of the internal winning combination related to the re-game is higher than that of the "RT2 game state".

The RT game state is shifted between "RT0 game state", "RT1 game state", "RT2 game state", "RT3 game state", "RT4 game state" and "RT5 game state" when a predetermined condition is satisfied. To.

For example, when the setting is changed, the RT gaming state shifts to the "RT0 gaming state". In the "RT0 gaming state", when any combination of "RT1 transition_1" to "RT1 transition_3" is displayed along the valid line, the RT gaming state shifts to the "RT1 gaming state".

Further, in the "RT1 gaming state", when any combination of "RT2 transition rip_1" to "RT2 transition rip_3" is displayed along the valid line, the RT gaming state is changed to the "RT2 gaming state". Transition. On the other hand, in the "RT1 game state", when any combination of "RT5 transition lip _1" to "RT5 transition lip _1" is displayed along the valid line, the RT game state is changed to the "RT5 game state". Transition.

In addition, when any combination of "RT3 transition lip _1" to "RT3 transition lip _1" is displayed along the valid line in the "RT2 game state", the RT game state is changed to the "RT3 game state". Transition.

Further, in the "RT3 game state", when any combination of "RT4 transition lip _1" to "RT4 transition lip _13" is displayed along the valid line, the RT game state is changed to the "RT4 game state". Transition. Further, in the "RT3 game state", when any combination of "RT5 transition lip _1" to "RT5 transition lip _1" is displayed along the valid line, the RT game state is changed to the "RT5 game state". Transition.

Further, in the "RT4 game state" and the "RT5 game state", when any combination of "RT3 transition lip _1" to "RT3 transition lip _1" is displayed along the valid line, the RT game state is displayed. It shifts to "RT3 game state".

In addition, in "RT1 game state", "RT4 game state" and "RT5 game state", any combination of "RT0 lip" and "middle right push combination _1" to "middle right push combination _8" is effective. If it is displayed along the line, the RT gaming state shifts to the "RT0 gaming state".

Further, when any combination of "RT1 transition _1" to "RT1 transition _3" is displayed along the valid line in "RT2 game state" to "RT5 game state", the RT game state is "RT1". Shift to "game state".

As described above, the main CPU 93 constitutes a game state transition means for shifting the RT game state between a plurality of RT game states 0 to 5 having different winning probabilities of the replay operation combination (replay combination).

[Game state of sub-control circuit]
As described above, while the RT game state is shifted by the main CPU 93, the sub CPU 102 determines the content of the effect and notifies the reels 3L, 3C, 3R of the stop operation, thereby performing the internal winning combination. Winning or non-winning in favor of the player, or shifting the RT game machine.

Here, the state in which the sub CPU 102 notifies the stop operation of the reels 3L, 3C, and 3R so that the internal winning combination is won or not won in favor of the player is referred to as "AT". Further, the state in which the AT state and the RT game state is the replay high probability state is referred to as "ART".

Therefore, during ART, it is possible to win an internal winning combination so that the number of medals won increases without inserting medals. Therefore, as the number of games (games) in ART increases, more medals are awarded. Can be acquired. Therefore, in the pachi-slot machine 1 of the present embodiment, adding the number of games as the number of ART grants (also referred to as “addition”) has a great influence on the acquisition of medals.

The pachi-slot machine 1 of the present embodiment has secondary functions such as high probability of ART, high probability of ART, high probability of pseudo BB, pseudo BB, waiting for normal return, additional game and additional selection (also referred to as “selective game”), in addition to general Take a game state.

The high probability of ART is a special gaming state in which the degree of expectation for ART is higher than that of the general gaming state, that is, it is easy to shift to ART. This high ART probability is transferred by the sub CPU 102 when a predetermined condition is satisfied, for example, when a predetermined number of games (for example, 600 games) have been exhausted since the end of the previous ART. In this way, the sub CPU 102 constitutes the special game state transition means.

During the high probability of ART, in a game that does not win any of the internal winning combinations (hereinafter referred to as "out-of-game game"), whether to lock the game operation by the player for a predetermined period in the next game (next game) Whether or not it is decided by the main CPU 93 by lottery.

In addition, during the high probability of ART, in the out-of-game game, a specific stop operation sequence (for example, right-press) for displaying a combination of predetermined special symbols (in this embodiment, "bat") on the effective line is performed. Whether or not to notify is determined by the sub CPU 102 by lottery, and the notification is performed. In this way, the sub CPU 102 constitutes the notification determination means and the stop operation order notification means.

Furthermore, during the ART high probability, special during the lock performed in the next game, provided that the combination of special symbols is not displayed on the valid line as a result of the stop operation being performed in the above-mentioned specific stop operation order. The main CPU 93 performs an off-reel action (locking effect) that rotates at least one of the plurality of reels 3L, 3C, and 3R so that the combination of symbols is displayed on the effective line. In this way, the main CPU 93 constitutes the locking effect means.

If the sub CPU 102 does not win the ART during the high probability of ART, the sub CPU 102 performs a special mode transition lottery with a predetermined probability, and when the gaming state shifts to the special mode, the ART high probability is reached until the ART is won. The transition may be repeated.

Further, the sub CPU 102 shifts to the ART ultra-high probability, which has a higher expectation for ART than the ART high probability, with a predetermined winning probability, and during the ART ultra-high probability, the ART transition point is set every time the small winning combination wins internally. In addition to adding, the number of remaining games with an ultra-high probability of ART may be maintained. At this time, when the ART transition point reaches a predetermined value by the end of the ART ultra-high probability, the sub CPU 102 is determined to shift to ART.

The pseudo BB high probability shifts when a predetermined condition is satisfied, for example, when a lottery is won when a specific internal winning combination is won, and when the number of activation standby games within the predetermined number of games has elapsed. For the pseudo BB high probability, 10 games, 20 games, and an infinite game are selected by the lottery at the time of winning.

Even if 10 games or 20 games are selected as the number of games with a high probability of pseudo BB, an additional lottery is performed for the number of games with a high probability of pseudo BB during the high probability of pseudo BB. When the number of pseudo BB high-probability games exceeds 20 games by this additional lottery, an infinite number of games is selected as the number of pseudo-BB high-probability games, and each game is added to the number of ART games.

When an infinite game is selected as the number of games with a high probability of pseudo BB, the high probability of pseudo BB continues until the game shifts to the pseudo BB. That is, it is confirmed that the transition to the pseudo BB is performed. When the sub CPU 102 determines as an internal winning combination a combination capable of displaying a combination such as RT5 transition lip 1 to RT5 transition lip_16 along the effective line during the pseudo BB high probability, the sub CPU 102 shifts to the pseudo BB with a relatively high probability. Execute the notification to make it.

The pseudo BB is a mode in which the RT game state shifts from another RT game state to the RT5 game state. In the pseudo BB, the addition of ART is more likely to occur according to the internal winning combination, and the number of games to be added is relatively large as compared with the case of ART.

The normal return waiting mode is a mode for shifting the sub-game state to the general state when the RT game state changes from a high probability of replay of RT3 or higher to a probability of being replayed of RT2 or less of the game state or a low probability of replay. Further, when the sub-game state shifts to the normal return waiting, the ART pullback lottery is performed while waiting for the normal return, and it is determined whether the ART restarts or shifts to the general mode depending on the lottery result.

The additional game is a mode in which the RT game state shifts from the RT3 game state or the RT5 game state to the RT4 game state. The additional game stocks the number of executions of the additional selection.

The additional selection is executed at the time of locking after one unit of the game when the number of executions of the additional selection is stocked in the RT3 gaming state or the RT5 gaming state. When the additional game is executed, the liquid crystal display device 11 is operated by the sub CPU 102 so that the number of additional games cannot be identified by a plurality of elements associated with the number of additional games of ART, as in the selection game screen shown in FIG. 162. Is randomly arranged and displayed in the first area of the above (first display state), and the number of elements associated with the number of additional games of ART is displayed in the second area of the liquid crystal display device 11 for each additional game. Is displayed. In this way, the sub CPU 102 constitutes the display control means.

That is, in FIG. 162, 13 elements associated with the number of additional games of 10 games, one element associated with the number of additional games of 100 games, and the number of additional games of 300 games are associated with each other. It means that the one element is randomly arranged and displayed.

In addition, depending on the state when the additional selection is won, the number of additional games associated with at least one of the plurality of elements is displayed so as to be identified, as in the selection game screen shown in FIG. 163. In some cases, as in the selection game screen shown in FIG. 164, the number of additional games associated with all the elements is displayed so that they can be identified (second display state).

The elements arranged in the first region of the liquid crystal display device 11 are selected by, for example, the stop buttons 17L, 17C, 17R, and are determined by the MAX bet button 14. As described above, the stop buttons 17L, 17C, 17R and the MAX bet button 14 constitute the selection means.

Further, the sub CPU 102 determines the number of additional games associated with the element selected by the selection means as the number of additional games of ART. In this way, the sub CPU 102 arranges the elements randomly arranged in association with the number of games added to the ART and the elements as in the selection game screen shown in FIG. 162 displayed on the liquid crystal display device 11. For this purpose, the first additional selection lottery process (see FIGS. 141 and 142) described later with reference to the ART addition selection lottery table (see FIGS. 58 and 59) described later, and the first additional selection selection process described later (see FIGS. 58 and 59). (See FIGS. 144 and 145), refer to the additional selection payout table (see FIG. 56) described later, and determine the number of advantageous grants by the fourth additional selection selection process (see FIGS. 147 and 148) described later. It constitutes a means for determining the number of grants.

As shown in FIG. 162, in a state where a plurality of elements associated with the number of additional games of ART are displayed so that the number of additional games cannot be identified, the sub CPU 102 performs a predetermined operation (selection button 18 or decision button). A random element may be selected from a plurality of elements on condition that the pressing of 19 etc.) is performed.

Further, as shown in FIG. 162, in a state where a plurality of elements associated with the number of additional games of ART are displayed so that the number of additional games cannot be identified, the sub CPU 102 performs a predetermined operation (selection button 18 or The average number of games associated with each of the plurality of elements may be determined as the number of additions of the number of ART games, provided that the determination button 19 is pressed, etc.).

Further, as shown in FIG. 164, in a state where the number of additional games associated with all the elements is displayed so as to be identified, the sub CPU 102 presses a predetermined operation (selection button 18 or decision button 19). Etc.) may be selected, and the most advantageous element for the player may be selected from the plurality of elements.

When one element is selected by the operation by these selection means, the number of additional games associated with each element is displayed so as to be identified as shown in the selection game screen shown in FIG. 165, and the selected element is selected. The number of games associated with is added to ART.

Further, the sub CPU 102 drives the shutter device 200 so as to rotate the shutter device 200 after lowering the shutter until the shutter is in a half-open state while the selection game screen as shown in FIG. 162 is displayed on the liquid crystal display device 11. At this time, the sub CPU 102 may preferentially redisplay the elements displayed on the liquid crystal display device 11.

For example, the sub CPU 102 associates a plurality of elements associated with the number of additional games of ART with all the elements before the shutter is half-opened from the state in which the number of additional games is displayed so that the number of additional games cannot be identified. The number of additional games added may be displayed on the liquid crystal display device 11 so that they can be identified.

[Data table stored in the main ROM]
14 to 44 show various data tables stored in the main ROM 94.

<Design arrangement table>
The symbol arrangement table shown in FIG. 14 represents an arrangement of symbols arranged on the surfaces of the left reel 3L, the middle reel 3C, and the right reel 3R. The symbol arrangement table defines the correspondence between the 21 symbol positions "0" to "20" and the symbols corresponding to each of these symbol positions.

The symbol positions "0" to "20" indicate the positions of the symbols arranged along the rotation direction in each of the left reel 3L, the middle reel 3C, and the right reel 3R. The symbol corresponding to the symbol positions "0" to "20" can be specified by referring to the symbol arrangement table using the value of the symbol counter.

The types of patterns are "card", "red 7", "bat", "watermelon 1", "bell", "replay", "cherry 1", "watermelon 2", "cherry 2" and "BAR". Includes.

Here, the "watermelon 1" and the "watermelon 2" need only be able to be identified as having different symbols internally by the main CPU 93, and in the present embodiment, the player can recognize them as the same symbol. It is a design. Similarly, as for "cherry 1" and "cherry 2", it suffices if the main CPU 93 can be identified as a different symbol internally, and in the present embodiment, the same symbol and a symbol that can be recognized by the player can be recognized. And.

<Design code table>
As shown in FIG. 15, each symbol arranged on each reel 3L, 3C, 3R is specified by a symbol code table, and in the present embodiment, it is distinguished by 1 byte (8 bits) of data. The symbol code table shown in FIG. 15 represents a symbol code as data for identifying the symbols arranged on the surfaces of the three reels 3L, 3C, and 3R.

For example, the symbol arrangement table shown in FIG. 14 has been described as representing an arrangement of symbols arranged on the surfaces of the left reel 3L, the middle reel 3C, and the right reel 3R, but is actually stored in the main ROM 94. The symbol arrangement table represents an arrangement of symbol codes for specifying symbols arranged on the surfaces of the left reel 3L, the middle reel 3C, and the right reel 3R.

In the present embodiment, the symbols used in the pachislot machine 1 are "card", "red 7", "bat", "watermelon 1", "bell", "replay", "cherry 1", and "cherry 1" as described above. There are 10 types of "watermelon 2", "cherry 2" and "BAR".

In the symbol code table, "1" is assigned as the symbol code for the "card" symbol. Further, "2" is assigned as a symbol code for the "red 7" symbol. In addition, "3" is assigned as a symbol code for the "bat" symbol.

Similarly, "4" to "10" are assigned as symbol codes for each symbol of "watermelon 1", "bell", "replay", "cherry 1", "watermelon 2", "cherry 2" and "BAR". Has been done.

<Design combination table>
The symbol combination table shown in FIGS. 16 and 17 shows a combination of symbols identified by storage area identification data represented by 22 bytes (hereinafter referred to as “combination”) and a combination displayed on an effective line. It is associated with the number of medals paid out. The symbol combination tables shown in FIGS. 16 and 17 are given names and brief explanations (remarks) for each combination in order to make the invention easier to understand.

For example, if the combination of "Replay-Replay-Red 7" called "RT1 Transition_1" is displayed along the valid line, the winning combination is "missing", so no medal is paid out. The RT gaming state shifts to the RT1 gaming state. "RT1 transition_2" and "RT1 transition_3" are the same as "RT1 transition_1".

If the "Replay-Replay-Bell" combination called "MB" is displayed along the valid line, no medals will be paid out, but the MB will operate. That is, when "MB" is displayed along the valid line, the main game state shifts to the MB operating state.

When the combination of "replay-replay-replay" called "replay without transition" is displayed along the effective line, the re-game is activated and the RT game state is maintained.

When the combination of "bat-bat-bat-bat" called "symbol lip_1" is displayed along the effective line, the replay is activated. "Symbol rip_2" to "Symbol rip_12" are the same as "Symbol rip_1".

When the combination of "Bell-Bell-Red 7" called "RT2 transition lip_1" is displayed along the effective line, the re-game is activated and the RT game state shifts to the RT2 game state. "RT2 transition lip _2" and "RT2 transition lip _3" are the same as "RT2 transition lip _1".

When the combination of "Watermelon 1-Replay-BAR" called "RT3 transition lip_1" is displayed along the effective line, the re-game is activated and the RT game state shifts to the RT3 game state. "RT3 transition lip _2" to "RT3 transition lip _16" are the same as "RT3 transition lip _1".

When the combination of "watermelon 1-bell-bell" called "RT4 transition lip_1" is displayed along the effective line, the re-game is activated and the RT-game state shifts to the RT4 game state. "RT4 transition lip _2" to "RT4 transition lip _13" are the same as "RT4 transition lip _1".

When the combination of "bell-card-BAR" called "RT5 transition lip_1" is displayed along the valid line, the re-game is activated and the RT game state shifts to the RT5 game state. "RT5 transition lip _2" to "RT5 transition lip _16" are the same as "RT5 transition lip _1".

When the combination of "Replay-BAR-BAR" called "BAR Tenlip_1" is displayed along the effective line, the replay is activated. "BAR Tenlip _1" is the same as "BAR Tenlip _1".

When the combination of "Watermelon 1-Cherry 1-Bell" called "Medium Chelip_1" is displayed along the effective line, the replay is activated. "Medium chelip_2" to "medium chelip_1" are the same as "medium chelip_1".

When the combination of "Red 7-Red 7-Red 7" called "7 Lip_RT5_01" is displayed along the effective line, the re-game is activated and the RT game state shifts to the RT5 game state. "7 rip_RT5_02" to "7 rip_RT5_06" are the same as "7 rip_RT5_01".

When the combination of "Red 7-Replay-Bell" called "7 Lip_No Transition_1" is displayed along the valid line, the re-game is activated, but the RT game state is not transferred. "7 rip_no transition_2" to "7 rip_no transition_3" are the same as "7 rip_no transition_1".

If a "bell-bell-bell" combination called "middle bell" is displayed along the valid line, nine medals will be paid out. If a "replay-bell-replay" combination called "bell_crossdown" is displayed along the valid line, 14 medals will be paid out.

If the "Watermelon 1-Bell-Replay" combination called "Bell_Koyama_1" is displayed along the valid line, 13 medals will be paid out. "Bell_Koyama_1" is the same as "Bell_Koyama_1".

If the "Replay-Bell-Red 7" combination called "Bell_Small V_1" is displayed along the valid line, 14 medals will be paid out. "Bell_small V_2" and "bell_small V_3" are the same as "bell_small V_1".

If the combination of "Watermelon 1-Bell-BAR" called "Bell_Crossup_1" is displayed along the valid line, 13 medals will be paid out. "Bell_Cross-up_2" to "Bell_Cross-up_8" are the same as "Bell_Cross-up_1".

If the combination of "Replay-Watermelon 1-Red 7" called "Upper Bell_A_1" is displayed along the valid line, one medal will be paid out. The "upper bell_A_2" and "upper bell_A_3" are the same as the "upper bell_A_1".

If the combination of "Replay-Watermelon 2-Red 7" called "Upper Bell_B_1" is displayed along the valid line, one medal will be paid out. The "upper bell_B_2" and "upper bell_B_3" are the same as the "upper bell_B_1".

If the combination of "Replay-Cherry 2-Red 7" called "Upper Bell_1" is displayed along the valid line, one medal will be paid out. The "upper bell _2" and "upper bell _3" are the same as the "upper bell _1".

If the combination of "Bell-Cherry 1-BAR" called "Upper Watermelon_1" is displayed along the valid line, four medals will be paid out. The "upper watermelon _1" is the same as the "upper watermelon _1".

If the combination of "Watermelon 1-Replay-Bell" called "Middle Right Pushing Role_1" is displayed along the valid line, one medal will be paid out and the RT game state will be changed to the RT0 game state. Transition. The "middle right push combination _2" to the "middle right push combination _8" are the same as the "middle right push combination _1".

If the combination of "Red 7-BAR-Bat" called "One-card combination A" is displayed along the valid line, one medal will be paid out. "One-card combination B" and "one-sheet combination C" are the same as "one-sheet combination A".

When the combination of "BAR-watermelon 1-BAR" called "Che A_1" is displayed along the valid line, one medal is paid out. "Che A_2" to "Che A_31" are the same as "Che A_1".

If the combination of "Watermelon 2-Cherry 1-BAR" called "Che B_1" is displayed along the valid line, one medal will be paid out. "Che B_1" to "Che B_1" are the same as "Che B_1".

<Combination table by flag>
The flag-based combination tables shown in FIGS. 18 and 19 show the combinations that are allowed to be displayed on the effective line corresponding to the internal winning combination. As the internal winning combination in this embodiment, "MB", "Rip A without transition", "Rip B without transition", "SB Lip 1", "SB Lip 2", "SB Tempai", "RT2 Lip 2nd" , "RT2 Lip 3rd", "RT2K Lip 1st", "RT3 Lip 2nd", "RT3 Lip 3rd", "K_K_RT4", "7_RT4_K", "77_RT4_K", "7_K_77", "77_K_7", "Reach_Reach" _K "," Unquestioned 7 "," Unquestioned 77 "," Unquestioned Tempai "," RT4 Transition A "," RT4 Transition B "," BAR Ten "," Medium Chelip "," Medium Che BAR Lip "," RT4K Lip " 1st ”,“ RT4K Lip 2nd ”,“ RT4K Lip 3rd ”,“ RT5K Lip 1st ”,“ Confirmed Bell ”,“ Strong Bell ”,“ Medium Correct Answer Bell ”,“ Right 312 Correct Answer Bell ”,“ Right 321 Correct Answer Bell ” , "Watermelon", "Chance eye A", "Chance eye B", "Chance eye C", "Weak cherry" and "Strong cherry".

For example, when the internal winning combination is "MB", the main CPU 93 allows the combination of "MB" to be displayed on the valid line. That is, when the internal winning combination is "MB", it means that the MB has an internal winning combination.

Similarly, when the internal winning combination is "SB rip 1", the main CPU 93 puts the combination of "no transition rip", "RT0 rip" and "symbol rip _1" to "symbol rip _6" on the effective line. Allow to display in.

Further, when the internal winning combination is "RT4 transition A", the main CPU 93 displays the combination of "transition-free rip" and "RT4 transition rip_1" to "RT4 transition rip_13" on the effective line. Allow.

Further, when the internal winning combination is a "fixed bell", the main CPU 93 uses "bell_crossdown", "bell_koyama_1" to "bell_koyama_2", "bell_small V_1" to "bell". Allows the combination of "small V_3", "bell_crossup_1" to "bell_crossup_8" to be displayed on the valid line.

<Internal lottery table>
The plurality of internal lottery tables shown in FIGS. 20 to 31 are stored in the main ROM 94 corresponding to each game state and each input number, and show the winning probability of each flag with the denominator set to 65536 for each setting 1 to 6. There is. In particular, in the present embodiment, the internal lottery table when the number of input sheets is "3" will be described.

Here, FIGS. 20 to 25 show an internal lottery table when three cards are hung in each RT game state when the main game state is in a general game state other than the MB game state. For example, in FIG. 20, in the case of setting 1, the probability of "missing" is "33302 / 65536", the probability of "MB" winning internally is "3930/65536", and "lip A without transition" is internal. The probability of winning is "8431 / 65536", the probability of winning the "confirmed bell" internally is "1/65536", and "middle correct answer bell", "right 312 correct answer bell" and "right 321 correct answer bell" are. The probability of winning internally is "5579/65536", and the probability of winning "strong cherry" internally is "330/65536".

Further, FIGS. 26 to 31 show an internal lottery table when three cards are hung in each RT game state when the main game state is the MB game state. For example, in FIG. 26, in the case of setting 1, the probability of "missing" is "0/65536", the probability of winning the "CB role" internally is "56558/65536", and "CB role_no transition lip". The probability that "A" will win internally is "8431/65536", and the probability that "CB role_SB lip 1" will win internally is "393/65536". Here, "CB role" is all small roles except replay.

<Initial setting table for stopping rotation>
The rotation cylinder stop initial setting table shown in FIG. 32 is information for stopping the reels 3L, 3C, and 3R, and is predetermined according to the internal winning combination. The main CPU 93 has come to acquire various data for stopping the reels 3L, 3C, and 3R by referring to the rotation cylinder stop initial setting table and acquiring the rotation cylinder stop number corresponding to the internal winning combination. There is.

Specifically, in the rotation cylinder stop initial setting table, in addition to the determination data for each pressing order, the table number selection data and the change data table number after the first cylinder first stop are associated with the rotation cylinder stop number. , The first body stop data table number, the initial data after the first body stop first stop, and the search order table number are defined according to the game state. These various types of data indicate various table numbers to be selected in the stop control of the reels 3L, 3C, and 3R according to the progress of the unit game.

The “judgment data for each pressing order” includes the attraction priority table number and the attraction priority selection table number. The “draw-in priority table number” is a number for selecting the pull-in priority table shown in FIG. 33. Further, the “draw-in priority selection table number” is a number for selecting the pull-in priority selection table shown in FIG. 34.

The "table number selection data" is a value referred to when all reels are stopped when the first stop reel is other than the left reel 3L, and includes a stop table number and a change status.

The "stop table number" is a number for selecting a stop table (not shown) to be referred to when stopping all reels when the first stop reel is other than the left reel 3L.

The "change status" of the table number selection data is data for changing the line status for each game representing the line referred to in the stop table selected based on the stop table number.

The change data table number after the first stop of the first cylinder, the data table number of the first stop of the cylinder, and the initial data after the first stop of the first cylinder show that the first stop reel is the first reel, that is, the left reel 3L. It is the data referred to when is.

The "first cylinder stop data table number" is for selecting the first cylinder stop data table referred to when stopping the first cylinder from the first cylinder stop data table shown in FIG. 35 as an example. It is a number.

The "initial data after the first stop of the first cylinder" is the data referred to when the second and third cylinders are stopped, and includes the table number and the line status. The "table number" is a number for selecting (not shown) a stop data table after the first stop of the first cylinder, which is referred to when stopping the second and third stop reels.

The "change status" of the initial data after the first stop of the first cylinder is the line status for each game that represents the line referred to in the stop data table after the first stop of the first cylinder selected based on the table number. This is the data to be changed.

"1st change data table number after the first stop of the cylinder" is for selecting the change data table after the first stop of the first cylinder (not shown) for changing the initial data after the first stop of the first cylinder. It is the data of.

The "search order table number" is a number for selecting the search order table for determining the number of sliding pieces from the search order tables shown in FIGS. 36 and 37.

<Draw-in priority table>
The attraction priority table shown in FIG. 33 shows which combination is preferentially attracted from among a plurality of combinations that can be displayed within the attraction range corresponding to the internal winning combination. In FIG. 33, the data of the winning operation flag representing the combination of combinations is omitted.

In the draw-in priority table, the draw-in priority of the combination represented by the winning operation flag is shown. The “draw-in priority data” is information provided for the main CPU 93 to identify the pull-in priority.

For example, in the pull-in priority table number "00", if it is determined that "7 rip_RT5_01" and "RT5 transition rip_1" to "RT5 transition rip_16" may win a prize, "RT5 transition" Since "7 rip_RT5_01" has a higher priority than "Rip _1" to "RT5 transition rip _16", the rotating reels 3L, 3C, and 3R are stopped and controlled so as to preferentially pull in "7 rip_RT5_01". Will be.

<Draw-in priority selection table>
In the attraction priority selection table shown in FIG. 34, the attraction priority table number for the stop operation type indicating the order of the reel stop operations is associated with each attraction priority selection table.

For example, in the attraction priority table selection number "01", when the first stop operation is "left", the attraction priority table number "03" is associated and the first stop operation is "right". In this case, the pull-in priority table number "16" is associated with the case.

Further, in the pull-in priority table selection data "01", when the first stop operation is "left" and the second stop operation is "middle" during the second stop operation ("left → middle" in the figure), When the pull-in priority table number "03" is associated and the first stop operation is "right" and the second stop operation is "left" during the second stop operation ("right → left" in the figure), The pull-in priority table number "16" is associated with it.

<1st body stop data table>
The first cylinder stop data table shown in FIG. 35 is referred to when the left reel 3L is stopped when the first stop reel is the left reel 3L. In the first body stop data table, the number of sliding pieces determination data and the change status are defined for the symbol position data representing the position of each symbol. In this embodiment, seven types of first body stop data tables "00" to "07" are used.

The "sliding piece number determination data" is referred to for specifying the sliding piece number determination data in the search order table shown in FIGS. 36 and 37, and the "change status" is changed after the first stop of the first cylinder (not shown). Referenced to identify change status in the data table.

<Search order table>
The search sequence table shown in FIGS. 36 and 37 is referred to for determining the number of sliding pieces of each reel 3L, 3C, 3R. In this embodiment, two types of search sequence tables "00" and "01" are used. In the search order table, the number of slip pieces is associated with the data for determining the number of slip pieces according to the priority order.

For example, in the search order table "00" shown in FIG. 36, when the number of sliding pieces determination data is "3", the number of sliding pieces "3" has the highest priority order, followed by the number of sliding pieces "1". , "0", "4", "2", the priority order goes down.

In this case, when the corresponding reel is slid three pieces, if the combination corresponding to the internal winning combination can be displayed on the effective line, the number of sliding pieces "3" is selected and corresponds to the internal winning combination. If the combination cannot be displayed on the valid line, the priority order is lowered until the combination can be displayed on the valid line.

In addition, if the combination corresponding to the internal winning combination cannot be displayed on the effective line even if the priority order is lowered to the number of sliding pieces "2", or if there is no internal winning combination, the highest priority is given. The number of sliding pieces "3" having a high order is selected.

<Prize winning operation flag data table for symbols>
The symbol-corresponding winning operation flag data table shown in FIG. 38 defines the correspondence between the reel type and the data of the internal winning combination that can be displayed according to the symbol of each reel displayed on the winning determination line. That is, by referring to the symbol-corresponding winning operation flag data table, it is possible to determine the internal winning combination that can be displayed at that time. The symbol-corresponding winning operation flag data table is provided corresponding to the symbol combination table shown in FIGS. 16 and 17.

For example, when the symbol "red 7" is stopped and displayed on the winning determination line of the left reel 3L, in the storage areas 1 to 22 corresponding to the symbol code "000000010" (red 7) in the reel type "left". "1" is stored in the bit corresponding to the displayable internal winning combination. The data in the symbol code storage area is updated by the logical product of the data defined in the symbol correspondence winning operation flag data table and the data stored in the symbol code storage area shown in FIG. 47.

<Out of reel action lottery table>
In the off-reel action lottery table shown in FIG. 39, a so-called "right push" is performed in which the first stop operation is "right" and the third stop operation is "left" in the case of "out" without an internal winning combination. This is a table that is referred to when drawing a lottery as to whether or not to generate a lock in the next game on the condition that

Here, the "lock" is to invalidate the game operation by the player for a predetermined period. In the present embodiment, during locking, the reels 3L, 3C, and 3R rotate in various rotation modes to pseudo-align the "symbols" ("bats" in the present embodiment), so-called reel action. It is feasible.

In the reel action lottery table, if you win "None", the lock will not occur, and "Aim", "Aim (Aori)", "Aim (symbol alignment)" and "Aim (symbol alignment after one lap)" If you win, a lock will occur.

Here, in the case of "aim", the lock is generated, but in particular, the reel action is not executed in the next game. Also, in the case of "Aiori", the reel action is executed, but the "symbols" are not aligned in a pseudo manner.

Further, in the case of "aim (symbol alignment)" and "aim (symbol alignment after one lap)", a reel action in which "symbols" are pseudo-aligned in different rotation modes is executed. In the present embodiment, ART is determined when a lock accompanied by a reel action of "Aim (symbol alignment)" and "Aim (symbol alignment after one lap)" occurs.

Furthermore, in the off-reel action lottery table, the winning probability of whether or not to generate a lock differs depending on each mode of "normal", "chance", "big chance", "preparation for confirmation" and "confirmation", and the reel The distribution probability of actions is also different.

For example, in the "normal" mode, the winning probability of "none" is the highest at "48273/65536", and the winning probability of "aiming (symbol alignment)" and "aiming (symbol alignment after one lap)" for which ART is confirmed. Are significantly lower at "133/65536" and "30/65536", respectively.

Also, in the "Great Chance" mode, the winning probabilities of "Aim (symbol alignment)" and "Aim (symbol alignment after one lap)" are "30000/65536" and "4536/65536", respectively, and are "normal" and "normal". It is much higher than "chance".

Further, in the "confirmation" mode, only "aim (symbol alignment)" and "aim (symbol alignment after one lap)" in which ART is confirmed are won. The "confirmation preparation" mode is a mode in which it is promised to shift to the "confirmation" mode.

In addition, each mode of "normal", "chance", "great chance", "confirmation preparation" and "confirmation" is a separate transition regardless of the transition of the main game state or the RT game state, and between these modes. Is performed by the main CPU 93 based on the off-reel action state transition lottery table shown in FIG. 40. In this way, the main CPU 93 constitutes the mode transition means.

<Loss reel action state transition lottery table>
The off-reel action state transition lottery table shown in FIG. 40 defines the transition probabilities for each mode of "normal", "chance", "great chance", "preparation for confirmation", and "confirmation".

The transition of each of these modes is performed with different transition probabilities for each type of internal winning combination (including "missing"). Here, in addition to "off", the internal winning type roles related to the transition of each mode are "rip / MB", "push order bell / CB in operation", "weak chee / watermelon / strong bell", and "strong cherry".・ There are "chance eyes" and "confirmation".

The internal winning combination included in the internal winning combination type of "Rip / MB" includes "MB", "Rip A without migration", "Rip B without migration", "SB Lip 1", "SB Lip 2", and " There are "RT2 lip 2nd", "RT2 lip 3rd", "question 7", "question 77" and "question tempai".

Further, as the internal winning combination included in the internal winning combination type of "pushing order bell / CB operating", there are "middle correct answer bell", "right 312 correct answer bell" and "right 321 correct answer bell". In addition, there are "strong bell", "watermelon" and "weak cherry" as the internal winning combination included in the internal winning combination type of "weak chee / watermelon / strong bell".

Further, as the internal winning combination included in the internal winning combination type of "strong cherry chance eye", there are "chance eye B", "chance eye C" and "strong cherry". Further, as the internal winning combination included in the internal winning combination type of "confirmed", there are "medium chelip", "confirmed bell" and "chance eye A".

For example, in the "normal" mode, in the case of "off" where there is no internal winning combination, most of them are maintained in the "normal" mode with a probability of "120/128", while the internal winning combination type is "weak". In the case of "Che / Watermelon / Strong Bell" or "Strong Cherry / Chance Eye", the mode shifts to "Chance" or higher.

Further, in the "fixed preparation" mode, the mode is shifted to or maintained in the "fixed preparation" or higher mode regardless of whether it is "off" or each of the above-mentioned internal winning combination types. Further, in the "confirmed" mode, the mode is maintained in the "confirmed" mode except for the "off" mode. If the internal winning combination type is "confirmed", the mode shifts to the "confirmed" mode in each mode except "prepared for confirmation".

In this way, the main CPU 93 refers to the out-of-reel action state transition lottery table, and draws whether or not to shift the mode from the current mode to a mode in which it is highly probable that the lock will be performed in the next game. The mode promotion lottery means for performing the above and the mode demotion lottery means for performing the lottery as to whether or not to shift the mode from the current mode to the mode in which the probability that the lock is determined to be performed in the next game is low are configured.

<Special counter addition lottery table>
The special counter addition lottery table shown in FIG. 41 is a table that is referred to when deciding whether or not to add the value of the special counter, triggered by the internal winning of the MB. The lottery values of "hit" and "miss" in the special counter addition lottery table are both "64". Therefore, the winning probabilities of "hit" and "miss" are both "64/128".

Here, in the case of "hit", the value of the special counter is added, and in the case of "missing", the value of the special counter is not added and the lottery based on the release lottery table shown in FIG. 43 is performed.

As described above, the main CPU 93 constitutes a special game addition determining means for determining whether or not to add to the special counter by referring to the special counter addition lottery table in the special counter processing (see FIG. 89) described later. The special counter addition lottery table is not limited to the one shown in FIG. 41, and may be replaced with the one shown in FIG. 42.

<Release lottery table>
The release lottery table shown in FIG. 43 is a table that is referred to when the release lottery according to the value of the special counter is performed when the “missing” is won as a result of referring to the above-mentioned special counter addition lottery table.

The release lottery table has a different winning probability of "hit" based on the RT game state and the value of the special counter. For example, when the values of the special counters are "1" and "2" in the "RT1 game state", the winning probability of "hit" is "0/65536", and there is no winning of "hit". In the release lottery table, the notation of "counter 1" indicates that the value of the special counter is "1". The same applies to "counter 2" and later.

In addition, when the value of the special counter is "3" or more in the "RT1 game state", the winning probability of "28/65536" is won. Further, even in the "RT3 gaming state" to the "RT5 gaming state", it is the same as the "RT1 gaming state".

In this way, whether or not the main CPU 93 adds to the number of ART games performed by the sub CPU 102 based on the value of the special counter by referring to the release lottery table in the special counter processing (see FIG. 89) described later. It constitutes a special game release lottery means for determining whether or not.

In the present embodiment, regardless of whether the RT game state is "RT1 game state" or "RT3 game state" to "RT5 game state", "hit" is performed only when the value of the special counter is "3" or more. A release lottery table is specified to win the prize. The release lottery table is not limited to the one shown in FIG. 43, and as shown in FIG. 44, the winning probability may be replaced with one that increases as the value of the special counter increases.

[Configuration of storage area allocated to main RAM]
45 to 52 show various storage areas allocated to the main RAM 95.

<Internal winning combination storage area>
The internal winning combination storage area shown in FIG. 45 is composed of 22 storage areas of the internal winning combination storage areas 1 to 22. In the internal winning combination storage areas 1 to 22, data (bits) corresponding to the combination associated with the internal winning combination are set to 1 in the flag-based combination table shown in FIGS. 18 and 19, and other data are set. It is reset to 0.

<Display combination storage area>
The display combination storage area shown in FIG. 46 represents a combination that can be displayed along the effective line after each reel of the reels 3L, 3C, and 3R is stopped. That is, the display combination storage area represents the winning internal winning combination after all of the reels 3L, 3C, and 3R are stopped. The display combination storage area is used by the main CPU 93 to identify the combination displayed along the effective line after all of the reels 3L, 3C, and 3R are stopped. The display combination storage area has the same structure as the internal winning combination storage area.

<Design code storage area>
The symbol code storage area shown in FIG. 47 is allocated as many as the number of effective lines, and data that can be displayed along each effective line is set to 1 in each symbol code storage area, and the reels 3L, 3C, and 3R Depending on the stop position, the data corresponding to the combination that cannot be displayed along the effective line is reset to 0. Further, in the upper 4 bits of the symbol code storage area 1, the symbol code recently stopped in the corresponding valid line is stored.

<Carryover storage area>
The carry-over combination storage area shown in FIG. 48 stores data related to the carry-over combination. For example, the bit 0 of the carry-over combination storage area is set to "1" on condition that the main game state is changed to the carry-over state of MB, and the corresponding bit is reset to "0" on condition that the MB is activated. Will be done.

<Game status flag storage area>
The game state flag storage area shown in FIG. 49 stores data related to the RT game state. For example, on condition that the RT game state is changed to the RT5 game state, bit 2 of the game state flag storage area is set to "1", and bits 3 to 7 are reset to "0".

Further, on condition that the RT game state is changed to the RT4 game state, the bit 3 of the game state flag storage area is set to "1", and the bits 2, 4 to 7 are reset to "0". Further, on condition that the RT game state is changed to the RT3 game state, the bit 4 of the game state flag storage area is set to "1", and the bits 2, 3, 5 to 7 are reset to "0".

Further, on condition that the RT game state is changed to the RT2 game state, the bit 5 of the game state flag storage area is set to "1", and the bits 2 to 4, 6 and 7 are reset to "0". Further, on condition that the RT game state is changed to the RT1 game state, the bit 6 of the game state flag storage area is set to "1", and the bits 2 to 5 and 7 are reset to "0". Further, on condition that the RT game state is changed to the RT0 game state, the bit 7 of the game state flag storage area is set to "1", and the bits 2 to 6 are reset to "0".

<Operation stop button storage area>
The operation stop button storage area shown in FIG. 50 stores the states of the stop buttons 17L, 17C, and 17R. Bit 0 corresponds to the stop button 17L, and when the stop button 17L is operated, "1" is stored in bit 0.

Similarly, bit 1 corresponds to the stop button 17C, and when the stop button 17C is operated, "1" is stored in bit 1. Further, the bit 2 corresponds to the stop button 17R, and when the stop button 17R is operated, "1" is stored in the bit 2.

Bit 4 corresponds to the stop button 17L, and when the stop button 17L is valid, "1" is stored in bit 4. Bit 5 corresponds to the stop button 17C, and when the stop button 17C is valid, "1" is stored in bit 5. Further, the bit 6 corresponds to the stop button 17R, and when the stop button 17R is valid, "1" is stored in the bit 6.

In the present embodiment, the effective stop button refers to the stop buttons 17L, 17C, 17R corresponding to the rotating reels 3L, 3C, 3R and capable of detecting the stop operation by the main CPU 93.

<Press order storage area>
The pressing order storage area shown in FIG. 51 is an area for storing information indicating the pressing order of the three stop buttons 17L, 17C, and 17R. Bit 0 corresponds to the pressing order "left → middle → right", and when the pressing order is "left → middle → right", "1" is stored in bit 0, and the other bits are set to "0". It will be reset.

Similarly, bit 1 corresponds to the pressing order of "left → right → middle", bit 2 corresponds to the pressing order of "middle → left → right", and bit 3 corresponds to the pressing order of "middle → right → left". The pressing order of bit 4 corresponds to "right-> left-> middle", and the pressing order of bit 5 corresponds to "right-> middle-> left".

<Retract priority data storage area>
The pull-in priority data storage area shown in FIG. 52 includes a pull-in priority data storage area for the left reel, a pull-in priority data storage area for the middle reel, and a pull-in priority data storage area for the right reel. Since the contents of the pull-in priority data storage area for the middle reel and the pull-in priority data storage area for the right reel are the same as those of the pull-in priority data storage area for the left reel, the pull-in priority for the left reel is described below. The data storage area will be described.

The pull-in priority data storage area for the left reel stores the pull-in priority data for each of the symbol position data. For example, among the attraction priority data of the attraction priority table shown in FIG. 33, any of the attraction priority data based on the states of the internal winning combination and the other reels 3C and 3R is stored for each symbol position.

[Data table referenced by sub CPU]
<Sub-judgment combination number table>
In addition to the internal winning combination, the sub CPU 102 is configured to perform various lottery by a sub-determining combination according to the internal winning combination and the lock number. In the present embodiment, sub-determining combination numbers of "0" to "17" are defined.

FIG. 53 shows the correspondence between the sub-determination combination number and the name. The sub CPU 102 identifies the sub-determining combination by the sub-determining combination number, but in the present embodiment, in order to make the invention easier to understand, the name of the sub-determining combination is used instead of the sub-determining combination number. explain.

As shown in FIG. 53, the sub-judgment roles are "loss", "MB", "rip", "rip special", "bell", "strong bell", "watermelon", "weak che", and "strong che". , "Strong Che + R1", "Medium Chelip", "Medium Chelip + BAR", "Chance Eye", "Strong Chance Eye", "Chance Eye + R1", "Chance Eye + R2", "Definite Role 1" and "Confirmed" There is a role 2 ".

<Sub-judgment combination identification table>
The sub-determining combination identification table shown in FIG. 54 represents the sub-determining combination associated with the internal winning combination and the lock number. For example, when the internal winning combination is "weak cherry" and the lock number is "0", "1" or "6" to "10", the sub-judgment combination is "weak che" and the lock number. When is "2" or "5", it becomes "fixed combination 1".

<Lottery table with additional games>
The game number addition lottery table shown in FIG. 55 is referred to when the number of games to be added to the ART is drawn, and the lottery value of the number of games to be added to the ART is associated with the sub-determining combination.

In the present embodiment, for example, when the sub-judgment combination is "weak che", "0 game" is won with a probability of "31968/32768", and "10 game" is won with a probability of "100/32768". Winning, "20 games" will win with a probability of "200/32768", and "30 games" will win with a probability of "500/32768".

<Additional selection dividend table>
The additional selection payout table shown in FIG. 56 shows a list of tables used at the time of additional selection. Each table is associated with the number of games for each element to which IDs "1" to "15" are assigned by an additional selective payout table.

For example, in the table 12, each element of "ID1" to "ID13" is associated with "10 games", the element of "ID14" is associated with "100 games", and the element of "ID15". Is associated with "300 games".

Each element is randomly arranged and displayed on the liquid crystal display device 11 by the sub CPU 102 so that the number of associated games cannot be identified at the time of addition selection. Here, the element associated with "0 game" indicates that it is not displayed on the liquid crystal display device 11 at the time of addition selection. For example, in the "table 17", the five elements "ID1" to "ID5" are displayed on the liquid crystal display device 11. The element associated with "0 game" is displayed on the liquid crystal display device 11 at the time of addition selection, but may not be selected.

<Additional selection lottery table at the first hit of ART>
In the additional selection lottery table at the time of the first hit of ART shown in FIG. 57, the lottery values are associated with the winning / non-winning of the additional selection at the time of the first hit of ART and the table used at the time of winning.

According to the additional selection lottery table at the time of the first hit of ART shown in FIG. 57, for example, the lottery result is non-winning with a probability of "22865/32768", "table 13" is won with a probability of "150/32768", and "100 / There is a probability of "32768" that "Table 14" will win.

<ART addition selection lottery table>
In the ART additional selection lottery table shown in FIGS. 58 and 59, the winning / non-winning of the additional selection and the lottery value of the table used at the time of winning are associated with each other for the sub-judgment combination during ART. There is.

According to the ART addition selection lottery table shown in FIGS. 58 and 59, for example, when the sub-judgment combination is "strong che", the lottery result becomes non-winning with a probability of "21913/32768", and "3500/32768" There is a probability that "Table 1" will win, and there is a probability of "1000/32768" that "Table 2" will win.

<Normal addition selection lottery table>
In the normal additional selection lottery table shown in FIGS. 60 and 61, the lottery values of the winning / non-winning of the additional selection and the table used at the time of winning correspond to the sub-judgment combination in the normal time not during ART. It is attached.

According to the normal addition selection lottery table shown in FIGS. 60 and 61, for example, when the sub-judgment combination is "weak che", the lottery result becomes non-winning with a probability of "31092/32768", and "1600/32768" There is a probability that "Table 1" will win, and there is a probability of "70/32768" that "Table 2" will win.

<Special function activation lottery table>
In the special function activation lottery table shown in FIG. 62, the special function is activated / not activated and when the special function is activated for the sub-judgment combination that is won while the peeping activation flag is "Peeping is in operation" at the time of the additional selection winning. The lottery value is associated with the type of special function of.

Here, the special function includes a function called "crushing" that is displayed so that the number of games associated with at least one element among the elements displayed on the liquid crystal display device 11 can be identified at the time of addition selection, and a liquid crystal display. It includes a function called "peeping" in which a plurality of elements are displayed so that the number of games associated with the elements displayed on the display device 11 can be identified.

According to the special function activation lottery table shown in FIG. 62, for example, when the sub-judgment role is "bell", "peeping" is won with a probability of "327/32768", and the sub-judgment role is "strong bell". In that case, "crushing" wins with a probability of "8192/32768".

<Crushed number lottery table>
The crushing number lottery table shown in FIG. 63 is referred to when "crushing" is activated as a special function, and the number of elements whose number of games can be identified is associated with the number of elements displayed on the liquid crystal display device 11. ing.

According to the crushed number lottery table shown in FIG. 63, for example, when the number of elements displayed on the liquid crystal display device 11 is 5, that is, when a table having 10 elements associated with "0 game" is won. Is displayed so that the number of games associated with one element can be identified with a probability of "20768/32768", and the number of games associated with two elements can be identified with a probability of "8000/32768". Is displayed so that the number of games associated with the three elements can be identified with a probability of "4000/32768".

<Additional selection continuation rate lottery table>
The additional selection continuation rate lottery table shown in FIGS. 64 and 65 is the additional selection lottery table at the time of the first hit of ART shown in FIG. 57, the ART additional selection selection lottery table shown in FIGS. 58 and 59, or the ART additional selection lottery table shown in FIGS. 60 and 61. The lottery value of the continuation rate of the additional selection is associated with the table (hereinafter, simply referred to as "base table") that is won based on the normal additional selection lottery table shown in.

According to the additional selection continuation rate lottery table shown in FIGS. 64 and 65, for example, when the base table is "table 11", the probability of "24903/32768" is that "continuation rate 1%" is won, and "6000 / The probability of "32768" is "33% continuation rate", the probability of "1500/32768" is "50% continuation rate", and the probability of "300/32768" is "66% continuation rate". , The probability of "60/32768" is "80% continuation rate", and the probability of "5/32768" is "90% continuation rate".

<Additional selection continuation state lottery table>
In the additional selection continuation state lottery table shown in FIG. 66, the continuation / non-continuation of the additional selection is made to the sub-judgment combination for each continuation rate determined based on the additional selection continuation rate lottery table shown in FIGS. 64 and 65. And the lottery value with the continuation state at the time of continuation are associated with each other.

According to the additional selection continuation state lottery table shown in FIG. 66, for example, in the case of "continuation rate 90%" and the sub-judgment combination is "bell", the lottery result is discontinued with a probability of "3467/32768". "Continued A" wins with the probability of "16100/32768", "Continued B" wins with the probability of "300/32768", "Continued D" wins with the probability of "12600/32768", and "300" There is a probability of "/ 32768" that "continuation E" will be won, and a probability of "1/32768" that "continuation F" will be won.

<Additional selection dividend lottery table>
The additional selection dividend lottery table shown in FIG. 67 includes a continuation / discontinuation of the additional selection and a table used at the time of continuation with respect to the base table for each continuation state, that is, “continuation A” or “continuation F”. The lottery values of are associated with each other. In FIG. 67, only the additional selective dividend lottery table of "continuation A" is shown, and the additional selective payout lottery table of the other continuous state is not shown.

According to the additional selective dividend lottery table shown in FIG. 67, for example, in the case of "continuation A", when the base table is "1", "table 1" is won with a probability of "20000/32768" and "5000/32768" is won. "Table 2" wins with a probability of "2000/32768", "Table 3" wins with a probability of "2000/32768", "Table 10" wins with a probability of "543/32768", and "150/32768" There is a chance that "Table 11" will win.

<Additional game lottery table>
In the additional game lottery table shown in FIG. 68, the winning / non-winning lottery value of the stock of the additional game is associated with the sub-determining combination during the additional game. According to the additional game lottery table shown in FIG. 68, for example, when the sub-judgment combination is "weak che", the additional game stock is not won with a probability of "32605/32768", and the probability of "163/32768" is high. Win the stock of additional games.

<ART direct hit lottery table>
The ART direct hit lottery table shown in FIG. 69 is referred to when ART is in progress or ART is not being prepared, and the lottery value of ART loss / hit is associated with each set value for each set value.

According to the ART direct hit lottery table shown in FIG. 69, for example, when the sub-judgment combination in "setting 6" is "strong check", there is a probability of "32640/32768" that the ART is "missing", "128 /". There is a probability of "32768" to hit ART.

<A lottery table with ART added games directly aligned>
In the lottery table in which the ART additional game is directly aligned as shown in FIG. 70, the winning / non-winning lottery values of the stock of the additional game are defined respectively. With the ART additional game direct alignment lottery table shown in FIG. 70, the additional game stock is not won with a probability of "30068/32768", and the additional game stock is won with a probability of "2700/32768".

<Step-up sequence table>
The step-up sequence table shown in FIG. 71 is referred to by the sub CPU 102 when it is determined that the main CPU 93 locks the table and the step-up effect is determined as the effect content in the sub CPU 102. In the step-up sequence table, the lock number is associated with a sequence of effect data including the liquid crystal effect number and the shutter operation data. The remarks column in FIG. 71 is provided for convenience of explanation and is not included in the step-up sequence table.

In the step-up sequence table shown in FIG. 71, the liquid crystal effect represents each type of liquid crystal effect performed by the liquid crystal display device 11. In the present embodiment, as the liquid crystal production, there are each production of "Production 1" to "Production 6", and the production contents are different from each other.

Further, the shutter operation data represents each type of the shutter operation sequence table described later. In the present embodiment, the shutter operation data includes shutter operation data specified by "Y1" to "Y8", and these shutter operation data Y1 to Y8 are stored in the shutter operation sequence table of FIGS. 72 to 79 described later. It corresponds. In the step-up sequence table, shutter operation data corresponding to the lock number is assigned at a predetermined timing.

Here, the shutter operation data Y1 is an operation of lowering the shutter members 201, 202, 203, 204 at the exposed position (position shown in FIG. 8) to the shielding position (position shown in FIG. 9) (elevation 0% → elevation 100). %), That is, the data corresponding to the shutter operation sequence table (see FIG. 72) for performing the shutter closing operation.

Further, the shutter operation data Y2 is a shutter operation sequence table (FIG. 73) for performing an operation (vibration at a 100% up / down position) of the shutter members 201, 202, 203, 204 at a shielding position (position shown in FIG. 9). It is the data corresponding to (see).

Further, the shutter operation data Y3 is an operation of raising the shutter members 201, 202, 203, 204 at the shielding position (position shown in FIG. 9) to the exposed position (position shown in FIG. 8) (elevation 100% → elevation 0%). ), That is, the data corresponding to the shutter operation sequence table (see FIG. 74) for performing the operation of opening the shutter.

Further, the shutter operation data Y4 is a shutter operation sequence table (FIG. 75) for vibrating the shutter members 201, 202, 203, 204 at the exposed position (position shown in FIG. 8) (vibration at the 0% position of raising / lowering). It is the data corresponding to (see).

Further, the shutter operation data Y5 is a shutter operation sequence for performing an operation (rotation 0% → rotation 50%) of rotating the shutter members 201, 202, 203, 204 at the shielding position (position shown in FIG. 9) by 90 °. It is the data corresponding to the table (see FIG. 76).

Further, the shutter operation data Y6 performs an operation (vibration at the rotation 50% position) of vibrating the shutter members 201, 202, 203, 204 in the half-open state (rotation 50%) at the exposed position (position shown in FIG. 8). This is data corresponding to the shutter operation sequence table (see FIG. 77) for the purpose.

Further, in the shutter operation data Y7, the shutter members 201, 202, 203, and 204 in the half-open state (rotation 50%) or the inverted state (rotation 100%) at the shielding position (position shown in FIG. 9) are before being inverted. It is data corresponding to the shutter operation sequence table (see FIG. 78) for performing the operation (rotation 50% or rotation 100% → rotation 0%) for returning to the state (rotation 0%).

Further, in the shutter operation data Y8, the shutter members 201, 202, 203, and 204 in the state before inversion (rotation 0%) or the half-open state (rotation 50%) at the shielding position (position shown in FIG. 9) are inverted. This is data corresponding to a shutter operation sequence table (see FIG. 78) for performing an operation (rotation 0% or rotation 50% → rotation 100%) of rotating to a state (rotation 100%).

Further, the LED is an LED that lights a pair of eyes 701 formed on the upper exterior member 7a (simply referred to as “eyes” in FIG. 71), and light irradiation that irradiates the shutter members 201, 202, 203, 204 with light. The light emission patterns and lighting patterns of the LEDs 401, 402, 403, 404 (simply referred to as “shutter” in FIG. 71) of the device 400 are shown.

For example, the light emission pattern of the "eye" may be lit in any of the colors "white", "blue", "red", and "rainbow", and may be extinguished. Further, the lighting pattern of the "shutter" includes lighting and extinguishing.

Further, in the count, the time required for the sub CPU 102 to receive the no-operation command from the main CPU 93 (in the present embodiment, "about 17 ms") is set as one count, and various operations (for example, liquid crystal effect) are performed at what count. , Shutter operation, operation related to LED) is specified, and the value of the step counter is shown.

The sub CPU 102 executes or terminates the above-mentioned various operations on condition that the value of the non-operation command reception counter, which is added by "1" each time a non-operation command is received, becomes equal to or more than the value of the step counter.

For example, when the lock number 1 is determined, the sub CPU 102 determines the liquid crystal effect related to "effect 1" and the shutter operation related to the shutter operation data Y4 until the value of the non-operation command reception counter becomes "124". The operation of making the "eyes" emit white light and lighting the "shutter" is performed. The "time (ms)" described in the remarks is an approximate duration (= about 17 ms × 124 counts) of these operations.

Further, the trigger is defined as "0", "1", and "2" in the present embodiment. When the trigger is "0", "none", and "1", when "pressing the MAX bet button 14" is received as the non-operation command input information, the value of the non-operation command reception counter is specified in the step counter. It stipulates that the step-up sequence table is updated even if it is not more than the value, that is, the next operation is started.

Further, "2" changes the step-up sequence table to the set position of the trigger "1" when the value of the non-operation command reception counter becomes equal to or more than the specified step counter value (loop to the trigger "1"). It stipulates what to do. The end of the loop to the trigger "1" depends on the program executed by the sub CPU 102.

<Shutter operation sequence table>
In each shutter operation sequence table of FIGS. 72 to 79, the motors (left and right elevating motors 240A and 240B for raising and lowering the shutter, rotary motors 231 for rotating the shutter) have the specified pulse width and number of pulses in the order of the step numbers. The motor control direction is specified.

In FIGS. 72 to 79, "elevation left" indicates the motor control direction of the elevating motor 240A, "elevation right" indicates the motor control direction of the elevating motor 240B, and "rotation" indicates the motor control of the rotary motor 231. It shows the direction.

Here, the pulse width in each shutter operation sequence table represents the time on one side of the ON or OFF waveform, and the duty ratio of the pulse in this embodiment is 1: 1. Therefore, “1 pulse” in each shutter operation sequence table is the pulse width × 2 (ms).

For example, in a certain step, when the pulse width is 5 ms and the number of pulses is defined as 5, the processing time of the step is 5 ms × 2 × 5 = 50 ms. However, when the motor is held, which will be described later, only the OFF waveform is displayed, so the specified pulse width is one pulse.

Further, "Non" in the column of the motor control direction indicates that the data is not registered. Therefore, the motor described as "Non" in the motor control direction column is a motor that is not subject to control. Note that "Non" in the motor control direction column is a notation for convenience, and a value of 0xffff ("0x" is a hexadecimal identification code) or -1 is defined as "Non".

Further, "H" in the column of the motor control direction indicates that the motor is held without excitation. For example, when the pulse width is 20 ms and the number of pulses is 1, it indicates that the motor is held for 20 ms without excitation. Note that "H" in the motor control direction column is a notation for convenience, and the value of 0x8fff ("0x" is a hexadecimal identification code) is defined as "H".

Since the left and right lifting motors 240 for raising and lowering the shutter are excited in opposite phases due to their mounting directions, they are driven by a combination of "+-" and "-+" in the same step.

FIG. 72 shows a shutter operation sequence table corresponding to the shutter operation data Y1. As shown in FIG. 72, the shutter operation sequence table corresponding to the shutter operation data Y1 defines an operation sequence for closing the shutter.

Here, in step number "3", on condition that the lowering sensor 271 (see FIG. 6) detects that the shutter has been lowered in the special condition column, the process proceeds to the step of step number "4", which is special. (Processes corresponding to S426, S427, and S431 to S433 in FIG. 106) are intervened. The special processing in the column of special conditions is the same in FIGS. 74, 78, 79 and 81, which will be described later.

The number of pulses "300" specified here is the maximum number of times the motor is excited in one step, which is specified for motor protection. Therefore, if the lowering sensor 271 (see FIG. 6) does not detect that the shutter is lowered even if the number of pulses exceeds "300", it is treated as if an abnormality has occurred in the lifting motor 240A or 240B. It has become. Specifically, the movement of the shutter members 201, 202, 203, and 204 is stopped until the next power failure recovery (once the power of the pachi-slot machine 1 is turned off and then the power is turned on).

FIG. 73 shows a shutter operation sequence table corresponding to the shutter operation data Y2. As shown in FIG. 73, the shutter operation sequence table corresponding to the shutter operation data Y2 defines an operation sequence in which the shutter is vibrated at the 100% up / down position.

By executing the operation sequence shown in FIG. 73, vibration (blind vibration) occurs with the shutter closed. At this time, the shutter is not even in the half-open state (blind closed).

FIG. 74 shows a shutter operation sequence table corresponding to the shutter operation data Y3. As shown in FIG. 74, the shutter operation sequence table corresponding to the shutter operation data Y3 defines an operation sequence for opening the shutter.

Here, in step number "2", the process proceeds to the step of step number "3" on condition that the origin sensor 270 (see FIG. 6) detects that the shutter is at the origin.

In this operation sequence as well, as in the operation sequence shown in FIG. 72, if the origin sensor 270 (see FIG. 6) does not detect that the shutter is at the origin even if the number of pulses exceeds "300", the elevating motor It is treated as if an abnormality has occurred in 240A or 240B. Specifically, the movement of the shutter members 201, 202, 203, and 204 is stopped until the next power failure recovery (once the power of the pachi-slot machine 1 is turned off and then the power is turned on).

FIG. 75 shows a shutter operation sequence table corresponding to the shutter operation data Y4. As shown in FIG. 75, the shutter operation sequence table corresponding to the shutter operation data Y4 defines an operation sequence in which the shutter is vibrated at the 0% up / down position.

By executing the operation sequence shown in FIG. 75, vibration (elevation vibration) occurs in a state where the shutter is opened.

FIG. 76 shows a shutter operation sequence table corresponding to the shutter operation data Y5. As shown in FIG. 76, the shutter operation sequence table corresponding to the shutter operation data Y5 defines an operation sequence in which a shutter that is neither inverted nor half-open is rotated by 90 ° (rotation 0% → rotation 50%), which will be described later. This is also the data corresponding to the start of peeping when "with peeping" is set in the peeping activation flag in step S922 (see FIG. 144) of the first additional selection selecting lottery process.

By executing the operation sequence shown in FIG. 76, the shutter is opened in a half-open state (blind open) in a closed state.

FIG. 77 shows a shutter operation sequence table corresponding to the shutter operation data Y6. As shown in FIG. 77, the shutter operation sequence table corresponding to the shutter operation data Y6 defines an operation sequence in which the shutter is vibrated in a half-open state (rotation 50%).

By executing the operation sequence shown in FIG. 77, the shutter is closed and vibrates (blind vibration) in a half-open state.

FIG. 78 shows a shutter operation sequence table corresponding to the shutter operation data Y7. As shown in FIG. 78, the shutter operation sequence table corresponding to the shutter operation data Y7 shows the shutter in the half-open state (rotation 50%) or the inverted state (rotation 100%) before the inversion (rotation 0%). The operation sequence for returning to is specified, and when "with peeping" is set in the peeping activation flag in step S922 (see FIG. 144) of the first addition selected lottery process described later, the peeping state is changed. It is the data to end.

Here, in step number "2", the process proceeds to step number "3" on condition that the rotation sensor 272 (see FIG. 6) detects that the shutter is at the rotation origin. In this operation sequence as well, as in the operation sequence shown in FIG. 72, if the rotation sensor 272 (see FIG. 6) does not detect that the shutter is at the rotation origin even if the number of pulses exceeds "300", the rotation is performed. It is treated as if an abnormality has occurred in the motor 231. Specifically, the movement of the rotating mechanism 230 is stopped until the next power failure recovery (once the power of the pachislot machine 1 is turned off and then the power is turned on).

FIG. 79 shows a shutter operation sequence table corresponding to the shutter operation data Y8. As shown in FIG. 79, the shutter operation sequence table corresponding to the shutter operation data Y8 is an operation sequence in which the shutter in the state before inversion (rotation 0%) or the half-open state (rotation 50%) is inverted (rotation 100%). Is stipulated.

Here, in step number "2", the process proceeds to the step of step number "3" on condition that the rotation sensor 272 (see FIG. 6) detects that the shutter is in the inverted state. ..

In this operation sequence as well, as in the operation sequence shown in FIG. 72, if the rotation sensor 272 (see FIG. 6) does not detect that the shutter is in the inverted state even if the number of pulses exceeds "300", It is treated as if an abnormality has occurred in the rotary motor 231. Specifically, the movement of the rotating mechanism 230 is stopped until the next power failure recovery (once the power of the pachislot machine 1 is turned off and then the power is turned on).

<Shutter operation combination judgment table>
The shutter operation combination determination table shown in FIG. 80 is a table for reconstructing the shutter operation sequence for the purpose of protecting the shutter operation based on the shutter operation executed last time and the shutter operation executed this time. The shutter operation combination determination table corresponds to an accessory operation consistency table for ensuring the consistency of shutter operations. Further, the shutter operation combination determination table is configured to be able to register a plurality of shutter operation effects (feature effects) based on the determination result of the consistency of the shutter operations.

If the shutters are operated in the wrong combination of motion sequences, unintended actions may be performed and the shutters may become stuck. For example, if the shutter is raised while the shutter is inverted, the elevating unit 206 and the like may be damaged, the elevating motor 240 may be seized, or the elevating motor 240 may be deteriorated.

In the present embodiment, when the combination of operations is a combination of (wrong) operation sequences that hinder the operation of the shutter device 200, the operation sequences are reconstructed using the shutter operation combination determination table. , A reasonable operation can be imposed on the shutter, and the above-mentioned problems can be prevented.

FIG. 81 illustrates a combination of operation sequences stored in the shutter operation sequence storage area when the previous shutter operation data is “Y6” and the current shutter operation is a combination of “Y4”.

When the previous shutter operation data was "Y6" and the shutter operation was "Y4" this time, the shutter was vibrated at the 50% up / down position and then at the 0% up / down position. It cannot be executed with the combination of the operation sequences.

Therefore, when the previous shutter operation data is "Y6" and the shutter operation is a combination of "Y4" this time, the operation sequence of the shutter operation data Y7, Y3, Y4 is in order based on the shutter operation combination determination table shown in FIG. The combination of is reconstructed.

As shown in FIG. 81, the combination of the operation sequences reconstructed in this way is stored in the shutter operation sequence storage area. The shutter operation sequence storage area is allocated to the sub RAM 104.

Here, the sub CPU 102 constitutes an effect executing means for executing the effect step by step according to the operation sequence stored in the shutter operation sequence storage area. Further, when the lock effect is executed, the sub CPU 102 executes each step of the effect based on the cycle of receiving the non-operation command. The sub CPU 102 executes the effect operation by the shutter based on the execution of each step of the effect.

<Internal winning combination table for penalty judgment>
The penalty determination internal winning combination group table shown in FIG. 82 represents a group of internal winning combination referred to when the penalty is set by the sub CPU 102. The penalty means setting a state that is disadvantageous to the player (for example, the ART is not drawn). In this way, the sub CPU 102 configures the disadvantageous state setting means for setting the penalty by referring to the internal winning combination group table for penalty determination in the penalty setting process (see FIG. 120) described later.

In the internal winning combination group table for determining the penalty, the first winning combination group to the fourth winning combination group are defined as the internal winning combination group. The first winning combination is the internal winning combination of "off", "MB", "no transition lip 1", "no migration lip 2", "SB lip 1", "SB lip 2" and "SB tempai". It is composed of.

The second winning combination group is "RT2 Lip 2nd", "RT2 Lip 3rd", "RT2K Lip 1st", "RT3 Lip 2nd", "RT3 Lip 3rd", "Medium Correct Answer Bell", "Right 312 Correct Answer Bell" and It is composed of each internal winning combination of "Right 321 Correct Answer Bell".

The third winning combination group is "Out of place", "MB", "Rip 1 without transition", "Rip 2 without transition", "SB Lip 1", "SB Lip 2", "SB Tempai", "RT2 Lip 2nd". , "RT2 Lip 3rd", "RT2K Lip 1st", "RT3 Lip 2nd", "RT3 Lip 3rd", "Medium Correct Answer Bell", "Right 312 Correct Answer Bell" and "Right 321 Correct Answer Bell" It is composed of.

The fourth winning combination group is composed of internal winning combinations of "middle correct answer bell", "right 312 correct answer bell", and "right 321 correct answer bell".

<Error management area allocation table>
The error management area allocation table shown in FIG. 83 is referred to when the sub CPU 102 identifies the type of error that occurred when the main CPU 93 or the sub CPU 102 detects an error in the pachislot machine 1. The sub CPU 102 identifies the type of error generated by referring to the error management area allocation table, and stores the specified error in the error management area of the sub RAM 104.

In the error management area allocation table, the source of the error and the type of the error are associated with each other. Sources of errors include "main", "sub", "main-sub", "sound", "lamp", and "shutter".

Here, various errors related to the main control board 41 (main CPU 93) and various devices (hopper device, medal auxiliary storage, selector, reel) connected to the main control board 41 are assigned to the "main".

For example, "DO" indicates a door open error that occurs when the front door 2b (see FIG. 2) is open, and "EE" indicates that each reel has stopped due to a combination of symbols that does not hold from the internal winning combination. Indicates an illegal hit error that occurs in.

Further, "HJ" indicates a hopper jam error that occurs when medals are jammed in the hopper device 43 (see FIG. 3), and "HE" occurs when the hopper device 43 fails to pay out medals. Indicates a hopper empty error.

Further, "CR" indicates a reverse medal error that occurs when the medal sensors 46 (see FIG. 3) on the upstream side and the downstream side in the selector detect medals in the reverse order, and "CO" indicates a medal retrograde error. It shows a medal full error that occurs when the auxiliary storage switch 57 (see FIG. 3) is electrically conducted via the medal.

Further, "CJ" indicates a inserted medal passage check error that occurs when the medal sensor 46 does not normally detect the medal, and "CE" indicates the medal sensor 46 detects the medal for a certain period of time or longer. It shows the insertion medal passing time error that occurs in the case.

Further, various errors related to various devices mounted on the sub control board 42 are assigned to the "sub". For example, "GPU abnormality" is a high heat detection error that occurs when the detection temperature of a thermo sensor (not shown) attached to the rendering processor (VDP, GPU, etc.) 105 exceeds a predetermined temperature (for example, 100 ° C.). Shown.

Further, "power failure" indicates a power failure detection error that occurs when the sub CPU 102 (see FIG. 5) is started without normally performing the power failure detection process, and "backup" indicates a power failure recovery. Indicates a backup error that occurs when there is an error in the thumb value of the backup area of the sub RAM 104.

Further, various errors related to command data (serial communication) transmitted from the main CPU 93 to the sub CPU 102 are assigned to "between main and sub". For example, "sequence" indicates a command sequence error that occurs when valid commands cannot be received in the specified order.

In addition, "sum" is a command sum error that occurs when the sum calculation result of the received command data excluding the sum value of the received command data (also referred to as "SUM data") and the sum value of the received command data are different. The "command" corresponds to various commands (for example, start command, reel stop command, no operation command, etc.) transmitted by the main CPU 93, and the reception commands are "01H" to "10H" (01H and 10H "". "H" means a hexadecimal number, and for example, 10H indicates a command error that occurs in a case other than "16" in a decimal number). In the present embodiment, the calculation of the sum value is obtained by addition, but the calculation is not limited to this, and may be calculated by subtraction or exclusive OR.

Further, "reception abnormality" is caused by a main-sub reception error that occurs when there is a physical layer error in the data received from the main CPU 93 (parity, fleming, overrun) and communication between the sub CPU and the sound IC. It includes a sound IC-to-IC reception error that occurs when there is an abnormality, and an LED-to-LED board reception error that occurs when there is an abnormality in communication between the sub CPU and the LED board.

Further, "no communication" and "reception abnormality" are assigned to "sound" as various errors related to various devices (sound IC, amplifier) mounted on the sound I / O board 71 (see FIG. 3). There is.

Further, "no communication" and "reception abnormality" are assigned to the "lamp" as various errors related to the device (I2C communication IC) mounted on the LED board 72 (see FIG. 3).

Further, various errors related to various sensors (origin sensor 270, lowering sensor 271 and rotation sensor 272) connected to the shutter control board 78 (see FIG. 3) are assigned to the "shutter".

For example, "rotation" means that when the shutter is rotated according to the operation sequence shown in the shutter operation data Y7 and Y8, the shutter is at the rotation origin by the rotation sensor 272 (see FIG. 6) even if the number of pulses exceeds "300". , Or an abnormality in the operation of the rotary motor 231 that occurs when it is not detected that the shutter is in the inverted state.

Further, "right (bottom)" detects that the shutter is lowered by the lowering sensor 271 (see FIG. 6) even if the number of pulses exceeds "300" when the shutter is closed according to the operation sequence shown in the shutter operation data Y1. It shows an abnormality in the operation of the elevating motors 240A and 240B that occur when the elevating motors 240A and 240B are not operated.

Further, "left (upper)" means that the shutter is at the origin by the origin sensor 270 (see FIG. 6) even if the number of pulses exceeds "300" when the shutter is opened according to the operation sequence shown in the shutter operation data Y3. It shows an abnormality in the operation of the elevating motors 240A and 240B that occur when it is not detected.

When at least one of the various error factors described above is set in the error management area of the sub RAM 104, the error screen is displayed on the liquid crystal display device 11 as in the display example shown in FIG. 166.

On the error screen, abbreviations (for example, "CE" to "DO" surrounded by a square in the middle of FIG. 166) are used to make it easier to understand the error that is occurring for the error detected by the main CPU 93. Is highlighted. As a result, it is possible to easily recognize from the outside which error is occurring.

[Main control processing]
The main CPU 93 of the main control board 41 executes various processes according to the flowcharts shown in FIGS. 84 to 100.

<Main control processing>
FIG. 84 is a flowchart showing the main control process. The main control process described below starts when the power is turned on to the pachi-slot machine 1.

First, when the power is turned on to the pachi-slot machine 1, the main CPU 93 executes the power-on processing shown in FIG. 85 (S10). In this power-on processing, it is determined whether the backup is normal, whether the setting has been changed appropriately, and the like, and the initialization processing is executed according to the determination result.

Next, the main CPU 93 executes the initialization process at the end of one game (one unit game) (S11). In this initialization process, for example, a storage area designated in advance to be initialized at the end of one game is initialized. By this initialization process, the data stored in the internal winning combination storage area, the display combination storage area, and the like of the main RAM 95 are cleared.

Next, the main CPU 93 executes the medal acceptance / start check process shown in FIG. 86 (S12). In this medal reception / start check process, a process of detecting a medal inserted by a player and a process of detecting a start operation are executed.

Next, the main CPU 93 extracts three random numbers (random values 1 to 3) and stores them in the random number storage area allocated to the main RAM 95 (S13). Here, the random number value 1 is a value used for the internal lottery process, and is extracted from 0 to 65535 in the present embodiment.

Further, the random number values 2 and 3 are values used for other lottery processing, and are extracted from 0 to 65535 and 0 to 255, respectively, in the present embodiment. It should be noted that the main CPU 93 does not have to always extract the random numbers 2 and 3 in step S13, and may extract the random numbers 2 and 3 only when they are used.

Next, the main CPU 93 executes the internal lottery process shown in FIG. 88 (S14). The main CPU 93 that executes the internal lottery process constitutes an internal winning combination determining means.

Next, the main CPU 93 executes the special counter processing shown in FIG. 89 (S15). In this special counter processing, the main CPU 93 determines by lottery whether or not to add the reference value of the number of games in the ART game state, that is, the number of games in the ART game state, and decides to add the number of games in the ART game state. In that case, the reference value of the addition number is determined.

Next, the main CPU 93 executes the reel stop initial setting process shown in FIG. 90 (S16). By this reel stop initial setting process, each information (for example, stop table number, etc.) regarding the reel stop control is stored in the corresponding area of the main RAM 95 based on the result of the internal lottery process (internal winning combination).

Next, the main CPU 93 generates start command data to be transmitted from the main control board 41 to the sub control board 42, and stores the generated start command data in the communication data storage area allocated to the main RAM 95 (S17).

The start command data represents, for example, the type of the game status flag, the type of the internal winning combination, the effect number for the effect, the special counter, and the like.

Next, the main CPU 93 executes the wait process (S18). In this wait process, it is determined whether or not a predetermined time has elapsed from the start of the previous game (the start of the previous unit game), and if it is determined that the predetermined time has not elapsed, the predetermined time has elapsed. Wait until the waiting time is exhausted. The predetermined time in this wait process, that is, the wait time is set to, for example, 4.1 seconds from the start of the previous unit game.

Next, the main CPU 93 executes a reel rotation start process for rotating all the reels 3L, 3C, and 3R according to the number of inserted medals (S19). Along with this reel rotation start processing, "0000111" is stored in the operation stop button storage area (see FIG. 50).

Further, the reel rotation start process is executed by the interrupt process shown in FIG. 97. This interrupt process is a process executed at a fixed cycle (1.1172 ms). By this interrupt processing, the drive of the stepping motors 51L, 51C, 51R is controlled, and the rotation of the reels 3L, 3C, 3R is started.

After that, the drive of the stepping motors 51L, 51C, 51R is controlled by this interrupt processing, and the rotations of the reels 3L, 3C, and 3R are accelerated until they reach a constant speed. Further, when the rotation of the reels 3L, 3C and 3R reaches a constant speed, the drive of the stepping motors 51L, 51C and 51R is controlled by this interrupt process so that the reels 3L, 3C and 3R rotate at a constant speed. Be maintained.

When the main CPU 93 executes a reel effect that irregularly drives at least one of the reels 3L, 3C, and 3R during the lock effect, the main CPU 93 executes the reel effect in the reel rotation start process.

In this way, the main CPU 93 executes the lock effect of the reels 3L, 3C, and 3R for a predetermined period on the condition that the specific condition in which the lock number "1" to "6" described later is selected is satisfied. Configure the lock execution means.

Next, the main CPU 93 generates reel rotation start command data to be transmitted from the main control board 41 to the sub control board 42, and stores the generated reel rotation start command data in the communication data storage area allocated to the main RAM 95 ( S20).

By receiving the reel rotation start command data, the sub-control board 42 can recognize the start of reel rotation, and can determine the timing and the like for executing various effects.

Next, the main CPU 93 executes the pull-in priority storage process (S21). In this attraction priority storage process, the attraction priority table selection process shown in FIG. 92 is executed, and the attraction priority of all the symbols of the rotating reels 3L, 3C, and 3R is determined. That is, in the attraction priority storage process, stop information is stored in the attraction priority data storage area shown in FIG. 52 for each symbol position of each rotating reel based on the internal winning combination.

For example, for each symbol of each reel 3L, 3C, 3R, when the corresponding symbol is stop permission, the attraction priority data is stored in the attraction priority data storage area based on the priority table, and the stop is not performed. In the case of permission (for example, when a winning combination that has not been won internally wins a prize), data indicating stop prohibition is stored in the attraction priority data storage area.

Next, the main CPU 93 executes the reel stop control process shown in FIG. 94 (S22). By this process, the stop control of the reels 3L, 3C and 3R is performed. Next, the main CPU 93 executes the winning search process (S23).

In this winning search process, all reels 3L, 3C, and 3R are stopped, and after the player releases the pressed state of the stop button corresponding to the last stopped reel, the winning line is displayed on the activated winning line. The symbol combination and the symbol combination table are collated to determine the symbol combination displayed on the winning line.

In addition, when the symbol combination displayed on the winning line is determined, the combination of the internal winning combination and the symbol is collated, and it is determined whether or not the symbol can be displayed on the winning line by the combination of the symbols corresponding to the internal winning combination. , When a symbol combination that does not correspond to the internal winning combination is displayed on the winning line, the main CPU 93 determines that it is an illegal hit error.

Then, when it is determined that an error has occurred, the main CPU 93 sets the generated error in the error storage area allocated to the main RAM 95, and notifies the sub CPU 102 that the error has occurred, so that the error command data Is stored in the communication data storage area allocated to the main RAM 95.

Specifically, the data stored in the symbol code storage area (see FIG. 47) and the data in the symbol combination table (see FIGS. 16 and 17) are collated, and the collation result is stored in the display combination storage area. To.

More specifically, the data in the symbol code storage area is copied as it is to the display combination storage area. At that time, the symbol combination table is referred to, and the number of payouts is obtained. By this winning search process, the combination of the symbols displayed on the display windows 4L, 4C, and 4R is specified because all the reels 3L, 3C, and 3R are stopped.

Next, the main CPU 93 executes an RT transition process that shifts the RT game state according to the symbol combination displayed on the winning line according to the transition shown in the RT game state transition transition diagram shown in FIG. (S24).

Next, the main CPU 93 executes the payout of the number of medals according to the displayed symbol combination based on the result of the winning search process (S25). Along with this medal payout process, the hopper device 43 is controlled and the number of credits is updated based on the payout number counter.

Further, in the medal payout process, the payout operation of the hopper device 43 is monitored when the payout of the hopper device 43 is executed. Specifically, when the main CPU 93 issues a payout control command to the hopper device 43 in units of one medal to be paid out, the payout medal detection sensor (not shown) in the hopper device 43 detects the payout medals. If it cannot be done, it is determined that there is no payout medal in the hopper device 43, and it is determined that the hopper empty error is detected, and the payout medal is detected, but the medal is detected for a certain period of time (for example, 500 ms). Judged as a hopper jam error.

Then, when it is determined that an error has occurred, the main CPU 93 sets the generated error in the error storage area allocated to the main RAM 95, and notifies the sub CPU 102 that the error has occurred, so that the error command data Is stored in the communication data storage area allocated to the main RAM 95.

Then, after the error command transmission process is executed, the game progresses until the cause of the error generated in the hopper device 43 is cleared (for example, in the case of a hopper empty error, the hopper device 43 is replenished with a payout medal). It will be interrupted (for example, the error code generated in the 7-segment display 48 is displayed, and the sub CPU 102 displays an error screen in which an error is occurring on the liquid crystal display device 11).

Further, when the cause of the error of the hopper device 43 is cleared, the error set in the error storage area of the main RAM 95 is cleared, and the error command data is mainly used to notify the sub CPU 102 that the error has been cleared. An error command transmission process stored in the communication data storage area allocated to the RAM 95 is executed (not shown). For the error command data, for example, the error release state set in the error storage area is stored in the communication data storage area, and the game is restarted.

Next, the main CPU 93 generates winning operation command data to be transmitted from the main control board 41 to the sub control board 42, and stores the generated winning operation command data in the communication data storage area allocated to the main RAM 95 (S26). .. The winning operation command data represents, for example, the type of display combination, the number of medals to be paid out, and the like.

Next, the main CPU 93 executes the bonus end check process shown in FIG. 95 (S27). By this bonus end check process, a process of terminating the operation of the CB or MB when the CB or MB end condition is satisfied is executed.

Next, the main CPU 93 executes the bonus operation check process shown in FIG. 96 (S28). By this bonus operation check process, the process of operating the CB or MB based on the combination of the symbols displayed by the reels 3L, 3C, and 3R is executed. The main CPU 93 executes the process of step S28 and then executes the process of step S11.

<Processing when power is turned on>
FIG. 85 is a flowchart showing a power-on processing executed in step S10 of the main control processing shown in FIG. 84.

First, the main CPU 93 determines whether or not the backup is normal (S30). In this determination process, whether or not the backup is normal is determined by error detection using the checksum value.

For example, the main CPU 93 stores the set value of the pachi-slot machine 1 and the checksum value calculated from the set value and the like as backup data in the main RAM 95 when the power is turned off, and the determination process (S30) when the power is turned on. In, the set value and the like and the checksum value stored in the main RAM 95 are read out.

Here, the main CPU 93 compares the checksum calculated from the read set value and the like with the backed up checksum, and if the comparison results match, it is determined that the backup is normal.

When the main CPU 93 determines that the backup is normal (YES), the main CPU 93 sets the backed up setting value and the like (S31). As a result, if the backup is normal, the set value before the power is turned off will be set.

After executing the process of step S31, or when it is determined in step S30 that the backup is not normal (NO), the main CPU 93 has the setting change switch provided in the cabinet 2a of the pachislot machine 1 turned on. Whether or not it is determined (S32). Here, if it is determined that the setting change switch is on (YES), the main CPU 93 executes the initialization process at the time of setting change (S33).

In the initialization process at the time of changing the setting, for example, the data stored in the internal winning combination storage area and the display combination storage area of the main RAM 95 are cleared, and the set value is cleared.

Next, the main CPU 93 generates initialization command data to be transmitted from the main control board 41 to the sub control board 42, and stores the generated initialization command data in the communication data storage area allocated to the main RAM 95 (S34). .. The initialization command data represents, for example, whether or not the set value has been changed, the set value, and the like.

Next, the main CPU 93 executes the set value change process (S35). In this set value change process, for example, the set value is selected from 1 to 6 according to the operation result of the reset switch, and the set value selected when the start lever 16 is operated is determined.

Next, the main CPU 93 determines whether or not the setting change switch is in the ON state (S36), and repeatedly executes the process of step S36 until a determination result that is not in the ON state is obtained.

Here, when a determination result that the setting change switch is not in the ON state is obtained (NO), the main CPU 93 generates and generates initialization command data to be transmitted from the main control board 41 to the sub control board 42. The initialization command data is stored in the communication data storage area allocated to the main RAM 95 (S37), and the power-on processing is completed.

In step S32, when it is determined that the setting change switch is not on (NO), the main CPU 93 determines whether or not the backup is normal (S38). Here, if it is determined that the backup is not normal (NO), the main CPU 93 executes power-on error processing (S39).

In the power-on error processing, the main CPU 93 indicates that the backup is not normal by displaying an error or the like. In addition, in the state of the error (backup error) that the backup is not normal, the main CPU 93 does not release the error state by the operation of the stop release switch or the reset switch, and the setting is newly changed. Only in case is the error state cleared.

If it is determined in step S38 that the backup is normal (YES), the main CPU 93 restores the state of the pachi-slot machine 1 to the state before the power was cut off based on the backup data stored in the main RAM 95. (S40), the process at power-on ends.

<Medal reception / start check processing>
FIG. 86 is a flowchart showing a medal acceptance / start check process executed in step S12 of the main control process shown in FIG. 84.

First, the main CPU 93 determines whether or not there is an automatic closing request (S50). If a player wins a replay role in the previous unit game, a medal is automatically inserted in this unit game. That is, in the determination process of step S50, it may be determined whether or not the replay combination has been won in the previous unit game.

In step S50, if it is determined that there is an automatic closing request (YES), the main CPU 93 executes the automatic closing process shown in FIG. 87 (S51). In the automatic insertion process, the same number of medals as the medals inserted in the previous unit game are automatically inserted.

Subsequently, the main CPU 93 generates medal insertion command data to be transmitted from the main control board 41 to the sub control board 42, and stores the generated medal insertion command data in the communication data storage area allocated to the main RAM 95. The transmission process is executed (S52). Here, the medal insertion command data represents, for example, the presence / absence of medal insertion, the value of the insertion number counter, the value of the credit counter, and the like.

In step S50, if it is determined that there is no automatic insertion request (NO), the main CPU 93 permits the acceptance of medals (S53). For example, the main CPU 93 drives a solenoid of a selector (not shown) to form a path so that medals inserted into the medal insertion port 13 pass through the selector.

In step S50, when the main CPU 93 determines that there is an automatic insertion request (YES), the acceptance of medals has been prohibited since the previous unit game, so that the process related to the acceptance of medals Does not run.

After the process of step S52 or S53 is executed, the main CPU 93 sets the maximum value of the number of inserted medals according to the gaming state (S54). In the present embodiment, the maximum number of medals inserted is 3.

Next, the main CPU 93 determines whether or not the acceptance of medals is permitted (S55). Here, if it is determined that the acceptance of medals is permitted (YES), the main CPU 93 executes a medal insertion check process for checking the number of inserted medals (S56). In this medal insertion check process, the value of the insertion number counter is updated according to the number of checked medals.

However, in this medal insertion check process, when the medal sensor 46 detects that a medal has passed through the selector, the state of the medal sensor 46 is monitored to determine the passing state of the medal in the selector, and the medal When the state of the sensor 46 is different from that at the time of inserting a normal medal (for example, when the medal sensor 46 is held for 100 ms or more in the ON state), an error related to the inserted medal is assigned to the main RAM 95. An error command transmission process that is set in the storage area and stores the error command data in the communication data storage area allocated to the main RAM 95 is executed (not shown). Here, for the error command data, for example, the error occurrence state set in the error storage area is stored in the communication data storage area.

Then, the progress of the game is interrupted (for example, an error code generated on the 7-segment display 48 is displayed, and the sub CPU 102 causes an error on the liquid crystal display device 11) until the cause of the error generated in the selector is cleared. (Displays the error screen inside).

Further, when the cause of the error in the selector is cleared, the error set in the error storage area of the main RAM 95 is cleared, and the error command data is sent to the main RAM 95 in order to notify the sub CPU 102 that the error has been cleared. The error command transmission process to be stored in the communication data storage area allocated to is executed (not shown). For the error command data, for example, the error release state set in the error storage area is stored in the communication data storage area, and the game is restarted.

The medal sensor 46 is composed of two photosensors arranged at two locations on the medal passage rail in the selector, and monitors the state of the two photosensors (for example, the upstream medal sensor and the downstream medal sensor). As a result, the inserted medal passage check error (when the downstream medal sensor is turned ON without the upstream medal sensor being ON) and the inserted medal passing time error (the upstream medal sensor or the downstream medal is ON). Detects (when either of the sensors is ON for 100 ms or more) and the inserted medal retrograde error (when the upstream medal sensor is ON after the downstream medal sensor is ON). can do.

Subsequently, the main CPU 93 generates medal insertion command data to be transmitted from the main control board 41 to the sub control board 42, and stores the generated medal insertion command data in the communication data storage area allocated to the main RAM 95. The transmission process is executed (S57).

Next, the main CPU 93 determines whether or not a medal can be inserted or credited (S58). In the present embodiment, the condition is satisfied on the condition that the number of inserted cards is 3 and the credit is 50, or the automatic insertion process of step S51 is executed. Sometimes it is determined that medals cannot be inserted or credited, and when the conditions are not met, it is determined that medals can be inserted or credited.

If it is determined in step S58 that medals cannot be inserted or credited (NO), the main CPU 93 prohibits acceptance of medals (S59). For example, the main CPU 93 forms a path through which medals inserted into the medal insertion port 13 are discharged from the medal payout outlet 21 without driving the solenoid of the selector.

In step S55, when it is determined that the acceptance of medals is not permitted (NO), in step S58, when it is determined that medals can be inserted or credited (YES), or after the process of step S59 is executed. , The main CPU 93 determines whether or not the number of inserted medals is the number of medals that can start the game (S60).

That is, the main CPU 93 determines whether or not the number of inserted medals is the number that can start the unit game according to the game state. In the present embodiment, the main CPU 93 determines whether or not the number of inserted medals is three.

Here, if it is determined that the number of inserted medals is not the number that can start the game (NO), the main CPU 93 executes the process of step S55. On the other hand, when it is determined that the number of inserted medals is the number of medals that can start the game (YES), the main CPU 93 determines whether or not the start switch 64 is on (S61).

Here, if it is determined that the start switch 64 is not on (NO), the main CPU 93 executes the process of step S55. On the other hand, when it is determined that the start switch 64 is on (YES), the main CPU 93 prohibits the acceptance of medals (S62) and ends the medal acceptance / start check process.

<Automatic loading process>
FIG. 87 is a flowchart showing an automatic insertion process executed in step S51 of the medal acceptance / start check process shown in FIG. 86.

First, the main CPU 93 determines whether or not the value of the pseudo BB counter is greater than 0 (S70). Here, when it is determined that the value of the pseudo BB counter is larger than 0 (YES), the main CPU 93 causes the value of the pseudo BB counter to be decremented by 1 (S71).

Next, the main CPU 93 determines whether or not the value of the pseudo BB counter is 0 (S72). Here, when it is determined that the value of the pseudo BB counter is 0 (YES), the main CPU 93 sets the pseudo BB end lock (for example, 5 seconds) (S73).

Next, the main CPU 93 determines whether or not the MAX bet button 14 has been operated (S74). Here, if it is determined that the MAX bet button 14 has not been operated (NO), the main CPU 93 executes the process of step S74. That is, the game cannot be played until the MAX bet button 14 is operated.

On the other hand, when it is determined that the MAX bet button 14 has been operated (YES), the main CPU 93 releases the lock at the end of the pseudo BB (S75). In this way, the main CPU 93 constitutes the unlocking means.

Next, the main CPU 93 generates pseudo BB end unlock command data to be transmitted from the main control board 41 to the sub control board 42, and stores the generated pseudo BB end unlock command data in the communication data assigned to the main RAM 95. The lock release command transmission process at the end of the pseudo BB stored in the area is executed (S76).

In this way, the main CPU 93 transmits the pseudo BB end lock release command data from the main control board 41 to the sub control board 42, so that the pseudo BB ends and the pseudo BB end lock is released at the timing. The content of the effect can be changed on the sub-control board 42 side by adding the number of games in the ART game state. Specifically, the main CPU 93 can notify the player on the side of the sub-control board 42 that the number of games in the ART game state has been added.

In step S70, when it is determined that the value of the pseudo BB counter is not greater than 0 (NO), in step S72, when it is determined that the value of the pseudo BB counter is not 0 (NO), or the process of step S76 is executed. After that, the main CPU 93 sets the same number of input sheets as the number of input sheets in the previous unit game (S77), and ends the automatic input process. Specifically, the main CPU 93 copies the automatic closing counter to the closing number counter, clears the automatic closing counter, and ends the automatic closing process.

<Internal lottery processing>
FIG. 88 is a flowchart showing an internal lottery process executed in step S14 of the main control process shown in FIG. 84.

First, the main CPU 93 sets an internal lottery table according to the main game state and the RT game state in the main RAM 95 (S80). Specifically, the main CPU 93 sets the internal lottery table shown in any of FIGS. 20 to 31 in the main RAM 95 according to the gaming state.

Next, the main CPU 93 acquires the random number value stored in the random number value storage area (S81). Next, the main CPU 93 determines the internal winning combination based on the acquired random number value and the set internal lottery table, and stores the internal winning combination in the internal winning combination storage area (S82).

The lock number is drawn based on the internal winning combination stored in the internal winning combination storage area, the lock effect lottery table (not shown) according to the game state, and the lock random number value (refresh register built in the main CPU 93). (S83), the lottery result is stored in the lock number storage area (S84).

In the present embodiment, the main CPU 93 acquires a random number value from the refresh register built in the main CPU 93 as a lock random number value, but the present invention is not limited to this, and the interrupt process described later (FIG. 97). A software random number may be generated by (see) and the generated random number value may be used, or a random number value may be acquired from a random number generation circuit built in the main CPU 93. Further, a random number generation circuit may be provided on the main control board 41 to acquire a random number value from the random number generation circuit.

In addition, the lock numbers obtained by lottery of lock numbers are determined from 0 to 5, and mainly as internal winning roles, "No question 7", "No question 77", "No question tempai", "Confirmed bell", " When "watermelon", "chance eye A", "chance eye B", "chance eye C", "weak cherry", and "strong cherry" are won, 1 to 5 are determined as lock numbers. In this way, the main CPU 93 that executes the lock number lottery process in step S83 constitutes the short lock determination means.

Next, the main CPU 93 determines whether or not the value of the carry-over combination storage area (see FIG. 48) is “0” (S85). In this determination process, it is determined whether or not the bit 3 corresponding to the "MB" of the carry-over storage area is set to "1".

If it is determined in step S85 that the value of the carry-over combination storage area is not "0" (NO), the main CPU 93 ends the internal lottery process. On the other hand, when it is determined that the value of the carry-over combination storage area is "0" (YES), the main CPU 93 uses the internal winning combination specified as the carry-over combination among the internal winning combination stored in the internal winning combination storage area. The combination (for example, MB) is stored in the carry-over combination storage area (see FIG. 48) (S86). In the process of step S86, for example, when "MB" is acquired as the internal winning combination, the bit 3 corresponding to the "MB" in the carry-over combination storage area is set to "1", and the internal lottery processing is terminated.

<Special counter processing>
FIG. 89 is a flowchart showing a special counter process executed in step S15 of the main control process shown in FIG. 84.

First, the main CPU 93 determines whether or not the value of the special counter is greater than 0 (S90). Here, the main CPU 93 determines whether or not the special counter is operating. That is, if the value of the special counter is larger than 0, it can be determined that the special counter is operating.

If it is determined in step S90 that the value of the special counter is not greater than 0 (NO), the main CPU 93 determines whether or not the game state satisfies a predetermined count start condition, specifically, the MB is an internal win. It is determined whether or not it is done (S91). If it is determined in step S90 that the value of the special counter is greater than 0 (YES), or if it is determined in step S91 that the MB is internally winning (YES), the main CPU 93 acquires or generates a random number. Then, a special counter addition lottery for determining whether or not to add the value of the special counter is performed by a lottery (first probability) based on the special counter addition lottery table shown in FIG. 41 (S92).

Next, the main CPU 93 determines whether or not the special counter addition lottery has been won (S93). Here, when it is determined that the special counter addition lottery has been won, the main CPU 93 adds "1" to the value of the special counter (S94). That is, the main CPU 93 counts up the special counter. Further, the value of the special counter is processed so as not to exceed 127. In this way, the main CPU 93 constitutes the counting means.

In step S93, the main CPU 93 determines whether or not the count end condition is satisfied. Specifically, the main CPU 93 acquires or generates a random number, and whether or not the sub CPU 102 adds the ART game according to the value of the special counter by the lottery based on the release lottery table shown in FIG. 43. A release lottery (second probability) is performed to determine whether or not (S95).

Next, the main CPU 93 determines whether or not the release lottery has been won (S96), and if it determines that the release lottery has been won, sets the valid flag in the special counter (sets 1 in Bit7) and locks. “6” is set in the lock number storage area of the main RAM 95 so as to perform the effect (S97), and the special counter processing is terminated.

In this way, the main CPU 93 constitutes a count determination means for determining whether or not to enable the value of the special counter when the count end condition is satisfied. Further, the special counter is allocated to the main RAM 95 as an area of 1 byte (8 bits), the effective range of the count value is 0 to 127 (Bit 0 to Bit 6), and Bit 7 is allocated to set the result of the release lottery. It has been. In this way, the main CPU 93 that executes the process of S97 constitutes the long lock determination means.

Further, the main CPU 93 has a short lock determining means configured when the lock number determined by the internal lottery process is "0" to "5", and a lock number determined by the special counter process is "6". When it is decided to perform the lock effect by the long lock determination means configured in the above, the lock means for performing the lock that invalidates the stop operation for a predetermined period is configured.

Further, in the lock effect performed in response to the lock number "6", unless the MAX bet button 14 is operated, a reel effect having a length corresponding to the count number determined by the special counter is performed.

For example, when performing a reel effect set to 1 count of 20 seconds, if the value of the special counter is 10, the reel effect is performed for 200 seconds with 20 seconds as 10 sets, and the MAX bet button is set as a predetermined condition. By operating 14, the reel effect is canceled.

Therefore, when the value of the special counter is 10, the player can cancel the reel effect and unlock it by operating the MAX bet button 14 every time the reel effect occurs. The predetermined operation is not limited to the operation of the MAX bet button 14, but may be the operation of the start lever 16 or the stop buttons 17L, 17C, 17R.

On the other hand, when it is determined that the release lottery has not been won, the main CPU 93 resets the value of the special counter to 0 and ends the special counter processing.

In the special counter processing described above, the main CPU 93 has described an example of adding the value of the special counter on the condition that the MB is internally won. Instead, the RT gaming state is the RT4 gaming state. The value of the special counter may be added on condition that the transition to is performed.

Further, in step S97 of the special counter processing described above, every time the lock effect set in the main RAM 95 is executed, for example, the sub CPU 102 adds 100 games to the number of ART games. That is, when the value of the special counter at the time of winning the release lottery is "3", 300 games are added to the number of ART games by the sub CPU 102.

In the special counter processing step S91 described above, when the main CPU 93 determines that the MB has won the internal winning, the main CPU 93 starts the addition of the special counter through the special counter addition lottery (steps S92 and S93). The addition of the special counter may be started according to the transition of the RT gaming state.

Further, the addition of the number of ART games may be made so that the sub CPU 102 is notified of the number of additional games together with the reel effect after two games after the transition from the RT4 game state to the RT3 game state.

<Reel stop initial setting process>
FIG. 90 is a flowchart showing a reel stop initial setting process executed in step S16 of the main control process shown in FIG. 84.

First, the main CPU 93 refers to the rotation cylinder stop initial setting table, and acquires the rotation cylinder stop number based on the internal winning combination or the like (S100). The rotating cylinder stop initial setting table is a table in which various information used for stop control is specified in association with the number of input sheets and the rotating cylinder stop number corresponding to the internal winning combination.

Next, the main CPU 93 refers to the rotation cylinder stop initial setting table, and acquires each information based on the rotation cylinder stop number (S101). In this process, the main CPU 93 has, for example, the number of the stop table used at the time of the first to third stops and the information necessary for performing the control change in the control change process (that is, the reels 3L, 3C, and 3R are in a specific order. (Information used to reselect the stop table when stopped (or pressed) at a specific position) and the like are acquired.

Information on the number of sliding pieces with respect to the pressed position is directly or indirectly stored in the stop table, and the limit that does not give a disadvantage to the player and does not cause an erroneous winning by using this information. Is configured to stop at the stop position intended by the developer.

Subsequently, the main CPU 93 stores the rotating identifier in the symbol code storage area (see FIG. 47) (S102). That is, the main CPU 93 sets the bits of the entire symbol code storage area (excluding the unused area) to "1".

Next, the main CPU 93 stores 3 in the stop button non-operation counter (S103), and ends the reel stop initial setting process. The stop button non-operation counter is for determining the number of stop buttons 17L, 17C, and 17R that have not been stopped by the player, and is stored in a predetermined area of the main RAM 95.

<Pull-in priority storage process>
FIG. 91 is a flowchart showing a pull-in priority storage process executed in step S21 of the main control process shown in FIG. 84 and step S165 of the reel stop control process shown in FIG. 94.

First, the main CPU 93 stores the value of the stop button non-operation counter as the number of searches in the main RAM 95 (S110). Next, the main CPU 93 executes a search target reel determination process for determining a search target reel (S111). In this process, for example, one reel on the left side of the rotating reels is determined as the reel to be searched.

Next, the main CPU 93 executes the pull-in priority table selection process shown in FIG. 92 (S112). In this attraction priority table selection process, one attraction priority table number is selected from the attraction priority table (see FIG. 33).

Next, the main CPU 93 sets 21 (the number of symbols on each reel) to the number of symbol checks stored in the main RAM 95, and sets 0 to the search symbol position (S113).

Next, the main CPU 93 executes the symbol code storage process shown in FIG. 93 (S114). This symbol code storage process acquires the symbol code of the check symbol position data for checking the symbol position of the rotating reel.

Next, the main CPU 93 updates the display combination storage area (see FIG. 46) based on the acquired symbol code and the symbol code storage area (see FIG. 47) (S115). Next, the main CPU 93 executes the pull-in priority data acquisition process (S116).

In the pull-in priority data acquisition process, in step S112, the corresponding bit is 1 in the display combination storage area and the corresponding bit is 1 in the internal winning combination storage area (see FIG. 45). Refer to the selected pull-in priority table to get the pull-in priority data.

In the pull-in priority data acquisition process, "stop prohibition" (000H) is set for the symbol position that causes an erroneous prize when stopped, and although it is not internally won, no erroneous prize is obtained even if it is stopped. For the symbol position, "stoppable" (001H) is set.

Next, the main CPU 93 stores the acquired attraction priority data in the attraction priority data storage area corresponding to the search target reel (S117). Next, the main CPU 93 subtracts 1 from the number of symbol checks and adds 1 to the search symbol position (S118).

Next, the main CPU 93 determines whether or not the number of symbol checks is 0 (S119). Here, if it is determined that the number of symbol checks is not 0 (NO), the main CPU 93 executes the process of step S114.

On the other hand, when it is determined that the number of symbol checks is 0 (YES), the main CPU 93 determines whether or not the search for the number of searches has been executed (S120). Here, if it is determined that the search for the number of searches has been executed (YES), the main CPU 93 ends the pull-in priority storage process. On the other hand, if it is determined that the search for the number of searches has not been executed (NO), the main CPU 93 executes the process of step S111.

<Pull-in priority table selection process>
FIG. 92 is a flowchart showing the attraction priority table selection process executed in step S112 of the attraction priority storage process shown in FIG. 91.

First, the main CPU 93 determines whether or not the pull-in priority table selection data is set (S130). Here, when it is determined that the attraction priority table selection data is set (YES), the main CPU 93 refers to the pressing order storage area (see FIG. 51) and the operation stop button storage area (see FIG. 50). Then, from the pull-in priority table selection table (not shown), set the pull-in priority table number corresponding to the pull-in priority table selection data (S131), and set the pull-in priority table according to the pull-in priority table number (S131). S132), the pull-in priority table selection process is terminated.

On the other hand, when it is determined that the attraction priority table selection data is not set (NO), the main CPU 93 sets the attraction priority table according to the attraction priority table number (S132), and the attraction priority table. The selection process ends.

<Design code storage process>
FIG. 93 is a flowchart showing the symbol code storage process executed in step S114 of the pull-in priority order storage process shown in FIG. 91 and step S159 of the reel stop control process shown in FIG. 94.

First, the main CPU 93 sets the valid line data (S140). In the present embodiment, the main CPU 93 sets the center line as an effective line. Next, the main CPU 93 sets the check symbol position data of the search target reel based on the search symbol position and the effective line data (S141). In the present embodiment, the main CPU 93 sets the symbol position in the middle stage of the left reel 3L as the symbol position data for checking.

Next, the main CPU 93 acquires the symbol code of the check symbol position data (S142), and ends the symbol code storage process.

<Reel stop control process>
FIG. 94 is a flowchart showing a reel stop control process executed in step S22 of the main control process shown in FIG. 84.

First, the main CPU 93 determines whether or not a valid stop button has been pressed (S150). This process is a process of determining whether or not a signal is output from the stop switch 7S. If the main CPU 93 determines that the valid stop button has not been pressed (NO), the main CPU 93 repeatedly executes the process of step S150.

On the other hand, when the main CPU 93 determines that a valid stop button has been pressed (YES), the main CPU 93 has a pressing order storage area (see FIG. 51) and an operation stop button storage area (FIG. 51) according to the pressed stop button. (Refer to 50) and is updated (S151).

Here, the main CPU 93 stores the types of operation stop buttons corresponding to each of the first stop operation, the second stop operation, and the third stop operation in the press order delivery area (see FIG. 51), and the press order delivery area. The pressing order of the stop buttons 17L, 17C, and 17R can be determined by referring to.

Subsequently, the main CPU 93 subtracts 1 from the stop button non-operation counter (S152), determines the search target reel from the operation stop button (S153), and stores the stop start position in the main RAM 95 based on the symbol counter (S152). S154). The stop start position is a symbol position corresponding to the symbol counter of the corresponding reel when the stop operation is detected by the stop switch 7S.

Next, the main CPU 93 executes the sliding piece number determination process (S155). In this slide piece number determination process, the number of slide pieces defined at the stop start position is determined based on the stop table selection data group selected based on the internal winning combination from the rotation cylinder stop initial setting table (see FIG. 32). It is a process to do.

Next, the main CPU 93 generates reel stop command data to be transmitted from the main control board 41 to the sub control board 42, and stores the generated reel stop command data in the communication data storage area allocated to the main RAM 95. The transmission process is executed (S156). This reel stop command data represents the type of reel to be stopped, the stop start position, the number of sliding pieces (or the planned stop position), and the like.

Next, the main CPU 93 determines the scheduled stop position based on the stop start position and the number of slip pieces determination data, and stores the stop schedule position in the main RAM 95 (S157). The planned stop position is a symbol position obtained by adding any of the predetermined numerical values "0" to "4" defined as the number of sliding pieces to the stop start position, and the symbol position at which the rotation of the reel is stopped. Is.

Next, the main CPU 93 sets the scheduled stop position as the search symbol position (S158). Next, the main CPU 93 executes the symbol code storage process shown in FIG. 93 (S159).

Next, the main CPU 93 updates the symbol code storage area from the symbol code acquired in the symbol code storage process (S160). Next, the main CPU 93 performs a control change process (S161). In this control change process, the reel stop information group is updated when the position is at a specific stop position.

Next, the main CPU 93 determines whether or not the pressed stop button is released (S162). This process is a process of determining whether or not a signal is no longer output from the stop switch 7S.

If the main CPU 93 determines that the pressed stop button has not been released (NO), the main CPU 93 repeatedly executes the process of step S162. On the other hand, when it is determined that the pressed stop button is released (YES), the main CPU 93 executes the reel stop command transmission process (S163).

The reel stop command generated by this reel stop command transmission process includes information on the ON edge / OFF edge of the stop switch 7S. The ON edge / OFF edge information may be monitored by an interrupt process and transmitted to the sub-control board 42.

Next, the main CPU 93 determines whether or not the stop button non-operation counter is 0 (S164). Here, if it is determined that the stop button non-operation counter is not 0 (NO), the main CPU 93 executes the pull-in priority storage process shown in FIG. 91 (S165), and executes the process of step S150. On the other hand, when it is determined that the stop button non-operation counter is 0 (YES), the main CPU 93 ends the reel stop control process.

<Bonus end check process>
FIG. 95 is a flowchart showing a bonus end check process executed in step S27 of the main control process shown in FIG. 84.

First, the main CPU 93 determines whether the main game state is the MB operating state, that is, whether the MB operating state flag stored in the game state flag storage area shown in FIG. 49 is on (S280).

Here, if it is determined that the main game state is not the MB operating state (NO), the main CPU 93 ends the bonus end check process. On the other hand, when it is determined that the main game state is the MB operating state (YES), the main CPU 93 executes the CB end process for terminating the CB (S281).

Next, the main CPU 93 updates the bonus end number counter (S282). Next, the main CPU 93 determines whether or not the value of the bonus end number counter is smaller than "0" (S283).

Here, when the value of the bonus end number counter is not smaller than "0", that is, when the value of the bonus end number counter is "0" or more (NO), the main CPU 93 ends the bonus end check process. .. On the other hand, when the value of the bonus end number counter is smaller than "0" (YES), the main CPU 93 executes the MB end process for turning off the MB operation state flag (S284).

Next, the main CPU 93 generates bonus end command data to be transmitted from the main control board 41 to the sub control board 42, and stores the generated bonus end command data in the communication data storage area allocated to the main RAM 95. The hour command transmission process is executed (S285), and the bonus end check process is terminated.

<Bonus operation check process>
FIG. 96 is a flowchart showing a bonus operation check process executed in step S28 of the main control process shown in FIG. 84.

First, the main CPU 93 determines whether or not the MB is operating (S290). Here, if it is determined that the MB is operating (YES), the main CPU 93 executes the CB operation process for operating the CB (S291), and ends the bonus operation check process.

On the other hand, if it is determined that the MB is not operating (NO), the main CPU 93 determines whether or not the MB has won a prize (S292). Here, when it is determined that the MB has won a prize, the main CPU 93 executes the MB operation process for operating the MB (S293).

Next, the main CPU 93 clears the value of the carry-over combination storage area (S294). After that, the main CPU 93 generates bonus start command data to be transmitted from the main control board 41 to the sub control board 42, and stores the generated bonus start command data in the communication data storage area allocated to the main RAM 95. The process is executed (S295), and the bonus operation check process is completed.

If it is determined in step S292 that the MB has not been won, the main CPU 93 determines whether or not the replay is displayed (S296). Specifically, the main CPU 93 determines whether or not a combination of "replay-replay-replay" called "replay without transition" is displayed along the effective line.

If it is determined that the replay is not displayed (NO), the main CPU 93 ends the bonus operation check process. On the other hand, when it is determined that the replay is displayed (YES), the main CPU 93 makes an automatic insertion request so that the automatic insertion process is executed in S51 of the medal acceptance / start check process shown in FIG. 86 (S297). ..

Next, the main CPU 93 determines whether or not the RT5 lip is displayed (S298). Specifically, the main CPU 93 determines whether or not any combination of "RT5 transition lip_1" to "RT5 transition lip_16" or "7 lip_RT5_01" to "7 lip_RT5_06" is displayed along the valid line. To judge. Here, if it is determined that the RT5 lip is not displayed (NO), the main CPU 93 ends the bonus operation check process.

On the other hand, when it is determined that the RT5 lip is displayed (YES), the main CPU 93 adds a predetermined number of games to the value of the pseudo BB counter that counts the number of games in the pseudo BB, that is, the RT5 game state (S299). In the present embodiment, since the pseudo BB continues 50 games from the game in which the pseudo BB target replay is internally won, the predetermined number of games added to the value of the pseudo BB counter is 51.

<Interrupt processing controlled by the main CPU>
FIG. 97 is a flowchart showing an interrupt process controlled by the main CPU 93. This process is performed every 1.1172 ms.

First, the main CPU 93 saves the register (S320). Next, the main CPU 93 executes the input port check process shown in FIG. 98 (S321). In this process, the main CPU 93 confirms the presence or absence of a signal transmitted to the sub-control board 42.

For example, the main CPU 93 stores input state command data representing on-edge and off-edge information of various switches including on-edge and off-edge of the start switch 64 and stop switch 7S in the communication data storage area of the main RAM 95.

Next, the main CPU 93 executes the timer update process (S322). Subsequently, the main CPU 93 executes the effect timer update process (S323). Next, the main CPU 93 executes a reel control process for controlling the rotation of the reels 3L, 3C, and 3R (S324).

More specifically, the main CPU 93 starts the rotation of the reels 3L, 3C, 3R in response to the request to start the rotation of the reels 3L, 3C, 3R, that is, the start operation, and the reels at a constant speed. Control is performed so that the 3L, 3C, and 3R rotate. Further, the main CPU 93 controls so that the rotation of the reels 3L, 3C, and 3R corresponding to the stop operation is stopped according to the stop operation.

Next, the main CPU 93 executes the lamp 7SEG drive process (S325). For example, the main CPU 93 displays the number of credited medals, the number of payouts, and the like on various display units.

Next, the main CPU 93 executes a data transmission process for transmitting command data to the sub CPU 102 (S326). The data transmission process will be described later with reference to FIG. 99.

The interrupt that occurs periodically is generated every 1.1172 ms, but since new command data is not transmitted during the transmission of command data, it is actually about 17 ms (15 interrupts). Command data is transmitted to the sub CPU 102 at intervals.

Specifically, assuming that the transmission speed of the command data is 4800 bps, in order to transmit 80-bit data in which a start bit and a stop bit are added every 8 bits to the 8-bit command data, 80 bits / 4800 bps = 16.666 ... That is, since it takes about 17 ms, the command data is actually transmitted to the sub CPU 102 at intervals of about 17 ms (15 interrupts).

Next, the main CPU 93 restores the register (S327) and ends the interrupt process that occurs periodically.

<Input port check process>
FIG. 98 is a flowchart showing an input port check process executed in step S321 of the interrupt process controlled by the main CPU 93.

First, the main CPU 93 stores the previous interrupt, that is, the state of the input port of the current input port state storage area of the main RAM 95 in the input port state storage area one interrupt before the main RAM 95 (S331), and then stores it. , The current input port state is stored in the current input port state storage area of the main RAM 95 (S332).

In this way, by making it possible to compare the state of the input port one interrupt before and the state of the current input port, the main CPU 93 can confirm the state of both input ports. It is checked whether the state of the input port has changed, for example, whether the MAX bet button 14 or the 1-bet button 15 has been pressed.

Next, the main CPU 93 compares the input port state storage area before one interrupt with the current input port state storage area to generate on-edge and off-edge states of the input port state, and sets the on-edge and off-edge states of the main RAM 95. It is stored in the on-edge storage area and the on-edge storage area (S333), and the input port check process is completed.

In the present embodiment, the on-edge refers to the state at the time when the button is pressed, the off-edge refers to the state at the time when the button is released, and the state where the button is pressed from the on-edge state. In the next interrupt cycle, the on-edge state is released, and the off-edge state is also the off-edge state only when the button is released.

Although not particularly defined in the present embodiment, the input port is not limited to one (8-bit) input port, and usually, there are a plurality of input ports, and a plurality of input ports are used. Signals for the number of bits assigned to each are input, and the start switch 64, stop switch 17S, MAX bet button 14, 1 bet button 15, the above-mentioned medal reception / start check processing medal insertion detection, and reel 3L , 3C, 3R are assigned to reel index sensors (not shown) installed.

<Data transmission processing>
FIG. 99 is a flowchart showing a data transmission process executed in step S326 of the interrupt process controlled by the main CPU 93.

First, the main CPU 93 determines whether or not there is a free space in the transmission port (S340). Here, if it is determined that there is no free space in the transmission port (NO), the main CPU 93 ends the data transmission process. The state in which the transmission port is full means that the main CPU 93 is currently transmitting command data to the sub CPU 102.

On the other hand, if it is determined that there is a vacancy in the transmission port (YES), the main CPU 93 determines whether or not there is transmission data as command data to be transmitted to the sub CPU 102 (S341).

Specifically, the main CPU 93 determines that there is transmission data when command data (for example, start command data or the like) is stored in the transmission data storage area allocated to the main RAM 95.

Here, if it is determined that there is no transmission data (NO), the main CPU 93 executes the non-operation command communication data storage process shown in FIG. 100 (S340). If it is determined in step S341 that there is transmission data (YES), or after executing the process of step S340, the main CPU 93 sets 8 in the data number counter as the number of data for one packet (S343).

Next, the main CPU 93 sets the data stored in the communication data storage area in the transmission port (S344), and updates the address of the data to be set next in the transmission port in the communication data storage area, that is, for one byte. The communication data storage area address to be added is updated (S345).

Next, the main CPU 93 causes the data number counter to subtract 1 (S346). Next, the main CPU 93 determines whether or not the value of the data number counter is 0 (S347). Here, if it is determined that the value of the data number counter is not 0 (NO), the main CPU 93 returns the data transmission process to step S344.

On the other hand, when it is determined that the value of the data number counter is 0 (YES), the main CPU 93 sets the transmission start request for transmitting the transmission data set in the transmission port to the sub CPU 102 in the communication register port. (S348). Next, the main CPU 93 clears the communication data storage area (S349) and ends the data transmission process.

Specifically, the main CPU 93 sets the data for one packet (8 bytes) of the command data to be transmitted to the sub CPU 102 in the serial communication function (not shown) built in the main CPU 93, and then sets the communication register port of the serial communication function. By setting the transmission request to, data transmission to the sub CPU 102 is started.

In the present embodiment, the main CPU 93 transmits command data to the sub CPU 102 by using the serial communication function built in the main CPU 93, but the present invention is not limited to this, and the serial communication circuit is connected to the main control board 41. May be provided and command data may be transmitted to the sub CPU 102 by the serial communication circuit.

<No operation command communication data storage processing>
FIG. 100 is a flowchart showing a non-operation command communication data storage process executed in step S342 of the data transmission process shown in FIG. 99.

First, the main CPU 93 determines whether or not there is a free space in the communication data storage area (S360). If it is determined that there is no free space in the communication data storage area (NO), the main CPU 93 ends the non-operation command communication data storage process.

On the other hand, if it is determined that there is space in the communication data storage area (YES), the main CPU 93 stores a non-operation command (1Bite data) at the beginning (+0) of the free area in the communication data storage area (S361). ).

Next, the main CPU 93 stores the port state of the current input port state storage area in the area (+1 to +6) following the area in which the non-operation command of the communication data storage area is stored (S362).

Next, the main CPU 93 creates SUM data (sum value) of the data (+0 to +6) stored in steps S361 and S362, and sets the area (+7) following the area storing the port state of the communication data storage area. The created SUM data is stored (S363), and the non-operation command communication data storage process is terminated.

Although the specific SUM calculation method is not specified in the present embodiment, the SUM data (sum value) can be calculated by, for example, addition. Further, the calculation method of the SUM data (sum value) is not limited to addition, and calculation by subtraction or exclusive OR may be used.

[Sub-control processing]
The sub CPU 102 of the sub control board 42 executes various processes according to the flowcharts shown in FIGS. 101 to 160.

<Power-on process>
FIG. 101 is a flowchart showing a power-on process of the sub CPU 102 when the power is turned on.

First, the sub CPU 102 executes the initialization process (S370). In this process, the sub CPU 102 checks for errors in the sub RAM 104 and the like, and initializes the task system. The task system sets the processing cycle waiting time of each task of the lamp control task (4 ms), the sound control task (33 ms), and the shutter control task (1 ms).

Next, the sub CPU 102 activates the lamp control task shown in FIG. 102 (S371). In the lamp control task, the lighting state of various lamps of the LED group 25 is controlled via the LED substrate 72.

Next, the sub CPU 102 activates the sound control task shown in FIG. 103 (S373). In the sound control task, the sound output state from the speakers 23L and 23R is controlled by the sub CPU 102 via the sound I / O board 71.

Next, the sub CPU 102 activates the shutter control task shown in FIG. 104 (S374). In the shutter control task, the shutter device 200 is controlled by the sub CPU 102 via the shutter control board 78.

Next, the sub CPU 102 activates the main task shown in FIG. 107 (S375). In the main task, the sub CPU 102 executes drawing processing of the liquid crystal display device 11, processing when an error occurs, processing when an error is cleared, and the like.

Next, the sub CPU 102 activates the main board communication task shown in FIG. 110 (S376). In the main board communication task, the sub CPU 102 determines the effect performed by the pachislot machine 1 in connection with the reception and analysis of the command transmitted from the main control board 41.

Next, the sub CPU 102 activates the animation task (S377). In the animation task, the sub CPU 102 selects the animation to be displayed on the liquid crystal display device 11 or the like.

Next, the sub CPU 102 executes the power failure recovery process shown in FIG. 128 (S378). In the power failure recovery process, the sub CPU 102 executes a process when the power is returned from the state in which the power is not supplied to the sub control board 42 to the state in which the power is supplied.

<Lamp control task>
FIG. 102 is a flowchart showing a lamp control task activated in step S371 of the power-on process shown in FIG. 101.

First, the sub CPU 102 executes the initialization process of the lamp-related data (S380). Next, the sub CPU 102 executes the lamp data analysis process (S381). The lamp data analysis process is performed on a plurality of effect LEDs provided in various places of the pachislot machine 1 (for example, backs (not shown) arranged on the effect LED groups 25 arranged on the decorative member 7 and the reels 3L, 3C, 3R. Generates control data for lighting and turning off each LED and lamp effect according to the registered data of lights, etc.).

Next, the sub CPU 102 executes the lamp effect execution process (S382) based on the control data generated in the lamp data analysis process (S381), executes the lamp effect execution process, and then performs the lamp control task process in step S381. Return to.

Although omitted in FIG. 102, since the processing cycle is waited after the lamp effect execution process is executed, the process of the lamp control task returns to step S381 for less than 4 ms (4 msec− (lamp data analysis). Since the processing time of the processing + the processing time of the lamp effect execution processing) = waiting time), the processing is performed in units of 4 ms in the lamp control task.

<Sound control task>
FIG. 103 is a flowchart showing a sound control task activated in step S373 of the power-on process shown in FIG. 101.

First, the sub CPU 102 executes initialization processing of sound-related data related to the sound output state from the speakers 23L and 23R via the sound I / O board 71 (S390).

Next, the sub CPU 102 executes a sound data analysis process (S391). The sound data analysis process generates sound data according to the registered data for outputting sound to the speakers 23L and 23R provided in the pachislot machine 1.

Next, the sub CPU 102 executes the sound effect execution process (S392) based on the sound data generated in the sound data analysis process (S391), executes the sound effect execution process, and then performs the sound control task process. Return to step S391.

Although omitted in FIG. 103, the processing of the sound control task returns to step S391 for less than 33 ms (33 msec- (sound data analysis)) because the processing cycle is waited after the sound effect execution process is executed. Since the processing time of the processing + the processing time of the sound effect execution processing) = the waiting time) is followed, the sound control task is processed in units of 33 ms.

<Shutter control task>
FIG. 104 is a flowchart showing a shutter control task activated in step S374 of the power-on process shown in FIG. 101. The shutter control task controls the drive and stop of the elevating motor 240A, the elevating motor 240B, and the rotary motor 231.

First, the sub CPU 102 executes the shutter activation test process (S400). In the shutter activation test process, the sub CPU 102 puts the shutter in the retracted state as shown in FIG. 8 via the shutter control board 78, and then executes a pre-registered operation on the shutter device 200 via the shutter control board 78. Then, it is confirmed from the detection results of the origin sensor 270, the lowering sensor 271 and the rotation sensor 272 that the shutter device 200 is accurately executing each operation.

When the sub CPU 102 can confirm that the shutter device 200 is executing each operation accurately, the sub CPU 102 puts the shutter in the retracted state as shown in FIG. 8 via the shutter control board 78.

The sub CPU 102 performs a shutter activation test only once when the power is turned on, but the present invention is not limited to this, and an error in the shutter device 200 (detection of each sensor of the elevating motor 240A, 240B or the rotary motor 231) is performed during the production. When an abnormality) is detected, the shutter activation test is performed between the unit games, and the error of the shutter device 200 is cleared by confirming that the shutter activation test process is normally executed. You may try to do it.

In this case, if the sub CPU 102 cannot confirm that the shutter device 200 is executing each operation accurately, the sub CPU 102 may display the fact on the liquid crystal display device 11.

After executing the shutter activation test process, the sub CPU 102 determines whether or not there is the registered shutter operation data (S401). Here, if it is determined that there is the registered shutter operation data (YES), the sub CPU 102 executes the shutter effect reconstruction process shown in FIG. 105 (S402).

Next, the sub CPU 102 determines whether or not the shutter operation sequence stored in the shutter operation sequence storage area has reached the end position (S403). For example, when the sub CPU 102 detects "EndBlock" indicating the end of the shutter operation sequence in the shutter operation sequence storage area illustrated in FIG. 81, it determines that the shutter operation sequence has ended.

In the present embodiment, in FIGS. 81 and 101, “EndBlock” is described for convenience in an easy-to-understand manner, but the present invention is not limited to this, and “0xffff” (“0x” is a value indicating the end of the table. , C language or the like, which represents a hexadecimal number) or "-1" may be used.

When it is determined (NO) that the shutter operation sequence stored in the shutter operation sequence storage area has not reached the end position, the sub CPU 102 executes the shutter control process shown in FIG. 106 (S404).

On the other hand, when it is determined that the shutter operation sequence stored in the shutter operation sequence storage area has reached the end position (YES), or after the process of step S404 is executed, the sub CPU 102 performs the shutter control task. The process of is returned to step S401.

Although omitted in FIG. 106, when the processing of the shutter control task is returned to step S401, the sub CPU 102 waits for a processing cycle, so that the processing of the shutter control task is less than 1 ms to return to step S401. Since (1 m- (processing time of steps S401 to S403 or S404) = waiting time), the shutter control task is processed in units of 1 ms.

<Shutter effect reconstruction process>
FIG. 105 is a flowchart showing a shutter effect reconstruction process executed in step S402 of the shutter control task shown in FIG. 104.

First, the sub CPU 102 acquires the shutter operation data from the sub RAM 104 (S410), and acquires the previous shutter operation data from the sub RAM 104 (S411). Next, the sub CPU 102 acquires the shutter operation combination data corresponding to the shutter operation data acquired in step S410 and the previous shutter operation data acquired in step S411 from the shutter operation combination determination table shown in FIG. 80 (S412). ..

Next, the sub CPU 102 constructs a shutter operation sequence as shown in FIG. 81 from the acquired shutter operation combination data, and saves the constructed shutter operation sequence in the shutter operation sequence storage area (S413). In this way, the sub CPU 102 constitutes the accessory operation construction means for constructing the effect operation sequence data representing the shutter operation sequence of the shutter.

Next, the sub CPU 102 sets the shutter operation data acquired in step S410 as the previous shutter operation data in the sub RAM 104 (S414). That is, the sub RAM 104 constitutes the accessory data storage means.

Next, the sub CPU 102 determines whether or not the sequence data stored in the shutter operation sequence storage area is EndBlock (S415). Here, if it is determined that the sequence data is EndBlock (YES), the sub CPU 102 ends the shutter effect reconstruction process.

In addition, in step S412, in the shutter operation combination determination table (see FIG. 80), as in the case where the shutter operation data is “Y3” this time and the previous shutter operation data is “Y4”, “−” (-” (see FIG. When 0xfffe or -2) is registered, it means that it is not necessary to operate the shutter.

In this case, in step S413, the sub CPU 102 stores the EndBlock (0xffff or -1) in the area corresponding to the step number “1” of the shutter operation sequence storage area.

If it is determined in step S415 that the sequence data is not EndBlock (NO), the sub CPU 102 acquires the number of pulses, the pulse width, and the excitation direction from the sequence data stored in the shutter operation sequence storage area (S416).

Next, the sub CPU 102 sets 0 to each value of the pulse counter and the pulse width counter (S417), executes a motor excitation output process for outputting a pulse signal for exciting the motor (S418), and performs a shutter effect reconstruction process. To finish.

Specifically, in the motor excitation output process, the sub CPU 102 sets the excitation phase of the elevating motor 240A, the elevating motor 240B, and the rotary motor 231 based on the excitation direction, the pulse width, and the number of pulses acquired from the shutter operation sequence storage area. The excitation data is output to the corresponding output port.

When the sub CPU 102 stops the elevating motor 240A, the elevating motor 240B, and the rotary motor 231 from the driving state, the sub CPU 102 outputs excitation data for all-phase stop to the output port.

<Shutter control processing>
FIG. 106 is a flowchart showing a shutter control process executed in step S404 of the shutter control task shown in FIG. 104.

First, the sub CPU 102 determines whether or not the pulse width of the pulse signal is equal to the value of the pulse width counter (S420). Here, when it is determined that the pulse width of the pulse signal is not equal to the value of the pulse width counter (NO), the sub CPU 102 adds 1 to the value of the pulse width counter (S421), and ends the shutter control process. To do.

If it is determined in step S420 that the pulse width of the pulse signal is not equal to the value of the pulse width counter (NO), the motor excitation output process by the sub CPU 102 is not executed, so that the excited state of the driving motor is changed. Be retained. Similarly, the excited state of the driving motor is maintained for the following steps in which the motor excitation output process is not performed.

On the other hand, when it is determined that the pulse width of the pulse signal is equal to the value of the pulse width counter (YES), the sub CPU 102 executes the motor excitation output process (S422). Next, the sub CPU 102 determines whether or not the number of pulses of the pulse signal is equal to the value of the pulse counter (S423).

Here, when it is determined that the number of pulses of the pulse signal is not equal to the value of the pulse number counter (NO), the sub CPU 102 adds 1 to the value of the pulse counter (S424) and adds 1 to the value of the pulse width counter. Set 0 (S425).

Next, the sub CPU 102 determines whether or not the number of pulses of the pulse signal is the specified maximum value (S426). Here, if it is determined that the number of pulses of the pulse signal is not the maximum value (NO), the sub CPU 102 ends the shutter control process.

In the present embodiment, the maximum value of the specified number of pulses is "300", and the step number "3" in FIG. 72, the step number "2" in FIG. 74, the step number "2" in FIG. 78, In the step in which the number of pulses "300" is registered, such as the step number "2" in FIG. 79 and the step numbers "2" and "8" in FIG. 81, the process described in the special condition column. Is executed.

When it is determined in S426 that the number of pulses of the pulse signal is the maximum value (YES), the sub CPU 102 determines whether or not the value of the pulse counter is the specified maximum value (S427).

Here, when it is determined that the value of the pulse counter is the maximum value (YES), the sub CPU 102 initializes the shutter operation sequence storage area and sets EndBlock at the beginning of the shutter operation sequence storage area (S428). ..

If the value of the pulse counter is the specified maximum value, the operating motor is in an abnormal state. Therefore, the sub CPU 102 sends excitation data that stops all phases to the output port during the motor excitation output process. Output.

Next, the sub CPU 102 executes the motor excitation output process (S429), and the detection target sensor error, that is, the elevating motor 240A, the elevating motor 240B, and the elevating motor 240B for the sensor to be detected among the origin sensor 270, the descent sensor 271 and the rotation sensor 272. The error occurrence data of the rotary motor 231 is set in the error management area (S430), and the shutter control process is terminated.

If it is determined in step S427 that the value of the pulse counter is not the maximum value (NO), the sub CPU 102 determines whether or not the sensor to be detected is in the ON state (S431).

Here, if it is determined that the sensor to be detected is not in the ON state (NO), the sub CPU 102 ends the shutter control process. On the other hand, when it is determined that the sensor to be detected is in the ON state (YES), or when it is determined in step S423 that the number of pulses of the pulse signal is equal to the value of the pulse number counter (YES), the sub CPU 102 Updates the shutter operation sequence storage area (S432).

Next, the sub CPU 102 acquires the number of pulses, the pulse width, and the excitation direction from the sequence data stored in the shutter operation sequence storage area (S433). Next, the sub CPU 102 sets 0 to each value of the pulse counter and the pulse width counter (S434), executes the motor excitation output process (S435), and ends the shutter control process.

<Main task>
FIG. 107 is a flowchart showing a main task started in step S375 of the power-on process shown in FIG. 101.

First, the sub CPU 102 executes the VSYNC (Vertical Synchronization) interrupt initialization process (S440) and executes the VSYNC interrupt wait (S441). The VSYNC interrupt initialization process is a process that makes it possible to accept an image synchronization signal as an interrupt signal, and the VSYNC interrupt signal is generated at the timing of switching frames of the drawn image, and one frame is 33 ms (about 30 FPS). ), The main task is repeated in units of 33 ms including the processing time of the drawing process.

Next, the sub CPU 102 executes the drawing process (S442). Next, the sub CPU 102 executes the error occurrence monitoring process shown in FIG. 108 (S443), and executes the error release monitoring process shown in FIG. 109 (S444). Next, the sub CPU 102 resets the WDT 108 (S445) and returns the processing of the main task to step S441.

In the present embodiment, the WDT 108 is arranged in the sub control circuit 101 of the sub control board 42, but the present invention is not limited to this, and if the WDT circuit is built in the sub CPU 102, the built-in WDT circuit May be used in place of WDT108.

<Error occurrence monitoring process>
FIG. 108 is a flowchart showing an error occurrence monitoring process executed in step S443 of the main task shown in FIG. 107.

First, the sub CPU 102 is in a state in which the simple error information history representing the error history is not displayed and the door key 24 is rotated counterclockwise as a predetermined operation (hereinafter, also referred to as “door key counterclockwise turning state”). It is determined whether or not 3 seconds or more have passed (S450).

Here, when it is determined that the simple error information history is not displayed and the door key counterclockwise turning state has elapsed for 3 seconds or more (YES), the sub CPU 102 is as shown in the display example shown in FIG. 167. A simple error information history display request is made to display the error information history screen representing the simple error information history on the liquid crystal display device 11 (S451).

The simple error information history display is a simple operation of the error information history screen that can be displayed by activating the hall menu (turning on the setting key type switch 52) without activating the hall menu. This is a screen display for confirming the status of occurrence and cancellation of the error of the pachislot machine 1.

On the other hand, if it is determined that the simple error information history is not not displayed or the door key counterclockwise turning state has not elapsed for 3 seconds or more (NO), the sub CPU 102 causes an error in the error management area (see FIG. 83). It is determined whether or not there is data (S452).

Here, if it is determined that there is no error occurrence data in the error management area (NO), the sub CPU 102 ends the error occurrence monitoring process. On the other hand, when it is determined that there is error occurrence data in the error management area (YES), the sub CPU 102 displays an error screen showing an error according to the error occurrence data on the liquid crystal display device 11 as in the display example shown in FIG. 166. The error occurrence display request to be displayed in is set (S453), and the timer value of 3 minutes is set in the error display timer (S454).

As described above, the sub CPU 102 satisfies the predetermined condition such as the above-mentioned simple error information history display request or the error occurrence data in the error management area, and causes the liquid crystal display device 11 to display an image corresponding to the predetermined condition. Configure the image switching means to be displayed.

After executing the process of step S451 or S454, the sub CPU 102 determines whether or not the sub-game state is being additionally selected (“selection game) is being selected) (S455). Here, the sub-game state is additionally selected. If it is determined to be inside (YES), the sub CPU 102 saves the selected element (selected arrangement position) to the sub RAM 104 (S456).

Specifically, the sub CPU 102 is operated by the selection means on the condition that the error screen due to the occurrence of an error or the error information history screen due to a simple operation is displayed on the liquid crystal display device 11 in a state where the element is selected. Is invalidated, and the selection state information is stored in the sub RAM 104. In this way, the sub CPU 102 constitutes the selection information storage means.

In step S455, when it is determined that the sub-game state is not additionally selected (NO), or after executing the process of step S456, the sub CPU 102 causes the video data displayed on the liquid crystal display device 11, the speakers 23L, 23R The sound data being output, the lamp data being output to the plurality of effect LEDs, and the shutter operation data are saved in the sub RAM 104 (S457). Next, the sub CPU 102 sets the shutter operation data in Y3 (S458), and ends the error occurrence monitoring process.

When the error screen or the error information history screen is displayed on the liquid crystal display device 11 when the shutter is operating, the sub CPU 102 transmits the shutter operation data as movable information indicating the shutter state to the sub RAM 104. It is stored (retracted) and the shutter is moved to the exposed position (position shown in FIG. 8). In this way, the sub CPU 102 constitutes the movable state evacuation means.

<Error cancellation monitoring process>
FIG. 109 is a flowchart showing an error release monitoring process executed in step S444 of the main task shown in FIG. 107.

First, the sub CPU 102 determines whether or not the simple error information history display in which the simple error information history is displayed is being displayed and the counterclockwise rotation state of the door key is released (S470). Here, when the simple error information history is being displayed and it is determined that the counterclockwise rotation state of the door key has been released (YES), the sub CPU 102 sets the simple error information history display end request (S471).

On the other hand, when it is determined that the simple error information history is not displayed or the counterclockwise rotation state of the door key is not released (NO), the sub CPU 102 determines whether or not the error occurrence display is being displayed (S472). ..

Here, if it is determined that the error occurrence display is not being displayed (NO), the sub CPU 102 ends the error cancellation monitoring process. On the other hand, if it is determined that the error occurrence display is being displayed (YES), the sub CPU 102 determines whether or not there is an error cancellation in the error management area (S473).

Here, when it is determined that there is an error cancellation in the error management area (YES), the sub CPU 102 clears the value of the error display timer to 0 (S474). On the other hand, when it is determined that there is no error cancellation in the error management area (NO), the sub CPU 102 subtracts 1 from the value of the error display timer (S475).

In S473, the sub CPU 102 cancels the error depending on whether the cause of the error in the error display assigned to the error management area (see FIG. 83) is ON "1" or OFF "0". Judge the presence or absence.

Next, the sub CPU 102 determines whether or not the value of the error display timer is 0 (S476). Here, if it is determined that the value of the error display timer is not 0 (NO), the sub CPU 102 ends the error release monitoring process.

On the other hand, when it is determined that the value of the error display timer is 0 (YES), or after executing the process of step S474, the sub CPU 102 sets an error occurrence display end request (S477) to indicate the error cause. The error occurrence data is reset (deleted) from the error management area (S478).

After executing the process of step S471 or S478, the sub CPU 102 determines whether or not there is saved production data (S479). Here, if it is determined that there is no effect data saved in the sub RAM 104 (NO), the sub CPU 102 ends the error release monitoring process.

On the other hand, when it is determined that there is the saved effect data (YES), the sub CPU 102 restores the video data, the sound data, the lamp data, and the shutter operation data saved in the sub RAM 104 (S480).

Next, the sub CPU 102 determines whether or not the sub-game state is being additionally selected (S481). Here, if it is determined that the sub-game state is not being additionally selected (NO), the sub CPU 102 ends the error release monitoring process.

On the other hand, when it is determined that the sub-game state is being additionally selected (YES), the sub CPU 102 restores the selected element (selected arrangement position) saved in the sub RAM 104 and sets it in the video data (YES). S482), the error release monitoring process is terminated.

As described above, when the display end condition determined to be YES in S470, S473, or S476 is satisfied, the sub CPU 102 displays the game screen of the displayed video data saved (stored) in the sub RAM 104 in S457 on the liquid crystal display device 11. The movable state returning means for returning the shutter to the shutter position before the error screen or the error information history screen is displayed on the liquid crystal display device 11 is configured by returning the shutter operation data saved in the sub RAM 104. ..

Further, if the sub-game state is additionally selected in S481 (during "selection game"), the sub CPU 102 causes the liquid crystal display device 11 to display the selection game screen, and the selected element saved in the sub RAM 104 (during the "selection game"). A selection information return means for returning the selection payout position) to the selection game screen is configured.

In the present embodiment, when an error occurs in the pachi-slot machine 1, the error is displayed for 3 minutes and then returned to the effect state before the error occurs. However, depending on the content of the error, As long as the cause of the error is not actually eliminated, the error display may be continued, or the error display time may be changed to an arbitrary time (for example, 10 minutes).

<Main board communication task>
FIG. 110 is a flowchart showing a main board communication task started in step S376 of the power-on process shown in FIG. 101.

First, the sub CPU 102 initializes the communication message queue allocated to the sub RAM 104 (S490).

Next, the sub CPU 102 acquires the received command data from the communication message queue (S491). The received command data is transmitted as command data by the data transmission process of the main CPU 93 (see FIG. 99), and is registered in the communication message queue by the receive interrupt process of the sub CPU 102.

Further, the sub CPU 102 determines whether or not there is a receive command (S492). Specifically, the sub CPU 102 determines whether or not there is a receive command based on whether or not the receive command data is registered in the communication message queue.

Next, the sub CPU 102 executes a check for the received command (S493). Specifically, the sub CPU 102 determines whether or not the received command type is within the valid command value range (for example, the command type is 01H to 10H), and determines whether or not the received command type is within the valid command value range, and the data length of the received command data (for example, 8 bytes). ), And the determination of the SUM value given to the last data of the received command data (for example, the 8th byte of the received data length 8 bytes) (for example, the calculated value (addition,) from 1 byte to 7 bytes of the received data length 8 bytes). The reception command is checked by performing subtraction or exclusive OR) and collation of whether the SUM value matches.

Next, the sub CPU 102 determines whether or not a valid command has been received (S494). Here, if it is determined that a valid command has not been received (NO), the sub CPU 102 returns the processing of the main board communication task to step S491.

On the other hand, if it is determined that a valid command has been received (YES), the sub CPU 102 determines that the received command is a legitimate command, creates game information from the received command, and creates the created game information. Is stored in the sub RAM 104 (S495). Next, the sub CPU 102 executes the command analysis process shown in FIG. 111 (S496), and returns the process of the main board communication task to step S491.

Since the data transmission process is performed from the main CPU 93 to the sub CPU 102 about every 17 ms (see the interrupt process controlled by the main CPU in FIG. 97 above), the main board communication task is performed at a cycle of about 17 ms. The process is repeated.

<Command analysis processing>
FIG. 111 is a flowchart showing a command analysis process executed in step S496 of the main board communication task shown in FIG. 110.

First, the sub CPU 102 executes the command consistency determination process shown in FIG. 113 (S500). Next, the sub CPU 102 executes the effect content determination process (S501) shown in FIG. 114, executes the animation data determination process (S502), executes the lamp data determination process (S503), and executes the sound data determination process. (S504), the shutter operation data determination process is executed (S505), each determined data is registered in the RAM 103 (S506), and the command analysis process is terminated.

In each data determination process of the animation data determination process, the lamp data determination process, the sound data determination process, and the shutter operation data determination process, the sub CPU 102 assigns the effect data for the effect device according to the effect content determined in the effect content determination process. To determine. Further, the effect data for each effect device is registered in the RAM 103 because it is referred to in the process of controlling each effect device.

It should be noted that the effect content determination process does not necessarily determine a new effect. Basically, when the start command, which will be described later, is received, the effect is determined, and the effect is continued or changed in the subsequent command reception process according to the content of the determined effect.

<Anime task>
FIG. 112 is a flowchart showing an animation task started in step S377 of the power-on process shown in FIG. 101.

First, the sub CPU 102 checks the change from the previous game information (S510). Specifically, in the sub CPU 102, the current game information updated by the interrupt process controlled by the main CPU 93 shown in FIG. 97 is different from the game information registered in the sub RAM 104 in the previous interrupt process. Check if the game information is different.

Next, the sub CPU 102 executes the object control process (S511). Specifically, when the check result that the game information is changed is obtained in step S510, the sub CPU 102 controls the image according to the change of the game information.

Subsequently, the sub CPU 102 executes the animation task management process (S512). Specifically, when the animation data is determined by the animation data determination process and the animation data is registered, the sub CPU 102 selects an image to be displayed for the determined effect (for example, production moving image data). , 3D polygon data that moves in the moving image data, etc.) and the management information of the display order are constructed, and the order of the images displayed in various effects is managed. When the sub CPU 102 executes the animation task management process, the process of the animation task is returned to step S510.

<Command consistency judgment processing>
FIG. 113 is a flowchart showing a command consistency determination process executed in step S500 of the command analysis process shown in FIG. 111.

First, the sub CPU 102 performs a command sequence determination process for determining whether or not the reception order of the commands related to the progress of the unit game among the commands received from the main control circuit 91 is different from the specified order (S515).

In the present embodiment, the sub CPU 102 receives commands in the order of a medal insertion command, a start command, a reel rotation start command, three reel stop commands, and a winning operation command, except for a non-operation command and an error command. Reel.

The sub CPU 102 determines whether or not an error has occurred in the command sequence by determining whether or not the commands have been received in this order, and if it is determined that an error has occurred in the command sequence, the sub RAM 104 Set the "sequence" error in the error management area (see FIG. 83).

The "sequence" abnormality in the error management area of the sub RAM 104 is cleared by clearing the sub RAM 104 in the initialization command reception processing (see step S521 in FIG. 144) described later.

For example, when the sub CPU 102 receives the start command in the state where the winning operation command has not been received in the previous unit game, or when the sub CPU 102 receives the winning operation command after receiving the reel stop command twice. Judge that an error has occurred in the command sequence.

Next, the sub CPU 102 determines whether or not the start command has been received (S516). Here, if it is determined that the start command has not been received (NO), the sub CPU 102 ends the command consistency determination process.

On the other hand, if it is determined that the start command has been received (YES), is the sub CPU 102 in the ON state of the power failure detection error flag indicating that the power supplied to the sub CPU 102 is cut off in an abnormal state? Whether or not the setting change flag is OFF, and whether or not an error has occurred in the command sequence, for details, the "sequence" error in the error management area (see FIG. 83) of the subRAM 104 is set. It is determined whether or not the command is performed (S517).

In this way, the sub CPU 102 constitutes an operation abnormality detecting means for detecting an abnormal operation of the sub control circuit 101.

When the setting change flag is OFF, it means that the pachi-slot machine 1 has not been initialized as in the case of factory shipment, and in detail, the SRAM constituting the sub RAM 104 has been cleared. Represents. Therefore, the sub CPU 102 has performed an abnormal operation (for example, a goto action) in the sub control circuit 101 on the condition that the sub CPU 102 has received the start command without receiving the initialization command from the main control circuit 91 even once. Detect that.

In S517, when it is determined that the power interruption detection abnormality flag is in the ON state, the setting change flag is in the OFF state, or an abnormality has occurred in the command sequence (YES), the pachislot machine 1 is the sub CPU 102. Assuming that the operation is in an abnormal state, the sub-start abnormal state flag is turned ON (S518), and the command consistency determination process is terminated.

On the other hand, when it is determined that the power failure detection abnormality flag is not in the ON state, the setting change flag is not in the OFF state, and no abnormality has occurred in the command sequence (NO), the pachislot machine 1 is normal in the sub CPU 102. The sub-start abnormal status flag is turned off (S519), and the command consistency determination process is terminated.

<Production content determination process>
FIG. 114 is a flowchart showing an effect content determination process executed in step S501 of the command analysis process shown in FIG. 111.

First, the sub CPU 102 determines whether or not the initialization command has been received (S520). Here, if it is determined that the initialization command has been received (YES), the sub CPU 102 executes the initialization command reception processing (S521), turns on the setting change flag (S522), and determines the effect content. To finish.

In the initialization command reception processing, for example, the effect data based on the information transmitted as the initialization command is set, and various management areas and work areas including the management area related to the progress of the game of the sub RAM 104 are initially set. To be converted.

On the other hand, if it is determined that the initialization command has not been received (NO), the sub CPU 102 determines whether or not the medal insertion command has been received (S523). Here, if it is determined that the medal insertion command has been received (YES), the sub CPU 102 executes the medal insertion command reception processing (S524), and ends the effect content determination process. In the medal insertion command reception processing, for example, effect data based on the information transmitted as the medal insertion command is set.

On the other hand, if it is determined that the medal insertion command has not been received (NO), the sub CPU 102 determines whether or not the start command has been received (S525). Here, if it is determined that the start command has been received (YES), the sub CPU 102 executes the start command reception time process shown in FIG. 115 (S526), and ends the effect content determination process. In the process at the time of receiving the start command, for example, the effect data based on the information transmitted as the start command is set.

On the other hand, if it is determined that the start command has not been received (NO), the sub CPU 102 determines whether or not the reel rotation start command has been received (S527). Here, if it is determined that the reel rotation start command has been received (YES), the sub CPU 102 executes the reel rotation start command reception processing (S528), and ends the effect content determination process. In the processing at the time of receiving the reel rotation start command, for example, the effect data based on the information transmitted as the reel rotation start command is set.

On the other hand, if it is determined that the reel rotation start command has not been received (NO), the sub CPU 102 determines whether or not the reel stop command has been received (S529). Here, if it is determined that the reel stop command has been received (YES), the sub CPU 102 executes the reel stop command reception processing (S530), and ends the effect content determination processing. In the reel stop command reception processing, for example, the effect data based on the information transmitted as the reel stop command is set.

On the other hand, if it is determined that the reel stop command has not been received (NO), the sub CPU 102 determines whether or not the winning operation command has been received (S531). Here, if it is determined that the winning operation command has been received (YES), the sub CPU 102 executes the winning operation command receiving process (S532) shown in FIG. 119, and ends the effect content determination process. In the process at the time of receiving the winning operation command, for example, the effect data based on the information transmitted as the winning operation command is set.

On the other hand, if it is determined that the winning operation command has not been received (NO), the sub CPU 102 determines whether or not the error command has been received (S533). Here, if it is determined that the error command has been received (YES), the sub CPU 102 executes the error command reception time process shown in FIG. 122 (S534), and ends the effect content determination process.

On the other hand, if it is determined that the error command has not been received (NO), the sub CPU 102 determines whether or not the no-operation command has been received (S535). Here, if it is determined that the non-operation command has been received (YES), the sub CPU 102 executes the non-operation command reception time process shown in FIG. 123 (S536), and ends the effect content determination process. On the other hand, if it is determined that the no-operation command has not been received (NO), the sub CPU 102 ends the effect content determination process. By executing this effect content determination process, the sub CPU 102 constitutes the effect determination means.

<Processing when receiving start command>
FIG. 115 is a flowchart showing a start command reception time process executed in step S526 of the effect content determination process shown in FIG. 114.

First, the sub CPU 102 executes the fail-safe process shown in FIG. 116 (S540). Next, the sub CPU 102 sets the provisional game state representing the game state determined in the previous game as the current sub game state (S541). Next, the sub CPU 102 determines whether or not the lock number is "6" (S542).

Here, when it is determined that the lock number is "6" (YES), the sub CPU 102 adds a value obtained by multiplying the count value of the special counter by a specified number (for example, 100) to the number of remaining ART games. At the same time, the count value of the special counter is set to the number of ART direct ride notification games (S543). As described above, the sub CPU 102 constitutes an advantageous game granting determination means for determining the number of additional games of ART based on the value counted by the special counter.

On the other hand, when it is determined that the lock number is not "6" (NO), or after the process of step S543 is executed, the sub CPU 102 performs a lottery process according to the sub-game state, the first game state shown in FIG. 117. Another lottery process is executed (S544).

Next, the sub CPU 102 determines whether or not the RT gaming state is less than 2 (that is, the RT0 gaming state or the RT1 gaming state) (S545). Here, the RT game state is controlled by the main CPU 93 and is sent from the main CPU 93 to the sub CPU 102 as a parameter given to the start command. Further, as described above, the RT gaming state takes any of the RT0 gaming state and the RT5 gaming state.

Here, if it is determined that the RT game state is not less than 2 (NO), the sub CPU 102 determines whether or not the number of penalty games is 0 (S546). Here, if it is determined that the number of penalty games is 0 (YES), the sub CPU 102 resets the penalty state flag (S547).

On the other hand, when it is determined that the number of penalty games is not 0 (NO), or after executing the process of step S547, the sub CPU 102 determines whether or not the number of penalty games is larger than 0 (S548).

Here, if it is determined that the number of penalty games is greater than 0 (YES), the sub CPU 102 subtracts 1 from the number of penalty games (S549). On the other hand, if it is determined that the number of penalty games is not greater than 0 (NO), or after executing the process of step S549, the sub CPU 102 determines whether or not the number of grace games is greater than 0 (S550). Here, if it is determined that the number of grace games is greater than 0 (YES), the sub CPU 102 subtracts 1 from the number of grace games (S551).

In step S545, when it is determined that the RT game state is less than 2 (YES), in S550, when it is determined that the number of grace games is not greater than 0 (NO), or after executing the process of step S551, The sub CPU 102 draws the effect content based on the effect random value from the sub-game state, the internal winning combination, the RT game state, and the lock number (S552).

Next, the sub CPU 102 executes the lock occurrence effect setting process (S553) shown in FIG. 118, and ends the start command reception process.

<Fail-safe processing>
FIG. 116 is a flowchart showing a fail-safe process executed in step S540 of the process at the time of receiving the start command shown in FIG. 115.

First, the sub CPU 102 determines whether or not the sub-game state is waiting for the normal return and whether or not the RT game state is less than 2 (S560). Here, if it is determined that the sub-game state is waiting for the normal return and the RT game state is less than 2 (YES), is the sub CPU 102 the lock number before one game is "6"? It is determined whether or not (S561).

Here, if it is determined that the lock number before one game is not "6" (NO), the sub CPU 102 sets the provisional game state to "general medium" (S562), and sets the ceiling game number to the ceiling specified value. (For example, 1500) is set (S563), and the ART end flag is turned on (S564).

In step S560, when it is determined that the sub-game state is not waiting for the normal return, or the RT game state is not less than 2 (NO), and when it is determined that the lock number before one game is "6" (YES). Alternatively, after executing the process in step S564, the sub CPU 102 determines whether or not the RT gaming state is 2 or more (in high probability of ART) (S565).

Here, if it is determined that the RT gaming state is not 2 or more (NO), the sub CPU 102 ends the fail-safe process. On the other hand, when it is determined that the RT game state is 2 or more (YES), the sub CPU 102 determines whether or not the sub start abnormal state flag is ON (S566).

Here, if it is determined that the sub-start abnormal status flag is not ON (NO), the sub CPU 102 ends the fail-safe process. On the other hand, when it is determined that the sub-start abnormal state flag is ON (YES), the sub CPU 102 sets the grace game number to the grace rule value (for example, 30), and sets the penalty game number to the penalty low rule value (YES). For example, 8) is set, the penalty state flag is set (S567), and the fail-safe process is terminated.

As described above, the sub CPU 102 configures the grace game number setting means for setting the grace game number as a predetermined grace game number on condition that the abnormal operation of the sub control circuit 101 is detected. Further, the sub CPU 102 is set during the number of penalty games in which a low penalty value is set as the specified number of games, triggered by the detection of an abnormal operation of the sub control circuit 101 while the number of grace games is consumed. , Set a penalty.

If the penalty state flag is already set in step S567, the sub CPU 102 may add the grace specified value to the number of grace games. Further, in step S567, when the penalty state flag is already set, the sub CPU 102 may add a low penalty value to the number of penalty games.

Further, in step S567, when the penalty state flag is already set, the sub CPU 102 sets the grace game number to the grace game number on the condition that the grace game number is smaller than the grace game number. May be good.

Further, in step S567, when the penalty state flag is already set, the sub CPU 102 sets the penalty low specified value in the number of penalty games on condition that the number of penalty games is smaller than the low penalty specified value. You may.

<Lottery processing according to the first game state>
FIG. 117 is a flowchart showing a lottery process for each game state executed in step S544 of the start command reception process shown in FIG. 115.

First, the sub CPU 102 determines whether or not the sub-game state is "general" (S570). Here, when it is determined that the sub-game state is "general middle" (YES), the sub CPU 102 executes the first general middle lottery process shown in FIG. 129 (S571). Next, the sub CPU 102 executes the second general middle lottery process shown in FIG. 133 (S572), and ends the first game state-specific lottery process.

If it is determined in step S570 that the sub-game state is not "general medium" (NO), the sub CPU 102 determines whether or not the sub-game state is "ART high probability" (S573). Here, when it is determined that the sub-game state is "ART high probability medium" (YES), the sub CPU 102 executes the first ART high probability medium lottery process shown in FIGS. 135 and 136 (S574). Next, the sub CPU 102 executes the second ART high-probability medium lottery process shown in FIG. 137 (S575), and ends the first game state-specific lottery process.

If it is determined in step S573 that the sub-game state is not "ART high probability" (NO), the sub CPU 102 determines whether or not the sub-game state is "ART preparing" (S576). Here, when it is determined that the sub-game state is "ART preparing" (YES), the sub CPU 102 executes the first ART preparing lottery process shown in FIG. 139 (S577), and is classified by the first game state. The lottery process is finished.

If it is determined in step S576 that the sub-game state is not "ART preparing" (NO), the sub CPU 102 determines whether or not the sub-game state is "ART in progress" (S578). Here, when it is determined that the sub-game state is "in ART" (YES), the sub CPU 102 executes the lottery process during the first ART shown in FIGS. 141 and 142 (S579), and the first game state. The separate lottery process is completed.

If it is determined in step S578 that the sub-game state is not "ART in" (NO), the sub CPU 102 determines whether or not the sub-game state is "additional selection being selected" (S580). Here, when it is determined that the sub-game state is "additional selection in progress" (YES), the sub CPU 102 executes the first additional selection in-selection lottery process shown in FIGS. 144 and 145 (S581). Next, the sub CPU 102 executes the second additional selection selected lottery process (S582) shown in FIG. 146, and ends the first game state-specific lottery process.

If it is determined in step S580 that the sub-game state is not "additional selection in progress" (NO), the sub CPU 102 determines whether or not the sub-game state is "additional game in progress" (S583). Here, when it is determined that the sub-game state is "additional game in progress" (YES), the sub CPU 102 executes the lottery process during the additional game (S584), and ends the first game state-specific lottery process. ..

If it is determined in step S583 that the sub-game state is not "additional game in progress" (NO), the sub CPU 102 determines whether or not the sub-game state is "waiting for normal return" (S585).

Here, when it is determined that the sub-game state is "waiting for normal return" (YES), the sub CPU 102 executes the lottery process while waiting for normal return (S586) shown in FIG. 158, and the first game state. The separate lottery process is completed. On the other hand, if it is determined that the sub-game state is not "waiting for normal return" (NO), the sub CPU 102 ends the lottery process for each first game state.

<Production setting process when lock occurs>
FIG. 118 is a flowchart showing a lock occurrence effect setting process executed in step S553 of the start command reception process shown in FIG. 115.

First, the sub CPU 102 determines whether or not the lock number included in the start command data is any of "1" to "6" (S590). Here, if it is determined that the lock number included in the start command data is neither "1" to "6" (NO), the sub CPU 102 ends the lock occurrence time effect setting process.

On the other hand, when it is determined that the lock number included in the start command data is any of "1" to "6" (YES), the sub CPU 102 performs the start command reception processing step S552 shown in FIG. 115. It is determined whether or not the effect content determined by the lottery in is a step-up effect (S591).

Here, if it is determined that the determined effect content is not a step-up effect (NO), the sub CPU 102 ends the lock occurrence time effect setting process. On the other hand, when it is determined that the determined effect content is a step-up effect (YES), the sub CPU 102 sets the step-up sequence table (see FIG. 71) corresponding to the lock number in the sub RAM 104 (S592). ..

Next, the sub CPU 102 sets the value of the non-operation command reception counter to 0, sets the count value of the step-up sequence table to the step-up count, sets the value of the notification game counter to 0 (S593), and locks. When it occurs, the effect setting process ends.

<Processing when receiving a winning operation command>
FIG. 119 is a flowchart showing a process at the time of receiving a winning operation command executed in step S532 of the effect content determination process shown in FIG. 114.

First, the sub CPU 102 executes the penalty setting process shown in FIG. 120 for setting the number of penalty games and the like (S600). Next, the sub CPU 102 executes the second game state-specific lottery process shown in FIG. 121 (S601), and ends the process when the winning operation command is received.

<Penalty setting process>
FIG. 120 is a flowchart showing a penalty setting process executed in step S600 of the process at the time of receiving the winning operation command shown in FIG. 119.

First, the sub CPU 102 determines whether or not the reels 3L, 3C, and 3R are stopped by the irregular stop operation, that is, the irregular push (S610). As described above, the sub CPU 102 constitutes an irregular stop operation determining means for determining whether or not the stop operation is a stop operation different from the predetermined stop operation order.

Here, the irregular push in the present embodiment means that when the RT game state is not less than 2 and the stop operation of the reels 3L, 3C, 3R is not notified, the reels 3C, 3R other than the reel 3L are first. It refers to a stopped operation.

If it is determined in step S610 that the reels 3L, 3C, and 3R are not stopped by the irregular push (NO), the sub CPU 102 ends the penalty setting process. On the other hand, when it is determined that the reels 3L, 3C, and 3R are stopped by the irregular push (YES), the sub CPU 102 determines whether or not the sub-game state is in the general or ART high probability (S611). ..

Here, when it is determined that the sub-game state is in the general or ART high probability (YES), the sub CPU 102 determines whether the penalty flag is OFF and the number of grace games is 0. Judgment (S612).

Here, when it is determined that the penalty flag is OFF and the number of grace games is 0 (YES), the sub CPU 102 determines whether or not the internal winning combination is included in the first winning combination group. (S613).

Here, when it is determined that the internal winning combination is included in the first winning combination group (YES), the sub CPU 102 sets a predetermined grace predetermined value (for example, 30 games) in the number of grace games (for example, 30 games). S614), the penalty setting process is terminated.

If it is determined in step S612 that the penalty flag is not OFF or the number of grace games is not 0 (NO), the sub CPU 102 determines whether the MB is operating and the internal winning combination is the second. It is determined whether or not it is included in the winning combination group (S615). Here, if it is determined that the MB is not in operation and the internal winning combination is not included in the second winning combination group (NO), the sub CPU 102 ends the penalty setting process.

On the other hand, when it is determined that the MB is operating or the internal winning combination is included in the second winning combination group (YES), the sub CPU 102 sets the grace game number to the grace specified value (for example, 30). It is set, a penalty low specified value (for example, 8) is set as the number of low disadvantage games in the number of penalty games, a penalty state flag as a disadvantage game state is set (S616), and the penalty setting process is completed.

If it is determined in step S613 that the internal winning combination is not included in the first winning combination group (NO), the sub CPU 102 determines whether or not the MB is operating, and the internal winning combination is the third winning combination. It is determined whether or not it is included in the role group (S617). Here, if it is determined that the MB is not in operation and the internal winning combination is not included in the third winning combination group (NO), the sub CPU 102 ends the penalty setting process.

On the other hand, if it is determined that the MB is operating or the internal winning combination is included in the third winning combination group (YES), the sub CPU 102 sets the grace game number to the grace rule value, and the penalty game. A high penalty value (for example, 20) is set as the number of highly disadvantaged games, a penalty state flag is set (S618), and the penalty setting process ends.

If it is determined in step S611 that the sub-game state is neither general nor high ART probability (NO), the sub CPU 102 determines whether or not the sub-game state is waiting for normal return (NO). S619).

Here, if it is determined that the sub-game state is not waiting for the normal return (NO), the sub CPU 102 ends the penalty setting process. On the other hand, when it is determined that the sub-game state is waiting for the normal return (YES), the sub CPU 102 includes whether or not the MB is operating, and the internal winning combination is included in the fourth winning combination group. Whether or not it is determined (S620).

Here, if it is determined that the MB is not in operation and the internal winning combination is not included in the fourth winning combination group (NO), the sub CPU 102 ends the penalty setting process. On the other hand, if it is determined that the MB is operating or the internal winning combination is included in the fourth winning combination group (YES), the sub CPU 102 sets the grace game number to the grace rule value, and the penalty game. A high penalty value is set for the number, a penalty state flag is set (S621), and the penalty setting process ends. In this way, the sub CPU 102 configures the grace game number setting means by executing the penalty setting process in addition to executing the fail-safe process described above.

If the penalty state flag is already set in steps S616, S618 or S621, the sub CPU 102 may add the grace specified value to the number of grace games.

Further, when the penalty state flag is already set in steps S616, S618 or S621, the sub CPU 102 has a low penalty value or a high penalty value according to each step (hereinafter, simply "penalty value"). (Also known as) may be added to the number of penalty games.

Further, in step S616, S618 or S621, when the penalty state flag is already set, the sub CPU 102 sets the grace game number to the grace game number on the condition that the grace game number is smaller than the grace game number. You may try to do it.

Further, in step steps S616, S618 or S621, when the penalty state flag is already set, the sub CPU 102 sets the penalty specified value in the number of penalty games on condition that the number of penalty games is smaller than the penalty specified value. You may try to do it.

<Lottery processing according to the second game state>
FIG. 121 is a flowchart showing a second game state-based lottery process executed in step S601 of the process at the time of receiving the winning operation command shown in FIG. 119.

First, the sub CPU 102 determines whether or not the sub game state is "general" (S630). Here, when it is determined that the sub-game state is "general middle" (YES), the sub CPU 102 executes the third general middle lottery process shown in FIG. 134 (S631), and the second game state-specific lottery End the process.

If it is determined in step S630 that the sub-game state is not "general medium" (NO), the sub CPU 102 determines whether or not the sub-game state is "ART high probability" (S632). Here, when it is determined that the sub-game state is “ART high probability medium” (YES), the sub CPU 102 executes the third ART high probability medium lottery process shown in FIG. 138 (S633), and the second game The lottery process for each state is completed.

If it is determined in step S632 that the sub-game state is not "ART high probability" (NO), the sub CPU 102 determines whether or not the sub-game state is "ART preparing" (S634). Here, when it is determined that the sub-game state is "ART preparing" (YES), the sub CPU 102 executes the second ART-preparing lottery process shown in FIG. 140 (S635), and is classified by the second game state. The lottery process is finished.

If it is determined in step S634 that the sub-game state is not "ART preparing" (NO), the sub CPU 102 determines whether or not the sub-game state is "ART in progress" (S636). Here, when it is determined that the sub-game state is "ART" (YES), the sub CPU 102 executes the second ART-in-time lottery process shown in FIG. 143 (S637), and the second game state-specific lottery process. To finish. On the other hand, if it is determined that the sub-game state is not "ART in" (NO), the sub CPU 102 ends the second game state-specific lottery process.

<Processing when receiving an error command>
FIG. 122 is a flowchart showing an error command reception time process executed in step S534 of the effect content determination process shown in FIG. 114.

First, the sub CPU 102 determines whether or not the error command data includes the error occurrence state detected by the main CPU 93 (S640). Here, when it is determined that the error command data includes the error occurrence state detected by the main CPU 93 (YES), the sub CPU 102 determines the error occurrence state detected by the main CPU 93 in the error management area (FIG. 83). (See)) (S641).

If it is determined in step S640 that the error command data does not include the error occurrence state detected by the main CPU 93 (NO), the sub CPU 102 sets the error release state in which the error command data is detected by the main CPU 93. It is determined whether or not it is included (S642).

Here, if it is determined that the error command data does not include the error release state detected by the main CPU 93 (NO), the sub CPU 102 ends the error command reception processing.

On the other hand, when it is determined that the error command data includes the error release state detected by the main CPU 93 (YES), the sub CPU 102 sets the error release state detected by the main CPU 93 in the error management area (see FIG. 83). ) (S643) to end the processing when an error command is received.

<Processing when no operation command is received>
FIG. 123 is a flowchart showing a non-operation command reception time process executed in step S536 of the effect content determination process shown in FIG. 114.

First, the sub CPU 102 stores the state of the input port transmitted by the main CPU 93 in the storage area (non-operation command input information) allocated to the sub RAM 104 with no operation command (S650). The data added to the non-operation command is the state of the input port input by the main CPU 93.

Subsequently, the sub CPU 102 executes the fourth addition selection selection lottery process shown in FIGS. 147 and 148 (S651), executes the step-up effect sequence state transition process shown in FIG. 124 (S652), and receives no operation command. End the time processing.

<Step-up effect sequence state transition process>
FIG. 124 is a flowchart showing a step-up effect sequence state transition process executed in step S652 of the no-operation command reception process shown in FIG. 123.

First, the sub CPU 102 determines whether or not the step count (value of the step counter) is larger than 0 (S660). Here, if it is determined that the step count is not greater than 0 (NO), the sub CPU 102 ends the step-up effect sequence state transition process.

On the other hand, when it is determined that the step count is larger than 0 (YES), the sub CPU 102 adds 1 to the value of the no-operation command reception counter (S661). Next, the sub CPU 102 determines whether or not the trigger of the effect data corresponding to the step count of the step-up sequence table (see FIG. 71) is “0” (S662).

Here, if it is determined that the trigger is not "0" (NO), the sub CPU 102 executes the special step-up process shown in FIG. 125 (S663), and ends the step-up effect sequence state transition process.

On the other hand, when it is determined that the trigger is "0" (YES), the sub CPU 102 determines whether or not the value of the no-operation command reception counter is equal to or greater than the step count (S664). Here, if it is determined that the value of the non-operation command reception counter is not equal to or greater than the step count (NO), the sub CPU 102 ends the step-up effect sequence state transition process.

On the other hand, when it is determined that the value of the no-operation command reception counter is equal to or greater than the step count (YES), the sub CPU 102 updates the step-up sequence table (S665). Specifically, the sub CPU 102 refers to the following effect data in the step-up sequence table.

Next, the sub CPU 102 determines whether or not the effect data referred to in the step-up sequence table is the table end (S666). Here, if it is determined that the effect data is the table end (YES), the sub CPU 102 sets the step count to 0 (S667), and ends the step-up effect sequence state transition process.

Although not shown in FIG. 71, it is between the divisions of the table divided by the lock number (for example, between the final data of the lock number "1" and the start data of the lock number "2", and the lock number. Below the final data of "6"), the table ends of the step-up sequence table are arranged respectively. Generally, 0xffff and -1 are used for the table end, and the same applies to the present embodiment.

On the other hand, when it is determined that the effect data is not the table end (NO), the sub CPU 102 executes the step-up effect registration process (S668) shown in FIG. 126, and ends the step-up effect sequence state transition process. By executing this step-up effect sequence state transition process, the sub CPU 102 constitutes the effect execution means.

<Special step-up processing>
FIG. 125 is a flowchart showing a special step-up process executed in step S663 of the step-up effect sequence state transition process shown in FIG. 124.

First, the sub CPU 102 determines whether or not the trigger of the effect data referred to in the step-up sequence table is "1" (S670). Here, when it is determined that the trigger is "1" (YES), the sub CPU 102 determines whether or not the non-operation command input information is the MAX bet button, and the value of the non-operation command reception counter is a step. It is determined whether or not the count is equal to or higher than the count (S671).

Here, if it is determined that the non-operation command input information is not the MAX bet button and the value of the non-operation command reception counter is not equal to or greater than the step count (NO), the sub CPU 102 ends the special step-up process. ..

On the other hand, when it is determined that the non-operation command input information is the MAX bet button or the value of the non-operation command reception counter is equal to or greater than the step count (YES), the sub CPU 102 updates the step-up sequence table. (S672).

If it is determined in step S670 that the trigger is not "1" (NO), the sub CPU 102 determines whether or not the value of the non-operation command reception counter is equal to or greater than the step count, and the value of the notification game counter is directly added to ART. It is determined whether or not the number of notification games is less than the number of games, and whether or not the trigger of the step-up sequence table is 2. (S673).

Here, when it is determined that the value of the non-operation command reception counter is not equal to or more than the step count, the value of the notification game counter is not less than the number of ART direct-load notification games, or the trigger of the step-up sequence table is not 2 (NO). ), The sub CPU 102 ends the special step-up process.

On the other hand, when it is determined that the value of the non-operation command reception counter is equal to or greater than the step count, the value of the notification game counter is less than the number of ART direct-add notification games, and the trigger of the step-up sequence table is 2. (YES), the sub CPU 102 adds 1 to the value of the notification game counter, and changes the step-up sequence table to the set position where the trigger is “1” (S674). Specifically, the sub CPU 102 refers to the effect data in which the trigger is set to "1" in the step-up sequence table.

After executing the process of step S672 or S674, the sub CPU 102 executes the step-up effect registration process shown in FIG. 126 (S675), and ends the special step-up process.

By executing this special step-up process, each time the sub CPU 102 determines YES in step S671, the divided value and the integrated value of the divided values are divided by dividing the number of additional games of ART based on the value counted by the special counter. An image control means for sequentially displaying information representing at least one of the values on the liquid crystal display device 11 is configured.

For example, when the value counted by the special counter is 5 and the number of additional games of ART is 500 games, the sub CPU 102 determines YES five times in step S671.

In this case, each time the sub CPU 102 determines YES in step S671, the liquid crystal display device 11 sequentially displays information indicating the number of additional games of 100 games as a divided value obtained by dividing 500 games evenly by 5.

Here, each time the sub CPU 102 determines YES in step S671, the sub CPU 102 divides 500 games into 5 unevenly, for example, 50 games, 100 games, 50 games, 100 games, and 200 additional games. The information representing the number may be sequentially displayed on the liquid crystal display device 11.

Further, each time the sub CPU 102 determines YES in step S671, the total number of divided values obtained by dividing 500 games by 5 is, for example, the number of additional games of 100 games, 200 games, 300 games, 400 games, and 500 games. The information representing the above may be sequentially displayed on the liquid crystal display device 11.

<Step-up production registration process>
FIG. 126 is a flowchart showing a step-up effect registration process executed in step S668 of the step-up effect sequence state transition process shown in FIG. 124 and step S675 of the special step-up process shown in FIG. 125.

First, the sub CPU 102 acquires the registration data from the step-up sequence table (S680). Next, the sub CPU 102 sets the count value of the registered data to the value of the step counter (S681).

Next, the sub CPU 102 sets the animation data of the registration data in the animation data determination processing area (S682), and sets the lamp data of the registration data in the lamp data determination processing area (S683).

Next, the sub CPU 102 sets the sound data of the registered data in the sound data determination processing area (S684), sets the shutter operation data of the registered data in the shutter operation data determination processing area (S685), and steps up. Finish the registration process.

<Power failure detection processing>
FIG. 127 is a flowchart showing a power failure detection process executed when it is detected that the power supply is cut off by the sub CPU 102.

In the present embodiment, when the power supply voltage becomes 10.5 V or less, a power failure detection circuit (not shown) in the sub-control board 42 generates NMI (Non-Maskable Interrupt) in the sub CPU 102, and this NMI interrupt The power failure detection process is executed at. In the power failure detection process, the sub CPU 102 turns on the power failure detection flag stored in the SRAM constituting the sub RAM 104 (S690).

That is, the sub CPU 102 keeps the power detection flag in the off state when it is restarted by the WDT 108. In the present embodiment, when the power failure detection circuit detects a drop in the power supply voltage, NMI is generated in order to cause the sub CPU 102 to execute the power failure detection process, but the present invention is not limited to this. When a drop in the power supply voltage is detected in another external interrupt provided in the sub CPU 102 or a process that is repeatedly executed at a fixed cycle such as the main task, the power failure detection process is executed. May be good.

<Power recovery processing>
FIG. 128 is a flowchart showing a power failure recovery process executed in step S378 of the power-on process shown in FIG. 101.

First, the sub CPU 102 initializes the work area of the sub RAM 104, particularly the DRAM constituting the sub RAM 104 (S700). Next, the sub CPU 102 determines whether or not the power interruption detection flag is ON (S701).

Here, if it is determined that the power failure detection flag is ON (YES), the sub CPU 102 executes the backup storage area consistency check process (S702). Specifically, the sub CPU 102 executes a checksum of the backup storage area of the SRAM constituting the subRAM 104, and if the execution result of the checksum is normal, copies the data of the backup storage area to the work area.

Next, the sub CPU 102 turns off the power failure detection flag, turns off the power failure detection abnormality flag (S703), and ends the power failure recovery process. On the other hand, when it is determined that the power failure detection flag is OFF (YES), the sub CPU 102 turns on the power failure detection abnormality flag (S704) and ends the power failure recovery process.

<1st general lottery processing>
FIG. 129 is a flowchart showing a first general middle lottery process executed in step S571 of the first game state-based lottery process shown in FIG. 117.

First, the sub CPU 102 executes the general middle game first lottery process shown in FIG. 130 (S710). Next, the sub CPU 102 determines whether or not the ART direct hit flag is OFF (S711).

Here, when it is determined that the ART direct hit flag is OFF (YES), the sub CPU 102 determines whether or not the number of penalty games is 0 (S712). Here, if it is determined that the number of penalty games is 0 (YES), the sub CPU 102 subtracts 1 from the number of ART high-probability activation games (S713).

If it is determined in step S712 that the ART direct hit flag is OFF (NO), the sub CPU 102 determines whether or not the number of ART direct hit activation standby games is 0 or more (S714). Here, when it is determined that the number of ART direct hit activation standby games is 0 or more (YES), the sub CPU 102 subtracts 1 from the number of ART direct hit activation standby games (S715).

In step S712, when it is determined that the number of penalty games is not 0 (NO), or in step S714, when it is determined that the number of ART direct hit activation standby games is not 0 or more (NO), or in step S713 or step S715. After executing the process of (S716), the sub CPU 102 executes the ART addition selection stock lottery process shown in FIG. 131 (S716).

Next, the sub CPU 102 executes the ART direct hit lottery process shown in FIG. 132 (S717), executes the mini-slot lottery process (S718), and ends the first general middle lottery process. Here, in the mini-slot lottery process, when the replay wins three consecutive times, the mini-slot lottery is performed, and whether or not the ART is won is determined by the lottery result.

As for the winning probability of the mini-slot lottery, 3% and 25% are selected with a probability of 50% each when the replay wins three times in a row, and 25% is selected when the replay wins four times in a row. The result of the mini-slot lottery is displayed by the effect of the sub CPU 102 as the result of the lottery by the slot machine displayed on the liquid crystal display device 11.

<1st game lottery processing in general>
FIG. 130 is a flowchart showing the first general middle game lottery process executed in step S710 of the first general middle lottery process shown in FIG. 129.

First, the sub CPU 102 sets the provisional gaming state to "general medium" (S720). Next, the sub CPU 102 sets the ceiling specified value in the number of ceiling games (S721). Next, the sub CPU 102 turns on the ART end flag (S722).

Next, the sub CPU 102 determines whether or not the ART end flag is ON (S723). Here, when it is determined that the ART end flag is ON (YES), the sub CPU 102 sets "ART end" in the game number management mode lottery type (S724).

On the other hand, when it is determined that the ART end flag is not ON (NO), the sub CPU 102 determines whether or not the ART high probability end flag is ON (S725). Here, if it is determined that the ART high probability end flag is not ON (NO), the sub CPU 102 ends the general middle 1st game lottery process.

On the other hand, when it is determined that the ART high probability end flag is ON (YES), or after executing the process of step S724, the sub CPU 102 turns off the ART end flag (S726) and sets the ART high probability end flag. It is turned off (S727), and the lottery process for the first game in general is completed.

<ART additional selection stock lottery processing>
FIG. 131 is a flowchart showing an ART addition selection stock lottery process executed in step S716 of the first general middle lottery process shown in FIG. 129.

First, the sub CPU 102 determines whether or not the penalty state flag is ON, and whether or not the RT gaming state is greater than 1 (S730). Here, if the penalty state flag is ON or it is determined that the RT game state is greater than 1 (YES), the sub CPU 102 ends the ART addition selection stock lottery process.

On the other hand, when it is determined that the penalty state flag is not ON and the RT game state is not greater than 1 (NO), the sub CPU 102 determines whether the ART direct hit flag is ON and the MB is not activated. In, it is determined whether or not the internal winning combination is a "medium chelip" or a "confirmed bell" (S731).

Here, when it is determined that the ART direct hit flag is not ON, the MB is not inactive, and the internal winning combination is neither "medium chelip" nor "confirmed bell" (NO), the sub CPU 102 determines. The ART addition selection stock lottery process is completed.

On the other hand, when it is determined that the ART direct hit flag is ON, or the MB is not operating and the internal winning combination is "medium chelip" or "confirmed bell" (YES), the sub CPU 102 is the first normal. The additional selection lottery process is executed (S732), and the ART additional selection stock lottery process is completed.

<ART direct hit lottery processing>
FIG. 132 is a flowchart showing an ART direct hit lottery process executed in step S717 of the first general middle lottery process shown in FIG. 129.

First, the sub CPU 102 determines whether or not the penalty state flag is ON, and whether or not the RT gaming state is greater than 1 (S740). Here, if the penalty state flag is ON or it is determined that the RT game state is greater than 1 (YES), the sub CPU 102 ends the ART direct hit lottery process.

On the other hand, when it is determined that the penalty state flag is not ON and the RT game state is not greater than 1 (NO), the sub CPU 102 determines whether or not the ART direct hit flag is ON (S741). Here, when it is determined that the ART direct hit flag is ON (YES), the sub CPU 102 performs the ART direct hit lottery based on the ART direct hit lottery table shown in FIG. 69 (S742).

Next, the sub CPU 102 determines whether or not the lottery result of the ART direct hit lottery is non-winning (S743), and if it is determined that the lottery result is non-winning (YES), the ART direct hit lottery process is performed. finish.

On the other hand, when it is determined that the lottery result is not non-winning, that is, the lottery result is winning (NO), the sub CPU 102 turns on the ART direct hit flag (S744). Next, the sub CPU 102 sets a predetermined ART specified value in the number of remaining ART games (hereinafter referred to as “the number of remaining ART games”) (S745), and ends the ART direct hit lottery process.

<Second general lottery processing>
FIG. 133 is a flowchart showing a second general middle lottery process executed in step S572 of the first game state-based lottery process shown in FIG. 117.

First, the sub CPU 102 determines whether or not the ART direct hit flag is ON (S750). Here, when it is determined that the ART direct hit flag is ON (YES), the sub CPU 102 sets "ART in progress" to the provisional gaming state (S751). Next, the sub CPU 102 executes the second normal addition selection lottery process shown in FIG. 155 (S752).

On the other hand, when it is determined that the ART direct hit flag is not ON (NO), the sub CPU 102 determines whether or not the number of ART high probability activation games is 0 (S754). Here, when it is determined that the number of ART high probability activation games is 0 (YES), the sub CPU 102 turns on the ART high probability transition flag (S755), and sets "ART high probability" in the provisional game state. (S756).

In step S754, when it is determined that the number of ART high-probability activation games is not 0 (NO), or after the processing of steps S752 or S756 is completed, the sub CPU 102 changes the game state when the first lock occurs as shown in FIG. 149. The process is executed (S757), and the second general middle lottery process is completed.

<Third general lottery processing>
FIG. 134 is a flowchart showing a third general middle lottery process executed in step S631 of the second game state-based lottery process shown in FIG. 121.

First, the sub CPU 102 executes the transition process during the second game state ART shown in FIG. 117 (S760). Next, the sub CPU 102 executes the game state transition process at the time of the second lock occurrence (S761) shown in FIG. 115, and ends the third general middle lottery process.

<1st ART high probability medium lottery processing>
135 and 136 are flowcharts showing the first ART high-probability medium lottery process executed in step S574 of the first game state-based lottery process shown in FIG. 117.

First, the sub CPU 102 determines whether or not the ART high probability transition flag is ON (S770). Here, when it is determined that the ART high probability transition flag is ON (YES), the sub CPU 102 turns off the ART high probability transition flag (S771), and the ART high probability specified value is set to the number of ART high probability remaining games. Is set (S772).

In step S770, when it is determined that the ART high probability transition flag is not ON (NO), or after executing the process of step S772, the sub CPU 102 determines whether or not the RT gaming state is greater than 1 (S773). ..

Here, if it is determined that the RT game state is not greater than 1 (NO), the sub CPU 102 determines whether or not the number of games waiting to activate the outlier revival is greater than 0 (S774). Here, if it is determined that the number of games waiting to activate the out-of-court revival is greater than 0 (YES), the sub CPU 102 subtracts 1 from the number of games waiting to activate the out-of-court revival (S775).

In step S773, when it is determined that the RT game state is greater than 1 (YES), in step S774, when it is determined that the number of games waiting for the activation of the outlier revival is not greater than 0 (NO), or the process of step S775 is executed. After that, the sub CPU 102 determines whether or not the penalty state flag is ON and whether or not the RT game state is greater than 1 (S776).

Here, when the penalty state flag is ON or it is determined that the RT game state is greater than 1 (YES), the sub CPU 102 adds 1 to the total number of ART high-probability games (S777).

Next, the sub CPU 102 determines whether or not the missed resurrection flag is ON, and whether or not the number of games waiting to activate the missed resurrection is 0 (S778). Here, when it is determined that the missed resurrection flag is ON and the number of games waiting to activate the missed resurrection is 0 (YES), the sub CPU 102 executes the first normal addition selection lottery process shown in FIG. 154. (S779).

In S776, when it is determined that the penalty state flag is not ON and the RT game state is not greater than 1 (NO), in S778, it is determined that the missed resurrection flag is not ON or the number of games waiting to activate the missed resurrection is not 0. Case (NO), or after executing the process of step S779, the sub CPU 102 determines whether or not the MB is inactive (S780).

Here, if it is determined that the MB is not operating (YES), the sub CPU 102 subtracts 1 from the number of ART high-probability remaining games (S781). On the other hand, when it is determined that the MB is not inactive (NO), that is, when it is determined that the MB is in operation, or after the processing of step S781 is executed, the sub CPU 102 receives a reel action lottery in the main CPU 93. It is determined whether or not the reel wins (S782).

Here, if it is determined that the missed reel action lottery has been won (YES), the sub CPU 102 adds 1 to the number of times the aim has occurred (S783). Next, the sub CPU 102 determines whether or not the result of the detached reel action lottery is "next lever alignment" (S784).

Here, when it is determined that the result of the detached reel action lottery is "next lever alignment" (YES), the sub CPU 102 determines whether or not the detached recovery flag is OFF (S785).

Here, when it is determined that the missed resurrection flag is OFF (YES), the sub CPU 102 turns on the missed resurrection flag (S786), and sets the ART high probability missed resurrection activation default value to the number of games waiting to activate the missed resurrection. Set (S787).

In step S782, when it is determined that the missed reel action lottery has not been won (NO), in step S785, when it is determined that the missed recovery flag is not OFF (NO), or after executing the process of step S787. , The sub CPU 102 determines whether or not the confirmation standby flag is OFF, and whether or not the off-reel action state acquired from the main at the start of the game is "confirmed" (S788).

Here, when the confirmation standby flag is OFF and it is determined that the off-reel action state acquired from the main at the start of the game is "confirmed" (YES), the sub CPU 102 turns on the confirmation standby flag. (S789).

In step S788, when it is determined that the confirmation standby flag is not OFF, or the off-reel action state acquired from the main at the start of the game is not "confirmed" (NO), or after executing the process of step S789, the sub CPU 102 Determines whether or not the confirmation wait flag is ON (S790).

Here, if it is determined that the fixed waiting flag is NO (YES), the sub CPU 102 adds 1 to the number of fixed waiting games (S791). When it is determined that the confirmation wait flag is not NO (NO), or after the process of step S791 is executed, the sub CPU 102 ends the first ART high probability medium lottery process.

<2nd ART high probability medium lottery processing>
FIG. 137 is a flowchart showing the second ART high-probability medium lottery process executed in step S575 of the first game state-based lottery process shown in FIG. 117.

First, the sub CPU 102 determines whether or not the missed resurrection flag is ON and whether or not the number of games waiting to activate the missed resurrection is 0 (S800). Here, if it is determined that the missed resurrection flag is not ON or the number of games waiting to activate the missed resurrection is not 0 (NO), the sub CPU 102 determines whether the RT game state is less than 2 and the MB is not activated. It is determined whether or not the internal winning combination of the time is "SB Lip 1" or "SB Lip 2" (S801).

In step S801, when it is determined that the RT game state is not less than 2 or the internal winning combination when the MB is not activated is not "SB lip 1" or "SB lip 2" (NO), the sub CPU 102 is set to a fixed standby rule. It is determined whether or not the number of games is not 0 and whether or not the number of fixed waiting games is equal to or greater than the fixed waiting specified number of games (S802).

If it is determined in step S802 that the number of fixed waiting games is 0 or the number of fixed waiting games is not equal to or greater than the fixed waiting specified number (NO), the sub CPU 102 executes the game stop for displaying the effect of the game start command. It is determined whether or not the number is "6" (S806).

If it is determined in step S806 that the game stop execution number for displaying the effect of the game start command is not "6" (NO), the sub CPU 102 determines whether or not the number of ART high-probability remaining games is 0. (S807).

If it is determined in step S807 that the number of ART high-probability remaining games is 0 (YES), the sub CPU 102 has an ART high-probability remaining game based on an additional lottery table (not shown) for the number of ART high-probability remaining games. The addition lottery process for the number of games is executed (S808).

Next, the sub CPU 102 adds the lottery result of the lottery process for adding the number of remaining ART high-probability games to the number of high-probability ART remaining games (S809). Next, the sub CPU 102 determines whether or not the number of ART high-probability remaining games is 0 (S810). Here, when it is determined that the number of ART high-probability remaining games is 0 (YES), the sub CPU 102 executes the game state general middle transition process shown in FIG. 153 (S811).

In step S800, when it is determined that the missed resurrection flag is ON and the number of games waiting to activate missed resurrection is 0 (YES), in step S801, the RT game state is less than 2 and the MB is not activated. When it is determined that the internal winning combination at the time is "SB Lip 1" or "SB Lip 2" (YES), in step S802, the number of fixed waiting specified games is 0 or the number of fixed waiting games is the fixed waiting specified game. If it is determined that the number is not more than the number (YES), or if it is determined in step S806 that the game stop execution number for displaying the effect of the game start command is “6” (YES), the sub CPU 102 is shown in FIG. 151. The transition process during the first game state ART shown in (S813) is executed. Next, the sub CPU 102 adds the specified ART value to the number of remaining ART games (S814).

In step S807, when it is determined that the number of ART high-probability remaining games is not 0 (NO), in step S810, it is determined that the number of ART high-probability remaining games is not 0 (NO), or the process of step S811 is executed. After that, the sub CPU 102 executes the game state transition process at the time of the first lock occurrence (S812) shown in FIG. 149, and ends the second ART high probability medium lottery process.

<Third ART high probability medium lottery processing>
FIG. 138 is a flowchart showing the third ART high-probability medium lottery process executed in step S633 of the second game state-based lottery process shown in FIG. 121.

First, the sub CPU 102 executes the transition process during the second game state ART shown in FIG. 152 (S820). Next, the sub CPU 102 executes the game state transition process at the time of the second lock occurrence (S821) shown in FIG. 150, and ends the third ART high probability medium lottery process.

<Lottery processing during preparation for the 1st ART>
FIG. 139 is a flowchart showing the first ART preparing lottery process executed in step S577 of the first game state-based lottery process shown in FIG. 117.

First, the sub CPU 102 executes the lottery process for directly riding the number of ART games shown in FIG. 156 (S830). Next, the sub CPU 102 performs a normal additional selection lottery for selecting the number of games to be added to the ART based on the normal additional selection lottery table shown in FIGS. 60 and 61 (S831).

Here, the sub CPU 102 determines whether or not the lottery result of the normal additional selection lottery is the winning (S832). When it is determined that the lottery result is the winning (YES), the sub CPU 102 sets the lottery result in the basic payout table of the stock individual information (S833).

Next, the sub CPU 102 sets the stock flag of the stock individual information to "additional selection per" (S834). Next, the sub CPU 102 performs an additional selection continuous state lottery to draw the continuous state of the additional selection based on the ART additional selection continuous state lottery table shown in FIGS. 58 and 59 (S835).

Next, the sub CPU 102 sets the result of the additional selection continuation state lottery to the continuation state of the stock individual information (S836). Next, the sub CPU 102 stocks the stock individual information in the storage area allocated to the sub RAM 104 (S837).

In step S832, when it is determined that the lottery result of the normal additional selection lottery is not the winning (NO), or after executing the process of step S837, the sub CPU 102 uses the additional game lottery table shown in FIG. An additional game lottery is performed to determine whether or not to perform an additional game (S838).

Here, the sub CPU 102 determines whether or not the lottery result of the additional game lottery is the winning (S839). Here, when it is determined that the lottery result is a win (YES), the sub CPU 102 sets the lottery result to the stock flag of the stock individual information as "additional game" (S840), and sets the stock individual information to the sub RAM 104. Stock in the storage area allocated to (S841).

In step S839, when it is determined that the lottery result of the additional game lottery is not a win (NO), or after executing the process of step S841, the sub CPU 102 sets the provisional game state to "ART" (S842). , The first ART preparation The lottery process is completed.

<Lottery processing during preparation for 2nd ART>
FIG. 140 is a flowchart showing a second ART preparing lottery process executed in step S635 of the second game state-based lottery process shown in FIG. 121.

First, the sub CPU 102 determines whether or not the provisional gaming state is “during ART” (S850). Here, if it is determined that the provisional gaming state is not "ART in progress" (NO), the sub CPU 102 ends the second ART preparing lottery process.

On the other hand, when it is determined that the provisional game state is "ART in progress" (YES), the sub CPU 102 determines whether or not the RT game state is 0, and the internal winning combination is "middle correct answer bell", "right 312". It is determined whether or not the answer bell is "correct bell" or "right 321 correct answer bell" and whether or not the first stop reel is other than the left reel 3L (S851).

Here, it is determined that the RT game state is 0, the internal winning combination is "middle correct answer bell", "right 312 correct answer bell" or "right 321 correct answer bell", and the first stop reel is other than the left reel 3L. If (YES), the sub CPU 102 ends the second ART preparing lottery process.

On the other hand, when it is determined that the RT game state is not 0, the internal winning combination is not "middle correct answer bell", "right 312 correct answer bell" or "right 321 correct answer bell", or the first stop reel is not other than the left reel 3L. (YES), the sub CPU 102 determines whether or not the RT gaming state after the third stop reel is stopped is 3 or more (S852).

Here, if it is determined that the RT gaming state after the third stop reel has stopped is 3 or more (YES), the sub CPU 102 ends the second ART preparing lottery process. On the other hand, when it is determined that the RT gaming state after the third stop reel is stopped is not 3 or more (NO), the sub CPU 102 sets the provisional gaming state to "ART preparing" (S853), and the second ART. Preparing Finish the lottery process.

<Lottery processing during the 1st ART>
141 and 142 are flowcharts showing the lottery process during the first ART executed in step S579 of the lottery process according to the first game state shown in FIG. 117.

First, the sub CPU 102 executes the lottery process for directly riding the number of ART games shown in FIG. 156 (S860). Next, the sub CPU 102 performs an ART addition selection lottery for selecting the number of games to be added to the ART based on the ART addition selection lottery table shown in FIGS. 58 and 59 (S861).

Here, the sub CPU 102 determines whether or not the lottery result of the ART addition selection lottery is the winning (S862). Here, when it is determined that the lottery result is the winning (YES), the sub CPU 102 stores the lottery result in the basic payout table of the stock individual information (S863).

Next, the sub CPU 102 sets the stock flag of the stock individual information to "additional selection per" (S864). Next, the sub CPU 102 performs an additional selection continuous state lottery to draw the continuous state of the additional selection based on the additional selection continuous state lottery table shown in FIG. 66 (S865). Next, the sub CPU 102 sets the result of the additional selection continuation state lottery to the continuation state of the stock individual information (S866).

In step S862, when it is determined that the lottery result of the ART addition selection lottery is not a win (NO), or after executing the process of step S866, the sub CPU 102 has the MB not activated and the internal winning combination is "RT4 transition A". "Or" RT4 transition B "(S867). Here, "RT4 transition A" or "RT4 transition B" corresponds to a special role.

Here, when it is determined that the MB is not activated and the internal winning combination is "RT4 transition A" or "RT4 transition B" (YES), based on the ART additional game direct alignment lottery table shown in FIG. 70. , ART is added to the game, and a lottery is performed (S868).

Here, the sub CPU 102 determines whether or not the lottery result of the ART-added game direct-matched lottery is the winning (S869). Here, when it is determined that the lottery result is the winning (YES), the sub CPU 102 sets the "additional game" to the stock flag of the stock individual information (S870). Next, the sub CPU 102 stocks the stock individual information in the storage area allocated to the sub RAM 104 (S871).

In step S867, when it is determined that the MB is not activated and the internal winning combination is not "RT4 transition A" or "RT4 transition B" (NO), or when it is determined that the lottery result of the ART additional game direct match lottery is not the winning (NO). NO) or after executing the process of step S871, the sub CPU 102 executes the additional game stock lottery process shown in FIG. 157 (S872).

Next, the sub CPU 102 determines whether or not the number of remaining ART games is greater than 0, whether or not the additional game flag is OFF, and whether or not the additional game flag after pseudo BB is OFF (S880).

Here, when it is determined that the number of remaining ART games is larger than 0, the additional game flag is OFF, and the additional game flag after pseudo BB is OFF (YES), the sub CPU 102 is 1 from the number of remaining ART games. Is subtracted (S881).

On the other hand, when it is determined that the number of remaining ART games is not greater than 0, the additional game flag is not OFF, or the additional game flag after pseudo BB is not OFF (NO), or after the process of step S881 is executed, The sub CPU 102 adds 1 to the total number of ART games (S882).

Next, the sub CPU 102 sets the provisional gaming state to "during ART" (S883). Next, the sub CPU 102 determines whether or not the "additional game" is set in the stock flag being released (S885).

Here, when it is determined that the "additional game" is set in the stock flag being released (YES), the sub CPU 102 sets the provisional game state to the "additional game" (S886). On the other hand, if it is determined that "additional game" is not set in the stock flag being released (NO), the sub CPU 102 determines whether or not "additional selection hit" is set in the stock flag being released. Judgment (S887).

Here, when it is determined that "additional selection per" is set in the stock flag being released (YES), the sub CPU 102 sets the provisional gaming state to "additional selection in progress" (S888).

On the other hand, when it is determined that "additional selection per" is not set in the stock flag being released (NO), the sub CPU 102 discards the stock being released (S889). Next, the sub CPU 102 sets the stock type of the stock being released to "no stock being released" (S890).

After executing the process of steps S886, S888 or S890, the sub CPU 102 stocks in the storage areas A to D whether or not the provisional game state is "ART", whether or not the number of remaining ART games is 0, and so on. It is determined whether or not the individual information is stored and whether or not the additional game in-game flag is OFF (S891).

Here, when it is determined that the provisional game state is "ART in progress", the number of games remaining in ART is 0, the stock individual information is not stored in the storage areas A to D, and the additional game in-game flag is OFF. (YES), the sub CPU 102 performs an ART pullback lottery for drawing back the ART with a predetermined probability (S892).

Here, the sub CPU 102 determines whether or not the lottery result of the ART pullback lottery is "missing" (S893), and if it determines that the lottery result of the ART pullback lottery is not "missing" (NO), The lottery result is set in the ART pullback flag (S894), and the ART specified value is added to the number of remaining ART games (S895).

In step S893, when the sub CPU 102 determines that the lottery result of the ART pullback lottery is "missing" (YES), or after executing the process of step S895, the sub CPU 102 is set to the game number management mode lottery type. Set "ART end" (S896). Next, the sub CPU 102 sets the provisional game state to "general medium" (S897) and sets the ART end flag (S898).

In step S891, if the provisional game state is not "ART in", the number of remaining ART games is not 0, stock individual information is stored in any of the storage areas A to D, or the additional game in-game flag is not OFF. If it is determined (NO), or after executing the process of step S898, the sub CPU 102 ends the lottery process during the first ART.

<Lottery processing during the 2nd ART>
FIG. 143 is a flowchart showing the lottery process during the second ART executed in step S637 of the lottery process according to the second game state shown in FIG. 121.

First, the sub CPU 102 determines whether or not the provisional gaming state is "general" and the RT gaming state after the third stop reel is stopped is 2 or more (S900). Here, when it is determined that the provisional gaming state is "general" and the RT gaming state after the third stop reel is stopped is 2 or more (YES), the sub CPU 102 is set to the provisional gaming state. "Waiting for normal return" is set (S901). Next, the sub CPU 102 sets the ART end flag (S902).

In step S900, when it is determined that the provisional gaming state is not "general", or the RT gaming state after the third stop reel is stopped is not 2 or more (NO), or after executing the process of step S902. , The sub CPU 102 ends the lottery process during the second ART.

<Lottery processing during selection of 1st addition>
144 and 145 are flowcharts showing the first additional selection selected lottery process executed in step S581 of the first game state-based lottery process shown in FIG. 117.

First, the sub CPU 102 sets the contents of the used table in the payout table before shuffling (S910). Next, the sub CPU 102 determines whether or not the peep activation flag is "peep is in operation" (S911).

Here, when it is determined that the peep activation flag is "peep is in operation" (YES), the sub CPU 102 sets the peep activation flag to "none" (S912). On the other hand, if it is determined that the peep activation flag is not "peep is in operation" (NO), or after executing the process of step S912, the sub CPU 102 asks whether the peep activation flag is "with peep". It is determined whether or not (S913).

Here, when it is determined that the peeping activation flag is "with peeping" (YES), the sub CPU 102 sets the peeping activation flag to "during peeping operation" (S914). On the other hand, if it is determined that the peep activation flag is not "with peep" (NO), or after executing the process of step S913, the sub CPU 102 asks whether the peep activation flag is "peep is in operation". It is determined whether or not (S915).

Here, when it is determined that the peep activation flag is "peep is in operation" (YES), the sub CPU 102 performs an additional selection special function activation lottery based on the special function activation lottery table shown in FIG. 62. (S916).

Next, the sub CPU 102 determines whether or not the lottery result of the additional selection special function activation lottery is "crushed" (S917). Here, when it is determined that the lottery result of the additional selection special function activation lottery is "crushed" (YES), the sub CPU 102 is the number of elements to be crushed and displayed based on the crushed number lottery table shown in FIG. The number of additional selections to be crushed is drawn (S918). Next, the sub CPU 102 sets the lottery result as the number of crushed games (S919), and sets the number of additional selection determination games to 1 (S920).

If it is determined in step S917 that the lottery result of the additional selection special function activation lottery is not "crushed" (NO), the sub CPU 102 determines whether or not the lottery result of the additional selection special function activation lottery is "peeping". Is determined (S921).

If it is determined that the lottery result of the special function activation lottery is "peeping" (YES), the sub CPU 102 sets the peeping activation flag to "with peeping" (S922), and decides to add the addition. Set 2 to the number of games (S923).

If it is determined in step S921 that the lottery result of the additional selection special function activation lottery is not "peeping" (NO), the sub CPU 102 sets 1 to the number of additional selection determination games (S924).

In step S915, when it is determined that the peep activation flag is not "peep is in operation" (NO), or after executing the process of steps S920, S923 or S924, the sub CPU 102 has 1 additional selection determination game. It is determined whether or not it is (S925).

Here, when it is determined that the number of additional selection determination games is 1 (YES), the sub CPU 102 performs the additional selection continuous state lottery based on the additional selection continuous state lottery table shown in FIG. 66 (S926). ..

Next, the sub CPU 102 determines whether or not the lottery result of the additional selection continuation state lottery is "discontinued" (S927), and when it is determined that the lottery result of the additional selection continuation state lottery is not "discontinuity". (YES), the lottery result is set in the continuous state payout table (S928).

In step S925, when it is determined that the number of additional selection determination games is not 1 (NO), in step S927, when it is determined that the lottery result of the additional selection continuation state lottery is not "discontinued" (NO), or step S928. After executing the process of (S929), the sub CPU 102 determines whether or not the MB is inactive and the internal winning combination is "RT4 transition A" or "RT4 transition B" (S929).

Here, when it is determined that the MB is not operating and the internal winning combination is "RT4 transition A" or "RT4 transition B" (YES), the sub CPU 102 is drawn by the ART-added game directly aligned as shown in FIG. Based on the table, an ART-added game direct-matched lottery is performed (S930).

Here, the sub CPU 102 determines whether or not the lottery result of the ART-added game direct-matched lottery is the winning (S931). Here, if it is determined that the lottery result is a win (YES), the sub CPU 102 sets the stock flag of the stock individual information to "additional game" (S932).

In step S929, when it is determined that the MB is not activated and the internal winning combination is not "RT4 transition A" or "RT4 transition B" (NO), in step S931, if the lottery result of the ART additional game direct matching lottery is not the winning. If it is determined (NO), or after executing the process of step S932, the sub CPU 102 executes the additional game stock lottery process shown in FIG. 157 (S933).

Next, the sub CPU 102 randomly determines the arrangement of the table to be used (S934), subtracts 1 from the number of additional game determination games (S935), and ends the first additional selection selecting lottery process.

<Lottery processing during selection of 2nd addition>
FIG. 146 is a flowchart showing a second additional selection selected lottery process executed in step S582 of the first game state-based lottery process shown in FIG. 117.

First, the sub CPU 102 determines whether or not the number of additional selection determination games is 0 (S940), and if it determines that the number of additional selection determination games is 0 (YES), the addition shown in FIG. An additional selection continuation state lottery is performed based on the selection continuation state lottery table (S941).

Next, when the sub CPU 102 determines whether or not the lottery result of the additional selection continuation state lottery is "discontinued" (S942), and determines that the lottery result of the additional selection continuation state lottery is "discontinuity". (YES), the provisional game state is set to "during ART" (S943).

On the other hand, when it is determined that the lottery result of the additional selection continuation state lottery is not "non-continuation" (NO), the sub CPU 102 determines whether the lottery result of the additional selection continuation state lottery is "continuation D" to "continuation F". It is determined whether or not it is (S944).

Here, if it is determined that the lottery result of the additional selection continuous state lottery is any of "continuation D" to "continuation F" (YES), the sub CPU 102 sets the provisional game state to "ART". Then (S945), the stock release precursor flag is cleared (S946).

On the other hand, if it is determined that the lottery result of the additional selection continuous state lottery is neither "continuation D" to "continuation F" (NO), the sub CPU 102 sets the provisional game state to "additional selection in progress". (S947). If it is determined in step S940 that the number of additional selection determination games is not 0 (NO), the sub CPU 102 sets the provisional game state to "additional selection in progress" (S948).

After executing the process of steps S943, S946, S947 or S948, the sub CPU 102 sets "between BB flags" to the provisional game state if the pseudo BB winning state is ON (S949).

Next, the sub CPU 102 determines whether or not the number of additional selection determination games is 0 (S950), and if it determines that the number of additional selection determination games is 0 (YES), the acquisition of the number of additional games is permitted. Turn on the flag (S951).

On the other hand, if it is determined that the number of additional selection determination games is not 0, or after executing the process of step S951, the sub CPU 102 ends the second additional selection selecting lottery process.

<Lottery processing during selection of 4th addition>
147 and 148 are flowcharts showing a fourth additional selection selected lottery process executed in step S651 of the non-operation command reception process shown in FIG. 123.

First, the sub CPU 102 determines whether or not the additional game number acquisition permission flag is ON and the third stop reel has stopped (S960). Here, if it is determined that the addition game number acquisition permission flag is not ON, or it is not after the third stop reel has stopped (NO), the sub CPU 102 ends the fourth addition selection selecting lottery process.

On the other hand, if the additional game number acquisition permission flag is ON and it is determined that the third stop reel has stopped (YES), does the sub CPU 102 indicate whether the non-operation command input information represents the MAX bet button 14. It is determined whether or not (S961).

Here, when it is determined that the non-operation command input information represents the MAX bet button 14 (YES), the sub CPU 102 turns off the additional game number acquisition permission flag (S962), and the selected payout position (selected). The value corresponding to the element) is added to the number of remaining ART games (S963). Next, the sub CPU 102 sets the value corresponding to the selected payout position to the number of selection notification games (S964), and ends the fourth additional selection selecting lottery process.

If it is determined in step S961 that the non-operation command input information does not represent the MAX bet button 14 (NO), the sub CPU 102 determines whether or not the non-operation command input information represents the left stop button 17L. (S965).

Here, when it is determined that the non-operation command input information represents the left stop button 17L (YES), the sub CPU 102 also moves the selected payout position to the left by one element position, and the selected payout position is changed. If it is within the selectable range, the selected payout position is shifted to the left by one element position (S966), and the fourth additional selection selection lottery process is completed.

On the other hand, when it is determined that the non-operation command input information does not represent the left stop button 17L (NO), the sub CPU 102 determines whether or not the non-operation command input information represents the right stop button 17R (S967). ).

Here, when it is determined that the non-operation command input information represents the right stop button 17R (YES), the sub CPU 102 also moves the selected payout position to the right by one element position, and the selected payout position is changed. If it is within the selectable range, the selected payout position is shifted to the right by one element position (S968), and the fourth additional selection selection lottery process is completed.

On the other hand, when it is determined that the non-operation command input information does not represent the right stop button 17R (NO), the sub CPU 102 determines whether or not the non-operation command input information represents the middle stop button 17C (S969). ).

Here, when it is determined that the non-operation command input information represents the middle stop button 17C (YES), the sub CPU 102 changes the selected payout position even when the selected payout position is moved downward by one element position. If it is within the selectable range, the selected payout position is shifted downward by one element position (S970), and the fourth additional selection selecting lottery process is completed.

On the other hand, when it is determined that the non-operation command input information does not represent the middle stop button 17C (NO), the sub CPU 102 determines whether or not the non-operation command input information represents the selection button 18 or the enter button 19. (S971). Here, if it is determined that the non-operation command input information does not represent either the selection button 18 or the enter button 19 (NO), the sub CPU 102 ends the fourth addition selection selection lottery process.

On the other hand, when it is determined that the non-operation command input information represents the selection button 18 or the enter button 19 (YES), the sub CPU 102 determines whether or not the peep activation flag is "peep operation in progress". (S972).

Here, when it is determined that the peep activation flag is "peep is in operation" (YES), the sub CPU 102 sets the selected payout position to a random position (S973), and the fourth additional selected lottery is selected. End the process.

On the other hand, if it is determined that "peep operation is in progress" (NO), the sub CPU 102 sets the selected payout position to the position where the maximum payout can be obtained (S974), and ends the fourth additional selection selected lottery process. To do.

In addition, the above-mentioned "if the selective payout position can be selected even when the selective payout position is moved by one element position to the left (rightward or downward)" (S966, S968, upper part of S970). Specifically, is an execution condition of the process of determining the selective payout position that can be performed in the fourth additional selection selection lottery process and the process of moving the selectable payout position. For example, in FIG. 162, the left end of the middle row. When the left stop button 17L is pressed while the element (6th element) is selected, the selected dividend position moves to the rightmost element (5th element) in the upper row, but the selected dividend position is the element. If it is less than the number or exceeds the number of elements, the process of moving the selected dividend position by one element position is not performed. The same applies when the right stop button 17R and the middle stop button 17C, which will be described later, are pressed.

<Lottery processing during additional games>
The lottery process during the additional game is executed by the sub CPU 102 over a predetermined number of games (for example, 10 games) in step S584 of the lottery process according to the first game state shown in FIG. 117.

In the lottery process during the additional game, the sub CPU 102 notifies the stop operation of the reels 3L, 3C, and 3R so that the RT game state does not change from the RT4 game state, and the reel for favorably winning the small winning combination of the internal winning. Notifies the stop operation of 3L, 3C, and 3R.

Further, when the sub CPU 102 determines "RT4 transition A", "RT4 transition B", "BAR ten", "RT4K lip 1st", "RT4K lip 2nd" and "RT4K lip 3rd" as internal winning combinations. Sends a message urging the display of "BAR-BAR-BAR" along the valid line and a stop operation of the reels 3L, 3C and 3R for displaying "BAR-BAR-BAR" along the valid line. Notify.

Here, when "RT4 transition A" and "RT4 transition B" are determined as the internal winning combination, the sub CPU 102 adds 1 to the number of additional selection determination games.

<Game state transition processing when the first lock occurs>
FIG. 149 is a flowchart showing the game state transition process when the first lock occurs, which is executed in step S757 of the second general middle lottery process shown in FIG. 133.

First, the sub CPU 102 determines whether or not the effect display game stop execution number of the game start command is "6" (S980), and the effect display game stop execution number of the game start command is "6". If it is determined (YES), "ART in" is set in the provisional game state (S981).

In step S980, when it is determined that the game stop execution number for displaying the effect of the game start command is not "6" (NO), or after executing the process of step S981, the sub CPU 102 is in the game state when the first lock occurs. End the transition process.

<Game state transition processing when the second lock occurs>
FIG. 150 is a flowchart showing a game state transition process when a second lock occurs, which is executed in step S761 of the third general middle lottery process shown in FIG. 134 and step S821 of the third ART high probability medium lottery process shown in FIG. 138. Is.

First, the sub CPU 102 determines whether or not the effect display game stop execution number of the game start command is "6" (S990), and the effect display game stop execution number of the game start command is "6". If it is determined (YES), it is determined whether or not the RT gaming state after the third stop reel is stopped is less than 3, and the gaming state is "waiting for normal return" (S991).

Here, when it is determined that the RT gaming state after the third stop reel is stopped is less than 3 and the gaming state is "waiting for normal return" (NO), the sub CPU 102 is set to the provisional gaming state. "Preparing for ART" is set (S992).

On the other hand, if it is determined that the RT gaming state after the third stop reel is stopped is not less than 3, or the gaming state is not "waiting for normal return" (NO), the sub CPU 102 puts the "ART" in the provisional gaming state. "Medium" is set (S993).

When it is determined in step S990 that the game stop execution number for displaying the effect of the game start command is not "6" (NO), or after the process of step S992 or S993 is executed, the sub CPU 102 causes the second lock to occur. The game state transition process is terminated.

<Transition processing during the first game state ART>
FIG. 151 is a flowchart showing a transition process during the first game state ART executed in step S813 of the second ART high-probability medium lottery process shown in FIG. 137. In the transition process during the first game state ART, the sub CPU 102 sets "during ART" to the provisional game state (S1000), and executes the second normal addition selection lottery process shown in FIG. 155 (S1001).

<Transition processing during the second game state ART>
FIG. 152 is a flowchart showing the transition process during the second gaming state ART executed in step S760 of the third general middle lottery process shown in FIG. 134 and step S820 of the third ART high probability medium lottery process shown in FIG. 138. is there.

First, the sub CPU 102 determines whether or not the provisional gaming state is "ART" and the RT gaming state after the third stop reel is stopped is 2 or less (S1010), and the provisional gaming state is "ART". If it is "medium" and it is determined that the RT gaming state after the third stop reel has stopped is 2 or less (YES), "ART preparing" is set in the provisional gaming state.

In step S1010, when it is determined that the provisional gaming state is not "ART in", or the RT gaming state after the third stop reel is stopped is not 2 or less (NO), or after executing the process of step S1011. , The sub CPU 102 ends the transition process during the second game state ART.

<Game state general middle transition processing>
FIG. 153 is a flowchart showing the game state general middle transition process executed in step S811 of the second ART high-probability medium lottery process shown in FIG. 137. In the game state general middle transition process, the sub CPU 102 turns on the additional game end flag (S1015) and sets the provisional game state to "general middle" (S1016).

<1st normal addition selection lottery processing>
FIG. 154 is a flowchart showing the first normal additional selection lottery process executed in step S779 of the first ART high probability medium lottery process shown in FIGS. 135 and 136.

First, the sub CPU 102 performs a normal additional selection lottery for selecting the number of games to be added to the ART based on the normal additional selection lottery table shown in FIGS. 60 and 61 (S1020). Here, the sub CPU 102 determines whether or not the lottery result of the normal additional selection lottery is non-winning (S1021). If it is determined that the lottery result is non-winning (YES), the sub CPU 102 ends the first normal addition selection lottery process.

If it is determined in step S91 that the lottery result of the normal additional selection lottery is not non-winning (NO), the sub CPU 102 sets the lottery result in the basic payout table of the stock individual information (S1022).

Next, the sub CPU 102 sets the stock flag of the stock individual information to "additional selection per" (S1023). Next, the sub CPU 102 performs an additional selection continuous state lottery to draw the continuous state of the additional selection based on the additional selection continuous state lottery table shown in FIG. 66 (S1024). Next, the sub CPU 102 sets the result of the additional selection continuous state lottery to the continuous state of the stock individual information (S1025), and ends the first normal additional selection continuous state lottery process.

<Second normal addition selection lottery processing>
FIG. 155 is a flowchart showing the second normal additional selection lottery process executed in step S752 of the second general middle lottery process shown in FIG. 133 and step S1001 of the first game state ART transition process shown in FIG. 151. is there.

First, the sub CPU 102 performs the ART first hit additional selection lottery based on the ART first hit additional selection lottery table shown in FIG. 57 (S1032), and determines whether or not the lottery result is non-winning (S1033). ).

Here, when it is determined that the lottery result of the additional selection lottery at the time of the first hit of ART is non-winning (YES), the sub CPU 102 ends the second normal addition selection lottery process. On the other hand, when it is determined that the lottery result of the additional selection lottery at the time of the first hit of ART is not a non-winning (NO), the sub CPU 102 sets the lottery result in the basic payout table of the stock individual information (S1034).

Next, the sub CPU 102 sets the stock flag of the stock individual information to "additional selection per" (S1035). Next, the sub CPU 102 performs an additional selection continuous state lottery to draw the continuous state of the additional selection based on the additional selection continuous state lottery table shown in FIG. 66 (S1036). Next, the sub CPU 102 sets the result of the additional selection continuous state lottery to the continuous state of the stock individual information (S1037), and ends the second normal additional selection continuous state lottery process.

<Lottery processing with the number of ART games directly added>
FIG. 156 is a flowchart showing the ART game number direct addition lottery process executed in step S830 of the first ART preparing lottery process shown in FIG. 139 and step S860 of the first ART preparatory lottery process shown in FIGS. 141 and 142. is there.

First, the sub CPU 102 performs a game number direct lottery for drawing the number of games to be added to the ART based on the game number addition lottery table shown in FIG. 55 (S1040), and determines whether or not the lottery result is greater than 0. Judgment (S1041). Here, if it is determined that the lottery result of the number of games directly added lottery is greater than 0 (YES), the sub CPU 102 adds the lottery result to the number of remaining ART games (S1042).

In step S1041, when it is determined that the lottery result of the number of games directly added lottery is not larger than 0 (NO), or after executing the process of step S1042, the sub CPU 102 ARTs the lottery result of the number of games directly added lottery. The number of direct-load notification games is set (S1043), and the number of ART games direct-load lottery process is completed.

<Additional game stock lottery processing>
FIG. 157 shows the additional game stock lottery process executed in step S872 of the first ART middle lottery process shown in FIGS. 141 and 142 and step S933 of the first additional selected selected lottery process shown in FIGS. 144 and 145. It is a flowchart.

First, the sub CPU 102 performs an ART additional game stock lottery based on the additional game lottery table shown in FIG. 68 (S1050), and determines whether or not the lottery result is a win (S1051).

Here, when it is determined that the lottery result of the ART additional game stock lottery is the winning (YES), the sub CPU 102 sets the "additional game" to the stock flag of the stock individual information (S1052).

In step S1051, when it is determined that the lottery result of the ART additional game stock lottery is not the winning (NO), or after executing the process of step S1052, the sub CPU 102 ends the additional game stock lottery process.

<Lottery processing waiting for normal return>
FIG. 158 is a flowchart showing a normal return waiting lottery process executed in step S586 of the first game state-based lottery process shown in FIG. 117.

First, the sub CPU 102 determines whether or not the MB is inactive and the internal winning combination is the "middle correct answer bell", the "right 312 correct answer bell", or the "right 321 correct answer bell" (S1060). Here, when it is determined that the MB is not activated and the internal winning combination is not "middle correct answer bell", "right 312 correct answer bell" or "right 321 correct answer bell" (NO), the sub CPU 102 is put into the provisional gaming state. “Waiting for normal return” is set (S1061), and a return lottery process for performing a return lottery with a predetermined probability is executed (S1062).

On the other hand, when it is determined that the MB is not activated and the internal winning combination is "middle correct answer bell", "right 312 correct answer bell" or "right 321 correct answer bell" (YES), the sub CPU 102 sets the ART end flag. Turn it on (S1063) and set "general medium" to the provisional game state (S1064).

After executing the process of step S1062 or S1064, the sub CPU 102 executes the game state transition process at the time of the first lock occurrence shown in FIG. 149 (S1065). Next, the sub CPU 102 determines whether or not the provisional gaming state is "waiting for normal return" or "general" (S1066).

Here, if it is determined that the provisional gaming state is "waiting for normal return" or "general" (YES), the sub CPU 102 ends the lottery process waiting for normal return. On the other hand, when it is determined that the provisional game state is not "waiting for normal return" or "general" (NO), the sub CPU 102 turns off the ART end flag (S1067) and clears the ART pullback flag (NO). S1068), the lottery process is terminated while waiting for the normal return.

As described above, the pachislot machine 1 according to the present embodiment is determined on the condition that the addition number of ART games is increased with the first probability and the addition number of ART games is determined. With a second probability that the number of additions increases as the number of additions increases, it is determined whether or not to add the determined number of additions to the number of ART games.

That is, the pachislot machine 1 according to the present embodiment lowers the probability that the number of ART games will be added when the number of ART games added is small compared to the case where the number of ART games added is large. Therefore, it is possible to suppress excessive payout of medals and prevent the player's interest from being lowered.

Further, in the pachi-slot machine 1 according to the present embodiment, in the additional game, for example, each time the combination of symbols constituting "RT4 transition A" or "RT4 transition B" stops on the effective line, the number of ART games is increased. In order to increase the number of lottery per game with respect to the number of additions, each time a combination of symbols constituting "RT4 transition A" or "RT4 transition B" is displayed on the valid line, "RT4 transition A" or "RT4" It is possible to expect the player to change the privilege with respect to the display of "Transition B".

Further, in the pachislot machine 1 according to the present embodiment, each time the reels 3L, 3C, 3R are stopped, the addition number of the ART game number is added to the lottery result per game with respect to the addition number of the ART game number. Since the notification is made from a small number of lottery results, the player's expectation can be maintained from the time when the first reel is stopped until the last reel is stopped.

Further, the pachi-slot machine 1 according to the present embodiment can be determined to lock in the next game in the out-of-game game during the high probability of ART, and can notify a specific stop operation sequence (for example, right push). On condition that it is determined, the specific stop operation sequence for displaying the combination of symbols (for example, "bat") on the valid line is notified.

Further, the pachi-slot machine 1 according to the present embodiment is locked to be performed in the next game on the condition that the combination of symbols is not displayed on the valid line as a result of the stop operation being performed in the specific stop operation order. A "lost reel action" is performed to rotate at least one of the plurality of reels 3L, 3C, 3R so that the combination of symbols is displayed on the effective line.

Therefore, the pachi-slot machine 1 according to the present embodiment can combine symbols based on whether or not the lock is performed and whether or not a specific stop operation sequence is performed without changing the RT gaming state. The display probability can be changed, and the data area used can be reduced.

Further, the pachi-slot machine 1 according to the present embodiment is changed from the current mode to a mode in which it is highly likely that the lock will be performed in the next game, based on the winning of a specific internal winning combination in the high probability of ART. A lottery will be held as to whether or not to transfer.

On the other hand, the pachi-slot machine 1 according to the present embodiment shifts the mode from the current mode to a mode in which the probability that the lock is determined in the next game is low, based on the non-winning of the winning combination in the high probability of ART. Lottery of whether or not is performed.

As a result, the pachi-slot machine 1 according to the present embodiment can easily determine that the lock is to be performed in the next game when the winning of a specific internal winning combination continues during the high probability of ART, while the high ART. If the winning combination is not won during the probability, it becomes difficult to decide to lock in the next game.

Therefore, the pachi-slot machine 1 according to the present embodiment can provide undulations in the lock occurrence probability during the ART high probability, and can improve the interest during the ART high probability.

Further, the pachi-slot machine 1 according to the present embodiment allows the player to select an additional number of ART games that is advantageous to the player, so that the number of games is relatively large depending on the selection result of the player. Can be given to the ART, so that the player's interest in the ART can be maintained.

Further, the pachi-slot machine 1 according to the present embodiment notifies the player of the distribution of the number of ART games to the plurality of elements, and causes the player to select one element from the plurality of elements. It is possible to improve the player's interest when letting a person select an element.

Further, the pachi-slot machine 1 according to the present embodiment is in a state of notifying the player of the number of ART games associated with at least one of the plurality of elements (“crushing” function), and the plurality of elements. Since the player is made to select one of the elements, the player can select the element relatively advantageously, and the player's interest when letting the player select the element can be improved.

Further, the pachi-slot machine 1 according to the present embodiment is provided with a plurality of elements so that the number of ART games associated with the plurality of elements cannot be identified, provided that a predetermined operation is performed. , A predetermined operation was performed in a state where an element was randomly selected from a plurality of elements and multiple elements were made so that the number of ART games associated with each element could not be identified. As a condition, since the most advantageous element for the player is selected from the plurality of elements, the selection of the element by the player can be simplified.

Further, the pachislot machine 1 according to the present embodiment determines the number of games associated with the selected element as the addition number of the number of ART games on the condition that one element is selected, and determines a predetermined number. Since the average number of games associated with each of the multiple elements is determined as the addition number of the number of ART games on the condition that the operation is performed, it is stable for the player to aim for a large number of games. It becomes possible to select the number of games played, and the player can select the playability.

Further, the pachislot machine 1 according to the present embodiment sets the number of grace games when the irregular stop operation is performed, and on the condition that the irregular stop operation is performed again while the number of grace games is exhausted. , Penalty for not drawing ART.

Therefore, the pachi-slot machine 1 according to the present embodiment does not impose a penalty on the first irregular stop operation by judging that it is an irregular stop operation performed unintentionally, but the number of grace games is exhausted. A penalty is imposed on the second irregular stop operation performed during the period, judging that it is an irregular stop operation intentionally performed.

Therefore, the pachi-slot machine 1 according to the present embodiment changes the weight of the penalty imposed on the player between the irregular stop operation unintentionally performed by the player and the irregular stop operation performed intentionally. As a result, it is possible to prevent a penalty from being imposed on the player who unintentionally performs the shift operation.

Further, the pachi-slot machine 1 according to the present embodiment may be an irregular stop operation intentionally performed when a winning combination is won by an irregular stop operation in a state where the number of grace games is not set. Judging that it is high, a penalty is imposed for a number of games that is less than the number of penalties imposed when the second irregular stop operation is performed. As a result, the weight of the penalty imposed on the player can be changed according to the high or low possibility of the irregular stop operation performed intentionally.

Further, in the pachi-slot machine 1 according to the present embodiment, when a winning combination of the replay game is won, a specific operation (pressing the MAX bet button 14) is performed if a predetermined condition is satisfied. Since the automatic insertion of medals is stopped until, sufficient time is secured for the effect of winning the re-game operator, and even if the re-game operator wins, when the medal is inserted. It is possible to execute the effect to be executed by the player's game operation.

Further, in the pachi-slot machine 1 according to the present embodiment, when the display end condition of the screen displayed on the liquid crystal display device 11 is satisfied during the selection game, the screen displayed on the liquid crystal display device 11 is switched to the selection game screen. , The selection state information stored in the sub RAM 104 when the screen is switched is reflected on the selection game screen.

Therefore, the pachi-slot machine 1 according to the present embodiment returns the selected game screen even when the selected game screen is switched to another screen during the selected game in which the number of additional games of ART is determined. In addition, the selected state of the selected game can be reproduced on the selected game screen.

Further, in the pachi-slot machine 1 according to the present embodiment, an error is detected during the selection game by at least one of the main control circuit 91 and the sub control circuit 101, so that the selection game is displayed from the error screen displayed on the liquid crystal display device 11. When the screen is returned, the selected state of the selected game can be reproduced on the selected game screen.

Further, in the pachi-slot machine 1 according to the present embodiment, even when the error information history screen showing the error history is displayed on the liquid crystal display device 11 during the selection game, the selection game screen is displayed from the error information history screen. When returning, the selected state of the selected game can be reproduced on the selected game screen.

Further, the pachi-slot machine 1 according to the present embodiment displays information representing at least one of a divided value obtained by dividing the determined number of additional games of ART and an integrated value of the divided values on a liquid crystal display each time a predetermined condition is satisfied. Since the devices 11 are sequentially displayed, it is possible to give the player a sense of expectation that the benefits of the number of additional games of ART displayed on the liquid crystal display device 11 or more can be received.

Further, the pachi-slot machine 1 according to the present embodiment can prevent the effect of the number of additional games of ART displayed on the liquid crystal display device 11 from being interrupted by the game operation.

Further, the pachi-slot machine 1 according to the present embodiment changes the display time of the effect related to the number of additional games of ART displayed on the liquid crystal display device 11 according to the taste of the player within a predetermined time range. be able to.

Further, the pachislot machine 1 according to the present embodiment stores the shutter operation data indicating the shutter state in the sub RAM 104 when the image displayed on the liquid crystal display device 11 is switched while the shutter is operating. The shutter is moved to the exposed position in order to ensure the visibility of the image after switching, and when the display end condition of the image after switching is satisfied, the shutter is brought into a state represented by the shutter operation data stored in the sub RAM 104.

Therefore, the pachi-slot machine 1 according to the present embodiment can continue the production by the operation of the accessory that was executed before switching the image displayed on the liquid crystal display device 11, and is an interest for the player's game. Can be suppressed from decreasing.

Further, the pachislot machine 1 according to the present embodiment stores the shutter operation data in the sub RAM 104 and secures the visibility of the error screen when the error screen display condition is satisfied while the shutter is operating. When the shutter is moved to the exposed position and the error screen display end condition is satisfied, the shutter is executed before the liquid crystal display device 11 displays the error screen in order to display the movable information stored in the sub RAM 104. It is possible to continue the production by the operation of the shutter.

Further, the pachislot machine 1 according to the present embodiment stores the shutter operation data in the sub RAM 104 and the visibility of the error information history screen when the display condition of the error information history screen is satisfied while the shutter is operating. When the shutter is moved to the exposed position and the display end condition of the error information history screen is satisfied, the error information history is displayed on the liquid crystal display device 11 in order to bring the shutter into a state represented by the shutter operation data stored in the sub RAM 104. It is possible to continue the effect of the shutter operation that was executed before the screen was displayed.

Further, the pachi-slot machine 1 according to the present embodiment is synchronized with a non-operation command transmitted from the main control circuit 91 to the sub control circuit 101 on the condition that the lock effect is executed, and the main control circuit 91 Since each step of the effect by the sub-control circuit 101 and each step of the effect by the sub-control circuit 101 are executed, it is possible to eliminate the synchronization shift between the effect by the main control circuit 91 and the effect by the sub-control circuit 101.

Further, since the pachi-slot machine 1 according to the present embodiment executes the effect operation by the shutter based on the execution of each step of the effect, the lock effect by the main control circuit 91 and the sub-control circuit 101 are used. It is possible to eliminate the synchronization gap with the effect of the shutter.

Further, the pachi-slot machine 1 according to the present embodiment has a shutter operation so that the shutter operation is matched based on the effect before being saved by the sub RAM 104 and the determined effect and the shutter operation combination determination table. Since the sequence is constructed, the control of the shutter operation can be simplified.

Further, the pachi-slot machine 1 according to the present embodiment can prevent the shutter from being unable to operate normally due to inconsistency in the coordination of the shutter operations even if there is an error in the control of the shutter operation. it can.

Further, the pachi-slot machine 1 according to the present embodiment has a gaming state of the main control circuit 91, a gaming state of the sub-control circuit 101, and an internal winning combination when a stop operation different from the predetermined stop operation order is performed. By setting the disadvantageous state based on, in order to set the disadvantageous state according to the size of the privilege that the player may obtain, the stop operation is stopped in a stop operation different from the predetermined stop operation order. It is possible to set an appropriate state that is disadvantageous to the operation.

Further, the pachi-slot machine 1 according to the present embodiment sets the number of grace games when an abnormal operation of the sub-control circuit 101 is detected, and while the unit game of the number of grace games is executed, the sub-control circuit On condition that the abnormal operation of 101 is detected again, a disadvantageous state for the player is set.

That is, the pachi-slot machine 1 according to the present embodiment is electrically operated while the unit game of the number of grace games is executed when it is detected that an electric goto action may have been performed. Since the disadvantageous state is set for the player on the condition that it is detected that the goto action may have been performed again, the player is not unnecessarily discomforted, and the electric technique of the new technique is electrically performed. You can also take measures against goto acts.

Further, the pachi-slot machine 1 according to the present embodiment can perform an electric goto action when a start command is received from the main control circuit 91 when the power failure detection flag is off at the time of recovery from the power failure. Since it can be determined that the sub CPU 102 has stopped and restarted due to some factor, it is possible to detect that the sub control circuit 101 has operated abnormally.

Further, in the pachi-slot machine 1 according to the present embodiment, if the sub-control circuit 101 receives the start command without receiving the initialization command from the main control circuit 91 even once, there is a possibility of an electric goto action. Since it can be determined that the sub-control circuit 101 has never received the initialization command due to some factor, it is possible to detect that the sub-control circuit 101 has operated abnormally.

Further, in the pachi-slot machine 1 according to the present embodiment, when the reception order of the commands related to the progress of the unit game is different from the specified order, the sub-control circuit 101 receives the commands due to the possibility of an electric goto action. Since it can be determined that there is a command that could not be executed, it is possible to detect that the sub-control circuit 101 has operated abnormally.

Further, the pachi-slot machine 1 according to the present embodiment is in a disadvantageous state for the player by not setting the number of grace games in a state where the merit is relatively small for the player even if the electric goto action is performed. Since is not set, it is possible to suppress that all the errors generated in the pachi-slot machine 1 are judged to be a goto action.

In the above-mentioned lottery process during the additional game, when the sub CPU 102 determines "RT4 transition A" and "RT4 transition B" as the internal winning combination, 1 is added to the number of additional selection determination games. explained.

On the other hand, in the lottery process during the additional game, the sub CPU 102 determines the number of ART games when "RT4 transition A" and "RT4 transition B" are determined as the internal winning combinations, as described below. You may try to add.

159 and 160 are flowcharts showing a modified example of the lottery process during the additional game executed in step S584 of the lottery process according to the first game state shown in FIG. 117.

First, the sub CPU 102 determines whether or not it is time to shift to the additional game (S1070). Here, if it is determined that it is time to shift to the additional game (YES), the sub CPU 102 sets the additional game specified value to the number of guaranteed remaining games (S1071).

In step S1070, when it is determined that it is not the time to shift to the additional game (NO), or after executing the process of step S1071, the sub CPU 102 determines whether or not the number of guaranteed remaining games is 0 (S1072).

Here, when it is determined that the number of guaranteed remaining games is not 0 (NO), the sub CPU 102 turns on the guaranteed game in-game flag (S1073) and subtracts 1 from the guaranteed remaining games (S1074).

In step S1072, when it is determined that the number of guaranteed remaining games is 0 (YES), or after executing the process of step S1074, the sub CPU 102 is placed in the column of the additional counter A in the additional counter lottery table shown in FIG. Based on this, an additional counter lottery is performed to draw the number of additional games (S1075), and the lottery result is set in the additional counter A (S1076).

Next, the sub CPU 102 determines whether or not the counter B valid flag is ON (S1077). Here, when it is determined that the counter B valid flag is ON (YES), the sub CPU 102 draws the number of additional games based on the column of the additional counter B in the additional counter lottery table shown in FIG. 161. A lottery is performed (S1078), and the lottery result is set in the additional counter B (S1079).

Next, the sub CPU 102 determines whether or not the counter C valid flag is ON (S1080). Here, when it is determined that the counter C valid flag is ON (YES), the sub CPU 102 draws the number of additional games based on the column of the additional counter C in the additional counter lottery table shown in FIG. 161. A lottery is performed (S1081), and the lottery result is set in the additional counter C (S1082).

When it is determined in step S1077 that the counter B valid flag is not ON (NO), when it is determined in step S1080 that the counter C valid flag is not ON (NO), or after the processing of step S1082 is executed, the sub The CPU 102 adds the values of the counters A, B, and C to the number of remaining ART games (S1083).

Next, the sub CPU 102 determines whether or not the internal winning combination is "RT4 transition A" or "RT4 transition B" in the MB non-operating state (S1084). Here, if it is determined that the internal winning combination is "RT4 transition A" or "RT4 transition B" in the MB non-operating state (YES), the sub CPU 102 determines whether or not the counter C valid flag is ON. Is determined (S1085).

Here, when it is determined that the counter C valid flag is ON (YES), the sub CPU 102 draws the number of additional games for the guaranteed number of additional games with a predetermined lottery probability. (S1086), and the lottery result is added to the number of guaranteed remaining games (S1087).

If it is determined in step S1085 that the counter C valid flag is not ON (NO), or after executing the process of step S1087, the sub CPU 102 determines whether or not the counter B valid flag is OFF (S1088). ). Here, when it is determined that the counter B valid flag is OFF (YES), the sub CPU 102 turns the counter B valid flag ON (S1089).

On the other hand, when it is determined that the counter B valid flag is not OFF (NO), the sub CPU 102 determines whether or not the counter C valid flag is OFF (S1090). Here, when it is determined that the counter C valid flag is OFF (YES), the sub CPU 102 turns the counter C valid flag ON (S1091).

In step S1084, when it is determined that the internal winning combination is not "RT4 transition A" or "RT4 transition B" in the MB non-operating state (NO), and in step S1090, when it is determined that the counter C valid flag is not OFF (NO). ) Or, after executing the process of step S1089 or S1091, the sub CPU 102 ends the lottery process during the additional game.

In this way, the sub CPU 102 increases the number of lottery per game with respect to the number of ART games each time the combination of symbols constituting the "RT4 transition A" or "RT4 transition B" stops on the effective line.

Each time the reels 3L, 3C, and 3R are stopped, the sub CPU 102 displays a liquid crystal display so as to notify from the lottery result in which the addition number of ART games is small among the lottery results per game with respect to the number of ART games. The content of the effect to be executed by the device 11 may be determined.

<Additional counter lottery table>
The additional counter lottery table shown in FIG. 161 is referred to by the sub CPU 102 in a modification of the additional game lottery process shown in FIGS. 159 and 160. In the additional counter lottery table, the lottery value of the number of games to be added is associated with the counter A, the counter B, and the counter C.

According to the additional counter lottery table shown in FIG. 161, for example, the counter A wins 10 games with a probability of "31433/32768", wins 20 games with a probability of "1000/32768", and wins "300/32768". There is a probability of winning 30 games, a probability of "30/32768" of winning 30 games, and a probability of "5/32768" of winning 100 games.

Further, in the present embodiment, the pachi-slot machine 1 has been described as not performing the lottery of ART in the state of imposing a penalty, but when the pachi-slot machine 1 internally wins a definite role in which the ART is determined, the ART is performed. It may be given. Further, the pachi-slot machine 1 may be set to have a low probability of winning the ART when a penalty is imposed.

Further, in the present embodiment, the pachi-slot machine 1 has described an example in which the number of games is applied as the number of ARTs given to the player, but instead of the number of games, the number of sets consisting of a predetermined number of games is used. It may be applied, the number of notifications (navigation number) for favorably winning a so-called increasing combination having different winning modes depending on the pushing order may be applied, the number of medals paid out may be applied, or the number of medals paid out A net increase in the number of payouts minus the number of inserts may be applied.

Further, in the present embodiment, as the transition conditions of the RT gaming state, instead of the transition conditions shown in FIG. 13, the winning of a bonus such as MB, the winning of the bonus operating combination, the end of the bonus, and the RT gaming state are used. It may be that a specific combination of symbols is displayed as the combination of symbols to be transferred, or that a predetermined number of unit games are executed.

Further, in the present embodiment, an example in which the gaming machine according to the present invention is applied to the pachislot machine 1 has been described, but the present invention is not limited to this, and the gaming machine according to the present invention is a pachinko machine that uses a gaming ball as a gaming medium. It can also be applied to other gaming machines such as gaming machines.

(Appendix 1)
In the conventional game machine, the number of advantageous games granted is only displayed on an image display device such as a liquid crystal display device, and there is a problem that the player cannot have a feeling of expectation to receive more benefits. there were.

The present invention has been made to solve such a problem, and provides a gaming machine capable of giving a player a feeling of expectation that he / she can receive benefits equal to or greater than the number of advantageous games displayed on the image display device. The purpose is to provide.

In order to achieve the above object, the game machine according to the present invention includes a game control means (91) that executes processing related to the progress of the game, and various effect devices (for example, a liquid crystal display device 11, a shutter device 200, an LED group 25, and a speaker. An effect control means (101) that controls 23L, 23R), a plurality of reels (3L, 3C, 3R) on which a plurality of symbols are displayed, and a symbol that displays a part of the plurality of symbols displayed on the reels. Display means (display windows 4L, 4C, 4R), symbol changing means (stepping motors 51L, 51C, 51R) that change the symbol by rotating the reel based on the establishment of a predetermined start condition, and a plurality of the above. A stop operation detecting means (stop switch 17S) for detecting a stop operation for stopping each reel, and an image display means (stop switch 17S) for displaying an image controlled by the effect control means. The game control means includes a liquid crystal display device 11), and the game control means has a first game state (for example, when a specific symbol combination (for example, RT3 transition lip _1-16) is stopped and displayed on the symbol display means. The game state transition means for shifting from the RT2 game state) to the second game state (for example, the RT3 game state) in which the winning probability of the re-game combination is different from the first game state, and the shift to the second game state are counted. As a condition, a counting means (main CPU 93) for counting the number of games until the count end condition determined by lottery for each unit game is satisfied, and a counting means when the count end condition of the counting means is satisfied are satisfied. It has a count determining means (main CPU 93) for determining whether or not to validate the number of games played, and the effect control means is determined to validate the number of games counted by the count determining means. On the condition that, the number of advantageous games (ART) granted to the player is determined based on the number of games counted by the counting means (value of special counter for processing when the start command is received × specified number). At least one of a game granting determination means (sub CPU 102), a division value obtained by dividing the number of grants determined by the advantageous game grant determination means based on the number of games counted by the counting means, and an integrated value of the division values. The game control means includes an image control means (sub CPU 102) that sequentially displays the information to be represented on the image display means each time a predetermined condition is satisfied, and the game control means is a game counted by the count determination means. The locking means (main CPU 93) for locking to invalidate the stop operation is further provided on the condition that the number is determined to be valid, and the locking means counts the number of times the predetermined condition is satisfied. When the number of games corresponds to the number of games, the lock is released.

With this configuration, the gaming machine according to the present invention satisfies a predetermined condition with information representing at least one of a divided value obtained by dividing the number of advantageous games granted determined by the advantageous game granting determining means and an integrated value of the divided values. Since the images are sequentially displayed on the image display means each time, the player can have a feeling of expectation that he / she can receive a privilege equal to or greater than the number of advantageous games given displayed on the image display device.

Further, the game machine according to the present invention can prevent the effect of the number of advantageous games displayed on the image display device from being interrupted by the game operation.

Further, the predetermined condition is satisfied when a predetermined time (for example, 20 seconds) has elapsed or a predetermined operation (for example, operation of the MAX bet button 14) has been performed. It may be.

With this configuration, the gaming machine according to the present invention can change the display time of the effect related to the number of advantageous games given displayed on the image display device according to the player's taste within a predetermined time range. it can.

According to the present invention, it is possible to provide a game machine game machine capable of giving a player a sense of expectation that he / she can receive a privilege equal to or more than the number of advantageous games displayed on the image display device.

(Appendix 2)

As a conventional game machine, there is also one in which a plurality of shapes can be formed in the movable portion by operating the plurality of movable portions in cooperation with each other.

However, in such a conventional game machine, there is a problem that the movable part may not operate normally due to inconsistency in the coordination of the movement of the movable part due to an error in controlling the operation of the movable part. It was.

The present invention provides a gaming machine capable of preventing the movable portion from being unable to operate normally due to inconsistency in the coordination of the movements of the movable portion even if there is an error in controlling the operation of the movable portion. The purpose is.

In order to achieve the above object, the gaming machine according to the present invention controls a movable portion (shutter device 200), a drive portion for driving the movable portion, and an operation mode of the movable portion by controlling the drive portion. A gaming machine including a controllable control unit (sub-control circuit 101), wherein the drive unit includes a first drive unit (elevating motors 240A, 240B) for driving the movable unit, and the movable unit. It has at least a second drive unit (rotary motor 231) that drives in a direction different from that of the first drive unit, and the control unit has operation data for operating the movable unit (shutter operation data Y1 to Y8 (FIGS. FIG. (See FIGS. 72 to 79)) and a consistency table (sub ROM 103, shutter operation combination determination table (see FIG. 80)) for ensuring the consistency of the operation of the movable portion and the storage means (sub RAM 104) capable of storing). And a determination means (sub CPU 102) capable of determining operation pattern data based on the previous operation data stored by the storage means, the current operation data, and the consistency table. It has a configuration in which the operation control of the movable portion is performed based on the operation pattern data determined by the determination means.

With this configuration, the gaming machine according to the present invention prevents the movable portion from being unable to operate normally due to inconsistency in the coordination of the movement of the movable portion even if there is an error in the control of the operation of the movable portion. be able to.

In the gaming machine according to the present invention, the first drive unit and the second drive unit may be individually controllable.

With this configuration, in the gaming machine according to the present invention, even if there is an error in the control of at least one of the first drive unit and the second drive unit, the movement of the movable unit is inconsistent and the movable unit is inconsistent. It is possible to prevent the vehicle from being unable to operate normally.

According to the present invention, even if there is an error in the control of the operation of the movable portion, it is possible to prevent the movable portion from being unable to operate normally due to inconsistency in the coordination of the operation of the movable portion. Can be provided.

1 Pachislot machine (game machine)
3L, 3C, 3R reel 4 Display window (design display means)
11 Liquid crystal display device (effect device, image display means)
14 MAX bet button (selection method)
16 Start lever 17L, 17C, 17R Stop button (selection means)
17S stop switch (stop operation detection means)
23L, 23R speaker (directing device)
25 LED group (directing device)
51L, 51C, 51R Stepping motor (design variable means)
91 Main control circuit 93 Main CPU (count means, count determination means, lock means, cycle control means, command transmission means, reel control means, lock execution means, internal winning combination determination means, reel stop control means, winning determination means)
101 Sub-control circuit 102 Sub-CPU (processor, display control means, advantageous grant number determination means, image switching means, selection information storage means, selection information recovery means, advantageous game grant determination means, image control means, image switching means, movable state Return means, effect execution means, effect determination means, character control means, disadvantageous state setting means, irregular stop operation determination means, grace game number setting means, operation abnormality detecting means, character movement construction means)
104 Sub RAM (storage medium, accessory data storage means)
108 WDT (Watchdog Timer)
200 Shutter device (directing device, movable decoration part)

Claims (2)

A game control means that can execute processing related to the progress of the game,
An effect control means capable of controlling the effect based on a command transmitted from the game control means,
An effect execution means that is controlled by the effect control means and can execute the effect step by step.
With
The game control means has a command transmission means capable of transmitting a command to the effect control means.
It said command transmission means transmits a command triggered by the progress of a game, and a command that does not trigger the progression of Yu technique,
The effect control means includes a reception counter that receives a command that is not triggered by the progress of the game at regular intervals and updates the count each time a command that is not triggered by the progress of the game is received.
When a specific effect that can be executed in step units is performed , the effect executing means executes or ends the effect of the predetermined step of the specific effect when the reception counter reaches a predetermined value, and the specific effect is specified. A gaming machine characterized in that when a non-specific effect different from the effect is performed, the effect step does not proceed based on the reception counter reaching a predetermined value . Equipped with an operation detection means that can detect a predetermined operation of the player
If the operation detecting means detects a predetermined operation of the player while executing the effect of the predetermined step of the specific effect, the value of the reception counter reaches a value for executing the next effect step. The gaming machine according to claim 1, wherein even before, the predetermined step of the specific effect being executed is completed .

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