JP6484490B2 - 半導体装置およびその製造方法 - Google Patents
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Description
有する。再配線部は、開口部内に位置する最上層配線の部分に接するように形成されており、側面および上面を有する銅膜から形成された再配線を含む。パッド部は、再配線の上面に接するように形成されている。再配線部は、再配線の前記上面を除く態様で、再配線の側面に接するように形成された、金属酸化膜により構成されたバリア膜を備えている。パッド部は、バリア膜とは異なる材料からなるパッドメタル膜を備えている。
ここでは、銅の再配線とボンディングパッドとが、それぞれ電解めっき法によって形成された半導体装置の一例について説明する。
上述した製造方法では、マンガンと銅との合金膜を形成する際に、パッシベーション膜PVFに堆積する銅とマンガンの量(堆積量)と、堆積する銅とマンガンを再スパッタによってエッチングする量(エッチング量)とが、実質的に同じ量になるように、半導体基板SUBに印加するバイアスを調整することを述べた。ここでは、バイアスを調整することによって、堆積量とエッチング量とを変えて合金膜を形成する場合について説明する。
ここでは、銅の再配線が電解めっき法によって形成され、ボンディングパッドがスパッタ法によって形成された半導体装置の一例について説明する。
Claims (17)
- 主表面を有する半導体基板と、
前記半導体基板の前記主表面上にそれぞれ形成され、前記主表面からの高さが互いに異なる配線を含む多層配線と、
前記多層配線のうち、前記主表面から最も高い位置に配置された最上層配線を覆うように形成され、前記最上層配線に連通する開口部を有するパッシベーション膜と、
前記開口部内に位置する前記最上層配線の部分に接するように形成され、側面および上面を有する銅膜から形成された再配線を含む再配線部と、
前記再配線の前記上面に接するように形成されたパッド部と、
前記再配線部を覆うように形成されたポリイミド膜と
を有し、
前記再配線部は、前記再配線の前記上面を除く態様で、前記再配線の前記側面に接するように形成された、金属酸化膜により構成されたバリア膜を備え、
前記パッド部は、前記バリア膜とは異なる材料からなるパッドメタル膜を備えた、半導体装置。 - 前記バリア膜の前記金属酸化膜は、マンガン(Mn)酸化膜、チタン(Ti)酸化膜およびアルミニウム(Al)酸化膜からなる群から選ばれるいずれかを含む、請求項1記載の半導体装置。
- 前記再配線部では、前記再配線の前記側面における下端側に形成されている前記バリア膜の部分の膜厚が、前記側面における上端側に形成されている前記バリア膜の部分の膜厚より厚い、請求項1または2に記載の半導体装置。
- 前記バリア膜は、マンガン(Mn)膜および前記金属酸化膜としてのマンガン(Mn)酸化膜、チタン(Ti)膜および前記金属酸化膜としてのチタン(Ti)酸化膜ならびにアルミニウム(Al)膜および前記金属酸化膜としてのアルミニウム(Al)酸化膜からなる群から選ばれるいずれかの積層膜を含む、請求項1記載の半導体装置。
- 前記再配線部は、前記開口部内に位置する前記最上層配線の部分に接するように形成された第1バリアメタル膜を含み、
前記再配線は、前記最上層配線と前記再配線との間に前記第1バリアメタル膜を介在させる態様で、前記第1バリアメタル膜に接するように形成され、
前記バリア膜は、前記第1バリアメタル膜の端面に接するように形成された、請求項1〜4のいずれかに記載の半導体装置。 - 前記第1バリアメタル膜は、クロム(Cr)膜および第1チタン(Ti)膜の少なくともいずれかの膜を含む、請求項5記載の半導体装置。
- 前記パッド部は、前記再配線の前記上面に接するように形成された第2バリアメタル膜を含み、
前記パッドメタル膜は、前記再配線と前記パッドメタル膜との間に前記第2バリアメタル膜を介在させる態様で、前記第2バリアメタル膜に接するように形成された、請求項1〜6のいずれかに記載の半導体装置。 - 前記第2バリアメタル膜は、ニッケル(Ni)膜であり、
前記パッドメタル膜は、金(Au)膜である、請求項7記載の半導体装置。 - 前記第2バリアメタル膜は、第2チタン(Ti)膜であり、
前記パッドメタル膜は、パラジウム(Pd)膜である、請求項7記載の半導体装置。 - 前記最上層配線はアルミニウム膜から形成され、
前記再配線の厚さは、前記最上層配線の厚さよりも厚い、請求項1〜9のいずれかに記載の半導体装置。 - 主表面を有する半導体基板の前記主表面上に、前記主表面からの高さが互いに異なる配線を含む多層配線を形成する工程と、
前記多層配線のうち、前記主表面から最も高い位置に配置された最上層配線を覆うように、パッシベーション膜を形成する工程と、
前記パッシベーション膜に、前記最上層配線を露出する開口部を形成する工程と、
前記開口部内に露出した前記最上層配線に接するように、側面および上面を有する銅膜からなる再配線を含む再配線部を形成する工程と、
前記再配線の前記上面に接するように、パッド部を形成する工程と、
前記再配線部および前記パッシベーション膜を覆うように、ポリイミド膜を形成する工程と
を有し、
前記再配線部を形成する工程は、
前記パッシベーション膜の表面および前記再配線の前記上面を除く態様で、前記再配線の前記側面に、少なくとも第1金属を含む金属膜を形成する工程と、
前記金属膜に熱処理を行うことにより、前記第1金属が酸化した第1金属酸化膜を含むバリア膜を、前記再配線の前記上面を除く態様で、前記再配線の前記側面に接するように形成する工程と
を備え、
前記パッド部を形成する工程は、前記バリア膜とは異なる材料からなるパッドメタル膜を形成する工程を備えた、半導体装置の製造方法。 - 前記金属膜を形成する工程は、前記第1金属と、前記第1金属とは異なる第2金属とを、前記パッシベーション膜の表面に堆積させながらエッチングすることにより、前記再配線の前記側面に前記第1金属および前記第2金属を、前記金属膜として堆積する工程を含み、
前記金属膜は、前記第1金属および前記第2金属を、前記パッシベーション膜の前記表面に堆積させる量と、堆積する前記第1金属および前記第2金属をエッチングする量とが同じ条件のもとで堆積される、請求項11記載の半導体装置の製造方法。 - 前記金属膜を形成する工程は、前記第1金属と、前記第1金属とは異なる第2金属とを、前記パッシベーション膜の表面に堆積させながらエッチングすることにより、前記再配線の前記側面に前記第1金属および前記第2金属を、前記金属膜として堆積する工程を含み、
前記金属膜は、前記第1金属および前記第2金属を、前記パッシベーション膜の前記表面に堆積させる量と、堆積する前記第1金属および前記第2金属をエッチングする量とが異なる条件のもとで堆積される、請求項11記載の半導体装置の製造方法。 - 前記金属膜を形成する工程では、
前記第1金属として、マンガン(Mn)、チタン(Ti)およびアルミニウム(Al)からなる群から選ばれるいずれかの金属が適用され、
前記第2金属として銅(Cu)が適用される、請求項12または13に記載の半導体装置の製造方法。 - 前記金属膜を形成する工程は、
前記第1金属を、第1金属膜として、前記パッシベーション膜および前記再配線を覆うように形成する工程と、
前記第1金属膜にエッチング処理を行うことにより、前記再配線の前記側面に位置する前記第1金属膜の部分を残して、前記再配線の前記上面および前記パッシベーション膜の表面にそれぞれ位置する前記第1金属膜の部分を除去する工程と
を含む、請求項11記載の半導体装置の製造方法。 - 前記金属膜を形成する工程では、前記第1金属膜として、マンガン(Mn)膜、チタン(Ti)膜およびアルミニウム(Al)膜からなる群から選ばれるいずれかが適用される、請求項15記載の半導体装置の製造方法。
- 前記ポリイミド膜に熱処理を行う工程を備え、
前記ポリイミド膜に熱処理を行う工程は、前記金属膜に前記熱処理を行う工程を含む、請求項11〜16のいずれかに記載の半導体装置の製造方法。
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