JP6709649B2 - Amusement machine - Google Patents

Description

The present invention relates to a gaming machine such as a pachinko gaming machine.

As an example of a game machine, a game medium such as a game ball is launched into a game area by a launching device, and a predetermined game value is obtained based on the fact that the game medium is won in a prize area such as a winning opening provided in the game area. There is a pachinko machine that can be given. Further, as another example of the gaming machine, a player operates a start lever after setting a predetermined number of bets for one game by using a gaming medium such as a medal, a coin, or a game ball similar to a pachinko gaming machine. There is a slot machine that can start variable display of display symbols by the variable display device and give a predetermined game value based on the derived display result.

As such a gaming machine, a power supply that monitors a DC30V power supply voltage and outputs a power-off signal (voltage drop signal) indicating that the external power supply is cut off when the voltage value of the power supply voltage becomes 14V or less There is a gaming machine that includes a monitoring circuit and a power supply monitoring circuit that monitors a DC5V power supply voltage and outputs a reset signal that is input to a microcomputer when the voltage value of the power supply voltage becomes a predetermined value or less (for example, Patent Document 1). In such a gaming machine, when the external power supply is cut off, a power-off signal is output, so that power-off processing for preventing the player from being disadvantaged is executed, and then a reset signal is issued. Is output, resetting the microcomputer.

JP 2004-795A

However, in the gaming machine described in Patent Document 1, when the connection between the power supply board that creates and outputs the power supply voltage and the power supply monitoring circuit becomes unstable, for example, before the power-off signal is output. Alternatively, the reset signal may be output without outputting the power-off signal, and the power-off process may not be executed, which may cause a disadvantage to the player.

The present invention has been made in view of the above circumstances, and an object of the present invention is to provide a gaming machine capable of preventing a player from suffering a disadvantage.

(1) In order to achieve the above object, the gaming machine according to the present invention is
A gaming machine capable of playing a game (for example, a pachinko gaming machine 1 or the like),
Power supply means (for example, power supply board 16) for creating a plurality of power supply voltages (for example, voltages of DC 32V, 12V, 5V, etc.),
At least a first power supply voltage (for example, a voltage of DC32V) and a second power supply voltage lower than the first power supply voltage (for example, a voltage of DC5V) among the plurality of power supply voltages are supplied, and A control means (for example, the main board 11 or the like) driven by the second power supply voltage,
The power supply means is
Inrush current suppressing means provided in an electric circuit connected to an external power source,
A first circuit provided with the inrush current suppressing unit and a circuit switching unit capable of switching the circuit from one to the other of the second circuit for disabling the inrush current suppressing unit;
A monitoring means for monitoring the voltage,
The electric circuit switching means switches the electric circuit from the first electric circuit to the second electric circuit and shuts off the first electric circuit when the voltage reaches a predetermined voltage,
The control means is
A first circuit (for example, a first power supply monitor) that monitors the first power supply voltage and outputs a power-off signal based on that the first power supply voltage has dropped to a first threshold value (for example, 21V). 9 and 10A, such as the circuit 112),
A second circuit that monitors the first power supply voltage and outputs a reset signal based on that the first power supply voltage has dropped to a second threshold value (eg, 9 V) lower than the first threshold value ( For example, the second power supply monitoring circuit 113, etc., see FIG. 9 and FIG.
The first circuit and the second circuit, even when the second power supply voltage is reduced (for example, the voltage of DC5V is below the third threshold (4.2V or less), etc.), the power-off signal And the reset signal (see, for example, FIGS. 9 and 10B),
Delaying means (for example, electrolytic capacitors 87c, 87d) for delaying the decrease of the second power supply voltage is further provided.
It is characterized by

With such a configuration, it is possible to prevent the player from suffering a disadvantage.

(2) In the gaming machine of (1) above,
A game board provided with the control means (for example, a game board 2),
A game frame (for example, a game frame 161 or the like) provided with the power source means,
A first connector (for example, a drawer connector 32a) provided on the game board and connected to the control means,
A second connector (for example, a frame-side connector 33a) provided on the game frame and connected to the power supply means,
By attaching the game board to the game frame, the first connector and the second connector are connected (see, for example, FIG. 3), and the first power supply voltage and the second power supply voltage are the same. Power is supplied from the power supply unit to the control unit via the first connector and the second connector (see, for example, FIGS. 4 and 6),
It is characterized by

With such a configuration, the connector can facilitate the connection between the power supply means and the control means, and even if the connection of the connector becomes unstable, the player is disadvantaged. Can be prevented.

(3) In the gaming machine of (1) or (2) above,
Inrush current suppressing means (for example, thermistor 56) provided in an electric path connected to an external power source (for example, AC power source 50),
A first electric path (for example, an electric path that passes only the thermistor 56) provided with the inrush current suppressing means and a second electric path (for example, the thermistor 56 and the contact portion 71S) for invalidating the inrush current suppressing means. An electric path switching unit (for example, a relay 71) capable of switching the electric path from one side of the parallel circuit) to the other side,
A monitoring unit (for example, a relay drive circuit 72) for monitoring a voltage (for example, an output voltage of the 12V power supply circuit 62b),
The electric circuit switching means switches the electric circuit from the first electric circuit to the second electric circuit when the voltage reaches a predetermined voltage (for example, DC6V).
It is characterized by

With such a configuration, a desired voltage can be obtained.

It is a front view of a pachinko gaming machine in this embodiment. It is a block diagram showing various control boards and the like mounted on a pachinko gaming machine. It is a perspective view of the pachinko gaming machine with the front frame released. It is a block diagram showing an example of composition of a power supply board and a drawer relay board. It is a circuit diagram which shows the structural example of a power supply board. It is a block diagram showing an example of composition of a main board etc. and a drawer relay board. It is a figure which shows an example of a filter circuit. It is a figure which shows the relationship between the input voltage of a filter circuit, and an output voltage. It is a figure which shows an example of a power supply monitoring circuit. It is a figure which shows the output timing of the signal which a power supply monitoring circuit outputs. It is a figure which shows the output timing in case a power supply monitoring circuit does not have a delay circuit. It is a block diagram which shows the structural example of an input port. It is a flow chart which shows an example of game control main processing. It is a flowchart showing an example of a timer interrupt process for game control. It is a flow chart which shows an example of power-off processing. It is a flow chart which shows an example of game control process processing. It is explanatory drawing which shows the example of a setting of a fluctuation pattern. It is the flowchart which shows one example of production control process treatment.

Hereinafter, an embodiment of the present invention will be described in detail with reference to the drawings. FIG. 1 is a front view of a pachinko gaming machine in the present embodiment, showing a layout of main members. The pachinko gaming machine (gaming machine) 1 is roughly divided into a gaming board (gauge board) 2 that constitutes a gaming board surface, and a gaming machine frame (underframe) 3 that supports and fixes the gaming board 2. In the game board 2, a substantially circular game area surrounded by guide rails is formed. In this game area, a game ball as a game medium is shot from a predetermined ball hitting launch device and is driven into it.

At a predetermined position of the game board 2 (on the right side of the game area in the example shown in FIG. 1), a first special symbol display device 4A and a second special symbol display device 4B are provided. Each of the first special symbol display device 4A and the second special symbol display device 4B is composed of, for example, 7-segment or dot-matrix LED (light emitting diode), etc., and is identified in the special symbol game as an example of the variable display game. Special symbols (also called "special symbols") that are possible plural types of identification information (special identification information) are variably displayed (variably displayed). For example, the first special symbol display device 4A and the second special symbol display device 4B each variably display a plurality of types of special symbols composed of numbers indicating "0" to "9" and symbols indicating "-". To do. In addition, the special symbols displayed on the first special symbol display device 4A and the second special symbol display device 4B are limited to those composed of numbers indicating "0" to "9", symbols indicating "-", and the like. However, for example, a plurality of types of lighting patterns with different combinations of what is turned on and what is turned off in the 7-segment LED may be set in advance as a plurality of types of special symbols.

Symbol numbers corresponding to each of the special symbols of a plurality of types are attached. As an example, each of the numbers indicating “0” to “9” is assigned a symbol number of “0” to “9”, and the symbol indicating “−” is assigned a symbol number of “10”. Just do it. Below, the special symbols that are variably displayed on the first special symbol display device 4A are also referred to as "first special symbols", and the special symbols that are variably displayed on the second special symbol display device 4B are also referred to as "second special symbols". ..

Both the first special symbol display device 4A and the second special symbol display device 4B are formed, for example, in a rectangular shape. The type of the first special figure and the type of the second special figure may be the same (for example, the numbers indicating "0" to "9" and the symbol indicating "-"), or the types may be different. May be different. Further, the first special symbol display device 4A and the second special symbol display device 4B may be respectively configured to variably display numbers (or two-digit symbols) indicating, for example, "00" to "99". ..

An image display device 5 is provided near the center of the game area on the game board 2. The image display device 5 is composed of, for example, an LCD (liquid crystal display device) or the like, and forms a display area for displaying various effect images. In the display area of the image display device 5, corresponding to the variable display of the first special symbol by the first special symbol display device 4A and the variable display of the second special symbol by the second special symbol display device 4B in the special symbol game, respectively. In the decorative pattern display area, which is a plurality of variable display portions such as three, for example, decorative patterns that are a plurality of types of identification information (decorative identification information) capable of identifying each are variably displayed. The variable display of the decorative pattern is also included in the variable display game.

As an example, in the display area of the image display device 5, “left”, “middle”, and “right” decorative pattern display areas 5L, 5C, and 5R are arranged. Then, in the special figure game, in response to the start of one of the variation of the first special symbol on the first special symbol display device 4A and the variation of the second special symbol on the second special symbol display device 4B, The variation (for example, vertical scroll display) of the decorative pattern is started in each of the “left”, “middle”, and “right” decorative pattern display areas 5L, 5C, and 5R. After that, when the fixed special symbol is stopped and displayed as the variable display result in the special symbol game, in each of the "left", "middle", and "right" decorative symbol display areas 5L, 5C, 5R in the image display device 5. The fixed decorative design (final stop design) that is the variable display result of the decorative design is stopped and displayed.

Thus, in the display area of the image display device 5, a special drawing game using the first special drawing in the first special symbol display device 4A, or a special special game using the second special drawing in the second special symbol display device 4B. In synchronism with the drawing game, a plurality of types of distinguishable decorative patterns that can be identified are variably displayed, and the fixed decorative pattern that is the variable display result is derived (or simply referred to as “derived”). Note that, for example, deriving and displaying various display symbols such as a special symbol and a decorative symbol means terminating the variable display by displaying the identification information such as the decorative symbol in a stop display (also called a complete stop display or a final stop display). . On the other hand, during variable display from the start of variable display of the decorative pattern to the derivation display of the fixed decorative pattern which is the variable display result, the variable speed of the decorative pattern becomes “0”, and The design may be displayed in a stopped state, and may be in a display state that causes, for example, slight shaking or expansion/contraction. Such a display state is also called a temporary stop display, and although the display result in the variable display is not definitely displayed, the player can recognize that the variation of the decorative pattern due to the scroll display or the update display is not progressing. Becomes It should be noted that the temporary stop display may include displaying the decorative pattern in a complete stop display for a time shorter than a predetermined time (for example, 1 second) without causing a slight shake or expansion/contraction.

The decorative patterns that are variably displayed in the “left”, “middle”, and “right” decorative pattern display areas 5L, 5C, and 5R include, for example, eight types of patterns (alphanumeric characters “1” to “8” or Chinese characters). It may be a number, an English character, eight character images related to a predetermined motif, a combination of numbers, characters or symbols and a character image, and the character image may be, for example, a person, an animal, an object other than these, or , A symbol such as a character, or a decorative image showing any other figure). A corresponding design number is attached to each of the decorative designs. For example, the symbol numbers “1” to “8” are attached to the alphanumeric characters indicating “1” to “8”, respectively. Note that the decorative patterns are not limited to eight types, and may be of any type (eg, seven types or nine types) as long as an appropriate number of combinations such as a big hit combination and a lost combination can be configured.

After the variable display of the decorative pattern is started, the decorative pattern display areas 5L, 5C, 5R of "left", "middle", and "right" are displayed until the fixed decorative pattern which is the variable display result is derived and displayed. In, for example, scroll display is performed such that the symbol numbers flow from upper to lower sequentially from the smallest to the largest, and when the decorative symbol with the largest symbol number (for example, “8”) is displayed, The decorative design with the smallest design number (for example, "1") is displayed. Alternatively, in at least any one of the decorative symbol display areas 5L, 5C, and 5R (for example, the "left" decorative symbol display area 5L, etc.), scroll display is performed from a symbol with a large symbol number to a symbol with a small symbol number. When the decorative design with the smallest number is displayed, the decorative design with the largest design number may be displayed subsequently.

In the display area of the image display device 5, a start winning prize memory display area 5H is arranged. In the starting winning a prize memory display area 5H, a hold memory display is displayed that allows the variable display hold number (special figure hold memory number) corresponding to the special figure game to be specified. Here, in the suspension of the variable display corresponding to the special drawing game, the game ball passes through the first start winning opening formed by the normal winning ball device 6A and the second starting winning opening formed by the normal variable winning ball device 6B. It is generated based on the start winning a prize by entering. That is, the starting condition (also referred to as “execution condition”) for executing the variable display game such as the special drawing game and the variable display of the decorative pattern is satisfied, but the variable display game based on the previously satisfied start condition is being executed. If the start condition that allows the start of the variable display game is not satisfied due to the fact that the pachinko gaming machine 1 is controlled to the jackpot gaming state, etc., the variable display corresponding to the established starting condition is suspended. Done.

The reserved memory display in the starting winning prize memory display area 5H is generated based on the starting winning prize caused by the game ball passing through (entering) the first starting winning prize hole, or the gaming ball passing through the second starting prize hole. The display mode (for example, display color or shape) may be changed depending on whether or not it is generated based on a start winning due to (entry). For example, the reserved memory display generated based on the starting winning due to the game ball passing (entry) through the first starting winning opening is displayed in a circular blue color, and the gaming ball passing (entry) through the second starting winning opening. The pending storage display generated based on the starting winning due to the above may be displayed as a round red display.

On the left side of the starting winning prize memory display area 5H in the display area of the image display device 5, a moving special figure display area 5I is provided. An image corresponding to the variable display currently being executed is displayed in the changing special map display area 5I. For example, during execution of the special figure game using the first special figure in the first special symbol display device 4A based on the game ball entering the first start winning hole, a circular special figure display area 5I To display a blue image. Further, while the special symbol game using the second special symbol in the second special symbol display device 4B is being executed based on the fact that the game ball has entered the second starting winning opening, it is a circular shape in the changing symbol display area 5I. A red image is displayed. That is, when the first or second start condition is satisfied, the display removed from the start winning a prize memory display area 5H may be shifted and displayed in the changing special figure display area 5I. By the display of the changing special symbol display area 5I, the player can recognize which of the first special symbol display device 4A and the second special symbol display device 4B the special symbol game is being executed.

In the example shown in FIG. 1, together with the start winning memory display area 5H, the first special hold for displaying the special figure hold storage number in a specifiable manner at the upper part of the first special symbol display device 4A and the second special symbol display device 4B. A display device 25A and a second hold display device 25B are provided. The first reserved display device 25A displays the number of the first special figure reserved memories so that it can be specified. The second reserved display device 25B displays the number of second special figure reserved memories so that it can be specified. The first special figure reservation storage number is the number of memories in which execution of the special figure game using the first special figure is suspended. The second special figure reservation storage number is the number of memories in which execution of the special figure game using the second special figure is suspended. The variable display pending storage number obtained by adding the first special figure pending storage number and the second special figure pending storage number is also referred to as a total pending storage number in particular. When simply saying "the number of special figure reservation storages", it usually means a concept including all of the number of first special figure reservation storages, the number of second special figure reservation storages and the total number of reservation storages. The first special figure reserved storage number and the second special figure reserved storage number are included, but the total reserved storage number is excluded).

Below the image display device 5, a normal winning ball device 6A and a normal variable winning ball device 6B are provided. The normal winning ball device 6A forms a first starting winning opening as a starting area (first starting area) that is always kept in a constant open state by a predetermined ball receiving member, for example. The ordinary variable winning ball device 6B is an electric motor having a pair of movable wing pieces which are changed between a normal open state in which it is in a vertical position and an expanded open state in which it is in a tilted position by a solenoid 81 for an ordinary electric accessory shown in FIG. A tulip-shaped accessory (ordinary electric accessory) is provided to form a second starting winning opening as a starting area (second starting area).

As an example, in the ordinary variable winning ball device 6B, when the solenoid 81 for the ordinary electric accessory is in the off state, the movable wing piece is in the vertical position, so that the game ball passes through (enters) the second starting winning port. It is difficult to open normally. On the other hand, in the normal variable winning ball device 6B, the game ball passes through the second starting winning port by the tilting control in which the movable wing piece is in the tilting position when the solenoid 81 for the normal electric accessory is on. It will be in an enlarged open state that is easy to enter. Although the normal variable winning ball device 6B allows the game ball to enter the second starting winning port even when it is in the normally open state, it is possible that the game ball enters as compared to when it is in the enlarged opening state. It may be configured to be low. Alternatively, the normal variable winning prize ball device 6B may be configured so that the game ball does not enter the second starting winning opening by closing the second starting winning opening in the normally open state. As described above, the second starting winning opening as the second starting area is in an expanded open state in which the game ball easily passes (enters), and a normal open state in which the game ball does not easily pass (enter) or cannot pass (enter). Changes to.

The game ball that has passed (entered) the first start winning opening formed in the normal winning ball device 6A is detected by the first starting opening switch 22A shown in FIG. 2, for example. The game ball that has passed (entered) the second starting winning opening formed in the normally variable winning ball device 6B is detected by, for example, the second starting opening switch 22B shown in FIG. Based on the fact that the game ball is detected by the first starting opening switch 22A, a predetermined number (for example, 3) of game balls are paid out as a prize ball, and the first special figure reserved storage number is a predetermined upper limit value (for example, " 4”) or less, the first start condition is satisfied. Based on the fact that the game ball is detected by the second start opening switch 22B, a predetermined number (for example, 3) of game balls are paid out as a prize ball, and the second special figure reservation storage number is a predetermined upper limit value (for example, " 4”) or less, the second start condition is satisfied. The number of award balls paid out based on the detection of the game ball by the first starting opening switch 22A and the number of award balls paid out based on the detection of the game ball by the second starting opening switch 22B. May be the same or different from each other.

A special variable winning ball device 7 is provided below the normal winning ball device 6A and the normal variable winning ball device 6B. The special variable winning ball device 7 is provided with a special winning opening door that is opened and closed by a solenoid 82 for the special winning opening door shown in FIG. 2, and the specific region is changed to an open state and a closed state by the special winning opening door. To form a big prize hole.

As an example, in the special variable winning ball device 7, when the solenoid 82 for the special winning opening door is in the OFF state, the special winning opening door closes the special winning opening, and the game ball passes through (enters) the special winning opening. Disable it. On the other hand, in the special variable winning ball device 7, when the solenoid 82 for the special winning opening door is in the on state, the special winning opening door opens the special winning opening, and the game ball passes through (enters) the special winning opening. ) Make it easier. In this way, the special winning opening as a specific area changes between an open state in which the game ball easily passes (enters) and is advantageous for the player, and a closed state where the game ball cannot pass (entry) and is disadvantageous to the player. To do. Instead of the closed state in which the game ball cannot pass (enter) the special winning opening, or in addition to the closed state, a partially open state in which the game ball does not easily pass (enter) the special winning opening may be provided.

The game ball that has passed (entered) the special winning opening is detected by the count switch 23 shown in FIG. 2, for example. Based on the fact that the game ball is detected by the count switch 23, a predetermined number (for example, 15) of game balls are paid out as prize balls. In this way, when the game ball passes (enters) the special winning opening which has been opened in the special variable winning ball device 7, the game ball passes through another winning opening such as the first starting winning opening or the second starting winning opening. More prize balls will be paid out than when you pass (enter). Therefore, when the special winning opening is opened in the special variable winning ball device 7, the game ball can enter the special winning opening, which is the first state advantageous for the player. On the other hand, if the special winning opening is closed in the special variable winning ball device 7, it becomes impossible or difficult for the player to obtain a winning ball by passing (entering) the game ball into the special winning opening, which makes it difficult for the player. It becomes a disadvantageous second state.

At a predetermined position of the game board 2 (on the left side of the game area in the example shown in FIG. 1), a normal symbol display device 20 is provided. As an example, the normal symbol display device 20 is composed of 7-segment or dot-matrix LEDs and the like like the first special symbol display device 4A and the second special symbol display device 4B, and is a plurality of types of identification information different from the special symbol. The ordinary pattern (also called "general drawing" or "normal drawing") is variably displayed (variable display). Such variable display of normal symbols is called a normal figure game (also called "normal figure game").

Above the normal symbol display device 20, a universal symbol holding display device 25C is provided. The universal figure reservation indicator 25C is configured to include, for example, four LEDs, and displays the number of stored universal figure reservations as the number of effective passage balls that have passed through the passage gate 41.

In addition to the above configuration, the surface of the game board 2 is provided with a windmill and a large number of obstacle nails that change the flow direction and speed of the game ball. Further, as the winning opening different from the first starting winning opening, the second starting winning opening, and the big winning opening, for example, a single or a plurality of general winning openings that are always kept open by a predetermined ball receiving member are provided. May be In this case, a predetermined number (for example, 10) of game balls may be paid out as a prize ball based on the fact that the game ball that has entered one of the general winning openings has been detected by a predetermined general winning ball switch. At the lowermost part of the game area, there is provided an outlet for taking in the game balls that have not entered any of the winning openings.

Speakers 8L and 8R for reproducing and outputting sound effects and the like are provided at upper left and right positions of the gaming machine frame 3, and a game effect lamp 9 is provided in the periphery of the game area. A decorative LED may be arranged around each structure (for example, the normal winning ball device 6A, the normal variable winning ball device 6B, the special variable winning ball device 7, etc.) in the game area of the pachinko gaming machine 1. At the lower right position of the gaming machine frame 3, a hit ball operation handle (operation knob) operated by a player or the like to shoot a game ball as a game medium toward a game area is provided. For example, the hit ball operation handle adjusts the resilience of the game ball according to the operation amount (rotation amount) by the player or the like. The hit ball operation handle may be provided with a single-shot launch switch for stopping the drive of the launch motor included in the ball launch device, and a touch ring (touch sensor).

At a predetermined position of the gaming machine frame 3 below the game area, a gaming ball paid out as a prize ball or a gaming ball rented out by a predetermined ball lending machine is held (stored) so as to be supplied to a ball striking device. The upper plate (striking ball supply plate) is provided. At the lower part of the gaming machine frame 3, there is provided a lower plate that holds (stores) surplus balls overflowing from the upper plate so that they can be discharged to the outside of the pachinko gaming machine 1.

A stick controller 31A that can be held by a player and tilted is attached to a member that forms the lower plate, for example, at a predetermined position on the front side of the upper surface of the lower plate body (for example, a central portion of the lower plate). There is. The stick controller 31A includes an operating stick held by the player, and a trigger button is provided at a predetermined position of the operating stick (for example, a position where the index finger of the operating hand is applied when the player holds the operating stick). There is. The trigger button can perform a predetermined instruction operation by a push-pull operation with a predetermined operating finger (for example, an index finger) while the player holds the operation rod of the stick controller 31A with an operating hand (for example, the left hand). It may be configured as follows. It suffices that a trigger sensor that detects a predetermined instruction operation such as a push/pull operation with respect to the trigger button is built in the operation rod.

A controller sensor unit 35A including a tilt direction sensor unit that detects a tilting operation with respect to the operating rod may be provided inside the main body of the lower plate below the stick controller 31A. For example, the tilt direction sensor unit is two transmissive photosensors (parallel sensors) arranged parallel to the board surface of the game board 2 on the left side of the center position of the operating rod when viewed from the side of the player who faces the pachinko gaming machine 1. Pair) and four transmission type photosensors (vertical sensor pairs) that are arranged perpendicularly to the board surface of the game board 2 on the right side of the center position of the operating rod when viewed from the player side. It may be configured to include a photo sensor.

As a member forming the upper plate, for example, a push button 31B that allows a player to perform a predetermined instruction operation by a pressing operation at a predetermined position on the front side of the upper plate body (for example, above the stick controller 31A). It is provided. The push button 31B may be configured to be capable of mechanically, electrically, or electromagnetically detecting a predetermined instruction operation, such as a pressing operation by the player. A push sensor 35B for detecting an operation action of the player performed on the push button 31B may be provided inside the main body of the upper plate at the position where the push button 31B is installed.

The pachinko gaming machine 1 is equipped with various control boards such as a main board 11, a production control board 12, a sound control board 13, a lamp control board 14, a power supply board 16 and a payout control board 17, as shown in FIG. ing. Also, the pachinko gaming machine 1 is equipped with a relay board 15 for relaying various control signals transmitted between the main board 11 and the effect control board 12. Further, in the pachinko gaming machine 1, various control signals transmitted between the main board 11 and the power supply board 16 or the payout control board 17, and the production control board 12, the voice control board 13, the lamp control board 14, and the like. A drawer relay board 19 is also mounted in order to relay various control signals transmitted to and from. The drawer relay board 19 is composed of a drawer relay board 19a on the game board side and a drawer relay board 19b on the game frame side as shown in FIG. Further, a frame relay board 26 for relaying various control signals is provided between the drawer relay board 19 and the voice control board 13, the lamp control board 14, and the like. In addition, various boards such as an information terminal board, a launch control board, and an interface board are arranged on the back surface of the game board 2 or the like of the pachinko gaming machine 1.

The power supply board 16 supplies an alternating current (AC) to supply electric power supplied from an AC power supply, which is an external power supply, to various control boards such as the main board 11, the effect control board 12, and the payout control board 17. A rectifier circuit for converting to direct current (DC), a power supply circuit for converting a predetermined direct current voltage to a specific direct current voltage (for example, a voltage of DC 32V, 12V, 5V, etc.), and the like. The output voltage of the power supply circuit included in the power supply board 16 is supplied to the main board 11, the effect control board 12, and the like via the drawer relay board 19.

The main board 11 is a control board on the main side, on which various circuits for controlling the progress of the game in the pachinko gaming machine 1 are mounted. The main board 11 is mainly intended for a random number setting function used in a special figure game, a function for inputting a signal from a switch or the like arranged at a predetermined position, and a sub-side control board including an effect control board 12 and the like. It has a function of outputting a control command as an example of the command information as a control signal and transmitting it, a function of outputting various information to a hall management computer, and the like. Moreover, the main board 11 performs lighting/extinguishing control of each LED (for example, segment LED) which comprises the 1st special symbol display device 4A and the 2nd special symbol display device 4B, and the 1st special symbol and the 2nd special symbol. The variable display of a predetermined display symbol such as controlling the variable display of the normal symbol display 20 and controlling the variable display of the normal symbol by the normal symbol display 20 by controlling the lighting/turning off/coloring of the normal symbol display 20. It also has a control function.

As shown in FIG. 2, on the main board 11, for example, a game control microcomputer 100, a switch circuit 110 that captures detection signals from the game ball detection switches and transmits the detection signals to the game control microcomputer 100, a game. A solenoid circuit 111 for transmitting a solenoid drive signal from the control microcomputer 100 to the solenoids 81 and 82, a voltage of DC32V and a voltage of DC5V supplied from the power supply board 16 are monitored, and signals such as a power-off signal and a reset signal are monitored. The 1st power supply monitoring circuit 112 which outputs, the 2nd power supply monitoring circuit 113, the backup power supply circuit 114 which supplies backup power to the game control microcomputer 100, etc. are mounted.

The production control board 12 is a sub-side control board that is independent of the main board 11, receives the control signal transmitted from the main board 11 via the relay board 15, and outputs the image display device 5 and the speakers 8L and 8R. And various circuits for controlling the production operation by the production electric parts such as the game effect lamp 9 and the decorative LED are mounted. That is, the production control board 12 performs all or part of the display operation in the image display device 5 and the sound output operation from the speakers 8L and 8R, and all or one of the lighting/extinguishing operations in the game effect lamp 9, the decorative LED, and the like. It is provided with a function of determining the control contents for causing the electric parts for production, such as a section, to execute a predetermined production operation.

The voice control board 13 is a control board for voice output control that is provided separately from the effect control board 12, and causes the speakers 8L and 8R to output audio based on commands and control data from the effect control board 12. A processing circuit for executing audio signal processing is installed. The lamp control board 14 is a control board for lamp output control that is provided separately from the effect control board 12, and based on commands and control data from the effect control board 12, the game effect lamp 9, the LED for decoration, and the like. It is equipped with a lamp driver circuit and the like for driving to turn on/off.

The main board 11 is provided with wiring for transmitting detection signals from various switches such as a gate switch 21, a starting opening switch (first starting opening switch 22A and second starting opening switch 22B), a count switch 23, and an error system switch 29. It is connected. The gate switch 21, the first starting opening switch 22A, the second starting opening switch 22B, and the count switch 23 have any configuration capable of detecting a game ball as a game medium, such as what is called a sensor. Anything you have is acceptable. When the main board 11 receives the detection signals from the various switches, the main board 11 sends a prize ball signal for executing the prize ball payout corresponding to the various switches to the payout control board 17. The prize ball signal may be transmitted via the power supply board 16. When the payout control board 17 receives the prize ball signal, it drives the ball payout device 18 to pay out the prize ball according to the prize ball signal. The error system switch 29 may be any switch having an arbitrary configuration for detecting radio waves, magnets, etc., such as a so-called sensor. Further, the main board 11 is connected to a wiring for transmitting a command signal for performing display control of the first special symbol display device 4A, the second special symbol display device 4B, the normal symbol display device 20, and the like.

The control signal transmitted from the main board 11 to the effect control board 12 is relayed by the relay board 15. The control command transmitted from the main board 11 to the effect control board 12 via the relay board 15 is, for example, an effect control command transmitted and received as an electric signal. The effect control command includes, for example, a display control command used to control the image display operation in the image display device 5, a voice control command used to control the voice output from the speakers 8L and 8R, and the game effect lamp 9. It also includes a lamp control command used to control the lighting operation of the decoration LED and the like. Each of these effect control commands has, for example, a 2-byte structure, and the first byte indicates MODE (command classification) and the second byte indicates EXT (command type). It may be set in advance so that the first bit (bit 7) of the MODE data is always "1" and the first bit of the EXT data is "0".

The game control microcomputer 100 mounted on the main board 11 is, for example, a one-chip microcomputer, a ROM (Read Only Memory) 101 for storing a game control program, fixed data, and the like, and a game control work. A RAM (Random Access Memory) 102 that provides an area, a CPU (Central Processing Unit) 103 that executes a game control program to perform a control operation, and a numerical data that indicates a random number value independently of the CPU 103 A random number circuit 104 for performing and an I/O (Input/Output port) 105 are provided.

As an example, in the game control microcomputer 100, the CPU 103 executes a program read from the ROM 101 to execute a process for controlling the progress of the game in the pachinko gaming machine 1. At this time, the CPU 103 reads fixed data from the ROM 101 to read fixed data, the CPU 103 writes variable data to the RAM 102 and temporarily stores the data, and the CPU 103 writes various variable data to the RAM 102. A variable data read operation for reading out, a receiving operation in which the CPU 103 receives an input of various signals from the outside of the game control microcomputer 100 via the I/O 105, and a CPU 103 to the outside of the game control microcomputer 100 via the I/O 105. The transmission operation of outputting various signals is also performed.

It should be noted that the one-chip microcomputer constituting the game control microcomputer 100 is required to include at least the RAM 103 in addition to the CPU 103, and the ROM 101, the random number circuit 104, the I/O 105, etc. may be externally attached.

In the game control microcomputer 100, for example, the random number circuit 104 or the like counts the numerical data indicating various random number values used for controlling the progress of the game in an updatable manner. The random number used to control the progress of the game is also called a game random number. The game random number may be updated by hardware such as the random number circuit 104, or may be updated by software when the CPU 103 of the game control microcomputer 100 executes a predetermined computer program. May be. For example, a predetermined random number value is displayed on a random counter provided in a predetermined area (game control counter setting unit or the like) of the RAM 102 in the game control microcomputer 100 or a random counter provided in an internal register separate from the RAM 102. Numerical value data may be stored, and the CPU 103 may update the stored value periodically or irregularly to update the random number value.

The ROM 101 included in the game control microcomputer 100 stores various selection data and table data used for controlling the progress of the game, in addition to the game control program. For example, the ROM 101 stores data constituting a plurality of determination tables, determination tables, setting tables, etc. prepared for the CPU 103 to make various determinations, determinations, and settings. Further, in the ROM 101, table data forming a plurality of command tables used for the CPU 103 to transmit control signals as various control commands from the main board 11 and a variation pattern table storing a plurality of types of variation patterns are configured. The table data and the like to be stored are stored.

In the RAM 102 included in the game control microcomputer 100, various data used for controlling the progress of the game in the pachinko gaming machine 1 are rewritably temporarily stored. The RAM 102 included in the game control microcomputer 100 may be a backup RAM that is partially or wholly backed up by the backup power supply circuit 114. That is, even if the power supply to the pachinko gaming machine 1 is stopped, a part or the whole of the RAM 102 is kept for a predetermined period (until the capacitor included in the backup power supply circuit 114 is discharged and the backup power supply circuit 114 cannot be supplied with power). Content is saved. In particular, at least data according to the game state, that is, the control state of the CPU 103 (game process flag, etc.) and data indicating the number of unpaid prize balls may be stored in the backup RAM. The data according to the control state of the CPU 103 is data necessary for recovering the control state before the occurrence of a power failure or the like based on the data when the power is restored after a power failure or the like (power interruption). .. Further, data according to the control state and data indicating the number of unpaid prize balls are defined as data indicating the progress state of the game.

The I/O 105 included in the game control microcomputer 100 is, for example, for inputting various signals from the outside of the game control microcomputer 100 and for transmitting various signals to the outside of the game control microcomputer 100. And an output port. Detection signals from various switches, a power-off signal from the first power supply monitoring circuit 112, and the like are input to the input port of the I/O 105.

On the effect control board 12, an effect control CPU 120 that performs a control operation according to a program, a ROM 121 that stores an effect control program and fixed data, a RAM 122 that provides a work area for the effect control CPU 120, and an image display device. 5, a display control unit 123 that executes processing for determining the control content of the display operation, a random number circuit 124 that updates numerical data indicating a random number value independently of the effect control CPU 120, and an I/O 125. And are installed.

As an example, in the effect control board 12, the effect control CPU 120 executes the effect control program read from the ROM 121, whereby processing for controlling effect operation by the effect electric components is executed. At this time, the effect control CPU 120 reads out fixed data from the ROM 121 by a fixed data read operation, the effect control CPU 120 writes various variable data in the RAM 122 and temporarily stores the variable data, and the effect control CPU 120 writes in the RAM 122. A variation data read operation for reading various temporarily stored variation data, a reception operation in which the production control CPU 120 receives an input of various signals from the outside of the production control board 12 via the I/O 125, and the production control CPU 120 performs I/O. A transmission operation of outputting various signals to the outside of the production control board 12 via O125 is also performed.

The effect control CPU 120, the ROM 121, and the RAM 122 may be included in a one-chip effect control microcomputer mounted on the effect control board 12. The effect control board 12 has a wiring for transmitting a video signal to the image display device 5 and a sound effect as an information signal indicating sound number data to the sound control board 13 via the frame relay board 26. A wiring for transmitting a signal, a wiring for transmitting an illumination signal as an information signal indicating the lamp data, and the like are connected to the lamp control board 14. Furthermore, the control sensor unit 35A transmits, to the effect control board 12, an operation detection signal as an information signal indicating that a player's operation on the stick controller 31A has been detected, via the frame relay board 26. A wire and a wire for transmitting an operation detection signal as an information signal indicating that the player's operation on the push button 31B is detected from the push sensor 35B are also connected.

In the effect control board 12, for example, the random number circuit 124 or the like counts the numerical data indicating various random number values used for controlling the effect operation in an updatable manner. The random number used to control such a rendering operation is also referred to as a rendering random number.

In the ROM 121 mounted on the effect control board 12 shown in FIG. 2, various data tables used for controlling the effect operation are stored in addition to the effect control program. For example, the ROM 121 stores table data forming a plurality of determination tables and determination tables prepared for the production control CPU 120 to make various determinations, determinations, and settings, pattern data forming various production control patterns, and the like. Remembered The production control pattern is created from process data including production control execution data (display control data, voice control data, lamp control data, operation detection control data, etc.) and end code associated with the production control process timer determination value, for example. It is configured.

The RAM 122 mounted on the effect control board 12 stores various data used for controlling the effect operation. Unlike the RAM 102 included in the game control microcomputer 100, the RAM 122 mounted on the effect control board 12 is not backed up by the backup power supply circuit. Therefore, when the power supply to the pachinko gaming machine 1 is stopped, the contents stored in the RAM 122 are not saved and disappear.

The display control unit 123 mounted on the effect control board 12 determines the control content of the display operation in the image display device 5 based on the display control command from the effect control CPU 120. For example, the display control unit 123 performs control for executing variable display of decorative symbols and various effect displays by determining the switching timing of effect images displayed on the display screen of the image display device 5. As an example, the display control unit 123 may include a VDP (Video Display Processor), a CGROM (Character Generator ROM), a VRAM (Video RAM), an LCD drive circuit, and the like. The VDP may be a GPU (Graphics Processing Unit), a GCL (Graphics Controller LSI), or a microprocessor for image processing, which is more commonly called a DSP (Digital Signal Processor). The CGROM may be a non-rewritable semiconductor memory, a rewritable semiconductor memory such as a flash memory, or a non-volatile recording medium such as a magnetic memory or an optical memory. It may be configured.

The I/O 125 mounted on the performance control board 12 is, for example, an input port for receiving a performance control command transmitted from the main board 11 or the like, and an output port for transmitting various signals to the outside of the performance control board 12. It is configured to include and. For example, from the output port of the I/O 125, a video signal transmitted to the image display device 5, a command (sound effect signal) transmitted to the sound control board 13, and a command transmitted to the lamp control board 14. (Lighting signal) is output.

The voice control board 13 has, for example, an input/output driver, a voice synthesizing IC, a voice data ROM, an amplifier circuit, a volume, and the like. As an example, in the voice control board 13, the sound number data shown in the sound effect signal transmitted from the effect control board 12 is input to the voice synthesis IC via the input/output driver. The voice synthesizing IC generates a voice or a sound effect corresponding to the sound number data and outputs it to the amplifier circuit. The amplifier circuit outputs an audio signal obtained by amplifying the output level of the voice synthesis IC to a level according to the volume set by the volume, to the speakers 8L and 8R. The voice data ROM stores control data according to the sound number data, and the voice synthesizing IC reads the control data according to the sound number data to generate a voice or a sound effect. The data stored in the audio data ROM may be composed of data indicating the output mode of audio and sound effects in a predetermined period in time series.

The lamp control board 14 is equipped with, for example, an input/output driver and a lamp driver. As an example, in the lamp control board 14, the illumination signal transmitted from the effect control board 12 is input to the lamp driver via the input/output driver. The lamp driver amplifies the electric decoration signal and supplies it to the game effect lamp 9 and the decorative LED.

FIG. 3 is a perspective view of the pachinko gaming machine with the front frame released. As shown in FIG. 3, the gaming machine frame 3 of the pachinko gaming machine 1 is provided with a gaming frame 161 and a front frame 162 that can be opened and closed. A glass window 163 is formed on the front frame 162 so that a game area formed on the surface of the game board 2 can be viewed from the front of the front frame 162. The front frame 162 is also provided with an effect device such as the game effect lamp 9 (not shown in FIG. 3).

On the back surface of the game board 2, a main board 11, a performance control board 12, and a drawer relay board 19a are provided. The drawer relay board 19a is a board that relays voltage and various control signals transmitted between the main board 11, the effect control board 12, and the like, and various boards on the game frame 161 side. The drawer relay board 19a is provided with drawer connectors 32a and 32b. That is, the drawer connectors 32a and 32b are provided on the game board 2 via the drawer relay board 19a. The drawer connector 32a is connected to the main board 11 via a predetermined wiring, and the drawer connector 32b is connected to the effect control board 12 via a predetermined wiring.

The game frame 161 is provided with a power supply board 16, a payout control board 17, a drawer relay board 19b, and a frame relay board 26 (not shown in FIG. 3). The drawer relay board 19b is a board that relays the voltage and various control signals transmitted between the power supply board 16, the payout control board 17, the frame relay board 26, and the various boards on the game board 2 side. Frame-side connectors 33a and 33b are provided on the drawer relay board 19b. That is, the frame side connectors 33a and 33b are provided on the game frame 161 via the drawer relay board 19b. The frame-side connectors 33a and 33b are connected to the power supply board 16. The frame-side connector 33 a is also connected to the payout control board 17, and the frame-side connector 33 b is also connected to the frame relay board 26. The frame side connectors 33a and 33b are provided at positions that are coupled to the drawer connectors 32a and 32b when the game board 2 is installed in the game frame 161.

The game frame 161 is a frame for installing the game board 2. A groove having the same size as the game board 2 is formed in the game frame 161, and when the game board 2 is fitted in this groove and the game board 2 is fixed to the game frame 161 with a stopper or the like, the game board 2 is played. It is installed in the frame 161. When installing the game board 2 in the game frame 61, the drawer connector 32a is connected to the frame side connector 33a, and the drawer connector 32b is connected to the frame side connector 33b. As a result, various boards on the game board 2 side (such as the main board 11) and various boards on the game frame 161 side (such as the power supply board 16) are connected to the drawer connectors 32a and 32b, the frame side connectors 33a and 33b, and the drawer relay board. 19a and 19b (drawer relay board 19) are connected. As described above, the drawer connectors 32a and 32b and the frame side connectors 33a and 33b can facilitate the connection between the power supply board 16 and the main board 11.

FIG. 4 is a block diagram showing a configuration example of the power supply board 16 and the drawer relay board 19b. The power supply board 16 mainly includes a thermistor 56, a common mode choke coil 57, a rectifying unit 61, a DC power supply unit 62, a relay 71, and a relay drive circuit 72.

The thermistor 56 is an inrush current prevention resistor for suppressing an inrush current generated from the AC power supply 50 when the power is turned on. The thermistor 56 has a large resistance value in a state where no current flows or a transient state in which a current starts to flow, and has a property that the resistance value decreases due to self-heating after a certain period of time has passed since the current started to flow. The common mode choke coil 57 is a noise filter for removing noise. The rectification unit 61 is configured by, for example, a full-wave rectification circuit formed by bridge-connecting four diodes, and converts (rectifies) an AC voltage into a DC voltage.

The DC power supply unit 62 includes a power supply circuit configured by a DC-DC converter or the like that converts the voltage converted into the DC voltage by the rectification unit 61 into a specific DC voltage such as DC 32V, 12V, 5V. In this embodiment, as an example, the DC power supply unit 62 uses a power supply circuit (32V power supply circuit) that outputs a DC 32V voltage and a DC 12V voltage as a power supply circuit that outputs a DC voltage input to the main board 11. It includes a power supply circuit (12V power supply circuit) for outputting and a power supply circuit (5V power supply circuit) for outputting a voltage of DC 5V. In addition, the DC power supply unit 62, as a power supply circuit that outputs the DC voltage that is input to the performance control board 12, a power supply circuit that outputs a voltage of DC32V (32V power supply circuit) and a power supply circuit that outputs a voltage of DC12V (12V). Power supply circuit) and a power supply circuit (5V power supply circuit) that outputs a voltage of DC 5V. Each voltage (including GND; ground) created in the DC power supply unit 62 is transmitted to the drawer relay board 19b. In this embodiment, two 32V power supply circuits, 12V power supply circuits and two 5V power supply circuits are provided, but the number of each power supply circuit is not limited to two, and one or three or more may be provided. Good.

The relay 71 is, for example, an electromagnetic relay including a coil and a contact portion, and when a current flows through the coil, the contact portion switches from an open state to a closed state (turns on) due to an electromagnetic force, and no current flows through the coil. Then, the electromagnetic force disappears, and the contact part is switched from the closed state to the open state (off state). The relay 71 is provided so that both ends of the thermistor 56 can be short-circuited. For example, when a current flows through the coil and the contact portion is closed, both ends of the thermistor 56 are short-circuited, and a current hardly flows through the thermistor 56, that is, the thermistor is in an invalid state. When no current flows in the coil and the contact portion is opened, the short circuit of the thermistor 56 is released, and a current flows in the thermistor 56, that is, the thermistor is in an effective state. In this way, the relay 71 is provided so as to be switchable between an electric line for disabling the thermistor 56 and an electric line for enabling the thermistor 56.

The relay drive circuit 72 is composed of, for example, a resistor and a transistor, and outputs a 12V power supply circuit of the DC power supply unit 62 (in this embodiment, as an example, outputs a voltage of 12V input to the performance control board 12). It is a circuit for driving the relay 71 according to the output voltage of the (power supply circuit) (flowing a current through the coil of the relay 71 to close the contact portion). In this embodiment, the relay drive circuit 72 monitors, for example, the output voltage of the 12V power supply circuit, and when the voltage becomes equal to or higher than a predetermined voltage such as DC 6V, a current is passed through the coil of the relay 71 to The contact portion of 71 is closed. The voltage monitored by the relay drive circuit 72 is not limited to the output voltage of the 12V power supply circuit. For example, the voltage to be monitored by the relay drive circuit 72 may be any voltage as long as it is an output voltage of the 12V power supply circuit, an output voltage of the 32V power supply circuit, an output voltage of the 5V power supply circuit, or a voltage in a circuit to which a DC voltage is applied. May be the voltage.

FIG. 5 is a circuit diagram showing a configuration example of the power supply board 16. As shown in FIG. 5, the power supply board 16 includes input terminals 51a and 51b, a power supply switch 52, a fuse 53, a surge absorber 54, a capacitor 55, a thermistor 56, a common mode choke coil 57, a capacitor 58, a rectifying unit 61, a DC power supply. A section 62, output terminals 63a to 63h, a relay 71, and a relay drive circuit 72 are provided.

An AC power supply 50 is connected to the input terminals 51a and 51b as shown in FIG. The power switch 52 includes a switch S1 and a switch S2, one end of the switch S1 is connected to the input terminal 51a, and one end of the switch S2 is connected to the input terminal 51b. The other end of the switch S1 is connected to one end of the coil L2 of the common mode choke coil 57, and the other end of the switch S2 is connected to one end of the fuse 53. The other end of the fuse 53 is connected to one end of the coil L1 of the common mode choke coil 57 via the thermistor 56. A surge absorber 54 and a capacitor 55 which are connected in parallel are connected to the other end of the switch S1 and the other end of the fuse 53. A capacitor 58 is connected to the other end of the coil L1 and the other end of the coil L2 of the common mode choke coil 57.

The rectifying unit 61 is composed of diodes Da, Db, Dc, Dd, De and Df. Of these, the diodes Da, Db, Dc, and Dd form a full-wave rectifier circuit 61a. The diodes De and Df form a full-wave rectifier circuit 61b together with the diodes Da and Db of the full-wave rectifier circuit 61a. That is, in this example, the full-wave rectifier circuit 61a and the full-wave rectifier circuit 61b share the diodes Da and Db. Here, the cathode of the diode Da and the anode of the diode Dc are connected to the other end of the coil L2 of the common mode choke coil 57 together with the anode of the diode Df. The cathode of the diode Db and the anode of the diode Dd are connected to the other end of the coil L1 of the common mode choke coil 57 together with the anode of the diode De. The anode of the diode Da and the anode of the diode Db are connected to each other and form the low voltage node NL of the rectification unit 61. The cathode of the diode Dc and the cathode of the diode Dd are connected to each other, and form the first high voltage node NH1 of the rectifier 61. The cathode of the diode De and the cathode of the diode Df are connected to each other to form the second high voltage node NH2 of the rectifying unit 61.

The DC power supply unit 62 includes, for example, a 32V power supply circuit 62a, a 12V power supply circuit 62b, a 5V power supply circuit 62c, a 32V power supply circuit 62d, a 12V power supply circuit 62e, and a 5V power supply circuit 62f. The first high voltage node NH1 and the low voltage node NL of the rectifying unit 61 are connected to the 32V power supply circuit 62a, the 12V power supply circuit 62b, and the 5V power supply circuit 62c (power supply circuits 62a to 62c). The power supply circuits 62a to 62c output a voltage input to a board that is mainly involved in the production control, such as the production control board 12, the sound board 13, and the lamp board 14, for example. The second high voltage node NH2 and the low voltage node NL of the rectifying unit 61 are connected to the 32V power supply circuit 62d, the 12V power supply circuit 62e, and the 5V power supply circuit 62f (power supply circuits 62d to 62f). The power supply circuits 62d to 62f output a voltage input to a board involved in game control, such as the main board 11, for example. Output nodes of the power supply circuits 62a to 62f are connected to output terminals 63a to 63f. In addition, the low voltage node NL of the rectifying unit 61 is connected to the output terminals 63g and 63h. The voltage of the output terminals 63g and 63h (voltage of the low voltage node NL) is the reference voltage (GND) of the power supply circuits 62a to 62f. The output terminals 63a to 63c and 63g are connected to the wiring connected to the frame side connector 33b of the drawer relay board 19b, and the output terminals 63d to 63f and 63h are connected to the frame side connector 33a of the drawer relay board 19b. Connected to the wiring.

The relay 71 includes a coil 71L and a contact portion 71S. One end of the contact portion 71S is connected to one end of the thermistor 56, and the other end of the contact portion 71S is connected to the other end of the thermistor 56. That is, the contact portion 71S of the relay 71 is connected in parallel to the thermistor 56. Further, the coil 71L is connected to the relay drive circuit 72.

The relay drive circuit 72 includes, for example, a transistor 73, resistors 74 to 76, a diode 77, and an electrolytic capacitor 78. The emitter of the transistor 73 is connected to the low voltage node NL (output terminal 63h) of the rectifier 61, and the collector of the transistor 73 is connected to one end of the coil 71L. The other end of the coil 71L is connected to the output node (output terminal 63b) of the 12V power supply circuit 62b. Further, one end of the resistor 74 is connected to the other end of the coil 71L, and one end of the resistor 75 is connected to the other end of the resistor 74. The other end of the resistor 75 is connected to one end of the resistor 76 and the base of the transistor 73. The other end of the resistor 76 is connected to the emitter of the transistor 73. The cathode of the diode 77 is connected to one end of the resistor 74, and the anode of the diode 77 is connected to the other end of the resistor 74. The positive electrode of the electrolytic capacitor 78 is connected to one end of the resistor 75, and the negative electrode of the electrolytic capacitor 78 is connected to the other end of the resistor 76.

FIG. 6 is a block diagram showing a configuration example of the main board 11 and the like and the drawer relay board 19a. As shown in FIG. 6, the drawer connector 32 a of the drawer relay board 19 a is connected to the wiring connected to the main board 11. Through this wiring, each voltage of DC32V, 12V, 5V, GND and various signals are transmitted from the drawer connector 32a to the main board 11. The signal transmitted from the drawer connector 32a to the main board 11 may include a clear signal. The clear signal may be an electric signal that is in an ON state while a clear switch (not shown) mounted on the power supply board 16 is being pressed. The clear switch may be mounted on the main board 11. The clear signal is input to the game control microcomputer 100. The drawer connector 32b of the drawer relay board 19a is connected to the wiring connected to the effect control board 12. Through this wiring, each voltage of DC 32V, 12V, 5V, GND and various signals are transmitted from the drawer connector 32b to the effect control board 12.

In addition, in this embodiment, the voltage and the signal are transmitted to the main board 11 and the effect control board 12 via the two drawer connectors, but the wiring connected to the main board 11 is used. And the wiring connected to the production control board 12 are collectively connected to one drawer connector, and the voltage and the signal are transmitted to the main board 11 and the production control board 12 via one drawer connector. You may comprise. In this case, the output terminals 63a to 63h of the power supply board 16 may be connected to one frame side connector corresponding to the one drawer connector.

In this embodiment, the voltage of DC32V transmitted to the main board 11 is supplied to the solenoids 81 and 82 shown in FIG. 2 via the solenoid circuit 111, for example, and used to drive these solenoids. It is monitored by the first power supply monitoring circuit 112 and the second power supply monitoring circuit 113. The DC 12V voltage transmitted to the main board 11 is, for example, various types such as the gate switch 21, the first and second starting port switches 22A and 22B, the count switch 23, and the error system switch 29 shown in FIG. 2 via the switch circuit 110. It is supplied to the switches and is used to operate these switches, or is supplied to the first special symbol display device 4A and the second special symbol display device 4B to drive (turn on) the LEDs provided in these devices. It is also used. Further, the voltage of DC5V transmitted to the main board 11 is supplied to various ICs such as the game control microcomputer 100 and a power failure monitoring reset module IC that constitutes a power supply monitoring circuit, and is used to drive these ICs. Be done. This DC5V voltage is supplied to the DC32V voltage and DC12V voltage and the performance control board 12 at a decreasing speed when the power supply is cut off by electrolytic capacitors 87c and 87d provided in the filter circuit 36 described later. It is sufficiently slower than the rate of decrease of voltage such as DC5V. Note that the voltage of DC5V is sufficiently slow in rising speed when the power is turned on as compared with the rising speed of the voltage of DC32V and the voltage of DC12V.

The voltage of DC 32V transmitted to the performance control board 12 is supplied to, for example, a solenoid for a movable member for performance or a motor for performance, and is used for driving these solenoids and motors. The DC 12V voltage transmitted to the effect control board 12 is supplied to, for example, a sensor for the effect movable member or a decorative LED, and is used to drive the sensor or the decorative LED. The voltage of DC5V transmitted to the effect control board 12 is supplied to various ICs such as the effect control CPU 120, the ROM 121, and the RAM 122, and used to drive these ICs.

The main board 11 includes a filter circuit 36 in addition to the game control microcomputer 100, the switch circuit 110, the solenoid circuit 111, and the like. In addition, the effect control board 12 includes a filter circuit 37 in addition to the effect control CPU 120 and the ROM 121 described above. The filter circuits 36 and 37 are circuits for removing noise generated in each voltage line (each power supply line) supplied from the power supply board 16 via the drawer relay board 19 (19a, 19b).

Each voltage of DC 32V, 12V, 5V via the drawer connector 32a is input to the filter circuit 36 of the main board 11. Each voltage output from the filter circuit 36 is input to the game control microcomputer 100 included in the main board 12 and each circuit. For example, the voltages of 32 V DC and 5 V DC output from the filter circuit 36 are input to the first power supply monitoring circuit 112 and the second power supply monitoring circuit 113, respectively. Further, the voltage of DC5V output from the filter circuit 36 is input to the game control microcomputer 100 and the backup power supply circuit 114. This DC5V voltage is a voltage for driving the game control macro computer 100 and each IC such as a power failure monitoring reset module IC that constitutes a power supply monitoring circuit. The DC 12V voltage output from the filter circuit 36 is input to the solenoid circuit 111. The DC voltages of 32V, 12V, and 5V may be input to circuits other than the above circuits and ICs, ICs, and the like.

Further, the respective voltages of DC 32V, 12V, 5V via the drawer connector 32b are input to the filter circuit 37 of the effect control board 12. Each voltage output from the filter circuit 37 is input to the effect control CPU 120 and each circuit included in the effect control board 12.

FIG. 7 shows an example of the filter circuit. As shown in FIG. 7A, the filter circuit 36 provided on the main substrate 11 is, for example, a three-terminal capacitor 85a to 85c and a bypass capacitor (also referred to as a decoupling capacitor) 86a to prevent high frequency noise. 86c and electrolytic capacitors 87a-87d for low frequency noise countermeasures. The input terminal (IN) of the three-terminal capacitor 85a is connected to the input side wiring of the DC32V power supply line (electric path on which the voltage of DC32V is applied), and the output terminal (OUT) of the three-terminal capacitor 85a is connected to the DC32V power line. It is connected to the wiring on the output side. The ground terminal (GND) of the three-terminal capacitor 85a is grounded (connected to the GND line). A bypass capacitor 86a of 0.1 μF (micro farad) is connected to the output terminal and the ground terminal of the three-terminal capacitor 85a. Further, a 330 μF electrolytic capacitor 87a is connected to the output terminal and the ground terminal of the three-terminal capacitor 85a. The positive electrode of the electrolytic capacitor 87a is connected to the output terminal of the three-terminal capacitor 85a, and the negative electrode of the electrolytic capacitor 87a is connected to the ground terminal of the three-terminal capacitor 85a. The same applies to the polarities of the electrolytic capacitors 87b to 87e described later.

The input terminal (IN) of the three-terminal capacitor 85b is connected to the wiring on the input side of the DC12V power supply line (electric path on which DC12V voltage is applied), and the output terminal (OUT) of the three-terminal capacitor 85b is connected to the DC12V power line. It is connected to the wiring on the output side. The ground terminal (GND) of the three-terminal capacitor 85b is grounded. A bypass capacitor 86b of 0.1 μF is connected to the output terminal and the ground terminal of the three-terminal capacitor 85b. A 220 μF electrolytic capacitor 87b is connected to the output terminal and the ground terminal of the three-terminal capacitor 85b.

The input terminal (IN) of the three-terminal capacitor 85c is connected to the input side wiring of the DC5V power supply line (electric path on which the voltage of DC5V is applied), and the output terminal (OUT) of the three-terminal capacitor 85c is connected to the DC5V power line. It is connected to the wiring on the output side. The ground terminal (GND) of the three-terminal capacitor 85c is grounded. A bypass capacitor 86c of 0.1 μF is connected to the output terminal and the ground terminal of the three-terminal capacitor 85c. Further, a 2700 μF electrolytic capacitor 87c is connected to the output terminal and the ground terminal of the three-terminal capacitor 85c, and further a 2700 μF electrolytic capacitor 87d is connected. That is, the two electrolytic capacitors 87c and 87d connected in parallel are connected to the output terminal and the ground terminal of the three-terminal capacitor 85c. Instead of the two electrolytic capacitors 87c and 87d, one electrolytic capacitor of 5400 μF or 2700 μF may be connected, or three or more electrolytic capacitors having a capacity smaller than 2700 μF may be connected in parallel.

As shown in FIG. 7(B), the filter circuit 37 provided on the production control board 12 is configured by using, for example, three-terminal capacitors 85a to 85c, bypass capacitors 86a to 86c, and electrolytic capacitors 87a, 87b, and 87e. Has been done. The three-terminal capacitor 85a, the bypass capacitor 86a, and the electrolytic capacitor 87a provided on the DC32V power supply line, and the three-terminal capacitor 85b, the bypass capacitor 86b, and the electrolytic capacitor 87b provided on the DC12V power supply line are provided on the main board 11. Since the parts are the same as those in the filter circuit 36 and the connection relationships of the parts are also the same, description of these parts will be omitted.

Further, the three-terminal capacitor 85c and the bypass capacitor 86c provided on the DC5V power supply line are the same as the respective parts in the filter circuit 36 provided on the main board 11, and the connection relationships of the respective parts are also the same. Description of parts is omitted. An electrolytic capacitor 87e of 470 μF is connected to the output terminal and the ground terminal of the three-terminal capacitor 85c.

Here, comparing the filter circuit 36 and the filter circuit 37, the capacities of the electrolytic capacitors provided in the DC5V power supply line are different. Specifically, the total capacitance of the electrolytic capacitors in the filter circuit 36 is 5400 μF, whereas the total capacitance of the electrolytic capacitors in the filter circuit 37 is 470 μF. The larger the capacity of the electrolytic capacitor, the longer the discharge time. For example, when the DC5V power supply line on the input side is cut off, the voltage drop of DC5V on the output side of the filter circuit 36 becomes slower than the voltage drop of DC5V on the output side of the filter circuit 37 (voltage decrease speed). Therefore, the electrolytic capacitors 87c and 87d in the filter circuit 36 have a function as a delay circuit. When the delay circuit is not incorporated in the filter circuit 36, an electrolytic capacitor 87e of 470 μF may be connected instead of the electrolytic capacitors 87c and 87d, that is, the filter circuit 36 and the filter circuit 37 may be completely the same. ..

FIG. 8 is a diagram showing the relationship between the input voltage and the output voltage of the filter circuits 36 and 37. As shown in FIG. 8A, when the input voltage of the filter circuits 36 and 37 in the DC 32V power supply line drops from 32V to 0V at the timing of T1, the output voltage of the filter circuits 36 and 37 gradually drops from T1. Then, it becomes almost 0V at the timing of T2. As shown in FIG. 8B, when the input voltage of the filter circuits 36 and 37 in the DC12V power supply line drops from 12V to 0V at the timing of T1, the output voltage of the filter circuits 36 and 37 gradually drops from T1. Then, it becomes almost 0V at the timing of T3. Further, as shown in FIG. 8C, when the input voltage of the filter circuit 36 in the DC5V power supply line decreases from 5V to 0V at the timing of T1, the output voltage of the filter circuit 36 gradually decreases from T1. Then, it becomes almost 0V at the timing of T4. On the other hand, when the input voltage of the filter circuit 37 in the DC5V power supply line drops from 5V to 0V at the timing of T1, the output voltage of the filter circuit 37 gradually decreases from T1 and the timing of T5 considerably earlier than T4. Is almost 0V.

As shown in FIG. 8C, the voltage on the output side decreases from 5 V, and for example, it is a voltage at which the CPU of the main board 11 (CPU 103) or the CPU of the effect control board 12 (CPU 120 for effect control) stops. Regarding the timing of reaching the CPU stop voltage, the filter circuit 36 is delayed by a period τ from the filter circuit 37. As described above, the filter circuit 36 in the DC5V power supply line of the main board 11 has the electrolytic capacitors 87c and 87d that function as delay circuits, so that the first power supply monitoring circuit 112 and the second power supply monitoring are performed by the electrolytic capacitors 87c and 87d. The decrease in the voltage of 5 V input to the circuit 113 or the like is delayed.

The first power supply monitoring circuit 112 and the second power supply monitoring circuit 113 mounted on the main board 11 are configured using, for example, a power failure monitoring IC (also referred to as a power failure monitoring reset module IC), and are used in the pachinko gaming machine 1. It is a circuit that outputs a power-off signal and a reset signal according to a predetermined power supply voltage (voltage of a predetermined power supply circuit).

The first power supply monitoring circuit 112 has a voltage of DC32V as a first power supply voltage supplied to the main board 11 (a voltage of a DC32V power supply line) and a DC5V as a second power supply voltage supplied to the main board 11. The voltage (voltage of DC5V power supply line) is monitored. When the voltage of DC32V exceeds the first threshold value of 21V or the voltage of DC5V exceeds the third threshold value of 4.2V, for example, the first power supply monitoring circuit 112 turns off the power supply in the off state (high level). Output a disconnection signal. On the other hand, when the voltage of DC32V becomes equal to or lower than the first threshold value (21V or less) or the voltage of DC5V becomes equal to or lower than the third threshold value (4.2V or less), an on-state (low level) power-off signal is generated. Output. In addition, when the period of time when the voltage of DC32V is equal to or lower than the first threshold value or the period of time when the voltage of DC5V is equal to or lower than the third threshold value continues for a predetermined time (56 ms as an example) or more, the ON state ( A low level) power-off signal may be output.

The second power supply monitoring circuit 113 has a voltage of DC32V as a first power supply voltage supplied to the main board 11 (a voltage of a DC32V power supply line) and a DC5V as a second power supply voltage supplied to the main board 11. The voltage (voltage of DC5V power supply line) is monitored. The second power supply monitoring circuit 113 resets the off state (high level) when the voltage of DC32V exceeds the second threshold value such as 9V or the voltage of DC5V exceeds the third threshold value such as 4.2V. Output a signal. On the other hand, when the voltage of DC32V becomes equal to or lower than the second threshold value (9V or less) or the voltage of DC5V becomes equal to or lower than the third threshold value (4.2V or less), an on-state (low level) reset signal is output. To do. It should be noted that when the period in which the voltage of DC32V is equal to or lower than the second threshold value or the period in which the voltage of DC5V is equal to or lower than the third threshold value continues for a predetermined time (56 ms as an example) or more, the ON state ( A low-level reset signal may be output. The reset signal output from the second power supply monitoring circuit 113 is input to the CPU 103 included in the game control microcomputer 100. The CPU 103 starts the operation when the reset signal is in the off state, and stops the operation when the reset signal is in the on state. Then, the CPU 103 starts the operation when the reset signal is turned off again. When starting the operation, the CPU 103 executes various kinds of processing such as initialization processing and processing when power is restored.

In this embodiment, as described above, the filter circuit 36 in the DC5V power supply line may include the electrolytic capacitors 87c and 87d that function as delay circuits, so that the DC32V power supply line and the DC5V power supply line are cut off at the same timing. In this case, the voltage of DC32V drops faster than the voltage of DC5V.

The power-off signal or the reset signal may be, for example, a negative logic electric signal that is turned on when it becomes low level and turned off when it becomes high level. The first power supply monitoring circuit 112 and the second power supply monitoring circuit 113 monitor the voltage when the pachinko gaming machine 1 falls, monitor the voltage when the pachinko gaming machine 1 rises when the power is turned on, It is possible to monitor or interrupt the interruption (interruption) of the AC power supply for a predetermined period. That is, the first power supply monitoring circuit 112 and the second power supply monitoring circuit 113 may set the power supply reduction condition to the power reduction condition, and output the power-off signal or the reset signal (on state) when the condition is satisfied. .. The power-off signal and the reset signal output from the first power supply monitoring circuit 112 and the second power supply monitoring circuit 113 are transmitted to the game control microcomputer 100 via a predetermined signal line.

The first power supply monitoring circuit 112 and the second power supply monitoring circuit 113 may be provided on the power supply board 16, the payout control board 17, or the like. In this case, the power-off signal or the reset signal output from the first power supply monitoring circuit 112 or the second power supply monitoring circuit 113 is amplified by the output driver circuit mounted on the power supply board 16, the payout control board 17, or the like, for example. After that, it may be transmitted to the main board 11 via a predetermined connector or signal line.

FIG. 9 is a diagram illustrating an example of the power supply monitoring circuit. The first power supply monitoring circuit 112 is configured using a power supply monitoring IC 90a, resistors 91a and 92a, and capacitors 93a to 96a. The power supply monitoring IC 90a has a VCC terminal, a VSA terminal, a VSB terminal, a GND terminal, and an OUT terminal. Inside the power supply monitoring IC 90a, a voltage detection resistor ra and a resistor rb are provided in series between the VCC terminal and the GND terminal. The connection point between the resistor ra and the resistor rb is connected to the VSA terminal. The VCC terminal is connected to the DC5V power supply line. The GND terminal is grounded (connected to the GND line). A 0.1 μF capacitor 95a is connected to the VCC terminal and the GND terminal. A 0.01 μF capacitor 96a is connected to the VSA terminal and the GND terminal.

A resistor 91a for detecting voltage and a resistor 92a are connected in series between the 32V DC power supply line and the GND line. In this embodiment, as an example, the value of the resistor 91a is 2.4 kΩ and the value of the resistor 92a is 150 Ω. The connection point between the resistors 91a and 92a is connected to the VSB terminal. A 1000 pF capacitor 93a is connected to one end of the resistor 91a (one end on the side of the DC32V power supply line) and the GND terminal. A 1000 pF capacitor 94a is connected to the VSB terminal and the GND terminal. Further, the OUT terminal is connected to the input/output port 105 (I/O 105 in FIG. 2) included in the game control microcomputer 100.

The power supply monitoring IC 90a determines whether the voltage of DC5V or the voltage of DC32V is equal to or less than the third threshold value or the first threshold value based on each voltage applied to the VSA terminal (connection point between the resistance ra and the resistance rb) and the VAB terminal. It is adapted to detect whether or not there is such a signal and output a power-off signal from the OUT terminal.

The second power supply monitoring circuit 113 is configured using a power supply monitoring IC 90b, resistors 91b and 92b, and capacitors 93b to 96b. The second power supply monitoring circuit 113 has the same configuration as that of the first power supply monitoring circuit 112 except that the resistor 92a and the capacitor 96a of the first power supply monitoring circuit 113 are replaced with a 220Ω resistor 92b and a 1 μF capacitor 96b. Have

The power supply monitoring IC 90b determines whether the voltage of DC5V or the voltage of DC32V is equal to or less than the third threshold value or the second threshold value based on each voltage applied to the VSA terminal (connection point between the resistance ra and the resistance rb) and the VAB terminal. It is configured to detect whether or not there is and output a reset signal from the OUT terminal. The reset signal output from the power supply monitoring IC 90b is input to the RESET terminal of the CPU 103.

Here, comparing the first power supply monitoring circuit 112 and the second power supply monitoring circuit 113, the values of the resistors connected to the VSB terminal and the GND terminal are different. Specifically, the value of the resistor 92a in the first power supply monitoring circuit 112 is 150Ω, while the value of the resistor 92b in the second power supply monitoring circuit 113 is 220Ω. As a result, the voltage applied to the 150Ω resistor 92a is smaller than the voltage applied to the 220Ω resistor 92b. Therefore, when the DC32V power supply line is cut off, the first power supply monitoring circuit 112 turns on the power-off signal when the voltage of DC32V becomes equal to or lower than the first threshold value, and the second power supply monitoring circuit 113 causes the DC32V The reset signal is turned on when the voltage of 2 becomes equal to or lower than the second threshold that is lower than the first threshold. Since the first power supply monitoring circuit 112 and the second power supply monitoring circuit 113 have different thresholds in this way, when the DC32V power supply line is cut off, the reset signal is turned on when the power off signal is turned on. Will be later than the timing.

Further, comparing the first power supply monitoring circuit 112 and the second power supply monitoring circuit 113, the capacities of the capacitors connected to the VSA terminal and the GND terminal are different. Specifically, the capacitance of the capacitor 96a in the first power supply monitoring circuit 112 is 0.01 μF, whereas the capacitance of the capacitor 96b in the second power supply monitoring circuit 113 is 1 μF. The larger the capacity of this capacitor, the longer the discharge time when the power supply is cut off. For example, when the DC5V power supply line is cut off, the voltage drop at the VSB terminal of the power supply monitoring IC 90b in the second power supply monitoring circuit 113 is lower than the voltage drop at the VSB terminal of the power supply monitoring IC 90a in the first power supply monitoring circuit 112. Become slow. Therefore, the capacitor 96b in the second power supply monitoring circuit 113 has a function as a delay circuit. When the delay circuit is not incorporated in the second power supply monitoring circuit 113, a 0.01 μF capacitor may be connected instead of the capacitor 96b, that is, the same as the capacitor 96a in the first power supply monitoring circuit 112.

Further, the larger the capacity of the capacitor connected to the VSA terminal and the GND terminal, the longer the charging time at power-on. Therefore, when the power is turned on, the DC5V voltage increase (voltage increase rate) in the second power supply monitoring circuit 113 becomes sufficiently slower than the DC5V voltage increase in the first power supply monitoring circuit 112.

FIG. 10 is a diagram showing the output timing of the signal output by the power supply monitoring circuit. As shown in FIG. 10A, when the DC32V power supply line is cut off at the timing of t0, the voltage of DC32V input to the first power supply monitoring circuit 112 and the second power supply monitoring circuit 113 decreases. Then, at the timing of t1 when the voltage of DC32V drops to the first threshold value, the power-off signal changes from the off state to the on state. When the power-off signal is turned on, in the game control microcomputer 100, power-off processing (processing of step S20 described later) for preventing the player from being disadvantaged is executed for a predetermined period of time t2. It ends at the timing. After that, at the timing of t3 when the voltage of DC32V drops to the second threshold value, the reset signal changes from the off state to the on state, and the operation of the CPU 103 stops. In this way, the power-off process is executed during the period from when the voltage of DC32V drops to the first threshold to when it drops to the second threshold. Therefore, it is possible to prevent the player from suffering a disadvantage.

Further, as shown in FIG. 10B, when the DC5V power supply line is cut off at the timing of t0, the voltage of DC5V input to the first power supply monitoring circuit 112 and the second power supply monitoring circuit 113 decreases. Go Then, at the timing of t4 when the voltage of DC5V has decreased to the third threshold value, the power-off signal changes from the off state to the on state. When the power-off signal is turned on, the power-off process is executed for a predetermined period in the game control microcomputer 100 and ends at the timing of t5. After that, at the timing of t6 which is delayed from the timing of t4, the reset signal changes from the off state to the on state. As described above, the second power supply monitoring circuit 113 has the capacitor 96b that functions as a delay circuit. Therefore, the output of the reset signal is delayed by the capacitor 96b, and the reset signal is turned on after the power-off signal is turned on. The power-off process is executed until the state is reached. Therefore, it is possible to prevent the player from suffering a disadvantage.

As described above, when the power is turned on, the DC 5V voltage increase (voltage increase rate) in the second power supply monitoring circuit 113 becomes sufficiently slower than the DC 5V voltage increase in the first power supply monitoring circuit 112. As a result, the CPU 103 can be reset after the power-off signal is completely turned off.

FIG. 11 is a diagram showing the output timing when the power supply monitoring circuit has no delay circuit (for example, when the capacitance of the capacitor 96b is 0.01 μF). As shown in FIG. 11A, when the DC5V power supply line is cut off at the timing of t0, the voltage of DC5V input to the first power supply monitoring circuit 112 and the second power supply monitoring circuit 113 decreases. Then, at the timing of t4 when the voltage of DC5V has decreased to the third threshold value, the power-off signal changes from the off state to the on state. Further, at the timing of t4, the reset signal changes from the off state to the on state. When the reset signal is turned on, the power-off process is not executed in the game control microcomputer 100 even if the power-off signal is on.

Further, if the timing of turning on the reset signal is later than the timing of turning on the power-off signal as shown in FIG. 11B due to variations in the accuracy of the capacitor, the power is turned off at the timing of t4. When the signal changes from the off state to the on state, the game control microcomputer 100 starts power-off processing. However, the reset signal changes from the off state to the on state at the timing of t7 before the timing of t5 at which the power-off process ends. Therefore, the power-off process is not executed until the end in the game control microcomputer 100. In this way, if the power supply monitoring circuit does not have a delay circuit, the power-off process may not be executed or the power-off process may end midway, which may result in a disadvantage to the player. I can't prevent it.

FIG. 12 is a block diagram showing a configuration example of an input port in the input/output port 105 (I/O 105 in FIG. 2) included in the game control microcomputer 100. As an example, the input/output port 105 includes input ports IP00 to IP02 having bit allocations as shown in FIG. To the input port IP00 shown in FIG. 12A, for example, the magnet sensor signal 1 is input to the 0th bit [bit 0] as one of the detection signals of the error system switch 29, and the 1st bit [bit 1] is input. The magnet sensor signal 2 is input as one of the detection signals of the error system switch 29, the magnet sensor signal 3 is input as one of the detection signals of the error system switch 29 to the second bit [bit 2], and the third bit [bit 2] The radio wave sensor signal is input to the bit 3] as one of the detection signals of the error system switch 29. The fourth bit [bit 4] to the seventh bit [bit 7] are vacant bits and are used for expansion, for example, when a new signal is input. The error system switch 29 includes various switches such as a switch for detecting the magnet sensor signal 1, a switch for detecting the magnet sensor signal 2, a switch for detecting the magnet sensor signal 3, and a switch for detecting the radio wave sensor signal. There is.

In the input port IP01 shown in FIG. 12B, for example, the detection signal of the normal winning opening switch 1 is input to the 0th bit [bit 0], and the detection of the normal winning opening switch 2 is input to the 1st bit [bit 1]. The signal is input, and the detection signal of the count switch 23 is input to the second bit [bit 2]. Although illustration is omitted, the normal winning hole is provided at a predetermined position in the game area, and is a winning hole for paying out a predetermined number of winning balls when a game ball enters. In this embodiment, a normal winning opening 1 and a normal winning opening 2 are provided, and the game ball winning the normal winning opening 1 is detected by the normal winning opening switch 1, and the game ball winning the normal winning opening 2 is detected. Is normally detected by the winning opening switch 2. The third bit [bit 3] to the seventh bit [bit 7] are used for extension. The normal winning opening switch may be a switch common to a plurality of normal winning openings. For example, a plurality of ordinary winning openings are provided at predetermined positions on the game board 2 (for example, right and left sides of the game area), and when any of the ordinary winning openings is won, one ordinary winning opening switch is used to win the prize. You may make it detect.

In the input port IP02 shown in FIG. 12C, for example, the start winning signal SS1 which is the detection signal of the first start opening switch 22A is input to the 0th bit [bit 0], and the 1st bit [bit 1] is input. A start winning signal SS2, which is a detection signal of the second start opening switch 22B, is input, a detection signal of the gate switch 21 is input to the second bit [bit 2], and a power-off signal is input to the third bit [bit 3]. Then, the clear signal is input to the fourth bit [bit 4]. The fifth bit [bit 5] to the seventh bit [bit 7] are used for extension.

As shown in FIG. 12, in this embodiment, the input port IP00 is used for error detection, the input port IP01 is used for payout control, the input port IP02 is used for variable display, and so on, depending on the type of signal. The ports are different. Therefore, the port to be confirmed can be selected according to the type of required information, and the processing load can be reduced. Further, at the input port IP02, the starting winning signal SS1 from the first starting port switch 22A and the starting winning signal SS2 from the second starting port switch 22B are input to separate bits. In this case, the start winning signal SS1 and the starting winning signal SS2 input to the input port IP02 are branched inside the game control microcomputer 100, for example, and are transmitted to the random number circuit 104 and the CPU 103. Good. Alternatively, the start winning signal SS1 and the starting winning signal SS2 input to the input port IP02 can be supplied to both the random number circuit 104 and the CPU 103 by being transmitted on the internal bus common to the random number circuit 104 and the CPU 103. May be. Alternatively, the start winning signal SS1 from the first starting opening switch 22A and the starting winning signal SS2 from the second starting opening switch 22B are branched outside the game controlling microcomputer 100, respectively, and a game controlling microcomputer is provided. It may be transmitted to the random number circuit 104 incorporated in 100 and the CPU 103. In this case, in the input port IP02, the bits to which the starting winning signals SS1 and SS2 transmitted to the random number circuit 104 are input and the bits to which the starting winning signals SS1 and SS2 transmitted to the CPU 103 are input are respectively set. You may make it provide separately.

Next, the progress of the game in the pachinko gaming machine 1 will be schematically described.

In the pachinko gaming machine 1, a predetermined game is played using a game ball as a game medium, and a predetermined game value can be given based on the game result.

As an example of a game using a game ball, a predetermined ball is shot based on the player's predetermined operation (for example, rotation operation) of a ball operation handle installed on the lower right of the front surface of the housing of the pachinko gaming machine 1. A game ball as a game medium is shot toward the game area by a launch motor or the like provided in the device. When the game ball flowing down the game area passes (enters) the first starting winning opening (first starting area) formed in the normal winning ball device 6A, the game ball is detected by the first starting opening switch 22A. Based on this, the starting condition (first starting condition) for executing the variable display of the special symbol (first special symbol) by the first special symbol display device 4A is satisfied. Further, when the game ball passes (enters) the second starting winning opening (second starting area) formed in the normally variable winning ball device 6B, it is based on the fact that the game ball is detected by the second starting opening switch 22B. Then, the starting condition (second starting condition) for executing the variable display of the special symbol (second special symbol) by the second special symbol display device 4B is satisfied.

Although the variable display start condition (first start condition or second start condition) is satisfied, for example, when the variable display based on the previously satisfied start condition is executed, or the game state is controlled to the jackpot game state. When it is not possible to start the variable display, such as when the special display is performed, the variable display is changed until a predetermined upper limit value (for example, “4” corresponding to each of the first special diagram and the second special diagram) is reached. Display execution is suspended.

After the game ball passes (enters) the first start winning opening or the second starting winning opening and the start condition of the variable display is satisfied, the start condition for starting the variable display (the first start condition or the second start condition) ) Is established, whether or not to make the variable display result a "big hit" as a predetermined specific display result is determined before the variable display result is displayed.

Then, the variation pattern is determined at a predetermined rate based on the determination of the variable display result, and the production control command for specifying the variable display result and the variation pattern is specified from the main board 11 to the production control board 12. Is transmitted. The variable display of the special symbol and the decorative symbol is started based on the determination of the variable display result and the variation pattern. After that, for example, when a predetermined variable display time corresponding to the variation pattern elapses, the fixed symbol that is the variable display result is stopped and displayed (derived display).

In the "left", "middle", and "right" decorative symbol display areas 5L, 5C, and 5R provided in the display area of the image display device 5, variable display of decorative symbols corresponding to the special figure game is performed. After the variable display of the decorative design is started, in the period until the variable display is ended by the stop display of the fixed decorative design in the "left", "middle", and "right" decorative design display areas 5L, 5C, 5R, The variable display state of the decorative pattern may become the reach state. Here, the variable display state of the decorative design is a decoration that is not yet stopped and displayed when the decorative design stopped and displayed in any of the decorative design display areas constitutes a part of a predetermined jackpot combination. About the design (also referred to as "reach variation design"), the reach status is changed by continuing the variation, or by varying all or some of the decorative designs in synchronization while forming all or part of the jackpot combination, the reach state. Becomes

Specifically, in part of the "left", "middle", "right" decorative pattern display areas 5L, 5C, 5R (for example, "left" and "right" decorative pattern display areas 5L, 5R, etc.) The remaining decorative pattern display area (for example, "medium" decoration) that is not yet stopped and displayed when the decorative pattern (for example, a decorative pattern showing alphanumeric characters "7") that constitutes the determined jackpot combination is stopped and displayed. In the design display area 5C, etc.), the decoration design is changed, or in all or part of the "left", "middle", and "right" decoration design display areas 5L, 5C, 5R, the decoration design is a big hit combination. The variable display state of the decorative pattern becomes the reach state by fluctuating in synchronization while constituting all or a part.

Further, in response to the variable display state of the decorative pattern being in the reach state, the variation speed of the decorative pattern is reduced, or a character image (a person etc.) different from the decorative pattern is displayed in the display area of the image display device 5. Variable display of the decorative pattern by displaying the effect image), changing the display mode of the background image, reproducing and displaying a moving image different from the decorative pattern, and changing the changing mode of the decorative pattern. A production operation different from that before the state becomes the reach state may be executed. The effect operation such as the display of the character image, the change of the display mode of the background image, the reproduction display of the moving image, and the change of the variation mode of the decorative pattern is referred to as reach effect display (or simply referred to as “reach effect”). In the reach effect, not only the display operation in the image display device 5, but also the sound output operation by the speakers 8L and 8R, the lighting operation (flashing operation) in the game effect lamp 9 and the decorative LED, and the operation of the effect movable member. And the like may be included in an operation mode different from that before the variable display state of the decorative pattern becomes “reach”.

As the effect operation in the reach effect, a plurality of kinds of effect patterns (also referred to as “reach patterns”) having different operation modes (reach modes) may be prepared in advance. And, the possibility of becoming a "big hit" (also called "reliability" or "big hit reliability") is different in each reach mode. That is, it is possible to change the possibility that the variable display result will be a “big hit” depending on which of a plurality of types of reach effects is executed.

As an example, in this embodiment, reach modes such as normal reach and super reach A to super reach D are preset. Then, when the reach mode of super reach such as Super Reach A to Super Reach D appears, the variable display result may be “big hit” as compared with the case where the reach mode of normal reach appears (big hit reliability). Becomes higher. The case where the variable display state of the decorative pattern does not reach the reach state is also called "non-reach", and the variable display result may not be a "big hit" unless it is a special combination such as a predetermined chance eye. ..

During the variable display of the decorative pattern, unlike the reach effect, for example, a predetermined effect image is displayed, image display or voice output as a message, game effect lamp 9 or lighting operation of decorative LED, or for effect Due to a rendering operation that is different from the variable display operation of the decorative pattern, such as a predetermined operation of the model, for example, the variable display state of the decorative pattern may be a reach state, and the variable display result is a "big hit". A notice effect may be executed to notify the player in advance (indication) of the advantage of the game executed in the pachinko game machine 1, such as the possibility that there is a possibility.

The presentation operation that is the notice production is the variable display state of the decorative pattern after the variable display of the decorative pattern is started in all of the "left", "middle", and "right" decorative pattern display areas 5L, 5C, 5R. May be executed (started) before the state becomes the reach state (before the decorative pattern is temporarily stopped and displayed in the "left" and "right" decorative pattern display areas 5L, 5R). Further, the notice effect for notifying that the variable display result may be a “big hit” may include the one that is executed after the variable display state of the decorative pattern becomes the reach state. In this way, the notice effect can be a jackpot gaming state at a predetermined timing from the start of the variable display of the special symbol or the decorative symbol to the derivation of the fixed special symbol or the fixed decorative symbol which is the variable display result. Anything that can announce the sex will do. A plurality of advance notice patterns are prepared in advance corresponding to the contents of the effect operation (effect mode) when executing such advance notice effect. The presentation operation as the announcement production may be one that does not cause a change in the variable display time of the special symbol depending on whether or not it is executed.

When the fixed symbol (fixed special symbol) which is the variable display result of the special symbol in the special symbol game using the first special symbol and the second special symbol is derived and displayed, the variable display result of the decorative symbol is displayed on the image display device 5. The determined design (determined decorative design) will be derived and displayed. In this way, the time when the variable display of the special symbol or the decorative symbol is started and the time when the variable display is ended are almost the same (may be exactly the same), and the period of the variable display is almost the same (may be exactly the same). Is also referred to as "variable display synchronization".

When a predetermined big hit symbol is derived and displayed as a variable display result of the special symbol, the variable display result becomes "big hit" (specific display result), and is controlled to a big hit game state as a specific game state advantageous to the player. It That is, whether or not the jackpot gaming state is controlled corresponds to whether or not the variable display result is "big hit", and is determined (predetermined) before the variable display result is derived and displayed. When the big hit symbol is stopped and displayed on the first special symbol display device 4A, and when the big hit symbol is stopped and displayed on the second special symbol display device 4B, a combination of decorative symbols that reminds the big hit on the image display device 5 (Big hit combination) is stopped and displayed.

In the big hit game state, the solenoid 82 for the big winning opening door is driven, and the big winning opening provided at a predetermined position in the game area is opened (first state). Then, during a predetermined period (for example, 29 seconds) or a period until a predetermined number (for example, 9) of game balls enter the special winning opening and a winning ball is generated, the special winning opening is opened for the player. The round of (first state) is executed. In a period other than the execution period of such a round, the special winning opening is in a closed state (second state) which is disadvantageous to the player.

When a game ball enters the special winning opening, the winning ball is detected by the count switch 23, and a predetermined number (for example, 15) of game balls are paid out as a prize ball at each detection. The round in the jackpot gaming state is repeatedly executed until a predetermined upper limit number (for example, "15") is reached. Therefore, in the big hit game state, the player can very easily obtain a large number of prize balls, which is a game state advantageous for the player. The pachinko gaming machine 1 may be one that directly pays out game balls that are prize balls, or one that gives points corresponding to the number of game balls that become prize balls.

After the jackpot gaming state is over, the probability that the variable display result is "big hit" (big hit probability) may be controlled to be a positive change state that is higher than the normal state. The probability variation state is controlled so as to continue until a predetermined probability variation ending condition is satisfied such that a variable display is executed a predetermined number of times or the next big hit game state is started.

Also, after the jackpot gaming state ends, the average variable display time may be controlled to a time saving state in which it becomes shorter than the normal state. The time saving state is controlled so as to continue until either one of the time saving end conditions is met first, among the fact that the variable display is executed a predetermined number of times and the next big hit game state is started. ..

In the probability changing state and the time saving state, advantageous opening control may be performed in which the game ball easily passes through the starting winning opening than in the normal state. By controlling to such a probability changing state or a time saving state, the time required until the next variable display result becomes a "big hit" is shortened, and a special game state that is more advantageous to the player than the normal state is achieved.

The game ball used as a game medium in the pachinko gaming machine 1 and the record information of the points given corresponding to the number thereof have a valuable value that can be exchanged for a special prize or a general prize according to the number, for example. Anything will do. Alternatively, these game balls and score record information may be those that cannot be exchanged for special prizes or general prizes, but have valuable value that can be used for another game in the pachinko gaming machine 1.

The game value that can be given in the pachinko gaming machine 1 is not limited to payout of game balls that are prize balls and the addition of points, and for example, control to a big hit game state or control to a special game state such as a probability variation state. That is, the maximum number of rounds that can be executed in the jackpot gaming state is the first round number (for example, "15") that is greater than the second round number (for example, "2"), and the variable that can be executed in the time saving state The maximum number of times of display is the first number (for example, "100") that is greater than the second number (for example, "50"), and the jackpot probability in the probability variation state is higher than the second probability (for example, 1/50). Probability (for example, 1/20), the number of consecutive chans, which is the number of times it is repeatedly controlled to the jackpot gaming state without being controlled to the normal state, is larger than the second consecutive chan number (for example, "5"). It may include that a game situation that is more advantageous to the player, such as a part or all of the number of consecutive chan (for example, “10”), is obtained.

Next, the operation (action) of the pachinko gaming machine 1 in the present embodiment will be described.

When the power switch 52 shown in FIG. 5 is turned on (the switch S1 and the switch S2 are turned on) to start supplying power to the pachinko gaming machine 1 (power is turned on), the input terminal 51a, An inrush current flows from the AC power supply 50 connected to 51b into the power supply board 16 and passes through the thermistor 56. When the power is turned on, no current flows in the coil 71L of the relay 71 and the contact portion 71S is in the open state, so the thermistor 56 is effective. Before the power switch 52 is turned on, no current flows in the thermistor 56, so the resistance value of the thermistor 56 is large. Therefore, the rush current flowing into the power supply board 16 is suppressed as compared with the case where the thermistor 56 is not provided. After a certain period of time has passed since the power switch 52 was turned on (after the current started to flow in the thermistor 56), the current flowing in the thermistor 56 causes the thermistor 56 to self-heat and the resistance value of the thermistor 56 decreases, The power consumption of the thermistor 56 is suppressed.

The AC voltage output from the AC power supply 50 is input to the full-wave rectification circuit 61a and the full-wave rectification circuit 61b of the rectification unit 61 via the thermistor 56, the common mode choke coil 57, and the like. The AC voltage input to the full-wave rectifier circuit 61a is rectified and converted into a DC voltage. This DC voltage is generated between the first high voltage node NH1 and the low voltage node NL, and is input to the 32V power supply circuit 62a, the 12V power supply circuit 62b, and the 5V power supply circuit 62c of the DC power supply unit 62. The AC voltage input to the full-wave rectifier circuit 61b is rectified and converted into a DC voltage. This DC voltage is generated between the second high voltage node NH2 and the low voltage node NL, and is input to the 32V power supply circuit 62d, the 12V power supply circuit 62e, and the 5V power supply circuit 62f of the DC power supply unit 62.

The DC voltage input to the power supply circuits 62a to 62f is converted into a predetermined DC voltage (any one of DC32V, DC12V and DC5V) and output to the output terminals 63a to 63f. The output voltage of the power supply circuits 62a to 62f is 0V when the power is turned on or before the power is turned on, and rises from 0V toward a predetermined DC voltage after the power is turned on.

After the power is turned on, when the output voltage of the 12V power supply circuit 62b becomes equal to or higher than a predetermined voltage such as DC 6V, the transistor 73 of the relay drive circuit 72 operates and a current flows through the coil 71L of the relay 71. That is, the relay drive circuit 72 monitors the output voltage of the 12V power supply circuit 62b, and when a voltage equal to or higher than a predetermined voltage such as DC 6V is reached, a current flows through the coil 71L of the relay 71. Specifically, a voltage of DC 6 V or more is applied to the resistors 74 to 76, and a current (base current) flows through the base of the transistor 73 to turn on the transistor 73 (a state in which a current flows between the collector and the emitter of the transistor 73). ). Since the coil 71L is connected to the collector of the transistor 73, the same current as the current flowing through the collector of the transistor 73 (collector current) flows through the coil 71L. The output voltage for operating the transistor 73 of the relay drive circuit 72 is not limited to DC6V, and may be a voltage other than DC6V, such as DC4V, DC8V, or DC10V. In order to set the voltage other than DC6V, the resistance values of the resistors 74 to 76 may be changed appropriately.

When a current flows through the coil 71L, the electromagnetic force of the coil 71L causes the contact portion 71S to switch from the open state to the closed state. As a result, both ends of the thermistor 56 are short-circuited, so that the thermistor 56 becomes invalid. When the relay 71 is driven in this way, the electric path is switched from the electric path passing only the thermistor 56 to the electric path passing through the parallel circuit of the thermistor 56 and the contact portion 71S. In the electric circuit passing through the parallel circuit of the thermistor 56 and the contact portion 71S, most of the current passes through the contact portion 71S, and the current flowing through the thermistor 56 is very small (almost 0). Therefore, by switching the electric path, the thermistor 56 for suppressing the inrush current is invalidated. Further, since the electric current is switched, the current flowing through the thermistor 56 becomes small (almost 0), so that the power consumption by the thermistor 56 is almost eliminated. Therefore, it is possible to give a margin to the power supply to various boards (loads) such as the main board 11 and the effect control board 12. By disabling the thermistor 56, the voltage drop due to the thermistor 56 disappears, the DC voltage input to each of the power supply circuits 62a to 62f becomes higher, and the output voltage of each of the power supply circuits 62a to 62f becomes higher. It can be high.

For example, when a large amount of power is consumed to drive the firing motor provided in the ball striking device in a state where there is not enough power supply to various boards (loads), the power circuit of the power supply circuit may be temporarily changed when the firing motor is driven. Output voltage drops significantly. In this case, even though the power supply from the AC power supply 50 is not interrupted, the power reduction condition is satisfied, and the first power supply monitoring circuit 112 or the second power supply monitoring circuit 113 outputs the power-off signal or the reset signal by mistake. There is a possibility that it will be. However, in this embodiment, as described above, both ends of the thermistor 56 are short-circuited by the relay 71, power consumption by the thermistor 56 is almost eliminated, and a margin can be provided for power supply to various substrates (loads). It is possible to prevent the output voltage of the power supply circuit from remarkably lowering and the first power supply monitoring circuit 112 and the second power supply monitoring circuit 113 from erroneously outputting the power-off signal or the reset signal. Alternatively, since a margin can be provided for the difference between the output voltage of the power supply circuit and the predetermined voltage (threshold value), even if the output voltage of the power supply circuit slightly decreases, the power supply is cut off by the first power supply monitoring circuit 112 or the like. Signals etc. will not be erroneously output.

Even when a large amount of electric power is consumed to drive the firing motor provided in the hitting ball launching device, the output nodes of the power supply circuits 62a to 62f, the output terminals 63a to 63f, and the output nodes of the power supply circuits 62a to 62f are output. A desired voltage can be obtained in the electric paths to the output terminals 63a to 63f and the electric paths after the output terminals 63a to 63f (such as the electric path in the main board 11 and the effect control board 12). For example, even when a large amount of power is consumed, DC32V (or almost 32V) is applied to the DC32V power supply line (the electric path to which the voltage of DC32V is applied), and DC12V (or to the DC12V power supply line (the electric path to which the voltage of DC12V is applied)). It is possible to obtain a voltage of DC 5V (or approximately 5V) in a DC 5V power source line (electrical line to which a voltage of DC 5V is applied) of approximately 12V).

When the supply of electric power to the pachinko gaming machine 1 is stopped (cut off), no current flows in the coil 71L of the relay 71, and the contact portion 71S switches from the closed state to the open state. As a result, the short circuit of the thermistor 56 is released, and the thermistor 56 becomes effective.

After the power is turned on, the output voltages of the 32V power supply circuits 62a to 62f are supplied to the main board 11, the effect control board 12, etc. via the drawer relay board 19. When the output voltage of the 32V power supply circuit 62d exceeds a first threshold value of, for example, 21V, the first power supply monitoring circuit 112 mounted on the main board 11 outputs an off state (high level) power cutoff signal. When the output voltage of the 32V power supply circuit 62d exceeds a second threshold value such as 9V, the second power supply monitoring circuit 113 mounted on the main board 11 outputs a reset signal in an off state (high level). When the output voltage of the 32V power supply circuit 62d is, for example, 21V or less, the first power supply monitoring circuit 112 outputs a power-off signal in the ON state (low level), and when it is 9V or less, the second power supply monitoring circuit 112d. Reference numeral 113 outputs an on-state (low level) reset signal. When the output voltage of the 32V power supply circuit 62d again exceeds the first threshold value and the second threshold value, the first power supply monitoring circuit 112 and the second power supply monitoring circuit 113 output an off-state signal.

During the game, the player may tilt the stick controller 31 to cause an impact or a vibration on the pachinko gaming machine 1, and the impact or the vibration may connect the power supply board 16 and the main board 11. It may become unstable. For example, the connection between the drawer connector 32a and the frame-side connector 33a is partially or wholly released by shock or vibration, so that each voltage and various signals are instantaneously transmitted from the power supply board 16 to the main board 11. It may be cut off (also called a momentary power interruption or a momentary blackout). In such an unstable situation, for example, when the DC32V power line and the DC5V power line are both disconnected (when the transmission of the voltage of DC32V and the voltage of DC5V is instantaneously interrupted), the DC32V power line is connected. If the DC5V power supply line is disconnected (the transmission of the DC32V voltage is not interrupted but the DC5V voltage is interrupted), the DC5V power supply line is connected but the DC32V power supply line is disconnected. There is a case (the transmission of the voltage of DC5V is not instantaneously interrupted, but the transmission of the voltage of DC32V is instantaneously interrupted).

For example, when both the DC32V power supply line and the DC5V power supply line are disconnected, as shown in FIG. 10(A), the power supply disconnection signal is output from the first power supply monitoring circuit 112, and the power is supplied to the game control microcomputer 100. After the disconnection processing is executed, the reset signal is output from the second power supply monitoring circuit 113. In this embodiment, as described above, the filter circuit 36 in the DC5V power supply line includes the electrolytic capacitors 87c and 87d that function as delay circuits, and the voltage of DC32V drops earlier than the voltage of DC5V. Therefore, the power-off signal and the reset signal are output at the timing shown in FIG.

Further, when the DC5V power supply line is disconnected although the DC32V power supply line is connected, as shown in FIG. 10B, the power supply cutoff signal is output from the first power supply monitoring circuit 112, and the game control microcomputer. After the power-off process is executed in 100, the reset signal is output from the second power-supply monitoring circuit 113. As described above, in this embodiment, since the capacitor 96b that functions as a delay circuit is provided, the output of the reset signal is delayed by the capacitor 96b, and the power-off signal is output until the reset signal is output. The power-off process can be reliably executed during the period. As a result, the power-off process will not be executed, or the power-off process will not end midway. Therefore, it is possible to prevent the player from suffering a disadvantage.

When the DC32V power supply line is connected but the DC32V power supply line is disconnected, the power supply is cut off at the timing shown in FIG. 10A, as in the case where both the DC32V power supply line and the DC5V power supply line are disconnected. The signal and the reset signal are output. Thus, even if the connection between the drawer connector 32a and the frame side connector 33a becomes unstable, it is possible to prevent the player from suffering a disadvantage.

Further, for example, when a momentary disconnection occurs in the DC32V power supply line or the DC5V power supply line, and the voltage of DC32V does not fall below the first threshold value or the voltage of DC5V falls below the third threshold value (each power supply line is disconnected However, if the power reduction condition is not satisfied), the power-off signal and the reset signal are not output. In this embodiment, as described above, the filter circuit 36 in the DC5V power supply line includes the electrolytic capacitors 87c and 87d functioning as delay circuits, and therefore, from the disconnection of the DC5V power supply line until the power stop condition is satisfied. The period of is longer than that when the delay circuit is not included. As a result, the voltage drop of DC5V can be reliably delayed more than the voltage drop of DC32V, and the allowable range of the instantaneous interruption in the DC5V power supply line is widened. Therefore, it is possible to prevent the player from suffering a disadvantage.

When the delay circuits such as the electrolytic capacitors 87c and 87d are not included, the allowable range of the instantaneous interruption in the DC5V power supply line is narrow, and when the delay circuit such as the capacitor 96b is not provided, the voltage of DC32V is obtained. When there is no voltage drop and there is a voltage drop of 5 VDC, the power-off process is not executed, or the power-off process ends midway. Therefore, if there is no delay circuit such as the electrolytic capacitors 87c and 87d and the capacitor 96b, it is impossible to prevent the player from being disadvantaged.

In the main board 11, power supply from the power supply board 16 is started, and in response to the reset signal to the game control microcomputer 100 becoming a high level (off state), the CPU 103 determines whether or not the content of the program is valid. After the security check process, which is a process for confirming whether or not it is executed, the game control main process is executed.

FIG. 13 is a flowchart showing an example of the game control main processing. In the game control main processing shown in FIG. 13, the CPU 103 first sets interruption prohibition (step S1). Next, the maskable interrupt mode is set (step S2), and the stack pointer designated address is set in the stack pointer (step S3). Next, the CPU 103 starts outputting a connection signal to the payout control microcomputer mounted on the payout control board 17 (step S4). When the CPU 103 starts outputting the connection signal in step S4, the connection signal is sent to the payout control microcomputer unless the power supply to the gaming machine is stopped or some communication error occurs and the output is disabled. Is continuously output.

Next, the built-in device register is set (initialized) (step S5). By the processing of step S5, the I/O 105, which is a built-in device (built-in peripheral circuit), is set (initialized). Next, the CPU 103 sets the RAM 102 in an accessible state (step S6), and determines whether or not a clear signal in the on state is transmitted from the clear switch, that is, whether or not the clear switch is turned on (step S6). S7). The CPU 103 may confirm the state (on/off) of the clear signal only once via the input port IP02, but may confirm the state of the clear signal a plurality of times. For example, after confirming that the state of the clear signal is the off state, the state of the clear signal is reconfirmed after a delay time of a predetermined time (for example, 0.1 seconds). At that time, if it is confirmed that the clear signal is in the on state, it is determined that the clear signal is in the on state. Further, at this time, if it is confirmed that the state of the clear signal is in the off state, the state of the clear signal may be reconfirmed again after a delay time of a predetermined time. Here, the number of times of reconfirmation is not limited to once or twice, and may be three or more times. Alternatively, the check may be performed twice, and when the check results do not match, the check may be performed again.

When it is determined in step S7 that the clear switch is not turned on (step S7; No), for example, the main backup flag provided in a predetermined area of the RAM 102 (game control flag setting unit or the like) is turned on. It is determined (step S8a). The main backup flag is set by executing a power-off process (step S20) described later when the power supply is stopped. The setting location of the main backup flag is backed up by the backup power supply circuit 114, and the setting of the main backup flag is preserved even when the power supply is stopped. When it is determined in step S8a that the main backup flag is turned on (step S8a; Yes), the main backup flag is cleared and turned off (step S8b).

Next, the CPU 103 checks the data in the RAM 102 and determines whether the check result is normal (step S9a). In the process of step S9a, for example, the checksum is calculated using the storage data in the specific area of the RAM 102, and the calculated checksum is compared with the checksum stored in the main checksum buffer. Here, the main checksum buffer stores the checksum calculated by the same process when the power supply was stopped last time. If the comparison result does not match, it is determined that the check result is not normal because the data in the specific area of the RAM 102 is different from the data when the power supply is stopped.

When it is determined in step S9a that the check result is normal (step S9a; Yes), the CPU 103 disconnects the power in order to return the internal state of the game control microcomputer 100 to the state when the power supply was stopped. Settings for restoration are performed (step S9b). Specifically, the start address of the backup setting table stored in the ROM 101 is set to the pointer, and the contents of the backup setting table are sequentially set to the work area (area in the RAM 102). The work area is backed up by the backup power supply circuit 114. Initialized data is set in the backup setting table for the areas that may be initialized in the work area. As a result, the stored contents of the work area that should not be initialized remain unchanged. The part that should not be initialized is, for example, data indicating the game state before the power supply is stopped (game process flag, etc.), the area where the output state of the output port is saved (output port buffer), the number of unpaid prize balls. Is a part where data indicating is set.

Further, the CPU 103 sets the start address of the backup command transmission table stored in the ROM 101 to the pointer, thereby performing the transmission setting of the command corresponding to the power interruption recovery. After the transmission setting is made, the backup command is transmitted after the serial communication circuit setting process of step S15a described later is performed.

If it is determined in step S7 that the clear switch is on (step S7; Yes), or if it is determined in step S8a that the main backup flag is not on (step S8a; No), step When it is determined in S9a that the check result is not normal (step S9a; Yes), the CPU 103 executes initialization processing (steps S10 to S13 described below).

In the initialization process, the CPU 103 first performs a RAM clear process (step S10). The predetermined data may be left as it is without initializing the entire area of the RAM 102. Then, the work area is initialized (step S11). For example, the CPU 103 sets the pointer to the start address of the initialization setting table stored in the ROM 101, and sequentially sets the contents of the initialization setting table to the work area. By the process of step S11, for example, to perform a process selectively according to the control state such as a normal symbol determination random number counter, a normal symbol determination buffer, a special symbol buffer, a game process flag, a prize ball flag, a ball out flag, etc. The initial value is set to the flag.

Next, the CPU 103 sets the transmission of the initialization command (step S12). For example, the start address of the initialization command transmission table stored in the ROM 101 is set to the pointer, and the process of transmitting the initialization command for initializing the effect control board 12 to the effect control board 12 according to the contents is executed. To do. As the initialization command, a command indicating an initial symbol displayed on the image display device 5, an initialization command for the payout control board 17, or the like can be used. After the setting is made in step S13, the initialization command is transmitted after the serial communication circuit setting process of step S15a described later is performed.

Next, the CPU 103 sets a predetermined security signal output time (for example, 30 seconds) corresponding to the initialization processing (step S13). For example, the timer initial value corresponding to the security signal output time is set in the security signal information timer provided in a predetermined area of the RAM 102. The security signal information timer is a timer for measuring the on-time of the security signal output from the terminal board provided with each terminal for outputting to the outside of the pachinko gaming machine 1. In this embodiment, when the security signal information timer is set to a predetermined time in step S13, information output processing (step S23 in FIG. 14) described later is executed, so that the power of the gaming machine is turned on. When the initialization process is executed, the security signal is externally output for a predetermined time.

After executing the processing of step S13 or the processing of step S9b, the CPU 103 outputs the gaming machine specific information to the outside in response to the start of power supply (power-on) in the pachinko gaming machine 1. Settings are made (step S14). As settings for outputting the gaming machine unique information to the outside, for example, a unique information output request flag requesting external output of the gaming machine unique information is set, and a reading start address of the gaming machine unique information is set to the unique information read pointer. To do. Next, the CPU 103 executes a random number circuit setting process for initializing the random number circuit 104 (step S15). In step S15, the CPU 103 performs processing in accordance with the random number circuit setting program, thereby making settings for causing the random number circuit 104 to update the random number value.

Subsequently, the CPU 103 executes a serial communication circuit setting process for initializing a serial communication circuit (not shown) (step S15a). In step S15a, the CPU 103 sets the data stored in the predetermined area of the ROM 101 in the serial communication circuit according to the serial communication circuit setting program, thereby setting the serial communication circuit to perform serial communication with the payout control microcomputer. To do. Next, the CPU 103 initializes the priority order of the interrupt processing executed in response to the interrupt request of the serial communication circuit (step S15b). In step S15b, the CPU 103 initializes the priority of the interrupt processing by executing the processing according to the interrupt priority setting program. For example, the CPU 103 initializes the priority order of each interrupt process according to a predetermined interrupt process priority table including the default priority order of each interrupt process.

Note that, for example, when a timer interrupt and an interrupt request from the serial communication circuit occur at the same time, the interrupt process by the timer interrupt may be prioritized. Also, the default priority of each interrupt process may be changed by the user. For example, the game control microcomputer 100 stores in advance, in a predetermined storage area of the ROM 101, designation information for designating an interrupt process set by a user (for example, a game machine maker). Then, the CPU 103 may set the priority order of the interrupt processing according to the designation information stored in the predetermined storage area of the ROM 101.

The setting process of the random number circuit 104 and the serial communication circuit may be executed not only in steps S15 to S15b but also in the process of step S5. For example, in step S5, the CPU 103 may execute a process of setting initial values in the baud rate register, communication setting register, interrupt control register, and status register of the serial communication circuit as built-in device registers. Further, the CPU 103 may set the data format of data transmitted and received by the serial communication circuit, and may set whether to permit each interrupt request generated by the serial communication circuit.

Next, the CPU 103 executes a timer interrupt setting process for setting a register of the CTC built in the game control microcomputer 100 so that a timer interrupt is taken at regular intervals (for example, 2 ms) (step). S16). That is, a value corresponding to, for example, 2 ms is set in a predetermined register (time constant register) as an initial value.

When the setting of the timer interrupt is completed in step S16, the CPU 103 first sets the interrupt disabled state (step S17), executes the game random number updating process (step S18), and sets the interrupt enabled state again (step S19). ). That is, the CPU 103 sets the interrupt disabled state when the game random number updating process is executed, and sets the interrupt enabled state when the game random number updating process is completed.

When the game random number update process is executed, the interrupt is disabled. Because the game random number update process is also executed in the game control timer interrupt process described later, the game control timer interrupt process uses the game This is to avoid conflict with the random number update process. That is, if the timer interrupt occurs during the process of step S18 and the count value of the counter for generating the game random number is updated, the continuity of the count value may be impaired. However, such an inconvenience does not occur if the interrupt disabled state is set during the process of step S18.

When the interrupt enable state is set in step S19, the interrupt request such as the timer interrupt is enabled until the process of step S17 is executed and the interrupt is disabled. When a timer interrupt occurs while the interrupt enable state is set, the CPU 103 of the game control microcomputer 100 executes a game timer interrupt process described later.

When the CPU 103 that has executed the game control main process receives the interrupt request signal from the CTC and accepts the interrupt request, it executes the game control timer interrupt process shown in the flowchart of FIG. When the game control timer interrupt processing shown in FIG. 14 is started, the CPU 103 first executes power-off processing (step S20).

FIG. 15 is a flowchart showing an example of the power-off process executed in step S20. In the power-off processing shown in FIG. 15, the CPU 103 first checks the port to which the power-off signal is input, and determines whether the power-off signal is in the on state (step S150). When it is determined in step S150 that the power-off signal is not in the on state (step S150; No), the CPU 103 ends the power-off process. When it is determined in step S150 that the power-off signal is in the on state (step S150; Yes), the CPU 103 sets interruption prohibition (step S151). Subsequently, for example, the CPU 103 sets clear data in a predetermined bit of an output port provided in the game control microcomputer 100, thereby initializing the settings relating to drive control of the solenoids 81 and 82 (step S152). At this time, in addition to the predetermined bit of the output port, clear data may be set in the output port to be cleared. After the process of step S152 is executed, the check data is created, for example, by calculating the check sum using the storage data in the specific area of the RAM 102 (step S153).

As an example, in the process of step S153, the start address of the predetermined area in the RAM 102 is set as the checksum calculation start address, and the checksum calculation frequency is set in correspondence with the last address of the predetermined area. The predetermined area of the RAM 102 specified by the checksum calculation start address and the address used to set the number of checksum calculations may be a predetermined content storage area as a storage area in which the content should be stored even when the power supply is stopped. Good. Then, the storage data in the content storage area is sequentially read and the exclusive OR is calculated. For example, after setting the checksum calculation start address in the pointer, the storage data of the address pointed to by the pointer is read out in the RAM 102, and the exclusive OR with the checksum data whose initial value is “00” is calculated. The calculation result is stored as new checksum data. At this time, 1 is added to the value of the pointer and 1 is subtracted from the checksum calculation count. Next, if the number of checksum calculations is a value other than “0”, the stored data at the address pointed to by the pointer is further read and the exclusive OR with the checksum data is calculated. The process of adding and subtracting 1 from the checksum calculation number may be repeatedly executed until the checksum calculation number becomes “0”. When the number of checksum calculations reaches “0”, each bit value of the checksum data may be inverted, and the obtained value may be stored and stored in the main checksum buffer. The data thus stored in the main checksum buffer is used as parity data to be checked when the power is turned on.

After that, the CPU 103 sets the main backup flag provided in the game control flag setting section to the ON state (step S154), and sets the access prohibition value in a predetermined RAM access register to prohibit the access to the RAM 102. Yes (step S155). After executing the process of step S155, the CPU 103 shifts the control state to the standby state by repeatedly executing the infinite loop process. When the power supply voltage decreases, the memory content of the RAM 102 may be erroneously changed due to a runaway operation of the CPU 103, an unstable signal level (voltage level) in various signal lines, and the like. There is a nature. Therefore, by setting the state in which access to the RAM 102 is prohibited by the process of step S155, it is possible to prevent erroneous change (damage) of the stored contents in the backup storage area or the like provided in the RAM 102.

After executing the processing of step S20 shown in FIG. 14, the CPU 103 is input via the switch circuit 110 from various switches such as the gate switch 21, the first starting port switch 22A, the second starting port switch 22B, and the count switch 23. A switch process for determining the state of the detection signal is executed (step S21). Then, by executing a predetermined main side error processing, an abnormality diagnosis of the pachinko gaming machine 1 is performed, and a warning can be issued if necessary according to the diagnosis result (step S22). After that, by executing a predetermined information output process, data such as jackpot information, starting information, probability variation information, etc., which are supplied to a hall management computer installed outside the pachinko gaming machine 1, are output (steps). S23).

Following the information output process, a game random number updating process for updating at least a part of the game random number used on the main board 11 side by software is executed according to the execution result of the switch process (step S24). After that, the CPU 103 executes game control process processing (step S25). In the game control process process, the value of the game process flag provided in the game control flag setting unit is updated according to the progress of the game in the pachinko gaming machine 1, and the first special symbol display device 4A and the second special symbol display device. Various processes are selected and executed in order to control the display operation in 4B, the opening/closing operation of the special winning opening in the special variable winning ball device 7, and the like in a predetermined procedure.

Following the game control process process, the normal symbol process process is executed according to the execution result of the switch process (step S26). The CPU 103 controls the display operation (for example, turning on and off of the segment LED, etc.) on the ordinary symbol display device 20 by executing the ordinary symbol process processing, and the variable display of the ordinary symbol and the movable variable prize ball device 6B of the ordinary symbol. It enables the setting of tilting motion of winglets.

After executing the normal symbol process process, the CPU 103 executes a command control process to transmit a control command from the main board 11 to a sub-side control board such as the effect control board 12 (step S27). As an example, in the command control processing, included in the I/O 105 corresponding to the setting in the command transmission table designated by the value of the transmission command buffer provided in a predetermined area of the RAM 102 (for example, the game control buffer setting unit). Of the output ports to be produced, after setting the control data to the output port for transmitting the production control command to the production control board 12, set the predetermined control data to the output port of the production control INT signal to produce the production control INT. By turning the signal on for a predetermined time and then off, it is possible to transmit the effect control command based on the setting in the command transmission table. After executing the command control process, after setting the interrupt enable state, the game control timer interrupt process is ended.

FIG. 16 is a flowchart showing an example of the game control process processing executed in step S25 shown in FIG. In the game control process processing shown in FIG. 16, the CPU 103 of the game control microcomputer 100 first determines whether or not a start winning has occurred (step S31). As an example, in step S31, the input state (on/off) of the start winning signal which is the detection signal transmitted from the first start port switch 22A and the second start port switch 22B is checked, and if it is in the on state, it is started. It may be determined that a winning has occurred.

When the start winning is generated in step S31 (step S31; Yes), the winning random number is stored (step S32). As an example, in the processing of step S32, a random number circuit 104 built in (or externally) the game control microcomputer 100, a random counter provided in a predetermined area of the RAM 102 of the game control microcomputer 100, a game control microcomputer. A random number for gaming (random number for variable display result determination, for gaming state determination) updated by at least a part of a random counter configured using an internal register provided separately from the RAM 102 in the computer 100. Part of or all of the numerical data indicating the random number value of (1), the random number value for determining the fluctuation pattern) is extracted. The random number value extracted at this time may be stored, for example, in a holding random number storage unit provided in a predetermined area of the RAM 102 of the game control microcomputer 100 in association with a holding number.

Following the processing of step S32, various control commands corresponding to the start winning a prize are transmitted (step S33). As an example, in the process of step S33, it suffices to make a setting for transmitting to the effect control board 12 a start winning designation command for notifying the occurrence of a start winning. Further, based on the random number value for determining the variable display result and the random number value for determining the variation pattern extracted by the process of step S32, the variation pattern is a specific variation with a specific reach effect such as super reach A to super reach D. You may make it determine whether it is decided by a pattern. In this case, a setting may be made to transmit a winning determination result specification command capable of specifying a determination result as to whether or not a specific variation pattern is determined.

In the process of determining whether or not the variable display result is determined to be a specific variation pattern, first, it is determined whether or not the variable display result is determined to be a “big hit” by using a random value for determining the variable display result. For example, in a predetermined area of the ROM 101 in the game control microcomputer 100, a variable display result determination table in which a determination value is set for the determination result of whether or not to make the variable display result "big hit" is stored in advance. Therefore, it is determined whether or not the variable display result is determined to be a "big hit" by specifying the determination result to which the determination value that matches the random value for determining the variable display result extracted by the process of step S32 is assigned. Can be judged. Then, the variation pattern determination table in which different determination values are set for a plurality of types of variation patterns is selected according to the determination result of whether or not the variable display result is determined to be "big hit". The fluctuation pattern determination table may be stored in advance in a predetermined area of the ROM 101 in the game control microcomputer 100.

By referring to the variation pattern determination table thus selected, the variation pattern to which the determination value that matches the random number value for determining the variation pattern extracted in the process of step S32 is assigned is specified. As a result, it is possible to determine whether or not a specific variation pattern for performing specific reach effects such as super reach A to super reach D is determined. In this way, when the game ball passes through the starting winning opening (the first starting winning opening or the second starting winning opening) and the starting winning occurs, the execution of the variable display game corresponding to the starting winning is started. Before, it is determined whether or not the variation pattern is determined to be a specific variation pattern, and a winning determination result specification command that can specify the determination result is transmitted from the main board 11 to the effect control board 12. Just do it.

When the start winning is not generated in step S31 (step S31; No) or after the process of step S33 is executed, the value of the game process flag is determined (step S41). Then, a process corresponding to the determination value is selected and executed from a plurality of processes described in advance in the computer program for game control.

For example, when the value of the game process flag is "0", it is determined whether variable display of symbols (variable display game) can be started (step S101). As an example, in the process of step S101, it is determined whether or not the number of held variable display games is “0” by checking the stored content of the holding random number storage unit. At this time, if the number of holdings is other than “0”, the variable display is started because the variable display is held after the start condition of the variable display is satisfied and the start condition is not satisfied yet. Determined to be possible. On the other hand, when the number of reservations is “0”, it is determined that variable display cannot be started.

When the variable display cannot be started in step S101 (step S101; No), the game control process processing ends. On the other hand, when the variable display can be started (step S101; Yes), the fixed symbol derived and displayed as the variable display result is determined (step S102). At this time, the game random number stored in the head (storage area with the minimum hold number) in the holding random number storage unit (random value for variable display result determination, random value for gaming state determination, fluctuation pattern determination Random number value) is read. The game random number read from the holding random number storage unit may be temporarily stored in a variable display random number buffer or the like provided in a predetermined area of the RAM 102 of the game control microcomputer 100. Then, using the random number value for determining the variable display result and the variable display result determination table, it is determined at a predetermined ratio whether or not the variable display result is a “big hit”. Here, when the gaming state in the pachinko gaming machine 1 is the probability changing state, the variable display result determination table is determined such that the variable display result is determined to be "big hit" at a higher rate than in the normal state or the time saving state. It is sufficient that the determination value in is set.

When the variable display result is determined to be "big hit" in the process of step S102, the gaming state after the end of the big hit gaming state is changed to a probable state by using a random number value for determining the gaming state and the gaming state determination table. It is determined whether or not to be in the special game state. Corresponding to these determination results, it is sufficient to determine the definite symbol that is derived and displayed as the variable display result.

Following the process of step S102, the internal flag and the like are set (step S103). As an example, in the process of step S103, when the variable display result is determined to be "big hit" in the process of step S102, the big hit flag provided in a predetermined area of the RAM 102 in the game control microcomputer 100 is turned on. set. Further, when it is determined that the gaming state after the jackpot gaming state is changed to the certainty variation state, the certainty variation determination flag provided in a predetermined area of the RAM 102 in the game control microcomputer 100 is set to the on state. Alternatively, it may be stored so that it can be specified that the probability change state will occur. After that, the value of the game process flag is updated to "1" (step S104), and the game control process process is ended.

When the value of the game process flag is "1", a variation pattern or the like is determined (step S111). FIG. 17 shows a setting example of a variation pattern used in the pachinko gaming machine 1. Each fluctuation pattern shows the required time (variable display time) from the start of the variable display to the derivation display of the fixed symbol which is the variable display result and the outline of the effect form. In this embodiment, when the variable display result is “miss”, the variable display mode of the decorative pattern variably displayed on the image display device 5 is “non-reach” and “reach”. A plurality of variation patterns are prepared in advance corresponding to each of them, and when the variable display result is a "big hit". As for the variation pattern, a plurality of patterns are prepared in advance for each variation time (variable display time) in the special figure game and the variable display of the decorative pattern. Therefore, the variable display time of the special symbol or the decorative symbol can be determined by determining the variation pattern.

In the process of step S111, the variation pattern to be used pattern is determined at a predetermined ratio by using the variation pattern determination random value temporarily stored in the variable display random number buffer and the variation pattern determination table. At this time, by varying the determination rate of each variation pattern depending on whether the variable display result is determined to be "big hit", the variable display result may be "big hit" corresponding to each variation pattern. (Big hit reliability) can be different.

Further, in the process of step S111, whether or not the variable display state of the decorative pattern is set to "reach" may be determined by determining the variation pattern when the variable display result is determined to be "miss". . Alternatively, before the variation pattern is determined, it may be determined whether or not the variable display state of the decorative pattern is “reach” by using the reach determination random number value and the reach determination table. That is, in the process of step S111, it suffices that the variation pattern can be determined to be one of a plurality of types based on the variable display result and the reach/non-reach determination result.

Following the processing of step S111, various control commands corresponding to the start of variable display are transmitted (step S112). As an example, in the process of step S112, as a variable display start command for designating the start of variable display, a variable display result notification command for notifying a variable display result, a variable display time of a decorative pattern, and a variable display such as a type of reach effect are displayed. It suffices to make settings for transmitting a fluctuation pattern designation command or the like for notifying a fluctuation pattern indicating a mode. Further, in response to the decrease in the number of holdings due to the start of variable display, a setting may be made to transmit a holding number notification command for notifying the number of holdings after the decrease.

The variable display time is set in response to the change pattern being determined by the process of step S112. Further, the setting for starting the variable display of the special symbol by either the first special symbol display device 4A or the second special symbol display device 4B may be performed. As an example, variable display of symbols may be started by transmitting a predetermined drive signal to either the first special symbol display device 4A or the second special symbol display device 4B. Which special symbol display device uses the special symbol game to execute the special symbol game is a special symbol game based on which one of the first starting winning opening and the second starting winning opening the game ball has passed. It may be set accordingly. More specifically, a special figure game by the first special symbol display device 4A is performed based on the fact that the game ball has passed through the first starting winning opening. On the other hand, a special figure game by the second special symbol display device 4B is performed based on the fact that the game ball has passed through the second starting winning opening. Then, after updating the value of the game process flag to "2" (step S113), the game control process process is ended.

When the value of the game process flag is "2", it is determined whether the variable display time has elapsed (step S121). Then, when the variable display time has not elapsed (step S121; No), after performing variable display control of the special symbol (step S122), the game control process process is ended. On the other hand, when the variable display time has elapsed (step S121; Yes), the variable display of the special symbol is stopped, and control for deriving and displaying the fixed symbol is performed (step S123).

Following the processing of step S123, various control commands corresponding to the end of variable display are transmitted (step S124). As an example, in the process of step S124, a variable display end command for instructing the end (stop) of the variable display, and a big hit start designation command (fanfare command for designating the start of the big hit game state when the variable display result is "big hit") ) Or the like may be set to be transmitted.

After executing the process of step S124, it is determined whether or not the variable display result is "big hit" (step S125). When the variable display result is "big hit" (step S125; Yes), the value of the game process flag is updated to "3" (step S126), and the game control process process is ended. On the other hand, when the variable display result is not "big hit" but "miss" (step S125; No), the game process flag is cleared and its value is initialized to "0" (step S125). (S127), the game control process process ends. When the process of step S127 is executed, it is determined whether or not the probability variation state or the time saving state is to be ended, and when it is determined to be ended based on the establishment of a predetermined condition, these game states are ended. Settings for controlling to the normal state may be made.

When the value of the game process flag is "3", it is determined whether or not to end the big hit game state depending on whether or not a predetermined big hit end condition is satisfied (step S131). The jackpot ending condition may be, for example, that all the rounds executed in the jackpot gaming state have ended. When the big hit game state is not ended (step S131; No), the game operation control at the time of big hit is performed (step 132), and the game control process process is ended. On the other hand, when ending the big hit game state (step S131; Yes), the setting for controlling the game state after the big hit is made (step S133).

As an example, in the process of step S133, it is determined whether or not the probability variation confirmation flag is on, and if it is on, the probability variation flag provided in a predetermined area of the RAM 102 in the game control microcomputer 100 is turned on. Set to. As a result, when it is determined that the variable display result is “big hit”, if it is determined that the gaming state after the end of the big hit gaming state is the probable variation state, the game corresponding to this determination result The state can be controlled to a probable state. Even when controlling to the time saving state, the setting corresponding to this may be made. After that, the game process flag is cleared and its value is initialized to "0" (step S134), and then the game control process process is ended.

Next, the operation of the effect control board 12 will be described.

The effect control board 12 receives power supply voltage from a power supply board or the like. A predetermined effect control main process is executed in the effect control CPU 120 in which the power supply for activation is started. When the effect control main process is started, the effect control CPU 120 first executes a predetermined initialization process to clear the RAM 122 and set various initial values, and also the CTC (counter/timer) mounted on the effect control board 12. Circuit) register setting. Then, it is determined whether the timer interrupt flag is on. The timer interrupt flag is set to the ON state each time a predetermined time (for example, 2 milliseconds) elapses based on the CTC register setting, for example. An interrupt for turning on such a timer interrupt flag is a timer interrupt for effect control. The effect control CPU 120 stands by until a timer interrupt for effect control occurs.

When a timer interrupt for effect control is generated and the timer interrupt flag is turned on, this is cleared to be in an off state, and timer interrupt processing for effect control is executed. The effect control CPU 120 can execute an interrupt process for command reception in addition to the timer interrupt process for effect control, and can receive an effect control command transmitted from the main board 11 via the relay board 15. Good. In the timer interrupt process for effect control, the effect control CPU 120 executes a command analysis process. In the command analysis process, it is determined whether or not the production control command has been received, and if it is received, the setting and control corresponding to the received command are performed. After executing the command analysis process, the effect control process process is executed. In the effect control process processing, for example, an operation of displaying an effect image in the display area of the image display device 5, a sound output operation from the speakers 8L and 8R, a lighting operation of a decorative light-emitting body (light-emitting member) such as the game effect lamp 9 and a decorative LED. Regarding the operation control contents using various effect devices, such as the driving operation of the effect movable member, determination, determination, setting, etc. are performed in accordance with the effect control commands transmitted from the main board 11. Following the effect control process processing, effect random number updating processing is executed, and numerical data indicating effect random numbers that are counted as various random number values used for effect control are updated by software.

Drawing 18 is a flow chart which shows an example of production control process processing. In the effect control process processing shown in FIG. 18, the effect control CPU 120 determines the value of the effect process flag stored in a predetermined area of the RAM 122 or the like, and from a plurality of processes described in advance in the effect control computer program, The process according to the judgment value is selected and executed. The processing executed according to the determination value of the effect process flag includes the processing of steps S170 to S176.

The variable display start waiting process of step S170 is a process executed when the value of the effect process flag is "0". This variable display start waiting process displays a variable display of the decorative pattern on the screen of the image display device 5 based on whether or not the first variation start command or the second variation start command transmitted from the main board 11 is received. It includes processing for determining whether or not to start. The first variation start command is an effect control command for notifying that the special figure game using the first special figure by the first special symbol display device 4A is started. The second variation start command is an effect control command for notifying that the special figure game using the second special figure by the second special symbol display device 4B is started. When either the first fluctuation start command or the second fluctuation start command is received, the value of the effect process flag is updated to "1".

The variable display start setting process in step S171 is a process executed when the value of the effect process flag is "1". This variable display start setting process corresponds to the start of variable display of the special symbol in the special symbol game by the first special symbol display device 4A and the second special symbol display device 4B, on the screen of the image display device 5. In order to perform variable display of decorative designs in and various other production operations, it includes processing for determining fixed decorative designs and various production control patterns according to the variation patterns of special designs and types of display results. .. When the variable display start setting process is executed, the value of the effect process flag is updated to "2".

The variable display effect process in step S172 is a process executed when the value of the effect process flag is "2". In the effect display during variable display, the effect control CPU 120 causes various control data from the effect control pattern to correspond to the timer value in the effect control process timer provided in the predetermined area of the RAM 122 (effect control timer setting unit or the like). Is included and processing for performing various effect controls during variable display of the decorative pattern is included. Further, in the variable display during presentation processing, in response to receiving the symbol fixing command transmitted from the main board 11, etc., the fixed decorative symbol as the final stop symbol which is the variable display result of the decorative symbol is completely stopped and displayed. It includes processing for (deriving and displaying). In addition, in response to the end code being read from the predetermined effect control pattern, the fixed decorative pattern may be completely stopped (displayed). In this case, when the variable display time corresponding to the variation pattern designated by the variation pattern designation command has elapsed, the production control board 12 can autonomously operate even if the production control command from the main board 11 is not used. The variable display result can be confirmed by deriving and displaying the fixed decorative pattern. After performing such effect control, the value of the effect process flag is updated to "3".

The variable display stop process of step S173 is a process executed when the value of the effect process flag is "3". The variable display stop process starts the jackpot gaming state based on the variable display result notified by the variable display result notification command and the determination result of whether or not the jackpot start designation command transmitted from the main board 11 is received. It includes a process of determining whether or not to be performed. And, when the big hit game state is started in response to the variable display result of "big hit", the value of the effect process flag is updated to "4", while the variable display result corresponds to "miss". If the jackpot gaming state is not started, the effect process flag is cleared and its value is initialized to "0".

The big hit display process of step S174 is a process executed when the value of the effect process flag is "4". The big hit display process includes a process for executing a big hit notification effect (fanfare effect) that notifies the start of the big hit game state based on the fact that the big hit start designation command transmitted from the main board 11 is received. There is. Then, when the execution of the big hit notification effect is finished, the value of the effect process flag is updated to "5".

The big hit midtime production process of step S175 is a process executed when the value of the production process flag is "5". In this big hit medium effect processing, the effect control CPU 120 sets, for example, an effect control pattern or the like corresponding to the effect contents in the big hit medium effect executed during the big hit game state, and an effect image based on the set content is imaged. Displaying on the screen of the display device 5, outputting voice or sound effect from the speakers 8L and 8R by outputting a command (sound effect signal) to the sound control board 13, and instructing the lamp control board 14 (illumination signal). ) The game effect lamp 9 and the LED for decoration are turned on/off/blinking by the output of ), and other effect control is executed, so that the big hit mid-size effect corresponding to the big hit game state can be executed. In the big hit midfield effect process, the value of the effect control process flag is updated to "6" in response to, for example, receiving a big hit end designation command transmitted from the main board 11.

The big hit end effect process of step S176 is a process executed when the value of the effect process flag is "6". In this big hit end effect processing, the effect control CPU 120 sets, for example, effect control patterns corresponding to effect contents in the big hit end effect (ending effect) executed when the big hit game state ends. Based effect images are displayed on the screen of the image display device 5, voices and sound effects are output from the speakers 8L and 8R by outputting a command (sound effect signal) to the sound control board 13, and the lamp control board 14 is output. By turning on/off/blinking the game effect lamp 9 and the LED for decoration by the output of the command (electrical decoration signal) and executing other effect control, it is possible to execute the big hit end effect corresponding to the end of the big hit game state. To do. After that, the production process flag is cleared and its value is initialized to "0".

As described above, according to the pachinko gaming machine 1 according to the above-described embodiment, the first power supply monitoring circuit 112 has the voltage of DC32V as the first power supply voltage supplied to the main board 11 (DC32V power supply line Voltage) and the voltage of DC5V (voltage of the DC5V power supply line) as the second power supply voltage supplied to the main board 11 are monitored. The first power supply monitoring circuit 112 turns on (low level) when the voltage of DC32V becomes equal to or lower than the first threshold value such as 21V or the voltage of DC5V becomes equal to or lower than the third threshold value such as 4.2V. Outputs a power-off signal. In addition, the second power supply monitoring circuit 113 outputs the voltage of DC32V as the first power supply voltage supplied to the main board 11 (the voltage of the DC32V power supply line) and the second power supply voltage supplied to the main board 11 as the second power supply voltage. The voltage of DC5V (voltage of DC5V power supply line) is monitored. The second power supply monitoring circuit 113 turns on (low level) when the voltage of DC32V becomes equal to or lower than the second threshold value such as 9V or the voltage of DC5V becomes equal to or lower than the third threshold value such as 4.2V. Output a reset signal. The filter circuit 36 in the DC5V power supply line includes electrolytic capacitors 87c and 87d that function as delay circuits, and the period from the disconnection of the DC5V power supply line until the power stop condition is satisfied includes the delay circuit. It will be longer than without it. As a result, the voltage drop of DC5V can be reliably delayed more than the voltage drop of DC32V, and the allowable range of the instantaneous interruption in the DC5V power supply line is widened. Therefore, it is possible to prevent the player from suffering a disadvantage.

According to the pachinko gaming machine 1 according to the above-mentioned embodiment, the first power supply monitoring circuit 112 has a voltage of DC32V (voltage of DC32V power supply line) as the first power supply voltage supplied to the main board 11, and the main board. The voltage of DC5V (voltage of DC5V power supply line) as the second power supply voltage supplied to 11 is monitored. When the voltage of DC32V exceeds the first threshold value of 21V or the voltage of DC5V exceeds the third threshold value of 4.2V, for example, the first power supply monitoring circuit 112 turns off the power supply in the off state (high level). Output a disconnection signal. In addition, the second power supply monitoring circuit 113 outputs the voltage of DC32V as the first power supply voltage supplied to the main board 11 (the voltage of the DC32V power supply line) and the second power supply voltage supplied to the main board 11 as the second power supply voltage. The voltage of DC5V (voltage of DC5V power supply line) is monitored. The second power supply monitoring circuit 113 resets the off state (high level) when the voltage of DC32V exceeds the second threshold value such as 9V or the voltage of DC5V exceeds the third threshold value such as 4.2V. Output a signal. The second power supply monitoring circuit 113 has a capacitor 96b that functions as a delay circuit. Therefore, the output of the reset signal is delayed by the capacitor 96b, and the power-off process can be reliably executed between the output of the power-off signal and the output of the reset signal. Therefore, it is possible to prevent the player from suffering a disadvantage.

According to the pachinko gaming machine 1 according to the above-described embodiment, for example, as shown in FIG. 3, the drawer connector 32a is provided on the game board 2 via the drawer relay board 19a. The drawer connector 32a is connected to the main board 11 via a predetermined wiring. The frame-side connector 33a is provided on the game frame 161 via the drawer relay board 19b. The frame-side connector 33a is connected to the power supply board 16. When the game board 2 is installed in the game frame 61, the drawer connector 32a is connected to the frame side connector 33a. As a result, various boards on the game board 2 side (main board 11 and the like) and various boards on the game frame 161 side (power board 16 and the like) are connected to the drawer connector 32a, the frame side connector 33a, and the drawer relay boards 19a and 19b ( It is connected via the drawer relay board 19). In this way, the drawer connectors 32a and 32b and the frame side connectors 33a and 33b can facilitate the connection between the power supply board 16 and the main board 11 and the like, and also connect the drawer connector 32a and the frame side connector 33a. Even when the game becomes unstable, it is possible to prevent the player from suffering a disadvantage.

According to the pachinko gaming machine 1 according to the above-described embodiment, when the output voltage of the 12V power supply circuit 62b shown in FIG. 5 becomes equal to or higher than a predetermined voltage such as DC 6V, the transistor 73 of the relay drive circuit 72 operates and the relay A current flows through the coil 71L of 71. When a current flows through the coil 71L, the electromagnetic force of the coil 71L causes the contact portion 71S to switch from the open state to the closed state. As a result, both ends of the thermistor 56 are short-circuited, so that the thermistor 56 becomes invalid. When the relay 71 is driven in this way, the electric path is switched from the electric path passing only the thermistor 56 to the electric path passing through the parallel circuit of the thermistor 56 and the contact portion 71S. In the electric circuit passing through the parallel circuit of the thermistor 56 and the contact portion 71S, most of the current passes through the contact portion 71S, and the current flowing through the thermistor 56 is very small (almost 0). Therefore, the thermistor 56 for suppressing the inrush current is invalidated. Further, since the current flowing through the thermistor 56 is small (almost 0), the thermistor 56 consumes almost no power. Therefore, for example, even when a large amount of power is consumed to drive the firing motor included in the hitting ball launching device, it is possible to allow a sufficient amount of power to be supplied to various substrates (loads), and the power supply circuits 62a to 62f can be provided. In the output node or the output terminals 63a to 63f, the electric path from the output node of the power supply circuits 62a to 62f to the output terminals 63a to 63f, the electric path after the output terminals 63a to 63f (the electric path in the main board 11 and the production control board 12, etc.), A desired voltage can be obtained.

Note that, for example, when the relay 71 is driven to short-circuit the thermistor 56 after a lapse of a predetermined time after the power from the AC power supply 50 is supplied, the thermistor 56 is short-circuited in a transient state in which a current starts to flow depending on the elapsed time. Then, the rush current may not be suppressed. Therefore, in the output nodes of the power supply circuits 62a to 62f and the output terminals 63a to 63f, the electric paths from the output nodes of the power supply circuits 62a to 62f to the output terminals 63a to 63f, the electric paths after the output terminals 63a to 63f, and the like, desired voltages are applied. Can't get On the other hand, according to the pachinko gaming machine 1 according to the above-described embodiment, a specific voltage such as the output voltage of the power supply circuit is monitored, and the voltage is a predetermined voltage (DC6V in the above-described embodiment) indicating that the voltage is in a steady state. ), the relay 71 is driven to short-circuit the thermistor 56, so that the thermistor 56 does not short-circuit in a transient state in which a current starts flowing. Therefore, in the output nodes of the power supply circuits 62a to 62f and the output terminals 63a to 63f, the electric paths from the output nodes of the power supply circuits 62a to 62f to the output terminals 63a to 63f, the electric paths after the output terminals 63a to 63f, and the like, desired voltages are applied. Obtainable.

The present invention is not limited to the above-mentioned embodiment, and various modifications and applications are possible. For example, the pachinko gaming machine 1 does not have to have all the technical features shown in the above-mentioned embodiment, and it is possible to solve at least one problem in the related art, and the part described in the above-mentioned embodiment It may be provided with the structure of.

In the above embodiment, the 32V power supply circuits 62a and 62d have been described as outputting a voltage of 32V. However, a voltage having a width such as 30V to 34V may be output to the DC32V power supply line.

In the above embodiment, the first threshold value is 21V, the second threshold value is 9V, and the third threshold value is 4.2V. However, each threshold value may be changed. The first threshold value and the second threshold value can be changed by adjusting the values of the resistors 91a, 91b, 92a, 92b shown in FIG. Although the second threshold value and the third threshold value have different values (voltages), the second threshold value and the third threshold value may have the same value (voltage). For example, both the second threshold value and the third threshold value may be 4.2V.

In the above-described embodiment, the main backup flag is cleared and turned off in step S8b, but the timing of clearing the main backup flag is not limited to the timing of step S8b. For example, when it is determined in step S150 that the power-off signal is not in the on state (step S150; No), the main backup flag may be cleared to be in the off state, and then the power-off process may be ended. In this case, the process of step S8b may not be performed.

In the above-described embodiment, when the power-off signal is determined to be in the ON state in step S150 (step S150; Yes), the processes of steps S151 to S155 are immediately executed, but the processes of steps S151 to S155 are immediately executed. It doesn't have to be executed. For example, if a power-off confirmation counter (timer) is provided in a predetermined area of the RAM 102 and it is determined in step S150 that the power-off signal is on (step S150; Yes), the value of the power-off confirmation counter is changed. Add one. Then, if the value of the power-off confirmation counter is not "2", the power-off processing is ended, and if the value of the power-off confirmation counter is "2", the processing of steps S151 to S155 may be executed. Good. In this case, the value of the power-off confirmation counter may be cleared when it is determined in step S150 that the power-off signal is not in the on state (step S150; No). When a power-off confirmation counter is provided, the power-off confirmation counter may serve as a main backup flag. For example, when the value of the power-off confirmation counter is “2”, the value of “2” may correspond to the ON state of the main backup flag.

In the above-described embodiment, the relay 71 is configured by, for example, an electromagnetic relay having a coil and a contact portion, but the relay is not limited to a contact relay such as an electromagnetic relay, and for example, a contactless relay configured by using a semiconductor. It may be a relay or the like, or may be a combination of a contact relay and a non-contact relay (hybrid relay).

Further, in the above embodiment, the relay 71 switches the contact part from the open state to the closed state when a current flows through the coil, and switches the contact part from the closed state to the open state when no current flows through the coil. That is, the relay has a normally open contact (also referred to as A contact or make contact). However, the relay is not limited to a relay having a normally open contact, but a relay having a normally closed contact (also called a B contact or a break contact) or a switching contact (C contact, transfer contact, etc.). (Also referred to as a contact point) may be used. Further, the number of relays that switch between the electric path for disabling the thermistor 56 and the electric path for enabling the thermistor 56 is not limited to one, and may be two or more. In this case, a plurality of relays having contact parts of the same type (normally open contact, normally closed contact, switching contact, etc.) may be used, or different types of contact parts may be used in combination.

In the above embodiment, one end of the contact portion 71S of the relay 71 is connected to one end of the thermistor 56, and the other end of the contact portion 71S of the relay 71 is connected to the other end of the thermistor 56. That is, the thermistor 56 and the contact portion 71S are connected in parallel. However, the circuit for disabling the thermistor 56 is not limited to the above. For example, when the relay operates, the electric path passing through the thermistor 56 is cut off (one end side, the other end side of the thermistor 56, or one end side and the other end side are opened) and the thermistor 56 is not passed. An electric path may be formed to the common mode choke coil 57 in the subsequent stage. In this case, for example, the circuit may be configured using a relay having a contact portion of the switching contact. For example, an electric wire is provided side by side with the thermistor 56, and a relay having a contact portion of a switching contact is installed at one end of the electric wire and the thermistor 56. Then, one end of the electric wire and one end of the thermistor 56 are respectively connected to the other end of the switching contact (the terminal on the side having two contacts), and the one end of the contact is connected to the other end of the fuse 53. .. Then, the other end of the electric wire may be connected to the other end of the thermistor 56. A relay having a switching contact point may be installed at the other end of the electric wire and the thermistor 56, and a relay having switching contact points at the one end and the other end of the electric wire and the thermistor 56 may be installed respectively. You may. As described above, the relay may be configured to be switchable between an electric path that passes only the thermistor 56 and an electric path that does not pass the thermistor 56. The electric path for disabling the thermistor 56 includes an electric path passing through the parallel circuit of the thermistor 56 and the contact portion 71S shown in the above-described embodiment, and an electric path not passing through the thermistor 56.

Although one thermistor 56 is installed in the above embodiment, two or more thermistors 56 may be installed. In this case, a plurality of thermistors may be connected in series, in parallel, or in a combination of series and parallel. The relay for disabling the thermistor may be provided for a plurality of thermistors or may be provided for a part of the plurality of thermistors.

In the above embodiment, the relay drive circuit 72 is configured by hardware such as a resistor and a transistor, but the relay drive circuit 72 is not limited to hardware configuration. For example, the relay drive circuit 72 may be configured by software, or may be configured by hardware and software. For example, a CPU or the like may be mounted on the power supply board 16, the output voltage of the 12V power supply circuit and the like may be monitored by this CPU, and the relay may be operated when a predetermined voltage is reached. Further, the relay may be operated by a CPU mounted on another board such as the effect control CPU 120.

Further, the relay drive circuit 72 is composed of a transistor 73, resistors 74 to 76, a diode 77 and an electrolytic capacitor 78 as shown in FIG. In this case, a delay occurs until the transistor 73 is turned on after the output voltage of the 12V power supply circuit becomes DC 6V or higher. However, the relay drive circuit may be configured without using the transistor 73 so that the current flows through the coil 71L of the relay 71 at the timing when the output voltage of the 12V power supply circuit becomes 6VDC or more.

In the above embodiment, in order to notify the effect control CPU 120 of a variation pattern indicating a variable display time such as the variable display time of the decorative pattern and the type of reach effect, one variation pattern is designated when the variable display is started. Although an example of transmitting a command is shown, the variation pattern may be notified to the effect control CPU 120 by two or more commands. Specifically, in the case of notifying with two commands, the game control microcomputer 100 uses the first command as the first command such as the presence/absence of a variable display effect such as “slip” or “pseudo-link” before reaching (reach). If it does not, the command indicating the variable display time and variable display mode (so-called before the second stop) is transmitted, and the second command is the reach, such as the type of reach and the presence/absence of re-lottery effect. A command indicating a variable display time or a variable display mode thereafter (after a so-called second stop when the reach is not reached) may be transmitted. In this case, the effect control CPU 120 may perform the effect control in the variable display based on the variable display time derived from the two commands. It should be noted that the gaming control microcomputer 100 (specifically, the CPU 103) notifies the variable display time by each of two commands, and the specific variable display mode executed at each timing is for effect control. The CPU 120 may make the selection. When sending two commands, the two commands may be sent within the same timer interrupt, or after a predetermined time has elapsed after sending the first command (for example, in the next timer interrupt ) The second command may be transmitted. Further, the variable display mode indicated by each command is not limited to this example, and the transmission order can be changed as appropriate. In this way, by notifying the variation pattern by using two or more commands, it is possible to reduce the amount of data to be stored and prepared in advance as the variation pattern designation command.

The present invention can be applied not only to the pachinko gaming machine 1 but also to a slot machine or the like. The slot machine is, for example, an arbitrary gaming machine that performs a predetermined game such as a variable display of symbols that are a plurality of types of identification information, and can give a predetermined game value based on the game result, and more specifically, A variable display device capable of starting a game by setting a predetermined bet number (the number of medals or the number of credits) for one game and variably displaying a plurality of types of identification information (designs) that can be identified by each. One game ends when the display result of (for example, a plurality of reels) is derived and displayed, and a prize (for example, a cherry prize, a watermelon prize, a bell prize, a replay prize, a BB prize, an RB prize, etc.) is obtained according to the display result. ) Is a game machine that can be generated. In such a slot machine, hardware resources including an image display device of the slot machine and software for performing a predetermined process cooperate with each other, so that the pachinko gaming machine 1 shown in the above-described embodiment or modification example. It suffices if it is configured to include all or a part of the features of.

In addition, various effects including the device configuration and data configuration of the gaming machine, the process shown in the flowchart, the image display operation in the image display device, the voice output operation in the speaker, and the lighting operation in the game effect lamp and the decorative LED. The operation and the like can be arbitrarily changed and modified without departing from the spirit of the present invention. In addition, the gaming machine of the present invention is not limited to a pay-out type gaming machine that pays out a predetermined number of game media as prizes based on the occurrence of a prize, and encloses the game medium to score points based on the occurrence of a prize. It can also be applied to an enclosed game machine that gives a.

That is, based on the fact that the game medium has passed through the starting area provided in the game area, a variable display means is provided for variably displaying a plurality of types of identification information that can be identified, and deriving and displaying the display result. This is a gaming machine that controls to a specific gaming state that is advantageous to the player when a predetermined specific display result is derived and displayed on the display means. However, when the gaming score is not 0, the gaming score is used in the gaming machine. A game is played by hitting the game ball enclosed in the game area, the game score is subtracted according to the hitting of the game ball, and the game score is awarded when the game ball is won in the prize area provided in the game area. The present invention can be applied to a gaming machine that adds. Such a game machine has a game recording medium insertion slot for inserting a game recording medium in which information capable of specifying the magnitude of the game value that can be used for adding game points is recorded, and a game recording medium. It may be provided with a game recording medium processing means for reading the record information recorded in the game recording medium inserted in the medium insertion slot.

The slot machine is not limited to one in which the number of bets is set by using medals and credits as the gaming value, and is only a slot machine in which the number of bets is set by using the gaming balls as the gaming value, or only credits as the gaming value. It may be a fully creditable slot machine in which the bet amount is set using. When using a game ball as a game medium, for example, one medal can be made to correspond to five game balls. For example, when 3 is set as the number of bets, the number of bets using 15 game balls is used. Is equivalent to the one that sets. The pachinko gaming machine 1 and the slot machine are not limited to those that use only one of a plurality of types of gaming values such as medals and gaming balls. For example, a plurality of types such as medals and gaming balls may be used. The game value may be used together. For example, a slot machine can set a bet number and play a game by using any of a plurality of types of gaming values such as medals and game balls, and when a winning occurs, a plurality of medals and game balls etc. can be played. Any type of gaming value may be payable.

In such a slot machine, delay circuits such as the electrolytic capacitors 87c and 87d and the capacitor 96b in the above embodiment, the first power supply monitoring circuit 112, the second power supply monitoring circuit 113, the drawer connector 32a, and the frame side connector 33a are provided. Just do it. Then, the electrolytic capacitors 87c and 87d may delay the decrease of the voltage of 5V input to the first power supply monitoring circuit 112, the second power supply monitoring circuit 113, or the like, and the capacitor 96b may delay the output of the reset signal. .. Even in such a slot machine, it is possible to prevent the player from suffering a disadvantage. Further, such a slot machine may be provided with the thermistor 56, the relay 71, the relay drive circuit 72, etc. in the above-described embodiment. Then, as described in the above embodiment, for example, the relay 72 may be turned on when the output voltage of the 12V power supply circuit 62b reaches a predetermined voltage (DC 6V or higher). Even in such a slot machine, a desired voltage can be obtained.

The program and data for realizing the present invention are limited to a form that is distributed/provided by a removable recording medium to a computer device included in a gaming machine such as a pachinko gaming machine 1 or a slot machine. Instead, it may be distributed by being pre-installed in a storage device included in a computer device in advance. Further, the program and data for implementing the present invention may be distributed by being downloaded from another device on a network connected via a communication line or the like by providing a communication processing unit. It doesn't matter.

The game execution mode is not limited to that executed by mounting a removable recording medium, but can also be executed by temporarily storing the program and data downloaded via a communication line in the internal memory or the like. Alternatively, the hardware resources of other devices may be directly used on the network connected via a communication line. Furthermore, the game may be executed by exchanging data with another computer device or the like via a network.

The specific game state (big hit game state) is displayed after a combination of specific symbols (doublet of the same symbol) is displayed on the variable display device, and after a lapse of a predetermined time (symbol confirmation stop time + big hit start performance time) Although the mouth is opened and the specific game state starts, it is not limited to this, and the variable display device is provided in the game area after a specific symbol combination (the same pattern is doublet) is displayed. The specific game state may be started by passing the ball through a specific area (specific passage gate sensor or winning sensor). As a result, the player can control the timing of the big hit, and even if the balls are exhausted before the big hit starts, the player can have time to lend the balls and replenish the balls.
Further, a plurality of specific areas may be provided, and the number of big hit rounds may be different depending on which specific area is passed. Alternatively, a lottery for the number of big hit rounds may be performed by passing through a specific area. Further, in that case, if there are a plurality of specific areas, the lottery ratio of the number of rounds may be varied depending on which specific area is passed.

1 ... Pachinko game machine 2 ... Game board 3 ... Game machine frame 4A, 4B ... Special symbol display device 5 ... Image display device 5H ... Starting winning memory display area 5I ... Changing special map display area 5L, 5C, 5R ... Decoration Symbol display area 6A... Ordinary winning ball device 6B... Ordinary variable winning ball device 7... Special variable winning ball device 8L, 8R... Speaker 9... Game effect lamp 11... Main board 12... Production control board 13... Voice control board 14... Lamp Control board 15 ... Relay board 16 ... Power supply board 17 ... Discharge control board 18 ... Ball dispensing device 19 (19a, 19b) ... Drawer relay board 20 ... Ordinary pattern display 21 ... Gate switch 22A, 22B ... Start opening switch 23 ... Count Switches 25A, 25B, 25C ... Hold indicator 26 ... Frame relay board 29 ... Error system switch 31A ... Stick controller 31B ... Push buttons 32a, 32b ... Drawer connectors 33a, 33b ... Frame side connector 35A ... Controller sensor unit 35B ... Push sensor 36, 37... Filter circuit 41... Pass gate 50... AC power supply 51a, 51b... Input terminal 52... Power switch 53... Fuse 54... Surge absorber 55, 58... Capacitor 56... Thermistor 57... Common mode choke coil 61... Rectifier 61a , 61b... Full-wave rectification circuit 62... DC power supply units 62a to 62f... Power supply circuits 63a to 63h... Output terminal 71... Relay 72... Relay drive circuit 73... Transistor 74-76... Resistor 77... Diode 78... Electrolytic capacitors 81, 82 ... Solenoids 85a to 85c ... Three-terminal capacitors 86a to 86c ... Bypass capacitors 87a to 87e ... Electrolytic capacitors 90a, 90b ... Power supply monitoring IC
91a, 91b, 92a, 92b... Resistors 93a, 93b to 96a, 96b... Capacitor 100... Game control microcomputers 101, 121... ROM
102, 122... RAM
103... CPU
104, 124... Random number circuits 105, 125... I/O
110 ... switch circuit 111 ... solenoid circuit 112 ... first power supply monitoring circuit 113 ... second power supply monitoring circuit 114 ... backup power supply circuit 120 ... production control CPU
123... Display control part 161... Game frame 162... Front frame 163... Glass Da-Df... Diode

Claims (1)

A gaming machine capable of playing a game,
Power supply means for creating a plurality of power supply voltages,
At least a first power supply voltage of the plurality of power supply voltages and a second power supply voltage lower than the first power supply voltage are supplied, and a control unit that is driven by the second power supply voltage is provided,
The power supply means is
An inrush current suppressing means provided in an electric circuit connected to an external power source,
A first circuit provided with the inrush current suppressing unit and a circuit switching unit capable of switching the circuit from one to the other of the second circuit for disabling the inrush current suppressing unit;
A monitoring means for monitoring the voltage,
The electric circuit switching means switches the electric circuit from the first electric circuit to the second electric circuit and shuts off the first electric circuit when the voltage reaches a predetermined voltage,
The control means is
A first circuit that monitors the first power supply voltage and outputs a power-off signal based on the first power supply voltage dropping to a first threshold value;
A second circuit that monitors the first power supply voltage and outputs a reset signal based on a decrease in the first power supply voltage to a second threshold value lower than the first threshold value;
The first circuit and the second circuit output the power-off signal and the reset signal even when the second power supply voltage drops,
Further comprising delay means for delaying the decrease of the second power supply voltage,
A gaming machine characterized by that.