JP6724503B2 - Display device substrate, manufacturing method thereof, display panel, and display device - Google Patents

Description

The present invention relates to a display device substrate, a method for manufacturing the same, a display device, and a method for manufacturing the same, which can identify a short circuit position between a common electrode and a signal wiring.

In recent years, a liquid crystal display device has been widely used as an example of a display device. In particular, the number of FFS (Fringe Field Switching) type liquid crystal display devices, which have improved viewing angle characteristics and have high-quality display characteristics, has been increasing.

The FFS type liquid crystal display device has a liquid crystal layer sandwiched between a pair of transparent insulating substrates, and a plurality of transparent insulating substrates arranged in a matrix on the liquid crystal layer side of one transparent insulating substrate with an insulating film sandwiched therebetween. A scanning line and a signal line, a thin film transistor (hereinafter referred to as “TFT”) provided at an intersection of the scanning line and the signal line, and a pixel electrode to which a video signal is applied via the signal line and the TFT. A TFT array substrate is provided which has a common electrode facing the pixel electrode with an interlayer insulating film interposed therebetween and generating a fringe electric field between the pixel electrode and the pixel electrode.

In liquid crystal display devices, while miniaturization and higher precision are progressing, demands for reducing the occurrence of defects in the manufacturing process are also increasing. There are various failure factors, and one of them is a source-common short-circuit failure in which a signal wiring is short-circuited with a common electrode due to insulation failure due to foreign matter mixing in the manufacturing process. When a source-common short-circuit defect occurs, the display signal of the source signal wiring at the short-circuited portion is often affected by the common electrode potential, resulting in a line defect display defect on the display screen.

Particularly, in the FFS type TFT array substrate, the common electrode has a structure that covers the entire display area, and therefore, compared with the IPS (In-Plane Switching: registered trademark) type or TN (Twisted Nematic) type TFT array substrate. The area where the common electrode covers the signal wiring is remarkably large, and the probability of a source-common short circuit failure in which the signal wiring short-circuits with the common electrode occurs is very high.

After the completion of the TFT array substrate, an array inspection is performed to detect such defects. For source-common short circuit failure, apply a probe for electrical inspection to each electrode terminal of the signal wiring and scanning wiring, apply a voltage and perform electrical inspection to identify the shorted signal wiring. You can

However, such a short circuit between the signal wiring and the common electrode is, for example, a foreign substance or a pinhole is present in the interlayer insulating film, which causes insulation failure, and the trace of the cause of the failure is often small. Even if the short-circuited signal wiring can be specified, it is difficult to specify where the short-circuited position (pixel address) is on the signal wiring.

On the other hand, for example, in Patent Document 1, for a short circuit defect between a signal wire and a common electrode of a liquid crystal panel, an electrode pad is provided on each common electrode wire, and a switching element for wire connection is provided. A technique is disclosed in which each common electrode wiring is connected to a power supply wiring that supplies a common electrode potential to identify a short-circuit position between the common electrode wiring and the signal wiring.

Japanese Patent Laid-Open No. 11-15020

However, in the display device substrate in which each common electrode wiring is connected to the power supply wiring for supplying the common electrode potential through the wiring connection switching element as described above, a wiring connection switching element is separately provided. Since it is necessary, there is a problem that the structure becomes complicated, design restrictions occur, and productivity decreases.

The present invention has been made to solve the above problems, and is capable of identifying a short circuit position between a common electrode and a signal wiring with a simple structure, a display device substrate, a method for manufacturing the same, and a display panel. Another object is to provide a display device.

A display device substrate, a display panel, and a display device according to the present invention are provided with a plurality of scanning wirings and signal wirings arranged in a matrix on a transparent insulating substrate, and scanning wirings and signal wirings. , A thin film transistor provided at the intersection of, a gate electrode of the thin film transistor connected to the scanning wiring, a source electrode of the thin film transistor connected to the signal wiring, a drain electrode of the thin film transistor, and a pixel electrode connected to the drain electrode And a common electrode facing the pixel electrode with an interlayer insulating film interposed therebetween and generating a fringe electric field between the pixel electrode and the common electrode, and a common electrode connected to the common electrode and supplying a common electrode potential to the common electrode. a display device substrate having a potential supply terminal, and on the outside of both ends of the display area where the length direction of the pixel electrode of the scanning lines are formed, the scan lines for each line, connected to the common electrode It has the inspection terminal which was done.

In addition, the method for manufacturing a display device substrate according to the present invention includes a plurality of scanning wirings and signal wirings arranged in a matrix and formed on a transparent insulating substrate, and the scanning wirings and the signal wirings. A thin film transistor provided at the intersection, a gate electrode of the thin film transistor connected to the scanning wiring, a source electrode of the thin film transistor connected to the signal wiring, a drain electrode of the thin film transistor, and a pixel electrode connected to the drain electrode. , A common electrode facing the pixel electrode with an interlayer insulating film sandwiched therebetween and generating a fringe electric field with the pixel electrode, and a common electrode potential supply terminal connected to the common electrode and supplying a common electrode potential to the common electrode If, having, on the outside of both ends of the display area where the length direction of the pixel electrode of the scanning lines are formed, the scan lines for each line, for a display device having a test terminal which is connected to the common electrode A method of manufacturing a substrate, which is common to signal wiring, from the step of measuring the electric resistance between the signal wiring terminal of the signal wiring and the inspection terminal and the combination of the inspection terminal and the signal wiring terminal with the smallest electric resistance. And a step of specifying the position of the short-circuited portion between the electrode and the electrode.

According to the display device substrate, the display panel, and the display device of the present invention, even if a short circuit occurs between the common electrode and the signal wiring, the short circuit position between the common electrode and the signal wiring can be identified with a simple structure. You can

Further, according to the method for manufacturing a display device substrate according to the present invention, even if a short circuit occurs between the common electrode and the signal wiring, it is possible to identify the short circuit position between the common electrode and the signal wiring with a simple structure. It is possible to provide a display device substrate.

FIG. 3 is a top view showing the TFT array substrate according to the first embodiment of the present invention. FIG. 3 is a top view showing the TFT array substrate according to the first embodiment of the present invention. FIG. 3 is a top view showing the TFT array substrate according to the first embodiment of the present invention. It is sectional drawing of the AA part in FIG. 3 of Embodiment 1 of this invention. FIG. 4 is a cross-sectional view of a BB portion in FIG. 3 of the first embodiment of the present invention. FIG. 3 is a cross-sectional view showing the TFT array substrate according to the first embodiment of the present invention. FIG. 3 is a top view showing the TFT array substrate according to the first embodiment of the present invention. It is a top view which shows the TFT array substrate of Embodiment 2 of this invention. It is a top view which shows the TFT array substrate of Embodiment 2 of this invention. It is a top view which shows the TFT array substrate of Embodiment 2 of this invention. It is a top view which shows the TFT array substrate of Embodiment 2 of this invention. It is a top view which shows the TFT array substrate of Embodiment 3 of this invention. It is a top view which shows the TFT array substrate of Embodiment 3 of this invention.

Embodiment 1.
First, the structure of the TFT array substrate 100, which is the display device substrate according to the first embodiment of the present invention, will be described. 1 and 2 are top views showing a TFT array substrate 100 according to the first embodiment of the present invention. FIG. 1 is a diagram showing an outline of the TFT array substrate 100. FIG. 2 is a diagram showing FIG. 1 in detail.

1 and 2, the TFT array substrate 100 has a plurality of scanning wirings 2b and signal wirings 5b arranged in a matrix. A TFT 13 is provided at the intersection of the scanning wiring 2b and the signal wiring 5b, and the TFT 13 has a gate electrode 2c connected to the scanning wiring 2b, a source electrode 5c connected to the signal wiring 5b, and a drain electrode 6. ing.

Further, the TFT array substrate 100 has a scanning wiring terminal 2a for supplying a scanning signal to the scanning wiring 2b and a signal wiring terminal 5a for supplying a video signal to the signal wiring 5b.

Further, the pixel electrode 7 connected to the drain electrode 6 and the common electrode 9 facing the pixel electrode 7 with the interlayer insulating film 8 interposed therebetween and generating a fringe electric field with the pixel electrode 7, and the common electrode 9 And a common electrode potential supply terminal 10 for supplying a common electrode potential to the common electrode 9.

Further, the inspection terminals 11 connected to the common electrode 9 are provided outside the both ends of the display area in the lengthwise direction of the scanning wiring 2b for each line of the scanning wiring 2b. Further, the common electrode 9 has an inspection terminal 11 connected to the common electrode 9 for each line of the signal wiring 5b outside the end of the display area in the length direction of the signal wiring 5b. In the specification of the present invention, the display area refers to an area where pixels are formed.

As shown in FIGS. 1 and 2, the common electrode 9 covers the entire display area in each pixel except the common electrode slit portion 16.

FIG. 3 is a top view showing the TFT array substrate 100 according to the first embodiment of the present invention. FIG. 3 is an enlarged view of the lower right portion of FIG. Further, FIG. 4 is a cross-sectional view of the portion AA of the pixel in FIG. 3 of Embodiment 1 of the present invention. FIG. 5 is a cross-sectional view of the BB portion of the inspection terminal 11 in FIG. 3 of the first embodiment of the present invention.

In FIG. 4, a gate electrode 2c, a gate insulating film 3, an a-Si(i) layer 4a, an a-Si(n) layer 4b, a signal wiring 5b, and a source electrode 5c are provided on a transparent insulating glass substrate 1. A drain electrode 6, a pixel electrode 7, an interlayer insulating film 8 and a common electrode 9 are formed.

Further, in FIG. 5, an inspection terminal lower layer electrode 11a formed simultaneously with the gate electrode 2c on the glass substrate 1, and an inspection terminal upper layer electrode 11b formed simultaneously with the common electrode 9 through the contact hole 12, Are formed.

Secondly, a configuration in which the TFT array substrate 100 according to the first embodiment of the present invention has the source-common short-circuit portion 15 will be described. FIG. 6 is a sectional view showing the TFT array substrate 101 according to the first embodiment of the present invention. FIG. 6 corresponds to a state in which the TFT array substrate 100 of FIG. 4 has the source-common short-circuit portion 15.

In FIG. 6, the foreign material 14 exists on the signal wiring 5b, and the signal wiring 5b and the common electrode 9 above it are short-circuited by the foreign material 14. The other configurations are the same as the configurations shown in FIG. 4 in the case where the source-common short circuit is not provided, and thus the description thereof is omitted.

Here, an example of a mechanism that causes a short circuit between the source and the common will be described. When the foreign matter 14 is mixed on the surface of the substrate, various defects such as disconnection, short circuit, and poor insulation occur. The array manufacturing process including the photolithography process is manufactured in a so-called "clean room" in which the foreign matter 14 is removed as much as possible.

However, for example, minute foreign matter 14 generated from the manufacturing apparatus may be mixed on the substrate surface or the like. When the foreign matter 14 is mixed on the signal wiring 5b during or after the formation of the signal wiring 5b, the foreign matter 14 often short-circuits the signal wiring 5b and the common electrode 9 above it.

Thirdly, a method of manufacturing the liquid crystal display device substrate according to the first embodiment of the present invention will be described. FIG. 7 is a top view showing the TFT array substrate 101 according to the first embodiment of the present invention. FIG. 7 corresponds to the state where the TFT array substrate 100 of FIG. 1 has the source-common short-circuit portion 15.

First, in the TFT array substrate 101, a step of measuring the electric resistance between the signal wiring terminal 5a of the signal wiring 5b and the inspection terminal 11 is carried out. Specifically, in FIG. 7, an inspection probe is brought into contact with one of the inspection terminals 11, for example, GR1 (11) and each of the signal wiring terminals 5a, and a voltage is sequentially applied to measure the electric resistance. .. As a result, when the source-common short-circuit portion 15 is provided, only the signal wiring terminal STd of the signal wiring Sd having the source-common short-circuit defect has the electrical resistance value of the conduction level.

Further, in FIG. 7, the signal wiring terminal STd of the signal wiring Sd having the source-common short circuit defect and the inspection terminals GR1(11), GR2(11),..., GRm-1(11), GRm(11 ), S1(11),..., Sn(11), GLm(11), GLm-1(11),.., GL2(11), GL1(11) by contacting each with a test probe. Then, the voltage is sequentially applied to measure the electric resistance.

Here, assuming that the electrical resistivity of the conductor is ρ, the length (distance) of the conductor is L, and the cross-sectional area of the conductor is A, the electrical resistance R is represented by R=ρ×L/A. When ρ/A=k, k is considered to be almost constant, so R=kL, and the electric resistance R is proportional to the length (distance) L of the conductor. In order to simplify the description, the contact resistance between the inspection device and each terminal, the resistance of the source-common short-circuit portion 15, the signal wiring resistance and the like are omitted in this description.

The electrical resistance between the signal wiring terminal STd of the signal wiring Sd having the source-common short-circuit defect and each of the inspection terminals 11 measured in this manner is as follows. The value of the electric resistance changes according to the length (distance) of the conductor between them.

Next, the step of specifying the position of the short-circuited portion between the signal wiring 5b and the common electrode 9 is carried out from the combination of the inspection terminal 11 and the signal wiring terminal STd having the smallest electric resistance. Specifically, in the example shown in FIG. 7, the distance between the source-common short-circuit portion 15 and the inspection terminal GR2 (11) is the shortest and the electric resistance is the smallest.

From this, it is specified that the source-common short-circuit portion 15 is present at or near the pixel at the intersection of the inspection terminal GR2 (11) and the signal wiring terminal STd.

After that, repair repair is performed, and the liquid crystal display panel is combined with each member, and further the liquid crystal display device is combined with each member.

In the display device substrate, the display panel, and the display device according to the first embodiment of the present invention, the pixel electrode 7 is formed on the glass substrate 1 so as to face the pixel electrode 7 with the interlayer insulating film 8 interposed therebetween. A substrate for a display device having a common electrode 9 for generating a fringe electric field between the scanning lines 2b, and at least one for each line of the scanning lines 2b outside the both ends of the display region in the length direction of the scanning lines 2b. Since the inspection terminal 11 connected to the common electrode 9 is provided, even if a short circuit occurs between the common electrode 9 and the signal wiring 5b, the short-circuit position between the common electrode 9 and the signal wiring 5b can be specified with a simple structure. it can.

In the display device substrate, the display panel, and the display device according to the first embodiment of the present invention, the common electrode 9 is provided outside the end portion of the display region in the lengthwise direction of the signal wiring 5b and for each line of the signal wiring 5b. Since the inspection terminal 11 connected to at least one common electrode 9 is provided, even if a short circuit occurs between the common electrode 9 and the signal wiring 5b, the short-circuit position between the common electrode 9 and the signal wiring 5b can be achieved with a simple structure. Can be specified.

Further, since each line of the scanning wiring 2b has an inspection terminal 11 connected to the common electrode 9 and each line of the signal wiring 5b has an inspection terminal 11 connected to the common electrode 9, a source-common connection is provided. More information on the electric resistance proportional to the distance between the short-circuit portion 15 and the inspection terminal 11 is obtained, and the short-circuit position between the common electrode 9 and the signal wiring 5b can be specified more accurately.

The method for manufacturing the display device substrate according to the first embodiment of the present invention is configured to face the pixel electrode 7 formed on the glass substrate 1 with the interlayer insulating film 8 interposed therebetween and to be provided between the pixel electrode 7 and the pixel electrode 7. An inspection terminal having a common electrode 9 for generating a fringe electric field and connected to at least one common electrode 9 for each line of the scanning wiring 2b outside the both ends of the display area in the longitudinal direction of the scanning wiring 2b. 1. A method of manufacturing a display device substrate having 11, a step of measuring an electric resistance between a signal wiring terminal 5a of a signal wiring 5b and an inspection terminal 11, and an inspection terminal 11 and a signal wiring having the smallest electric resistance. The step of specifying the position of the short-circuited portion between the signal wiring 5b and the common electrode 9 based on the combination with the terminal 5a is included. Therefore, even if a short circuit occurs between the common electrode 9 and the signal wiring 5b, a simple structure is provided. The position of the short circuit between the common electrode 9 and the signal wiring 5b can be specified by.

In the first embodiment of the present invention, the common electrode 9 is provided for each line of the signal wiring 5b outside the end of the display area in the length direction of the signal wiring 5b opposite to the signal wiring terminal 5a. Although the example in which the inspection terminal 11 connected to the common electrode 9 is provided is shown in FIG. 7, it may be on the same side as the signal wiring terminal 5a, and further outside the both ends of the display area in the length direction of the signal wiring 5b. The inspection terminal 11 may be provided in the above, and the same effect is obtained.

Embodiment 2.
The TFT array substrate 200 according to the second embodiment of the present invention differs from the first embodiment of the present invention in the shape of the common electrode 9 and the arrangement of the inspection terminals 11.

First, the configuration of the TFT array substrate 200 that is the display device substrate according to the second embodiment of the present invention will be described. 8 and 9 are top views showing a TFT array substrate 200 according to the second embodiment of the present invention. FIG. 8 is a diagram showing an outline of the TFT array substrate 200. FIG. 9 is a diagram showing FIG. 8 in detail.

FIG. 8 corresponds to FIG. 1 and FIG. 9 corresponds to FIG. 8 and 9, parts that are the same as or correspond to those in FIGS. 1 and 2 are given the same reference numerals, and descriptions thereof will be omitted.

As shown in FIGS. 8 and 9, the TFT array substrate 200 is connected to the common electrode 9 for each line of the scanning wiring 2b outside the both ends of the display area in the length direction of the scanning wiring 2b. It has a terminal 11.

Further, the common electrode 9 has a pattern in which one end and the other end of the display region in the lengthwise direction of the scanning wiring 2b are alternately folded back for each line of the scanning wiring 2b and have a continuous pattern.

FIG. 10 is a top view showing a TFT array substrate 200 according to the second embodiment of the present invention. FIG. 10 is an enlarged view of the lower right portion of FIG. Further, FIG. 10 is a diagram corresponding to FIG. 3. 10, parts that are the same as or correspond to those in FIG. 3 are given the same reference numerals, and descriptions thereof will be omitted.

Secondly, a method of manufacturing the substrate for liquid crystal display device according to the second embodiment of the present invention will be described. FIG. 11 is a top view showing a TFT array substrate 201 according to the second embodiment of the present invention. FIG. 11 corresponds to the state where the TFT array substrate 200 of FIG. 8 has the source-common short-circuit portion 15.

First, in the TFT array substrate 201, a step of measuring the electrical resistance between the signal wiring terminal 5a of the signal wiring 5b and the inspection terminal 11 is performed. Specifically, in FIG. 11, an inspection probe is brought into contact with one of the inspection terminals 11, for example, C1 (11) and each of the signal wiring terminals 5a, and a voltage is sequentially applied to measure the electric resistance. .. As a result, when the source-common short-circuit portion 15 is provided, only the signal wiring terminal STd of the signal wiring Sd having the source-common short-circuit defect has the electrical resistance value of the conduction level.

Thereafter, in FIG. 11, the signal wiring terminal STd of the signal wiring Sd having the source-common short circuit defect and the inspection terminals C1(11), C2(11), C3(11),..., Cp-1(11 ) And Cp (11) are sequentially brought into contact with an inspection probe to apply a voltage, and the electric resistance is measured. The value of the electric resistance is proportional to the length (distance) of the conductor between the source-common short-circuit portion 15 and each inspection terminal 11.

The value of the electric resistance between the signal wiring terminal STd of the signal wiring Sd having the source-common short-circuit defect and each of the inspection terminals 11 measured in this way is the source-common short-circuit portion 15 and each of the inspection terminals. The value of the electric resistance changes according to the distance between the electric field and the electric field.

Next, the step of specifying the position of the short-circuited portion between the signal wiring 5b and the common electrode 9 is carried out from the combination of the inspection terminal 11 and the signal wiring terminal STd having the smallest electric resistance. Specifically, in the example shown in FIG. 11, the value of the electric resistance shows the smallest value at the inspection terminal C2(11).

From this, the source-common short-circuit portion 15 is present in either of the two pixels near the intersection of the defective signal wiring terminal STd and the inspection terminal C2 (11) having the smallest electric resistance value. And the defective portion is identified.

After that, repair repair is performed, and the liquid crystal display panel is combined with each member, and further the liquid crystal display device is combined with each member.

In the display device substrate, the display panel, and the display device according to the second embodiment of the present invention, the common electrode 9 has the scanning wiring at one end and the other end of the display area in the length direction of the scanning wiring 2b. Since it is a continuous pattern that is alternately folded back for each line 2b, even if a short circuit occurs between the common electrode 9 and the signal wiring 5b, the short-circuit position between the common electrode 9 and the signal wiring 5b can be specified with a simple structure. can do.

In the display device substrate, the display panel, and the display device according to the second embodiment of the present invention, the common electrode 9 has the scanning wiring at one end and the other end of the display area in the length direction of the scanning wiring 2b. Since it is a pattern in which each line of 2b is alternately folded back and is continuous, the distance between the source-common short-circuit portion 15 and each test terminal 11 is the same between adjacent test terminals 11 for each line. Since the length is longer than that in the first embodiment of the invention, the difference in electric resistance value between the inspection terminals 11 becomes large, and the short-circuit position between the common electrode 9 and the signal wiring 5b can be specified more accurately. ..

Embodiment 3.
The TFT array substrate 300 according to the third embodiment of the present invention differs from the first embodiment of the present invention in the shape of the common electrode 9 and the arrangement of the inspection terminals 11.

First, the configuration of the TFT array substrate 300 which is the display device substrate according to the third embodiment of the present invention will be described. FIG. 12 is a top view showing a TFT array substrate 300 according to the third embodiment of the present invention. FIG. 12 is a diagram showing an outline of the TFT array substrate 300.

FIG. 12 is a diagram corresponding to FIG. 1. 12, parts that are the same as or correspond to those in FIG. 1 are given the same reference numerals, and descriptions thereof will be omitted.

As shown in FIG. 12, the TFT array substrate 300 has inspection terminals 11 connected to the common electrode 9 for each line of the scanning wiring 2b outside the both ends of the display area in the length direction of the scanning wiring 2b. Have

Further, the common electrode 9 has an independent pattern for each line of the scanning wiring 2b in the display area. Although not shown in FIG. 12, the common electrode 9 has a common electrode slit portion 16 in the overlapping portion with each pixel electrode 7.

Secondly, a method of manufacturing the liquid crystal display device substrate according to the third embodiment of the present invention will be described. FIG. 13 is a top view showing a TFT array substrate 301 according to the third embodiment of the present invention. FIG. 13 corresponds to the state where the TFT array substrate 300 of FIG. 12 has the source-common short-circuit portion 15.

First, in the TFT array substrate 301, a step of measuring the electric resistance between the signal wiring terminal 5a of the signal wiring 5b and the inspection terminal 11 is performed. Specifically, in FIG. 13, all the inspection terminals G1(11), G2(11),..., Gm-1(11), Gm(11) are brought into contact with the inspection probes at the same time so that all the inspection terminals are inspected. 11 is made conductive. After that, with all the inspection terminals 11 kept in the conductive state, the inspection terminals 11 and the signal wiring terminals 5a are sequentially brought into contact with the inspection probes, and a voltage is applied to the inspection terminals 11 and the signal wiring terminals 5a. Measure the electrical resistance between them. As a result, when the source-common short-circuit portion 15 is provided, only the signal wiring terminal STd of the signal wiring Sd having the source-common short-circuit defect has the electrical resistance value of the conduction level.

Then, in FIG. 13, after the conductive state of the inspection terminal 11 is released, the signal wiring terminal STd of the signal wiring Sd having the source-common short circuit defect and the inspection terminals G1(11), G2(11),. , Gm-1(11), Gm(11) are sequentially brought into contact with each other, and a voltage is applied to measure the electric resistance.

Next, the step of specifying the position of the short-circuited portion between the signal wiring 5b and the common electrode 9 is carried out from the combination of the inspection terminal 11 and the signal wiring terminal STd having the smallest electric resistance. Specifically, in the example shown in FIG. 13, the value of the electric resistance between the signal wiring terminal STd of the signal wiring Sd having the source-common short circuit defect and each inspection terminal 11 is the source-common short circuit. Only the test terminal G3 (11) having the portion 15 shows the resistance value of the conduction level.

From this, it is understood that the pixel at the intersection of the inspection terminal G3 (11) and the signal wiring terminal STd has the source-common short-circuit portion 15, and the defective portion is specified.

After this, repair repair is performed. Further, a step of electrically connecting all the inspection terminals 11 is performed so that the common electrode potential is supplied from the common electrode potential supply terminal 10 to the common electrode 9. After that, the liquid crystal display panel is combined with each member, and the liquid crystal display device is further combined with each member.

In the display device substrate, the display panel, and the display device according to the third embodiment of the present invention, the common electrode 9 is formed independently for each line of the scanning wiring 2b in the display region, so that the common electrode 9 and the signal are Even if a short circuit with the wiring 5b occurs, it is possible to specify the short circuit position between the common electrode 9 and the signal wiring 5b with a simple structure.

In the display device substrate, the display panel, and the display device according to the third embodiment of the present invention, the common electrode 9 is formed independently for each line of the scanning wiring 2b in the display region, so that the common electrode 9 and the signal are Even when a short circuit with the wiring 5b occurs, the common electrode 9 and the signal wiring 5b are different from those of the display device substrate, the display panel, and the display device according to the first and second embodiments of the present invention. The short-circuit position can be specified more accurately.

In the third embodiment of the present invention, the common electrode 9 is formed independently for each line of the scanning wiring 2b in the display area, but is independently formed for each plural lines of the scanning wiring 2b. The position of the short circuit between the common electrode 9 and the signal wiring 5b may be specified for each of a plurality of lines, but the inspection time is shortened. For example, if the common electrode 9 is formed independently for every 2, 4, 6, 8 and 10 lines of the scanning wiring 2b, the inspection time is shortened, which is more preferable.

According to the display device substrate, the display panel, and the display device in the first to third embodiments of the present invention, the signal wiring 5b is short-circuited to the common electrode 9 as compared with the IPS (registered trademark) type or TN type TFT array substrate. In a TFT array substrate of the FFS system, which has a very high probability of occurrence of a source-common short circuit failure, even if a short circuit occurs between the common electrode 9 and the signal wiring 5b, the common electrode 9 and the signal wiring 5b have a simple structure. It is possible to specify the short-circuited position with.

According to the manufacturing method of the display device substrate in the first to third embodiments of the present invention, the signal wiring 5b is short-circuited to the common electrode 9 compared to the IPS (registered trademark) type or TN type TFT array substrate. In a TFT array substrate of the FFS system, which has a very high probability of occurrence of a short circuit between commons, even if a short circuit occurs between the common electrode 9 and the signal wiring 5b, a short circuit will occur between the common electrode 9 and the signal wiring 5b with a simple structure. The position can be specified.

In the description of Embodiments 1 to 3 of the present invention, one or two common electrode potential supply terminals 10 are described, but three or more common electrode potential supply terminals 10 are provided in order to supply a stable common electrode potential to the common electrode 9. May be.

In the description of the first to third embodiments of the present invention, an example is shown in which the electrical resistances of the inspection terminals 11 are measured one by one, but the invention is not limited to this. If you can measure, all the terminals, or contact the inspection probe at the same time for each block to some extent, you can apply a voltage and measure the electrical resistance, you can shorten the inspection time, It is more suitable.

In the description of the first to third embodiments of the present invention, an example in which the electrical resistance of each inspection terminal 11 is measured is shown as an example, but the present invention is not limited to this. For example, first, the intervals between the measurement terminals are thinned out. By measuring, it can be inferred from the measurement results of those electric resistances that the short-circuited position is in the vicinity of the measurement terminal having a small electric resistance. Therefore, the electric resistances of the inspection terminals 11 around the inspection terminal 11 are again measured. The measurement may be repeated and the measurement may be repeated so as to drive the short-circuited position, which is more preferable because the inspection time can be shortened.

In the present invention, the respective embodiments can be freely combined, or the respective embodiments can be appropriately modified or omitted within the scope of the invention.

100, 101, 200, 201, 300, 301 TFT array substrate 1 glass substrate 2a scanning wiring terminal 2b scanning wiring 2c gate electrode 3 gate insulating film 4a a-Si(i) layer 4b a-Si(n) layer 5a signal wiring Terminal 5b signal wiring 5c source electrode 6 drain electrode 7 pixel electrode 8 interlayer insulating film 9 common electrode 10 common electrode potential supply terminal 11 inspection terminal 11a inspection terminal lower layer electrode 11b inspection terminal upper layer electrode 12 contact hole 13 TFT
14 foreign material 15 source-common short-circuited portion 16 common electrode slit portion Sd defective signal wiring STd defective signal wiring signal wiring terminal

Claims (6)

Formed on a transparent insulating substrate,
A plurality of scanning wirings and signal wirings arranged in a matrix,
A thin film transistor provided at the intersection of the scanning wiring and the signal wiring,
A gate electrode of the thin film transistor connected to the scan line,
A source electrode of the thin film transistor connected to the signal line,
A drain electrode of the thin film transistor,
A pixel electrode connected to the drain electrode,
A common electrode facing the pixel electrode with an interlayer insulating film interposed therebetween and generating a fringe electric field between the pixel electrode and the common electrode;
A display device substrate having a common electrode potential supply terminal connected to the common electrode and supplying a common electrode potential to the common electrode,
Outside the both ends of the display area in which the pixel electrodes in the length direction of the scanning wiring are formed ,
A substrate for a display device, characterized in that the scanning lines every line has a test terminal which is connected before Symbol common electrode. Wherein the common electrode is on the outer edge of the display area in the longitudinal direction of the signal lines, which to the signal line for each line, and having a pre-Symbol connected the test terminal to the common electrode Item 2. A display device substrate according to item 1. Formed on a transparent insulating substrate,
A plurality of scanning wirings and signal wirings arranged in a matrix,
A thin film transistor provided at the intersection of the scanning wiring and the signal wiring,
A gate electrode of the thin film transistor connected to the scan line,
A source electrode of the thin film transistor connected to the signal line,
A drain electrode of the thin film transistor,
A pixel electrode connected to the drain electrode,
A common electrode facing the pixel electrode with an interlayer insulating film interposed therebetween and generating a fringe electric field between the pixel electrode and the common electrode;
A display device substrate having a common electrode potential supply terminal connected to the common electrode and supplying a common electrode potential to the common electrode,
Outside the both ends of the display region in which the pixel electrode is formed in the length direction of the scanning wiring, there is an inspection terminal connected to the common electrode,
The common electrode is a pattern in which one end and the other end of the display area in the length direction of the scanning wiring are alternately folded back and continuous for each line of the scanning wiring. Viewing device substrate. A display panel comprising the display device substrate according to any one of claims 1 to 3 . A display device comprising the display panel according to claim 4 . Formed on a transparent insulating substrate,
A plurality of scanning wirings and signal wirings arranged in a matrix,
A thin film transistor provided at the intersection of the scanning wiring and the signal wiring,
A gate electrode of the thin film transistor connected to the scan line,
A source electrode of the thin film transistor connected to the signal line,
A drain electrode of the thin film transistor,
A pixel electrode connected to the drain electrode,
A common electrode facing the pixel electrode with an interlayer insulating film interposed therebetween and generating a fringe electric field between the pixel electrode and the common electrode;
A common electrode potential supply terminal connected to the common electrode and supplying a common electrode potential to the common electrode;
Manufacturing of a substrate for a display device, which has an inspection terminal connected to the common electrode for each line of the scanning wiring outside the both ends of the display area where the pixel electrode is formed in the length direction of the scanning wiring. Method,
Measuring the electrical resistance between the signal wiring terminal of the signal wiring and the inspection terminal,
A step of specifying a position of a short circuit portion between the signal wiring and the common electrode from a combination of the inspection terminal and the signal wiring terminal having the smallest electric resistance. Substrate manufacturing method .

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