JP6832086B2 - Power supply module, semiconductor module, electronic device - Google Patents

Description

The present invention relates to a semiconductor module such as a power supply module.

In recent years, electronic devices such as smartphones, tablet PCs (Personal Computers), and digital cameras are equipped with DC / DC converters that increase or decrease the battery voltage and convert it to an appropriate voltage level in other circuit blocks. The DC / DC converter generates radiation noise and radiation noise according to the switching. These noises are also called EMI (Electro-Magnetic Interference).

If the level of EMI emitted by an electronic device is high, it will adversely affect other electronic devices. Therefore, a regulated value is set for electronic devices, and in principle, shipment of products exceeding the regulated value is not permitted. Therefore, the designer of the electronic device needs to shield or devise a circuit so that the EMI falls below the regulation value. EMI is difficult to predict by simulation or the like, and therefore it is not possible to judge whether or not the regulation is cleared until the value is actually measured at the final development stage of the electronic device. Therefore, after completion, if the EMI is measured and the regulation is not cleared, it is necessary to redesign the electronic device. In this way, enormous costs and labor are spent on EMI countermeasures.

EMI countermeasures are an important technology not only for DC / DC converters but also for ICs (Integrated Circuits) for other purposes.

Japanese Unexamined Patent Publication No. 2010-057005

The present invention has been made in such a situation, and one of the exemplary purposes of the embodiment is to provide a power supply module or a semiconductor module with easy EMI countermeasures.

One aspect of the present invention relates to a power supply module. The power supply module includes a DC / DC converter having an input terminal connected to a first pin, a second pin, a third pin, an output pin, an input terminal connected to the third pin, and an output terminal connected to the output pin, and the first pin and the second pin. It includes a first inductance element provided between them and a second inductance element provided between the second pin and the third pin, and is housed in one package.

According to this aspect, depending on the external circuit components connected to the 1st, 2nd, and 3rd pins, and / or on the printed circuit board on which the power supply module is mounted, the 1st, 2nd, and 2nd pins. The characteristics of the filter formed in the front stage of the DC / DC converter can be changed according to the connection mode of the 3-pin, and appropriate EMI countermeasures can be taken.

At least one of the first inductance element and the second inductance element may be ferrite beads.

The power supply module of some embodiment may further include a capacitor provided between the third pin and the ground line.

Another aspect of the invention relates to electronic devices. The electronic device may include a power supply module. As a result, the cost and labor required for EMI countermeasures for electronic devices can be reduced.

Another aspect of the invention relates to a semiconductor module. The semiconductor module includes a first pin, a second pin, a third pin, an internal circuit in which the output terminal or power supply terminal thereof is connected to the third pin, and a first inductance element provided between the first pin and the second pin. , A second inductance element provided between the second pin and the third pin is provided, and is housed in one package.

It should be noted that any combination of the above components and those in which the components and expressions of the present invention are mutually replaced between methods, devices, systems and the like are also effective as aspects of the present invention.

According to an aspect of the present invention, EMI countermeasures can be facilitated.

It is a circuit diagram of the power supply module which concerns on embodiment. It is a circuit diagram which shows the specific configuration example of a power supply module. 3 (a) to 3 (c) are peripheral circuit diagrams showing variations in usage modes of the power supply module. 4 (a) to 4 (c) are peripheral circuit diagrams showing further variations in the usage mode of the power supply module. It is a perspective view of the electronic device which comprises the power supply module which concerns on embodiment. 6 (a) and 6 (b) are circuit diagrams of a semiconductor module according to a modified example.

Hereinafter, the present invention will be described with reference to the drawings based on preferred embodiments. The same or equivalent components, members, and processes shown in the drawings shall be designated by the same reference numerals, and redundant description will be omitted as appropriate. Further, the embodiment is not limited to the invention but is an example, and all the features and combinations thereof described in the embodiment are not necessarily essential to the invention.

In the present specification, the "state in which the member A is connected to the member B" means that the member A and the member B are physically directly connected, and that the member A and the member B are electrically connected to each other. It also includes the case of being indirectly connected via other members, which does not substantially affect the connection state, or does not impair the functions and effects performed by the combination thereof.
Similarly, "a state in which the member C is provided between the member A and the member B" means that the member A and the member C, or the member B and the member C are directly connected, and their electricity. It also includes the case of being indirectly connected via other members, which does not substantially affect the connection state, or does not impair the functions and effects performed by the combination thereof.

FIG. 1 is a circuit diagram of the power supply module 1 according to the embodiment. The power supply module 1 receives a DC voltage, steps down or boosts it, and generates an _{output voltage V OUT stabilized at a predetermined voltage level.} The power supply module 1 has a first pin (VIN), a second pin (EMI), a third pin (VCC), an output pin (VOUT), a ground pin (GND), and a sense pin (VSENSE) in one package. Is housed in. Containing in a package means being considered as one part from the outside, and may include being molded with resin and housed in a metal or resin case. The mode of the package is not particularly limited.

The power supply module 1 includes a first inductance element L1, a second inductance element L2, a capacitor Ci, and a DC / DC converter 10. The DC / DC converter 10 steps down or boosts the voltage of the _{input terminal P IN} , and generates an _{output voltage V OUT} stabilized at a predetermined voltage level at the output terminal P _OUT. The input terminal of the DC / DC converter 10 is connected to the VCS pin, and the output terminal thereof is connected to the VOUT pin. A detection voltage V _{FB indicating a power supply voltage V OUT} supplied to a load (not shown) is fed back to the VSENSE pin. The DC / DC converter 10 adjusts the switching duty ratio or switching frequency so that the _{detected voltage V FB} matches the reference voltage V _REF.

The first inductance element L1 is provided between the VIN pin and the EMI pin. The second inductance element L2 is provided between the EMI pin and the VCS pin. The capacitor Ci is provided between the VCS pin and the ground line. At least one of the first inductance element L1 and the second inductance element L2 is preferably ferrite beads. Both the first inductance element L1 and the second inductance element L2 may be ferrite beads, one may be a choke coil, or both may be choke coils. The same components may be used for the inductance elements L1 and L2, or components having different circuit constants may be used.

FIG. 2 is a circuit diagram showing a specific configuration example of the power supply module 1. The DC / DC converter 10 includes a control IC (Integrated Circuit) 20 and some chip components constituting peripheral circuits. The DC / DC converter 10 in FIG. 2 is a step-down converter (Back converter).

In addition to the control IC 20, the DC / DC converter 10 includes resistors R11, R12, R13, input capacitors Ci1, Ci2, output capacitors Co1, Co2, inductance elements L1, L2, inductor L3, and bootstrap capacitor C3. For example, the inductances of the inductance elements L1 and L2 may be equal. The resistors R11 to R13 are connected in series between the output line 12 of the DC / DC converter 10 and the ground line 14. Further, the connection nodes N1 and N2 of the resistors R11, R12 and R13 are connected to the VSENSE pin and the FB pin. The input capacitors Ci1 and Ci2 are connected in parallel between the input line 16 and the ground line 14. The output capacitors Co1 and Co2 are connected in parallel between the output line 12 and the ground line 14. The capacitance value of the output capacitors Co1 and Co2 is preferably larger than the capacitance value of the input capacitors Ci1 and Ci2. One end of the inductor L3 is connected to the output line 12, and the other end is connected to the switching node LX of the control IC 20. An external bootstrap capacitor can be connected to the SW terminal.

The control IC 20 includes a high-side transistor (switching transistor) M1, a low-side transistor (synchronous rectifier transistor) M2, an error amplifier 22, a soft start circuit 24, a pulse modulator 26, a driver 28, a reference voltage source 30, a protection circuit 32, and an OR gate. 34, and a capacitor C21 and a resistor R21 for phase compensation are included.

The high-side transistor M1 and the low-side transistor M2 are provided in series between the input line 16 and the ground line 14. In the present embodiment, both the high-side transistor M1 and the low-side transistor M2 are N-channel MOSFETs. A bootstrap capacitor C3 is provided to generate a gate signal capable of turning on the high-side transistor M1. Further, one end of the capacitor C3 is connected to the BOOT pin. A diode and a voltage source for charging the capacitor C3 are externally attached to the BOOT pin.

An inductor L3 is connected to the connection node LX of the high-side transistor M1 and the low-side transistor M2. The inverting input terminal of the error amplifier 22 is connected to the FB pin. Reference voltage V _REF to one non-inverting input terminal of the error amplifier 22, the soft-start voltage V _SS to the soft start circuit 24 and the other one non-inverting input terminal is generated is input. The soft start circuit 24 gradually increases the _{soft start voltage VSS} with time when the DC / DC converter 10 is started. The error amplifier 22 amplifies the error _{between the lower one of the reference voltage V REF} and the soft start voltage V _SS and the feedback voltage V _FB . For example, the error amplifier 22 is a transconductance amplifier. The capacitor C21 and the resistor R21 are provided in series between the output of the error amplifier 22 and the ground. Further, the output of the error amplifier 22 is connected to the COMP pin, and the connection node of the capacitor C21 and the resistor R21 is connected to the RCOMP pin. Circuit elements for phase compensation are externally attached to the COMP pin and the RCOMP pin, if necessary.

_{The pulse modulator 26 has an error voltage VERR} generated at the output of the error amplifier 22.
A pulse signal Sp having a duty ratio (or frequency) corresponding to the above is generated. The pulse modulator 26 may be a voltage mode modulator or a peak current mode or average current mode modulator. The driver 28 drives the high-side transistor M1 and the low-side transistor M2 based on the pulse signal Sp. The control IC 20 may include a hysteresis control (Bang-Bang control) pulse modulator instead of the error amplifier 22 and the pulse modulator 26.

The reference voltage source 30 receives the voltage of the input line 16 and generates a _{reference voltage V REF.} For example, the reference voltage source 30 is a bandgap reference circuit. When the control IC 20 and the DC / DC converter 10 are normal, the protection circuit 32 asserts (for example, high level) the protection signal PROTECT which is the output thereof, and negates (low level) when an abnormality is detected. The protection circuit 32 may include a TSD (Thermal Shutdown) circuit, a UVLO (Under Voltage Lockout) circuit, an OCP (Over Current Protection) circuit, an RCP (Reverse Current Protection) circuit, a SCP (Short Circuit Protection) circuit, and the like.

An enable signal is input to the EN pin from the outside. The OR gate 34 ORs the enable signal and the protection signal to generate a shutdown signal SHTDN. The operation of the driver 28 is stopped based on the enable signal EN and the shutdown signal SHTDN.

The above is the configuration of the power supply module 1. Next, the advantages will be described.
3 (a) to 3 (c) are peripheral circuit diagrams showing variations in the usage mode of the power supply module 1. In the usage mode of FIG. 3A, the first capacitor Ce1 is externally attached between the VIN pin and the ground of the power supply module 1, and the second capacitor Ce2 is externally attached between the EMI pin and the ground. _{The DC voltage VDC} from the external power supply PS such as a battery is supplied to the VIN pin. In this usage mode, a two-stage π-type filter 40 is formed in front of the power supply module 1.

In the usage mode shown in FIG. 3B, the first capacitor Ce1 is provided between the VIN pin of the power supply module 1 and the ground. _{Further, the DC voltage VDC} from the external power supply PS is supplied to the VIN pin and the EMI pin. The VIN pin and the EMI pin are short-circuited by the wiring W1, and therefore the inductance element L1 incorporated in the power supply module 1 is bypassed. In this usage mode, a one-stage π-type filter 42 composed of Ce1, L2, and Ci is formed in the front stage of the power supply module 1.

In the usage mode shown in FIG. 3C, the first capacitor Ce1 is provided between the VIN pin of the power supply module 1 and the ground. _{Further, the DC voltage VDC} from the external power supply PS is supplied to the VIN pin. The EMI pin and the VCS pin are short-circuited by the wiring W2, and therefore the inductance element L2 incorporated in the power supply module 1 is bypassed. In this usage mode, a one-stage π-type filter 44 composed of Ce, L1 and C2 is formed in the front stage of the power supply module 1.

4 (a) to 4 (c) are peripheral circuit diagrams showing further variations of the usage mode of the power supply module 1. In the usage mode shown in FIG. 4A, the first capacitor Ce1 is provided between the VIN pin of the power supply module 1 and the ground. _{Further, the DC voltage VDC} from the external power supply PS is supplied to the VIN pin. In this usage mode, a one-stage π-type filter 46 composed of Ce1, L1, L2, and Ci is formed in the front stage of the power supply module 1.

In the usage mode shown in FIG. 4B, the first capacitor Ce1 is provided between the VIN pin of the power supply module 1 and the ground. _{Further, the DC voltage VDC} from the external power supply PS is supplied to the VIN pin, the EMI pin, and the VCS pin. The VIN pin and the EMI pin are short-circuited by the wiring W1, and the EMI pin and the VCS pin are short-circuited by the wiring W2. Therefore, the inductance elements L1 and L2 incorporated in the power supply module 1 are bypassed. In this usage mode, the front stage of the power supply module 1 has a filterless configuration.

In the usage mode of FIG. 4C, the DC voltage _VDC from the external power supply PS is supplied to the VCS pin. In this usage mode, the front stage of the power supply module 1 has a filterless configuration. The input smoothing capacitor of the DC / DC converter 10 is only the capacitor Ci. Alternatively, a first input capacitor Ce1 may be added to stabilize the DC voltage _VDC.

As another usage pattern, the one in which the VIN pin is opened in FIG. 4B is also effective.

According to the power supply module 1, as shown in FIGS. 3 (a) to 3 (c) or FIGS. 4 (a) to 4 (c), the DC / DC converter 10 is set in front of the DC / DC converter 10 for each platform in which the power supply module 1 is used. The circuit type can be changed.

FIG. 5 is a perspective view of an electronic device 100 including the power supply module 1 according to the embodiment. Examples of the electronic device 100 include a smart phone, a tablet PC, a laptop computer, a digital camera, a digital video camera, a mobile phone terminal, and a portable audio player. The electronic device 100 includes a battery 102 and a functional IC 104 in addition to the power supply module 1. The battery 102 is a lithium ion battery or the like, and generates a _{DC battery voltage V BAT.} The battery voltage V _BAT is supplied to the VIN pin, EMI pin, and VCS pin of the power supply module 1. External chip parts (Ce1, Ce2) for EMI countermeasures shown in FIGS. 3 (a) to 3 (c) or 4 (a) to 4 (c) are mounted around the power supply module 1 as needed. Will be done. _{The output voltage V OUT} of the power supply module 1 is supplied to the function IC 104. The function of the function IC 104 is not particularly limited. For example, the function IC 104 may be a CPU, GPU, memory, audio IC, or the like. When the electronic device 100 is a smart phone or a mobile phone terminal, the functional IC 104 may be a baseband IC or an application processor.

The present invention has been described above based on the embodiments. This embodiment is an example, and it will be understood by those skilled in the art that various modifications are possible for each of these components and combinations of each processing process, and that such modifications are also within the scope of the present invention. is there. Hereinafter, such a modification will be described.

(First modification)
In the embodiment, suppression of EMI caused by the input current (power supply current) of the power supply module 1 has been described, but the present invention is applicable not only to the power supply module 1 but also to a semiconductor module having other functions. is there. 6 (a) and 6 (b) are circuit diagrams of a semiconductor module according to a modified example. The semiconductor module 2 of FIG. 6A includes a first pin P1, a second pin P2, a third pin P3, an internal capacitor Ci, and an internal circuit 4. The first inductance element L1 is connected between the first pin P1 and the second pin P2, and the second inductance element L2 is connected between the second pin P2 and the third pin P3. The power supply terminal VDD of the internal circuit 4 is connected to the internal capacitor Ci and the third pin P3. The first pin P1 to the third pin P3 correspond to the above-mentioned VIN pin, EMI pin, and VCS pin. Examples of such a semiconductor module 2 include a switching regulator, a motor driver, an audio amplifier, and the like.

In the semiconductor module 3 of FIG. 6B, the output terminal OUT of the internal circuit 4 is connected to the internal capacitor Ci and the third pin P3. The first inductance element L1 is connected between the first pin P1 and the second pin P2, and the second inductance element L2 is connected between the second pin P2 and the third pin P3. The internal circuit 4 outputs a voltage that can be a factor of EMI from the output terminal OUT, or outputs (sources or sinks) _{such a current I OUT via the output terminal OUT.} Noise can be removed from the _{voltage and current I OUT} that can cause EMI by combining the first pin P1 to the third pin P3, the inductance elements L1 and L2, and the external components connected to them. Examples of such a semiconductor module 3 include a current source and a voltage source.

According to the modified examples of FIGS. 6A and 6B, appropriate measures can be taken against the EMI caused by the _{power supply current I DD} and the current I _OUT.

(Second modification)
In the embodiment, the configuration including the internal capacitor Ci has been described, but the capacitor Ci is not indispensable, and it may be assumed that the capacitor Ci is externally attached to the VCS terminal.

Although the present invention has been described using specific terms based on the embodiments, the embodiments merely indicate the principles and applications of the present invention, and the embodiments are defined in the claims. Many modifications and arrangement changes are permitted without departing from the ideas of the present invention.

1 ... Power supply module, 2, 3 ... Semiconductor module, 4 ... Internal circuit, 10 ... DC / DC converter, 12 ... Output line, 14 ... Ground line, 16 ... Input line, L1 ... First inductance element, L2 ... Second Inverter element, Ci ... Input capacitor, M1 ... High side transistor, M2 ... Low side transistor, 20 ... Control IC, 22 ... Error amplifier, 24 ... Soft start circuit, 26 ... Pulse modulator, 28 ... Driver, 30 ... Reference voltage source , 32 ... protection circuit, 34 ... OR gate, 100 ... electronic device.

Claims (5)

1st pin and
2nd pin and
3rd pin and
Output pin and
A DC / DC converter having an input terminal connected to the third pin and an output terminal connected to the output pin,
A first inductance element provided between the first pin and the second pin,
A second inductance element provided between the second pin and the third pin,
A power supply module that is characterized by being housed in one package. The power supply module according to claim 1, wherein at least one of the first inductance element and the second inductance element is a ferrite bead. The power supply module according to claim 1 or 2, further comprising a capacitor provided between the third pin and the ground line. An electronic device comprising the power supply module according to any one of claims 1 to 3. 1st pin and
2nd pin and
3rd pin and
An internal circuit power supply terminal of that is connected to said third pin,
A first inductance element provided between the first pin and the second pin,
A second inductance element provided between the second pin and the third pin,
A semiconductor module characterized by being housed in one package.

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