JP6930570B2 - Support glass substrate for semiconductors and laminated substrate using this - Google Patents

Description

The present invention relates to a supporting glass substrate for a semiconductor and a laminated substrate using the same, and more specifically, to a supporting glass substrate for a semiconductor used for supporting a semiconductor substrate in a semiconductor package manufacturing process and a laminated substrate using the same.

Portable electronic devices such as mobile phones, notebook personal computers, and PDAs (Personal Data Assistance) are required to be smaller and lighter. Along with this, the mounting space for semiconductor chips used in these electronic devices is also severely limited, and high-density mounting of semiconductor chips has become an issue. Therefore, in recent years, a three-dimensional mounting technology, that is, a high-density mounting of a semiconductor package has been achieved by laminating semiconductor chips and connecting each semiconductor chip with wiring.

With the progress of three-dimensional mounting technology, semiconductor substrates are patterned with an accuracy of several tens of nm, and even if a dimensional change of only several tens of nm occurs, it causes a decrease in yield. In order to suppress the dimensional change of the semiconductor substrate, it is effective to use a supporting glass substrate for supporting the semiconductor substrate, and it is particularly effective to use a flat supporting glass substrate.

However, if a flat support glass substrate is used, problems due to static electricity are likely to occur in the semiconductor package manufacturing process. That is, in the semiconductor package manufacturing process, contact peeling between the support glass substrate and the surface plate is repeated. If this contact peeling is repeated, the amount of charge in the supporting glass substrate increases, and the possibility of causing dielectric breakdown increases. Further, when the difference in the coefficient of thermal expansion between the support glass substrate and the surface plate is large, the support glass substrate may be charged by the friction between the support glass substrate and the surface plate in the thermal process, causing dielectric breakdown. If the supporting glass substrate undergoes dielectric breakdown, the semiconductor substrate is contaminated, which causes high cost.

The present invention has been made in view of the above circumstances, and a technical problem thereof is to contribute to high-density mounting of a semiconductor package by creating a supporting glass substrate that is hard to break down in insulation in the manufacturing process of the semiconductor package. be.

As a result of repeating various experiments, the present inventor has found that the above technical problem can be solved by forming a specific roughened region on the surface of a glass substrate, and proposes the present invention. be. That is, the semiconductor support glass substrate of the present invention has a first surface on which the semiconductor substrate is laminated and a second surface on the opposite side of the first surface, and the first surface. And at least one of the second surfaces is characterized by having a roughened region having a surface roughness Ra of 0.3 nm or more and a surface roughness Rmax of 100 nm or less. Here, "Surface Roughness Ra" and "Surface Roughness Rmax" are values measured in an area of 5 μm square using a scanning probe microscope (for example, Dimension Icon manufactured by Bruker). For example, when a roughened region is formed on the entire surface of the second surface of the glass substrate, nine locations of the in-plane central portion and the peripheral portion (the portion about 50 mm inside from the end surface of the glass substrate) of the glass substrate are formed. It is an average value when surface roughness Ra and Rmax are measured in an area of 5 μm square, respectively.

The supporting glass substrate for a semiconductor of the present invention has a roughened region having a surface roughness Ra of 0.3 nm or more on at least one surface. As a result, the contact area between the support glass substrate and the surface plate is reduced, and the amount of charge in the support glass substrate can be reduced. On the other hand, if the surface roughness Rmax of the roughened region is too large, microcracks are generated in the supporting glass substrate, and the strength of the supporting glass substrate tends to decrease. Therefore, in the supporting glass substrate for semiconductors of the present invention, the surface roughness Rmax of the roughened region is regulated to 100 nm or less.

Secondly, in the supporting glass substrate for semiconductors of the present invention, it is preferable that the roughened region is formed on the second surface.

Third, in the support glass substrate for semiconductors of the present invention, it is preferable that the roughened area is formed in 5% or more of the second surface in terms of area ratio.

Fourth, in the supporting glass substrate for semiconductors of the present invention, it is preferable that the roughened region is formed on both the first surface and the second surface. By doing so, it is possible to reduce the amount of charge in the support glass substrate not only when the support glass substrate is brought into contact with the surface plate but also when the semiconductor substrate is peeled off.

Fifth, the semiconductor support glass substrate of the present invention preferably has arcuate polishing scratches in the roughened region. By doing so, not only the amount of charge in the supporting glass substrate is reduced, but also the deviation in the overall thickness of the supporting glass substrate can be easily reduced.

Sixth, the semiconductor support glass substrate of the present invention preferably has an overall plate thickness deviation of 3.0 μm or less. By doing so, it becomes easy to improve the accuracy of the processing process. In particular, since the wiring accuracy can be improved, high-density wiring becomes possible. Further, the strength of the support glass substrate is improved, and the support glass substrate and the laminated substrate are less likely to be damaged. Furthermore, the number of times the support glass substrate can be reused can be increased. Here, the "overall plate thickness deviation" is the difference between the maximum plate thickness and the minimum plate thickness of the entire supporting glass substrate, and can be measured by, for example, the Bow / Warp measuring device SBW-331ML / d manufactured by Kobelco Kaken Co., Ltd.

Seventh, the support glass substrate for semiconductors of the present invention preferably has a plate thickness of less than 2.0 mm and a warp amount of 60 μm or less. Here, the "warp amount" refers to the sum of the absolute value of the maximum distance between the highest point and the least squares focal plane in the entire supporting glass substrate and the absolute value of the lowest point and the least squares focal plane. For example, it can be measured by the Bow / Warp measuring device SBW-331ML / d manufactured by Kobelco Research Institute.

Eighth, the laminated substrate of the present invention is a laminated substrate including at least a semiconductor substrate and a supporting glass substrate for semiconductors for supporting the semiconductor substrate, and the supporting glass substrate for semiconductors is the above-mentioned supporting glass substrate for semiconductors. It is preferable to have.

Ninth, in the laminated substrate of the present invention, the average thermal expansion coefficient of the supporting glass substrate for semiconductors at 20 to 260 ° C. is 50 × ^10-7 / ° C. or higher, and the semiconductor substrate is molded with at least a sealing material. It is preferable to include a semiconductor chip. Here, the "average coefficient of thermal expansion at 20 to 260 ° C." can be measured with a dilatometer.

As a new WLP, a fan-out type WLP has been proposed. The fan-out type WLP can increase the number of pins, and by protecting the end portion of the semiconductor chip, it is possible to prevent the semiconductor chip from being chipped or the like. The fan-out type WLP includes a step of molding a plurality of semiconductor chips with a resin encapsulant to form a semiconductor substrate, and then wiring to one surface of the semiconductor substrate, a step of forming solder bumps, and the like. Since these steps involve a heat treatment at about 200 to 300 ° C., the encapsulant may be deformed and the semiconductor substrate may change in size. When the dimensions of the semiconductor substrate change, it becomes difficult to wire the semiconductor substrate at a high density to one surface of the semiconductor substrate, and it becomes difficult to accurately form solder bumps.

As described above, it is effective to use a support glass substrate in order to suppress the dimensional change of the semiconductor substrate. However, even when the support glass substrate is used, the proportion of semiconductor chips in the semiconductor substrate is large. When the proportion of the encapsulant is small, the semiconductor substrate may be warped and deformed. Therefore, if the average coefficient of thermal expansion of the supporting glass substrate is defined as described above, warpage deformation of the semiconductor substrate can be suppressed even when the proportion of semiconductor chips is large and the proportion of encapsulant is small in the semiconductor substrate. ..

Tenth, in the laminated substrate of the present invention, it is preferable that the supporting glass substrate for semiconductor is non-alkali glass and the semiconductor substrate includes a silicon wafer. Here, "non-alkali glass" refers to glass in which the content of alkaline components (Li ₂ O, K ₂ O, Na ₂ O) in the glass composition is 0.5% by mass or less.

It is a conceptual perspective view which shows an example of the laminated substrate of this invention. It is a conceptual cross-sectional view which shows the manufacturing process of a fan out type WLP. It is a conceptual cross-sectional view which shows the manufacturing process of a fan out type WLP. It is a conceptual cross-sectional view which shows the manufacturing process of a fan out type WLP. It is a conceptual cross-sectional view which shows the manufacturing process of a fan out type WLP. It is a conceptual cross-sectional view which shows the manufacturing process of a fan out type WLP. It is a conceptual cross-sectional view which shows the manufacturing process of a fan out type WLP. It is a conceptual cross-sectional view which shows the manufacturing process of a fan out type WLP. It is a conceptual cross-sectional view which shows the process of thinning a semiconductor substrate by using the support glass substrate for semiconductor as a back grind substrate. It is a conceptual cross-sectional view which shows the process of thinning a semiconductor substrate by using the support glass substrate for semiconductor as a back grind substrate. It is a conceptual cross-sectional view which shows the process of thinning a semiconductor substrate by using the support glass substrate for semiconductor as a back grind substrate. It is a conceptual cross-sectional view which shows the process of thinning a semiconductor substrate by using the support glass substrate for semiconductor as a back grind substrate. It is a conceptual cross-sectional view which shows the process of thinning a semiconductor substrate by using the support glass substrate for semiconductor as a back grind substrate. It is explanatory drawing which shows the apparatus used for measuring the withstand electric charge, and is explanatory drawing which shows the state in which the glass substrate is placed. It is explanatory drawing which shows the apparatus used for measuring the withstand electric charge, and is explanatory drawing which shows the state which the glass substrate and the table are in close contact with each other.

The supporting glass substrate for a semiconductor of the present invention has a roughened region on at least one surface, and the surface roughness Ra of the roughened region is 0.3 nm or more, preferably 0.5 nm or more, more preferably. Is 0.8 nm or more, particularly preferably 1.0 to 8.0 nm. If the surface roughness Ra is too small, it becomes difficult to reduce the amount of charge in the supporting glass substrate. On the other hand, if the surface roughness Ra is too large, the processing time of the roughening treatment becomes long, and the manufacturing cost of the supporting glass substrate tends to rise.

The surface roughness Rmax of the roughened region is 100 nm or less, preferably 80 nm or less, more preferably 50 nm or less, and particularly preferably 30 nm or less. If the surface roughness Rmax is too large, microcracks are generated in the support glass substrate, and the strength of the support glass substrate tends to decrease.

In the support glass substrate for semiconductors of the present invention, it is preferable that the roughened region is formed by a chemical solution. That is, it is preferable that the roughened region is formed by the chemical treatment. In this way, a smooth roughened region can be formed. As a result, it becomes easy to maintain the strength of the supporting glass substrate even when the roughened region is formed. As the chemical solution, an acidic aqueous solution is preferable from the viewpoint of roughening efficiency, and as the acid, for example, hydrofluoric acid, buffered hydrofluoric acid (BHF), hydrochloric acid, nitric acid, and sulfuric acid are preferable.

As the roughening treatment, it is preferable to polish the surface of the supporting glass substrate and then treat it with a chemical solution. That is, it is preferable to increase the surface roughness of the surface of the supporting glass substrate by polishing treatment and then reduce the microcracks existing in the polished surface by chemical treatment. By doing so, it is possible to shorten the processing time of the roughening treatment while maintaining the strength. In this case, as the chemical solution, an alkaline aqueous solution can be used in addition to the acidic aqueous solution, and for example, a potassium hydroxide aqueous solution and a sodium hydroxide aqueous solution can be used.

Various methods can be used for treating the chemical solution. Among them, from the viewpoint of safety and manufacturing efficiency, a method of applying the chemical solution to the glass surface using a roller impregnated with the chemical solution, and a method of applying the chemical solution to the glass surface A method of immersing the glass substrate in the chemical solution after partially protecting the glass substrate with a resist film is preferable.

Further, it is also preferable that the roughened region of the supporting glass substrate for a semiconductor of the present invention is formed by a reactive gas. That is, it is also preferable that the roughened region is formed by the reactive gas. By doing so, the roughening treatment can be safely performed only by controlling the flow of the reactive gas without scattering the chemical solution. Various gases can be used as the reactive gas, and among them, a gas containing F such as _{CF 4} and SF _{6 or a gas containing Cl such as SiC 4} is used as a source for reaction by an atmospheric pressure plasma process. It is preferable to generate a sex gas. Further, in the atmospheric pressure plasma process, it is preferable to blow an inert carrier gas such as He or Ar onto the glass surface in addition to the reactive gas.

In the support glass substrate for semiconductors of the present invention, it is also preferable that the roughened region is formed by polishing treatment. That is, it is also preferable that the roughened region is formed by the polishing treatment. In particular, it is preferable to form a roughened region on both the first surface and the second surface due to the arcuate polishing scratches. By doing so, it is possible to safely perform the roughening treatment while reducing the deviation in the overall plate thickness.

In the support glass substrate for semiconductors of the present invention, it is preferable that the roughened region is formed on the second surface. By doing so, even if the contact peeling between the support glass substrate and the surface plate is repeated, the amount of charge in the support glass substrate can be reduced. If a roughened region is formed on the first surface, it is easy to reduce the amount of charge in the supporting glass substrate when the semiconductor substrate is peeled off, but the roughened region is not formed on the first surface. May be good. When the roughened region is not formed on the first surface, the semiconductor substrate can be stably supported.

In the supporting glass substrate for semiconductors of the present invention, the roughened region is formed on the entire surface of the second surface in an area ratio of 5% or more, 10% or more, 30% or more, 50% or more, 80% or more. Is preferable. By doing so, it becomes easy to reduce the amount of charge in the supporting glass substrate when it comes into contact with the surface plate.

It is also preferable that the roughened region is formed in an area ratio of 5% or more, 10% or more, 30% or more, 50% or more, particularly 80% or more of the first surface. In this way, when the semiconductor substrate is peeled off, the amount of charge in the supporting glass substrate can be easily reduced.

The average coefficient of thermal expansion in the temperature range of 30 to 260 ° C. is preferably increased when the proportion of semiconductor chips in the semiconductor substrate is small and the proportion of encapsulant is large, and conversely, the semiconductor chips in the semiconductor substrate. When the proportion of the encapsulant is large and the proportion of the encapsulant is small, it is preferable to reduce the ratio.

When it is desired to regulate the average coefficient of thermal expansion in the temperature range of 30 to 260 ° C. to 0 × ^10-7 / ° C. or higher and ^{less than 50 × 10-7} / ° C., the supporting glass substrate has a glass composition of SiO by mass%. ₂ 55 to 75%, Al ₂ O ₃ 15 to 30%, Li ₂ O 0.1 to 6%, Na ₂ O + K ₂ O 0 to 8%, MgO + CaO + SrO + BaO 0 to 10%, or SiO ₂ It is also preferable to contain 55 to 75%, Al ₂ O ₃ 10 to 30%, Li ₂ O + Na ₂ O + K ₂ O 0 to 0.3%, and MgO + CaO + SrO + BaO 5 to 20%. When it is desired to regulate the average thermal expansion coefficient in the temperature range of 30 to 260 ° C. to 50 × ^10-7 / ° C. or higher and ^{less than 70 × 10-7} / ° C., the supporting glass substrate has a glass composition of SiO by mass%. ₂ 55 to 75%, Al ₂ O _{3 3 to} 15%, B ₂ O ₃ 5 to 20%, MgO 0 to 5%, CaO 0 to 10%, SrO 0 to 5%, BaO 0 to 5%, ZnO 0 It preferably contains ~ 5%, Na ₂ O 5-15%, K ₂ O 0-10%, SiO ₂ 64-71%, Al ₂ O ₃ 5-10%, B ₂ O ₃ 8-15%. , 0~5% MgO, CaO 0~6% , SrO 0~3%, BaO 0~3%, 0~3% ZnO, Na 2 O 5~15%, by containing K 2 O 0 to 5% Is more preferable. When it is desired to regulate the average thermal expansion coefficient in the temperature range of 30 to 260 ° C. to 70 × ^10-7 / ° C. or higher and 85 × ^10-7 / ° C. or lower, the supporting glass substrate has a glass composition of SiO by mass%. _{2 60~75%, Al 2 O 3} 5~15%, B 2 O 3 5~20%, 0~5% MgO, CaO 0~10%, SrO 0~5%, BaO 0~5%, ZnO 0 It preferably contains ~ 5%, Na ₂ O 7-16%, K ₂ O 0-8%, SiO ₂ 60-68%, Al ₂ O ₃ 5-15%, B ₂ O ₃ 5-20%. , 0~5% MgO, CaO 0~10% , SrO 0~3%, BaO 0~3%, 0~3% ZnO, Na 2 O 8~16%, by containing K 2 O 0 to 3% Is preferable. If you want to regulate the average coefficient of thermal expansion in the temperature range of 30 to 260 ° ^{C to more than 85 x 10-7} / ° C and 120 x ^10-7 / ° C or less, the supporting glass substrate has a glass composition of SiO by mass%. ₂ 55 to 70%, Al ₂ O _{3 3 to} 13%, B ₂ O ₃ 2 to 8%, MgO 0 to 5%, CaO 0 to 10%, SrO 0 to 5%, BaO 0 to 5%, ZnO 0 It preferably contains ~ 5%, Na ₂ O 10-21%, and K ₂ O 0-5%. When it is desired to regulate the average coefficient of thermal expansion in the temperature range of 30 to 260 ° ^{C. to more than 120 × 10-7} / ° C. and 165 × ^10-7 / ° C. or less, the supporting glass substrate has a glass composition of SiO by mass%. ₂ 53 to 65%, Al ₂ O _{3 3 to} 13%, B ₂ O _{30 to} 5%, MgO 0.1 to 6%, CaO 0 to 10%, SrO 0 to 5%, BaO 0 to 5%, It preferably contains ZnO 0 to 5%, Na ₂ O + K ₂ O 20 to 40%, Na ₂ O 12 to 21%, and K _{2 O 7 to 21%.} By doing so, it becomes easy to regulate the coefficient of thermal expansion within a desired range, and the devitrification resistance is improved, so that it becomes easy to mold a support glass substrate having a small deviation in overall plate thickness. In addition, "Na ₂ O + K ₂ O" refers to the total amount of _{Na 2} O and K _{2 O.} "MgO + CaO + SrO + BaO" refers to the total amount of MgO, CaO, SrO and BaO.

In the supporting glass substrate for semiconductors of the present invention, the content of the alkaline component in the glass composition is preferably 15% by mass or less, 10% by mass or less, 5% by mass or less, and particularly less than 0.5% by mass. The smaller the content of the alkaline component in the glass composition, the more difficult it is for static electricity to be released into the atmosphere, and the more easily the amount of charge in the supporting glass substrate increases, so that the effect of the present invention becomes relatively large. When the content of the alkaline component in the glass composition is small, it is preferable to combine the static elimination treatment with an ionizer in addition to the roughening treatment from the viewpoint of reducing the charge amount.

The higher the coefficient of thermal expansion of the support glass substrate, the larger the difference in the coefficient of thermal expansion between the support glass substrate and the surface plate, and the friction between the support glass substrate and the surface plate tends to increase due to the thermal process. As a result, the amount of charge in the supporting glass substrate is likely to increase, so that the effect of the present invention becomes relatively large. Further, when the coefficient of thermal expansion of the support glass substrate is high (for example, when the average coefficient of thermal expansion of the support glass substrate at 20 to 260 ° C. is 50 × ^10-7 / ° C. or higher), the above is described from the viewpoint of reducing the amount of charge. In addition to the roughening treatment, it is preferable to combine a static elimination treatment with an ionizer.

In the supporting glass substrate for semiconductors of the present invention, the overall plate thickness deviation is preferably 3.0 μm or less, less than 2.0 μm, 1.5 μm or less, 1.0 μm or less, and particularly less than 0.1 to 1.0 μm. The smaller the deviation in the overall plate thickness, the easier it is to improve the accuracy of the processing. In particular, since the wiring accuracy can be improved, high-density wiring becomes possible. Further, the strength of the support glass substrate is improved, and the support glass substrate and the laminated substrate are less likely to be damaged. Furthermore, the number of times the support glass substrate can be reused can be increased.

The surface of the supporting glass substrate for semiconductors of the present invention may be polished in order to reduce the overall thickness deviation to less than 2.0 μm, 1.5 μm or less, 1.0 μm or less, and particularly less than 1.0 μm. preferable. Various methods can be adopted as the polishing treatment method, but both surfaces of the glass substrate are sandwiched between a pair of polishing pads, and the glass substrate is polished while rotating the glass substrate and the pair of polishing pads together. Therefore, a method of imparting arcuate polishing scratches to both surfaces of the glass substrate is preferable. Further, it is preferable that the pair of polishing pads have different outer diameters, and during polishing, the glass substrate is intermittently polished so that a part of the glass substrate protrudes from the polishing pads, and both surfaces of the glass substrate are polished in an arc shape. It is preferable to give scratches. This makes it easier to reduce the overall plate thickness deviation and also makes it easier to reduce the amount of warpage. In the polishing treatment, the polishing depth is not particularly limited, but the polishing depth is preferably 50 μm or less, 30 μm or less, 0.01 to 20 μm, and particularly 0.1 to 10 μm. The smaller the polishing depth, the higher the productivity of the glass substrate.

The supporting glass substrate for a semiconductor of the present invention may have a rectangular shape, but a wafer shape (substantially a perfect circle shape) is preferable, and the diameter thereof is preferably 100 mm or more and 500 mm or less, and particularly preferably 150 mm or more and 450 mm or less. In this way, it becomes easy to apply to the manufacturing process of the semiconductor package. In this case, the roundness of the supporting glass substrate (excluding the notch portion) is preferably 1 mm or less, 0.1 mm or less, 0.05 mm or less, and particularly preferably 0.03 mm or less. The smaller the roundness, the easier it is to apply to the manufacturing process of semiconductor packages. The definition of roundness is a value obtained by subtracting the minimum value from the maximum value of the outer shape of the supporting glass substrate.

In the supporting glass substrate for semiconductors of the present invention, the plate thickness is preferably less than 2.0 mm, 1.5 mm or less, 1.2 mm or less, 1.1 mm or less, 1.0 mm or less, and particularly 0.9 mm or less. As the plate thickness becomes thinner, the mass of the laminated substrate becomes lighter, so that the handleability is improved. On the other hand, if the plate thickness is too thin, the strength of the support glass substrate itself decreases, and it becomes difficult to fulfill the function as the support substrate. Therefore, the plate thickness is preferably 0.1 mm or more, 0.2 mm or more, 0.3 mm or more, 0.4 mm or more, 0.5 mm or more, 0.6 mm or more, and particularly 0.7 mm or more.

The amount of warpage is preferably 60 μm or less, 55 μm or less, 50 μm or less, 1 to 45 μm, and particularly 5 to 40 μm. The smaller the amount of warpage, the easier it is to improve the accuracy of the processing. In particular, since the wiring accuracy can be improved, high-density wiring becomes possible.

The support glass substrate for semiconductors of the present invention preferably has a notch portion (positioning portion) on a part of the outer periphery of the support glass substrate. In this way, a positioning member such as a positioning pin is brought into contact with the notch portion of the support glass substrate, and the position of the support glass substrate can be easily fixed. As a result, the alignment between the semiconductor substrate and the supporting glass substrate becomes easy. If a notch portion is also formed on the semiconductor substrate and the positioning member is brought into contact with the semiconductor substrate, the alignment between the semiconductor substrate and the supporting glass substrate becomes easier.

The notch portion is preferably chamfered. That is, it is preferable that the chamfered portion is formed in the notch portion. Further, it is preferable that the surface of the notch portion is etched with a chemical solution to remove minute scratches. This makes it easier to prevent the support glass substrate from being damaged from the notch portion. The suitable chemical solution is as described above.

In the supporting glass substrate for semiconductors of the present invention, it is preferable that the end faces (excluding the notch portion) are chamfered. That is, it is preferable that a chamfered portion is formed on the end face. Further, it is preferable that the surface of the end face is etched with an acid to remove minute scratches. This makes it easier to prevent the support glass substrate from being damaged from the end face. The suitable chemical solution is as described above.

The supporting glass substrate for a semiconductor of the present invention is preferably not chemically strengthened from the viewpoint of reducing the amount of warpage. That is, from the viewpoint of reducing the amount of warpage, it is preferable not to have a compressive stress layer on the surface.

The supporting glass substrate for a semiconductor of the present invention is preferably formed by a down draw method, particularly an overflow down do method. In the overflow down draw method, molten glass is overflowed from both sides of a heat-resistant giraffe-shaped structure, and the overflowed molten glass is merged at the lower apex of the giraffe-shaped structure and stretched downward to manufacture a glass substrate. How to do it. In the overflow down draw method, the surface of the glass substrate, which should be the surface, does not come into contact with the gutter-shaped refractory and is formed in a free surface state. Therefore, it becomes easy to manufacture a glass substrate having a small plate thickness, and the total plate thickness deviation can be reduced to less than 2.0 μm, particularly less than 1.0 μm, by a small amount of polishing or without polishing treatment. As a result, the manufacturing cost of the glass substrate can be reduced. The structure and material of the gutter-shaped structure are not particularly limited as long as they can achieve desired dimensions and surface accuracy. Further, the method of applying a force when performing downward stretching molding is not particularly limited. For example, a method of rotating and stretching a heat-resistant roll having a sufficiently large width in contact with the glass may be adopted, or a plurality of pairs of heat-resistant rolls may be placed only in the vicinity of the end face of the strip-shaped glass. A method of contacting and stretching may be adopted.

As a method for forming the glass substrate, for example, a slot down draw method, a redraw method, a float method and the like can be adopted in addition to the overflow down draw method.

It is preferable that the supporting glass substrate for a semiconductor of the present invention is formed by the overflow downdraw method and then the entire surfaces of the first surface and the second surface are polished. In this way, it becomes easy to regulate the overall plate thickness deviation to less than 2.0 μm, 1.5 μm or less, 1.0 μm or less, and particularly 0.1 to 1.0 μm or less.

The laminated substrate of the present invention is a laminated substrate including at least a semiconductor substrate and a supporting glass substrate for semiconductors for supporting the semiconductor substrate, and the supporting glass substrate for semiconductors is the above-mentioned supporting glass substrate for semiconductors. And. Here, the technical features (preferable configuration, effect) of the laminated substrate of the present invention overlap with the technical features of the supporting glass substrate for semiconductors of the present invention. Therefore, in the present specification, detailed description of the overlapping portion will be omitted.

The laminated substrate of the present invention includes a semiconductor chip in which the average thermal expansion coefficient of the supporting glass substrate for semiconductors at 20 to 260 ° C. is 50 × ^10-7 / ° C. or higher, and the semiconductor substrate is at least molded with a sealing material. Is preferable. By doing so, the coefficient of thermal expansion of the support glass substrate and the semiconductor substrate can be easily matched, and the fan-out type WLP can be suitably applied to the manufacturing process.

In the laminated substrate of the present invention, it is also preferable that the supporting glass substrate for semiconductor is non-alkali glass and the semiconductor substrate includes a silicon wafer. In this way, the coefficient of thermal expansion of the support glass substrate and the semiconductor substrate can be easily matched, and the support glass substrate is used as the back grind substrate, which is suitable for the process of thinning the semiconductor substrate.

The laminated substrate of the present invention preferably has an adhesive layer between the semiconductor substrate and the supporting glass substrate. The adhesive layer is preferably a resin, and for example, a thermosetting resin, a photocurable resin (particularly an ultraviolet curable resin), or the like is preferable. Further, those having heat resistance to withstand heat treatment in the manufacturing process of the semiconductor package are preferable. As a result, the adhesive layer is less likely to melt in the manufacturing process of the semiconductor package, and the accuracy of the processing process can be improved.

The laminated substrate of the present invention further has a release layer between the semiconductor substrate and the support glass substrate, more specifically, between the semiconductor substrate and the adhesive layer, or between the support glass substrate and the adhesive layer. It is preferable to have a layer. In this way, the semiconductor substrate can be easily peeled off from the supporting glass substrate after the semiconductor substrate is subjected to a predetermined processing process. From the viewpoint of productivity, the semiconductor substrate is preferably peeled off by irradiation light such as laser light.

The peeling layer is composed of a material in which "intra-layer peeling" or "interfacial peeling" occurs due to irradiation light such as laser light. That is, when irradiated with light of a certain intensity, the bonding force between atoms or molecules in an atom or molecule disappears or decreases, ablation or the like occurs, and the material is composed of a material that causes peeling. In addition, there are cases where the components contained in the peeling layer are released as a gas and lead to separation by irradiation with irradiation light, and cases where the peeling layer absorbs light and becomes a gas and the vapor is released and leads to separation. There is.

In the laminated substrate of the present invention, the supporting glass substrate is preferably larger than the semiconductor substrate. As a result, when supporting the semiconductor substrate and the supporting glass substrate, even if the center positions of the two are slightly separated from each other, the edge portion of the semiconductor substrate is less likely to protrude from the supporting glass substrate.

The present invention will be further described with reference to the drawings.

FIG. 1 is a conceptual perspective view showing an example of the laminated substrate 1 of the present invention. In FIG. 1, the laminated substrate 1 includes a semiconductor support glass substrate 10 and a semiconductor substrate 11. The semiconductor support glass substrate 10 is attached to the semiconductor substrate 11 in order to prevent the dimensional change of the semiconductor substrate 11. A release layer 12 and an adhesive layer 13 are arranged between the semiconductor support glass substrate 10 and the semiconductor substrate 11. The release layer 12 is in contact with the semiconductor support glass substrate 10, and the adhesive layer 13 is in contact with the semiconductor substrate 11.

As can be seen from FIG. 1, the laminated substrate 1 is laminated in the order of the semiconductor support glass substrate 10, the release layer 12, the adhesive layer 13, and the semiconductor substrate 11. The shape of the semiconductor support glass substrate 10 is determined according to the semiconductor substrate 11, but in FIG. 1, the shapes of the semiconductor support glass substrate 10 and the semiconductor substrate 11 are substantially disk shapes. In addition to amorphous silicon (a-Si), silicon oxide, silicic acid compound, silicon nitride, aluminum nitride, titanium nitride and the like are used for the release layer 12. The release layer 12 is formed by plasma CVD, spin coating by a sol-gel method, or the like. The adhesive layer 13 is made of resin, and is formed by coating, for example, by various printing methods, an inkjet method, a spin coating method, a roll coating method, or the like. The adhesive layer 13 is dissolved and removed by a solvent or the like after the semiconductor support glass substrate 10 is peeled from the semiconductor substrate 11 by the peeling layer 12.

FIG. 2 is a conceptual cross-sectional view showing a manufacturing process of a fan-out type WLP. FIG. 2A shows a state in which the adhesive layer 21 is formed on one surface of the support member 20. If necessary, a release layer may be formed between the support member 20 and the adhesive layer 21. Next, as shown in FIG. 2B, a plurality of semiconductor chips 22 are attached on the adhesive layer 21. At that time, the active side surface of the semiconductor chip 22 is brought into contact with the adhesive layer 21. Next, as shown in FIG. 2C, the semiconductor chip 22 is molded with the resin encapsulant 23. As the sealing material 23, a material having little dimensional change after compression molding and dimensional change when molding wiring is used. Subsequently, as shown in FIGS. 2D and 2E, the semiconductor substrate 24 on which the semiconductor chip 22 is molded is separated from the support member 20, and then bonded and fixed to the semiconductor support glass substrate 26 via the adhesive layer 25. At that time, of the surfaces of the semiconductor substrate 24, the surface opposite to the surface on the side where the semiconductor chip 22 is embedded is arranged on the semiconductor support glass substrate 26 side. Here, a roughened region is formed on the surface of the semiconductor support glass substrate 26 opposite to the surface on the side in contact with the adhesive layer 25 by an atmospheric pressure plasma process (source CF ₄ , carrier gas Ar). There is. In this way, the laminated substrate 27 can be obtained. If necessary, a release layer may be formed between the adhesive layer 25 and the semiconductor support glass substrate 26. Further, after the obtained laminated substrate 27 is conveyed, as shown in FIG. 2F, wiring 28 is formed on the surface of the semiconductor substrate 24 on the side where the semiconductor chip 22 is embedded, and then a plurality of solder bumps 29 are formed. .. Finally, after separating the semiconductor substrate 24 from the semiconductor support glass substrate 26, the semiconductor substrate 24 is cut for each semiconductor chip 22 and subjected to a subsequent packaging step (FIG. 2G).

FIG. 3 is a conceptual cross-sectional view showing a process of thinning a semiconductor substrate by using a support glass substrate for semiconductor as a back grind substrate. FIG. 3A shows the laminated substrate 30. The laminated substrate 30 is arranged in the order of the semiconductor support glass substrate 31, the release layer 32, the adhesive layer 33, and the semiconductor substrate (silicon wafer) 34. A roughened region is formed on the surface of the semiconductor support glass substrate 31 opposite to the surface on the side in contact with the adhesive layer 34 by a chemical solution treatment using an acid aqueous solution. A plurality of semiconductor chips 35 are formed on the surface of the semiconductor substrate 34 on the side in contact with the adhesive layer 33 by a photolithography method or the like. FIG. 3B shows a step of thinning the semiconductor substrate 34 by the polishing device 36. By this step, the semiconductor substrate 34 is mechanically polished to be thinned to, for example, several tens of μm. FIG. 3C shows a step of irradiating the release layer 32 with ultraviolet light 37 through the semiconductor support glass substrate 31. Through this step, as shown in FIG. 3D, the semiconductor support glass substrate 31 can be separated. The separated semiconductor support glass substrate 31 is reused as needed. FIG. 3E shows a step of removing the adhesive layer 33 from the semiconductor substrate 34. Through this step, the thinned semiconductor substrate 34 can be collected.

Hereinafter, the present invention will be described based on examples. The following examples are merely examples. The present invention is not limited to the following examples.

Table 1 shows Examples (Samples Nos. 1 to 4) and Comparative Examples (Samples Nos. 5 and 6) of the present invention.

<Sample No. Preparation of 1>
First, a glass batch containing a glass raw material was placed in a platinum crucible so as to have the glass composition shown in the table, and then melted, clarified, and homogenized at 1500 to 1600 ° C. for 24 hours. When melting the glass batch, stirring was performed using a platinum stirrer to homogenize the glass batch. Next, the molten glass was poured onto a carbon plate, formed into a plate shape, and then slowly cooled at a temperature near the slow cooling point for 30 minutes.

Subsequently, the obtained glass substrate was cut to a thickness of 300 mm × 300 mm × 0.8 mm, and then both surfaces thereof were polished by a polishing device. Specifically, both surfaces of the glass substrate are sandwiched between a pair of polishing pads having different outer diameters, and both surfaces of the glass substrate are polished while rotating the glass substrate and the pair of polishing pads together to perform both of the glass substrates. Arc-shaped polishing scratches were given to the surface. During the polishing process, it was occasionally controlled so that a part of the glass substrate protruded from the polishing pad. The polishing pad was made of urethane, the average particle size of the polishing slurry used in the polishing treatment was 2.5 μm, and the polishing rate was 15 m / min. For each of the obtained polished glass substrates, the total plate thickness deviation and the amount of warpage were measured by the Bow / Warp measuring device SBW-331ML / d manufactured by Kobelco Research Institute. As a result, the total plate thickness deviation was 0.65 μm, and the warpage amount was 35 μm, respectively.

Further, after masking the glass substrate after the polishing treatment in a grid pattern with a polyimide tape, the surface of the glass substrate was treated with a chemical solution by immersing it in a 10 mass% HCl aqueous solution at 50 ° C. for 1 hour. Next, the glass substrate after the chemical treatment was washed with water, the polyimide tape was peeled off, and the glass substrate was washed again with water and dried.

<Sample No. Preparation of 2>
First, a glass batch containing a glass raw material was placed in a platinum crucible so as to have the glass composition shown in the table, and then melted, clarified, and homogenized at 1500 to 1600 ° C. for 24 hours. When melting the glass batch, stirring was performed using a platinum stirrer to homogenize the glass batch. Next, the molten glass was poured onto a carbon plate, formed into a plate shape, and then slowly cooled at a temperature near the slow cooling point for 30 minutes.

Subsequently, the obtained glass substrate was cut to a thickness of φ300 mm × 0.8 mm, and both surfaces thereof were mirror-polished. Next, both surfaces of the glass substrate were treated with a chemical solution by immersing in a 5 mass% potassium hydroxide aqueous solution at 50 ° C. for 1 hour. Next, after the chemical treatment, the glass substrate was washed with water and dried.

<Sample No. Preparation of 3>
First, a glass batch prepared with glass raw materials was put into a continuous melting furnace so as to have the glass composition shown in the table, and then melted, clarified, and homogenized at 1500 to 1600 ° C. for 24 hours. Then, it was molded into a glass substrate by the overflow down draw method.

Subsequently, the obtained glass substrate was cut to a thickness of φ300 mm × 0.7 mm, and then both surfaces thereof were polished by a polishing device. Specifically, both surfaces of the glass substrate are sandwiched between a pair of polishing pads having different outer diameters, and both surfaces of the glass substrate are polished while rotating the glass substrate and the pair of polishing pads together to perform both of the glass substrates. Arc-shaped polishing scratches were given to the surface. During the polishing process, it was occasionally controlled so that a part of the glass substrate protruded from the polishing pad. The polishing pad was made of urethane, the average particle size of the polishing slurry used in the polishing treatment was 2.5 μm, and the polishing rate was 15 m / min. For each of the obtained polished glass substrates, the total plate thickness deviation and the amount of warpage were measured by the Bow / Warp measuring device SBW-331ML / d manufactured by Kobelco Research Institute. As a result, the total plate thickness deviation was 0.45 μm, and the warpage amount was 25 μm, respectively.

<Sample No. Preparation of 4>
First, a glass batch containing a glass raw material was placed in a platinum crucible so as to have the glass composition shown in the table, and then melted, clarified, and homogenized at 1500 to 1600 ° C. for 24 hours. When melting the glass batch, stirring was performed using a platinum stirrer to homogenize the glass batch. Next, the molten glass was poured onto a carbon plate, formed into a plate shape, and then slowly cooled at a temperature near the slow cooling point for 30 minutes.

Subsequently, the obtained glass substrate was cut to a thickness of 300 mm × 400 mm × 1.0 mm, and both surfaces thereof were mirror-polished. Further, after masking the glass substrate after mirror polishing in a stripe shape with a polyimide tape, _{atmospheric pressure plasma treatment was performed using CF 4} as a reactive gas and Ar as a carrier gas. Next, after performing atmospheric pressure plasma treatment, the glass substrate was washed with water, the polyimide tape was peeled off, and the glass substrate was washed with water again and dried.

<Sample No. Preparation of 5>
First, a glass batch prepared with glass raw materials was put into a continuous melting furnace so as to have the glass composition shown in the table, and then melted, clarified, and homogenized at 1500 to 1600 ° C. for 24 hours. Then, it was molded into a glass substrate by the overflow down draw method. Subsequently, the obtained glass substrate was cut to a thickness of φ300 mm × 0.7 mm.

<Sample No. Preparation of 6>
First, a glass batch prepared with glass raw materials was put into a continuous melting furnace so as to have the glass composition shown in the table, and then melted, clarified, and homogenized at 1500 to 1600 ° C. for 24 hours. Then, it was molded into a glass substrate by a rollout method. Subsequently, the obtained glass substrate was cut to a thickness of φ300 mm × 0.7 mm, and then both surfaces thereof were polished by a polishing device.

For each of the obtained glass substrates, the average coefficient of thermal expansion α _{30 to 380} in the temperature range of 30 to 380 ° C., the area of the roughened region, the surface roughness Ra, the surface roughness Rmax, the charge amount and the microcracks were evaluated. .. The results are shown in Table 1.

_{The average coefficient of thermal expansion α 30 to 380} in the temperature range of 30 to 380 ° C. is a value measured by a dilatometer.

The surface roughness Ra and Rmax were measured with an area of 5 μm square using a scanning probe microscope (Dimenceion Icon manufactured by Bruker). Specifically, the surface roughness Ra and Rmax were measured in an area of 5 μm square at nine locations in the in-plane central portion and the peripheral portion (the portion about 50 mm inside from the end surface of the glass substrate) of the glass substrate, and the average thereof was measured. It is a notation of the value. In addition, sample No. For samples other than 5, the surface roughness Ra and Rmax were measured for the roughened region.

An apparatus as shown in FIGS. 4A and 4B was used to evaluate the amount of charge. This device has the following configuration.

The support 41 of the glass substrate 40 includes a Teflon (registered trademark) pad 42 that supports the four corners of the glass substrate. Further, the support base 41 is provided with a plate 43 made of metallic aluminum that can be raised and lowered, and by moving the plate 43 up and down, the glass substrate 40 and the plate 43 are brought into contact with each other and peeled off to charge the glass substrate 40. Can be done. The plate 43 is grounded. Further, a hole (not shown) is formed in the plate 43, and this hole is connected to a diaphragm type vacuum pump (not shown). When the vacuum pump is driven, air is sucked from the holes of the plate 43, whereby the glass substrate 40 can be vacuum-sucked to the plate 43. Further, a surface electrometer 44 is installed at a position 10 mm above the glass substrate 40, whereby the amount of charge generated in the central portion of the glass substrate 40 can be continuously measured. Further, an air gun 45 with an ionizer is installed above the glass substrate 40, whereby the charging of the glass substrate 40 can be decelerated. The size of the plate 43 of this device is a circle having a diameter of 150 mm.

A method of measuring the amount of charge using this device will be described. The experiment is carried out in an environment of 20 ° C. ± 1 ° C. and humidity of 40% ± 1%. Since this amount of charge changes greatly depending on the atmosphere and the humidity in the atmosphere, it is necessary to pay particular attention to the control of humidity.
(1) The glass substrate 40 is placed on the support 41 with the surface having the roughened area facing down. If both surfaces do not have roughened areas, either surface may be on the lower side.
(2) The glass substrate 40 is statically eliminated to 10 V or less by the air gun 45 with an ionizer.
(3) The plate 43 is raised to bring it into contact with the glass substrate 40 and is vacuum-sucked so that the plate 43 and the glass substrate 40 are brought into close contact with each other for 30 seconds.
(4) The glass substrate 40 is peeled off by lowering the plate 43, and the amount of charge generated in the central portion of the glass substrate 40 is continuously measured with a surface electrometer.
(5) Repeat (3) and (4) to evaluate the charge amount a total of 5 times in succession.
(6) Obtain the maximum charge amount in each measurement, and integrate these to obtain the charge amount.

The microcracks were evaluated by observing the inside of the glass substrate and evaluating those having almost no microcracks as "◯" and those having many microcracks as "x".

As is clear from Table 1, the sample No. In Nos. 1 to 4, since the surface roughness of the roughened region was appropriate, the amount of charge and the evaluation of microcracks were good. Therefore, the sample No. It is considered that Nos. 1 to 4 can be suitably used as a supporting glass substrate for a semiconductor. On the other hand, sample No. No. 5 had a large amount of charge because the surface was too smooth. In addition, sample No. In No. 6, the surface was too rough, so that the evaluation of microcracks was poor.

1, 27, 30 Laminated substrates 10, 26, 31, 40 Support glass substrates for semiconductors (glass substrates)
11, 24, 34 Semiconductor substrate 12, 32 Release layer 13, 21, 25, 33 Adhesive layer 20 Support member 22, 35 Semiconductor chip 23 Encapsulant 28 Wiring 29 Solder bump 36 Polishing device 37 Ultraviolet light 41 Support base 42 Pad 43 Plate 44 Surface electrometer 45 Air gun

Claims (9)

It has a first surface on which semiconductor substrates are laminated and a second surface on the opposite side of the first surface, and has a plate thickness of 0.6 mm or more and less than 2.0 mm. at least one of the first surface and a second surface, the surface roughness Ra of 0.3nm or more, a table surface roughness Rmax of have a roughened area to be 100nm or less, and roughened regions, A supporting glass substrate for a semiconductor characterized by the presence of arcuate polishing scratches. The support glass substrate for a semiconductor according to claim 1, wherein the roughened region is formed on the second surface. The supporting glass substrate for a semiconductor according to claim 2, wherein the roughened region is formed on 5% or more of the second surface in terms of area ratio. The supporting glass substrate for a semiconductor according to any one of claims 1 to 3, wherein the roughened region is formed on both the first surface and the second surface. The support glass substrate for a semiconductor according to any one of claims 1 to 4 , wherein the total plate thickness deviation is 3.0 μm or less. The supporting glass substrate for a semiconductor according to any one of claims 1 to 5 , wherein the plate thickness is less than 2.0 mm and the amount of warpage is 60 μm or less. A laminated substrate including at least a semiconductor substrate and a semiconductor support glass substrate for supporting the semiconductor substrate, and the semiconductor support glass substrate is the semiconductor support glass substrate according to any one of claims 1 to 6. A laminated substrate characterized by. A claim that the support glass substrate for a semiconductor has an average coefficient of thermal expansion of 50 × ^10-7 / ° C. or higher at 20 to 260 ° C., and the semiconductor substrate includes at least a semiconductor chip molded with a sealing material. 7. The laminated substrate according to 7. The laminated substrate according to claim 7 , wherein the supporting glass substrate for a semiconductor is non-alkali glass, and the semiconductor substrate includes a silicon wafer.

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