JP6952503B2 - Manufacturing method of semiconductor devices - Google Patents

Description

The present invention relates to a method for manufacturing a semiconductor device for soldering electrode terminals.

Semiconductor devices used for electric power are required to be driven normally even in a high temperature environment. Therefore, in the semiconductor device, it is required to firmly bond the electrode terminals to the substrate by using solder. In order to meet this requirement, it is conceivable to increase the amount of solder used for joining the electrode terminals. It should be noted that simply increasing the amount of solder may cause the solder to flow to an unintended location. Therefore, a configuration for stopping the flow of solder is required.

Patent Document 1 discloses a configuration for stopping the flow of solder (hereinafter, also referred to as “related configuration A”). Specifically, in the related configuration A, the region to which the solder is supplied is surrounded by a protective film made of a resin. The protective film is formed on the metal layer.

JP-A-2010-251556 (Fig. 1, paragraph 0036)

The protective film of the related structure A is made of, for example, a resin. Therefore, the protective film may peel off from the metal layer in a high temperature environment. Therefore, in the related configuration A, there is a problem that the flow of the solder may not be stopped depending on the air temperature condition. Therefore, there is a need for a configuration that can stop the flow of solder without being affected by the temperature.

The present invention has been made to solve such a problem, and an object of the present invention is to provide a method for manufacturing a semiconductor device capable of stopping the flow of solder with almost no influence of air temperature. do.

In order to achieve the above object, the method for manufacturing a semiconductor device according to one aspect of the present invention is a method for manufacturing a semiconductor device for joining electrode terminals to a substrate using paste-like solder, and is a solder supply target. It is a method of manufacturing a semiconductor device including a wire surrounding a region. The method for manufacturing a semiconductor device includes (S1) a step of joining the wire to the main surface by ultrasonic bonding with the above-mentioned region surrounded by the wire, and (S2) the above-mentioned step of joining the wire to the main surface. in the region, the electrode terminal and a step of supplying a solder for bonding to the substrate, the shape of the wire in a plan view, Ri closed loop der, the shape of the cross section of the wire is circular, the In the step (S1), the wire is joined to the main surface by applying ultrasonic vibration to the wire .

According to the present invention, the wire is bonded to the main surface of the substrate by ultrasonic bonding in a state where the area to be supplied with the solder is surrounded by the wire. The solder for joining the electrode terminals to the substrate is supplied to the region.

The wire is less likely to be deformed or the like depending on the temperature condition than the resin. Therefore, the flow of the solder can be stopped by the wire with almost no influence of the air temperature.

It is sectional drawing of the semiconductor device which concerns on Embodiment 1 of this invention. It is a figure which shows the characteristic structure of Embodiment 1 of this invention. It is a flowchart of the semiconductor manufacturing method which concerns on Embodiment 1 of this invention. It is a figure which shows the structure which concerns on the modification 1 of Embodiment 1 of this invention. It is a figure which shows the structure which concerns on the modification 2 of Embodiment 1 of this invention.

Hereinafter, embodiments of the present invention will be described with reference to the drawings. In the drawings below, the same components are designated by the same reference numerals. The names and functions of the components with the same reference numerals are the same. Therefore, detailed description of a part of each component having the same reference numeral may be omitted.

The dimensions, materials, shapes, relative arrangements, and the like of each component exemplified in the embodiment may be appropriately changed depending on the configuration of the device to which the present invention is applied, various conditions, and the like.

<Embodiment 1>
FIG. 1 is a cross-sectional view of the semiconductor device 100 according to the first embodiment of the present invention. The semiconductor device 100 is a power module used in industrial equipment, automobiles, trains, and the like.

In FIG. 1, the X, Y, and Z directions are orthogonal to each other. The X, Y, and Z directions shown in the figure below are also orthogonal to each other. In the following, the direction including the X direction and the direction opposite to the X direction (−X direction) is also referred to as “X-axis direction”. Further, in the following, the direction including the Y direction and the direction opposite to the Y direction (−Y direction) is also referred to as “Y-axis direction”. Further, in the following, the direction including the Z direction and the direction opposite to the Z direction (−Z direction) is also referred to as “Z axis direction”.

Further, in the following, a plane including the X-axis direction and the Y-axis direction is also referred to as an “XY plane”. Further, in the following, a plane including the X-axis direction and the Z-axis direction is also referred to as an “XZ plane”. Further, in the following, a plane including the Y-axis direction and the Z-axis direction is also referred to as a “YZ plane”.

With reference to FIG. 1, the semiconductor device 100 includes a semiconductor chip S1, a substrate 4, a substrate 4A, a substrate 4B, a base plate 5, a heat radiating plate 6, an electrode terminal E1, a case 8, and a resin 9. And.

The substrate 4B is bonded to the heat radiating plate 6 via the solder 3. The substrate 4B is an insulating substrate. A circuit (not shown) is provided on the substrate 4B. The substrate 4B is joined to the base plate 5. The base plate 5 is made of, for example, AlN (aluminum nitride).

The substrate 4 and the substrate 4A are joined on the base plate 5. The substrate 4A is an insulating substrate. A circuit (not shown) is provided on the substrate 4A. Further, the semiconductor chip S1 is bonded to the substrate 4A via the solder 3.

The semiconductor chip S1 is, for example, an IGBT (Insulated Gate Bipolar Transistor), a MOSFET (Metal-Oxide-Semiconductor Field-Effect Transistor), or the like. The semiconductor chip S1 is connected to a circuit (not shown) of the substrate 4 via a wire Wn.

The substrate 4 is an insulating substrate. A circuit (not shown) is provided on the substrate 4. Further, the electrode terminal E1 is bonded to the substrate 4 via the solder 3.

A cylindrical case 8 is connected to the heat radiating plate 6. The case 8 is connected to the peripheral edge of the heat radiating plate 6 so that the case 8 surrounds the substrates 4, 4A, 4B, the semiconductor chip S1, the base plate 5, and the like. That is, the case 8 and the heat radiating plate 6 accommodate the substrates 4, 4A, 4B, the semiconductor chip S1, the base plate 5, and the like. A part of the electrode terminal E1 is fixed to the case 8. Further, the inside of the case 8 is filled with the resin 9. The resin 9 is, for example, a silicone gel. A lid 10 is provided on the upper part of the case 8.

(Characteristic configuration)
Next, a characteristic configuration of the present invention (hereinafter, also referred to as “configuration Ct1”) will be described. The configuration Ct1 is a configuration for joining the electrode terminals to the substrate by soldering.

FIG. 2 is a diagram showing a characteristic configuration Ct1 of the first embodiment of the present invention. FIG. 2 shows the configuration of the electrode terminal E1 and the periphery of the electrode terminal E1. That is, FIG. 2 shows a part of the semiconductor device 100 of FIG. FIG. 2A is a plan view of a part of the semiconductor device 100. FIG. 2B is a cross-sectional view of a part of the semiconductor device 100 along the lines A1-A2 of FIG. 2A.

In the following, the solder having viscosity is also referred to as "solder 3n". The solder 3n is, for example, paste solder. The paste solder is a paste-like solder. The paste solder is also called cream solder. When the solder 3n is heated, the solder 3n is melted, and then the solder 3n is cured, which is the solder 3.

With reference to FIG. 2A, the substrate 4 has a main surface 4a. In the following, the region of the main surface 4a of the substrate 4 to which the solder 3n is supplied is also referred to as “region Rg1”.

A wire W1 is joined to the main surface 4a of the substrate 4. The shape of the wire W1 in a plan view (XY plane) is a closed loop shape. The wire W1 is joined to the main surface 4a of the substrate 4 so that the wire W1 surrounds the region Rg1 in a plan view (XY plane). In the region Rg1, the electrode terminal E1 is bonded to the substrate 4 via the solder 3.

The wire W1 of this embodiment is made of Al (aluminum). In the following, the wire W1 composed of Al is also referred to as “wire W1a”.

Further, in the following, the step of joining the electrode terminal E1 to the substrate 4 by using the solder 3n is also referred to as “semiconductor manufacturing method Pr”. The semiconductor manufacturing method Pr is performed in a state where the wire W1 does not exist on the main surface 4a of the substrate 4.

Further, in the following, a device having a function of performing ultrasonic bonding is also referred to as a "bonding device". Ultrasonic bonding is a process of applying ultrasonic vibration to an object to be bonded while the object to be bonded is pressurized. The object to be joined is, for example, wire W1. Further, in the following, an apparatus having a function of supplying solder 3n is also referred to as a “solder supply apparatus”.

Next, the semiconductor manufacturing method Pr in the present embodiment will be described. The semiconductor manufacturing method Pr is a step included in the manufacturing method for manufacturing the semiconductor device 100.

FIG. 3 is a flowchart of the semiconductor manufacturing method Pr according to the first embodiment of the present invention. In the semiconductor manufacturing method Pr, first, the process of step S110 is performed.

In step S110, a wire bonding step is performed. With reference to FIG. 2A, in the wire bonding step, the wire W1 is placed on the main surface 4a of the substrate 4 so that the wire W1 surrounds the region Rg1 in a plan view (XY plane).

Next, in a state where the wire W1 surrounds the region Rg1 of the main surface 4a, the joining device joins the wire W1 to the main surface 4a by ultrasonic bonding. Specifically, the joining device joins the wire W1 to the main surface 4a by applying ultrasonic vibration to the wire W1 while the joining device pressurizes the wire W1. Next, the process of step S120 is performed.

In step S120, a solder supply step is performed. In the solder supply step, the solder supply device supplies the solder 3n to the region Rg1 surrounded by the wire W1. The solder 3n supplied to the region Rg1 is a member for joining the electrode terminal E1 to the substrate 4. Next, the process of step S130 is performed.

In step S130, a terminal joining step is performed. In the terminal joining step, the end portion of the electrode terminal E1 is fixed in the solder 3n existing in the region Rg1. Then, the solder 3n is heated. As a result, after the solder 3n is melted, the solder 3n is cured to become the solder 3. As a result, the electrode terminal E1 is joined to the substrate 4 via the solder 3. With the above, the semiconductor manufacturing method Pr is completed.

As described above, in the semiconductor manufacturing method Pr of the present embodiment, the wire W1 surrounds the region Rg1 of the main surface 4a of the substrate 4 to which the solder 3n is to be supplied, and the wire is ultrasonically bonded. It includes a step of bonding W1 to the main surface 4a and a step of supplying solder 3n for bonding the electrode terminal E1 to the substrate 4 to the region Rg1.

The wire is less likely to be deformed or the like depending on the temperature condition than the resin. Therefore, the flow of the solder 3n can be stopped by the wire W1 with almost no influence of the air temperature.

The wire W1 of the present embodiment is a wire W1a made of Al. Therefore, the above effect can be obtained even if the wire W1 composed of Al is used.

Further, in the present embodiment, the closed loop wire W1 is bonded to the substrate 4 by ultrasonic bonding. Then, the viscous solder 3n is supplied to the region Rg1 surrounded by the wire W1. As a result, the wire W1 functions as a wall for preventing the flow of the solder 3n.

Therefore, it is possible to prevent the solder 3n from adhering to the wire Wn, the base plate 5, and the like. Further, since the flow of the solder 3n is prevented, the amount of the solder 3n to be supplied to the region Rg1 in the wire W1 can be increased. By heating the increased amount of solder 3n, the solder 3n is melted and then the solder 3n is cured to become the solder 3. Therefore, the amount of solder 3 for joining the electrode terminal E1 to the substrate 4 can be increased. Thereby, the strength of bonding of the electrode terminal E1 to the substrate 4 can be improved. Therefore, a semiconductor device (power module) having higher reliability than the conventional one can be obtained.

The driving power module emits heat. If the temperature of the heat is very high, the case 8, the heat radiating plate 6, the substrate 4, and the like may be deformed. A part of the electrode terminal E1 is fixed to the case 8. Therefore, if the case 8 is deformed, stress is applied to the solder 3 that joins the electrode terminal E1 and the substrate 4. The stress is, for example, tensile stress, indentation stress, or the like. Therefore, if the strength of the bond between the electrode terminal E1 and the substrate 4 by the solder 3 is small, there is a problem that the electrode terminal E1 is peeled off from the substrate 4.

In order to improve the bonding strength, it is conceivable to increase the amount of paste solder for the electrode terminal E1 to bond with the substrate 4. However, when the amount of the paste solder is increased, there is a problem that the paste solder may adhere to the members (base plate, insulating member, etc.) existing around the electrode terminals.

Paste solder is solder powder with flux added. The paste solder has an appropriate viscosity. When the paste solder is heated in order to melt the paste solder, the viscosity of the paste solder decreases. In this case, there is a problem that the solder powder contained in the paste solder adheres to the members (base plate, insulating portion, etc.) existing around the electrode terminals before the paste solder melts.

Therefore, the semiconductor manufacturing method Pr of the present embodiment is performed as described above. Therefore, each of the above problems can be solved by the semiconductor manufacturing method Pr of the present embodiment.

<Modification 1 of Embodiment 1>
In the following, the configuration of this modification is also referred to as “configuration Ctm1”. Configuration In Ctm1, the wire W1 is composed of Cu (copper).

FIG. 4 is a diagram showing a configuration Ctm1 according to a modification 1 of the first embodiment of the present invention. FIG. 4A is a plan view of a part of the semiconductor device 100 according to the first modification. FIG. 4B is a cross-sectional view of a part of the semiconductor device 100 according to the first modification along the lines A1-A2 of FIG. 4A.

The configuration Ctm1 is different from the configuration Ct1 of FIG. 2 only in that the wire W1 is composed of Cu instead of Al. Since the other configurations of the configuration Ctm1 are the same as those of the configuration Ct1, the detailed description will not be repeated. In the following, the wire W1 composed of Cu is also referred to as “wire W1b”. The shape of the wire Wb in the configuration Ctm1 is the same as the shape of the wire W1 in the configuration Ct1.

In the configuration Ctm1, the above-mentioned semiconductor manufacturing method Pr is performed as in the first embodiment.

According to this modification, even if the wire W1 is made of Cu, the same effect as that of the first embodiment can be obtained.

<Modification 2 of Embodiment 1>
In the following, the configuration of this modification is also referred to as “configuration Ctm2”. Configuration In Ctm2, the wire W1 is composed of Au (gold).

FIG. 5 is a diagram showing a configuration Ctm2 according to a modification 2 of the first embodiment of the present invention. FIG. 5A is a plan view of a part of the semiconductor device 100 according to the second modification. FIG. 5B is a cross-sectional view of a part of the semiconductor device 100 according to the second modification along the lines A1-A2 of FIG. 5A.

The configuration Ctm2 differs from the configuration Ct1 of FIG. 2 only in that the wire W1 is composed of Au instead of Al. Since the other configurations of the configuration Ctm2 are the same as those of the configuration Ct1, the detailed description will not be repeated. In the following, the wire W1 composed of Au is also referred to as “wire W1c”. The shape of the wire W1c in the configuration Ctm2 is the same as the shape of the wire W1 in the configuration Ct1.

In the configuration Ctm2, the above-mentioned semiconductor manufacturing method Pr is performed as in the first embodiment.

According to this modification, even if the wire W1 is made of Au, the same effect as that of the first embodiment can be obtained.

It should be noted that, within the scope of the present invention, embodiments and modifications can be freely combined, and embodiments and modifications can be appropriately modified or omitted.

3,3n solder, 4,4A, 4B substrate, 100 semiconductor device, E1 electrode terminal, S1 semiconductor chip, W1, W1a, W1b wire.

Claims (4)

A method for manufacturing a semiconductor device including a wire surrounding a region to which the solder is to be supplied, in which electrode terminals are bonded to a substrate using paste-like solder.
(S1) A step of bonding the wire to the main surface by ultrasonic bonding while the region is surrounded by the wire among the main surfaces of the substrate.
(S2) The region includes a step of supplying the solder for joining the electrode terminals to the substrate.
The shape of the wire in the plan view, Ri closed loop der,
The cross-sectional shape of the wire is circular and
In the step (S1), the wire is joined to the main surface by applying ultrasonic vibration to the wire.
Manufacturing method of semiconductor devices. The method for manufacturing a semiconductor device according to claim 1, wherein the wire is made of Al. The method for manufacturing a semiconductor device according to claim 1, wherein the wire is made of Cu. The method for manufacturing a semiconductor device according to claim 1, wherein the wire is made of Au.

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