JP6972560B2 - Control device, machining system and control method - Google Patents

Description

The present invention relates to a control device, a control system and a control method for controlling the operation of an electric drill. In particular, the present invention relates to a control device, a control system, and a control method for controlling the operation of an electric drill for excavating a via stub formed on a multilayer wiring board.

In a general multilayer wiring board, in order to change the wiring layer of a signal, vias are formed to electrically connect different layers. When a through hole penetrating the substrate is formed when forming a via connecting the outermost layer and the inner layer of the multilayer wiring board, the through hole portion deviated from the signal transmission path functions as a stub (hereinafter referred to as a via stub). When the vias on the transmission line have via stubs, the impedance characteristics of the transmission line may deteriorate due to the influence of the via stubs even if the vias have impedance matching.

One of the methods for avoiding the deterioration of the impedance characteristic due to the via stub is the removal of the via stub by the back drill method. However, the general back drilling method has a problem that an extra via stub remains or the via is cut too much depending on the accuracy of the drilling process.

The wiring board of Patent Document 1 includes an inspection through hole for inspecting the processed state of the through hole. The inspection through hole is formed around the through hole and is electrically connected to the through hole. According to Patent Document 1, the removed state of the through hole can be determined by inspecting the energized state between the through hole having the back drill hole and the through hole for inspection.

Patent Document 2 discloses a method in which a stub portion of a via penetrating a multilayer circuit board can be appropriately removed by back drilling. In the method of Patent Document 2, when the via stub is drilled, a feedback signal is applied to the contact pad embedded in the circuit board adjacent to the via stub and electrically isolated from the via stub. Then, in the method of Patent Document 2, the holes formed by the drilling process for removing the insulating material adjacent to the via stub reach the contact pad, and when the feedback signal is received, the drilling is stopped to appropriately remove the via stub. can.

Japanese Unexamined Patent Publication No. 2008-218925 Special Table 2007-509487

By using the wiring board of Patent Document 1, it is possible to inspect the processed state of the through hole with respect to the through hole in which the back drill hole is drilled. However, the wiring board of Patent Document 1 has a problem that it becomes a defective product when the through hole is processed too much.

According to the method of Patent Document 2, since it is possible to prevent the via stub from being removed, the through hole is not over-processed. However, since the impedance of the via is mainly determined by the inductive component according to the length of the via and the capacitance component of the via stub, even if the via stub can be removed accurately by the method of Patent Document 2, the impedance of the via is high. It is not always optimal.

Further, the methods of Patent Documents 1 and 2 have a problem that they can be used only for a dedicated multilayer circuit board provided with a through hole for inspecting the processing accuracy of the back drill hole.

An object of the present invention is to solve the above-mentioned problems and to provide a control device for accurately processing a via stub so that the impedance of a via formed on a multilayer wiring board becomes an appropriate value.

The control device according to one aspect of the present invention is a control device that controls the operation of a drill for excavating a via formed on a multilayer wiring board, and is a step for applying the voltage to a wiring electrically connected to the via. A step waveform generation circuit that generates a waveform, a sampling circuit that samples the reflected wave of the step waveform applied to the wiring and outputs the reflected waveform of the step waveform, and a sampling circuit that outputs the reflected waveform of the sampling circuit as inputs, and the desired impedance. A comparator that compares the set voltage value corresponding to the value with the voltage value of the reflection waveform and transitions the first output value according to the comparison result between the voltage value of the reflection waveform and the set voltage value, and the step waveform and the first The output value of 1 is used as an input, the rising edge of the step waveform is used as a trigger, and the second output value is transitioned between the set predetermined timing and the falling timing of the step waveform, and synchronized with the sampling clock. The third output value is transitioned according to the first output value, the third output value that is transitioned according to the first output value is transitioned at the timing when the second output value is transitioned, and the multilayer wiring board is used. It is equipped with a control circuit that controls the movement of the drill in a direction substantially perpendicular to the main surface.

The control method according to one aspect of the present invention is a control method for controlling the operation of a drill for processing a via formed on a multilayer wiring board, and a step waveform is applied to a wiring electrically connected to the via. The reflected wave of the step waveform applied to the wiring is sampled to generate the reflected waveform of the step waveform, the set voltage value corresponding to the desired impedance value and the reflected waveform are compared, and the voltage value and the set voltage value of the reflected waveform are compared. The first output value is transitioned according to the comparison result with, and the second output value is transitioned between the set predetermined timing and the falling timing of the step waveform by using the rising edge of the step waveform as a trigger. Synchronized with a predetermined sampling clock, the third output value is transitioned according to the first output value, and the second output value is transitioned from the third output value that is transitioned according to the first output value. The transition is performed at the timing, and the drill is controlled to move in a direction substantially perpendicular to the main surface of the multilayer wiring board according to the transition of the third output value.

According to the present invention, it is possible to provide a control device for accurately processing a via stub so that the impedance of a via formed on a multilayer wiring board becomes an appropriate value.

It is a conceptual diagram which shows the structure of the processing system which concerns on 1st Embodiment of this invention. It is sectional drawing of a part of the substrate to be processed to be processed by the processing system which concerns on 1st Embodiment of this invention. It is a conceptual diagram which shows an example of processing a substrate to be processed by the processing system which concerns on 1st Embodiment of this invention. It is a conceptual diagram which shows the structure of the control device of the processing system which concerns on 1st Embodiment of this invention. It is sectional drawing of a part of the processing target substrate processed by the processing system which concerns on 1st Embodiment of this invention. It is a flowchart which shows an example of the procedure for setting the condition for processing a substrate to be processed by the processing system which concerns on 1st Embodiment of this invention. It is a conceptual diagram which shows an example of the user interface for setting the processing condition of the processing target substrate by the processing system which concerns on 1st Embodiment of this invention. It is a flowchart which shows the operation of the control device of the processing system which concerns on 1st Embodiment of this invention. It is a time chart of the waveform output from each circuit when the via stub is machined by the machining system which concerns on 1st Embodiment of this invention. It is a time chart of the waveform output from each circuit when the via stub is machined by the machining system which concerns on 1st Embodiment of this invention. It is a conceptual diagram which shows the structure of the control device of the processing system which concerns on 2nd Embodiment of this invention. This is an example of the reflected waveform of the step waveform acquired in the via position detection mode executed by the machining system according to the second embodiment of the present invention. This is an example of the reflected waveform of the step waveform acquired in the via position detection mode executed by the machining system according to the second embodiment of the present invention. It is a flowchart which shows an example of the procedure about the via position detection mode in the processing system which concerns on 2nd Embodiment of this invention. It is a block diagram which shows an example of the hardware composition of the control device which concerns on each embodiment of this invention.

Hereinafter, embodiments for carrying out the present invention will be described with reference to the drawings. However, although the embodiments described below have technically preferable limitations for carrying out the present invention, the scope of the invention is not limited to the following. In all the drawings used in the following embodiments, the same reference numerals are given to the same parts unless there is a specific reason. Further, in the following embodiments, repeated explanations may be omitted for similar configurations and operations. Further, the direction of the arrow in the drawing shows an example, and does not limit the direction of the signal between the blocks.

(First Embodiment)
(composition)
First, the configuration of the control system according to the first embodiment of the present invention will be described with reference to the drawings.

FIG. 1 is a conceptual diagram showing a configuration of a processing system 1 according to the present embodiment. As shown in FIG. 1, the machining system 1 of the present embodiment includes a control device 10, a probe 20, and a drill 30. The processing system 1 is a system for excavating a via stub included in a multilayer wiring board to be processed by a drill 30 by a back drill method.

FIG. 2 is a cross-sectional view of a part of the multilayer wiring board (hereinafter referred to as the machined object substrate 100) which is the machined object of the machined system 1 of FIG. The substrate 100 to be processed has a structure in which a plurality of insulating layers 101 and a plurality of wiring layers 102 are alternately laminated. The mode for excavating the via 105 of the substrate 100 to be processed is called a via excavation processing mode.

In the substrate 100 to be processed, a plating layer (hereinafter, through hole) is formed on the inner surface of the through hole penetrating the first main surface 100-1 (upper side) to the second main surface 100-2 (lower surface). There is. Through holes (hereinafter, vias 105) formed in the substrate 100 to be processed are formed.

The via 105 is electrically connected to the wiring 106 formed on the first main surface 100-1, and is also electrically connected to the wiring 107 which is one of the wiring layers 102 inside the substrate 100 to be processed. NS. That is, the wiring 106 formed on the first main surface 100-1 and the wiring layer 102 inside the processing target substrate 100 form one wiring.

Further, a portion of the via 105 that does not function as a signal line composed of the wiring 106 and the wiring 107 but functions as a stub is called a via stub 108. In FIG. 2, a part of the via 105 surrounded by the broken line corresponds to the via stub 108.

FIG. 3 is a conceptual diagram showing an example of setting a processing target substrate 100 in the processing system 1. Although FIG. 3 shows how the processing system 1 processes the processing target substrate 100 from below, the processing system 1 may be configured to process the processing target substrate 100 from above. Further, the processing system 1 processes the processing target substrate 100 whose main surface is arranged along the vertical direction, or processes the processing target substrate 100 whose main surface is arranged diagonally with respect to the vertical direction. May be good.

As shown in FIG. 3, when the via 105 of the substrate 100 to be machined is machined by the back drill method, the probe 20 is electrically connected to the wiring 106 arranged on the first main surface 100-1 of the board 100 to be machined. Make contact. Then, the processing system 1 excavates the via stub 108 of the via 105 to be processed by the drill 30 from the second main surface 100-2 side of the substrate 100 to be processed.

Here, the configuration of the machining system 1 will be described with reference to the drawings. In the following, the waveform output by each component shows the time change of the voltage value.

The control device 10 applies a step waveform to the wiring 106 via the probe 20, and samples the reflected waveform of the applied step waveform. The control device 10 compares the sampled reflection waveform with a preset characteristic impedance set value (hereinafter, Z ₀ set value). The control device 10 controls the drill 30 based on the magnitude relationship between the output of the sampled reflection waveform and the Z _{0 set value.} The Z ₀ setting value is a voltage value for setting a desired impedance value Z _0.

For example, when the output of the sampled reflection waveform _{is smaller than the Z 0} set value, the control device 10 controls the drill 30 so as to excavate the via stub 108 because there is room for improvement in the impedance caused by the via stub 108. .. For example, the control device 10 controls the drill 30 so as to stop the excavation process because the impedance caused by the via stub 108 is appropriate when the output of the sampled reflection waveform becomes the Z _{0 set value or more.}

The probe 20 is a terminal for contacting the wiring 106 electrically connected to the via 105 when processing the via stub 108 of the via 105 formed on the substrate 100 to be processed. Further, the probe 20 is a terminal for applying a step waveform to the wiring 106 of the substrate 100 to be processed, and is also a terminal for sampling the reflected waveform of the step waveform.

The drill 30 is an electric tool that is rotationally driven by a motor to excavate the substrate 100 to be machined. As the drill 30, a drill having a diameter suitable for removing the conductive portion of the via 105 to be excavated is used. The material of the drill 30 may be selected according to the hardness of the material of the substrate 100 to be processed and the via stub 108.

The rotation speed of the drill 30 is controlled by a rotation control means (not shown) in order to excavate the via stub 108 of the substrate 100 to be machined. The drill 30 is controlled to move from the second main surface to the first main surface of the machined substrate 100 along the z direction of FIG. 10 according to the control of the control device 10. The rotation speed of the drill 30 may also be controlled by the control device 10. That is, the drill 30 is arranged so as to be drilled in a direction substantially perpendicular to the main surface of the substrate 100 to be machined.

For example, when the output of the sampled reflection waveform _{is smaller than the Z 0} set value, the drill 30 is controlled by the control device 10 to excavate the via stub 108 because there is room for improvement in the impedance caused by the via stub 108. NS. For example, the drill 30 is controlled by the control device 10 so as to stop the excavation process because the impedance of the via 105 is appropriate when the output of the sampled reflection waveform becomes the Z _{0 set value or more.}

〔Control device〕
Next, the control device 10 of the present embodiment will be described with reference to the drawings. FIG. 4 is a conceptual diagram showing the configuration of the control device 10. As shown in FIG. 4, the control device 10 includes a step waveform generation circuit 11, a sampling circuit 12, a Z ₀ setting counter 13, a Z ₀ comparator 14, a timer 15, a flip-flop 16 (F / F: Flip-Flop), and a drill. A control circuit 17 is provided.

The step waveform generation circuit 11 is connected to the timer 15 and the probe 20.

The step waveform generation circuit 11 generates a step waveform. The step waveform generation circuit 11 applies the generated step waveform to the wiring 106 via the probe 20. Further, the step waveform generation circuit 11 outputs the step waveform to the timer 15. That is, the step waveform generation circuit 11 generates a step waveform to be applied to the wiring 106 electrically connected to the via 105.

The sampling circuit 12 is connected to the _{probe 20 and the Z 0 comparator 14.}

The sampling circuit 12 samples the reflected waveform when the step waveform is applied to the wiring 106. The sampling circuit 12 outputs the sampled reflection waveform to the Z ₀ comparator 14. That is, the sampling circuit 12 samples the reflected component of the step waveform applied to the wiring 106 and outputs the reflected waveform of the step waveform.

The Z ₀ setting counter 13 (also referred to as a counter) is connected to the _{Z 0 comparator 14.} The Z ₀ setting counter 13 is connected to an input means (not shown) for inputting a _{desired impedance value Z 0.}

The Z ₀ setting counter 13 is a logic circuit for setting _{a Z 0} setting value, which is a voltage value corresponding to a desired impedance value Z _0. A _{desired impedance value Z 0} is set in the _{Z 0} setting counter 13 by an input means (not shown). The Z _{0 setting counter 13 outputs a Z 0} set value (also referred to as a set voltage value), which is a voltage value corresponding to a desired impedance value Z _{0 , to the Z 0} comparator 14. That is, the Z ₀ setting counter 13 outputs the _{Z 0} setting value corresponding to the desired impedance value Z _0. The Z ₀ setting counter 13 may be omitted, and the Z _{0 setting value corresponding to the desired impedance value Z 0} may be input to the Z _{0 comparator 14.}

The Z ₀ comparator 14 (also referred to as a comparator) is connected to the sampling circuit 12, the Z ₀ setting counter 13, and the flip-flop 16.

The Z ₀ comparator 14 inputs the reflected waveform sampled by the sampling circuit 12 _{and the Z 0 set value set in the Z 0} setting counter 13, and compares the sampled reflection waveform with the Z _{0 set value.} .. The Z ₀ comparator 14 outputs the comparison result between the sampled reflection waveform and the Z ₀ set value to the flip-flop 16. For example, the Z ₀ comparator 14 transitions the output value at the timing when the voltage value of the sampled reflection waveform _{exceeds or falls below the Z 0 set value.} That is, the Z ₀ comparator 14 transitions the output value according to the comparison result of comparing the voltage value of the reflected waveform and the Z _{0 set value.} The output value of the Z ₀ comparator 14 is also referred to as a first output value.

The timer 15 is connected to the step waveform generation circuit 11 and the flip-flop 16.

A timer set value is set in the timer 15, and the step waveform is input from the step waveform generation circuit 11. The timing at which the reflection component from the via 105 appears in the reflection waveform is set in the timer 15 as a timer set value (also referred to as a predetermined timing).

The timer 15 starts counting with the rising edge when the step waveform transitions from "Low" to "High" as a trigger, and the voltage value logically corresponding to "High" at the timing when the time corresponding to the timer set value has elapsed. (Hereinafter, "High") is output. Then, the timer 15 outputs a voltage value (hereinafter, “Low”) logically corresponding to “Low” triggered by a fall when the step waveform transitions from “High” to “Low”.

That is, the timer 15 uses the rising edge of the step waveform as a trigger to transition the output value between the timing at which the reflected component from the via 105 appears in the reflected waveform and the timing at which the reflected component from the step waveform falls. The output value of the timer 15 is also called a second output value. Hereinafter, with respect to the output of each component, the state in which the voltage value is “Low” is also referred to as a first state, and the state in which the voltage value is “High” is also referred to as a second state.

The flip-flop 16 is connected to a clock generation circuit (not shown), a Z ₀ comparator 14 and a drill control circuit 17.

The flip-flop 16 inputs a sampling clock (hereinafter, sampling CLK: Clock) from a clock generation circuit (not shown), and inputs _{the output of the Z 0} comparator 14 and the output of the timer 15. The output of the flip-flop 16 is output to the drill control circuit 17. The sampling CLK may be configured to be generated from a clock generation circuit (not shown) or may be configured to be acquired from the outside.

The flip-flop 16 reads the output value of the _{Z 0} comparator 14 in synchronization with the sampling CLK. _{The flip-flop 16 holds the output value of the Z 0} comparator 14 when the output of the timer 15 is “High”, and resets the output value of the _{Z 0} comparator 14 when the output of the timer 15 is “Low”. .. That is, the flip-flop 16 _{reads the comparison result by the Z 0} comparator 14 in synchronization with the sampling clock, and holds or resets the output value of the _{Z 0} comparator 14 according to the count of the timer 15. The output value of the flip-flop 16 is also referred to as a third output value.

The drill control circuit 17 controls to move the drill 30 so as to excavate the via stub 108 by a predetermined amount based on the output value of the flip-flop 16.

The drill control circuit 17 controls to move the drill 30 in the + Z direction in order to excavate the substrate 100 to be machined by a predetermined amount at the timing when the output of the flip-flop switches from “Low” to “High”. Further, the drill control circuit 17 controls to move the drill 30 in the −Z direction in order to remove the drill 30 from the inside of the substrate 100 to be machined when the drilling of the via stub 108 is completed. When the excavation of the via stub 108 is completed, it is not necessary to remove the drill 30 from the inside of the substrate 100 to be processed if it is not necessary. That is, the drill control circuit 17 controls to move the drill 30 in a direction substantially perpendicular to the main surface of the substrate 100 to be machined according to the transition of the output value of the flip-flop 16. The substantially vertical direction is a direction along the penetrating direction of the via 105 formed on the substrate 100 to be processed.

The timer 15, the flip-flop 16, and the drill control circuit 17 surrounded by the broken line in FIG. 4 form a control circuit. The control circuit takes the step waveform as an input, and uses the rising edge of the step waveform as a trigger to transition the second output value between the set predetermined timing and the falling timing of the step waveform. Further, the control circuit takes the first output value as an input and synchronizes with the sampling clock to make a transition of the third output value according to the first output value. Then, the control circuit shifts the third output value that has transitioned according to the first output value at the timing at which the second output value transitions, with respect to the main surface of the machined substrate 100 (multilayer wiring board). It controls the movement of the drill 30 in a substantially vertical direction.

The above is the description of the configuration of the control device 10.

FIG. 5 is a cross-sectional view of a part of the processing target substrate 100 processed by the processing system 1. As shown in FIG. 5, the processing system 1 does not completely remove the via stub 108, but processes the processing target substrate 100 so that a part of the via stub (via stub 109) remains. In FIG. 2, the portion of the via 105 surrounded by the broken line is the via stub 109 remaining after the excavation process. That is, the processing system 1 of the present embodiment does not excavate and remove all of the via stub 108, but leaves the via stub 109 to such an extent that the impedance becomes an appropriate value. If it is possible to obtain an appropriate value impedance when the via stub 109 does not remain, the via stub 109 does not necessarily have to remain.

(motion)
[Preparation]
Next, the procedure for setting the excavation conditions of the drill 30 will be described with reference to the drawings. FIG. 6 is a flowchart showing a procedure for setting the excavation conditions of the drill 30.

In FIG. 6, first, a drill is set at the position of the via 105 to be excavated (step S11). For example, a two-dimensional coordinate system (hereinafter referred to as xy coordinate system) may be set on the main surface of the substrate 100 to be processed, and the position of the via 105 to be processed may be set by the position coordinates on the xy coordinate system.

Next, a _{desired impedance value is set in the Z 0} setting counter 13 (step S12). For example, a _{desired impedance value is set in the Z 0} setting counter 13 by an input device (not shown). At this time, the Z ₀ setting counter 13 calculates the voltage value corresponding to the desired impedance value as the Z ₀ setting value.

Then, the timer set value corresponding to the position of the via 105 to be machined is set in the timer 15 (step S13).

For example, the above settings in steps S11 to S13 can be input using the user interface 110 as shown in FIG. 7. The user interface 110 is screen information presented to the user when inputting the excavation conditions of the drill 30, and can be displayed on any display device.

FIG. 7 is an example of displaying the user interface 110 on the screen of a personal computer (hereinafter, PC: Personal Computer). The user interface 110 inputs a first input unit 111 for inputting a via stub position (x, y) to be excavated, a second input unit 112 for inputting a desired impedance, and a timer set value. A third input unit 113 for the purpose is included.

That is, the first input unit is an input unit for inputting the position of the via 105 to be processed in the plane coordinate system set on the main surface of the processing target substrate 100. The second input unit is an input unit _{for setting a desired impedance value Z 0} in the Z ₀ setting counter 13. The third input unit is an input unit for inputting the timer set value to the timer 15.

Further, the user interface 110 is illustrated with a pointer 115 for activating each input unit. The user moves the pointer 115 onto a desired input unit using an input means such as a mouse to activate each input unit, and inputs a desired numerical value using a keyboard or the like.

In FIG. 7, the numerical value AA as the x-coordinate and the numerical value BB as the y-coordinate are input to the first input unit 111, CC is input to the second input unit 112 as the desired impedance, and DD is input as the timer setting value. An example of inputting to the input unit 113 of 3 is shown. The user interface 110 of FIG. 7 is an example, and various setting values set in the control device 10 are not limited to those mentioned here.

[Drill control: outline]
Here, the outline of the drill control by the control device 10 will be described with reference to the drawings. FIG. 8 is a flowchart for explaining the drill control of the control device 10. Prior to the process according to the flowchart of FIG. 8, the probe 20 is in contact with the wiring 106, and the drill 30 is placed at the position of the via 105 to be machined.

In FIG. 8, first, the control device 10 applies a step waveform to the wiring 106 including the via 105 via the probe 20 (step S21).

Next, the control device 10 samples the reflected waveform of the step waveform applied to the wiring 106 (step S22).

Next, the control device 10 compares the output of the sampled reflection waveform with the Z ₀ set value (step S23).

When the output of the sampled reflection waveform _{is smaller than the Z 0} set value (Yes in step S23), the control device 10 controls the drill 30 to move by a predetermined amount in the + Z direction (step S24). After step S24, the process returns to step S21. The predetermined amount when moving the drill 30 is a value set in advance according to the machining accuracy of the via 105 and the like.

On the other hand, when the output of the sampled reflection waveform _{is larger than the Z 0} set value (No in step S23), the process according to the flowchart of FIG. 8 is terminated.

The above is a description of the outline of the drill control by the control device 10.

[Drill control: Details]
Next, the details of the operation of the control device 10 will be described with reference to the time charts of FIGS. 9 and 10. The waveforms shown in FIGS. 9 and 10 are associated with each other as follows.
(1): Step waveform output (output of step waveform generation circuit 11)
(2): Z ₀ setting counter output (output of Z ₀ setting counter 13)
(3): Sampling circuit output (output of sampling circuit 12)
(4): Z ₀ comparator output ( _{comparison result between Z 0} setting counter output and sampling circuit output)
(5): Timer output (output of timer 15)
(6): Sampling CLK
(7): F / F output (output of flip-flop 16)
FIG. 9 is a time chart in the pre-stage or intermediate stage of excavation of the via 105.

First, at time t ₁ , the step waveform generation circuit 11 applies the step waveform (1) to the wiring 106 via the probe 20. When the step waveform (1) is applied to the wiring 106, a reflection waveform corresponding to the impedance of each part of the wiring 106 is generated. The sampling circuit 12 samples the reflected waveform of the step waveform (1) applied by the step waveform generation circuit 11.

The Z ₀ comparator 14 has _{a Z 0} setting counter output (2), which is a voltage value corresponding to an impedance value preset _{in the Z 0} setting counter 13, and a sampling circuit, which is a reflection waveform sampled by the sampling circuit 12. The output (3) and is input. The Z ₀ comparator 14 compares _{the Z 0 setting counter output (2) of the Z 0} setting counter 13 with the sampling circuit output (3) of the sampling circuit 12, and is a comparison result of the Z ₀ comparator output (4). Is output.

When the sampling circuit output (3) is _{smaller than the Z 0} setting counter output (2), the Z ₀ comparator 14 _{outputs 0 (hereinafter, “Low”) as the Z 0} comparator output (4) to the flip-flop 16. do. In FIG. 9, the Z ₀ comparator 14 outputs “Low” to the flip-flop 16 between the time t ₂ and the time t ₃ and after the time t _4.

On the other hand, when the sampling circuit output (3) is _{larger than the Z 0} setting counter output (2), the Z ₀ comparator 14 has a voltage value (High) that logically corresponds to "High" as _{the Z 0 comparator output (4).} Hereinafter, “High”) is output to the flip-flop 16. In FIG. 9, the Z ₀ comparator 14 outputs “High” to the flip-flop 16 _{before time t 2} and between time t ₃ and time t _4.

The timer 15 starts counting with the Rise edge (time t ₁ ) of the step waveform output (1) as a trigger. The timer 15 outputs “High” as the timer output (5) to the flip-flop 16 at the timing (time t ₃ ) when the timer set value (time t _{3 −} t _{1) has elapsed since the start of counting.}

_{The flip-flop 16 reads the Z 0} comparator output (4) in synchronization with the sampling CLK (6). _{The flip-flop 16 holds the Z 0} comparator output (4) when the timer output (5) is “High”. _{On the other hand, the flip-flop 16 resets the Z 0} comparator output (4) when the timer output (5) is “Low”.

When there is a via stub 108, the Z ₀ comparator output (4) becomes “High” and the timer output (5) becomes “High”. At this time, the F / F output (7) becomes a voltage value corresponding to “High”. Then, when the timer output (5) becomes “Low”, the F / F output (7) becomes “Low”.

At time t ₅ , when the step waveform output (1) transitions to “Low”, the timer output (5) transitions to “Low”, and the F / F output (7) also transitions to “Low”. At this time, the drill control circuit 17 + Z the drill 30 in order to excavate a predetermined amount of the via stub 108 _{at the Fall edge (time t 5} ) at which the F / F output (7) has transitioned from “High” to “Low”. Control to move in the direction.

FIG. 10 is a time chart at the stage where the impedance of the via 105 is optimized.

Since the impedance is improved by drilling the drill 30, _{the voltage value of the sampling circuit output (3) is larger than that of the Z 0} setting counter output (2). Therefore, the Z ₀ comparator output (4) outputs "Low" to the F / F 16 even at the position of the via stub 108 (between time t ₃ and time t _4). The drill control circuit 17 does not change the drill position when the output of the F / F 16 is “Low”.

The above is a description of the details of the operation of the control device 10.

The time charts of FIGS. 9 and 10 can also be expressed as follows.

The output values of the Z ₀ comparator 14, the timer 15, and the flip-flop 16 are set to either a first state (“Low”) or a second state (“High”). For example, the first state is set to a relatively low voltage value and the second state is set to a relatively high voltage value.

The Z ₀ comparator 14 sets the second state as the initial state, and shifts the output value from the second state to the first state at the timing _{when the voltage value of the reflected waveform exceeds the Z 0 set value.} Further, the Z ₀ comparator 14 shifts the output value from the first state to the second state at the timing when the voltage value of the reflected waveform _{falls below the Z 0 setting.}

The timer 15 sets the first state as the initial state, and uses the rising edge of the step waveform as a trigger to shift the output value from the first state to the second state at the timing when the reflection component from the via 105 appears in the reflection waveform. Further, the timer 15 shifts the output value from the first state to the second state at the timing of the falling edge of the step waveform.

The flip-flop 16 sets the first state as the initial state, synchronizes with the sampling clock, and shifts the output value to the second state when the output value of the _{Z 0 comparator 14 is the second state.} The flip-flop 16 shifts the output value to the first state at the timing when the output value of the timer 15 transitions from the second state to the first state.

The drill control circuit 17 controls the drill 30 at the timing when the output value of the flip-flop 16 transitions from the second state to the first state.

Further, the control method by the above control device 10 is a control method for controlling a drill for processing a via formed on a multilayer wiring board, and can be paraphrased as follows.

That is, in the control method of the present embodiment, the step waveform is applied to the wiring 106 electrically connected to the via 105, and the reflected wave of the step waveform applied to the wiring 106 is sampled to generate the reflected waveform of the step waveform. do. _{Next, the Z 0} set value corresponding to the desired impedance value is compared with the reflected waveform, and the output value of the _{Z 0} comparator 14 (first) according to the comparison result between the voltage value of the reflected waveform and the Z _{0 set value.} (Output value of) is changed. Next, using the rising edge of the step waveform as a trigger, the output value (second output value) of the timer 15 is changed between the set predetermined timing and the falling timing of the step waveform. Next, in synchronization with a predetermined sampling clock, the output value (third output value) of the flip-flop 16 is changed according to the first output value, and the third output value is changed according to the first output value. The output value is changed at the timing when the second output value is changed. Then, according to the transition of the third output value, the drill 30 is controlled to move in a direction substantially perpendicular to the main surface of the substrate 100 to be machined.

(effect)
As described above, in the present embodiment, the step waveform is applied to the signal transmission line having the through hole for which the via stub is to be removed, and the impedance value is calculated from the reflected waveform of the applied step waveform. Then, in the present embodiment, the result of comparing the voltage value corresponding to the desired impedance value and the impedance value calculated by the system is fed back to the drill position. Therefore, according to the present embodiment, in the multilayer wiring board, the impedance of the via that changes the signal wiring layer to another wiring layer can be processed to be the optimum value.

That is, according to the present embodiment, since the excavation is performed while the step waveform is applied to the via stub to be excavated and the impedance observation is performed, the impedance of the via can be optimized.

The impedance of the via is a value obtained by adding the inductive component corresponding to the length of the via and the capacitive component of the via stub. Therefore, if the capacitance component of the via stub is larger than the induction component of the via, the impedance will decrease. Generally, a back drill method or the like is used to remove the via stub to prevent impedance reduction. However, depending on the inductive component of the via stub, the impedance may be rather increased by excavating the via stub. Therefore, in the present embodiment, it is possible to prevent an increase in impedance due to excessive excavation of the via stub by leaving the via stub so that the impedance is optimized, instead of removing all the via stub.

(Second embodiment)
Next, the processing system according to the second embodiment of the present invention will be described with reference to the drawings. The present embodiment is different from the first embodiment in that the reflection component of the via in the reflection waveform of the step waveform is specified and the timer set value is determined. In the following description, the same configurations as those of the first embodiment are designated by the same reference numerals as those of the first embodiment.

FIG. 11 is a conceptual diagram of the control device 10-2 included in the processing system according to the present embodiment. As shown in FIG. 11, the control device 10-2 includes a step waveform generation circuit 11, a sampling circuit 12, a Z ₀ setting counter 13, a Z ₀ comparator 14, a timer 15, and a flip-flop 16 (F / F: Flip-Flop). , A drill control circuit 17, and a via position detection circuit 18. Since the configuration other than the via position detection circuit 18 is the same as that of the control device 10 of the first embodiment, detailed description thereof will be omitted. The configuration of FIG. 11 is an example, and the arrangement location, connection relationship, and input / output relationship of each component can be arbitrarily set.

The via position detection circuit 18 (also referred to as a detection circuit) is _{connected to the Z 0} comparator 14 and the timer 15. Further, sampling CLK is input to the via position detection circuit 18. The sampling CLK input to the via position detection circuit 18 may be shared with the flip-flop 16 or may be used as a clock dedicated to the via position detection circuit 18.

The via position detection circuit 18 acquires an output value output from the _{Z 0 comparator 14 based on a comparison result comparing the Z 0} set value corresponding to a plurality of impedance values and the voltage value of the reflection waveform. The via position detection circuit 18 holds the acquired output value for each of a plurality of sampling timings set based on the sampling clock. The via position detection circuit 18 compares the output values held at each of a plurality of sampling timings before and after excavating the via 105 by a predetermined amount, and detects the timing when the reflection component of the via 105 is included in the reflection waveform. Then, the via position detection circuit 18 sets a predetermined timing based on the detected timing, and outputs the set predetermined timing to the timer 15.

In contrast to the via excavation processing mode described in the first embodiment, the mode in which the reflection component of the via in the reflection waveform of the step waveform is detected by the via position detection circuit 18 is referred to as a via position detection mode. In the following, the function of each configuration in the via position detection mode will be described.

The step waveform generation circuit 11 applies a step waveform to the wiring 106 electrically connected to the via 105 via the probe 20 in a state where the probe 20 is in contact with the wiring 106.

The sampling circuit 12 samples the reflected waveform of the step waveform applied to the wiring 106.

Here, the reflection waveform of the step waveform obtained in the via position detection mode is shown. 12 and 13 are examples of reflection waveforms of step waveforms used in the via position detection mode. FIG. 12 is an example of the reflection waveform obtained in the first stage of the via position detection mode. FIG. 13 is an example of the reflection waveform obtained in the second stage of the via position detection mode.

In the via position detection mode, the reflection waveform of the step waveform is acquired in at least two stages, the first stage and the second stage. After obtaining the reflected waveform in the first step, the via 105 to be machined is excavated, and further, the reflected waveform is obtained in the second step. Then, the reflection waveform of the first stage and the reflection waveform of the second stage are compared, and the changed portion is detected as the reflection component by the via 105.

The Z ₀ setting counter 13 outputs a voltage value corresponding to a desired preset impedance value S _{set to the Z 0} comparator 14. _{The voltage value corresponding to the desired impedance value S set} used in the via position detection mode may be the same as or different from the _{Z 0} set value used in the via drilling processing mode.

The Z ₀ comparator 14 _{changes the Z 0} set value _{stepwise from S 0} to S _set , and compares the sampled reflection waveform with the Z _{0 set value.} Then, the Z ₀ comparator 14 outputs the comparison result to the via position detection circuit 18. That is, the Z ₀ comparator 14 is an output value based on a comparison result _{between a plurality of Z 0} set values and a reflection waveform whose upper limit is a voltage value corresponding to a desired impedance value S _{set output by the Z 0 setting counter 13.} Is output to the via position detection circuit 18.

The via position detection circuit 18 is _{set between T 0} and T _end based on the sampling CLK with respect to the comparison result between the _{Z 0} setting value gradually changed _{from S 0} to S set and the reflection waveform. The voltage value is calculated for each sampling timing.

When the via position detection circuit 18 does not hold the voltage value yet, the via position detection circuit 18 holds the voltage value calculated for each sampling timing. Then, the drill control circuit 17 controls to move the drill 30 in the + Z direction in order to excavate the substrate 100 to be machined by a predetermined amount.

The amount of the drill control circuit 17 drilling the via 105 to be machined in the via position detection mode may be smaller than that in the via drilling mode. This is because if the via 105 is excavated too much in the via position detection mode, there is no portion to be excavated in the via excavation processing mode, and the via 105 cannot be optimized.

On the other hand, when the via position detection circuit 18 already holds the voltage value corresponding to the desired impedance, the held voltage value and the calculated voltage value are compared for each sampling timing.

The via position detection circuit 18 outputs the sampling timing Tn, which has a large change in voltage value, to the timer 15 as a timer set value. The timer setting value that is actually set is set in the time zone including Tn.

That is, when the via position detection circuit 18 _{does not hold the output value of the Z 0} comparator 14, the via position detection circuit 18 holds the output value of the Z ₀ comparator 14 at each of a plurality of sampling timings. Then, the via position detection circuit 18 outputs an instruction to the drill control circuit 17 to control the via 105 to be drilled by moving the drill 30 in the direction of the substrate 100 to be machined by a predetermined amount. On the other hand, via the position detection circuit 18, when holding the output values of the Z ₀ comparator 14 compares the output value of Z ₀ comparator 14 before and after which a via 105 drilling process by a predetermined amount, Z ₀ The timing at which the output value of the comparator 14 changes is detected. Then, the via position detection circuit 18 sets a predetermined timing based on the detected timing.

[Via position detection mode]
Next, the via position detection mode in the machining system will be described in the present embodiment with reference to the drawings. FIG. 14 is a flowchart regarding the via position detection mode. In the following description, the control device 10-2 will be mainly described.

First, as a preparatory step, the drill 30 is set at the position of the via stub 108 to be excavated, and the desired impedance value S _set is set in the Z ₀ setting counter 13. In the present embodiment, the timer set value is not set in advance, but the timer set value is set by the via position detection circuit 18.

In FIG. 14, with the probe 20 in contact with the wiring 106, first, the control device 10-2 applies a step waveform to the wiring 106 electrically connected to the via 105 via the probe 20 (step S31). ..

The control device 10-2 samples the reflected waveform of the step waveform applied to the wiring 106 (step S32).

The control device 10-2 _{changes the Z 0} set value stepwise according to the impedance value _{from S 0} to S _set , and compares the sampled reflection waveform with the Z ₀ set value (step S33). ..

The control device 10-2 holds the _value of the comparison result from S 0 to S _{set between T 0} and T _end at each sampling timing set based on the sampling CLK (step S34).

If the value is not yet held at the stage of step S35 (No in step S35), the control device 10-2 moves the drill 30 by a predetermined amount in the + Z direction in order to excavate the via 105 by a predetermined amount. Control is performed (step S36). After step S36, the process returns to step S31.

On the other hand, when the value is already held (Yes in step S35), the control device 10-2 compares the value before and after the excavation of the via 105 for each sampling timing (step S37).

The control device 10-2 sets the sampling timing at which the value is changing as the timing setting value (step S38).

The above is the description of the via position detection mode. The excavation process for optimizing the impedance of the via 105 is performed in the same via excavation process mode as in the first embodiment. Since the via excavation processing mode of this embodiment is the same as that of the first embodiment, detailed description thereof will be omitted.

As described above, according to the present embodiment, the timer set value can be set by detecting the reflection component of the via in the reflection waveform of the step waveform.

(hardware)
Here, the hardware configuration for realizing the control system of the control device according to each embodiment of the present invention will be described by taking the computer 90 of FIG. 15 as an example. The computer 90 in FIG. 15 is a configuration example for realizing the control device of each embodiment, and does not limit the scope of the present invention.

As shown in FIG. 15, the computer 90 includes a processor 91, a main storage device 92, an auxiliary storage device 93, an input / output interface 95, and a communication interface 96. In FIG. 15, the interface is abbreviated as I / F (Interface). The processor 91, the main storage device 92, the auxiliary storage device 93, the input / output interface 95, and the communication interface 96 are connected to each other via a bus 99 so as to be capable of data communication. Further, the processor 91, the main storage device 92, the auxiliary storage device 93, and the input / output interface 95 are connected to a network such as the Internet or an intranet via the communication interface 96.

The processor 91 expands the program stored in the auxiliary storage device 93 or the like to the main storage device 92, and executes the expanded program. In the present embodiment, the software program installed in the computer 90 may be used. The processor 91 executes arithmetic processing and control processing executed by the control device according to the present embodiment.

The main storage device 92 has an area in which the program is developed. The main storage device 92 may be a volatile memory such as a DRAM (Dynamic Random Access Memory). Further, a non-volatile memory such as an MRAM (Magnetoresistive Random Access Memory) may be configured and added as the main storage device 92.

The auxiliary storage device 93 is a means for storing various data. The auxiliary storage device 93 is composed of a local disk such as a hard disk or a flash memory. It is also possible to store various data in the main storage device 92 and omit the auxiliary storage device 93.

The input / output interface 95 is a device for connecting the computer 90 and the peripheral device based on the connection standard between the computer 90 and the peripheral device. The communication interface 96 is an interface for connecting to a network such as the Internet or an intranet based on a standard or a specification. The input / output interface 95 and the communication interface 96 may be shared as an interface for connecting to an external device.

The computer 90 may be configured so that an input device such as a keyboard, a mouse, or a touch panel can be connected to the computer 90, if necessary. These input devices are used to input information and settings. When the touch panel is used as an input device, the display screen of the display device may also serve as the interface of the input device. Data communication between the processor 91 and the input device may be mediated by the input / output interface 95.

The communication interface 96 is connected to an external system, device, or unmanned aerial vehicle through a network.

Further, the computer 90 may be equipped with a display device for displaying information. When a display device is provided, it is preferable that the computer 90 is provided with a display control device (not shown) for controlling the display of the display device. The display device may be connected to the computer 90 via the input / output interface 95. For example, the user interface 110 shown in FIG. 7 may be displayed on a display device connected to the computer 90.

Further, the computer 90 may be equipped with a reader / writer, if necessary. The reader / writer is connected to the bus 99. The reader / writer mediates between the processor 91 and a recording medium (program recording medium) (not shown), reading a data program from the recording medium, writing the processing result of the computer 90 to the recording medium, and the like. The recording medium can be realized by, for example, a semiconductor recording medium such as an SD (Secure Digital) card or a USB (Universal Serial Bus) memory. Further, the recording medium may be realized by a magnetic recording medium such as a flexible disk, an optical recording medium such as a CD (Compact Disc) or a DVD (Digital Versatile Disc), or another recording medium.

The above is an example of the hardware configuration for enabling the control device according to the embodiment of the present invention. The hardware configuration of FIG. 15 is an example of the hardware configuration for enabling the control device according to the present embodiment, and does not limit the scope of the present invention. Further, a program for causing a computer to execute a process related to the control device according to the present embodiment is also included in the scope of the present invention. Further, a program recording medium on which a program according to an embodiment of the present invention is recorded is also included in the scope of the present invention.

Although the present invention has been described above with reference to the embodiments, the present invention is not limited to the above embodiments. Various modifications that can be understood by those skilled in the art can be made to the structure and details of the present invention within the scope of the present invention.

1 Machining system 10 Control device 11 Step waveform generation circuit 12 Sampling circuit 13 Z ₀ Setting counter 14 Z ₀ Comparer 15 Timer 16 Flip-flop 17 Drill control circuit 18 Via position detection circuit 20 Probe 30 Drill 100 Insulation layer 102 Wiring layer 105 Via 106, 107 Wiring 108, 109 Via stub 110 User interface 111 First input unit 112 Second input unit 113 Third input unit 115 Pointer

Claims (10)

A control device that controls the operation of a drill that excavates vias formed on a multilayer wiring board.
A step waveform generation circuit that generates a step waveform to be applied to the wiring electrically connected to the via,
A sampling circuit that samples the reflected wave of the step waveform applied to the wiring and outputs the reflected waveform of the step waveform.
The reflected waveform output by the sampling circuit is used as an input, and in the reflected wave of the step waveform, the set value corresponding to the reflected wave from the via when the via has a preset characteristic impedance and the reflected waveform are set. A comparison device that makes a comparison and transitions the first output value according to the comparison result between the set value of the characteristic impedance and the voltage value of the reflected waveform.
The step waveform and the first output value are input, and the second output value is changed between the timing when the timer set value has elapsed from the rise of the step waveform and the fall timing of the step waveform. , The third output value is transitioned according to the first output value in synchronization with the sampling clock, and the third output value transitioned according to the first output value is the second output value. A control device including a control circuit for controlling the movement of the drill in a direction substantially perpendicular to the main surface of the multilayer wiring board according to the transition of the third output value. The control circuit is
A timer that takes the step waveform as an input and transitions the second output value at the timing when the time of the timer set value elapses from the rise of the step waveform and the timing of the fall of the step waveform.
The first output value, the second output value, and the sampling clock are used as inputs, and the third output value is changed according to the first output value in synchronization with the sampling clock. A flip-flop that transitions the third output value that has transitioned according to the output value of 1 at the timing at which the second output value transitions, and
The control device according to claim 1, further comprising a drill control circuit for controlling the movement of the drill in a direction substantially perpendicular to the main surface of the multilayer wiring board according to the transition of the third output value. Desired impedance set value is set, the control device according to claim 2 including a counter for output to the comparator the set voltage value corresponding to the set value of the desired impedance is set. The first output value and the third output value are set to either a first state or a second state, and the first output value and the third output value are set to either a first state or a second state.
The comparator is
The second state is set as the initial state, and the first output value is transitioned from the second state to the first state at the timing when the voltage value of the reflected waveform exceeds the set voltage value, and the reflected waveform. The first output value is changed from the first state to the second state at the timing when the voltage value of the above is lower than the set voltage value.
The timer
The first state is set as the initial state, and the rise of the step waveform is used as a trigger to output the second output from the first state to the second state at the timing when the reflection component from the via appears in the reflection waveform. The value is changed, and the second output value is changed from the first state to the second state at the timing of the fall of the step waveform.
The flip-flop is
The first state is set as the initial state, and when the first output value is the second state, the output value is changed to the second state in synchronization with the sampling clock, and the second output is output. The third output value is transitioned to the first state at the timing when the value transitions from the second state to the first state.
The drill control circuit
The control device according to claim 3, wherein the drill is controlled at a timing when the first output value transitions from the second state to the first state. A first input unit for setting the position of the via to be machined in the plane coordinate system set on the main surface of the multilayer wiring board, and
A second input unit for setting the desired impedance setting value in the counter, and
The control device according to claim 3 or 4, further comprising a user interface including a third input unit for setting a timer setting value corresponding to the position of the via to be machined to the timer. The output value output from the comparator is sampled based on the comparison result of comparing the set voltage value corresponding to a plurality of impedance values with the voltage value of the reflection waveform connected to the comparator and the timer. It is held for each of a plurality of sampling timings set based on the clock, and the output values held for each of the plurality of sampling timings before and after excavating the via by a predetermined amount are compared, and the reflection of the via is reflected in the reflection waveform. One of claims 3 to 5, further comprising a detection circuit that detects a timing containing a component, sets the timer set value based on the detected timing, and outputs the set timer set value to the timer. The control device described in. The comparator is
An output value based on a comparison result between the plurality of set voltage values and the reflected waveform up to the voltage value corresponding to the desired impedance set value set in the counter is output to the detection circuit.
The detection circuit is
When the output value of the comparator is not held, the output value of the comparator is held at each of a plurality of sampling timings, and the drill is moved by a predetermined amount toward the multilayer wiring board to excavate the via. An instruction to control the machining is output to the drill control circuit, and the instruction is output to the drill control circuit.
When the output value of the comparator is held, the output value of the comparator before and after excavating the via by a predetermined amount is compared for each sampling timing, and the timing at which the output value of the comparator changes. The control device according to claim 6, wherein the timer setting value is set based on the detected timing. The control device according to any one of claims 2 to 7.
A drill arranged to be drilled in a direction substantially perpendicular to the main surface of the multilayer wiring board and controlled to move by the drill control circuit.
A processing system including the step waveform generation circuit and a probe electrically connected to the sampling circuit. It is a control method that controls the operation of a drill that processes vias formed on a multilayer wiring board.
A step waveform is applied to the wiring electrically connected to the via,
The reflected wave of the step waveform applied to the wiring is sampled to generate the reflected waveform of the step waveform.
In the reflected wave of the step waveform, the set value corresponding to the reflected wave from the via when the via has a preset characteristic impedance is compared with the reflected waveform.
The first output value is changed according to the comparison result between the set value of the characteristic impedance and the voltage value of the reflected waveform.
The second output value is transitioned between the timing when the timer set value has elapsed from the rise of the step waveform and the timing of the fall of the step waveform.
Synchronized with a predetermined sampling clock, the third output value is changed according to the first output value.
The third output value that has transitioned according to the first output value is transitioned at the timing at which the second output value transitions.
A control method for controlling the movement of the drill in a direction substantially perpendicular to the main surface of the multilayer wiring board according to the transition of the third output value. The first output value based on the comparison result of comparing the set voltage value corresponding to the plurality of impedance values and the voltage value of the reflected waveform is held for each of the plurality of sampling timings set based on the sampling clock. ,
Before and after excavating the via by a predetermined amount, the first output values held at each of the plurality of sampling timings are compared.
The control method according to claim 9, wherein the timing at which the reflection component of the via is included in the reflection waveform is detected, and the timer set value is set based on the detected timing.

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