JP7056532B2 - Method for manufacturing p-type III nitride semiconductor - Google Patents

Description

The present invention relates to a method for producing a p-type III nitride semiconductor. In particular, those having an ion implantation step.

In the fabrication of semiconductor devices made of group III nitride semiconductors, a method is known in which Mg is ionically injected into a group III nitride semiconductor layer and then heat-treated to form a p-type region in the group III nitride semiconductor layer. ing.

In Patent Documents 1 and 2, a through film made of a group III nitride semiconductor is formed on a group III nitride semiconductor layer, and the through film is allowed to pass through to ionize Mg (magnesium) in the group III nitride semiconductor layer. It is stated to inject. It is described that the reason for forming the through film is to adjust the injection amount of Mg and to suppress the entry of impurities such as O (oxygen) and Si (silicon). Further, Patent Documents 1 and 2 describe that a photoresist is used as a mask formed on a through film.

JP-A-2017-54944 Japanese Unexamined Patent Publication No. 2018-56257

The inventors considered that ion implantation into a group III nitride semiconductor at a high temperature of 500 ° C. or higher facilitates activation of the implanted Mg.

However, if a high temperature resistant photoresist is used as an ion implantation mask on the through film made of AlN, the adhesion between the through film and the photoresist is poor and the photoresist peels off, and the photoresist does not function as a mask. there were.

Therefore, an object of the present invention is to improve the adhesion between the through film and the mask layer made of a photoresist when ion-implanted through the through film to form a p-type III nitride semiconductor, and the temperature is 500 ° C. or higher. Ion implantation is possible at temperature.

The present invention is a method for manufacturing a p-type III nitride semiconductor, which forms a p-type III nitride semiconductor by ion-injecting a p-type impurity into a group III nitride semiconductor. The present invention is a semiconductor layer made of a group III nitride semiconductor. Above, a first through film forming step of forming a first through film made of a Group III nitride semiconductor containing Al, and a second through film forming a second through film made of Al2 O3 on the first through film. The forming step, the first mask layer forming step of forming the first mask layer made of SiO2 on the second through film, and the first mask layer containing Si as a constituent element at the time of ion injection in the subsequent step. A second mask layer forming step of forming a second mask layer made of a photoresist capable of retaining its shape with respect to temperature in a desired pattern, and a second through film by etching the first mask layer using the second mask layer as a mask. In the etching process to expose the semiconductor layer, p-type impurities are ionically injected into the semiconductor layer through the first through film and the second through film using the first mask layer and the second mask layer as masks at a temperature of 500 ° C. or higher. It is a method for producing a p-type III nitride semiconductor having an ion injection step of forming an ion injection region and a p-type step of forming the ion injection region into a p-type by activating Mg by heat treatment.

The first through film is arbitrary as long as it is a group III nitride semiconductor containing Al, but undoped AlN is used in terms of high temperature resistance, crystallinity, ease of formation, and suppression of impurity diffusion into the semiconductor layer. preferable.

After the ion implantation step and before the p-type formation step, it is preferable to remove the second through film, the first mask layer, and the second mask layer, and perform the p-type formation step with the first through film left. This is because the first through film can function as a protective film that suppresses the release of nitrogen in the p-type heat treatment.

It is preferable that the semiconductor layer and the first through film are continuously grown by the MOCVD method. This is because it is possible to suppress the adhesion of impurities to the surface of the semiconductor layer.

The ion implantation step may be performed at 500 ° C. or higher, but more preferably at a temperature of 500 to 1000 ° C. The p-type impurities can be further activated in the p-type formation step.

The total thickness of the first through film and the second through film is preferably 5 to 50 nm. Within this range, the amount of ion implantation into the semiconductor layer 11 can be easily controlled, and the mixing of impurities into the semiconductor layer can be sufficiently suppressed.

The total thickness of the first mask layer and the second mask layer is preferably 1.5 μm or more. It can sufficiently function as an ion-impermeable membrane at the time of ion implantation.

The second through film and the first mask layer are preferably formed by the ALD method. This is because the thickness and the film quality can be made uniform, and thereby the adhesion can be further improved.

According to the present invention, the adhesion between the first through film and the second mask layer is improved by passing through the second through film and the first mask layer, and the group III nitride semiconductor is p-type at a temperature of 500 ° C. or higher. Impurities can be ion-implanted.

The figure which showed the manufacturing process of the p-type III nitride semiconductor of Example 1. FIG. The figure which showed the manufacturing process of the p-type III nitride semiconductor of Example 1. FIG. The figure which showed the manufacturing process of the p-type III nitride semiconductor of Example 1. FIG. The figure which showed the manufacturing process of the p-type III nitride semiconductor of Example 1. FIG. The figure which showed the manufacturing process of the p-type III nitride semiconductor of Example 1. FIG. The figure which showed the manufacturing process of the p-type III nitride semiconductor of Example 1. FIG. The figure which showed the manufacturing process of the p-type III nitride semiconductor of Example 1. FIG. The figure which showed the manufacturing process of the p-type III nitride semiconductor of Example 1. FIG.

Hereinafter, specific examples of the present invention will be described with reference to the drawings, but the present invention is not limited to the examples.

In the method for producing a p-type III nitride semiconductor of Example 1, a p-type impurity is ionically injected into a group III nitride semiconductor and the p-type impurity is activated by heat treatment to form a p-type III nitride semiconductor. How to do it. FIGS. 1 to 8 are views showing a manufacturing process of the p-type III nitride semiconductor of Example 1. Hereinafter, the manufacturing process of the p-type III nitride semiconductor of Example 1 will be described in order with reference to the drawings.

(Semiconductor layer 11 and first through film 12 forming step)
First, a semiconductor layer 11 made of n-GaN and a first through film 12 made of AlN are continuously formed on the substrate 10 by using the MOCVD method (see FIG. 1). By continuously forming the semiconductor layer 11 and the first through film 12, impurities such as O and Si are formed on the surface of the semiconductor layer 11 between the time when the semiconductor layer 11 is formed and the time immediately before the formation of the first through film 12. Is prevented from adhering to the semiconductor layer 11 and the impurities are prevented from being implanted into the semiconductor layer 11 by ion implantation in a subsequent step.

The semiconductor layer 11 is a Si-doped n-type, has a thickness of 6 μm, and has a Si concentration of 1 × 10 ¹⁶ / cm ³ . However, the conduction type, thickness, and Si concentration of the semiconductor layer 11 are not limited to these, and may be arbitrary. Although the semiconductor layer 11 is GaN, it may be a group III nitride semiconductor having an arbitrary composition such as AlGaN, InGaN, and AlGaInN.

The first through film 12 is undoped and has a thickness of 30 nm. The first through film 12 is provided to adjust the amount of ion implantation into the semiconductor layer 11 and suppress the injection of impurities such as O and Si into the semiconductor layer 11 in the ion implantation in the subsequent step.

The thickness of the first through film 12 is not limited to 30 nm, but it is preferably 5 to 50 nm in order to fully exert the function of the first through film 12.

Further, the first through film 12 is not limited to AlN, and is arbitrary as long as it is a group III nitride semiconductor containing Al such as AlGaN and AlGaInN. Further, the first through film 12 does not have to be a single crystal, and may be polycrystalline or amorphous. However, it is preferable to use AlN as in Example 1 from the viewpoints of high temperature resistance, crystallinity, and ease of formation. Further, the first through film 12 does not need to be undoped, but if impurities are doped, the impurities diffuse into the semiconductor layer 11 at the time of ion implantation, so that undoped is preferable. The growth temperature and growth pressure of the first through film 12 are preferably 300 to 1500 ° C. and 0.1 to 1 atm from the viewpoint of ease of formation.

The first through film 12 may be formed by a method other than the MOCVD method, for example, a CVD method, but in order to prevent impurities such as O and Si from adhering to the surface of the semiconductor layer 11, Example 1 It is preferable to continuously grow the semiconductor layer 11 and the first through film 12 by using the MOCVD method as described above.

(Step of forming the second through film 13 and the first mask layer 14)
Next, the surface of the first through film 12 is organically washed with acetone and isopropyl alcohol (IPA), and then the second through film 13 and SiO made of Al ₂ O ₃ on the first through film 12 by the ALD method. The first mask layer 14 composed of ₂ is continuously formed (see FIG. 2). The growth temperature is 350 ° C., the thickness of the second through film 13 and the thickness of the first mask layer 14 are 10 nm.

The second through film 13 has the same role as the first through film 12, and is provided to enhance the adhesion between the first through film 12 and the first mask layer 14. Since the constituent element Al is common to the second through film 13 and the constituent element O, and the constituent element O is common to the first mask layer 14, the second through film 13 is the first through film 12. , Good adhesion to both the first mask layer 14. Therefore, the adhesion between the first through film 12 and the first mask layer 14 can be enhanced by passing through the second through film 13.

The first mask layer 14 functions as a mask for preventing ion implantation into an undesired region in the ion implantation in the subsequent step, and the second mask layer 15 and the second through film 13 formed in the subsequent step are in close contact with each other. It is provided to enhance the sex. Since the constituent element O is common to the first mask layer 14 and the second through film 13, and the constituent element Si is common to the second mask layer 15, the first mask layer 14 is the second through film 13. Good adhesion to both the second mask layer 15 and the second mask layer 15. Therefore, the adhesion between the second through film 13 and the second mask layer 15 can be enhanced by interposing the first mask layer 14.

The thickness and growth temperature of the second through film 13 and the first mask layer 14 are not limited to the above values, and are arbitrary as long as a uniform film can be obtained with a uniform thickness. For example, the growth temperature can be 150 to 450 ° C. and the thickness can be 1 to 20 nm. However, the total thickness of the first through film 12 and the second through film 13 is preferably 5 to 50 nm. Within this range, the amount of ion implantation into the semiconductor layer 11 can be easily controlled, and the mixing of impurities into the semiconductor layer 11 can be sufficiently suppressed.

In Example 1, the ALD method is used to form the second through film 13 and the first mask layer 14, but other forming methods such as the CVD method may be used. It is preferably formed by the ALD method from the viewpoint of thickness uniformity and homogeneity, and the resulting improvement in adhesion.

(Washing process)
Next, the surface of the first mask layer 14 is organically washed with acetone and IPA, and heat treatment is performed at 110 ° C. for 90 seconds in a nitrogen atmosphere to remove the water content on the surface of the first mask layer 14. Then, the surface of the first mask layer 14 is treated with HMDS and heat-treated at 120 ° C. for 180 seconds in a nitrogen atmosphere.

(Second mask layer 15 forming step)
After that, the photoresist is applied onto the first mask layer 14 by spin coating, the photoresist is patterned by photolithography so that the region where ion implantation is performed opens, and the second mask layer 15 is cured by heat treatment. Form (see FIG. 3).

The photoresist contains Si as a constituent element and uses a photosensitive resin that can withstand the temperature at the time of ion implantation in the subsequent step. Being able to withstand the temperature at the time of ion implantation means that the photoresist is not removed or the shape does not change even when exposed to the same temperature as at the time of ion implantation, and the shape after development is maintained. In Example 1, since the temperature at the time of ion implantation is 500 ° C. or higher, a photoresist capable of withstanding at least 500 ° C. is used. Of course, those that can withstand higher temperatures than 500 ° C. are preferable.

Photolithography is the following process in detail. After applying the photoresist, it is prebaked to remove the photoresist solvent. Then, light (for example, i-line) is irradiated through a mask having a desired pattern for exposure. Next, the photoresist is made into a desired pattern by performing a developing process. The developing process is a process of removing an exposed portion when the photoresist is a positive type and an unexposed portion when the photoresist is a negative type using a developing solution such as TMAH (tetramethylammonium hydroxide) aqueous solution. Next, post-baking is performed. The above is the details of photolithography.

Here, since the second mask layer 15 shares the constituent element Si with the first mask layer 14, the adhesion to the first mask layer 14 is good. Further, since the surface of the first mask layer 14 is treated with HMDS, the adhesion is further improved. Therefore, during the developing process, the photoresist does not peel off due to the developing solution, and the photoresist can be formed according to a desired pattern.

The thickness of the second mask layer 15 is arbitrary as long as it does not allow ions to pass through during ion implantation. Preferably, the total thickness of the first mask layer 14 and the second mask layer 15 may be 1.5 μm or more. It can sufficiently function as an ion-impermeable membrane at the time of ion implantation. However, in order to ensure patterning accuracy, the thickness of the second mask layer 15 is preferably 2 μm or less. For example, the thickness of the second mask layer 15 is 1.8 to 2.0 μm.

(Etching process)
Next, using the second mask layer 15 as a mask, the first mask layer 14 is dry-etched until the second through film 13 is exposed (FIG. 4). The etching gas is, for example, a fluorine-based gas, such as COF ₂ (carbonyl fluoride). The etching rate of the second through film 13 is much slower than the etching rate of the first mask layer 14. Therefore, the second through film 13 functions as an etching stopper layer, and dry etching can be accurately completed when the surface of the second through film 13 is exposed.

(Ion implantation process)
Next, using the first mask layer 14 and the second mask layer 15 as masks, Mg is ion-implanted into the semiconductor layer 11 through the first through film 12 and the second through film 13. As a result, an ion implantation region 16 in which Mg ions are implanted is formed in the semiconductor layer 11 (see FIG. 5). The planar pattern of the ion implantation region 16 is the same as the opening pattern of the first mask layer 14 and the second mask layer 15.

Ion implantation is performed at 500 ° C., an acceleration voltage of 230 keV, and a dose amount of 2.3 × 10 ¹⁴ / cm ² . Since the photoresist that can withstand the temperature at the time of ion implantation is used as the second mask layer 15, the shape of the second mask layer 15 does not change even if the ion implantation is performed at 500 ° C., and the opening pattern of the second mask layer 15 The ion implantation region 16 can be formed as per. Further, by performing the ion implantation at 500 ° C., the implantation damage to the semiconductor layer 11 can be reduced, and the Mg activation rate due to the heat treatment in the subsequent step can be improved.

The temperature of ion implantation is not limited to 500 ° C., and any temperature may be used as long as it is 500 ° C. or higher, but it may be 500 to 1000 ° C. in order to sufficiently improve the Mg activation rate by the heat treatment in the subsequent step. preferable. It is more preferably 500 to 800 ° C, still more preferably 500 to 600 ° C.

Further, the atom to be ion-implanted may be a p-type impurity other than Mg, and for example, Be may be ion-implanted. Further, the acceleration voltage and the dose amount of ion implantation are not limited to the above values, and the depth of the ion implantation region 16 and the Mg concentration may be set to be desired values. Further, by performing ion implantation a plurality of times at different acceleration voltages, it is possible to further widen the width of the ion implantation region 16 in the depth direction.

(Mask removal process)
Next, the second mask layer 15 is removed using an organic solvent. After that, ashing is performed to remove the residue of the second mask layer 15, and further surface treatment is performed with an aqueous solution of TMAH to remove the first through film 12, the second through film 13, and the first mask layer 14 (FIG. 6). The first through film 12 may be left and used as a protective film (see FIG. 7).

(P-type process)
Next, heat treatment is performed to activate Mg in the ion implantation region 16. As a result, the ion implantation region 16 becomes the p-type semiconductor region 17 (see FIG. 8). The heat treatment is performed, for example, in a nitrogen atmosphere at 800 to 1500 ° C. for 1 to 60 minutes. Further, it is preferable that the heat treatment is performed in a pressurized environment, that is, in an atmosphere where the pressure is larger than 1 atm. It is possible to suppress the release of nitrogen from the semiconductor layer 11 during the heat treatment. For the same purpose, a protective film such as AlN may be formed on the semiconductor layer 11 before the heat treatment.

Here, in Example 1, ion implantation is performed at a temperature of 500 ° C. or higher. Therefore, in this heat treatment, the damage caused by ion implantation is sufficiently recovered, the activation rate of Mg is increased, and the p-type semiconductor region 17 having a high hole concentration can be formed.

For example, the Mg activation rate of the p-type semiconductor region 17 can be 1% or more, the Mg concentration is 5 × 10 ¹⁸ to 1 × 10 ¹⁹ / cm ³ , and the hole concentration is 5 × 10 ¹⁶ to 1 × 10. A p-type semiconductor region 17 of ¹⁷ / cm ³ can be formed.

As described above, according to the first embodiment, the adhesion between the first through film 12 and the second mask layer 15 can be enhanced by passing through the second through film 13 and the first mask layer 14, and the adhesion with respect to the semiconductor layer 11 can be enhanced. It is possible to ion-implant p-type impurities at a high temperature of 500 ° C. or higher.

Next, an experimental example relating to Example 1 will be described.

In order to evaluate the adhesion between the first through film 12 and the second mask layer 15, the following four types of samples were prepared. GaN having a thickness of 6 μm, AlN having a thickness of 30 nm, Al ₂ O ₃ having a thickness of 10 nm, SiO ₂ having a thickness of 10 nm, and a photoresist having a thickness of 2 μm are laminated in this order on a GaN substrate according to the manufacturing method of Example 1. A sample was prepared (hereinafter referred to as the sample of Example 1). A sample in which Al N, Al ₂ O ₃ and SiO ₂ were omitted in the sample of Example 1 (hereinafter, a sample of Comparative Example 1), and a sample in which Al ₂ O ₃ and SiO ₂ were omitted in the sample of Example 1 (hereinafter, comparison). A sample of Example 2) and a sample of Example 1 in which SiO ₂ was omitted (hereinafter referred to as a sample of Comparative Example 3) were also prepared.

When the surface of each sample after the photoresist development was observed, in Comparative Example 1, the photoresist pattern was partially lost. Further, in Comparative Example 2, it was confirmed that the pattern of the photoresist partially disappeared and that the developing solution penetrated between the photoresist and AlN from the opening. Further, in Comparative Example 3, the photoresist pattern was completely lost. From the results of Comparative Examples 1 to 3, it is considered that the adhesion of the photoresist was weak and the photoresist flowed during development.

On the other hand, in the sample of Example 1, the photoresist was formed according to the pattern. It is probable that by interposing Al ₂ O ₃ and SiO ₂ between Al N and the photoresist, the adhesion of the photoresist was enhanced, and the photoresist was firmly fixed even during development and was not washed away.

The present invention can be applied to the manufacture of various semiconductor devices such as FETs, pn diodes, HFETs, and IGBTs.

10: Substrate 11: Semiconductor layer 12: First through film 13: Second through film 14: First mask layer 15: Second mask layer 16: Ion implantation region 17: p-type semiconductor region

Claims (8)

In a method for manufacturing a p-type III nitride semiconductor, which forms a p-type III nitride semiconductor by ion-injecting a p-type impurity into a group III nitride semiconductor.
A first through film forming step of forming a first through film made of a group III nitride semiconductor containing Al on a semiconductor layer made of a group III nitride semiconductor,
A second through film forming step of forming a second through film made of Al ₂ O ₃ on the first through film, and a second through film forming step.
A first mask layer forming step of forming a first mask layer made of SiO ₂ on the second through film, and a process of forming the first mask layer.
Forming a second mask layer on the first mask layer, which contains Si as a constituent element and is made of a photoresist capable of maintaining its shape with respect to the temperature at the time of ion implantation in the subsequent step, in a desired pattern. Process and
An etching step of etching the first mask layer using the second mask layer as a mask to expose the second through film, and an etching step.
Ion implantation of p-type impurities into the semiconductor layer through the first through film and the second through film using the first mask layer and the second mask layer as masks at a temperature of 500 ° C. or higher. The ion implantation process that forms the region and
A p-type step that p-types the ion implantation region by activating Mg by heat treatment, and
A method for producing a p-type III nitride semiconductor having the above. The method for producing a p-type III nitride semiconductor according to claim 1, wherein the first through film is an undoped AlN. After the ion injection step and before the p-type step, the second through film, the first mask layer, and the second mask layer are removed, and the p-type is formed with the first through film left. The method for producing a p-type III nitride semiconductor according to claim 1 or 2, wherein the process is performed. The method for producing a p-type III nitride semiconductor according to any one of claims 1 to 3, wherein the semiconductor layer and the first through film are continuously grown by a MOCVD method. The method for producing a p-type III nitride semiconductor according to any one of claims 1 to 4, wherein the ion implantation step is performed at a temperature of 500 to 1000 ° C. The p-type III nitride semiconductor according to any one of claims 1 to 5, wherein the total thickness of the first through film and the second through film is 5 to 50 nm. Manufacturing method. The p-type III nitride according to any one of claims 1 to 6, wherein the total thickness of the first mask layer and the second mask layer is 1.5 μm or more. Semiconductor manufacturing method. The method for producing a p-type III nitride semiconductor according to any one of claims 1 to 7, wherein the second through film and the first mask layer are formed by the ALD method.

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