JP7073641B2 - Wiring board with through wiring and its manufacturing method - Google Patents

Description

The present disclosure relates to a wiring board and a method for manufacturing the same. For example, the present invention relates to a wiring board having through wiring and a method for manufacturing the same.

Semiconductor devices (semiconductor chips) manufactured using semiconductor substrates such as silicon are mounted on almost all electronic devices and provide various functions to the electronic devices. The semiconductor device is formed by laminating various patterned insulating films and conductive films on a semiconductor substrate. The semiconductor device is provided with terminals for inputting power supplies and signals necessary for operation, and is mounted on the main board. At this time, a wiring board (hereinafter, also referred to as an interposer) is provided between the semiconductor device and the main board. The interposer has a substrate and a through wiring (through electrode) penetrating the substrate, and the terminal of the semiconductor device and the wiring on the main substrate are electrically connected by the through wiring.

As the interposer substrate, a silicon substrate, a glass substrate, or the like is used. For example, Patent Documents 1 and 2 disclose an interposer manufactured by using a glass substrate, a glass-epoxy composite substrate, or the like, and on which a passive element such as a capacitive element, an inductor, or a resistance element is mounted.

Japanese Unexamined Patent Publication No. 2005-26670 Japanese Unexamined Patent Publication No. 2004-047667

One of the problems of the present disclosure is to provide an interposer on which a passive element such as a capacitive element is mounted and a method for manufacturing the interposer. For example, one of the problems is to provide an interposer on which a capacitance element having a significantly suppressed capacitance variation is mounted and a method for manufacturing the interposer. Alternatively, one of the tasks is to provide a method for producing an interposer with a smaller number of steps.

One of the embodiments of the present disclosure is a wiring board. This wiring board has a first surface and a second surface located on the opposite side to the first surface, and has a substrate having a through hole penetrating from the first surface to the second surface, a side wall of the through hole, and a first surface. , And a first wiring that continuously covers the second surface, a first dielectric film on the first wiring, and a first having an opening on the first dielectric film that overlaps with the first dielectric film. It has an insulating film and a second wiring which is located on the first insulating film and overlaps with the first wiring.

One of the embodiments of the present disclosure is a wiring board. This wiring board has a first surface and a second surface located on the opposite side to the first surface, and has a substrate having a through hole penetrating from the first surface to the second surface, a side wall of the through hole, and a first of the substrates. On a first insulating film, a first insulating film located on a first wiring, a first wiring that continuously covers a first surface and a second surface of a substrate, and having an opening overlapping the first wiring. It has a first dielectric film that is located and covers the opening, and a second wire that is located on the first dielectric film and overlaps the first wire.

One of the embodiments of the present disclosure is a wiring board. This wiring board has a first surface and a second surface located on the opposite side to the first surface, and has a substrate having a through hole penetrating from the first surface to the second surface, a side wall of the through hole, and a first surface. , And a first wiring that continuously covers the second surface, a first insulating film that is located on the substrate, is in contact with the substrate, is thinner than the first wiring, and covers the through hole, the first on the first wiring. It has a dielectric film of the above, and a second wiring located on the first dielectric film and overlapping the first wiring.

One of the embodiments of the present disclosure is a wiring board. This wiring board has a first surface and a second surface located on the opposite side to the first surface, and has a substrate having a through hole penetrating from the first surface to the second surface, a side wall of the through hole, and a first surface. , And a first wiring that continuously covers the second surface, a first dielectric film on the first wiring, a second wiring located on the first dielectric film and overlapping the first wiring, It has a first insulating film located on the second wiring and having an opening overlapping the second wiring, and a lower insulating film located under the substrate. The number of layers of the first insulating film and the number of layers of the lower insulating film are the same.

One of the embodiments of the present disclosure is a method for manufacturing a wiring board. This manufacturing method is to form a through hole penetrating from the first surface to the second surface on a substrate having a first surface and a second surface located on the opposite side to the first surface, a side wall of the through hole, a first. Forming the first wiring so as to continuously cover the surface and the second surface, forming the first dielectric film on the first wiring, and forming the first dielectric film on the first dielectric film. It involves forming an insulating film, forming an opening in the first insulating film that exposes the first dielectric film, and forming a second wire covering the opening.

One of the embodiments of the present disclosure is a method for manufacturing a wiring board. This manufacturing method is to form a through hole penetrating from the first surface to the second surface on a substrate having a first surface and a second surface located on the opposite side to the first surface, a side wall of the through hole, a first. The first wiring is formed so as to continuously cover the surface and the second surface, the first insulating film is formed on the first wiring, and the opening that exposes the first wiring is first. It includes forming in an insulating film, forming a first dielectric film covering an opening, and forming a second wiring on the first dielectric film that overlaps with the first wiring.

One of the embodiments of the present disclosure is a method for manufacturing a wiring board. This manufacturing method is to form a through hole penetrating from the first surface to the second surface on a substrate having a first surface and a second surface located on the opposite side to the first surface, a side wall of the through hole, a first. The first wiring is formed so as to continuously cover the surface and the second surface, and a first insulating film thinner than the first wiring is formed on the substrate so as to be in contact with the substrate. The present invention includes forming a first dielectric film on the wiring of the above, and forming a second wiring on the first dielectric film, which overlaps with the first wiring.

One of the embodiments of the present disclosure is a method for manufacturing a wiring board. This manufacturing method is to form a through hole penetrating from the first surface to the second surface on a substrate having a first surface and a second surface located on the opposite side to the first surface, a side wall of the through hole, a first. Forming the first wiring so as to continuously cover the surface and the second surface, forming the first dielectric film on the first wiring, and forming the first dielectric film on the first dielectric film. This includes forming a second wiring that overlaps with the wiring of the above, forming a first insulating film on the second wiring, and forming a lower insulating film under the substrate. The number of layers of the first insulating film and the number of layers of the lower insulating film are the same.

The cross-sectional schematic diagram of the wiring board of 1st Embodiment. The sectional schematic diagram which shows the manufacturing method of the wiring board of 1st Embodiment. The sectional schematic diagram which shows the manufacturing method of the wiring board of 1st Embodiment. The sectional schematic diagram which shows the manufacturing method of the wiring board of 1st Embodiment. The sectional schematic diagram which shows the manufacturing method of the wiring board of 1st Embodiment. FIG. 6 is a schematic cross-sectional view showing a method of manufacturing a conventional wiring board. FIG. 6 is a schematic cross-sectional view showing a method of manufacturing a conventional wiring board. FIG. 6 is a schematic cross-sectional view showing a method of manufacturing a conventional wiring board. The sectional schematic diagram which shows the manufacturing method of the conventional wiring board, and the manufacturing method of the wiring board of one Embodiment. The cross-sectional schematic diagram of the wiring board of 2nd Embodiment. The sectional schematic diagram which shows the manufacturing method of the wiring board of 2nd Embodiment. The sectional schematic diagram which shows the manufacturing method of the wiring board of 2nd Embodiment. The sectional schematic diagram which shows the manufacturing method of the wiring board of 2nd Embodiment. FIG. 6 is a schematic cross-sectional view of the wiring board of the third embodiment. The sectional schematic diagram which shows the manufacturing method of the wiring board of 3rd Embodiment. The sectional schematic diagram which shows the manufacturing method of the wiring board of 3rd Embodiment. FIG. 6 is a schematic cross-sectional view of the wiring board of the fourth embodiment. The sectional schematic diagram which shows the manufacturing method of the wiring board of 4th Embodiment. The sectional schematic diagram which shows the manufacturing method of the wiring board of 4th Embodiment. The sectional schematic diagram which shows the manufacturing method of the wiring board of 4th Embodiment. The sectional schematic diagram which shows the manufacturing method of the wiring board of 5th Embodiment. The sectional schematic diagram which shows the manufacturing method of the wiring board of 5th Embodiment. The sectional schematic diagram which shows the manufacturing method of the wiring board of 5th Embodiment. The sectional schematic diagram which shows the manufacturing method of the wiring board of 5th Embodiment. The sectional schematic diagram which shows the manufacturing method of the wiring board of 5th Embodiment. FIG. 6 is a schematic cross-sectional view of the wiring board of the sixth embodiment. The sectional schematic diagram which shows the manufacturing method of the wiring board of 6th Embodiment. The sectional schematic diagram which shows the manufacturing method of the wiring board of 6th Embodiment. FIG. 6 is a schematic cross-sectional view of the semiconductor module of the seventh embodiment. FIG. 6 is a schematic cross-sectional view of the semiconductor module of the seventh embodiment. FIG. 6 is a schematic cross-sectional view of the semiconductor module of the seventh embodiment.

Hereinafter, each embodiment of the present disclosure will be described with reference to the drawings and the like. However, the present disclosure can be carried out in various aspects without departing from the gist thereof, and is not construed as being limited to the description contents of the embodiments exemplified below.

The drawings may schematically represent the width, thickness, shape, etc. of each part as compared to the actual embodiment in order to clarify the explanation, but this is merely an example and the interpretation of the present disclosure is limited. It's not something to do. In this specification and each figure, elements having the same functions as those described with respect to the above-mentioned figures may be designated by the same reference numerals to omit duplicate explanations.

In the present specification and claims, when expressing an aspect of arranging another structure on one structure, when the term "above" is simply used, the structure shall be used unless otherwise specified. It includes both the case where another structure is placed directly above the structure so as to be in contact with each other and the case where another structure is placed above one structure via another structure.

When a single film is processed to form a plurality of films, or when a plurality of films are simultaneously formed in the same process, the plurality of films may have different functions and roles. However, these multiple films are derived from films formed as the same layer in the same process, and these multiple films have the same structure and the same material, except when a part of these films is selectively processed. Has. Therefore, in the present specification and claims, these multiple films are defined as existing in the same layer.

In the present specification, when a plurality of components are referred to separately, a hyphen and a natural number are used after the reference numeral. When describing the whole component or an arbitrarily selected component without distinguishing each of the plurality of components, only the reference numeral is used.

(First Embodiment)
The structure and manufacturing method of the wiring board 100, which is one of the embodiments of the present disclosure, will be described with reference to the drawings.

1. 1. FIG. 1 shows a schematic cross-sectional view of the structural wiring board 100. The wiring board 100 is sandwiched between a semiconductor device and a main board, for example, and functions as an interposer for electrically connecting these.

Specifically, the wiring board 100 has a board 102, and the board 102 is provided with one or a plurality of through holes 104 penetrating the board 102. The wiring board 100 further covers the side wall of the through hole 104 and the first wiring (also referred to as through wiring or through electrode) that continuously covers the first surface of the substrate 102 and the second surface located on the opposite side of the first surface. ) 110. In FIG. 1, the first wiring 110 does not block the through hole 104, but the first wiring 110 may be provided so as to close the through hole 104.

Various wirings and insulating films can be provided on the wiring board 100 in addition to the first wiring 110, and these wirings not only enable electrical connection between the semiconductor device and the main board, but also enable a capacitive element. It is possible to form a passive element such as. In the example shown in FIG. 1, in the wiring board 100, the lower wirings 112-1 and 112-2 located below the board 102, that is, on the second surface side are placed on the substrate 102, that is, the upper portion located on the first surface side. It has wirings 114-1 and 114-2. Since the connection relationship between the first wiring 110, the lower wiring 112, and the upper wiring 114 can be arbitrarily determined according to the application and function of the wiring board 100, they may be electrically connected to each other. Each may be electrically separated. Hereinafter, the upper wirings 114-1 and 114-2 are referred to as the third wiring and the fifth wiring, respectively, and the third wiring 114-1 and the fifth wiring 114-2 are collectively referred to as the upper wiring 114.

Although the details will be described later, the first wiring 110, the lower wiring 112, and the upper wiring 114 can be formed by electrolytic plating. In this case, as shown in FIG. 1, a metal layer (hereinafter, also referred to as a seed layer) 124 is formed between the substrate 102 and these wirings. The seed layer 124 is in contact with the substrate 102 and is in contact with the corresponding first wiring 110, the lower wiring 112, and the upper wiring 114. The first wiring 110, the lower wiring 112, and the upper wiring 114 can be formed in the same process. In this case, these wires are in the same layer. It should be noted that the seed layer 124 may not be provided, and all or part of these wirings may be formed by another method. For example, the lower wiring 112 and the upper wiring 114 formed on one surface of the substrate 102 may be formed by a sputtering method, a chemical vapor deposition (CVD) method, a vapor deposition method, or the like, and in this case, these. The wiring is in contact with the substrate 102.

A dielectric film 116 (first dielectric film 116-1, second dielectric film 116-2) is provided on the first wiring 110 and the third wiring 114-1, respectively. The dielectric film 116 is also an insulating film, and is typically a silicon-containing inorganic compound such as silicon nitride, silicon oxide, silicon oxide, silicon nitride, silicon carbide, silicon nitride carbide, or silicon oxide to which carbon is added, or oxidation. It may contain an aluminum-containing inorganic compound such as aluminum or aluminum nitride, a hafnium-containing inorganic compound such as hafnium silicate or hafnium aluminate, or a rare earth-containing inorganic compound such as yttrium oxide. In FIG. 1, the first dielectric film 116-1 and the second dielectric film 116-2 have structures separated from each other, but they are the same because they can be formed in the same process. Can be in the layer. Further, although not shown, one dielectric film 116 may be provided so as to overlap the first wiring 110 and the third wiring 114-1. In this case, a part of the dielectric film 116 having an integrated structure functions as the first dielectric film 116-1, and the other part functions as the second dielectric film 116-2.

A first insulating film 118 that covers a part of the dielectric film 116 and the fifth wiring 114-2 is provided on the dielectric film 116 and the fifth wiring 114-2. The first insulating film 118 covers the ends of the first wiring 110, the upper wiring 114, and the dielectric film 116. In other words, it has an opening that overlaps with these. On the other hand, a lower insulating film 120 is provided under the substrate 102. The lower insulating film 120 also covers the first wiring 110 and the lower wiring 112 under the substrate 102. Although not shown, the lower insulating film 120 can also have an opening that overlaps with the first wiring 110 and the lower wiring 112, whereby the electricity between the first wiring 110 and the lower wiring 112 and the semiconductor device or the main board can be obtained. Connection is made. The first insulating film 118 and the lower insulating film 120 may be made of polyamide such as polyimide or aromatic amide, polyamideimide, polyester such as polyalkylene terephthalate or polyarylate, polycarbonate, polybenzoxazole, polyolefin, syndiotactic polystyrene or the like. Stereoregular polystyrene, polyarylene sulfide such as polyphenylene sulfide, polyacetal, polyether containing a carbonyl group such as polyether ketone and polyether ether ketone, polyether having a sulfone group (polyether sulfone), polyether having an imide group (Polyetherimide), polyether having a nitrile group (polyethernitrile), epoxy resin, benzocyclobutene resin, phenol resin, silicone resin, fluororesin, acrylic resin, cyanate resin such as bismaleimide-triazine resin, etc. Can contain molecules. Inorganic compounds such as silicon oxide, talc, mica, and alumina classified into glass and silica gel may be mixed with these polymers as a filler. Further, these polymers may have liquid crystallinity. The first insulating film 118 and the lower insulating film 120 may have the same composition. As shown in FIG. 1, the first insulating film 118 and the lower insulating film 120 may be provided so as to close the through hole 104.

A lead wiring 122 that overlaps with the first wiring 110 and the upper wiring 114 is further provided on the dielectric film 116 and the fifth wiring 114-2. The lead wiring 122 is provided so as to cover the opening provided in the first insulating film 118, and may cover a part of the first insulating film 118. Specifically, the lead wiring 122 may cover the upper surface of the first insulating film 118, that is, the surface of the first insulating film 118 located on the opposite side of the substrate 102. Hereinafter, for convenience, the lead wiring 122 that overlaps with the first wiring 110, the third wiring 114-1, and the fifth wiring 114-2 will be the second wiring 122-1, the fourth wiring 122-2, and the fourth wiring 122-2, respectively. It is described as wiring 122-3 of 6. Further, the second wiring 122-1, the fourth wiring 122-2, and the sixth wiring 122-3 are collectively referred to as lead wiring 122.

The connection between the second wiring 122-1, the fourth wiring 122-2, and the sixth wiring 122-3 can be arbitrarily determined according to the application and function of the wiring board 100, and can be directly or indirectly determined with each other. It may be connected to each other or electrically separated. Like the first wiring 110 and the upper wiring 114, the lead wiring 122 can also be formed by electrolytic plating or a vapor deposition method. In this case, as shown in FIG. 1, a seed layer 132 in contact with the first dielectric film 116-1, the second dielectric film 116-2, and the fifth wiring 114-2 is provided on the first dielectric film 116-1, the second dielectric film 116-2, and the fifth wiring 114-2. The lead wiring 122 is formed so as to be in contact with the seed layer 132. The formation of the seed layer 132 on the fifth wiring 114-2 is arbitrary, and the fifth wiring 114-2 and the sixth wiring 122-3 can be in direct contact with each other without providing the seed layer 132. Although not shown, when the lead wiring 122 is formed by a sputtering method, a CVD method, or the like, the lead wiring 122 is in direct contact with the dielectric film 116 or the fifth wiring 114-2.

A second insulating film 126 that covers the end portion of the lead wiring 122 is formed on the lead wiring 122. The second insulating film 126 also has an opening that overlaps with the lead wiring 122, and the lead wiring 122 is electrically connected to the semiconductor device or the main substrate through this opening. Like the first insulating film 118, the second insulating film 126 may contain the above-mentioned polymer and may have the same composition as the first insulating film 118.

A capacitive element is formed by laminating the first wiring 110, the first dielectric film 116-1, and the second wiring 122-1. Similarly, the capacitive element is formed by laminating the third wiring 114-1, the second dielectric film 116-2, and the fourth wiring 122-2. Further, the lead wiring 122 can be used for forming an electric circuit of the wiring board 100 and for electrical connection with another wiring board, a semiconductor device, or a main board provided on the lead wiring 122. That is, the lead wiring 122 functions not only as one electrode of the capacitive element but also as wiring for constructing an electric circuit in the wiring board 100 and for electrical connection with another board. With the above configuration, the wiring board 100 functions as an interposer on which a passive element is mounted.

Although FIG. 1 illustrates a wiring board 100 having two capacitive elements, there is no limitation on the number of capacitive elements. Further, it is not always necessary to make the capacitive element by using the first wiring 110 that functions as the through wiring, and the capacitive element may be formed only on the upper wiring 114.

2. 2. Manufacturing Method Hereinafter, a manufacturing method of the wiring board 100 will be described. The method for manufacturing the wiring board 100 is mainly by forming the first wiring 110, forming the dielectric film 116, forming the first insulating film 118, forming the lead wiring 122, and forming the second insulating film 126. It is composed.

2-1. Substrate First, a through hole 104 is formed in the substrate 102 (FIG. 2A). The material contained in the substrate 102 is not limited, and examples thereof include glass, silicon, gallium arsenide, gallium nitride, ceramics, and a composite material of glass and resin. Examples of the resin include materials such as epoxy resin, polyimide, polyamide, and polyester that can be used in the above-mentioned first insulating film 118. When the glass substrate is used as the substrate 102, the through hole 104 may be formed by etching such as plasma etching or wet etching, laser irradiation, or mechanical processing such as sandblasting or ultrasonic drilling. The number and size of the through holes 104 can be arbitrarily determined according to the design of the wiring board 100.

2-2. First wiring, lower wiring, upper wiring Next, a seed layer 124 is formed on the surface of the substrate 102 and the side wall of the through hole 104 (FIG. 2A). The seed layer 124 is provided for forming the first wiring 110, the lower wiring 112, and the upper wiring 114 by electrolytic plating, and includes metals such as titanium, nickel, chromium, copper, and gold, or alloys thereof. Among these, a metal having high adhesion to glass is preferable. The seed layer 124 can be formed by a sputtering method, a CVD method, electroless plating, a vapor deposition method, or the like. Although not shown, the surface of the substrate 102 may be coated with a film containing the above-mentioned resin or inorganic compound before the seed layer 124 is formed. In this case, the entire surface of the substrate 102 including the side wall of the through hole 104 may be coated, or the side wall of the through hole 104 is not coated and the first surface and the second surface of the substrate 102 are selectively coated. You may.

Next, the resist 130 is provided on the first surface of the substrate 102 (FIG. 2B). A liquid resist may be used as the resist 130, but since the substrate 102 has a through hole 104, by attaching a film-like resist to the substrate 102, the resist 130 has a relatively uniform thickness. Can be formed. After that, patterning is performed by exposure and development via a photomask to form a resist mask 131 that covers a region that does not form the first wiring 110, the lower wiring 112, and the upper wiring 114 (FIG. 2C). A resist mask 131 is also formed on the lower side of the substrate 102 by the same step (FIG. 2 (D)). The resist mask 131 may be formed on the substrate 102 first, or may be provided under the substrate 102 first, or may be provided above and below the substrate 102 at the same time.

After that, power is supplied to the seed layer 124 to perform electrolytic plating, and the first wiring 110, the lower wiring 112, and the upper wiring 114 are placed on the seed layer 124 not covered by the resist mask 131 (that is, in the opening of the resist mask 131). (FIG. 3 (A)). These wirings can include metals such as titanium, aluminum, copper, nickel, tungsten, molybdenum, gold, silver, iron, chromium and alloys thereof. Further, these wirings may have a laminated structure of different metal films, and may be, for example, laminated metal films containing copper, nickel, and gold, respectively. After that, the resist mask 131 is removed, and the seed layer 124 exposed from the first wiring 110, the lower wiring 112, and the upper wiring 114 is removed by etching (FIG. 3B). The etchant can be arbitrarily selected from the etchants that do not damage the substrate 102, and examples thereof include acidic etchants containing sulfuric acid.

2-3. Dielectric film Next, the dielectric film 116 of the capacitive element is formed. Specifically, a dielectric film is formed by using a CVD method or a sputtering method so as to cover almost the entire surface of the substrate 102, and by etching this, one of the first wiring 110 and the third wiring 114-1. It is processed into dielectric films 116-1 and 116-2 that selectively cover the portions, respectively. As shown in FIG. 3C, the dielectric film 116 can be provided so as to be in contact with the side surface of the first wiring 110 or the third wiring 114-1 or a part of the first surface of the substrate 102. As described above, the first dielectric film 116-1 and the second dielectric film 116-2 may have an integrated structure.

2-4. Insulating film Subsequently, the first insulating film 118 and the lower insulating film 120 are formed so as to cover the first surface and the second surface of the substrate 102, respectively (FIG. 4A). These insulating films may be formed so as to cover the through hole 104, or may be formed so as not to block the through hole 104. The first insulating film 118 and the lower insulating film 120 also have film-like insulating materials provided on the first and second surfaces of the substrate 102 to form an opening for exposing the dielectric film 116 and the fifth wiring. It can be formed by curing other than the above and removing the insulating material in the other regions (FIG. 4 (B)). Either a film-shaped insulating material or a liquid insulating material may be used for forming the lower insulating film 120, and the insulating material may be photosensitive or non-photosensitive. For example, a film-like resist used for forming the resist 130 may be used, or a resist having a composition different from that of the resist 130 may be applied.

2-5. Lead wiring Next, the lead wiring 122 is formed. Specifically, as shown in FIG. 4C, a seed layer 132 is formed on the first insulating film 118, the dielectric film 116, and the fifth wiring 114-2, and the resist 130 is formed on the seed layer 132. To form. However, as described above, the formation of the seed layer 132 on the fifth wiring 114-2 is optional. Similar to the formation of the first wiring 110, the resist 130 is patterned by exposure and development to form a resist mask 131 having an opening overlapping with the first wiring 110 and the upper wiring 114 (FIG. 5A). ..

After that, the lead wiring 122 is formed by electrolytic plating. As a result, the second wiring 122-1 which overlaps with the first wiring 110 via the dielectric film 116-1 and the fourth wiring 122- which overlaps with the third wiring 114-1 via the dielectric film 116-2. 2. A sixth wiring 122-3 that overlaps with the fifth wiring 114-2 is formed. After that, the resist mask 131 is peeled off, and the seed layer 132 is removed by etching (FIG. 5 (B)).

The lead wiring 122 may be formed by using a CVD method, a sputtering method, a vapor deposition method, or the like. In this case, the seed layer 132 does not need to be formed, and the second wiring 122-1, the fourth wiring 122-2, and the sixth wiring 122-3 are the first dielectric films 116-1, respectively. It is in direct contact with the second dielectric film 116-2 and the fifth wiring 114-2.

2-6. The second insulating film The second insulating film 126 is subsequently formed by the same method as that for forming the first insulating film 118 (FIG. 5 (C)).

3. 3. Conventional Wiring Board Manufacturing Method For comparison, an example of a conventional wiring board manufacturing method is briefly described. The conventional manufacturing method mainly forms the first wiring 110, the dielectric film 116, the upper electrode 123, the first insulating film, the lead wiring, and the second insulating film. including. That is, after forming the dielectric film 116 of the wiring board 100 (FIG. 3 (C)), the seed layer 132 is formed (FIG. 6 (A)). Subsequently, the formation of the resist mask 131 (FIG. 6 (B)), the formation of the upper electrode 123 and the removal of the resist mask by electrolytic plating (FIG. 6 (C)), the removal of the seed layer 132 (FIG. 7 (A)), the first. The insulating film 118 is formed (FIG. 7 (B)). Subsequently, the seed layer 134 is formed on the first insulating film 118, the resist mask 131 is formed on the seed layer 134 (FIG. 7 (C)), and the lead wiring 122 is provided by the electrolytic plating method (FIG. 8 (FIG. 8)). A)). After that, the resist mask 131 and the seed layer 134 are removed (FIG. 8 (B)), and the second insulating film 126 is formed (FIG. 8 (C)). Therefore, in the conventional method, the upper electrode 123 has a function as one electrode of the capacitive element.

Here, an enlarged view of the area surrounded by the dotted line in FIG. 7 (A) is shown in FIG. 9 (A). FIG. 9A shows a state in which the seed layer 132 is removed by etching after the upper electrode 123 is formed. The etching of the seed layer 132 is performed under the condition that the etching rate difference as large as possible can be obtained between the seed layer 132 and the upper electrode 123. Specifically, a condition is selected in which the seed layer 132 dissolves at a higher rate than that of the upper electrode 123. In the etching, it is necessary to surely remove the seed layer 132 in the region not covered by the upper electrode 123, so that a part of the seed layer 132 covered by the upper electrode 123 is also etched (side etching). As a result, the length L ′ in which the seed layer 132 and the dielectric film are in contact is smaller than the length L of the upper electrode 123.

As can be seen from FIGS. 6 (B) and 6 (C), the length L can be controlled by the opening provided in the resist mask 131. Since the size of the opening is determined by the exposure to the resist 130 and the subsequent development, it can be easily and accurately controlled by comparison. On the other hand, it is not always easy to precisely control the side etching of the seed layer 132, and a large variation occurs in the length L'.

Here, the capacitance of the capacitive element of the wiring board 100 is determined by the area where the electric field is applied to the dielectric film 116. In the conventional example, the capacitance is determined not by the area of the upper electrode 123 but by the contact area between the dielectric film 116 and the seed layer 132. Therefore, the occurrence of variation in length L'is a direct cause of variation in capacitance.

On the other hand, in the manufacturing method of the present embodiment, as shown in the enlarged view (FIG. 9 (B)) of the area surrounded by the dotted line in FIG. 5 (B), the contact between the dielectric film 116 and the seed layer 132 The area is determined by the opening of the first insulating film 118. Since the size and shape of this opening are determined by the exposure of the first insulating film 118 using a photomask and the subsequent development (see FIGS. 4 (A) and 4 (B)), the size and shape of the opening can be easily controlled. .. Further, even if the seed layer 132 is side-etched, the side-etched portion is located on the upper surface of the first insulating film 118, that is, on the surface of the first insulating film 118 opposite to the substrate 102. The length L'is not affected, and the contact area between the dielectric film 116 and the seed layer 132 does not change. Therefore, by applying this embodiment, it is possible to form a capacitive element having an accurate capacitance, and it is possible to reduce the variation thereof.

Further, in the manufacturing method of the present embodiment, there are few wiring forming steps as compared with the conventional example. More specifically, the step of forming the upper electrode 123 is unnecessary, and the lead wiring 122 also serves as the upper electrode 123. Therefore, it is possible to manufacture the wiring board at low cost. In addition, since the number of electrical connections is reduced, the risk of contact failure is eliminated, and improvement in processing yield can be expected.

(Second Embodiment)
In this embodiment, the structure and manufacturing method of the wiring board 150 having a structure different from that of the wiring board 100 will be described. The description may be omitted with respect to the configuration that is the same as or similar to that of the first embodiment.

10 (A) shows a schematic cross-sectional view of the wiring board 150, and FIG. 10 (B) shows an enlarged view of a region surrounded by a dotted line in FIG. 10 (A). The wiring board 150 is located on the dielectric film 116, and the side surface of the seed layer 132 in contact with the first insulating film 118 and the side surface of the first wiring 110 and the upper wiring 114 are in the same plane or substantially. It differs from the wiring board 100 in that it is located on the same plane (see FIG. 10B). Further, a part of the upper surface of the first wiring 110, that is, a surface of the first wiring 110 located on the opposite side of the substrate 102, comes into contact with the second insulating film 126.

The wiring board 150 having such a structure can be manufactured by the method shown below. First, as in the production of the wiring board 100, the first wiring 110, the lower wiring 112, and the upper wiring 114 are formed on the substrate 102, and the first wiring 110 and the third wiring 114-1 are formed on the first wiring 110 and the third wiring 114-1, respectively. The dielectric film 116-1 of 1 and the second dielectric film 116-2 are formed (FIG. 11 (A)). After that, as shown in FIG. 11B, the first insulating film 118 is formed. The first insulating film 118 is formed by exposing and developing a film-like photosensitive resin. Specifically, after the unresolved photosensitive resin is provided on the substrate 102, exposure is performed from below the substrate 102, that is, from the surface on which the lower wiring 112 is formed. As a result, light irradiation is performed in a region other than the region where the first wiring 110, the lower wiring 112, and the upper wiring 114 are provided. When the photosensitive resin is a negative type, the region irradiated with light is cured, so that the first insulating film 118 is not formed on the first wiring 110, the lower wiring 112, and the upper wiring 114 after development (FIG. FIG. 11 (C)). After that, the lower insulating film 120 is formed under the substrate 102 (FIG. 12 (A)).

Subsequent steps can be performed in the same manner as in the production of the wiring board 100. That is, the seed layer 132 is formed on the first insulating film 118 and the dielectric film 116, and the resist mask 131 is further formed (FIG. 12 (B)). The lead wiring 122 is formed on the seed layer 132 by applying the electrolytic plating method (FIG. 12 (C)), and after the resist mask 131 is removed (FIG. 13 (A)), the end portion of the lead wiring 122 is covered. A second insulating film 126 is formed on the surface (FIG. 13 (B)). Thereby, the wiring board 150 can be obtained.

In the above-mentioned manufacturing method, it is not necessary to use a photomask when exposing the photosensitive resin, and it is not necessary to align the photomask at the time of exposure. Therefore, it is possible to provide a wiring board at a lower cost.

(Third Embodiment)
In this embodiment, the structure and manufacturing method of the wiring board 160 having a structure different from that of the wiring boards 100 and 150 will be described. The description may be omitted with respect to the configuration which is the same as or similar to the first and second embodiments.

As shown in the schematic cross-sectional view of FIG. 14, the wiring board 160 has a dielectric film 116 provided on the first wiring 110, the third wiring 114-1, and the first insulating film 118. It differs from the wiring boards 100 and 150 in that it does not contact the 102. The first insulating film 118 has an opening that overlaps with the first wiring 110, the third wiring 114-1, and the fifth wiring 114-2, and the dielectric film 116 so as to cover the former two. Is formed. A part of the dielectric film 116 covers the upper surface of the first insulating film 118, that is, the surface of the first insulating film 118 opposite to the substrate 102.

The wiring board 150 having such a structure can be manufactured by the method shown below. First, as in the production of the wiring board 100, the first wiring 110, the lower wiring 112, and the upper wiring 114 are formed on the substrate 102, and then the first insulating film 118 is formed on these. The first insulating film 118 is provided with an opening in which the first wiring 110 and the upper wiring 114 overlap, and the first wiring 110 and the upper wiring 114 are exposed in the opening (FIG. 15A). After that, the first wiring 110 and the first wiring 110 cover the former two so as to be in contact with the upper surface of the first insulating film 118, that is, a part of the surface of the first insulating film 118 opposite to the substrate 102. A first dielectric film 116-1 and a second dielectric film 116-2 are formed on the third wiring 114-1, respectively (FIG. 15 (B)).

Subsequent steps are the same as in the production of the wiring board 100, in which the seed layer 132 is formed on the first insulating film 118 and the dielectric film 116, and then the resist mask 131 is formed (FIG. 15 (C)). Electroplating is performed by supplying power to the seed layer 132 exposed at the opening of the resist mask 131 to form the lead wiring 122. As a result, the second wiring 122-1 is placed on the first wiring 110 and the third wiring 114-1 via the first dielectric film 116-1 and the second dielectric film 116-2, respectively. , The fourth wiring 122-2 is formed, and the sixth wiring 122-3 is formed on the fifth wiring 114-2 (FIG. 16A). After this, the end portion of the lead wiring 122 is covered to form a second insulating film 126 having an opening overlapping with the lead wiring 122 (FIG. 16B).

In the manufacturing method described in the present embodiment, the first insulating film 118 is formed after the first wiring 110 and the upper wiring 114 are formed, and before the dielectric film 116 is formed. Therefore, the dielectric film 116 and the upper wiring 114 can be etched while the ends of the first wiring 110 and the upper wiring 114 are covered with the first insulating film 118. As a result, the side surface of the first wiring 110 or the upper wiring 114, the interface between the first wiring 110 or the upper wiring 114 and the seed layer 124, or the interface between the seed layer 124 and the substrate 102 is not exposed to the etchant, and the first Side etching and peeling of the wiring 110 and the upper wiring 114 can be prevented, and a highly reliable capacitive element can be formed.

Further, due to the difference between the thermal expansion rate of the substrate 102 and the thermal expansion rate of the first wiring 110 and the upper wiring 114, the substrate 102 may be cracked by heating during the formation of the dielectric film 116, but the dielectric may be cracked. By covering the first wiring 110 and the upper wiring 114 with the first insulating film 118 before forming the body film 116, the interface separation between the substrate 102 and the first wiring 110 and the upper wiring 114 is suppressed. Since the force is applied, the occurrence of cracks can be suppressed. Further, since the substrate heating temperature when forming the dielectric film 116 can be set high, it is possible to form the dielectric film 116 having a high dielectric constant, and thereby a capacitive element having a high dielectric strength can be formed.

Further, as with the wiring boards 100 and 150, the number of wiring forming steps is smaller than that of the conventional method for manufacturing a wiring board. Therefore, it is possible to manufacture the wiring board with a smaller number of steps.

(Fourth Embodiment)
In this embodiment, a wiring board 170 having a structure different from that of the wiring boards 100, 150, 160 and a method for manufacturing the wiring board 170 will be described. The description may be omitted for configurations that are the same as or similar to those of the first to third embodiments.

As schematically shown in the cross-sectional view of FIG. 17, one of the differences between the wiring boards 100, 150, 160 and the wiring board 170 is the first insulating film 118 located on the board 102 and in contact with the board 102. Is the same as or smaller than the thickness of the first wiring 110 or the sum of the seed layer 124 and the thickness of the first wiring 110. Further, the first insulating film 118 is formed so as to close the through hole 104. The wiring board 170 shown in FIG. 17 is provided with an upper electrode 123 between the first wiring 110 and the second wiring 122-1 and between the third wiring 114-1 and the fourth wiring 122-2. Has been done. In such a structure, the capacitance of the capacitive element is determined by the contact area between the dielectric film 116 and the seed layer 132 (when the seed layer 132 is not used, the contact area with the dielectric film 116 upper electrode 123). The upper electrode 123 is not an indispensable configuration, and the upper electrode 123 may not be provided as described later.

The wiring board 170 can be manufactured by the method shown below. First, the first wiring 110, the lower wiring 112, and the upper wiring 114 are formed on the substrate 102 in the same manner as in the method of manufacturing the wiring board 100. After that, as shown in FIG. 18A, the first insulating film 118 is formed. The thickness of the first insulating film 118 is the thickness of the first wiring 110 or the upper wiring 114, the sum of the thicknesses of the first wiring 110 and the seed layer 124, or the thickness of the upper wiring 114 and the seed layer 124. Is less than or equal to the sum of. The first insulating film 118 is formed by laminating a film-shaped photosensitive resin on the substrate 102 on which the wiring is formed, and performing exposure and development via a photomask. The lower insulating film 120 is provided on the second surface of the wiring board 100, that is, the surface of the wiring board 100 located on the substrate 102 side (FIG. 18B). The thickness of the lower insulating film 120 can be arbitrarily determined, and may be provided so as to be thicker than the first insulating film 118.

Subsequently, the dielectric film 116 is formed on the first wiring 110 and the third wiring 114-1 (FIG. 18 (C)), and the seed layer 132 is provided on the dielectric film 116 (FIG. 19 (A)). .. These formations may be performed by applying the method described in the first embodiment.

A resist mask 131 is formed on the seed layer 132, and the resist mask 131 is provided with an opening that overlaps with the dielectric film 116, the first wiring 110, and the third wiring 114-1 (FIG. 19A). ). As described above, since the through hole 104 is closed by the first insulating film 118, the resist mask 131 can be manufactured not only by using a film-like resist but also by using a liquid resist. That is, using a wet film forming method such as a spin coating method, a dip coating method, printing, or an inkjet method, a liquid resist is applied onto the seed layer 132, and exposure and development are performed via a photomask to perform a resist mask. 131 can be formed.

Compared with the film-shaped resist, the liquid resist can form a finer resist pattern more accurately, so that the shape of the resist mask 131 can be controlled more precisely. As can be seen from FIG. 17, the capacitance of the capacitive element of the wiring board 170 is determined by the contact area between the dielectric film 116 and the seed layer 132, which is determined by the area of the opening of the resist mask 131 (FIG. 19 (FIG. 19). A), FIG. 19 (B)). Therefore, by precisely controlling the patterning of the resist mask 131 using a liquid resist, the capacity can be accurately controlled. Although a specific description is omitted, the patterning of the dielectric film 116 may also be performed using a liquid resist.

Then, the upper electrode 123 is formed by electroplating (FIG. 19 (B)), the resist mask 131 is subsequently removed, and the seed layer 132 is etched (FIG. 19 (C)). After that, the second insulating film 126 is formed (FIG. 20 (A)). The second insulating film 126 has an opening overlapping the upper electrode 123 and the fifth wiring 114-2, and covers the ends thereof. The second insulating film 126 is formed to have a thickness larger than that of the first insulating film 118. These steps can be performed by the same method as that described in the first and second embodiments.

After that, the lead wiring 122 is formed in the same manner as the formation of the lead wiring 122 of the wiring board 100. That is, the seed layer 134 is formed on the second insulating film 126, the upper electrode 123 exposed at the opening, and the fifth wiring 114-2, and after forming the resist mask 131 (not shown), electrolytic plating is performed and the lead wiring is performed. 122 is formed on the upper electrode 123. As a result, the first wiring 110, the third wiring 114-1, the second wiring 122-1, the fourth wiring 122-2, and the second wiring 122-2 overlapping the fifth wiring 114-2 via the upper electrode 123. Wiring 122-3 of No. 6 is formed (FIG. 20 (B)).

After that, a third insulating film 128 is formed so as to cover the end portion of the lead wiring 122 (FIG. 20 (C)). The third insulating film 128 can be formed in the same manner as the second insulating film 126.

As described above, by applying this embodiment, it is possible to manufacture a wiring board having a precisely controlled capacity.

(Fifth Embodiment)
In this embodiment, a manufacturing method different from the manufacturing method of the wiring board 170 described in the fourth embodiment will be described. Specifically, four modified examples are shown below. The description may be omitted for the configurations that are the same as or similar to those of the first to fourth embodiments.
1. 1. First Modification Example In this modification, the upper electrode 123 is not provided, and the lead wiring 122 also serves as one electrode of the capacitive element. Specifically, as shown in FIG. 21 (A), the dielectric film 116 is formed, and then the second insulating film 126 is formed. The second insulating film 126 has an opening that overlaps with the first wiring 110 and the upper wiring 114, and covers the ends thereof.

After that, the seed layer 132 is formed on the second insulating film 126 and the dielectric film 116 exposed in the opening, the resist mask 131 is formed, the lead wiring 122 is formed by the electrolytic plating method, and the resist mask is formed. 131 and the seed layer 132 are removed (FIG. 21B). As a result, the second wiring 122-1 and the fourth wiring 122-1 are placed on the first wiring 110 and the third wiring 114-1 via the first dielectric film 116-1 and the second insulating film 126-2. Wiring 122-2 is formed, and a sixth wiring 122-3 is formed on the fifth wiring 114-2. After that, a third insulating film 128 is formed so as to cover the end portion of the lead wiring 122 (FIG. 21 (C)).

Also in this modification, the shape and size of the opening of the second insulating film 126 that determines the capacitance of the capacitive element is determined by the application of the liquid resist, the subsequent exposure, and the patterning by development. Since a liquid resist can be used as the resist, precise patterning is possible, and as a result, a wiring board having an accurate capacity can be provided. Further, as in the wiring board 100, since the lead wiring 122 also serves as one electrode of the capacitive element, the wiring forming step is less than that of the conventional method for manufacturing the wiring board, and the wiring board can be manufactured at a lower cost. It is possible.

2. 2. 2nd Modification Example FIGS. 22 (A) to 22 (D) show a process of manufacturing a capacitive element including the third wiring 114-1. In this modification, a case where the first insulating film 118 is formed by using a negative resist will be described. As shown in FIG. 22A, in this modification, when the photosensitive resin giving the first insulating film 118 is irradiated with light, the light-shielding portion 142 having a larger area than the third wiring 114-1 is provided. The formed photomask 140 is used. Then, the photomask 140 is installed so that the light-shielding portion 142 overlaps the third wiring 114-1 and the resist located outside the third wiring 114-1, and the exposure is performed. After that, by developing, as shown in FIG. 22B, the end portion of the third wiring 114-1 and the first insulating film 118 are separated from each other, and the first surface of the substrate 102 is exposed between them. do. Although not shown, a light-shielding portion having a larger area than these wirings is also arranged on the first wiring 110 and the fifth wiring 114-2. Through the subsequent developing process, the end of these wirings and the first insulating film 118 are separated from each other.

After that, the dielectric film 116 is formed (FIG. 22 (C)). The dielectric film 116 is in contact with the substrate 102 between the end of the third wiring 114-1 and the first insulating film 118. Similarly, the first dielectric film 116-1 comes into contact with the substrate 102 between the end of the first wiring 110 and the first insulating film 118.

Subsequent steps are the same as those of the fourth embodiment, and the second insulating film 126, the upper electrode 123, the lead wiring 122, and the third insulating film 128 are sequentially formed on the dielectric film 116 (FIG. 22 (FIG. 22). D)).

The above example is applied when a negative resist is used. On the other hand, when a positive resist is used, a photomask 140 having a translucent portion having a larger area than the first wiring 110 and the upper wiring 114 is used, and the translucent portion is these wirings. A photomask 140 may be installed so as to overlap the outside of the photomask and exposed to light.

In the example shown in FIGS. 22A to 22D, the upper electrode 123 is provided between the upper wiring 114 and the lead wiring 122, but the upper electrode 123 is provided as in the first modification. It does not have to be.

As described above, the dielectric film 116 is in contact with the substrate 102 between the end of the first wiring 110 or the upper wiring 114 and the first insulating film 118, and as a result, as shown in FIG. 22 (C). A step (arrow) is generated. Since the second insulating film 126 enters this step (FIG. 22 (D)), the adhesion between the second insulating film 126 and the dielectric film 116 is improved by the anchor effect. As a result, the reliability of the wiring board can be improved.

3. 3. Third Modification Example In this modification, in contrast to the second modification, a light-shielding portion having a smaller area than the third wiring 114-1 when the resist that gives the first insulating film 118 is irradiated with light. A photomask 140 on which 142 is formed is used (FIG. 23 (A)). Then, the photomask 140 is arranged so that the light-shielding portion 142 does not overlap with the end portion of the third wiring 114-1, and exposure is performed. After that, by developing, as shown in FIG. 23B, a part of the first insulating film 118 covers the end portion of the third wiring 114-1, and the opening of the first insulating film 118 is the first. Wiring 114-1 of 3 is exposed. Although not shown, the same exposure method can be applied to the first wiring 110 and the fifth wiring 114-2.

After that, the dielectric film 116, the second insulating film 126, the lead wiring 122, and the third insulating film 128 are sequentially formed as in the first modification (FIGS. 23C and 23D). ).

In this modification, the size of the capacitance is determined by the contact area between the first wiring 110 and the first dielectric film 116-1, and the third wiring 114-1 and the second dielectric film 116-2. Is determined by the opening of the first insulating film 118. As described above, the first insulating film 118 is formed so as to have a small thickness. Therefore, even if the first insulating film 118 is formed by using a film-shaped resist, microfabrication is easy, and an opening having an accurate shape and size can be provided in the first insulating film 118. As a result, it is possible to reduce the variation in capacity.

4. Fourth Modification Example In this modification, when the first insulating film 118 is formed, the resist is exposed from the lower side of the substrate 102 (that is, the side where the lower wiring 112 is provided) (FIG. 24 (FIG. 24). A)). In the subsequent developing process, the first insulating film 118 is in contact with the side surface of the third wiring 114-1, and the portion in contact with the end of the third wiring 114-1 is a ridge (a portion surrounded by a dotted circle). give. Although not shown, the same applies to the first wiring 110 and the fifth wiring 114-2, and the side surface of these wirings and the first insulating film 118 are in contact with each other, and the first insulating film is formed at the end of these wirings. 118 has a ridge.

After that, the dielectric film 116 is formed, and a resist that gives the second insulating film 126 is provided on the dielectric film 116 (FIGS. 24 (C) and 24 (D)). The exposure at the time of forming the second insulating film 126 is also performed from the lower side of the substrate 102 (FIG. 24 (D)). By applying such a method, as shown in FIG. 25A, the side surface of the third wiring 114-1 and the side surface of the second insulating film 126 are present on the same plane. Subsequently, the seed layer 132 and the lead wiring 122 are formed (FIG. 25 (B)), and a third insulating film 128 that covers the end portion of the lead wiring 122 is formed (FIG. 25 (C)).

In this manufacturing method, since the side surface of the third wiring 114-1 and the side surface of the second insulating film 126 are present in the same plane, the side surface of the seed layer 132 in contact with the second insulating film 126 is also the third wiring 114. It becomes the same plane as the side surface of -1. In other words, the possibility that the positions of the lead wiring 122 and the seed layer 132 that function as one electrode of the capacitive element deviate from the positions of the third wiring 114-1 is eliminated. Therefore, it is not necessary to increase the area of the upper wiring 114 in consideration of the process margin, and the area occupied by the capacitive element can be reduced. As a result, the degree of freedom in designing the wiring board can be improved.

(Sixth Embodiment)
In this embodiment, a wiring board 180 having a structure different from that of the wiring boards 100, 150, 160, 170 and a method for manufacturing the wiring board 180 will be described. The description may be omitted for configurations that are the same as or similar to those of the first to fifth embodiments.

Except for the dielectric film 116, the wiring board 180 has the same number of layers of the insulating film provided on the substrate 102 and the same number of layers of the insulating film provided under the substrate 102. This is one of the differences from 160 and 170. In the example shown in FIG. 26, the insulating film provided on the substrate 102 is the first insulating film 118, and the insulating film provided under the substrate is the lower insulating film 120. The first insulating film 118 and the lower insulating film 120 can each be composed of a single layer or a plurality of layers, but the number of layers is the same. Further, the thicknesses of the first insulating film 118 and the lower insulating film 120 may be the same or substantially the same as each other. Further, the composition of the first insulating film 118 and the lower insulating film 120 may be the same.

The wiring board 180 can be manufactured by the method shown below. First, the first wiring 110, the lower wiring 112, and the upper wiring 114 are formed on the substrate 102, and then the dielectric film 116 is formed on the first wiring 110 and the upper wiring 114. After that, the lead wiring 122 is formed on the dielectric film 116 and on the fifth wiring 114-2 via the seed layer 132 (FIG. 27 (A)).

Subsequently, a first insulating film 118 having an opening overlapping the lead wiring 122 and a lower insulating film 120 covering the lower wiring 112 are formed by covering the end portion of the lead wiring 122 (FIG. 27 (B)). Although not shown, the lower insulating film 120 may have an opening that overlaps with the lower wiring 112. As a result, the wiring board 180 is manufactured.

As shown in FIG. 28A and its enlarged view (FIG. 28B), the second wiring 122-1 and the fourth wiring 122-2 forming the capacitive element are the first wiring 110. It may be provided so as to cover the side surface of the third wiring 114-1 and the dielectric film 116. With such a structure, the side surfaces of the first wiring 110, the third wiring 114-1, and the dielectric film 116 can also be used as a part of the capacitive element, and the capacitance per unit area of the capacitive element can be increased. Can be done. Therefore, the capacity element can be miniaturized, and the degree of freedom in designing the wiring board is improved.

Normally, when insulating films are provided above and below the substrate, the insulating film exerts stress on the substrate due to the difference in thermal expansion coefficient between the substrate and the insulating film. If the magnitudes of stress applied by the upper and lower insulating films are different, the board will warp, which will have a great adverse effect on the performance and reliability of the wiring board. However, by adopting the above-mentioned structure, the stress received from above and below the substrate 102 can be canceled out, the warp of the substrate 102 can be prevented, and the reliability of the wiring board can be improved.

(7th Embodiment)
In this embodiment, the semiconductor module using the wiring board described in the first to sixth embodiments will be described. Here, as an example, the semiconductor module including the wiring board 100 will be described with reference to FIGS. 29 to 31.

The semiconductor module 200 shown in FIG. 29 has a main substrate 202 and a plurality of wiring boards 100-1, 100-2, 100-3 laminated on the main substrate 202. The number of wiring boards 100 is not limited, and is determined according to the performance required for the semiconductor module 200. Various semiconductor chips (memory devices, central arithmetic units) and semiconductor elements (microelectromechanical systems (MEMS), etc.) (not shown) are connected to the main substrate 202. As described in the first embodiment, the wiring board 100 has a first wiring 110, a lower wiring 112, and an upper wiring 114, which function as terminals in the semiconductor module 200. The first wiring 110 of the wiring board 100-1 of the lowest layer is electrically connected to the terminal 204 provided on the main board 202 via the bump 206. Further, the laminated wiring boards 100-1, 100-2, and 100-3 are also electrically connected to each other by the bump 206. The bump 206 contains a metal such as indium, copper, gold, or an alloy such as solder.

Like the semiconductor module 210 shown in FIG. 30, the laminated wiring boards 100 may be different in size and shape from each other, and the number of the wiring boards 100 laminated on the main board 202 may also be different. In the example shown in FIG. 30, two wiring boards 100-4 and 100-5 are laminated in a part of the area, and three wiring boards 100-1, 100-2 and 100-3 are laminated in a part of the area. Has been done.

The semiconductor module 220 shown in FIG. 31 has a structure in which a plurality of semiconductor chips (or semiconductor elements) 208-1 and 208-2 are laminated on a main substrate 202 via a wiring substrate 100. Terminals 212 and 213 are formed on the semiconductor chips 208-1 and 208-2, respectively, and these are electrically connected to the first wiring 110 and the upper wiring 114 of the wiring board 100 via the bump 206. As a result, the semiconductor chips 208-1 and 208-2 are electrically connected to each other. Further, the semiconductor chip 208-2 and the main board 202 may be electrically connected by the wire wiring 214.

Each of the above-described embodiments as the embodiments of the present disclosure can be appropriately combined and implemented as long as they do not contradict each other. Further, as long as the gist of the present disclosure is provided, those skilled in the art who appropriately add, delete, or change the design based on each embodiment are also included in the scope of the present disclosure.

In addition, even if the effects are different from the effects brought about by each of the above-described embodiments, those that are clear from the description of the present specification or those that can be easily predicted by those skilled in the art are of course. It is understood to be brought about by this disclosure.

100: wiring board, 102: board, 104: through hole, 110: first wiring, 112: lower wiring, 114: upper wiring, 114-1: third wiring, 114-2: fifth wiring, 116 : Dielectric film, 116-1: First dielectric film, 116-2: Second dielectric film, 118: First insulating film, 120: Lower insulating film, 122: Lead wiring, 122-1: 2nd wiring, 122-2: 4th wiring, 122-3: 6th wiring, 123: upper electrode, 124: seed layer, 126: second insulating film, 128: third insulating film, 130 : Resist, 131: Resist mask, 132: Seed layer, 134: Seed layer, 140: Photomask, 142: Shading part, 150: Wiring board, 160: Wiring board, 170: Wiring board, 180: Wiring board, 200: Semiconductor module, 202: Main board, 204: Terminal, 206: Bump, 208: Semiconductor chip, 210: Semiconductor module, 212: Terminal, 213: Terminal, 214: Wire wiring, 220: Semiconductor module

Claims (32)

A substrate having a first surface and a second surface located on the opposite side of the first surface, and having a through hole penetrating from the first surface to the second surface.
A first wiring that continuously covers the side wall of the through hole, the first surface, and the second surface.
The first dielectric film on the first wiring and
A first insulating film having an opening overlapping the first dielectric film on the first dielectric film.
It has a second wiring that is located on the first insulating film and overlaps with the first wiring.
The second wiring is
It has a first seed layer and a first lead wire on the first seed layer.
A wiring board in which the interface between the first seed layer and the first insulating film is located on the same plane as the side surface of the first wiring. The wiring board according to claim 1, wherein the second wiring covers the first insulating film. It has a second insulating film on the second wiring.
The wiring board according to claim 1, wherein the second insulating film has an opening overlapping with the second wiring. A third wire located on the substrate and existing in the same layer as the first wire.
A second dielectric film located on the third wiring and covered with the first insulating film, and
The wiring board according to claim 1, further comprising a fourth wiring located on the first insulating film and overlapping the third wiring and the second dielectric film. The fourth wiring is
It has a second seed layer and a second lead wire on the second seed layer.
The wiring board according to claim 4, wherein the interface between the second seed layer and the first insulating film is located on the same plane as the side surface of the third wiring. A substrate having a first surface and a second surface located on the opposite side of the first surface, and having a through hole penetrating from the first surface to the second surface.
A first wiring that continuously covers the side wall of the through hole, the first surface, and the second surface.
A first insulating film located on the first wiring and having an opening overlapping with the first wiring.
A first dielectric film located on the first insulating film and covering the opening,
It has a second wire that is located on the first dielectric film and overlaps the first wire.
A wiring board in which the entire bottom surface of the first insulating film is in contact with the first wiring in a region where the first insulating film and the first dielectric film overlap. The wiring board according to claim 6, further comprising a metal layer between the first dielectric film and the second wiring, which is in contact with the first dielectric film and the second wiring. The wiring board according to claim 6, wherein the first dielectric film is in contact with a surface of the first insulating film located on the opposite side of the substrate. The wiring board according to claim 6, wherein the second wiring covers the first insulating film. The wiring board according to claim 6, further comprising a second insulating film located on the second wiring and having an opening overlapping the second wiring. A third wiring that is located on the substrate, exists in the same layer as the first wiring, and is covered with the first insulating film.
A second dielectric film located on the first insulating film and overlapping with the third wiring,
The wiring board according to claim 6, further comprising a fourth wiring located on the second dielectric film and overlapping the third wiring. A substrate having a first surface and a second surface located on the opposite side of the first surface, and having a through hole penetrating from the first surface to the second surface.
A first wiring that continuously covers the side wall of the through hole, the first surface, and the second surface.
A first insulating film that is located on the substrate, is in contact with the substrate, is thinner than the first wiring, and covers the through hole.
The first dielectric film on the first wiring and
It has a second wire that is located on the first dielectric film and overlaps with the first wire.
The first dielectric film is a wiring board that is in contact with the first wiring in a region where the first wiring and the second wiring overlap. 12. The wiring board according to claim 12, further comprising a metal layer between the first dielectric film and the second wiring, which is in contact with the first dielectric film and the second wiring. The wiring board according to claim 12, further comprising a second insulating film having an opening overlapping the second wiring on the second wiring. The wiring board according to claim 14, further comprising a lead wiring covering the opening on the second wiring. A third wire located on the substrate and existing in the same layer as the first wire.
With the second dielectric film on the third wiring,
The wiring board according to claim 12, further comprising a fourth wiring located on the second dielectric film and overlapping the third wiring. To form a through hole penetrating from the first surface to the second surface on a substrate having a first surface and a second surface located on the opposite side of the first surface.
Forming the first wiring so as to continuously cover the side wall of the through hole, the first surface, and the second surface.
Forming a first dielectric film on the first wiring on the first surface,
Forming a photosensitive resin on the first dielectric film,
By exposing the photosensitive resin from the second surface side and then developing the photosensitive resin, the first insulating film having an opening for exposing the first dielectric film is obtained from the first insulating film. Forming on a dielectric film,
A method for manufacturing a wiring board, which comprises forming a second wiring covering the opening. The manufacturing method according to claim 17 , wherein the second wiring is formed so as to cover the first insulating film. Forming a second insulating film on the second wiring,
17. The fabrication method according to claim 17 , further comprising forming an opening in the second insulating film that exposes the second wiring. Forming a third wiring on the substrate at the same time as the first wiring,
Forming a second dielectric film on the third wiring at the same time as the first dielectric film.
Further comprising forming a fourth wire on the second dielectric film.
The production method according to claim 17 , wherein the photosensitive resin is formed so as to cover the second dielectric film. To form a through hole penetrating from the first surface to the second surface on a substrate having a first surface and a second surface located on the opposite side of the first surface.
Forming the first wiring so as to continuously cover the side wall of the through hole, the first surface, and the second surface.
Forming the first insulating film on the first wiring,
To form an opening in the first insulating film that exposes the first wiring.
Forming a first dielectric film covering the opening,
Including forming a second wiring that overlaps with the first wiring on the first dielectric film.
A method for manufacturing a wiring board, wherein the first insulating film is formed so that the entire bottom surface of the first insulating film is in contact with the first wiring in a region overlapping the first wiring. Further comprising forming a metal film in contact with the first dielectric film on the first dielectric film.
The manufacturing method according to claim 21 , wherein the second wiring is formed so as to be in contact with the metal film. The production method according to claim 21 , wherein the first dielectric film is formed so as to cover the first insulating film. The production method according to claim 21 , wherein the second wiring is formed so as to cover the first insulating film. Forming a second insulating film on the second wiring,
21. The production method according to claim 21 , further comprising forming an opening in the second insulating film that exposes the second wiring. Forming a third wiring on the substrate at the same time as the first wiring,
Forming a second dielectric film on the third wiring at the same time as the first dielectric film.
Further comprising forming a fourth wiring on the second dielectric film that overlaps the third wiring.
The first insulating film is formed so as to cover the third wiring and has an opening overlapping with the third wiring.
The production method according to claim 21 , wherein the second dielectric film and the third wiring are formed so as to overlap with the opening overlapping with the third wiring. To form a through hole penetrating from the first surface to the second surface on a substrate having a first surface and a second surface located on the opposite side of the first surface.
Forming the first wiring so as to continuously cover the side wall of the through hole, the first surface, and the second surface.
Forming a first insulating film thinner than the first wiring on the substrate so as to be in contact with the substrate.
Forming the first dielectric film on the first wiring,
Including forming a second wiring that overlaps with the first wiring on the first dielectric film.
A method for manufacturing a wiring board, wherein the first dielectric film is formed so as to be in contact with the first wiring in a region where the first wiring and the second wiring overlap. The production method according to claim 27 , wherein the first insulating film is formed so as to cover the through hole. Further comprising forming a metal film in contact with the first dielectric film on the first dielectric film.
The manufacturing method according to claim 27 , wherein the second wiring is formed so as to be in contact with the metal film. Forming a second insulating film on the second wiring,
27. The manufacturing method according to claim 27 , further comprising forming an opening overlapping the second wiring in the second insulating film. 30. The fabrication method of claim 30 , further comprising forming lead wiring covering the opening. Forming a third wiring on the substrate at the same time as the first wiring,
Forming a second dielectric film on the third wiring at the same time as the first dielectric film.
27. The production method according to claim 27 , further comprising forming a fourth wiring that overlaps with the third wiring on the second dielectric film.

Images