JP7088063B2 - Unit parallel inverter - Google Patents

Description

The present invention relates to a unit parallel inverter that performs interleave drive, and particularly relates to dead time compensation.

Patent Documents 1 and 2 and Non-Patent Document 1 disclose a method called interleaving in which a plurality of inverter units are connected in a power conversion device to shift the phase of the gate signal of the switching element of each unit.

FIG. 1 shows a configuration in which three units are arranged in parallel. Interleaving has the feature that the ripples generated by each unit can cancel each other out. In the total output current on the DC side, the capacity of the DC capacitor can be reduced by reducing the ripple, and the effects of cost reduction and miniaturization can be obtained. The total AC output current can reduce ripple and total harmonic distortion THD (Total Harmonic Distortion), which is effective for application to high-quality power supply devices.

On the other hand, there is a problem that a ripple having a large switching frequency is superimposed on the output current on the AC side of each unit.

The main circuit of the unit parallel inverter has a configuration in which units in which two switching elements are connected in series to a DC capacitor are connected in parallel, and the connection point of the two switching elements in each unit is an AC side output terminal OUT.

If two switching elements are turned on at the same time in each unit, the DC capacitor will be short-circuited. In order to prevent a short circuit, a dead time is inserted to turn off both switching elements for several μs. Since it is not possible to output the expected voltage during the dead time, which causes voltage distortion and deterioration of THD, a method for compensating for the dead time is being studied.

Patent Documents 3 and 4 disclose an example of a dead time compensation method. Since the unit output voltage during the dead time depends on the direction of the unit output current, Patent Document 3 detects the sign of the unit output current and selects whether to delay the rise or fall of the gate command.

Similarly, there is also a method of superimposing an offset on the voltage command value, and the sign of the offset is determined by the direction of the unit output current. In Patent Document 4, the gate command and the actual output voltage are compared, the time at which the difference occurs is measured by a counter, and the amount proportional to the counter is fed back to the voltage command value to compensate for the dead time.

Japanese Unexamined Patent Publication No. 2011-061901 Japanese Unexamined Patent Publication No. 2013-220028 Japanese Unexamined Patent Publication No. 60-118802 Japanese Unexamined Patent Publication No. 3-89868

Quick reaction and low-distortion curve control control for multi-type inverter-fed induction motor drives

FIG. 17 shows an example in which the dead time during interleave driving becomes a problem. The main circuit configuration of FIG. 17 is shown in FIG. 1, and constant output current control is performed. A large ripple is superimposed on the unit current detection value i1, and the unit current detection value i1 at the time of switching is negative at time A and positive at time B.

The dead time occurs at the times A and B when the unit output voltage v1 is switched, and the unit output voltage during the dead time has a sign opposite to the unit current detection value. A positive voltage is output at time A and a negative voltage is output at time B, canceling each other out, and the expected voltage is output.

Here, consider the case where the voltage of the load suddenly changes. When the duty ratio of the unit output voltage v1 changed, the ripple of the unit current detection value i1 also changed, and the unit current detection value i1 at the time of switching became positive at both time C and D. The unit output voltage v1 during the dead time becomes negative at both times C and D, and the output voltage becomes lower than expected. As a result, the total value i1 + i2 + i3 of the unit current detection values is slightly reduced. It takes time corresponding to the response speed of the constant output current control until the current returns to the original value. Such current fluctuations are particularly problematic when applied to high quality power supplies.

As a countermeasure, application of dead time compensation can be considered. However, in the method of Patent Document 3, it is necessary to accurately detect the current amplitude at times A, B, C, and D. For that purpose, a current detector that can detect high frequency components without delay or attenuation is required. If the control is performed digitally, a high-speed A / D converter is also required, which increases the cost.

Since the method of Patent Document 4 does not require current detection, appropriate dead time compensation can be performed even if interleaving is applied. However, a voltage detector, a port for inputting the signal to the printed circuit board, a counter, and the like are separately required for each inverter arm, and the method of Patent Document 4 also causes an increase in cost. There is also a method of magnetically coupling the reactor to reduce the current ripple, but this also increases the cost and causes a problem that the wiring becomes complicated when the number of units connected in parallel increases.

In an inverter that does not perform interleaving, the ripple superimposed on the unit output current is usually as small as 10% or less, and a sharp change in the unit output current does not occur. Therefore, even if the dead time compensation according to Patent Document 3 is performed using the signal obtained by removing the ripple from the unit output current, there is no problem in most cases.

However, when interleaving is performed, the DC voltage is short-circuited via the reactor, so that the slope of the unit output current becomes large, large ripples are superimposed, and it may exceed 20% depending on the design. Under such conditions, the direction of the unit output current within and outside the dead time period often differs, and the possibility of a problem increases.

From the above, it is an issue to realize dead time compensation at low cost in an interleaved unit parallel inverter.

The present invention has been devised in view of the above-mentioned conventional problems, and one aspect thereof is a unit parallel inverter in which units having two switching elements connected in series are connected in parallel to perform interleave drive. Based on the inter-unit current control unit that outputs the inter-unit voltage command value to make the average current of each unit current detection value in one carrier triangle wave equal to the average value of the unit current detection values of all units, and the duty ratio. A switching current estimator that outputs the difference between the average current and the turn-on current and the difference between the average current and the turn-off current for each unit, and the turn-on current based on the average current and the difference. The dead time compensation amount output unit that determines the code and the code of the turn OFF current and outputs the dead time compensation amount based on the code of the turn ON current and the code of the turn OFF current, the voltage command value, and the unit. It is characterized by including a PWM control unit that compares a value obtained by adding an inter-voltage command value and the dead time compensation amount with the carrier triangular wave and adds a dead time to generate a gate signal.

Further, as one aspect thereof, the unit parallel inverter is a chopper in which a load is connected between an AC side output terminal and a DC side negative terminal of an inverter in which two units are connected in parallel, or two units are connected in parallel. It is a three-phase inverter equipped with three inverters and the AC side output terminals of the three inverters are connected to the load. The difference between the average current and the turn-on current of the first unit is the following equation (1), said. The difference between the average current and the turn-off current of the first unit is the following equation (2), and the difference between the average current and the turn-on current of the second unit is the following equation (2), the average current and the second. The difference between the two units and the turn-off current is the following equation (1).

However, I _c : average current V _dc : DC voltage T: time of one cycle of carrier triangle wave Δt: duty ratio L: inductance of reactor.

As another aspect, the unit parallel inverter is a single-phase inverter provided with two inverters in which the two units are connected in parallel, and the AC side output terminals of the two inverters are connected to a load, and the average. The difference between the current and the turn-on current of the first unit in each inverter is the following equation (3), and the difference between the average current and the turn-off current of the first unit in each inverter is the following equation (4). The difference between the average current and the turn-on current of the second unit in each inverter is the following equation (5), and the difference between the average current and the turn-off current of the second unit in each inverter is the following (6). It is characterized by making it an expression.

However, V _dc : DC voltage T: Time of one cycle of carrier triangle wave Δt: Duty ratio L: Inductance of reactor.

As another embodiment, the unit parallel inverter is a chopper in which a load is connected between an AC side output terminal and a DC side negative terminal of an inverter in which three units are connected in parallel, or three units are connected in parallel. It is a three-phase inverter equipped with three connected inverters and the AC side output terminals of the three inverters are connected to the load. The difference between the average current and the turn-on current is the following equation (7), the average current. The difference between the turn-off current and the turn-off current is characterized by the following equation (8).

However, V _dc : DC voltage T: Time of one cycle of carrier triangle wave Δt: Duty ratio L: Inductance of reactor.

As another aspect, the unit parallel inverter is a single-phase inverter having two inverters in which the three units are connected in parallel and the AC side output terminals of the two inverters connected to the load, and the average current. The difference between the above and the turn-on current of the first unit in each inverter is the following equation (9), and the difference between the average current and the turn-off current of the first unit in each inverter is the following equation (10). The difference between the average current and the turn-on current of the second unit in each inverter is the following equation (11), and the difference between the average current and the turn-off current of the second unit of each inverter is the following equation (12). The difference between the average current and the turn-on current of the third unit of each inverter is the following equation (13), and the difference between the average current and the turn-off current of the third unit of each inverter is the following (14). ) Is used.

However, V _dc : DC voltage T: Time of one cycle of carrier triangle wave Δt: Duty ratio L: Inductance of reactor.

As another aspect, each unit is a 3-level inverter that outputs a 3-level voltage, and when the value obtained by multiplying the AC side output voltage by 2 and dividing by the DC voltage is larger than 1, the AC The duty ratio is the value obtained by subtracting 1 from the value obtained by dividing the value obtained by multiplying the side output voltage by 2 by the DC voltage, and the value obtained by dividing the value obtained by multiplying the AC side output voltage by 2 by the DC voltage is 1. In the following cases, the duty ratio is a value obtained by dividing the value obtained by multiplying the AC side output voltage by 2 by the DC voltage, and the output of the switching current estimator is multiplied by 1/2.

As another aspect, each unit is a three-level inverter that outputs a three-level voltage, and when the voltage command value is larger than 0, the voltage command value is set as the duty ratio, and the voltage command value is 0 or less. In the case of, the duty ratio is a value obtained by adding 1 to the voltage command value, and the output of the switching current estimator is multiplied by 1/2.

According to the present invention, it is possible to realize dead time compensation at low cost in an interleaved drive unit parallel inverter.

The block diagram which shows an example of the main circuit of a unit parallel inverter. The block diagram which shows the control part of Embodiments 1 to 4. The block diagram which shows the unit parallel inverter of unit 2 parallel. The explanatory view which shows the operation of the unit parallel inverter in Embodiment 1. FIG. Unit 2 A time chart showing waveforms of unit output voltage and unit current detection values in a chopper and a three-phase inverter in parallel. The graph which shows the relationship between the input (horizontal axis) and the output (vertical axis) of the switching current estimator in Embodiment 1. FIG. The figure which shows the relationship between the duty ratio and the output of a switching current estimator. The graph which shows the relationship between the input (horizontal axis) and the output (vertical axis) of the switching current estimator in Embodiment 2. FIG. Unit 2 A time chart showing waveforms of unit output voltage and unit current detection value in a single-phase inverter in parallel. The graph which shows the relationship between the input (horizontal axis) and the output (vertical axis) of the switching current estimator in Embodiment 3. FIG. The block diagram which shows the unit parallel inverter of unit 3 parallel. A time chart showing waveforms of unit output voltage and unit current detection values in a chopper and a three-phase inverter in parallel with unit 3. The graph which shows the relationship between the input (horizontal axis) and the output (vertical axis) of the switching current estimator in Embodiment 4. Unit 3 A time chart showing waveforms of unit output voltage and unit current detection value in a single-phase inverter in parallel. The figure which shows an example of the unit parallel inverter of a three-level inverter. The block diagram which shows the calculation part of the duty ratio of Embodiment 5. The figure which shows an example of the operation when a voltage fluctuation occurs in an interleave drive / constant output current control.

Hereinafter, embodiments 1 to 5 of the unit parallel inverter in the present invention will be described in detail with reference to FIGS. 1 to 16.

[Embodiment 1]
FIG. 1 is a configuration diagram showing an example of a main circuit configuration of a unit parallel inverter. Each unit has two switching elements 1U, 1X, and 2U, 2X, and 3U, 3X connected in series. In the unit parallel inverter shown in FIG. 1, three units per phase are connected in parallel via a reactor L. The current detection values i1, i2, i3 of each unit are detected by the current detector and used for control. The DC voltage Vdc and the AC side output voltage Vo of the unit parallel inverter are also detected by using the voltage detector.

In FIG. 1, the DC voltage source DC is connected to the DC side, but a capacitor, a diode rectifier, or another power conversion device may be connected.

If only one configuration (inverter) shown in FIG. 1 is used and the AC side output terminal OUT and the DC side negative terminal are connected to the load, it becomes a chopper. If two units (inverters) of FIG. 1 are used, the AC side output terminals OUT of each inverter are connected to both ends of the load, and the DC side potential is shared, a single-phase inverter is obtained. Similarly, if three units (inverters) of FIG. 1 are used, the AC side output terminal OUT of each inverter is connected to the load, and the DC side potential is shared, a three-phase inverter is obtained.

FIG. 2 shows an example of the control unit in the unit parallel inverter. The filters f1, f2, and f3 remove noise and switching ripples above the carrier frequency from the unit current detection values i1, i2, and i3, and obtain the average current per carrier triangular wave cycle.

Next, the inter-unit current control unit 20 will be described. The inter-unit current control unit 20 includes an adder 1, a multiplier 2, subtractors 3a, 3b, 3c, and proportional amplifiers P1, P2, and P3. The adder 1 sums the outputs of the filters f1, f2, and f3. The multiplier 2 multiplies the output of the adder 1 by 1/3, and obtains the average value of the unit current detection values i1, i2, and i3 in all the units. The multiplier of the multiplier 2 is the reciprocal of the number of units in parallel, and if it is 2 in parallel, it becomes 1/2.

The subtractors 3a, 3b, and 3c obtain the deviation between the average value of the unit current detection values of all the units and the average current of each unit current detection value i1, i2, i3 per carrier triangular wave cycle. The proportional amplifiers P1, P2, and P3 amplify the outputs of the subtractors 3a, 3b, and 3c, and between the units for equalizing the average current per carrier triangular wave cycle of the unit current detection values i1, i2, and i3 to the average value. Outputs the voltage command value.

The filters f4 and f5 remove noise from the AC side output voltage Vo and the DC voltage detection value Vdc. The divider 4 obtains Vo / Vdc after noise removal. If it is known that the DC voltage detection value Vdc after normalization is around 1, approximation by Vo × (2-Vdc) instead of division can reduce the calculation load.

The switching current estimator 5 inputs the duty ratio Δt = (Vo / Vdc), and calculates the difference between the average current per cycle of the carrier triangular wave of the unit current detection values i1, i2, and i3 and the turn-off current / turn-on current. Output. The details of the switching current estimator 5 differ depending on each embodiment.

Next, the dead time compensation amount output unit 30 will be described. The dead time compensation amount output unit 30 includes adders 6a to 6f, code determination devices 7a to 7f, adders 8a to 8c, and multipliers 9a to 9c.

The adder 6a adds the average current per cycle of the carrier triangular wave of the unit current detection value i1 and the output of the switching current estimator 5, and obtains the turn-on current of the first unit. The adder 6b adds the average current per cycle of the carrier triangular wave of the unit current detection value i1 and the output of the switching current estimator 5, and obtains the turn-off current of the first unit. The sign determining devices 7a and 7b output 1 if the sign of the turn ON current / turn OFF current output by the adders 6a and 6b is positive, and -1 if the sign is negative. The adder 8a adds the outputs of the sign determination devices 7a and 7b. The multiplier 9a multiplies the output of the adder 8a by the gain Gdtc, and outputs the dead time compensation amount of the first unit. For the second and third units, the dead time compensation amount is obtained by the same configuration.

The voltage command value V * is given as a fixed value, and may be determined by current control or voltage control.

The adders 10a to 10c add the voltage command value V *, the outputs of the proportional amplifiers P1, P2, and P3 (inter-unit voltage command values), and the outputs of the multipliers 9a, 9b, and 9c (dead time compensation amount), respectively. match. The PWM modulator PWM compares the outputs of the adders 10a to 10c with the carrier triangle wave, adds a dead time, and outputs the gate signals G1U, G1X, G2U, G2X, G3U, and G3X. The gate signals G1U, G1X, G2U, G2X, G3U, G3X are input to the corresponding switching elements 1U, 1X, 2U, 2X, 3U, 3X of FIG.

In the first embodiment, a chopper in which a load is connected between the AC side output terminal OUT and the DC side minus terminal of an inverter in which two units are connected in parallel, or three inverters in which two units are connected in parallel are provided. It is assumed that the AC side output terminal OUT of three inverters is applied to a three-phase inverter connected to a load. A method of estimating the current during switching under this condition will be described with reference to FIG. In FIG. 3, the load is a _2IC current source. In FIG. 3, V1 shows the voltage between the connection point of the switching elements 1U and 1X and the DC side negative terminal, and V2 shows the voltage between the connection point of the switching elements 2U and 2X and the DC side negative terminal.

The operation will be described with reference to FIG. In FIG. 4, _2IC = 0. During the period (1) when V1 is Vdc and V2 is 0, the unit current detection value i1 is positive, and the unit current detection value i2 is negative, the switching elements 1U and 2X are turned on and the switching elements 2U and 1X are turned off. .. The current flows in the path of Vdc → 1U → 2X.

During the period (2) when V1 is 0 and V2 is 0, the switching elements 1X and 2X are turned on and the switching elements 1U and 2U are turned off. The current flows in the path of 1X → 2X.

During the period (3) when V1 is 0, V2 is Vdc, the unit current detection value i1 is positive, and the unit current detection value i2 is negative, the switching elements 2U and 1X are turned on and the switching elements 1U and 2X are turned off. .. The current flows in the path of 1X → 2U.

During the period (4) when V1 is 0, V2 is Vdc, the unit current detection value i1 is negative, and the unit current detection value i2 is positive, the switching elements 2U and 1X are turned on and the switching elements 1U and 2X are turned off. .. The current flows in the path of Vdc → 2U → 1X.

During the period (5) when V1 is 0 and V2 is 0, the switching elements 1X and 2X are turned on and the switching elements 1U and 2U are turned off. The current flows in the path of 2X → 1X.

During the period (6) when V1 is Vdc and V2 is 0, the unit current detection value i1 is negative, and the unit current detection value i2 is positive, the switching elements 1U and 2X are turned on and the switching elements 2U and 1X are turned off. .. The current flows in the path of 2X → 1U.

The unit current detection values i1 and i2 in FIGS. 3 and 4 can be obtained by calculation. FIG. 5 shows the waveforms of the unit current detection values i1 and i2 when the unit current detection values i1 and i2 at the time when the unit output voltage v1 changes from ₀ to Vdc are defined as the average current IC.

In FIG. 5, T indicates the time of one cycle of the carrier triangular wave, and Δt indicates the duty ratio. In FIG. 5, since the phase of the carrier triangle wave is 180 deg out of phase between the first unit and the second unit, the unit output voltages v1 and v2 also have a phase difference of 180 deg.

When the unit output voltage v1 and the unit output voltage v2 are equal, the unit current detection values i1 and i2 are constant, and when v1 = Vdc and v2 = 0, the voltage of Vdc / 2 is applied to the reactor L, so that the unit The current detection value i1 increases with a slope Vdc / 2L, and the unit current detection value i2 decreases with a slope Vdc / 2L. The part indicated by the circle in FIG. 5 is the current at the time of switching. It can be seen that switching is always performed at the current peak.

In FIG. 5, the reference point of the current is the time when v1 changes from 0 to Vdc. When the current during switching based on the average current IC per carrier triangle wave cycle is obtained, the turn _- on current of the upper arm of the first unit (that is, the average current IC and the turn _- on current of the upper arm of the first unit) is obtained. (Difference from) is given by the following equation (1). Note that L in Eq. (1) indicates the inductance of the reactor L.

The turn-off current of the upper arm of the first unit (that is, the difference between the average current _IC and the turn _- off current of the upper arm of the first unit) with respect to the average current IC is given by the following equation (2).

Since the current waveform of the second unit is vertically symmetrical, it can be obtained by the same equation. However, the turn ON current and the turn OFF current are opposite. That is, the difference between the average current IC and the turn-on current of the upper arm of the second unit is the equation (2), and the difference between the average current _IC and the turn _- off current of the upper arm of the second unit is the equation (1). Become. FIG. 6 shows the relationship between the duty ratio Δt = Vo / Vdc and the difference between the average current, the turn ON current (broken line), and the turn OFF current (solid line), that is, the input and output of the switching current estimator 5 of the first embodiment. Show the relationship.

In the first embodiment, instead of detecting the current at the time of switching, the current at the time of switching is estimated from the average current and the duty ratio per carrier triangular wave cycle of the unit current detection values i1, i2, i3, and the dead time is estimated. Used for compensation.

FIG. 7 shows the difference between the average current IC and the turn ON current and the turn OFF current when the duty ratio Δt is small (close to ₀ ), and the average current _IC and the turn when the duty ratio Δt is close to 1/2. It is a figure which shows the difference between an ON current and a turn OFF current. As shown in FIG. 7, when the duty ratio Δt is small (close to ₀ ), the amplitudes of the unit current detection values i1 and i2 are small, and the difference between the average current IC and the turn-on current and turn-off current is also small. .. When the duty ratio Δt is close to 1/2, the amplitudes of the unit current detection values i1 and _i2 become large, and the difference between the average current IC and the turn ON current and the turn OFF current also becomes large. In the first embodiment, when the duty ratio Δt is 1/2, the difference between the average current IC and the turn _- on current and the turn-off current becomes the largest, and then decreases.

From the above, the difference between the average current IC per cycle of the carrier triangle wave and the turn _- on current and turn-off current can be estimated from the duty ratio Δt by calculation. The average current IC per cycle of the carrier triangle wave can be obtained by filtering the current detection values _i1 , i2, and i3. These are added to obtain the turn ON current and turn OFF current, which are used for dead time compensation.

Here, Vo / Vdc is used as the duty ratio Δt, but a voltage command value V * can also be used. In a two-level inverter, when the carrier triangle wave changes in the range of -1 to 1, the duty ratio is expressed by the voltage command value V *, which is Δt = (V * + 1) / 2. This may be input to the switching current estimator 5.

As shown above, according to the first embodiment, in the unit parallel inverter that performs interleave drive, a high-speed current detector, an A / D converter, an output voltage detector of each inverter arm, a feedback circuit, a counter, and a coupling are used. No need for a reactor. Therefore, appropriate dead time compensation can be performed at low cost and with a small number of parts. As a result, it is possible to reduce the distortion of the output voltage / current and the fluctuation of the output voltage / current at the time of sudden load change, improve the output power quality, and reduce the size of the filter reactor and the capacitor in the inverter output.

The first embodiment includes a chopper in which a load is connected between the AC side output terminal OUT and the DC side minus terminal of an inverter in which two units are connected in parallel, or three inverters in which two units are connected in parallel. It can be applied to a three-phase inverter in which the AC side output terminal OUT of three inverters is connected to the load.

[Embodiment 2]
In the second embodiment, the switching current estimator 5 is different from the first embodiment. FIG. 8 shows the relationship between the input and the output of the switching current estimator 5 of the second embodiment.

In the second embodiment, it is assumed that two inverters in which two units are connected in parallel are provided and the AC side output terminal OUT of the two inverters is applied to a single-phase inverter connected to a load. In a single-phase inverter, it is necessary to set the carrier phase difference to 90 deg. The waveforms of the unit current detection values i1 and i2 under this condition are shown in FIG.

Unlike the first embodiment, the case classification is divided into three with the duty ratios Δt of 0.25 and 0.75 as boundaries. From FIG. 9, when the current at the time of switching is obtained based on the average current IC per cycle of the carrier triangular waves of the unit current detection values i1 and i2, the turn _- on current of the upper arm in the first unit (that is, the average current IC ₎ is obtained. And the difference between the turn-on current of the upper arm of the first unit) is given by the following equation (3).

The turn _- off current of the upper arm in the first unit with respect to the average current IC (that is, the difference between the average current IC and the turn _- off current of the upper arm in the first unit) is given by the following equation (4).

The turn-on current of the upper arm in the second unit with respect to the average current IC (that is, the difference between the average current _IC and the turn _- on current of the upper arm in the second unit) is given by the following equation (5).

The turn _- off current of the upper arm in the second unit with respect to the average current IC (that is, the difference between the average current IC and the turn _- off current of the upper arm in the second unit) is given by the following equation (6).

Since the waveform of the unit current detection value i2 is vertically symmetrical with respect to the unit current detection value i1, if the sign of the difference between the average current IC and the turn _- on current of the first unit is inverted, the average current _IC and the second The difference between the turn-off current of the unit and the turn _- off current of the second unit can be obtained by inverting the sign of the difference between the average current IC and the turn _- off current of the first unit. Be done. After that, as in the first embodiment, the above (3) to (6) are added to the average current IC per _cycle of the carrier triangular wave to obtain the turn ON current and the turn OFF current, and the dead time compensation is performed.

As shown above, according to the second embodiment, the same effects as those of the first embodiment are obtained. The second embodiment is applicable to a single-phase inverter provided with two inverters in which two units are connected in parallel, and the AC side output terminal OUT of the two inverters is connected to a load.

[Embodiment 3]
In the third embodiment, the switching current estimator 5 is different from the first and second embodiments. FIG. 10 shows the relationship between the input and the output of the switching current estimator 5 of the third embodiment.

In the third embodiment, a chopper in which a load is connected between the AC side output terminal OUT and the DC side minus terminal of an inverter in which three units are connected in parallel, or three inverters in which three units are connected in parallel are provided. It is assumed that the AC side output terminal OUT of three inverters is applied to a three-phase inverter connected to a load.

FIG. 11 shows the estimation conditions of the current at the time of switching in the third embodiment. In FIG. 11, the load is a _3IC current source, and the carrier phase difference is 120 deg. The currents of the unit current detection values i1, i2, and i3 in FIG. 11 can be obtained in the same manner as before.

The waveforms of the unit current detection values i1, i2, and i3 under this condition are shown in FIG. In the unit 3 parallel, when the unit output voltages v1, v2, v3 are all equal, the unit current detection values i1, i2, i3 are constant. When only one of them is different, the slope of the output currents of the different units changes with a slope of ± 2Vdc / 3L, and the slopes of the remaining two output currents change with a slope of ± Vdc / 3L. The current of each unit differs only in phase and offset, and the current during switching can be expressed by the same equation as follows. The difference between the average current IC and the turn _- on current of the upper arm is given by the following equation (7).

The difference between the average current IC and the turn _- off current of the upper arm is given by the following equation (8).

As shown above, according to the third embodiment, the same effects as those of the first and second embodiments are obtained. The third embodiment includes a chopper in which a load is connected between the AC side output terminal OUT and the DC side minus terminal of an inverter in which three units are connected in parallel, or three inverters in which three units are connected in parallel. It can be applied to a three-phase inverter in which the AC side output terminal OUT of three inverters is connected to the load.

[Embodiment 4]
In the fourth embodiment, the switching current estimator 5 is different from the first to third embodiments. FIG. 13 shows the relationship between the input and the output of the switching current estimator 5 of the fourth embodiment.

In the fourth embodiment, it is assumed that two inverters in which three units are connected in parallel are provided and the AC side output terminal OUT of the two inverters is applied to a single-phase inverter connected to a load.

In the single-phase inverter, the carrier phase difference is set to 60 deg. The waveforms of the unit current detection values i1, i2, and i3 under this condition are shown in FIG. When 0.5 <Δt, it is equivalent to the case where the unit output voltages v1, v2, and v3 are inverted. The current during switching can be expressed as follows. The difference between the average current IC and the turn _- on current of the upper arm of the first unit is given by the following equation (9).

The difference between the average current IC and the turn _- off current of the upper arm in the first unit is given by the following equation (10).

The difference between the average current IC and the turn _- on current of the upper arm in the second unit is given by the following equation (11).

The difference between the average current IC and the turn _- off current of the upper arm in the second unit is given by the following equation (12).

The difference between the average current IC and the turn _- on current of the upper arm in the third unit is given by the following equation (13).

The difference between the average current IC and the turn _- off current of the upper arm in the third unit is given by the following equation (14).

As shown above, according to the fourth embodiment, the same effects as those of the first to third embodiments are obtained. The fourth embodiment is applicable to a single-phase inverter provided with two inverters in which three units are connected in parallel and the AC side output terminals OUT of the two inverters are connected to a load.

[Embodiment 5]
FIG. 15 shows the main circuit configuration of the fifth embodiment. In FIG. 15, the inverter is changed to a three-level inverter with respect to FIG. Although FIG. 15 shows a T-type, it can also be applied to NPC-type and FC-type three-level inverters.

FIG. 16 shows a duty ratio calculation block input to the switching current estimator 5 of the fifth embodiment.

The filters f4 and f5 remove noise from the AC side output voltage Vo and the DC voltage detection value Vdc. The multiplier 11 multiplies the DC voltage detection value Vdc by 1/2. The divider 12 obtains 2Vo / Vdc. The subtractor 13 subtracts 1 from 2 Vo / Vdc. The comparator 14 compares the magnitudes of 2 Vo / Vdc and 1. The switch 15 outputs 2Vo / Vdc-1 if 2Vo / Vdc is larger than 1, and 2Vo / Vdc if it is 1 or less.

The output of the switch 15 is input to the switching current estimator 5 as a duty ratio Δt. As the switching current estimator 5, those of the first to fourth embodiments can be applied as they are according to the configuration of the main circuit.

In the fifth embodiment, the duty ratio calculation method is changed in order to apply the previous embodiments 1 to 4 to the three-level inverter. If 0 <Vo <Vdc / 2, the gate signal G1Ua is OFF, the gate signal G1Ub is ON, and the gate signal G1Xa and the gate signal G1Xb switch. The duty ratio is 2 Vo / Vdc.

If Vdc / 2 <Vo <Vdc, the gate signal G1Xa is ON, the gate signal G1Xb is OFF, and the gate signal G1Ua and the gate signal G1Ub switch. The duty ratio is 2Vo / Vdc-1.

Therefore, if the duty ratio Δt is input to the switching current estimator 5, the current at the time of switching can be estimated even in the case of a three-level inverter, and dead time compensation can be performed.

Further, in the 3-level inverter, the voltage applied to the reactor L is halved, so that the current ripple is also halved. Therefore, by multiplying the output of the switching current estimator 5 shown in FIGS. 6, 8, 10, and 13 by 1/2, the difference between the average current IC, the turn _- on current, and the turn-off current in the three-level inverter is obtained. be able to.

Also in the fifth embodiment, the voltage command value V * can be used for the duty ratio Δt as in the first embodiment. In the three-level inverter, two carrier triangle waves, one that changes in the range of 0 to 1 and the other that changes in the range of -1 to 0, are used. The duty ratio Δt is Δt = V * if V *> 0, and Δt = V * + 1 if V * ≦ 0. This duty ratio Δt may be input to the switching current estimator 5.

As shown above, according to the fifth embodiment, the same effects as those of the first to fourth embodiments are obtained. Further, the present embodiment 5 can be applied to a three-level inverter.

Similarly, if the inverter current waveform is calculated, it can be applied to four or more parallel inverters.

Although the above description has been made in detail only for the specific examples described in the present invention, it is obvious to those skilled in the art that various modifications and modifications are possible within the scope of the technical idea of the present invention. It goes without saying that such modifications and modifications fall within the scope of the claims.

i1, i2, i3: Unit current detection value Vo: AC side output voltage Vdc: DC voltage V *: Voltage command value f1 to f5: Filter P1 to P3: Proportional amplifier 1: Adder 2: Multiplier 3a to 3c: Subtraction Instrument 4: Divider 5: Switching current estimator 6a to 6f: Adder 7a to 7f: Code determiner 8a to 8c; Adder 9a to 9c: Multiplier 10a to 10c: Adder 20: Inter-unit current control unit 30 : Dead time compensation amount output unit PWM: PWM control unit

Claims (7)

A unit parallel inverter that performs interleave driving by connecting units with two switching elements connected in series in parallel.
An inter-unit current control unit that outputs an inter-unit voltage command value for equalizing the average current of each unit current detection value in one carrier triangle wave detection value to the average value of the unit current detection values of all units.
A switching current estimator that outputs the difference between the average current and the turn-on current and the difference between the average current and the turn-off current for each unit based on the duty ratio.
The sign of the turn-on current and the sign of the turn-off current are determined based on the average current and the difference, and the dead time compensation amount is output based on the sign of the turn-on current and the sign of the turn-off current. Dead time compensation amount output unit and
A PWM control unit that compares the value obtained by adding the voltage command value, the voltage command value between units, and the dead time compensation amount with the carrier triangle wave, assigns a dead time, and generates a gate signal.
A unit parallel inverter characterized by being equipped with. The unit parallel inverter is equipped with a chopper in which a load is connected between an AC side output terminal and a DC side negative terminal of an inverter in which two units are connected in parallel, or three inverters in which two units are connected in parallel. It is a three-phase inverter in which the AC side output terminal of the stand inverter is connected to the load.
The difference between the average current and the turn-on current of the first unit is the following equation (1), and the difference between the average current and the turn-off current of the first unit is the following equation (2), the average current. The claim is characterized in that the difference between the turn-on current of the second unit and the turn-on current is the following equation (2), and the difference between the average current and the turn-off current of the second unit is the following equation (1). 1. Unit parallel inverter according to 1.

However, I _c : average current V _dc : DC voltage T: time of one cycle of carrier triangle wave Δt: duty ratio L: inductance of reactor The unit parallel inverter is a single-phase inverter provided with two inverters in which the two units are connected in parallel, and the AC side output terminals of the two inverters are connected to a load.
The difference between the average current and the turn-on current of the first unit in each inverter is the following equation (3), and the difference between the average current and the turn-off current of the first unit in each inverter is the following (4). Equation, the difference between the average current and the turn-on current of the second unit in each inverter is the following equation (5), and the difference between the average current and the turn-off current of the second unit in each inverter is as follows ( 6) The unit parallel inverter according to claim 1, wherein the equation is used.

However, V _dc : DC voltage T: Time of one cycle of carrier triangle wave Δt: Duty ratio L: Inductance of reactor The unit parallel inverter includes a chopper in which a load is connected between an AC side output terminal and a DC side negative terminal of an inverter in which the three units are connected in parallel, or three inverters in which the three units are connected in parallel. It is a three-phase inverter in which the AC side output terminals of three inverters are connected to the load.
The unit according to claim 1, wherein the difference between the average current and the turn-on current is the following equation (7), and the difference between the average current and the turn-off current is the following equation (8). Parallel inverter.

However, V _dc : DC voltage T: Time of one cycle of carrier triangle wave Δt: Duty ratio L: Inductance of reactor The unit parallel inverter is a single-phase inverter equipped with two inverters in which the three units are connected in parallel, and the AC side output terminals of the two inverters are connected to the load.
The difference between the average current and the turn-on current of the first unit in each inverter is the following equation (9), and the difference between the average current and the turn-off current of the first unit in each inverter is the following (10). Equation, the difference between the average current and the turn-on current of the second unit in each inverter is the following equation (11), and the difference between the average current and the turn-off current of the second unit of each inverter is as follows (11). 12), the difference between the average current and the turn-on current of the third unit of each inverter is the following equation (13), and the difference between the average current and the turn-off current of the third unit of each inverter is as follows. The unit parallel inverter according to claim 1, wherein the unit (14) is used.

However, V _dc : DC voltage T: Time of one cycle of carrier triangle wave Δt: Duty ratio L: Inductance of reactor Each unit is a 3-level inverter that outputs a 3-level voltage.
When the value obtained by dividing the value obtained by multiplying the AC side output voltage by 2 by the DC voltage is larger than 1, the value obtained by subtracting 1 from the value obtained by dividing the value obtained by multiplying the AC side output voltage by 2 by the DC voltage is used. The duty ratio is
When the value obtained by dividing the value obtained by multiplying the AC side output voltage by 2 by the DC voltage is 1 or less, the value obtained by dividing the value obtained by multiplying the AC side output voltage by 2 by the DC voltage is defined as the duty ratio.
The unit parallel inverter according to any one of claims 1 to 5, wherein the output of the switching current estimator is multiplied by 1/2. Each unit is a 3-level inverter that outputs a 3-level voltage.
When the voltage command value is larger than 0, the voltage command value is used as the duty ratio.
When the voltage command value is 0 or less, the duty ratio is the value obtained by adding 1 to the voltage command value.
The unit parallel inverter according to any one of claims 1 to 5, wherein the output of the switching current estimator is multiplied by 1/2.

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