JP7271094B2 - 半導体記憶装置 - Google Patents
半導体記憶装置 Download PDFInfo
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- G11C14/0009—Digital stores characterised by arrangements of cells having volatile and non-volatile storage properties for back-up when the power is down in which the volatile element is a DRAM cell
- G11C14/0018—Digital stores characterised by arrangements of cells having volatile and non-volatile storage properties for back-up when the power is down in which the volatile element is a DRAM cell whereby the nonvolatile element is an EEPROM element, e.g. a floating gate or metal-nitride-oxide-silicon [MNOS] transistor
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- H05K1/00—Printed circuits
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- H05K3/30—Assembling printed circuits with electric components, e.g. with resistors
- H05K3/32—Assembling printed circuits with electric components, e.g. with resistors electrically connecting electric components or wires to printed circuits
- H05K3/34—Assembling printed circuits with electric components, e.g. with resistors electrically connecting electric components or wires to printed circuits by soldering
- H05K3/341—Surface mounted components
- H05K3/3431—Leadless components
- H05K3/3436—Leadless components having an array of bottom contacts, e.g. pad grid array or ball grid array components
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- H10W70/60—Insulating or insulated package substrates; Interposers; Redistribution layers
- H10W70/62—Insulating or insulated package substrates; Interposers; Redistribution layers characterised by their interconnections
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- H10W70/60—Insulating or insulated package substrates; Interposers; Redistribution layers
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- H10W70/65—Shapes or dispositions of interconnections
- H10W70/657—Shapes or dispositions of interconnections on sidewalls or bottom surfaces of the package substrates, interposers or redistribution layers
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- H10W72/00—Interconnections or connectors in packages
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- G—PHYSICS
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- G11C2207/00—Indexing scheme relating to arrangements for writing information into, or reading information out from, a digital store
- G11C2207/10—Aspects relating to interfaces of memory device to external buses
- G11C2207/105—Aspects related to pads, pins or terminals
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- G—PHYSICS
- G11—INFORMATION STORAGE
- G11C—STATIC STORES
- G11C5/00—Details of stores covered by group G11C11/00
- G11C5/02—Disposition of storage elements, e.g. in the form of a matrix array
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- H—ELECTRICITY
- H05—ELECTRIC TECHNIQUES NOT OTHERWISE PROVIDED FOR
- H05K—PRINTED CIRCUITS; CASINGS OR CONSTRUCTIONAL DETAILS OF ELECTRIC APPARATUS; MANUFACTURE OF ASSEMBLAGES OF ELECTRICAL COMPONENTS
- H05K2201/00—Indexing scheme relating to printed circuits covered by H05K1/00
- H05K2201/09—Shape and layout
- H05K2201/09209—Shape and layout details of conductors
- H05K2201/09372—Pads and lands
- H05K2201/09381—Shape of non-curved single flat metallic pad, land or exposed part thereof; Shape of electrode of leadless component
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- H—ELECTRICITY
- H05—ELECTRIC TECHNIQUES NOT OTHERWISE PROVIDED FOR
- H05K—PRINTED CIRCUITS; CASINGS OR CONSTRUCTIONAL DETAILS OF ELECTRIC APPARATUS; MANUFACTURE OF ASSEMBLAGES OF ELECTRICAL COMPONENTS
- H05K2201/00—Indexing scheme relating to printed circuits covered by H05K1/00
- H05K2201/09—Shape and layout
- H05K2201/09209—Shape and layout details of conductors
- H05K2201/09372—Pads and lands
- H05K2201/09427—Special relation between the location or dimension of a pad or land and the location or dimension of a terminal
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- H—ELECTRICITY
- H05—ELECTRIC TECHNIQUES NOT OTHERWISE PROVIDED FOR
- H05K—PRINTED CIRCUITS; CASINGS OR CONSTRUCTIONAL DETAILS OF ELECTRIC APPARATUS; MANUFACTURE OF ASSEMBLAGES OF ELECTRICAL COMPONENTS
- H05K2201/00—Indexing scheme relating to printed circuits covered by H05K1/00
- H05K2201/10—Details of components or other objects attached to or integrated in a printed circuit board
- H05K2201/10007—Types of components
- H05K2201/10015—Non-printed capacitor
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- H—ELECTRICITY
- H05—ELECTRIC TECHNIQUES NOT OTHERWISE PROVIDED FOR
- H05K—PRINTED CIRCUITS; CASINGS OR CONSTRUCTIONAL DETAILS OF ELECTRIC APPARATUS; MANUFACTURE OF ASSEMBLAGES OF ELECTRICAL COMPONENTS
- H05K2201/00—Indexing scheme relating to printed circuits covered by H05K1/00
- H05K2201/10—Details of components or other objects attached to or integrated in a printed circuit board
- H05K2201/10007—Types of components
- H05K2201/10159—Memory
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- H—ELECTRICITY
- H05—ELECTRIC TECHNIQUES NOT OTHERWISE PROVIDED FOR
- H05K—PRINTED CIRCUITS; CASINGS OR CONSTRUCTIONAL DETAILS OF ELECTRIC APPARATUS; MANUFACTURE OF ASSEMBLAGES OF ELECTRICAL COMPONENTS
- H05K2201/00—Indexing scheme relating to printed circuits covered by H05K1/00
- H05K2201/10—Details of components or other objects attached to or integrated in a printed circuit board
- H05K2201/10431—Details of mounted components
- H05K2201/10507—Involving several components
- H05K2201/10522—Adjacent components
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- H—ELECTRICITY
- H05—ELECTRIC TECHNIQUES NOT OTHERWISE PROVIDED FOR
- H05K—PRINTED CIRCUITS; CASINGS OR CONSTRUCTIONAL DETAILS OF ELECTRIC APPARATUS; MANUFACTURE OF ASSEMBLAGES OF ELECTRICAL COMPONENTS
- H05K2201/00—Indexing scheme relating to printed circuits covered by H05K1/00
- H05K2201/10—Details of components or other objects attached to or integrated in a printed circuit board
- H05K2201/10613—Details of electrical connections of non-printed components, e.g. special leads
- H05K2201/10621—Components characterised by their electrical contacts
- H05K2201/10636—Leadless chip, e.g. chip capacitor or resistor
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- H—ELECTRICITY
- H05—ELECTRIC TECHNIQUES NOT OTHERWISE PROVIDED FOR
- H05K—PRINTED CIRCUITS; CASINGS OR CONSTRUCTIONAL DETAILS OF ELECTRIC APPARATUS; MANUFACTURE OF ASSEMBLAGES OF ELECTRICAL COMPONENTS
- H05K2203/00—Indexing scheme relating to apparatus or processes for manufacturing printed circuits covered by H05K3/00
- H05K2203/04—Soldering or other types of metallurgic bonding
- H05K2203/048—Self-alignment during soldering; Terminals, pads or shape of solder adapted therefor
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- Y—GENERAL TAGGING OF NEW TECHNOLOGICAL DEVELOPMENTS; GENERAL TAGGING OF CROSS-SECTIONAL TECHNOLOGIES SPANNING OVER SEVERAL SECTIONS OF THE IPC; TECHNICAL SUBJECTS COVERED BY FORMER USPC CROSS-REFERENCE ART COLLECTIONS [XRACs] AND DIGESTS
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- Structures For Mounting Electric Components On Printed Circuit Boards (AREA)
- Fixed Capacitors And Capacitor Manufacturing Machines (AREA)
- Electric Connection Of Electric Components To Printed Circuits (AREA)
- Semiconductor Memories (AREA)
Description
図1から図7を参照し、第1の実施形態の半導体記憶装置1について説明する。半導体記憶装置1は、例えばSSD(Solid State Drive)のような記憶装置である。半導体記憶装置1は、例えば、サーバ装置やパーソナルコンピュータなどの情報処理装置に取り付けられ、情報処理装置の記憶領域として利用される。以下では、半導体記憶装置1が取り付けられる情報処理装置を「ホスト装置」と称する。
第1パッド51の第1領域61のY方向の幅W61yは、正極電極31のY方向の幅W31yよりも大きい。一方で、第1パッド51の第2領域62のY方向の幅W62yは、正極電極31のY方向の幅W31yと略同じである。例えば、第1パッド51の第5および第6の縁51e,51fのそれぞれ一部は、正極電極31の第3および第4の縁31c,31dの近傍に位置し、正極電極31の第3および第4の縁31c,31dと略平行に延びている。
第2パッド52の第3領域63のY方向の幅W63yは、負極電極32のY方向の幅W32yよりも大きい。一方で、第2パッド52の第4領域64のY方向の幅W64yは、負極電極32のY方向の幅W32yと略同じである。例えば、第2パッド52の第5および第6の縁52e,52fのそれぞれ一部は、負極電極32の第3および第4の縁32c,32dの近傍に位置し、負極電極32の第3および第4の縁32c,32dと略平行に延びている。
第1パッド51の第1領域61のY方向の幅W61yは、正極電極41のY方向の幅W41yと略同じである。例えば、第1パッド51の第3および第4の縁51c,51dのそれぞれ一部は、正極電極41の第3および第4の縁41c,41dの近傍に位置し、正極電極41の第3および第4の縁41c,41dと略平行に延びている。
第2パッド52の第3領域63のY方向の幅W63yは、負極電極42のY方向の幅W42yと略同じである。例えば、第2パッド52の第3および第4の縁52c,52dのそれぞれ一部は、負極電極42の第3および第4の縁42c,42dの近傍に位置し、負極電極42の第3および第4の縁42c,44dと略平行に延びている。
次に、第2の実施形態について説明する。本実施形態は、第1パッド51および第2パッド52がX方向に沿う仮想的な中心線に対して非対称に形成された点で、第1の実施形態とは異なる。なお以下に説明する以外の構成は、第1の実施形態と同様である。
次に、第3の実施形態について説明する。本実施形態は、第2領域62が第1領域61に対して第2パッド52とは反対側に配置された点、および第4領域64が第3領域63に対して第1パッド51とは反対側に配置された点で、第1の実施形態とは異なる。なお以下に説明する以外の構成は、第1の実施形態と同様である。
第2パッド52の第3領域63のY方向の幅W63yは、負極電極42のY方向の幅W42yと略同じである。例えば、第2パッド52の第3および第4の縁52c,52dは、負極電極42の第3および第4の縁42c,42dの近傍にそれぞれ位置し、負極電極42の第3および第4の縁42c,44dと略平行に延びている。
次に、第3の実施形態の変形例について説明する。なお以下に説明する以外の構成は、上述した第3の実施形態と同様である。図12は、第1変形例のパッド51,52と第1コンデンサ16Aとの関係を示す断面図である。本変形例では、第1パッド51の第2領域62のX方向の幅W62xは、正極電極31のX方向の幅W31xよりも小さい。正極電極31は、第1領域61の少なくとも一部と第2領域62の少なくとも一部とに亘って配置されている。すなわち、正極電極31は、半田Sによって第1領域61の少なくとも一部と第2領域62の少なくとも一部とに固定されている。
Claims (5)
- 第1パッドと、第2パッドとを有した基板と、
前記基板に実装された半導体メモリ部品と、
前記第1パッドに半田で固定された第1電極と、前記第2パッドに半田で固定された第2電極とを有した第1コンデンサと、
を備え、
前記第1パッドは、第1領域と、前記第1領域に対して前記第2パッド側に位置した第2領域とを有し、
前記第1パッドから前記第2パッドに向かう方向を第1方向、前記第1方向とは交差した方向を第2方向とした場合に、
前記第1領域の前記第2方向の幅は、前記第1電極の前記第2方向の幅よりも大きく、
前記第2領域の前記第2方向の幅は、前記第1電極の前記第2方向の幅と略同じであり、
前記第1領域の前記第1方向の幅は、前記第1電極の前記第1方向の幅よりも小さく、
前記第1電極は、前記第1領域の少なくとも一部と前記第2領域の少なくとも一部とに亘って配置されており、
前記第1領域の前記第2方向側の縁と、前記第2領域の前記第2方向側の縁とは、前記第2方向の位置が略同じである、
半導体記憶装置。 - 前記第1電極は、前記基板の厚さ方向で前記第1領域と重なる第1部分と、前記基板の厚さ方向で前記第2領域と重なる第2部分とを含み、
前記第2部分の前記第1方向の幅は、前記第1部分の前記第1方向の幅よりも大きい、
請求項1に記載の半導体記憶装置。 - 前記第2パッドは、第3領域と、前記第3領域に対して前記第1パッド側に位置した第4領域とを有し、
前記第3領域の前記第2方向の幅は、前記第2電極の前記第2方向の幅よりも大きく、
前記第4領域の前記第2方向の幅は、前記第2電極の前記第2方向の幅と略同じであり、
前記第3領域の前記第1方向の幅は、前記第2電極の前記第1方向の幅よりも小さく、
前記第2電極は、前記第3領域の少なくとも一部と前記第4領域の少なくとも一部とに亘って配置されている、
請求項1に記載の半導体記憶装置。 - 前記第2電極は、前記基板の厚さ方向で前記第3領域と重なる第3部分と、前記基板の厚さ方向で前記第4領域と重なる第4部分とを含み、
前記第4部分の前記第1方向の幅は、前記第3部分の前記第1方向の幅よりも大きい、
請求項3に記載の半導体記憶装置。 - 前記基板は、前記第1コンデンサに代えて、第2コンデンサが実装可能であり、
前記第2コンデンサは、前記第1パッドに半田で固定される第3電極と、前記第2パッドに半田で固定される第4電極とを有し、
前記第1領域の前記第2方向の幅は、前記第3電極の前記第2方向の幅よりも小さく、
前記第1コンデンサに代えて前記第2コンデンサが前記基板に実装された場合、前記第3電極は、前記第1領域の少なくとも一部と前記第2領域の少なくとも一部とに亘って配置される、
請求項1に記載の半導体記憶装置。
Priority Applications (4)
| Application Number | Priority Date | Filing Date | Title |
|---|---|---|---|
| JP2018116469A JP7271094B2 (ja) | 2018-06-19 | 2018-06-19 | 半導体記憶装置 |
| CN201910143423.1A CN110620102B (zh) | 2018-06-19 | 2019-02-26 | 半导体存储装置 |
| TW108106690A TWI719414B (zh) | 2018-06-19 | 2019-02-27 | 半導體記憶體裝置 |
| US16/297,182 US11006526B2 (en) | 2018-06-19 | 2019-03-08 | Semiconductor storage device |
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| Application Number | Priority Date | Filing Date | Title |
|---|---|---|---|
| JP2018116469A JP7271094B2 (ja) | 2018-06-19 | 2018-06-19 | 半導体記憶装置 |
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| Publication Number | Publication Date |
|---|---|
| JP2019220562A JP2019220562A (ja) | 2019-12-26 |
| JP7271094B2 true JP7271094B2 (ja) | 2023-05-11 |
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| JP2018116469A Active JP7271094B2 (ja) | 2018-06-19 | 2018-06-19 | 半導体記憶装置 |
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|---|---|
| US (1) | US11006526B2 (ja) |
| JP (1) | JP7271094B2 (ja) |
| CN (1) | CN110620102B (ja) |
| TW (1) | TWI719414B (ja) |
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| Publication number | Priority date | Publication date | Assignee | Title |
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| US11362447B2 (en) * | 2020-05-20 | 2022-06-14 | SK Hynix Inc. | Storage device with detachable capacitor connection structure |
Citations (3)
| Publication number | Priority date | Publication date | Assignee | Title |
|---|---|---|---|---|
| JP2012064720A (ja) | 2010-09-15 | 2012-03-29 | Toshiba Corp | 電子機器 |
| JP2016001717A (ja) | 2014-05-22 | 2016-01-07 | ソニー株式会社 | 回路基板、蓄電装置、電池パックおよび電子機器 |
| JP2016004986A (ja) | 2014-06-19 | 2016-01-12 | トヨタ自動車株式会社 | プリント配線基板の半田ランド |
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| US5303122A (en) * | 1991-10-31 | 1994-04-12 | Ford Motor Company | Printed circuit board having a commonized mounting pad which different sized surface mounted devices can be mounted |
| US5683788A (en) * | 1996-01-29 | 1997-11-04 | Dell Usa, L.P. | Apparatus for multi-component PCB mounting |
| JP2001308503A (ja) | 2000-04-26 | 2001-11-02 | Koichi Yamazaki | はんだ付け用電極構造 |
| JP2003243814A (ja) | 2002-02-21 | 2003-08-29 | Hitachi Ltd | チップ部品の実装用ランド |
| JP3976020B2 (ja) * | 2004-02-12 | 2007-09-12 | 株式会社豊田自動織機 | 表面実装用電子部品の表面実装構造 |
| TWI271135B (en) * | 2005-10-14 | 2007-01-11 | Hon Hai Prec Ind Co Ltd | Pad for printed circuit board |
| JP2007258605A (ja) * | 2006-03-24 | 2007-10-04 | Toshiba Corp | 部品内蔵プリント配線板、部品内蔵プリント配線板の製造方法および電子機器 |
| JP4243621B2 (ja) * | 2006-05-29 | 2009-03-25 | エルピーダメモリ株式会社 | 半導体パッケージ |
| TWI337055B (en) * | 2007-06-22 | 2011-02-01 | Delta Electronics Inc | Universal solder pad structure |
| US9095066B2 (en) * | 2008-06-18 | 2015-07-28 | Semiconductor Energy Laboratory Co., Ltd. | Printed board |
| KR20110028999A (ko) * | 2009-09-14 | 2011-03-22 | 삼성전자주식회사 | 이종의 커넥터를 선택적으로 적용할 수 있는 메모리 장치 |
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| JP2012064720A (ja) | 2010-09-15 | 2012-03-29 | Toshiba Corp | 電子機器 |
| JP2016001717A (ja) | 2014-05-22 | 2016-01-07 | ソニー株式会社 | 回路基板、蓄電装置、電池パックおよび電子機器 |
| JP2016004986A (ja) | 2014-06-19 | 2016-01-12 | トヨタ自動車株式会社 | プリント配線基板の半田ランド |
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| JP2019220562A (ja) | 2019-12-26 |
| CN110620102B (zh) | 2023-10-03 |
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| US11006526B2 (en) | 2021-05-11 |
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