JP7367643B2 - Control device and control method for power converter - Google Patents

Description

The present invention relates to a control device for a power conversion device, and includes, for example, converting DC power into high-frequency AC power using an inverter, insulating it using a small high-frequency transformer, and connecting a diode rectifier to the other side of the transformer to convert DC power into high-frequency AC power. This invention relates to an isolated DC/DC converter.

FIG. 1 shows a circuit diagram of an isolated DC/DC converter to be controlled by the present invention. FIG. 1 shows a configuration in which the inverter on the power input side of the DAB (dual active bridge) type bidirectional isolated DC/DC converter of Non-Patent Document 1 shown in FIG. 2 is replaced with a diode rectifier.

In FIG. 2, the primary inverter 100 (first power converter) includes a first DC voltage source 101, a DC capacitor 102 connected between the positive and negative terminals of the first DC voltage source 101, The power conversion unit 103 is connected in parallel to the DC capacitor 102 and has switching devices T11 to T14 such as IGBTs connected in a bridge manner.

The secondary inverter 200 (second power converter) includes a second DC voltage source 201 , a DC capacitor 202 connected between the positive and negative terminals of the second DC voltage source 201 , and a DC capacitor 202 connected to the DC voltage source 201 . The power conversion unit 203 is connected in parallel and has switching devices T21 to T24 such as IGBTs connected in a bridge manner.

The AC sides of the power converter 103 of the primary inverter 100 and the power converter 203 of the secondary inverter 200 are coupled via reactors La to Ld and a high frequency transformer 300.

In the isolated DC/DC converter of FIG. 1, the power conversion section 203 of the secondary inverter 200 uses bridge-connected diodes D21 to D24 instead of the switching devices T21 to T24 of FIG. 2, and the other parts are It has the same configuration as FIG. 2.

In the DAB type bidirectional isolated DC/DC converter shown in FIG. 2, even if the gate signals (T21 to T24) of the switching devices of the secondary side inverter 200 are always OFF, Perform the same action.

In the converter of FIG. 1 and the case where the secondary side switching devices T21 to T24 in FIG. Unidirectional power exchange from the primary inverter 100 to the secondary inverter 200 is possible only when the voltage is higher than the voltage Vdc2) of the second DC voltage source 201.

This circuit has a problem in that the amount of power that can be accommodated is limited when the difference in DC voltage is small. However, in addition to cost reduction, there are the following advantages, and the same advantages can be obtained even when the switching devices T21 to T24 on the secondary side in FIG. 2 are always turned off.

- When the difference in DC voltage is large and the interchange power is small, the reactor current I1 can be reduced, and copper loss and conduction loss can be reduced.

- Control design is simple because the adjustment element is limited to the pulse width of the output voltage of the primary side inverter 100.

・The AC side voltage induced at the AC input terminal of the rectifier always acts to reduce the reactor current. Therefore, it is difficult for abnormal current to flow.

- The reactor current and the DC offset current of the excitation current of the high-frequency transformer 300 are easily attenuated, making it difficult for the transformer to undergo magnetic saturation.

Therefore, even in the DAB type bidirectional isolated DC/DC converter, a method has been proposed in which the inverter serving as the power interchange destination is stopped and operated as a diode rectifier depending on the operating conditions.

In Patent Document 1, when the DC voltage of the power accommodation destination is very low, Patent Document 2 compares the control command value and the set value to switch the operation mode.

Shigenori Inoue, Yasufumi Akagi, "Operating voltage and loss analysis of bidirectional isolated DC/DC converter", IEEJ Transactions D, Volume 127, 2007-02-01, P189-197

JP2012-065511A WO-A1-2014/024560

In an isolated DC/DC converter, the amount of interchangeable power depends on the pulse width of the inverter output voltage. Therefore, feedback control that detects the interchangeable power and adjusts the pulse width according to the deviation from the command value is effective.

However, the relationship between the pulse width and the accommodating power is not linear, and if the gain is designed according to the most unstable condition, the response time becomes longer and it takes time until the accommodating power is inputted according to the command value. During this time, power storage elements such as capacitors are used, but as the response speed decreases, a capacitor with a large capacity is required, which increases the size and cost of the device.

Another issue is the conditions for switching the operating mode in a DAB bidirectional isolated DC/DC converter. In Patent Document 1, a gate signal is output when the DC voltage of an inverter to which power is exchanged reaches a level at which the inverter can be activated. Therefore, even when the DC voltage difference is large and the interchangeable power is small, the gate signal may be output and the reactor current IL may become larger than necessary.

In Patent Document 2, a gate signal is output when the flexible power is lower than the command value even if the pulse width is increased to the maximum. Therefore, first, it takes feedback control response time until the pulse width increases to the maximum, and even after switching to the operation mode that outputs the gate signal, it takes feedback control response time, so it is not possible to obtain flexible power according to the command value. It takes a very long time to get it done.

The present invention has been made to solve the above-mentioned problems, and an object of the present invention is to provide a control device for a power conversion device that can perform power interchange almost in accordance with the interchange power command value with a fast response speed.

A control device for a power conversion device according to claim 1 for solving the above problem,
A first power converter having a power converter connected to a first DC voltage source and controlled by turning on and off a switching device; and a power converter connected to a second DC voltage source. The AC sides of the second power converters are coupled to each other via a reactor and a high frequency transformer, and one of the first power converter and the second power converter is connected to the power interchange source power. In a power conversion device that performs power interchange between a power interchange source power converter and a power interchange destination power converter, with one of the other being a power interchange source power converter and a power interchange destination power converter,
From the set interchange power command value P ^* , the first DC voltage detection signal Vdc1 that detects the DC voltage of the power interchange source power converter, and the second DC voltage detection signal Vdc2 that detects the DC voltage of the power interchange destination power converter, The following formula (3)

(However, W1A is the pulse width command value, and L is the reactance of the AC side coupling part of the first power converter and the second power converter)
a first pulse width command value generation unit that calculates a pulse width command value of the output voltage of the power interchange source power converter;
The pulse width of the output voltage of the power accommodating source power converter is determined by amplifying the deviation between the input active power of the power accommodating power converter or the output active power of the power accommodating source power converter and the accommodating power command value P ^* . A pulse width calculation unit to obtain,
Power conversion of the power interchange source power converter is performed based on a pulse width command value obtained by adding the pulse width command value generated by the first pulse width command value generation unit and the pulse width determined by the pulse width calculation unit. a first control signal generation section that generates a control signal for controlling switching of the section;
It is characterized by having the following.

A control device for a power conversion device according to claim 2 includes, in claim 1,
The first pulse width command value generation section selects a value of the ratio of the first DC voltage detection signal Vdc1 and the second DC voltage detection signal Vdc2, or a smaller value from the calculation result of the equation (3). It is characterized in that it is a pulse width command value.

A control device for a power conversion device according to claim 3 includes, in claim 1,
The first pulse width command value generation unit includes:
From the set interchange power command value P ^* , the first DC voltage detection signal Vdc1 that detects the DC voltage of the power interchange source power converter, and the second DC voltage detection signal Vdc2 that detects the DC voltage of the power interchange destination power converter, The following formula (9)

(However, W1B is the pulse width command value, and L is the reactance of the AC side coupling part of the first power converter and the second power converter)
Calculate,
If the calculation result of the formula (3) exceeds the ratio value of the first DC voltage detection signal Vdc1 and the second DC voltage detection signal Vdc2, the calculation result of the formula (9) is selected to determine the pulse width. It is characterized by being a command value.

A control device for a power conversion device according to claim 4 includes, in claim 3,
The first pulse width command value generation unit includes:
A change in the magnitude relationship between the ratio value of the first DC voltage detection signal Vdc1 and the second DC voltage detection signal Vdc2 and the calculation result of the equation (3) is detected, and at the time of detection, the The present invention is characterized in that the value of the ratio between the first DC voltage detection signal Vdc1 and the second DC voltage detection signal Vdc2 is selected and used as the pulse width command value.

A control device for a power conversion device according to claim 5 includes, in claim 4,
The power converter of the second power converter is configured with a power converter controlled by turning on and off a switching device,
a second control signal generating section that generates a control signal for controlling switching of the power converter of the power interchange destination power converter based on the set pulse width command value of the output voltage of the power interchange destination power converter;
Calculate the maximum power that can be accommodated when switching control of the power converter of the power interchange destination power converter is stopped by calculating equation (10) or equation (5),

When the deviation between the calculated maximum power and the interchangeable power command value P ^* is larger than the set threshold, the control signal generated by the first control signal generation section is validated, and the second control signal generation section Disable the generated control signal,
When the deviation between the calculated maximum power and the interchangeable power command value P ^* is smaller than a set threshold, both the control signals generated by the first control signal generation section and the second control signal generation section are enabled. It is characterized by the fact that it does.

A method for controlling a power conversion device according to claim 6,
The present invention is characterized in that the control device for a power conversion device according to any one of claims 1 to 5 is executed.

(1) According to the invention described in claims 1 to 6, by calculating the pulse width of the output voltage of the power converter to obtain the pulse width command value without performing feedback control, a fast response speed can be achieved. It is possible to perform power interchange almost in accordance with the interchange power command value.

Furthermore, even when feedback control is used in combination to suppress deviations due to manufacturing errors such as detection errors and reactors, a high response speed can be obtained with a low gain, making it easier to stabilize the control.

Further, even if the capacitance of the DC capacitor is small, voltage fluctuations can be suppressed, and the device can be made smaller and lower in cost.
(2) According to the invention set forth in claim 2, the generated pulse width command value is limited and the upper limit of the interchangeable power is set under the condition that the power converter does not output reactive power, so the reactor current is reduced. It is possible to operate with high efficiency by suppressing copper loss and conduction loss.
(3) According to the invention set forth in claim 3, greater power can be accommodated than in the configuration set forth in claim 2.
(4) According to the invention set forth in claim 4, even if the interchangeable power command value changes greatly and suddenly, it is possible to prevent DC offset from being superimposed on the reactor current and prevent magnetic saturation of the high frequency transformer. This can prevent overcurrent from occurring. Additionally, the cross-sectional area of the core of the high-frequency transformer can be reduced, making it more compact and cost-effective. Copper loss and conduction loss can be reduced.
(5) According to the invention set forth in claim 5, the switching control of the power converter of the power interchange destination power converter is stopped (operated as a rectifier), and the switching control of only the power converter of the power interchange source power converter is controlled. When the switching control of the power converter of the power interchange source power converter and the power interchange destination power converter are stopped, It is possible to switch appropriately according to the maximum flexible power. This makes it possible to reliably perform power interchange according to the command value in a short period of time.

FIG. 1 is a circuit configuration diagram of an isolated DC/DC converter to which the present invention is applied. FIG. 1 is a circuit configuration diagram of a DAB type bidirectional isolated DC/DC converter to which the present invention is applied. 1 is a control block configuration diagram of Embodiment 1 of the present invention. FIG. FIG. 3 is a control block configuration diagram of a second embodiment of the present invention. FIG. 3 is a control block configuration diagram of a third embodiment of the present invention. FIG. 4 is a control block configuration diagram of Embodiment 4 of the present invention. FIG. 3 is a waveform diagram showing operation waveforms of Example 1 of the present invention. FIG. 7 is a waveform diagram showing operation waveforms of Example 2 of the present invention. FIG. 7 is a waveform diagram showing an example in which a DC offset is superimposed on the reactor current due to a sudden change in the power command value in Example 2 of the present invention.

Embodiments of the present invention will be described below with reference to the drawings, but the present invention is not limited to the following embodiments. In the present invention, the pulse width of the inverter output voltage necessary for power accommodation according to the command value is calculated from the command value of the converter interchange power and the DC voltage on the power transmission side and the power receiving side, and feedforward control can be performed. Improve response speed.

In addition, we have provided a solution to the problem that when the pulse width is suddenly changed, a DC offset is superimposed on the reactor current and excitation current, making the high-frequency transformer susceptible to magnetic saturation. By reducing the core cross-sectional area of high-frequency transformers, the transformers can be made smaller, lighter, and lower in cost.

Furthermore, in a dual active bridge (DAB) type bidirectional isolated DC/DC converter, there is a DAB mode that drives the gates of both the primary and secondary inverters, and a rectifier mode that stops the gate of one inverter. A means for designing a threshold value for switching is provided.

An example embodiment of the present invention is configured as follows.

A power converter device comprising first and second power converters whose AC sides are coupled via a reactor and a high frequency transformer, and which performs power interchange between the first power converter and the second power converter,
From the set interchange power command value P ^* , the first DC voltage detection signal Vdc1 that detects the DC voltage of the power interchange source power converter, and the second DC voltage detection signal Vdc2 that detects the DC voltage of the power interchange destination power converter, The following formula (3)

(However, W1A is the pulse width command value, and L is the reactance of the AC side coupling part of the first power converter and the second power converter)
a first pulse width command value generation unit that calculates a pulse width command value of the output voltage of the power interchange source power converter;
The pulse width of the output voltage of the power accommodating source power converter is determined by amplifying the deviation between the input active power of the power accommodating power converter or the output active power of the power accommodating source power converter and the accommodating power command value P ^* . A pulse width calculation unit to obtain,
Power conversion of the power interchange source power converter is performed based on a pulse width command value obtained by adding the pulse width command value generated by the first pulse width command value generation unit and the pulse width determined by the pulse width calculation unit. and a first control signal generation section that generates a control signal for controlling switching of the section.

FIG. 3 shows a control block of the first embodiment. In the control block of FIG. 3, the power conversion section 203 of the secondary inverter 200 is the isolated DC/DC converter of FIG. 1 configured with a diode rectifier, or the control block of FIG. This applies when the signal is stopped (the gate signal is turned off).

In addition, the primary side inverter 100 is a power exchange source power converter, the secondary side inverter 200 is a power exchange destination power converter, and the primary side DC voltage (Vdc1) is higher than the secondary side DC voltage (Vdc2). I am assuming that.

Reference numeral 11 indicates a secondary DC voltage detection signal Vdc2 that detects the voltage of the second DC voltage source 201 of the secondary inverter 200, and a secondary DC current detection signal Idc2 that detects the DC current of the secondary inverter 200. This is a multiplier that calculates the active power input to the secondary inverter 200 by calculating the product of .

The multiplier 11 receives a primary DC voltage detection signal Vdc1 that detects the voltage of the first DC voltage source 101 of the primary inverter 200 and a primary DC current detection signal that detects the DC current of the primary inverter 100. The active power output by the primary inverter 100 may be calculated by calculating the product of the signals Idc1.

Reference numeral 12 denotes a low-pass filter for removing noise and pulsations twice as large as the fundamental wave superimposed on the power obtained by the multiplier 11.

13 is a subtracter that calculates the deviation between the set interchangeable power command value P ^* and the active power output from the low-pass filter 12. The interchange power command value P ^* is a positive value, and the active power is interchanged only in one direction from the primary inverter 100 to the secondary inverter 200.

Reference numeral 14 denotes an amplifier, for example, a proportional-integral amplifier, which amplifies the deviation output of the subtracter 13 to determine the pulse width of the output voltage of the primary side inverter 100.

The output of the proportional-integral amplifier 14 is added with a pulse width determined by a calculation described later in an adder 15, and a pulse width command value W1 is calculated.

16 is a primary side gate signal generator which receives a pulse width command value as input and generates a primary side inverter gate signal.

The output of the primary side gate signal generator 16 is input to switching devices T11 to T14 of the primary side inverter 100.

The above is a general control block of an isolated DC/DC converter, but in the first embodiment, the following is added.

17 calculates the following equation (3) from the interchangeable power command value P ^* , the primary side DC voltage detection signal Vdc1, and the secondary side DC voltage detection signal Vdc2, and calculates the pulse of the output voltage of the primary side inverter 100. This is an arithmetic unit that calculates the width command value W1A.

(However, W1A is the pulse width command value, and L is the reactance of the AC side coupling part of the primary side inverter 100 and the secondary side inverter 200.)
18 is a divider that calculates the ratio Vdc2/Vdc1 of the primary side DC voltage detection signal Vdc1 and the secondary side DC voltage detection signal Vdc2.

A selector 19 selects and outputs the smaller value of the pulse width command value W1A, which is the output of the arithmetic unit 17, and Vdc2/Vdc1, which is the output of the divider 18.

The output of the selector 19 is added to the output of the proportional-integral amplifier 14 in an adder 15, and a pulse width command value W1 is calculated.

The multiplier 11, the low-pass filter 12, the subtracter 13, and the proportional-integral amplifier 14 constitute the pulse width calculation section of the present invention, and the arithmetic unit 17, the divider 18, and the selector 19 constitute the first pulse width command of the present invention. The adder 15 and the primary gate signal generator 16 constitute a first control signal generation section of the present invention.

In the first embodiment, the pulse width W1 (W1A) of the primary side inverter output voltage is determined from the interchangeable power command value P ^* , and the primary side inverter 100 is driven accordingly. Thereby, there is no need to wait for a response from feedback control, and the response speed can be improved.

FIG. 7 shows operating waveforms of the isolated DC/DC converter when the pulse width of the output voltage V1 of the primary side inverter 100 is set to W1. In FIG. 7, V1 represents the output voltage of the primary side inverter 100, V2 represents the output voltage of the secondary side inverter 200, Il represents the reactor current, and T11 to T14 represent the waveforms of the gates of the switching devices T11 to T14.

The pulse width W1 and firing angle α1 are as follows:

There is a relationship between From this waveform, the power to be accommodated can be determined as shown in equation (2).

Solving this equation (2) for W1, we get

becomes. Therefore, by driving the primary inverter 100 with the pulse width determined using equation (3)', it is possible to perform power interchange according to the command value.

In reality, deviations may occur in the interchangeable power due to detection errors in Vdc1 and Vdc2, manufacturing errors in the reactance L (La to Ld) between the two inverters, and the like. This deviation can be reduced to zero by adjusting W1 through feedback control using a PI amplifier. Since a sufficiently high response speed can be obtained even if the gain of the PI amplifier is low, control stability can be improved.

However, Equation (3)' holds true only when the reactor current Il is clamped at zero during the period when V1 is zero. At this time, the pulse width W1 must satisfy equation (4).

In the first embodiment, the upper limit of W1 is set to Vdc2/Vdc1. Therefore, in Example 1, the upper limit of flexible power is small,

It is. When W1 is made larger than Vdc2/Vdc1, the operating waveform becomes as shown in FIG. In FIG. 8, V1 represents the output voltage of the primary side inverter 100, V2 represents the output voltage of the secondary side inverter 200, and Il represents the waveform of the reactor current.

At this time, part of the current shown in FIG. 8 transmits active power to the secondary inverter 200, but the remaining part shown in the shaded area returns active power to the primary inverter 100. Viewed from the primary side, as W1 increases, the power factor decreases, and although the reactor current increases, the accommodating power does not increase much and efficiency decreases due to conduction loss and copper loss. In the first embodiment, since the pulse width is limited so as to operate under conditions where the power factor does not decrease, there is an advantage that conduction loss and copper loss are small and operation can be performed with high efficiency.

As described above, according to the first embodiment, the following effects can be obtained.

- By outputting from the inverter a voltage with a pulse width determined by equation (3), power accommodation can be performed almost as per the command value without performing feedback control.

- Even when using feedback control to suppress deviations due to manufacturing errors such as detection errors and reactors, a high response speed can be obtained with a low gain, making it easier to stabilize control.

・Even if the capacity of the DC capacitor is small, voltage fluctuations can be suppressed, allowing the device to be made smaller and lower in cost.

・Since the upper limit of interchangeable power is set under the condition that the inverter does not output reactive power, the reactor current can be reduced, copper loss and conduction loss can be suppressed, and high efficiency operation can be achieved.

FIG. 4 shows a control block of the second embodiment. The second embodiment is obtained by removing the selector 19 from the first embodiment shown in FIG. 3 and adding the following.

21 calculates the pulse width command value W1B of the output voltage of the primary side inverter 100 by calculating equation (9) from the primary side DC voltage detection Vdc1, the secondary side DC voltage detection signal Vdc2, and the interchangeable power command value P ^* . This is the arithmetic unit we are looking for.

(However, W1B is the pulse width command value, and L is the reactance of the AC side coupling part of the primary side inverter 100 and the secondary side inverter 200.)
22 is a subtracter that subtracts the pulse width command value W1A obtained by the calculator 17 from the ratio Vdc2/Vdc1 of the primary side DC voltage detection signal Vdc1 and the secondary side DC voltage detection signal Vdc2.

23 is a comparator that detects that Vdc2/Vdc1 is larger than W1A.

24 is a switch which selects and outputs W1A obtained by equation (3) if the output signal of comparator 23 is positive, that is, Vdc2/Vdc1>W1A, and otherwise selects and outputs W1B obtained by equation (9). .

The output of the switch 24 is added to the output of the proportional-integral amplifier 14 in an adder 15, and a pulse width command value W1 is calculated.

The other parts are configured the same as in FIG. 3.

The second embodiment is a method that allows the pulse width command value W1 to be further expanded than in the first embodiment, and is compatible with greater power flexibility. FIG. 8 shows a waveform when the pulse width command value W1 is made larger than Vdc2/Vdc1, and the reactor current Il becomes zero and is no longer clamped.

The voltage applied to the reactor during period t1 is Vdc1−Vdc2, −Vdc2 during period t2, and −(Vdc1+Vdc2) during period t3. From this, the slope of the current Il in each period can be found as shown in equation (6).

Since Il becomes zero at the start of period t1 and the end of period t3, and the total period from period t1 to t3 is half a cycle, t1 and t3 can be expressed by the following equation (7).

The electricity to be exchanged is

It is.

Solving this equation (8) for W1, we get

becomes. In the second embodiment, if the pulse width W1A determined by equation (3) exceeds Vdc2/Vdc1, the primary side inverter 100 is driven using the pulse width W1B determined by equation (9). Thereby, it is possible to perform power accommodation according to the command value, regardless of whether the reactor current is clamped at zero or not.

As described above, according to the second embodiment, the following effects can be obtained.
- By outputting from the inverter a voltage with a pulse width determined by Equation (3) or Equation (9), power accommodation can be performed almost as per the command value without performing feedback control.

- Even when using feedback control to suppress deviations due to manufacturing errors such as detection errors and reactors, a high response speed can be obtained with a low gain, making it easier to stabilize control.

・Even if the capacity of the DC capacitor is small, voltage fluctuations can be suppressed, allowing the device to be made smaller and lower in cost.
- Larger power can be accommodated than in the first embodiment.

Embodiments 1 and 2 have the advantage of being able to quickly follow sudden changes in the interchangeable power command value P ^* , but have the problem that an offset is superimposed on the reactor current Il, making the high frequency transformer more likely to cause magnetic saturation. A possible solution to this problem is, for example, to start operation from the center of the pulse. According to this method, the above problem can be solved in the first embodiment, but an offset may remain in the second embodiment.

The reason for this will be explained with reference to the operational waveform diagram in FIG. In FIG. 9, the output voltage V1 of the primary inverter 100 is such that in the first half cycle, a negative pulse is output with a width half the command value, and in the next half cycle, a positive pulse is output with a width equal to the command value. Ru. When this is integrated, it becomes zero at the center of the pulse, and the offset is zero.

Under the condition of W1<Vdc2/Vdc1 of the first embodiment, the pulse width of the rectifier voltage V2 of the secondary inverter 200 is proportional to W1. Therefore, the operation for V2 is similar to that for V1, and the offset of the integrated value is zero. Since the reactor current Il is determined by integrating V1 and V2, no offset is superimposed.

The same holds true for the output voltage V1 in the second embodiment. However, when W1>Vdc2/Vdc1, the pulse width of V2 becomes constant at half period=π/ω. Therefore, in V2, the pulse width of the half cycle immediately after the start of operation is not half the pulse width of the next half cycle. As a result, the integral of V2 does not become zero at the center of the pulse, and an offset is superimposed. That is, in FIG. 9, the positive peak of the reactor current Il is larger than the negative peak, and it can be seen that offsets are superimposed.

Therefore, in the third embodiment, when the pulse width command W1 increases or decreases beyond Vdc2/Vdc1, W1 is temporarily fixed at Vdc2/Vdc1 and operated for a while, thereby suppressing the superimposition of offset due to the above phenomenon. It was configured as follows.

FIG. 5 shows a control block of the third embodiment. The third embodiment is obtained by adding the following to the second embodiment shown in FIG.
A buffer 31 holds the output of the comparator 23.

32 is an XOR element that inputs the output of the comparator 23 (current value) and the output of the buffer 31 (previous value of the comparator 23), and outputs a positive signal when the magnitude relationship between Vdc2/Vdc1 and W1A changes. It is.

33 is a timer that continues to output a positive signal for a preset time if the output of the XOR element 32 is positive.

34 selects Vdc2/Vdc1 if the output of the timer 33 is positive (when the magnitude relationship between Vdc2/Vdc1 and W1A changes), and otherwise selects and outputs the output of the previous switch 24 (W1A or W1B). This is a switch to

The output of the switch 34 is added to the output of the proportional-integral amplifier 14 in an adder 15, and a pulse width command value W1 is calculated. The other parts are configured the same as in FIG. 4.

With the configuration of FIG. 5, when the pulse width command value W1 increases or decreases beyond Vdc2/Vdc1, the operation can be performed with W1 temporarily fixed at Vdc2/Vdc1 for a predetermined period, and offset superimposition can be suppressed.

The period during which the pulse width command value W1 is fixed to Vdc2/Vdc1 is specified in advance to the timer 33 as an integer multiple of 1 period or more and 0.5 period, such as 1 period, 1.5 periods, 2 periods, etc., for example. This causes a slight decrease in response speed. For example, when driving an inverter at 20 kHz, even if the fixed period is set to 2 cycles, the delay time is as small as 100 μs and has almost no effect.

As described above, according to the third embodiment, in addition to the effects of the second embodiment, the following effects can be obtained.

- Even if the interchange power command value changes greatly and suddenly, it is possible to prevent DC offset from being superimposed on the reactor current and prevent magnetic saturation of the high frequency transformer 300. This can prevent overcurrent from occurring. Furthermore, the cross-sectional area of the core of the high-frequency transformer 300 can be reduced, making it compact and low-cost. Copper loss and conduction loss can be reduced.

Embodiment 4 is applied to the circuit of FIG. 2, and has two modes: a mode in which the gate of the secondary inverter 200 is stopped and the same operation as in the third embodiment is performed, and a DAB method in which the gate of the secondary inverter 200 is output. It is now possible to switch between modes that operate in the same way as an insulated DC/DC converter.

FIG. 6 shows a control block of the fourth embodiment. The fourth embodiment is assumed to be applied to the DAB type bidirectional isolated DC/DC converter shown in FIG. 2, and the following is added to the third embodiment shown in FIG.

41 is flexible when the secondary side gate signal (T21 to T24) is turned off by calculating the following equation (10) from the primary side DC voltage detection signal Vdc1 and the secondary side DC voltage detection signal Vdc2. This is an arithmetic unit that calculates the maximum possible power (Pmax).

42 is a subtracter that subtracts the flexible power command value P ^* from the flexible maximum power (Pmax) determined by the calculator 41.

43 is a comparator that detects that the deviation output of the subtracter 42 is larger than a set threshold value (power) Pth.

44a selects the primary side pulse width command value W1 calculated by the adder 15 if the output of the comparator 43 is positive; otherwise, selects the primary side pulse width command value W1 so that it is, for example, about 0.7 to 0.95 or less. This switch selects the primary side pulse width command value W1' obtained by setting an upper limit on W1 using a limiter or the like and outputs it to the primary side gate signal generation section 16.

45 is a secondary side gate signal generator which receives the set pulse width command value W2 of the output voltage of the secondary side inverter 200 as an input and generates a secondary side inverter gate signal. This secondary side pulse width command value W2 is set to a fixed value close to 1, for example, about 0.7 to 0.95, or is small when the interchangeable power command value P ^* is close to zero, and when P ^* is between zero and It is a variable value that increases as the distance increases, with an upper limit of about 0.7 to 0.95.

44b selects 0 if the output of the comparator 43 is positive, otherwise selects the secondary side inverter gate signal generated by the secondary side gate signal generator 45 and switches the switching device T21 of the secondary side inverter 200. This is a switch that outputs to T24.

Reference numeral 46 denotes an adder that adds the output of the proportional-integral amplifier 14 and the set phase command value θb to obtain the phase command θ.

The phase command value θb includes the primary pulse width command value W1', the secondary pulse width command value W2, the interchangeable power command value P ^* , the primary DC voltage detection signal Vdc1, and the secondary DC voltage detection signal Vdc2. It is determined by calculating the following equation (11).

47 is a multiplier that multiplies the output (θ) of the adder 46 by 0.5, and 48 is a multiplier that multiplies the output 0.5θ of the multiplier 47 by −1 to output −0.5θ.

The output (−0.5θ) of the multiplier 48 is used as a phase command for the secondary side gate signal generator 45.

44c is a switch that selects 0 as the phase command if the output of the comparator 43 is positive; otherwise selects the output 0.5θ of the multiplier 47 and outputs it to the primary side gate signal generator 16.

The switch 44b, the secondary gate signal generator 45, the adder 46, and the multipliers 47 and 48 constitute a second control signal generation section of the present invention.

In the configuration of FIG. 6, there is a mode in which the gate of the secondary inverter 200 is stopped and the same operation as in the third embodiment is performed, and a DAB type bidirectional isolated DC/DC converter in which the gate of the secondary inverter 200 is output. Switching of the mode in which the same operation is performed is performed by switching the switches 44a to 44c according to the output of the comparator 43.

That is, if the output of the comparator 43 is positive, by switching the switches 44a to 44c, W1 is input to the pulse width command of the primary side gate signal generator 16, 0 is input to the phase command, and the switch 44b is inputted to the pulse width command of the primary side gate signal generator 16. Since the secondary side gate signal outputted from the second embodiment becomes 0, the same operation as in the third embodiment is performed.

Furthermore, if the output of the comparator 43 is not positive, by switching the switches 44a to 44c, W1' is input to the pulse width command of the primary side gate signal generator 16, and 0.5θ is input to the phase command. Then, the pulse width command of the secondary side gate signal generator 45 becomes W2 and the phase command becomes -0.5θ, and the secondary side inverter 200 is driven to generate the phase command θb and the primary side pulse width commands W1′, 2. DAB operation is performed based on the next pulse width command W2.

By substituting W1=1 into the above equation (8), the maximum power Pmax that can be accommodated with the gate of the secondary inverter 200 stopped using the current primary DC voltage detection Vdc1 and the secondary DC voltage detection signal Vdc2. can be found.

Pmax in equation (10) is compared with the interchangeable power command value P ^* , and if Pmax is larger than P ^* +Pth, the gate of the secondary inverter 200 is stopped, and if it is smaller, the gate of the secondary inverter 200 is output.

Ideally, the threshold value Pth may be zero, but in consideration of detection errors of Vdc1 and Vdc2 and manufacturing errors of main circuit components, a value of about 10% of the rated power is specified, for example.

Through the above-described operation, it is possible to select the optimum operation mode for determining whether or not to drive the secondary inverter 200 according to the interchangeable power command value P ^* . This makes it possible to omit the steps of first stopping and operating the secondary inverter 200, waiting until the pulse width reaches its maximum through feedback control, and then detecting that the interchangeable power still does not reach P ^* . , response speed can be improved.

Various other conditions can be applied to switch the operation mode. For example, the threshold value Pth may be set to 10% of the rated power when the secondary inverter 200 is stopped, and to 50% when the secondary inverter 200 is being driven to provide hysteresis and suppress frequent switching.

By using the rated power instead of the flexible power command value P ^* as a comparison target, even if P ^* suddenly increases to around the rated power, it can be handled without switching.

Similarly, as a method to take into account the sudden increase in the interchangeable power command value P ^* , include DC voltage in the switching conditions and stop the secondary inverter 200 only when the difference between Vdc1 and Vdc2 is large and Pmax>P ^* +Pth is satisfied. Good too.

When formula (5) is used instead of formula (10) and Plim1>P ^* +Pth is set as the determination condition, the mode that operates the same as in Example 1 and the same operation as the DAB bidirectional isolated DC/DC converter operate. It will switch between modes.

The fourth embodiment can also support power interchange in the opposite direction from the secondary inverter 200 to the primary inverter 100. To deal with this, if P ^* <0, that is, the power interchange command is in the opposite direction, and if Vdc2>Vdc1 holds, then the power interchange source is the secondary inverter 200, and the power interchange destination is the primary inverter 100. It is sufficient to redefine it, replace Vdc1 and Vdc2, invert the sign of P ^* , and substitute it into equations (3), (6), and (10). As for the gate signals, T11 to T14 and T21 to T24 may be replaced.

As described above, according to Example 4, in addition to Example 1 or Example 3, the following effects can be obtained.

- In the circuit of FIG. 2, by determining the maximum flexible power when the secondary inverter 200 is stopped using equation (10), it is possible to determine whether to stop or drive the secondary inverter 200 from the flexible power command value. I can judge.

- When the difference in DC voltage is large and the interchangeable power is small, by performing the same operation as the isolated DC/DC converter in Figure 1 as in Examples 1 to 3, the advantages of the isolated DC/DC converter can be achieved. can get.

- Even when the difference in DC voltage is small or the accommodating power is large, it is possible to perform power accommodating according to the command value by performing the same operation as a DAB bidirectional isolated DC/DC converter.

- When the secondary inverter 200 is stopped and power interchange is started, the command value is not reached and the secondary inverter 200 is switched into operation, which is no longer the case, and the power interchange is reliably performed in accordance with the command value in a short time. It can be performed.

11, 47, 48... Multiplier 12... Low pass filter 13, 22, 42... Subtractor 14... Proportional-integral amplifier 15, 46... Adder 16... Primary side gate signal generator 17, 21, 41... Arithmetic unit 18... Divider 19...Selector 23, 43...Comparator 24, 34, 44a, 44b, 44c...Switch 31...Buffer 32...XOR element 33...Timer 45...Secondary side gate signal generator 100...Primary side inverter 101, 201...DC voltage source 102, 202...DC capacitor 103, 203...Power conversion section 200...Secondary side inverter 300...High frequency transformer T11-T14, T21-T24...Switching device D21-D24...Diode

Claims (6)

A first power converter having a power converter connected to a first DC voltage source and controlled by turning on and off a switching device; and a power converter connected to a second DC voltage source. The AC sides of the second power converters are coupled to each other via a reactor and a high frequency transformer, and one of the first power converter and the second power converter is connected to the power interchange source power. In a power conversion device that performs power interchange between a power interchange source power converter and a power interchange destination power converter, with one of the other being a power interchange source power converter and a power interchange destination power converter,
From the set interchange power command value P ^* , the first DC voltage detection signal Vdc1 that detects the DC voltage of the power interchange source power converter, and the second DC voltage detection signal Vdc2 that detects the DC voltage of the power interchange destination power converter, The following formula (3)

(However, W1A is the pulse width command value, and L is the reactance of the AC side coupling part of the first power converter and the second power converter)
a first pulse width command value generation unit that calculates a pulse width command value of the output voltage of the power interchange source power converter;
The pulse width of the output voltage of the power accommodating source power converter is determined by amplifying the deviation between the input active power of the power accommodating power converter or the output active power of the power accommodating source power converter and the accommodating power command value P ^* . A pulse width calculation unit to obtain,
Power conversion of the power interchange source power converter is performed based on a pulse width command value obtained by adding the pulse width command value generated by the first pulse width command value generation unit and the pulse width determined by the pulse width calculation unit. a first control signal generation section that generates a control signal for controlling switching of the section;
A control device for a power conversion device, comprising: The first pulse width command value generation section selects a value of the ratio of the first DC voltage detection signal Vdc1 and the second DC voltage detection signal Vdc2, or a smaller value from the calculation result of the equation (3). 2. The control device for a power conversion device according to claim 1, wherein the pulse width command value is a pulse width command value. The first pulse width command value generation unit includes:
From the set interchange power command value P ^* , the first DC voltage detection signal Vdc1 that detects the DC voltage of the power interchange source power converter, and the second DC voltage detection signal Vdc2 that detects the DC voltage of the power interchange destination power converter, The following formula (9)

(However, W1B is the pulse width command value, and L is the reactance of the AC side coupling part of the first power converter and the second power converter)
Calculate,
If the calculation result of the formula (3) exceeds the ratio value of the first DC voltage detection signal Vdc1 and the second DC voltage detection signal Vdc2, the calculation result of the formula (9) is selected to determine the pulse width. The control device for a power conversion device according to claim 1, wherein the control device is a command value. The first pulse width command value generation unit includes:
A change in the magnitude relationship between the ratio value of the first DC voltage detection signal Vdc1 and the second DC voltage detection signal Vdc2 and the calculation result of the equation (3) is detected, and at the time of detection, the 4. The control device for a power conversion device according to claim 3, wherein a value of a ratio between the first DC voltage detection signal Vdc1 and the second DC voltage detection signal Vdc2 is selected and used as the pulse width command value. The power converter of the second power converter is configured with a power converter controlled by turning on and off a switching device,
a second control signal generating section that generates a control signal for controlling switching of the power converter of the power interchange destination power converter based on the set pulse width command value of the output voltage of the power interchange destination power converter;
Calculate the maximum power that can be accommodated when switching control of the power converter of the power interchange destination power converter is stopped by calculating equation (10) or equation (5),

When the deviation between the calculated maximum power and the interchangeable power command value P ^* is larger than the set threshold, the control signal generated by the first control signal generation section is validated, and the second control signal generation section Disable the generated control signal,
When the deviation between the calculated maximum power and the interchangeable power command value P ^* is smaller than a set threshold, both the control signals generated by the first control signal generation section and the second control signal generation section are enabled. do,
The control device for a power conversion device according to claim 4. A method for controlling a power converter, comprising executing the control device for a power converter according to any one of claims 1 to 5.

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