JP7614017B2 - Power Conversion Equipment - Google Patents

Description

The present invention relates to a power conversion device.

Conventionally, as described in, for example, Patent Document 1, a power conversion device is known that includes a transformer having a power transmission coil and a power receiving coil, a power transmission circuit having a power transmission terminal connected to the power transmission coil, and a power receiving circuit having a power receiving terminal connected to the power receiving coil. Here, the power transmission coil and the power receiving coil are magnetically coupled to each other. The power conversion device performs switching control of a power transmission switch of the power transmission circuit to convert a DC voltage input from the power transmission terminal into an AC voltage and supply it to the power transmission coil. The power conversion device also performs switching control of a power receiving switch of the power receiving circuit to convert an AC voltage output from the power receiving coil into a DC voltage and supply it to the power receiving terminal.

JP 2016-152687 A

When performing switching control of the above-mentioned power conversion device, switching losses may increase.

The present invention was made in consideration of the above problems, and its main objective is to provide a power conversion device that can reduce switching losses.

Means 1 includes a transformer having a power transmission coil and a power receiving coil that are magnetically coupled to each other, a power transmission circuit having a power transmission switch and a power transmission terminal connected to the power transmission coil via the power transmission switch, a power receiving circuit having a power receiving switch and a power receiving terminal connected to the power receiving coil via the power receiving switch, and a control unit that executes switching control of the power transmission switch to convert a DC voltage input from the power transmission terminal into an AC voltage and supply it to the power transmission coil, and executes switching control of the power receiving switch to convert an AC voltage output from the power receiving coil into a DC voltage and supply it to the power receiving terminal, and the control unit controls the voltages per unit number of turns of the power transmission coil and the power receiving coil to approach each other while executing switching control of the power transmission switch and the power receiving switch, respectively.

The inventors of the present application have noticed that when the voltages per unit number of turns of the power transmitting coil and the power receiving coil are different from each other, switching losses increase in the power transmitting circuit and the power receiving circuit that are connected to the coil with the lower voltage per unit number of turns.

Therefore, in the first method, while the switching control of the power transmitting switch and the power receiving switch is being executed, the voltages per unit number of turns of the power transmitting coil and the power receiving coil are brought closer to each other. This makes it possible to reduce the switching loss of each of the power transmitting circuit and the power receiving circuit.

Means 2 includes a transformer having a power transmission coil and a plurality of power receiving coils that are magnetically coupled to each other, a power transmission circuit having a power transmission switch and a power transmission terminal connected to the power transmission coil via the power transmission switch, a power receiving circuit provided corresponding to each of the power receiving coils and having a power receiving switch and a power receiving terminal connected to the power receiving coil via the power receiving switch, and a control unit that executes switching control of the power transmission switch to convert a DC voltage input from the power transmission terminal into an AC voltage and supply it to the power transmission coil, and executes switching control of the power receiving switch to convert an AC voltage output from the power receiving coil into a DC voltage and supply it to the power receiving terminal, and the control unit controls the voltage per unit turn of a specific coil, which is a part of the power transmission coil and each of the power receiving coils, to be higher than the voltage per unit turn of the remaining coils during the execution of the switching control.

In the second method, during switching control of the power transmitting switch and the power receiving switch, the voltage per unit number of turns of a specific coil, which is a part of the power transmitting coil and each of the power receiving coils, is made higher than the voltage per unit number of turns of the remaining coils. This makes it possible to preferentially reduce the switching loss of the power transmitting circuit and the power receiving circuit, which are connected to the specific coil.

1 is a diagram showing the configuration of a power conversion device according to a first embodiment; 4 is a time chart showing a control of a comparative example. FIG. 4 is a diagram showing a current path in a first period. FIG. 13 is a diagram showing a current path during a dead time after a first period. FIG. 13 is a diagram showing a current path in a second period. FIG. 13 is a diagram showing a current path in a third period. FIG. 13 is a diagram showing a current path during the dead time after the third period. FIG. 13 is a diagram showing a current path in a fourth period. 4 is a time chart showing an example of control. FIG. 13 is a diagram showing a current path in a fifth period. FIG. 13 is a diagram showing a current path during the dead time after the fifth period. FIG. 13 is a diagram showing a current path in a sixth period. FIG. 13 is a diagram showing a current path in a seventh period. FIG. 13 is a diagram showing a current path during the dead time after the seventh period. FIG. 13 is a diagram showing a current path in an eighth period. 5 is a flowchart showing the procedure of a process executed by a control unit. FIG. 13 is a graph showing the effect of reducing switching loss. 10 is a time chart showing an example of control according to the second embodiment; FIG. 13 is a diagram showing the configuration of a power conversion device according to a third embodiment. FIG. FIG. 13 is a diagram showing the configuration of a power conversion device according to a fourth embodiment.

First Embodiment
Hereinafter, a first embodiment of a power conversion device according to the present invention will be described with reference to the drawings. The power conversion device of the present embodiment is a multi-port type, and is mounted on an electric vehicle such as a plug-in hybrid electric vehicle (PHEV) or an electric vehicle (EV).

As shown in FIG. 1, the power supply system includes an external power supply 10, a first storage battery 20, a second storage battery 30, and a power conversion device 40. The external power supply 10 is, for example, a 100V single-phase AC commercial power supply or a 200V three-phase AC commercial power supply. The external power supply 10 is connected to a first high potential side terminal CH1 and a first low potential side terminal CL1 of the power conversion device 40. Each storage battery 20, 30 is a secondary battery that can be charged and discharged. The first storage battery 20 is, for example, a lithium ion storage battery or a nickel metal hydride storage battery, and the second storage battery 30 is, for example, a lead storage battery.

The power conversion device 40 includes an AC-DC converter 11 that converts AC power supplied from an external power source 10 into DC power. The AC-DC converter 11 is connected to the external power source 10 via a first high potential side terminal CH1 and a second high potential side terminal CH2 of the power conversion device 40. In this embodiment, the rated voltage (e.g., 400 V) output from the AC-DC converter 11 is higher than the rated voltage (e.g., 300 V) of the first storage battery 20, which is higher than the rated voltage (e.g., 14 V) of the second storage battery 30.

The power conversion device 40 includes a first full-bridge circuit 50 and a first capacitor 51. The first full-bridge circuit 50 includes first to fourth switches Q1 to Q4. In this embodiment, the first to fourth switches Q1 to Q4 are N-channel MOSFETs and include first to fourth body diodes D1 to D4. The drains of the first switch Q1 and the third switch Q3 are connected to the positive terminal of the AC-DC converter 11. The drain of the second switch Q2 is connected to the source of the first switch Q1, and the drain of the fourth switch Q4 is connected to the source of the third switch Q3. The sources of the second switch Q2 and the fourth switch Q4 are connected to the negative terminal of the AC-DC converter 11. The first end of the first capacitor 51 is connected to the positive terminal of the AC-DC converter 11, and the second end of the first capacitor 51 is connected to the negative terminal of the AC-DC converter 11. The first capacitor 51 may be provided inside the first full-bridge circuit 50.

In this embodiment, the first to fourth switches Q1 to Q4 are made of materials such as SiC (silicon carbide)-based materials and GaN (gallium nitride)-based materials, and have the characteristic of having a faster switching speed than an N-channel MOSFET made of Si. For example, when the switch is turned off, the switching speed refers to the time it takes for the gate voltage to fall below the threshold voltage Vth after it starts to drop.

The power conversion device 40 includes a second full-bridge circuit 60 and a second capacitor 61. The second full-bridge circuit 60 includes fifth to eighth switches Q5 to Q8. In this embodiment, the fifth to eighth switches Q5 to Q8 are N-channel MOSFETs made of SiC-based material, GaN-based material, or the like, and include fifth to eighth body diodes D5 to D8.

The drains of the fifth switch Q5 and the seventh switch Q7 are connected to the second high potential side terminal CH2 of the power conversion device 40. The drain of the sixth switch Q6 is connected to the source of the fifth switch Q5, and the drain of the eighth switch Q8 is connected to the source of the seventh switch Q7. The second low potential side terminal CL2 of the power conversion device 40 is connected to the sources of the sixth switch Q6 and the eighth switch Q8. The first end of the second capacitor 61 is connected to the positive terminal of the first storage battery 20 via the second high potential side terminal CH2, and the second end of the second capacitor 61 is connected to the negative terminal of the first storage battery 20 via the second low potential side terminal CL2. The second capacitor 61 may be provided inside the second full bridge circuit 60.

The power conversion device 40 includes a third full-bridge circuit 70 and a third capacitor 71. The third full-bridge circuit 70 includes ninth to twelfth switches Q9 to Q12. In this embodiment, the ninth to twelfth switches Q9 to Q12 are N-channel MOSFETs made of SiC-based material, GaN-based material, or the like, and include ninth to twelfth body diodes D9 to D12.

The drains of the ninth switch Q9 and the eleventh switch Q11 are connected to the third high potential side terminal CH3 of the power conversion device 40. The source of the ninth switch Q9 is connected to the drain of the tenth switch Q10, and the source of the eleventh switch Q11 is connected to the drain of the twelfth switch Q12. The sources of the tenth switch Q10 and the twelfth switch Q12 are connected to the third low potential side terminal CL3 of the power conversion device 40. The first end of the third capacitor 71 is connected to the third high potential side terminal CH3, and the second end of the third capacitor 71 is connected to the third low potential side terminal CL3. The voltage between the third high potential side terminal CH3 and the third low potential side terminal CL3 is controlled to be within a predetermined voltage range (for example, 40 to 48 V). The third capacitor 71 may be provided inside the third full bridge circuit 70.

The power conversion device 40 includes a step-down chopper circuit 72. The step-down chopper circuit 72 includes a first transformer switch SW1, a second transformer switch SW2, a reactor 73, and a fourth capacitor 74. In this embodiment, the first transformer switch SW1 and the second transformer switch SW2 are N-channel MOSFETs and include first and second rectifier diodes Di1 and Di2. The drain of the first transformer switch SW1 is connected to the third high-potential side terminal CH3 of the power conversion device 40. The source of the first transformer switch SW1 is connected to the first end of the reactor 73 and the drain of the second transformer switch SW2. The second end of the reactor 73 is connected to the first end of the fourth capacitor 74 and the fourth high-potential side terminal CH4 of the power conversion device 40. The source of the second transformer switch SW2 is connected to the third and fourth low-potential side terminals CL3 and CL4 of the power conversion device 40 and the second end of the fourth capacitor 74. The fourth high potential terminal CH4 is connected to the positive electrode terminal of the second storage battery 30, and the fourth low potential terminal CL4 is connected to the negative electrode terminal of the second storage battery 30.

The power conversion device 40 includes a transformer 80 having a first coil 81, a second coil 82, and a third coil 83. The first end of the first coil 81 is connected to the source of the first switch Q1 and the drain of the second switch Q2, and the second end of the first coil 81 is connected to the source of the third switch Q3 and the drain of the fourth switch Q4. The first end of the second coil 82 is connected to the source of the fifth switch Q5 and the drain of the sixth switch Q6, and the second end of the second coil 82 is connected to the source of the seventh switch Q7 and the drain of the eighth switch Q8. The first end of the third coil 83 is connected to the source of the ninth switch Q9 and the drain of the tenth switch Q10, and the second end of the third coil 83 is connected to the source of the eleventh switch Q11 and the drain of the twelfth switch Q12.

In this embodiment, the number of turns N1 of the first coil 81 is 8 turns, the number of turns N2 of the second coil 82 is 7 turns, and the number of turns N3 of the third coil 83 is 1 turn. Note that the number of turns N1 to N3 of each of the coils 81 to 83 may be changed depending on the specifications required for the power conversion device 40.

The first coil 81, the second coil 82, and the third coil 83 are magnetically coupled to each other, for example, via a core provided in the transformer 80. When the potential of the first end of the first coil 81 becomes higher relative to the second end, an induced voltage is generated in each of the second coil 82 and the third coil 83 such that the potential of the first end is higher than that of the second end. On the other hand, when the potential of the second end of the first coil 81 becomes higher relative to the first end, an induced voltage is generated in each of the second coil 82 and the third coil 83 such that the potential of the second end is higher than that of the first end.

When the potential of the first end relative to the second end of the first coil 81 increases, the polarity of the voltage Vt1 of the first coil 81 is defined as positive, and the direction of the current IL1 flowing from the first end to the second end of the first coil 81 is defined as positive. When the potential of the first end relative to the second end of the second coil 82 increases, the polarity of the voltage Vt2 of the second coil 82 is defined as positive, and the direction of the current IL2 flowing from the first end to the second end of the second coil 82 is defined as positive. When the potential of the first end relative to the second end of the third coil 83 increases, the polarity of the voltage Vt3 of the third coil 83 is defined as positive, and the direction of the current IL3 flowing from the first end to the second end of the third coil 83 is defined as positive.

The power conversion device 40 is equipped with first to third voltage sensors 91 to 93. The first voltage sensor 91 detects a first voltage which is the terminal voltage of the first capacitor 51, the second voltage sensor 92 detects a second voltage which is the terminal voltage of the second capacitor 61, and the third voltage sensor 93 detects a third voltage which is the terminal voltage of the third capacitor 71.

The detected values V1r to V3r of the first to third voltages detected by the first to third voltage sensors 91 to 93 are input to a control unit 100 provided in the power conversion device 40. The control unit 100 sets command values based on the first to third voltages V1r to V3r. Here, the command values include command values for the first to third voltages V1r to V3r and command values for the voltages Vt1 to Vt3 of the coils 81 to 83. The control unit 100 turns on and off the first to twelfth switches Q1 to Q12 and the first and second transformer switches SW1 and SW2 based on the set command values. The method of setting the command values will be described later.

The driving modes of the first to twelfth switches Q1 to Q12 and the first and second transformer switches SW1 and SW2 are explained below.

The first switch Q1 and the second switch Q2 are alternately turned on with a dead time TD in between, and the third switch Q3 and the fourth switch Q4 are alternately turned on with a dead time TD in between. When the first switch Q1 and the fourth switch Q4 are turned on and the second switch Q2 and the third switch Q3 are turned off, the polarity of the voltage Vt1 of the first coil 81 is positive. When the first switch Q1 and the fourth switch Q4 are turned off and the second switch Q2 and the third switch Q3 are turned on, the polarity of the voltage Vt1 of the first coil 81 is negative.

The fifth switch Q5 and the sixth switch Q6 are alternately turned on with a dead time TD in between, and the seventh switch Q7 and the eighth switch Q8 are alternately turned on with a dead time TD in between. When the fifth switch Q5 and the eighth switch Q8 are turned on and the sixth switch Q6 and the seventh switch Q7 are turned off, the polarity of the voltage Vt2 of the second coil 82 is positive. When the fifth switch Q5 and the eighth switch Q8 are turned off and the sixth switch Q6 and the seventh switch Q7 are turned on, the polarity of the voltage Vt2 of the second coil 82 is negative.

The ninth switch Q9 and the tenth switch Q10 are alternately turned on with a dead time TD therebetween, and the eleventh switch Q11 and the twelfth switch Q12 are alternately turned on with a dead time TD therebetween. When the ninth switch Q9 and the twelfth switch Q12 are turned on and the tenth switch Q10 and the eleventh switch Q11 are turned off, the polarity of the voltage Vt3 of the third coil 83 is positive. When the ninth switch Q9 and the twelfth switch Q12 are turned off and the tenth switch Q10 and the eleventh switch Q11 are turned on, the polarity of the voltage Vt3 of the third coil 83 is negative. In this embodiment, the switching periods of the first to twelfth switches Q1 to Q12 are the same.

The power transmitted between each of the coils 81 to 83 is controlled by the timing at which each of the switches Q1 to Q12 is switched on. For example, the timing at which the first switch Q1 is switched on is set as a reference timing, and the timing at which the fifth switch Q5 is switched on is delayed with respect to this reference timing, thereby controlling the power transmitted between the first coil 81 and the second coil 82. Also, for example, the timing at which the first switch Q1 is switched on is set as a reference timing, and the timing at which the ninth switch Q9 is switched on is delayed with respect to this reference timing, thereby controlling the power transmitted between the first coil 81 and the third coil 83.

The first transformer switch SW1 and the second transformer switch SW2 are alternately turned on. The control unit 100 controls the duty ratio, which is the on/off ratio of the first transformer switch SW1 and the second transformer switch SW2, to step down the third voltage V3r to a target voltage and supply the stepped-down voltage to the second storage battery 30.

Next, a comparative example different from this embodiment will be used to explain a case where the switching loss of each full bridge circuit 50, 60, 70 increases. Here, a comparative example will be explained in which the switching loss of the second full bridge circuit 60 increases when power is transmitted from the first coil 81 to the second and third coils 83.

Figure 2 is a time chart showing the control of the comparative example. In Figure 2, (a) to (c) show the changes in the voltages Vt1 to Vt3 of the coils 81 to 83, (d) to (f) show the changes in the currents IL1 to IL3 flowing through the coils 81 to 83, (g) shows the change in the current IQ5 flowing through the fifth switch Q5, (h) shows the change in the voltage VQ5 between the source and drain of the fifth switch Q5, and (i) shows the operating state of the fifth switch Q5.

In the comparative example, power is transmitted from the first coil 81 to the second and third coils 82 and 83. The first voltage V1r is set to 400 V, the second voltage V2r is set to 290 V, and the third voltage V3r is set to 50 V.

The first period T1 is the period immediately before the fifth switch Q5 is switched from on to off, and the second period T2 is the period immediately after the fifth switch Q5 is switched from on to off. Between the first period T1 and the second period T2, there is a dead time TD during which the fifth to eighth switches Q5 to Q8 are turned off.

Figures 3 to 5 are diagrams showing the current paths during the first period T1, the dead time TD after the first period T1, and the second period T2. Note that in Figures 3 to 5, the components shown in Figure 1 above are given the same reference numerals for convenience. Also, the third full-bridge circuit 70, the third capacitor 71, the third coil 83, etc. are not shown.

Figure 3 shows the current path during the first period T1. The current path on the first full bridge circuit 50 side is the first capacitor 51 → the second switch Q2 → the first coil 81 → the third switch Q3 → the first capacitor 51. The sign of the current IL1 flowing through the first coil 81 is positive. On the other hand, the current path on the second full bridge circuit 60 side is the second capacitor 61 → the eighth switch Q8 and the eighth body diode D8 → the second coil 82 → the fifth switch Q5 and the fifth body diode D5 → the second capacitor 61. The sign of the current IL2 flowing through the second coil 82 is negative. Charge is accumulated in the parasitic capacitance formed between the source and drain of the sixth and seventh switches Q6 and Q7 so that the potential on the drain side is higher than that on the source side.

Figure 4 shows the current path of the dead time TD after the first period T1. The current path on the first full bridge circuit 50 side is the same as that in the first period T1. On the other hand, in the second full bridge circuit 60, the fifth switch Q5 and the eighth switch Q8 are switched off. The current path on the second full bridge circuit 60 side is the second capacitor 61 → the eighth body diode D8 → the second coil 82 → the fifth body diode D5 → the second capacitor 61. In this case, the current flows back through the fifth and eighth body diodes D5 and D8 in a direction in which the sign of the current IL2 flowing through the second coil 82 is negative.

Figure 5 shows the current path during the second period T2. The current path on the first full bridge circuit 50 side is the same as the dead time TD after the first period T1. On the other hand, in the second full bridge circuit 60, the seventh switch Q7 and the sixth switch Q6 are switched on. The current path on the second full bridge circuit 60 side is the second capacitor 61 → the seventh switch Q7 → the second coil 82 → the sixth switch Q6 → the second capacitor 61. In this case, the switching loss that occurs when the sixth switch Q6 and the seventh switch Q7 are turned on increases.

More specifically, a recovery current flows through the fifth body diode D5 and the eighth body diode D8. In addition, the charge stored in the parasitic capacitance of the sixth switch Q6 and the seventh switch Q7 is discharged. This causes a large current to temporarily flow through the second full-bridge circuit 60. This increases the switching loss when the sixth switch Q6 and the seventh switch Q7 are turned on.

Returning to the explanation of FIG. 2, the third period T3 is the period immediately before the fifth switch Q5 is switched from off to on, and the fourth period T4 is the period immediately after the fifth switch Q5 is switched from off to on. Between the third period T3 and the fourth period T4, there is a dead time TD during which the fifth to eighth switches Q5 to Q8 are turned off.

Figures 6 to 8 are diagrams showing the current paths during the third period T3, the dead time TD after the third period T3, and the fourth period T4. Note that in Figures 6 to 8, the components shown in Figure 1 above are given the same reference numerals for convenience. Also, the third full-bridge circuit 70, the third capacitor 71, the third coil 83, etc. are not shown.

Figure 6 shows the current path in the third period T3. The current path on the first full bridge circuit 50 side is the first capacitor 51 → the fourth switch Q4 → the first coil 81 → the first switch Q1 → the first capacitor 51. The sign of the current IL1 flowing through the first coil 81 is negative. On the other hand, the current path on the second full bridge circuit 60 side is the second capacitor 61 → the sixth switch Q6 and the sixth body diode D6 → the second coil 82 → the seventh switch Q7 and the seventh body diode D7 → the second capacitor 61. The sign of the current IL2 flowing through the second coil 82 is positive. Charge is accumulated in the parasitic capacitance formed between the source and drain of the fifth and eighth switches Q5 and Q8 so that the potential on the drain side is higher than that on the source side.

Figure 7 shows the current path of the dead time TD after the third period T3. The current path on the first full bridge circuit 50 side is the same as that in the third period T3. On the other hand, in the second full bridge circuit 60, the sixth switch Q6 and the seventh switch Q7 are switched off. The current path on the second full bridge circuit 60 side is the second capacitor 61 → sixth body diode D6 → second coil 82 → seventh body diode D7 → second capacitor 61. In this case, the current flows back through the sixth and seventh body diodes D6 and D7 in a direction in which the sign of the current IL2 flowing through the second coil 82 is positive.

Figure 8 shows the current path during the fourth period T4. The current path on the first full bridge circuit 50 side is the same as the dead time TD after the third period T3. On the other hand, in the second full bridge circuit 60, the fifth switch Q5 and the eighth switch Q8 are switched on. The current path on the second full bridge circuit 60 side is the second capacitor 61 → the fifth switch Q5 → the second coil 82 → the eighth switch Q8 → the second capacitor 61. In this case, the switching loss that occurs when the fifth switch Q5 and the eighth switch Q8 are turned on increases.

More specifically, a recovery current flows through the sixth body diode D6 and the seventh body diode D7. In addition, the charge stored in the parasitic capacitance of the fifth switch Q5 and the eighth switch Q8 is discharged. This causes a large current to temporarily flow through the second full-bridge circuit 60. This increases the switching loss when the fifth switch Q5 and the eighth switch Q8 are turned on.

Here, in the control of the comparative example, the switching loss increases because the sign of the current IL2 flowing through the second coil 82 is negative in the first period T1, and the sign of the current IL2 flowing through the second coil 82 is positive in the third period T3.

The inventor of the present application has noticed that in the control of the comparative example, when the second voltage V2r per unit turn of the second coil 82 is lower than the first and third voltages V1r and V3r per unit turn of the first and third coils 81 and 83, the switch is likely to be turned on and off in the state of the sign of the current IL2 described above. In this embodiment, the first voltage V1r per unit turn of the first coil 81 is V1r/N1, the second voltage V2r per unit turn of the second coil 82 is V2r/N2, and the third voltage per unit turn of the third coil 83 is V3r/N3. In the control of the comparative example, the first voltage V1r per unit turn of the first coil 81 is 50V, the second voltage V2r per unit turn of the second coil 82 is 41.43V, and the third voltage per unit turn of the third coil 83 is 50V.

In detail, in the control of the comparative example, the second voltage V2r per unit number of turns of the second coil 82 is lower than the first and third voltages V1r and V3r per unit number of turns of the first and third coils 81 and 83, and therefore the time change amount of the current IL2 flowing through the second coil 82 becomes negative during the first control period TA. Here, the first control period TA is the period during which the switches that are turned on are Q1, Q4, Q5, Q8, Q9, and Q12, and the switches that are turned off are Q2, Q3, Q6, Q7, Q10, and Q11. In this case, the current IL2 flowing through the second coil 82 increases to the negative side, and therefore the sign of the current IL2 flowing through the second coil 82 tends to become negative during the first period T1.

In the control of the comparative example, the second voltage V2r per unit turn of the second coil 82 is lower than the first and third voltages V1r and V3r per unit turn of the first and third coils 81 and 83, and therefore the time change amount of the current IL2 flowing through the second coil 82 becomes positive during the second control period TB. Here, the second control period TB is the period in which the switches Q2, Q3, Q6, Q7, Q10, and Q11 are turned on, and the switches Q1, Q4, Q5, Q8, Q9, and Q12 are turned off. In this case, the current IL2 flowing through the second coil 82 increases to the positive side, so that the sign of the current IL2 flowing through the second coil 82 is likely to become positive during the third period T3.

The amount of change over time of the current IL2 flowing through the second coil 82 during each control period TA, TB will now be explained as an additional explanation. Here, the relationship between the first to third coils 81 to 83 is considered as an equivalent circuit in which the first to third equivalent coils are Δ-connected. Here, the first equivalent coil represents the relationship between the first coil 81 and the second coil 82, the second equivalent coil represents the relationship between the first coil 81 and the third coil 83, and the third equivalent coil represents the relationship between the second coil 82 and the third coil 83. In this case, the current IL2 flowing through the second coil 82 is the sum of the current flowing through the first equivalent coil and the current flowing through the third equivalent coil.

During the first control period TA, if the second voltage V2r per unit turn of the second coil 82 is lower than the first voltage V1r per unit turn of the first coil 81, the amount of change over time of the current flowing through the first equivalent coil becomes negative. If the second voltage V2r per unit turn of the second coil 82 is lower than the third voltage V3r per unit turn of the third coil 83, the amount of change over time of the current flowing through the third equivalent coil becomes negative. Therefore, the amount of change over time of the current IL2 flowing through the second coil 82 becomes negative.

In addition, during the second control period TB, if the second voltage V2r per unit turn of the second coil 82 is lower than the first voltage V1r per unit turn of the first coil 81, the amount of change over time of the current flowing through the first equivalent coil is positive. If the second voltage V2r per unit turn of the second coil 82 is lower than the third voltage V3r per unit turn of the third coil 83, the amount of change over time of the current flowing through the third equivalent coil is positive. Therefore, the amount of change over time of the current IL2 flowing through the second coil 82 is positive.

More specifically, the amount of change over time of the current IL2 flowing through the second coil 82 during each control period TA and TB is expressed by the following formula (c1) using the voltages Vt1 to Vt3 of the first to third coils 81 to 83.

ここで、Ｌ２１は第１等価コイルの相互インダクタンスであり、Ｌ２３は第３等価コイルの相互インダクタンスである。本実施形態において、各相互インダクタンスＬ２１，Ｌ２３は同じ値とされる。上式（ｃ１）の右辺において、第１項は第１等価コイルを流れる電流の時間変化量を示し、第２項は第３等価コイルを流れる電流の時間変化量を示す。なお、相互インダクタンスＬ２１，Ｌ２３は互いに異なる値とされてもよい。

Here, L21 is the mutual inductance of the first equivalent coil, and L23 is the mutual inductance of the third equivalent coil. In this embodiment, the mutual inductances L21 and L23 are the same value. In the right side of the above formula (c1), the first term indicates the amount of change in the current flowing through the first equivalent coil, and the second term indicates the amount of change in the current flowing through the third equivalent coil. Note that the mutual inductances L21 and L23 may be different values.

In the control of the comparative example, in the first control period TA, the voltage Vt1 of the first coil 81 is set to 400 V, the voltage Vt2 of the second coil 82 is set to 290 V, and the voltage Vt3 of the third coil 83 is set to 50 V. Therefore, in the above formula (c1), the amount of change over time of the current IL2 flowing through the second coil 82 becomes negative.

In the control of the comparative example, during the second control period TB, the voltage Vt1 of the first coil 81 is set to -400 V, the voltage Vt2 of the second coil 82 is set to -290 V, and the voltage Vt3 of the third coil 83 is set to -50 V. Therefore, in the above equation (c1), the amount of change over time of the current IL2 flowing through the second coil 82 becomes positive.

As described above, if the second voltage V2r per unit turn of the second coil 82 is lower than the first and third voltages V1r and V3r per unit turn of the first and third coils 81 and 83, there is a concern that switching losses will increase in the second full bridge circuit 60.

Therefore, in this embodiment, the voltages V1r to V3r per unit number of turns of each coil 81 to 83 are brought closer to each other. In this embodiment, the first voltage V1r is set to 330V instead of 400V, and the third voltage V3r is set to 40V instead of 50V. In this case, the first voltage V1r per unit number of turns of the first coil 81 is 41.25V, the second voltage V2r per unit number of turns of the second coil 82 is 41.43V, and the third voltage V3r per unit number of turns of the third coil 83 is 40V. As a result, the second and third voltages V2r and V3r per unit number of turns of the second and third coils 82 and 83 are reduced more than in the comparative example, and the voltages V1r to V3r per unit number of turns of each coil 81 to 83 are brought closer to each other than in the control of the comparative example. In this case, the amount of change over time of the current IL2 flowing through the second coil 82 during each control period TA and TB is set to approximately zero.

Note that bringing the voltages V1r to V3r per unit number of turns of each coil 81 to 83 closer to each other means, for example, doing the following. The first voltage V1r per unit number of turns of the first coil 81 is V1a, the second voltage V2r per unit number of turns of the second coil 82 is V2a, and the third voltage V3r per unit number of turns of the third coil 83 is V3a. The smallest value of V1a, V2a, and V3a is Vm. In this case, when V1a/Vm, V2a/Vm, and V3a/Vm are within a specified range, it is considered that V1a, V2a, and V3a are close to each other. The specified range is, for example, 1 to 1.1, preferably 1 to 1.06, and more preferably 1 to 1.03.

Figure 9 is a time chart showing an example of control in this embodiment, in which the time change amount of the current IL2 flowing through the second coil 82 in each control period TA, TB is set to approximately zero. In Figure 9, (a) to (i) correspond to (a) to (i) in Figure 2. In this embodiment, power is also transmitted from the first coil 81 to the second and third coils 82, 83.

The fifth period T5 is the period immediately before the fifth switch Q5 is switched from on to off, and the sixth period T6 is the period immediately after the fifth switch Q5 is switched from on to off. Between the fifth period T5 and the sixth period T6, there is a dead time TD during which the fifth to eighth switches Q5 to Q8 are turned off.

Figures 10 to 12 are diagrams showing the current paths during the fifth period T5, the dead time TD after the fifth period T5, and the sixth period T6. Note that in Figures 10 to 12, the components shown in Figure 1 above are given the same reference numerals for convenience. Also, the third full-bridge circuit 70, the third capacitor 71, the third coil 83, etc. are not shown.

Figure 10 shows the current path in the fifth period T5. The current path on the first full bridge circuit 50 side is the first capacitor 51 → the third switch Q3 → the first coil 81 → the second switch Q2 → the first capacitor 51. The sign of the current IL1 flowing through the first coil 81 is negative. On the other hand, the current path on the second full bridge circuit 60 side is the second capacitor 61 → the fifth switch Q5 → the second coil 82 → the eighth switch Q8 → the second capacitor 61. The sign of the current IL2 flowing through the second coil 82 is positive. Charge is accumulated in the parasitic capacitance formed between the source and drain of the sixth and seventh switches Q6 and Q7 so that the potential on the drain side is higher than that on the source side.

Figure 11 shows the current path of the dead time TD after the fifth period T5. The current path on the first full bridge circuit 50 side is the same as that in the fifth period T5. On the other hand, in the second full bridge circuit 60, the fifth switch Q5 and the eighth switch Q8 are switched off. The current path on the second full bridge circuit 60 side is the second capacitor 61 → the sixth switch Q6 → the second coil 82 → the seventh switch Q7 → the second capacitor 61. In this case, switching loss occurs when the fifth switch Q5 and the eighth switch Q8 are turned off. However, this switching loss is smaller than the switching loss that occurs when the switches Q5 to Q8 are turned on in the control of the comparative example, because the current flowing through the second full bridge circuit 60 is relatively small.

During the dead time TD after the fifth period, the charge stored in the parasitic capacitance of the sixth switch Q6 and the seventh switch Q7 is discharged in a direction in which the sign of the current IL2 flowing through the second coil 82 becomes positive. In this embodiment, the dead time TD after the fifth period is set to a period sufficient for the charge stored in the parasitic capacitance of the sixth switch Q6 and the seventh switch Q7 to be discharged.

Figure 12 shows the current path of the sixth period T6. The current path on the first full bridge circuit 50 side is the same as the dead time TD after the fifth period T5. On the other hand, in the second full bridge circuit 60, the sixth switch Q6 and the seventh switch Q7 are switched on. The current path on the second full bridge circuit 60 side is the second capacitor 61 → the sixth switch Q6 → the second coil 82 → the seventh switch Q7 → the second capacitor 61. In this case, the sixth switch Q6 and the seventh switch Q7 are turned on in a state in which the charge accumulated in the parasitic capacitance of the sixth switch Q6 and the seventh switch Q7 is discharged. In addition, even if the sixth switch Q6 and the seventh switch Q7 are turned on, no recovery current flows through the fifth and eighth body diodes D5 and D8 of the opposing arm. Therefore, the sixth switch Q6 and the seventh switch Q7 are turned on in a state in which the current flowing through the second full bridge circuit 60 is reduced. As a result, the switching loss caused by the sixth switch Q6 and the seventh switch Q7 being turned on can be reduced.

The seventh period T7 is the period immediately before the fifth switch Q5 is switched from off to on, and the eighth period T8 is the period immediately after the fifth switch Q5 is switched from off to on. Between the seventh period T7 and the eighth period T8, there is a dead time TD during which the fifth to eighth switches Q5 to Q8 are turned off.

Figures 13 to 15 are diagrams showing the current paths during the seventh period T7, the dead time TD, and the eighth period T8. Note that in Figures 13 to 15, the components shown in Figure 1 above are given the same reference numerals for convenience. Also, the third full-bridge circuit 70, the third capacitor 71, the third coil 83, etc. are not shown.

Figure 13 shows the current path in the seventh period T7. The current path on the first full bridge circuit 50 side is the first capacitor 51 → the first switch Q1 → the first coil 81 → the fourth switch Q4 → the first capacitor 51. The sign of the current IL1 flowing through the first coil 81 is positive. On the other hand, the current path on the second full bridge circuit 60 side is the second capacitor 61 → the seventh switch Q7 → the second coil 82 → the sixth switch Q6 → the second capacitor 61. The sign of the current IL2 flowing through the second coil 82 is negative. Charge is stored in the parasitic capacitance formed between the source and drain of the fifth and eighth switches Q5 and Q8 so that the potential on the drain side is higher than that on the source side.

Figure 14 shows the current path of the dead time TD after the seventh period T7. The current path on the first full bridge circuit 50 side is the same as that in the seventh period T7. On the other hand, in the second full bridge circuit 60, the sixth switch Q6 and the seventh switch Q7 are switched off. The current path on the second full bridge circuit 60 side is the second capacitor 61 → the eighth switch Q8 → the second coil 82 → the fifth switch Q5 → the second capacitor 61. In this case, switching loss occurs when the sixth switch Q6 and the seventh switch Q7 are turned off. This switching loss is smaller than the switching loss that occurs when the switches Q5 to Q8 are turned on in the control of the comparative example, because the current flowing through the second full bridge circuit 60 is relatively small.

During the dead time TD after the seventh period T7, the charge stored in the parasitic capacitance of the fifth switch Q5 and the eighth switch Q8 is discharged in a direction in which the sign of the current IL2 flowing through the second coil 82 becomes negative. In this embodiment, the dead time TD after the fifth period is set to a period sufficient for the charge stored in the parasitic capacitance of the fifth switch Q5 and the eighth switch Q8 to be discharged.

Figure 15 shows the current path of the eighth period T8. The current path on the first full bridge circuit 50 side is the same as the dead time TD after the seventh period T7. On the other hand, in the second full bridge circuit 60, the fifth switch Q5 and the eighth switch Q8 are switched on. The current path on the second full bridge circuit 60 side is the second capacitor 61 → the eighth switch Q8 → the second coil 82 → the fifth switch Q5 → the second capacitor 61. In this case, the fifth switch Q5 and the eighth switch Q8 are turned on in a state in which the charges stored in the parasitic capacitances of the fifth switch Q5 and the eighth switch Q8 are discharged. In addition, even if the fifth switch Q5 and the eighth switch Q8 are turned on, no recovery current flows through the sixth and seventh body diodes D6 and D7 of the opposing arms. Therefore, the fifth switch Q5 and the eighth switch Q8 are turned on in a state in which the current flowing through the second full bridge circuit 60 is reduced. As a result, the switching loss caused by the fifth switch Q5 and the eighth switch Q8 being turned on can be reduced.

In Figures 9 to 15, it has been described that switching losses are reduced in the second full bridge circuit 60. In this embodiment, the voltages V1r to V3r per unit turn of each coil 81 to 83 are brought closer to each other, so that switching losses can be reduced in the first and third full bridge circuits 50 and 70 for the same reason as in the second full bridge circuit 60.

Next, we will explain the control performed by the control unit 100.

The control unit 100 acquires the first to third voltages V1r to V3r detected by the first to third voltage sensors 91 to 93. The control unit 100 sets command values for the first to third voltages V1r to V3r based on the acquired first to third voltages V1r to V3r.

In this embodiment, the control unit 100 sets the command values of the first to third voltages V1r to V3r so that the voltages V1r to V3r per unit number of turns of each coil 81 to 83 approach each other. Specifically, the control unit 100 sets the first command value of the first voltage V1r to 330 V, the second command value of the second voltage V2r to 290 V, and the third command value of the third voltage V3r to 40 V.

The control unit 100 performs switching control so that the first to third voltage detection values V1r to V3r detected by the first to third voltage sensors 91 to 93 become the set first to third command values. For example, the control unit 100 controls the first voltage V1r to the first command value by controlling the output voltage of the AC-DC converter 11. Also, for example, the control unit 100 controls the third voltage V3r to the third command value by performing switching control of the ninth to twelfth switches Q9 to Q12.

Figure 16 shows the procedure for the process that the control unit 100 repeatedly executes at a predetermined interval.

In step S10, it is determined whether or not there is a request to drive the power conversion device 40. If the determination in step S10 is negative, the process proceeds to step S11, where the power conversion device 40 is set to standby mode. In step S12, the first to twelfth switches Q1 to Q12 and the first and second transformer switches SW1 and SW2 are turned off.

If the determination in step S10 is positive, the process proceeds to step S13, where the operation mode is set. In this case, a power transmission circuit that serves as a power supply source and a power receiving circuit that is fed from the power supply source are selected from the first to third full bridge circuits 50, 60, 70. A loss reduction target is selected from the first to third full bridge circuits 50, 60, 70. A loss reduction target is a circuit that is a target for reducing switching loss among the first to third full bridge circuits 50, 60, 70. In this embodiment, the first full bridge circuit 50 is selected as the power transmission circuit, and the second and third full bridge circuits 60, 70 are selected as the power receiving circuits. Also, the first to third full bridge circuits 50, 60, 70 are selected as the loss reduction targets.

In this embodiment, the first high potential side terminal CH1 and the first low potential side terminal CL1 correspond to the "power transmission terminals", and the first coil 81 corresponds to the "power transmission coil". The second and third high potential side terminals CH2, CH3 and the second and third low potential side terminals CL2, CL3 correspond to the "power receiving terminals", and the second and third coils 82, 83 correspond to the "power receiving coils". The first and third switches Q1, Q3 correspond to the "upper arm power transmission switch", the second and fourth switches Q2, Q4 correspond to the "lower arm power transmission switch", the fifth, seventh, ninth and eleventh switches Q5, Q7, Q9, Q11 correspond to the "upper arm power receiving switch", and the sixth, eighth, tenth and twelfth switches Q6, Q8, Q10, Q12 correspond to the "lower arm power receiving switch".

In step S14, the detection values V1r to V3r of the first to third voltages detected by the first to third voltage sensors 91 to 93 are acquired. In step S15, the first to third command values are set based on the acquired first to third voltages V1r to V3r. In this embodiment, the first to third command values are set so that the voltages V1r to V3r per unit number of turns of each coil 81 to 83 approach each other. In step S16, switching control is performed so that the acquired first to third voltages V1r to V3r become the set first to third command values.

Figure 17 is a diagram comparing the switching loss generated in the second full bridge circuit 60 in the control according to this embodiment and the control according to the comparative example. Figure 17 shows the switching loss when power is transmitted from the first coil 81 side to the second and third coils 82 and 83 sides. In condition A, the power Pout1 transmitted from the first coil 81 side to the second coil 82 side is set to 1.6 kW, and the power Pout2 transmitted from the first coil 81 side to the third coil 83 side is set to 0.6 kW. In condition B, the power Pout1 is set to 1.6 kW, and the power Pout2 is set to 1.2 kW. In condition C, the power Pout1 is set to 1.6 kW, and the power Pout2 is set to 1.8 kW. In each of conditions A to C, it was confirmed that the switching loss in this embodiment can be reduced by about 90% compared to the switching loss in the comparative example.

Second Embodiment
The second embodiment will be described below with reference to the drawings, focusing on the differences from the first embodiment. In this embodiment, the first to third command values are set so that the voltages V1r to V3r per unit number of turns of the coils 81 to 83 approach each other, and a reflux period is provided within one switching period.

Figure 18 is a time chart showing an example of control in this embodiment, in which a first freewheeling period TC1 and a second freewheeling period TC2 are provided within one switching period of each of the switches Q1 to Q4. In Figure 18, (a) to (i) correspond to (a) to (i) in Figure 9. In this embodiment, power is also transmitted from the first coil 81 to the second and third coils 82 and 83.

The first and second free-wheeling periods TC1 and TC2 are periods during which the first and second ends of the first coil 81 are short-circuited. Specifically, during the first free-wheeling period TC1, in the first full-bridge circuit 50, the first and third switches Q1 and Q3 are turned on, and the second and fourth switches Q2 and Q4 are turned off. During the second free-wheeling period TC2, in the first full-bridge circuit 50, the second and fourth switches Q2 and Q4 are turned on, and the first and third switches Q1 and Q3 are turned off.

In addition, during the first reflux period TC1, the second and fourth switches Q2 and Q4 may be turned on, and the first and third switches Q1 and Q3 may be turned off. Also, during the second reflux period TC2, the first and third switches Q1 and Q3 may be turned on, and the second and fourth switches Q2 and Q4 may be turned off.

By providing the first freewheeling period TC1 and the second freewheeling period TC2 within one switching period, a period occurs during which the voltage Vt1 of the first coil 81 is 0 V. The greater the proportion of the first freewheeling period TC1 and the second freewheeling period TC2 within one switching period, the greater the reduction in the effective value of the voltage Vt1 of the first coil 81. Even in this case, the same effect as reducing the first voltage V1r per unit number of turns of the first coil 81 can be obtained. Therefore, even if there is a restriction on the setting range of the first command value of the first voltage V1r and the first command value cannot be reduced, for example, by providing the first and second freewheeling periods TC1 and TC2, it is possible to reduce switching losses.

Therefore, in addition to reducing the first command value of the first voltage V1r, the control unit 100 provides a first reflux period TC1 and a second reflux period TC2. In this embodiment, instead of setting the first command value of the first voltage V1r to 330V, the control unit 100 sets the first command value of the first voltage V1r to 350V and provides a first reflux period TC1 and a second reflux period TC2. Even in this case, the same effect as in the first embodiment can be obtained.

Third Embodiment
Hereinafter, the third embodiment will be described with reference to the drawings, focusing on the differences from the first embodiment. In this embodiment, the method of setting the first to third command values is changed.

Due to restrictions on the setting range of the first to third command values, it may not be possible to bring the voltages V1r to V3r per unit number of turns of the coils 81 to 83 close to each other. In this case, switching losses increase in some of the first to third full bridge circuits 50, 60, and 70.

In this embodiment, therefore, of the first to third full bridge circuits 50, 60, and 70, the circuit in which the switching loss should be reduced is selected as the target for loss reduction. In this embodiment, the full bridge circuit configured with switches having a low switching speed and the power transmission circuit in which the transmitted power is likely to be large are selected as the target for loss reduction, as they are circuits in which switching loss is likely to increase.

In this embodiment, of the first to third coils 81 to 83, the coil connected to the full bridge circuit that is the target of loss reduction is designated as a specific coil, and the voltage per unit number of turns of the specific coil is made higher than the voltage per unit number of turns of the remaining coils.

The configuration of the power conversion device 40 according to this embodiment will be described below with reference to FIG. 19. The third full-bridge circuit 70 includes thirteenth, fourteenth, fifteenth, and sixteenth switches Q13, Q14, Q15, and Q16 instead of the ninth, tenth, eleventh, and twelfth switches Q9, Q10, Q11, and Q12. The thirteenth to sixteenth switches Q13 to Q16 are IGBTs made of Si. Thirteenth to sixteenth diodes D13 to D16 are connected in reverse parallel to the switches Q13 to Q16 as freewheel diodes. The switching speed of the thirteenth to sixteenth switches Q13 to Q16 is lower than the switching speed of the first to eighth switches Q1 to Q8. In this embodiment, the third full-bridge circuit 70 corresponds to a "specific power receiving circuit."

Next, the process that the control unit 100 repeatedly executes at a predetermined cycle will be described with reference to FIG. 16. In this embodiment, in step S13, the second full bridge circuit 60 is selected as the power transmission circuit, and the first and third full bridge circuits 50 and 70 are selected as the power receiving circuits. The third full bridge circuit 70, which is composed of switches with a low switching speed, and the second full bridge circuit 60, which is the power transmission circuit, are selected as targets for loss reduction.

In this embodiment, the second high potential side terminal CH2 and the second low potential side terminal CL2 correspond to the "power transmission terminals", the second coil 82 corresponds to the "power transmission coil", and the fifth to eighth switches Q5 to Q8 correspond to the "power transmission switches". The first high potential side terminal CH1 and the first low potential side terminal CL1 correspond to the "power receiving terminals", the first to fourth switches Q1 to Q4 correspond to the "power receiving switches", and the thirteenth to sixteenth switches Q13 to Q16 correspond to the "specific power receiving switches".

In this embodiment, in step S15, the second and third voltages V2r and V3r per unit number of turns of the second and third coils 82 and 83, which are specific coils, are made higher than the first voltage V1r per unit number of turns of the first coil 81, which is the remaining coil. Specifically, the control unit 100 sets the first command value to 320 V, the second command value to 300 V, and the third command value to 55 V. In this case, the first voltage V1r per unit number of turns of the first coil 81 is 40 V, the second voltage V2r per unit number of turns of the second coil 82 is 43 V, and the third voltage V3r per unit number of turns of the third coil 83 is 55 V. As a result, the voltages V1r to V3r of each of the coils 81 to 83 per unit number of turns are higher in the order from the highest to the lowest, that is, the third coil 83, the second coil 82, and the first coil 81. Here, the third voltage V3r per unit turn of the third coil 83 is made higher than the second voltage V2r per unit turn of the second coil 82 because reducing the switching loss of the full bridge circuit, which has switches with low switching speeds, is given priority over reducing the switching loss of the power transmission circuit.

Figure 20 is a time chart showing an example of the control of this embodiment, which is an example of the control in which the switching losses of the second and third full bridge circuits 60 and 70 are preferentially reduced. In Figure 20, (a) to (f) correspond to (a) to (f) in Figure 9.

At time t1, the fifth and eighth switches Q5 and Q8 are turned off, and the sixth and seventh switches Q6 and Q7 are turned on. Here, the sign of the current IL2 flowing through the second coil 82 is set to positive. Therefore, the switching loss of the second full bridge circuit 60 can be reduced.

At time t2, the thirteenth and sixteenth switches Q13 and Q16 are turned off, and the fourteenth and fifteenth switches Q14 and Q15 are turned on. Here, the sign of the current IL3 flowing through the third coil 83 is made positive. Therefore, the switching loss of the third full bridge circuit 70 can be reduced.

At time t3, the sixth and seventh switches Q6 and Q7 are turned off, and the fifth and eighth switches Q5 and Q8 are turned on. Here, the sign of the current IL2 flowing through the second coil 82 is made negative. Therefore, the switching loss of the second full bridge circuit 60 can be reduced.

At time t4, the fourteenth and fifteenth switches Q14 and Q15 are turned off, and the thirteenth and sixteenth switches Q13 and Q16 are turned on. Here, the sign of the current IL3 flowing through the third coil 83 is made negative. Therefore, the switching loss of the third full bridge circuit 70 can be reduced.

The present embodiment described above provides the following advantages:

Of the full bridge circuits 50, 60, and 70, the third full bridge circuit 70 is set as the target for loss reduction. Here, the slower the switching speed of the switches, the greater the switching loss is likely to be. Therefore, in the third full bridge circuit 70, which has the thirteenth to sixteenth switches Q13 to Q16 with low switching speeds, it is possible to reduce switching loss.

Of the full bridge circuits 50, 60, and 70, the second full bridge circuit 60, which is a power transmission circuit, is set as the target for loss reduction. Here, since the power transmitted in the power transmission circuit is likely to increase, switching loss is likely to increase. Therefore, it is possible to reduce switching loss in the second full bridge circuit 60, which is likely to have large switching loss.

The voltage Vt3 of the third coil 83 per unit turn is set higher than the voltage Vt2 of the second coil 82 per unit turn. This allows switching losses to be accurately reduced in the third full-bridge circuit 70, where reducing switching losses is a high priority.

Fourth Embodiment
The fourth embodiment will be described below with reference to the drawings, focusing on the differences from the first embodiment. In this embodiment, as shown in Fig. 21, a power conversion device 40 includes a fourth full-bridge circuit 110 and a fifth capacitor 111. In Fig. 21, the same components as those shown in Fig. 1 are denoted by the same reference numerals for convenience.

The fourth full-bridge circuit 110 includes 17th to 20th switches Q17 to Q20. In this embodiment, the 17th to 20th switches Q17 to Q20 are N-channel MOSFETs made of Si. The drains of the 17th switch Q17 and the 19th switch Q19 are connected to the fifth high-potential side terminal CH5 of the power conversion device 40. The source of the 17th switch Q17 is connected to the drain of the 18th switch Q18, and the source of the 19th switch Q19 is connected to the drain of the 20th switch Q20. The sources of the 18th switch Q18 and the 20th switch Q20 are connected to the fifth low-potential side terminal CL5 of the power conversion device 40. The fifth high-potential side terminal CH5 is connected to the first end of the fifth capacitor 111 and the first end of the electric load 32, and the fifth low-potential side terminal CL5 is connected to the second end of the fifth capacitor 111 and the second end of the electric load 32. The fifth capacitor 111 may be provided inside the fourth full-bridge circuit 110.

The seventeenth to twentieth switches Q17 to Q20 may be N-channel MOSFETs made of SiC-based or GaN-based materials. The electrical load 32 includes constant-voltage loads that require a constant supply voltage or that require the supply voltage to vary within a specified range. Specific examples of constant-voltage loads include navigation devices, audio devices, meter devices, and various ECUs.

The transformer 80 further includes a fourth coil 84. A first end of the fourth coil 84 is connected to the source of the seventeenth switch Q17 and the drain of the eighteenth switch Q18, and a second end of the fourth coil 84 is connected to the source of the nineteenth switch Q19 and the drain of the twentieth switch Q20. The fourth coil 84 is magnetically coupled to the first to third coils 81 to 83, for example, via a core. When the potential of the first end of the first coil 81 is higher than the second end, an induced voltage is generated in the fourth coil 84 such that the potential of the first end is higher than the second end.

The power conversion device 40 is equipped with a fourth voltage sensor 94. The fourth voltage sensor 94 detects a fourth voltage V4r, which is the terminal voltage of the fifth capacitor 111. The detected fourth voltage V4r is input to the control unit 100. The control unit 100 turns on and off the first to twelfth and seventeenth to twentieth switches Q1 to Q12 and Q17 to Q20, the first transformer switch SW1, and the second transformer switch SW2.

In this embodiment, the fifth high potential terminal CH5 and the fifth low potential terminal CL5 correspond to the "power receiving terminals", the fourth coil 84 corresponds to the "power receiving coil", the fourth full bridge circuit 110 corresponds to the "power receiving circuit", and the seventeenth to twentieth switches Q17 to Q20 correspond to the "power receiving switches".

<Other embodiments>
Each of the above embodiments may be modified as follows.

- In the first embodiment, prior to the processing of step S15, a process may be performed to determine whether the voltages V1r to V3r per unit number of turns of each coil are different from each other. Here, the first to third voltages V1r to V3r obtained in step S14 may be used to calculate the voltages V1r to V3r per unit number of turns of each coil.

For example, to determine whether the voltages V1r to V3r per unit number of turns of each coil are different from one another, the above-mentioned V1a/Vm, V2a/Vm, and V3a/Vm may be used. In this case, for example, a process of selecting Vm, which is the smallest value among V1a, V2a, and V3a, and a process of dividing V1a, V2a, and V3a by Vm are performed. If V1a/Vm, V2a/Vm, and V3a/Vm are outside the above-mentioned predetermined range, it may be determined that the voltages V1r to V3r per unit number of turns of each coil are different from one another.

If it is determined that the voltages V1r to V3r per unit number of turns of each coil are different from each other, proceed to step S15. On the other hand, if it is not determined that the voltages V1r to V3r per unit number of turns of each coil are different from each other, proceed to step S16 while maintaining the first to third command values from the previous control cycle.

- In the third embodiment, prior to the processing of step S15, a process may be performed to determine whether the second and third voltages V2r, V3r per unit number of turns of the second and third coils 82, 83 are equal to or less than the first voltage V1r per unit number of turns of the first coil 81. Here, the first to third voltages V1r to V3r obtained in step S14 may be used to calculate each voltage V1r to V3r per unit number of turns of each coil.

If it is determined that the second and third voltages V2r, V3r per unit number of turns of the second and third coils 82, 83 are equal to or less than the first voltage V1r per unit number of turns of the first coil 81, proceed to step S15. On the other hand, if it is determined that the second and third voltages V2r, V3r per unit number of turns of the second and third coils 82, 83 are higher than the first voltage V1r per unit number of turns of the first coil 81, proceed to step S16 while maintaining the first to third command values from the previous control cycle.

- In the second embodiment, the first freewheeling period TC1 and the second freewheeling period TC2 are provided within one switching period of the first to fourth switches Q1 to Q4 on the power transmitting side, but this is not limited to this. A freewheeling period may be provided within one switching period of the ninth to twelfth switches Q9 to Q12 on the power receiving side.

- In the third embodiment, instead of setting the second and third full bridge circuits 60, 70 as loss reduction targets, the control unit 100 may set only the third full bridge circuit 70 as the loss reduction target. In this case, the control unit 100 may set the voltage per unit turn of the third coil 83, which is a specific coil, higher than the voltage per unit turn of the first and second coils 81, 82, which are the remaining coils.

- The power conversion device 40 does not need to include an AC-DC converter 11. In this case, it is sufficient that the positive terminal of the third storage battery 12 is connected to the first high potential side terminal CH1, and the negative terminal of the third storage battery 12 is connected to the first low potential side terminal CL1. The third storage battery is a secondary battery that can be charged and discharged. The third storage battery is, for example, a lithium ion storage battery or a nickel metal hydride storage battery. The rated voltage of the third storage battery (for example, 400 V) is higher than the rated voltage of the first storage battery 20 and the rated voltage of the second storage battery 30.

- The power conversion device 40 may be equipped with a half-bridge circuit instead of each full-bridge circuit 50, 60, 70, and 110.

80... transformer, 81-84... first to fourth coils, 50, 60, 70, 110... first to fourth full bridge circuits, 100... control unit, CH1-CH5... first to fifth high potential terminals, CL1-CL5... first to fifth low potential terminals, Q1-Q20... first to twentieth switches.

Claims (7)

a transformer (80) having a power transmission coil (82) and a plurality of power receiving coils (81, 83, 84) that are magnetically coupled to each other;
a power transmitting circuit (60) having power transmitting switches (Q5 to Q8) and power transmitting terminals (CH2, CL2) connected to the power transmitting coil via the power transmitting switches;
a receiving circuit (50, 70, 110) provided corresponding to each of the receiving coils and having a receiving switch (Q1 to Q4, Q9 to Q20) and a receiving terminal (CH1, CH3, CH5, CL1, CL3, CL5) connected to the receiving coil via the receiving switch;
a control unit (100) that executes switching control of the power transmitting switch to convert a DC voltage input from the power transmitting terminal into an AC voltage and supply the AC voltage to the power transmitting coil, and executes switching control of the power receiving switch to convert an AC voltage output from the power receiving coil into a DC voltage and supply the DC voltage to the power receiving terminal,
The control unit, during execution of the switching control, controls the voltage per unit number of turns of a specific coil, which is a portion of the transmitting coil and each of the receiving coils, to be higher than the voltage per unit number of turns of the remaining coils. Among the power receiving circuits, a specific power receiving circuit (70) that is a part of the power receiving circuits has low-speed switches (Q13 to Q16) whose switching speed is slower than the power receiving switches and the power transmitting switches of the remaining power receiving circuits,
The power conversion device according to claim 1 , wherein the specific coil is one of the power receiving coils that is connected to the specific power receiving circuit. The power conversion device according to claim 1 , wherein the specific coil is the power transmission coil. the power transmitting circuit is a bridge circuit having a series connection of an upper arm power transmitting switch and a lower arm power transmitting switch as the power transmitting switch,
the power receiving circuit is a bridge circuit having a series connection of an upper arm power receiving switch and a lower arm power receiving switch as the power receiving switch,
The control unit, in the switching control,
turning on and off the upper arm power transmitting switch and the lower arm power transmitting switch so as to provide a period in which a positive voltage is applied to the power transmitting coil and a period in which a negative voltage is applied to the power transmitting coil;
The power conversion device according to any one of claims 1 to 3, wherein the upper arm receiving switch and the lower arm receiving switch are turned on and off so as to provide a period in which a positive voltage is applied to the receiving coil and a period in which a negative voltage is applied to the receiving coil. The power conversion device according to claim 4 , wherein the control unit provides a period during which at least one of the power transmitting coil and the power receiving coil is short-circuited in the switching control. A transformer (80) having a power transmission coil (81) and a power receiving coil (82-84) that are magnetically coupled to each other;
a power transmission circuit (50) having power transmission switches (Q1 to Q4) and power transmission terminals (CH1, CL1) connected to the power transmission coil via the power transmission switches;
a receiving circuit (60, 70, 110) having a receiving switch (Q5 to Q20) and receiving terminals (CH2, CH3, CH5, CL2, CL3, CL5) connected to the receiving coil via the receiving switch;
a control unit (100) that executes switching control of the power transmitting switch to convert a DC voltage input from the power transmitting terminal into an AC voltage and supply the AC voltage to the power transmitting coil, and executes switching control of the power receiving switch to convert an AC voltage output from the power receiving coil into a DC voltage and supply the DC voltage to the power receiving terminal,
the power transmitting circuit is a bridge circuit having a series connection of an upper arm power transmitting switch and a lower arm power transmitting switch as the power transmitting switch,
the power receiving circuit is a bridge circuit having a series connection of an upper arm power receiving switch and a lower arm power receiving switch as the power receiving switch,
The control unit is
In the switching control of the power transmitting switch, the upper arm power transmitting switch and the lower arm power transmitting switch are turned on and off so as to provide a period in which a positive voltage is applied to the power transmitting coil and a period in which a negative voltage is applied to the power transmitting coil;
In the switching control of the power receiving switch, the upper arm power receiving switch and the lower arm power receiving switch are turned on and off so as to provide a period in which a positive voltage is applied to the power receiving coil and a period in which a negative voltage is applied to the power receiving coil;
In the switching control of the power transmitting switch and the power receiving switch, a period is provided in which at least one of the power transmitting coil and the power receiving coil is short-circuited;
A power conversion device that performs control so that voltages per unit number of turns of the power transmitting coil and the power receiving coil approach each other while switching control of the power transmitting switch and the power receiving switch is being executed. The power conversion device according to any one of claims 1 to 6, wherein the control unit controls the voltage per unit number of turns of the transmitting coil and the receiving coil by changing the driving mode of the switching control.

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