JP7627196B2 - Gaming Machines - Google Patents

Description

The present invention relates to a gaming machine that variably displays first identification information or second identification information based on the establishment of a start condition, and that can be controlled to an advantageous state that is advantageous to the player when the variable display is displayed as a specific display result.

Conventional gaming machines have been proposed that display a title to inform users of the type of reach effect when the reach effect begins (see, for example, Patent Document 1). In addition, gaming machines such as pachinko machines include gaming machines that manage various random numbers using hardware random numbers and software random numbers (see, for example, Patent Document 2).

JP 2019-118411 A Patent No. 6124313

However, there was room to improve the marketability of gaming machines with the functions and configurations described in Patent Documents 1 and 2.

This invention was made in consideration of the above situation, and aims to provide a gaming machine with improved marketability.

The gaming machine of claim 1 comprises:
A gaming machine that can be controlled to an advantageous state that is advantageous to a player by executing a variable display of specific identification information and deriving a specific display result as a result of the variable display of the specific identification information,
A game control means;
A performance control means;
A display means;
a movable body movable from a first position to a second position different from the first position,
The game control means includes:
It is possible to determine whether or not the game medium is controlled to the advantageous state based on the entry of the game medium into the starting area,
A variable display of the specific identification information is possible,
Based on the result of the judgment, it is possible to determine one of a plurality of fluctuation patterns including a first fluctuation pattern which is a fluctuation pattern controlled to the advantageous state, a second fluctuation pattern which is a fluctuation pattern not controlled to the advantageous state, a third fluctuation pattern which is a fluctuation pattern controlled to the advantageous state, and a fourth fluctuation pattern which is a fluctuation pattern not controlled to the advantageous state;
When the first variation pattern is determined, a first command can be transmitted to the performance control means;
When the second variation pattern is determined, a second command can be transmitted to the performance control means;
When the third variation pattern is determined, a third command can be transmitted to the performance control means;
When the fourth variation pattern is determined, a fourth command can be transmitted to the performance control means;
The performance control means includes:
When the first command is received, it is possible to notify that the advantageous state will be controlled in a first reach,
When the second command is received, it is possible to notify that the first reach is not controlled to the advantageous state,
When the third command is received, it is possible to notify that the advantageous state will be controlled in a second reach,
When the fourth command is received, it is possible to notify that the second reach is not controlled to the advantageous state,
The execution time of the title display corresponding to the first reach is different from the execution time of the title display corresponding to the second reach,
The title display corresponding to the first reach and the title display corresponding to the second reach are
A first part from when a title display corresponding to the first reach or a title display corresponding to the second reach starts to when the title display is displayed in a specific area;
A second part in which a title display corresponding to the first reach or a title display corresponding to the second reach is displayed in the specific area;
and a third part that ends the display of a title display corresponding to the first reach or a title display corresponding to the second reach,
The display means includes:
displaying a title display corresponding to the first reach such that the second part is longer than the first part and the third part, and the first part is longer than the third part;
displaying a title display corresponding to the second reach such that the second part is longer than the first part and the third part, and the first part is longer than the third part,
The development pattern to the first reach includes a first pattern in which the movable body develops by moving, and a second pattern in which the movable body develops without moving,
The development pattern to the second reach includes the first pattern and the second pattern,
In the first reach of the first pattern, the movable body moves from the first position to the second position before a title display corresponding to the first reach starts, and after the movable body located at the second position moves to the first position, the title display corresponding to the first reach is displayed;
In the second reach of the first pattern, the movable body moves from the first position to the second position before a title display corresponding to the second reach starts, and after the movable body located at the second position moves to the first position, a title display corresponding to the second reach is displayed;
The second reach has a higher expectation of being controlled to the advantageous state than the first reach,
the display means displays the title display corresponding to the second reach in a larger font size than the title display corresponding to the first reach,
In the first reach and the second reach, a light emitting means is controlled using a brightness data table configured with brightness data,
When the title display corresponding to the first reach is executed, a title display brightness data table corresponding to the first reach is used;
In the introductory part after the title display corresponding to the first reach, a brightness data table for the first reach introductory part is used,
When the title display corresponding to the second reach is executed, a title display brightness data table corresponding to the second reach is used;
In the introductory part after the title display corresponding to the second reach, a luminance data table for the second reach introductory part is used,
A storage means capable of storing information relating to game control;
A storage means including a storage area related to a function of controlling a game,
The storage means includes:
a first area in which a value indicating whether or not to use a predetermined circuit provided in the gaming machine can be set;
a second area in which a value used for controlling at least the predetermined circuit can be set;
the second area includes a specific storage area in which an access permission value indicating that access to the storage means is permitted can be set,
The game control means performs a startup process based on the start of power supply,
A setting storage process is executed to set a value indicating that the predetermined circuit is to be used in the first area;
After the setting storage process is executed, the access permission value can be set in the specific storage area.
It is characterized by the following.

The present invention may have only the invention-specific features described in the claims of the present invention, or may have the invention-specific features described in the claims of the present invention as well as features other than the invention-specific features.

FIG. 2 is a front view of the pachinko game machine according to this embodiment. FIG. 2 is a rear perspective view of the pachinko game machine according to this embodiment. 1 is a configuration diagram showing various control boards etc. installed in a pachinko gaming machine. 13 is a flowchart showing an example of a game control main process. 13 is a flowchart showing an example of a timer interrupt process for game control. 13 is a flowchart showing an example of a special symbol process. FIG. 13 is an explanatory diagram showing a display result determination table. A diagram showing the numerical range of a jackpot and the numerical range of a miss with time-saving in the variable display of the first special chart in normal state or time-saving state. 13 is a flowchart showing an example of a performance control main process. 13 is a flowchart showing an example of a performance control process. A front view showing a pachinko gaming machine in characteristic section 131SG. This is a configuration diagram showing various control boards and the like installed in a pachinko gaming machine in characteristic section 131SG. (A) is an explanatory diagram showing each random number, (B) is an explanatory diagram showing a display result determination table, (C1) and (C2) are explanatory diagrams showing a jackpot type determination table, and (D) is an explanatory diagram showing the contents of various jackpots. An explanatory diagram showing a time-saving count determination table for each transition trigger. FIG. 13 is an explanatory diagram of a fluctuation pattern. FIG. 13 is an explanatory diagram of a fluctuation pattern. An explanatory diagram showing a specific example of a fluctuation pattern type determination table. An explanatory diagram showing a specific example of a fluctuation pattern determination table. An explanatory diagram showing a specific example of a fluctuation pattern determination table. An explanatory diagram showing a specific example of a fluctuation pattern determination table. This is an explanatory diagram showing the expectation level of the reach performance of the super reach. An explanatory diagram showing the difference in expectation between the reach effects of super reach. FIG. 11 is a diagram illustrating an example of a performance control command. 11 is an explanatory diagram showing a specific example of a data retention area for game control. FIG. FIG. 11 is an explanatory diagram showing a specific example of a performance control data storage area. 13 is a flowchart showing an example of a start winning determination process. 13 is a flowchart showing an example of a random number value determination process when a prize is won. 13 is a flowchart showing an example of a game control main process. 13 is a flowchart showing an example of normal special symbol processing. 13 is a flowchart showing an example of normal special symbol processing. 13 is a flowchart showing an example of a special symbol stopping process. FIG. 2 is a state transition diagram for explaining state transitions. 13 is a flowchart showing an example of a performance control process. An explanatory diagram showing the execution rate of the pre-reading preview performance. 13 is a flowchart showing an example of a variable display start setting process. FIG. 13 is an explanatory diagram showing the determination ratio of the stopping symbols. An explanatory diagram showing performance control patterns for different fluctuation patterns. An explanatory diagram showing performance control patterns for different fluctuation patterns. A diagram showing the flow of presentation during variable display in the normal state. A diagram showing the flow of presentation during variable display in the time-saving state A and the special probability state. A diagram showing the flow of presentation during variable display in time-saving state B. A figure showing the progression of images when a low base weak reach A performance is executed. This is a timing chart showing the execution status of the low base weak reach A performance. A figure showing the progression of images when a low base weak reach B performance is executed. This is a timing chart showing the execution status of the low base weak reach B performance. A figure showing the progression of images when a low base strong reach A performance is executed. This is a timing chart showing the execution status of the low base strong reach A performance. A figure showing the progression of images illustrating a bad example of a low base strong reach A presentation. A figure showing the progression of images when the low base strong reach B performance is executed. This is a timing chart showing the execution status of the low base strong reach A performance. A figure showing the transition of images when a low-base strongest reach performance is executed. This is a timing chart showing the execution status of the low-base strongest reach presentation. FIG. 13 is a diagram showing a transition of an image in a modified example of the title display part. A figure showing the progression of images when high base super reach A to D effects are executed. This is a timing chart showing the execution status of high base super reach A to D performances. FIG. 2 is a diagram showing a position where title characters are displayed in a display area of an image display device. An explanatory diagram showing the presentation time of the super reach presentation. An explanatory diagram showing the relationship between the performance times of super reach performances. An explanatory diagram showing the relationship between the title characters and decorative patterns of the Super Reach performance. FIG. 13 is an explanatory diagram showing the execution status of the expectation degree suggestion display. FIG. 13 is a diagram showing the transition of images when a selection effect is executed. An explanatory diagram showing the number of operations required until the selection effect switches to the next title and the execution rate of the super reach effect when the selection effect is executed. FIG. 13 is an explanatory diagram of effects that can be executed during variable display. FIG. 11 is an explanatory diagram of the execution ratio of effects that can be executed during variable display. A figure showing the display status of the explanatory text displayed in the explanatory text display performance. This is a timing chart showing the display status of the explanatory text displayed in the explanatory text display performance. A diagram showing the execution status of the title color change effect. A diagram showing the timing at which the color of the title characters changes in a title color change presentation. A diagram showing the execution status of operation promotion presentation A. A diagram showing the execution status of operation promotion presentation B. A diagram showing the execution status of operation promotion presentation C. A figure showing the execution status of operation promotion presentation D. 13A and 13B are diagrams showing a display mode of an operation prompting image. A diagram showing the execution status of the jackpot start performance. A diagram showing the display status of the remaining number of times until Yu-time. A diagram showing the execution status of the Yu-time start performance. There is an explanatory diagram showing the relationship between the title text of the super reach performance, the explanatory text, the title text of the jackpot start performance, and the operation prompt text. An explanatory diagram showing the relationship between the title characters of the Super Reach performance and the title characters of the Yu-Time start performance. A diagram showing the arrangement of game effect lamps. FIG. 13 is a diagram for explaining a mechanism for outputting to an LED driver. FIG. 11 is a diagram for explaining an example of lamp control using a brightness data table. 13 is a diagram for explaining an example of lamp control using a grandchild table based on timer management of a child table; FIG. A figure showing a brightness data table used in super reach performance. A diagram showing the settings of the parent table of weak reach common titles. A diagram showing the settings of the child table of the weak reach common title. A diagram showing the settings of the grandchild table of weak reach common titles. A diagram showing the settings of the grandchild table of weak reach common titles. A diagram showing the settings of the grandchild table of weak reach common titles. A diagram showing the settings of the parent table for the title Common Chance Up Red. A diagram showing the settings of the title common chance up red child table. A diagram showing the settings of the grandchild table for the Title Common Chance Up Red. A diagram showing the settings of the grandchild table for the Title Common Chance Up Red. A diagram showing the settings of the grandchild table for the Title Common Chance Up Red. A diagram showing the settings of the parent table for title common chance up money. FIG. 13 is a diagram showing the settings of a title common chance up golden child table. A diagram showing the settings of the title common chance up money grandchild table. A diagram showing the settings of the title common chance up money grandchild table. A diagram showing the settings of the title common chance up money grandchild table. A diagram showing the settings of the parent table for the weak reach system weak reach A introduction. A diagram showing the settings of a child table for the weak reach system weak reach A introduction. A diagram showing the settings of the grandchild table when weak reach A is introduced in the weak reach system. A diagram showing the settings of the grandchild table when weak reach A is introduced in the weak reach system. A diagram showing the settings of the grandchild table when weak reach A is introduced in the weak reach system. A diagram showing the settings of the grandchild table when weak reach A is introduced in the weak reach system. A diagram showing the settings of the grandchild table when weak reach A is introduced in the weak reach system. A diagram showing the settings of the parent table for the weak reach system weak reach B introduction. A diagram showing the settings of a child table for the weak reach system weak reach B introduction. A diagram showing the settings of the grandchild table when weak reach B is introduced in the weak reach system. A diagram showing the settings of the grandchild table when weak reach B is introduced in the weak reach system. A diagram showing the settings of the grandchild table when weak reach B is introduced in the weak reach system. A diagram showing the settings of the grandchild table when weak reach B is introduced in the weak reach system. A diagram showing the settings of the grandchild table when weak reach B is introduced in the weak reach system. A diagram showing the settings of the grandchild table when weak reach B is introduced in the weak reach system. A diagram showing the settings of the parent table of strong reach common titles. A diagram showing the settings of the child table of the strong reach common title. A diagram showing the settings of the grandchild table of strong reach common titles. A diagram showing the settings of the grandchild table of strong reach common titles. A diagram showing the settings of the grandchild table of strong reach common titles. A diagram showing the settings of the grandchild table of strong reach common titles. A diagram showing the setting contents of the parent table for the strong reach system strong reach A introduction. A diagram showing the setting contents of a child table for the strong reach system strong reach A introduction. A diagram showing the settings of the grandchild table when the strong reach system strong reach A is introduced. A diagram showing the settings of the grandchild table when the strong reach system strong reach A is introduced. A diagram showing the settings of the grandchild table when the strong reach system strong reach A is introduced. A diagram showing the settings of the grandchild table when the strong reach system strong reach A is introduced. A diagram showing the settings of the grandchild table when the strong reach system strong reach A is introduced. A diagram showing the settings of the grandchild table when the strong reach system strong reach A is introduced. This figure shows the setting contents of the parent table for the strong reach system strong reach B introduction. A diagram showing the settings of a child table for the strong reach system strong reach B introduction. A diagram showing the settings of the grandchild table when the strong reach system strong reach B is introduced. A diagram showing the settings of the grandchild table when the strong reach system strong reach B is introduced. A diagram showing the settings of the grandchild table when the strong reach system strong reach B is introduced. A diagram showing the settings of the grandchild table when the strong reach system strong reach B is introduced. A diagram showing the settings of the grandchild table when the strong reach system strong reach B is introduced. This figure shows the settings of the parent table for the introduction of the strongest reach title in the strongest reach series. A diagram showing the settings of a child table for the strongest reach type strongest reach title introduction. This figure shows the settings of the grandchild table when the strongest reach title is introduced in the strongest reach series. This figure shows the settings of the grandchild table when the strongest reach title is introduced in the strongest reach series. This figure shows the settings of the grandchild table when the strongest reach title is introduced in the strongest reach series. This figure shows the settings of the grandchild table when the strongest reach title is introduced in the strongest reach series. This figure shows the settings of the grandchild table when the strongest reach title is introduced in the strongest reach series. This figure shows the settings of the grandchild table when the strongest reach title is introduced in the strongest reach series. This figure shows the settings of the grandchild table when the strongest reach title is introduced in the strongest reach series. This figure shows the settings of the grandchild table when the strongest reach title is introduced in the strongest reach series. This figure shows the settings of the grandchild table when the strongest reach title is introduced in the strongest reach series. A diagram showing the settings of the parent table of high base reach common titles. A diagram showing the settings of the child table of the high base reach common title. A diagram showing the settings of the grandchild table of high base reach common titles. A diagram showing the settings of the grandchild table of high base reach common titles. A diagram showing the settings of the grandchild table of high base reach common titles. This figure shows the settings of the parent table for the introduction of high base reach system Reach A. A diagram showing the settings of the child table for the introduction of high base reach system reach A. A diagram showing the settings of the grandchild table when high base reach system reach A is introduced. A diagram showing the settings of the grandchild table when high base reach system reach A is introduced. A diagram showing the settings of the grandchild table when high base reach system reach A is introduced. This figure shows the settings of the parent table for the introduction of high base reach system Reach B. A diagram showing the settings of the child table for the introduction of high base reach system reach B. A diagram showing the settings of the parent table for the introduction of high base reach system Reach C. A diagram showing the settings of the child table for the introduction of high base reach system reach C. A diagram showing the settings of the parent table for the introduction of high base reach system reach D. A diagram showing the settings of the child table for the introduction of high base reach system reach D. This figure shows the relationship between the timing and brightness data that make up the title display part of the low base weak reach A and B performances. FIG. 2 is a front view of the pachinko game machine. FIG. 2 is a configuration diagram showing various control boards, etc. FIG. 13 is a diagram showing an example of a random number for gaming. 13 is a flowchart showing a main process for game control. 13 is a flowchart showing an example of a timer interrupt process for game control. 13 is a flowchart showing an example of a special symbol process. A diagram showing an example of the configuration of a special pattern process processing jump table. 13 is a flowchart showing a main process for performance control. 13 is a flowchart showing an example of a performance control process. FIG. 2 is a diagram showing an example of the configuration of a microcomputer for game control. FIG. 13 is a diagram illustrating an example of an address map. 11A and 11B are diagrams showing examples of main setting of addresses included in a function setting register area; 11 is a diagram showing an example of main settings of addresses included in a function control register area; FIG. A diagram for explaining an example of settings for random numbers for gaming. FIG. 11 is a diagram for explaining a random number update period. 10 is a flowchart illustrating an example of a power supply start response process. FIG. 13 is a diagram illustrating an example of the configuration of a function setting register stored value table. FIG. 13 is a diagram illustrating an example of the configuration of an RWM access protection register. 10 is a flowchart illustrating an example of a power-off process. FIG. 13 is a diagram for explaining an example of use of a data configuration. 13 is a flowchart illustrating an example of a random number update process. FIG. 13 is a diagram for explaining an example of use of a data configuration. 13 is a flowchart illustrating an example of an initial value changing random number updating process. 13 is a flowchart showing an example of an initial value determination random number update process. 13 is a flowchart showing an example of a start port switch passing process. FIG. 13 is a diagram for explaining an example of use of a data configuration. 13 is a flowchart showing an example of normal special symbol processing. FIG. 13 is a diagram for explaining an example of use of a data configuration. 13 is a flowchart showing an example of a special pattern determination process. FIG. 13 is a diagram for explaining an example of use of a data configuration. 13 is a flowchart showing an example of a special symbol information setting process. A flowchart showing an example of a jackpot information data selection process. FIG. 13 is a diagram for explaining an example of use of a data configuration. FIG. 13 is a diagram for explaining an example of use of a data configuration. 13 is a flowchart showing an example of a variation pattern setting process. 11 is a flowchart showing an example of a winning time fluctuation pattern type table selection process. 11 is a flowchart showing an example of a process for selecting a fluctuation pattern type table when a loss occurs. A diagram for explaining an example of the configuration of a fluctuation pattern type allocation table. 13 is a diagram for explaining an example of the configuration of a fluctuation pattern allocation table. FIG. 13 is a diagram for explaining an example of the configuration of a fluctuation pattern allocation table. FIG. 13 is a diagram for explaining an example of the configuration of a fluctuation pattern allocation table. FIG. 13 is a flowchart showing an example of normal symbol process processing. FIG. 13 is a diagram for explaining an example of use of a data configuration. 13 is a flowchart showing an example of a gate switch passing process. 13 is a flowchart showing an example of normal processing of normal symbols. FIG. 13 is a diagram for explaining an example of use of a data configuration.

[Form 1]
The gaming machine of form 1-1 is
A gaming machine (pachinko gaming machine 1) that can be controlled to a favorable state (jackpot gaming state) that is advantageous to a player by executing a variable display of specific identification information (first special chart, second special chart) and deriving a specific display result (a special chart display result of "jackpot") as a result of the variable display of the specific identification information,
A game control means (a game control microcomputer 100);
A performance control means (performance control CPU 120);
A display means (image display device 5),
The game control means (game control microcomputer 100)
When the game medium (game ball) enters the start area (first start winning hole, second start winning hole), it is determined whether or not the game medium is controlled to the advantageous state (jackpot game state);
Execute variable display of the specific identification information (first special chart, second special chart),
Based on the result of the judgment, a fluctuation pattern is determined from among a plurality of fluctuation patterns including a first fluctuation pattern (jackpot fluctuation pattern) which is a fluctuation pattern controlled to the advantageous state, and a second fluctuation pattern (miss fluctuation pattern) which is a fluctuation pattern not controlled to the advantageous state;
When the first fluctuation pattern is determined, a first command (a fluctuation pattern designation command for designating a jackpot fluctuation pattern) is transmitted to the performance control means;
When the second variation pattern is determined, a second command (a variation pattern designation command for designating a miss variation pattern) is transmitted to the performance control means;
The performance control means (performance control CPU 120)
When the first command is received, it is possible to notify that the game will be controlled to the advantageous state (jackpot game state) in a specific reach (super reach effect),
When the second command is received, it is possible to notify that the specific reach (super reach effect) is not controlled to the advantageous state (jackpot game state),
The specific reach (super reach effect) is configured to include a title display part that displays a title display (title characters) corresponding to the specific reach, and an introduction part until the result of the control of the advantageous state is notified,
The display means (image display device 5)
It is possible to display a variable display of decorative identification information (decorative pattern) corresponding to the variable display of the specific identification information (first special pattern, second special pattern),
The feature of this invention is that decorative identification information (decorative pattern) is displayed in a reach state before the title display part in the specific reach (super reach performance), and in the title display part in the specific reach, a title display (title characters) corresponding to the specific reach is displayed using the display position of the decorative identification information (decorative pattern) that has become the reach state.
According to this feature, when decorative identification information is displayed in a reach state, the player will pay attention to which decorative identification information has reached the reach state. Therefore, by displaying the title display corresponding to the specific reach using the display position of the decorative identification information that has reached the reach state in the title display part in the specific reach, the player can naturally pay attention to the title display, and as a result, the title display can be performed preferably.

The gaming machine of aspect 1-2 is the gaming machine according to aspect 1-1,
The decorative identification information is displayed in a reach state of a first size (decorative pattern (large)) before the title display part in the specific reach (super reach performance), and then the decorative identification information (decorative pattern (large)) displayed in the reach state is displayed in a second size (decorative pattern (small)) smaller than the first size, and the title display (title letters) corresponding to the specific reach (super reach performance) is displayed using the display position of the decorative identification information (decorative pattern (small)) displayed in the second size.
According to this feature, the decorative identification information displayed in a first size becomes a second size, thereby attracting the player's attention, and by using the display position of the decorative identification information of the second size to display a title display corresponding to a specific reach, it becomes easier to draw attention to the title display.

The gaming machine of aspect 1-3 is the gaming machine according to aspect 1-1 or 1-2,
In the title display part in the specific reach, at the timing when the decorative identification information (decorative pattern) which has become the reach state is displayed, a title display (title characters) corresponding to the specific reach is displayed so as to overlap with the decorative identification information (decorative pattern) which has become the reach state.
According to this feature, at the timing when decorative identification information that has become a reach state is displayed in the title display part in a specific reach, the title display corresponding to the specific reach is displayed so as to overlap with the decorative identification information that has become the reach state, making it easier to draw attention to the title display.

The gaming machine of aspect 1-4 is a gaming machine according to any one of aspects 1-1 to 1-3,
The specific reach (super reach effect) includes a first reach (low base weak reach A, B effect) and a second reach (low base strong reach A to C effect) which has a higher expectation of being controlled to the advantageous state than the first reach,
The title display corresponding to the first reach and the title display corresponding to the second reach are characterized in that they appear overlapping with one of the decorative identification information (the decorative pattern on the left) of the decorative identification information that has reached the reach state.
According to this feature, the title display corresponding to the first reach and the title display corresponding to the second reach appear overlapping with one of the decorative identification information of the decorative identification information that has reached the reach state, making it easier to draw attention to the title displays.

The gaming machine of aspect 1-5 is the gaming machine according to aspect 1-4,
The specific reach (super reach effect) includes a third reach (low base strongest reach effect) having a higher expectation of being controlled to the advantageous state than the second reach (low base strong reach A to C effect),
The title display corresponding to the third reach is characterized in that it appears overlapping both decoration identification information (decorative patterns on both sides) that have entered the reach state.
According to this feature, the title display corresponding to the third reach, which has a higher expectation of being controlled to a more favorable state than the first reach and the second reach, appears overlapping with both decorative identification information that have reached the reach state, so that the title display corresponding to the third reach can be displayed in a more impactful manner.

The gaming machine of aspect 1-6 is the gaming machine according to aspect 1-5,
The title display corresponding to the first reach (low base weak reach A, B performance), the title display corresponding to the second reach (low base strong reach A to C performance), and the title display corresponding to the third reach (low base strongest reach performance) are characterized in that they appear overlapping with one of the decorative identification information (decorative pattern on the left) or both of the decorative identification information (decorative patterns on both sides) of the decorative identification information that has reached the reach state, and are then displayed in a fixed position and are displayed overlapping with part of the decorative identification information (decorative patterns on both sides) that has reached the reach state even during the period in which they are displayed in the fixed position.
According to this feature, it becomes easier to draw attention to the title display even after the title display has been displayed in its fixed position.

[Form 2]
The gaming machine of form 2-1 is,
A gaming machine (pachinko gaming machine 1) that can be controlled to a favorable state (jackpot gaming state) that is advantageous to a player by executing a variable display of specific identification information (first special chart, second special chart) and deriving a specific display result (a special chart display result of "jackpot") as a result of the variable display of the specific identification information,
A game control means (a game control microcomputer 100);
A performance control means (performance control CPU 120);
A display means,
The game control means (game control microcomputer 100)
Determining whether or not the game medium (game ball) is controlled to the advantageous state when the game medium (game ball) enters the start area (first start winning hole, second start winning hole);
Execute variable display of the specific identification information (first special chart, second special chart),
Based on the result of the judgment, a first fluctuation pattern (PB1-JA, PB1-JB) which is a fluctuation pattern controlled to the advantageous state, a second fluctuation pattern (PA2-2, PA2-3) which is a fluctuation pattern not controlled to the advantageous state, a third fluctuation pattern (PB1-2 to PB1-10) which is a fluctuation pattern controlled to the advantageous state, and a fourth fluctuation pattern (PA2-4 to 12) which is a fluctuation pattern not controlled to the advantageous state are selected from a plurality of fluctuation patterns;
When the first variation pattern is determined, a first command (a variation pattern designation command designating PB1-JA and PB1-JB) is transmitted to the performance control means;
When the second variation pattern is determined, a second command (a variation pattern designation command designating PA2-2 and PA2-3) is transmitted to the performance control means;
When the third variation pattern is determined, a third command (a variation pattern designation command designating PB1-2 to PB1-10) is transmitted to the performance control means;
When the fourth variation pattern is determined, a fourth command (a variation pattern designation command designating PA2-4 to PA2-12) is transmitted to the performance control means;
The performance control means (performance control CPU 120)
When the first command is received, it is possible to notify that the first reach (low base weak reach A, B performance) will be controlled to the advantageous state (jackpot game state),
When the second command is received, it is possible to notify that the first reach (low base weak reach A, B performance) is not controlled to the advantageous state (jackpot game state),
When the third command is received, it is possible to notify that the game will be controlled to the advantageous state (jackpot game state) in the second reach (low base strong reach A to C performance),
When the fourth command is received, it is possible to notify that the second reach (low base strong reach A to C performance) is not controlled to the advantageous state (jackpot game state),
The first reach (low base weak reach A, B performance) is configured to include a title display part that displays a title display (title character) corresponding to the first reach, and an introduction part until the result of the advantageous state is notified,
The second reach (low base strong reach A to C performance) is configured to include a title display part that displays a title display (title character) corresponding to the second reach, and an introduction part until the result of the advantageous state is notified,
The display means (image display device 5)
It is possible to display a variable display of decorative identification information (decorative pattern) corresponding to the variable display of the specific identification information (first special pattern, second special pattern),
A first decoration identification information (an odd-numbered decorative pattern) is displayed in a reach state before a title display part in the first reach (low base weak reach A, B performance), and a title display (title characters) is displayed in the title display part so as to use the display position of the first decoration identification information (an odd-numbered decorative pattern) that has become the reach state;
In the first reach (low base weak reach A, B performance), the second decoration identification information (even numbered decoration pattern) is displayed in a reach state before the title display part, and in the title display part, a title display (title characters) is displayed so as to use the display position of the second decoration identification information (even numbered decoration pattern) that has become the reach state,
The first decoration identification information (odd numbered decorative pattern) is displayed in a reach state before the title display part in the second reach (low base strong reach A to C performance), and in the title display part, a title display (title characters) is displayed so as to use the display position of the first decoration identification information (odd numbered decorative pattern) that has become the reach state,
The present invention is characterized in that the second decorative identification information (even numbered decorative pattern) is displayed in a reach state before the title display part in the second reach (low base strong reach A to C performance), and in the title display part, the title display (title characters) is displayed so as to use the display position of the second decorative identification information (even numbered decorative pattern) that has become the reach state.
According to this feature, when decorative identification information is displayed in a reach state, the player will pay attention to which decorative identification information has reached the reach state. Therefore, by displaying the title display corresponding to the first reach and the second reach using the display position of the decorative identification information that has reached the reach state in the title display part in the first reach and the second reach, the player can naturally pay attention to the title display, and as a result, the title display can be performed preferably.

The gaming machine of aspect 2-2 is the gaming machine according to aspect 2-1,
A feature of this invention is that the degree of expectation controlled to the advantageous state (jackpot game state) differs between when the first decorative identification information (odd-numbered decorative pattern) is displayed in a reach state and when the second decorative identification information (even-numbered decorative pattern) is displayed in a reach state.
According to this feature, when decorative identification information is displayed in a reach state, the expectation of being controlled to an advantageous state differs depending on which decorative identification information has reached the reach state, making it easier to draw attention to the title display.

[Form 3]
The gaming machine of form 3-1 is
A gaming machine (pachinko gaming machine 1) that can be controlled to a favorable state (jackpot gaming state) that is advantageous to a player by executing a variable display of specific identification information (first special chart, second special chart) and deriving a specific display result (a special chart display result of "jackpot") as a result of the variable display of the specific identification information,
A game control means (a game control microcomputer 100);
A performance control means (performance control CPU 120);
A display means,
The game control means (game control microcomputer 100)
Determining whether or not the game medium (game ball) is controlled to the advantageous state when the game medium (game ball) enters the start area (first start winning hole, second start winning hole);
Execute variable display of the specific identification information (first special chart, second special chart),
Based on the result of the judgment, a first fluctuation pattern (PB1-JA, PB1-JB) which is a fluctuation pattern controlled to the advantageous state, a second fluctuation pattern (PA2-2, PA2-3) which is a fluctuation pattern not controlled to the advantageous state, a third fluctuation pattern (PB1-2 to PB1-10) which is a fluctuation pattern controlled to the advantageous state, a fourth fluctuation pattern (PA2-4 to PB2-12) which is a fluctuation pattern not controlled to the advantageous state, a fifth fluctuation pattern (PB1-11 to PB1-13) which is a fluctuation pattern controlled to the advantageous state, and a sixth fluctuation pattern (PA2-13 to PB2-15) which is a fluctuation pattern not controlled to the advantageous state are selected as one of the fluctuation patterns;
When the first variation pattern is determined, a first command (a variation pattern designation command designating PB1-JA and PB1-JB) is transmitted to the performance control means;
When the second variation pattern is determined, a second command (a variation pattern designation command designating PA2-2 and PA2-3) is transmitted to the performance control means;
When the third variation pattern is determined, a third command (a variation pattern designation command designating PB1-2 to PB1-10) is transmitted to the performance control means;
When the fourth variation pattern is determined, a fourth command (a variation pattern designation command designating PA2-4 to PA2-12) is transmitted to the performance control means;
When the fifth variation pattern is determined, a fifth command (a variation pattern designation command designating PB1-11 to PB1-13) is transmitted to the performance control means;
When the sixth variation pattern is determined, a sixth command (a variation pattern designation command designating PA2-13 to PA2-15) is transmitted to the performance control means;
The performance control means (performance control CPU 120)
When the first command is received, it is possible to notify that the first reach (low base weak reach A, B performance) will be controlled to the advantageous state (jackpot game state),
When the second command is received, it is possible to notify that the first reach (low base weak reach A, B performance) is not controlled to the advantageous state (jackpot game state),
When the third command is received, it is possible to notify that the game will be controlled to the advantageous state (jackpot game state) in the second reach (low base strong reach A to C performance),
When the fourth command is received, it is possible to notify that the second reach (low base strong reach A to C performance) is not controlled to the advantageous state (jackpot game state),
When the fifth command is received, it is possible to notify that the third reach (low base strongest reach presentation) will be controlled to the advantageous state (jackpot game state),
When the sixth command is received, it is possible to notify that the third reach (low base strongest reach presentation) is not controlled to the advantageous state (jackpot game state),
The first reach (low base weak reach A, B performance) is configured to include a title display part that displays a title display (title character) corresponding to the first reach, and an introduction part until the result of the advantageous state is notified,
The second reach (low base strong reach A to C performance) is configured to include a title display part that displays a title display (title character) corresponding to the second reach, and an introduction part until the result of the advantageous state is notified,
The third reach (low-base strongest reach presentation) is configured to include a title display part that displays a title display (title characters) corresponding to the third reach, and an introduction part until the result of the advantageous state is notified,
The display means (image display device 5)
It is possible to display a variable display of decorative identification information (decorative pattern) corresponding to the variable display of the specific identification information (first special pattern, second special pattern),
A first decoration identification information (an odd-numbered decorative pattern) is displayed in a reach state before a title display part in the first reach (low base weak reach A, B performance), and a title display (title characters) is displayed in the title display part so as to use the display position of the first decoration identification information (an odd-numbered decorative pattern) that has become the reach state;
In the first reach (low base weak reach A, B performance), the second decoration identification information (even numbered decoration pattern) is displayed in a reach state before the title display part, and in the title display part, a title display (title characters) is displayed so as to use the display position of the second decoration identification information (even numbered decoration pattern) that has become the reach state,
The first decoration identification information (odd numbered decorative pattern) is displayed in a reach state before the title display part in the second reach (low base strong reach A to C performance), and in the title display part, a title display (title characters) is displayed so as to use the display position of the first decoration identification information (odd numbered decorative pattern) that has become the reach state,
The second decoration identification information (even numbered decorative pattern) is displayed in a reach state before the title display part in the second reach (low base strong reach A to C performance), and in the title display part, a title display (title characters) is displayed so as to use the display position of the second decoration identification information (even numbered decorative pattern) that has become the reach state,
The first decoration identification information (odd numbered decorative pattern) is displayed in a reach state before the title display part in the third reach (low base strongest reach performance), and in the title display part, a title display (title characters) is displayed so as to use the display position of the first decoration identification information (odd numbered decorative pattern) that has become the reach state,
The present invention is characterized in that the second decorative identification information (even numbered decorative pattern) is displayed in a reach state before the title display part in the third reach (low base strongest reach performance), and in the title display part, the title display (title characters) is displayed so as to use the display position of the second decorative identification information (even numbered decorative pattern) that has become the reach state.
According to this feature, when the decorative identification information is displayed in a reach state, the player will pay attention to which decorative identification information has reached the reach state. Therefore, by displaying the title displays corresponding to the first reach, second reach, and third reach using the display position of the decorative identification information that has reached the reach state in the title display part in the first reach, second reach, and third reach, the player can naturally pay attention to the title displays, and as a result, the title display can be performed preferably.

[Form 4]
The gaming machine of form 4-1 is
A gaming machine (pachinko gaming machine 1) that can be controlled to a favorable state (jackpot gaming state) that is advantageous to a player by executing a variable display of specific identification information (first special chart, second special chart) and deriving a specific display result (a special chart display result of "jackpot") as a result of the variable display of the specific identification information,
A game control means (a game control microcomputer 100);
A performance control means (performance control CPU 120);
A display means (image display device 5);
A plurality of light emitting means (frame LEDs LWL1 to LWL12, frame LEDs LWR2 to LWR12, logo LEDs LL1 to LL4, decorative LEDs LS1 to LS5, and attacca lamps LA1 to LA4);
A light emission control means (performance control CPU 120);
The game control means (game control microcomputer 100)
When the game medium (game ball) enters the start area (first start winning hole, second start winning hole), it is determined whether or not the game medium is controlled to the advantageous state (jackpot game state);
Execute variable display of the specific identification information (first special chart, second special chart),
Based on the result of the judgment, a fluctuation pattern is determined from among a plurality of fluctuation patterns including a first fluctuation pattern (jackpot fluctuation pattern) which is a fluctuation pattern controlled to the advantageous state, and a second fluctuation pattern (miss fluctuation pattern) which is a fluctuation pattern not controlled to the advantageous state;
When the first fluctuation pattern is determined, a first command (a fluctuation pattern designation command for designating a jackpot fluctuation pattern) is transmitted to the performance control means;
When the second variation pattern is determined, a second command (a variation pattern designation command for designating a miss variation pattern) is transmitted to the performance control means;
The performance control means (performance control CPU 120)
When the first command is received, it is possible to notify that the game will be controlled to the advantageous state (jackpot game state) in a specific reach (super reach effect),
When the second command is received, it is possible to notify that the specific reach (super reach effect) is not controlled to the advantageous state (jackpot game state),
The specific reach (super reach effect) is configured to include a title display part that displays a title display (title characters) corresponding to the specific reach, and an introduction part until the result of the control of the advantageous state is notified,
The display means (image display device 5)
It is possible to display a variable display of decorative identification information (decorative pattern) corresponding to the variable display of the specific identification information (first special pattern, second special pattern),
A decoration identification information (decorative pattern) is displayed in a reach state before a title display part in the specific reach (super reach performance), and a title display (title characters) corresponding to the specific reach is displayed in the title display part in the specific reach so as to use the display position of the decoration identification information (decorative pattern) that has become the reach state,
The light emission control means (performance control CPU 120)
Controlling the light emitting means using a luminance data table configured with luminance data;
In the title display part, the light emitting means is controlled using a brightness data table for title display (a weak reach common title, a strong reach common title, and a high base reach common title);
In the introduction part, the light emitting means is controlled using a brightness data table for the introduction part (introduction of weak reach A of weak reach system, introduction of weak reach B of weak reach system, introduction of strong reach A of strong reach system, introduction of strong reach B of strong reach system, introduction of strong reach C of strong reach system, introduction of reach A of high base reach system, introduction of reach B of high base reach system, introduction of reach C of high base reach system, introduction of reach D of high base reach system).
According to this feature, when the decoration identification information is displayed in a reach state, the player pays attention to which decoration identification information has become the reach state, so by displaying the title display corresponding to the specific reach using the display position of the decoration identification information that has become the reach state in the title display part in the specific reach, the player can naturally pay attention to the title display as well. Also, in the title display part, the light-emitting means is controlled using a brightness data table for the title display that is different from the brightness data table for the introduction part, so that the light-emitting means can be made to emit light in a suitable light-emitting mode according to the title display. As a result of these, the title display can be performed in a suitable manner.

[Form 5]
The gaming machine of form 5-1 is
A gaming machine (pachinko gaming machine 1) that can be controlled to a favorable state (jackpot gaming state) that is advantageous to a player by executing a variable display of specific identification information (first special chart, second special chart) and deriving a specific display result (a special chart display result of "jackpot") as a result of the variable display of the specific identification information,
A game control means (a game control microcomputer 100);
A performance control means (performance control CPU 120);
A display means (image display device 5),
The game control means (game control microcomputer 100)
Determining whether or not the game medium (game ball) is controlled to the advantageous state when the game medium (game ball) enters the start area (first start winning hole, second start winning hole);
Execute variable display of the specific identification information (first special chart, second special chart),
Based on the result of the judgment, a first fluctuation pattern (PB1-JB) which is a fluctuation pattern controlled to the advantageous state, a second fluctuation pattern (PA2-3) which is a fluctuation pattern not controlled to the advantageous state, a third fluctuation pattern (PB1-5 to PB1-7) which is a fluctuation pattern controlled to the advantageous state, and a fourth fluctuation pattern (PA2-7 to 9) which is a fluctuation pattern not controlled to the advantageous state are selected as one of the fluctuation patterns;
When the first variation pattern is determined, a first command (a variation pattern designation command designating PB1-JB) is transmitted to the performance control means;
When the second variation pattern (the variation pattern designation command designating PA2-3) is determined, a second command is transmitted to the performance control means;
When the third variation pattern is determined, a third command (a variation pattern designation command designating PB1-5 to PB7) is transmitted to the performance control means;
When the fourth variation pattern is determined, a fourth command (a variation pattern designation command designating PA2-7 to PA2-9) is transmitted to the performance control means;
The performance control means (performance control CPU 120)
When the first command is received, it is possible to notify that the game will be controlled to the advantageous state (jackpot game state) in the first reach (low base weak reach B presentation),
When the second command is received, it is possible to notify that the first reach (low base weak reach B presentation) is not controlled to the advantageous state (jackpot game state),
When the third command is received, it is possible to notify that the game will be controlled to the advantageous state (jackpot game state) in the second reach (low base strong reach B presentation),
When the fourth command is received, it is possible to notify that the second reach (low base strong reach B presentation) is not controlled to the advantageous state (jackpot game state),
The first reach (low base weak reach B performance) is configured to include a title display part that displays a title display (title characters) corresponding to the first reach, and an introduction part until the result of the advantageous state is notified,
The second reach (low base strong reach B performance) is configured to include a title display part that displays a title display (title characters) corresponding to the second reach, and an introduction part until the result of the advantageous state is notified,
The second reach (low base strong reach B effect) has a higher expectation of being controlled to the advantageous state than the first reach (low base weak reach B effect),
The first reach (low base weak reach B effect) and the second reach (low base strong reach B effect) are reaches in which a plurality of characters are used,
The first reach (low base weak reach B performance) is a reach in which a first character in the first reach (ally character "Yume Yume") and a second character in the first reach (enemy character "Boingo") are used, and it is notified that the first character (ally character "Yume Yume") will be controlled to the advantageous state,
The second reach (low base strong reach B performance) is a reach in which a first character in the second reach (ally characters "Jam" and "Nana") and a second character in the second reach (enemy character "Robo") are used, and it is notified that the first character (ally characters "Jam" and "Nana") will be controlled to the advantageous state,
The display means (image display device 5)
The introductory part of the second reach (low base strong reach B performance) starts with a display in which the first character in the second reach (ally characters "Jam" and "Nana") is arranged in the foreground and the second character in the second reach (enemy character "Robo") is arranged in the background,
The introductory part of the first reach (low base weak reach B presentation) is characterized in that it starts with a display in which the first character in the first reach (ally character "Yume Yume") is not in the foreground and the second character in the second reach (enemy character "Boingo") is not in the background.
According to this feature, for the second reach, which has a relatively high degree of expectation, the first character, which is notified that the situation will be controlled to an advantageous state, starts from an arrangement in which the first character is at the front and the second character is at the back, allowing the player to empathize and making it easier for the player to intuitively recognize that the degree of expectation is high, resulting in an optimal title display.

The gaming machine of aspect 5-2 is the gaming machine according to aspect 5-1,
The first characters are characters who receive benefits if they win a battle (ally characters “Jam” and “Nana”),
The second character is a character (enemy character "robot") to which no benefit is given if the second character wins a battle,
At the start of the introductory part of the second reach (low base strong reach B presentation), the first characters (ally characters "Jam" and "Nana") are displayed in a position in front with their backs to you, and the second character (enemy character "Robo") is displayed in a position in the back facing you, with the first and second characters facing each other.
According to this feature, for the second reach, which has a relatively high expectation, the player's direction and the first character's direction are the same, making it easier for the player to empathize with the character and for the player to recognize that the expectation is high.

The gaming machine of aspect 5-3 is the gaming machine according to aspect 5-1 or 5-2,
In the introductory part of the second reach (low base strong reach B presentation), the first character (ally characters "Jam" and "Nana") and the second character (enemy character "Robo") are displayed at a position including the display area in which the title display (title characters) was displayed in the title display part.
According to this feature, when a player who has been paying attention to the title display disappears, his or her gaze is naturally drawn to the first and second characters.

[Form 6]
The gaming machine of form 6-1 is
A gaming machine (pachinko gaming machine 1) that can be controlled to a favorable state (jackpot gaming state) that is advantageous to a player by executing a variable display of specific identification information (first special chart, second special chart) and deriving a specific display result (a special chart display result of "jackpot") as a result of the variable display of the specific identification information,
A game control means (a game control microcomputer 100);
A performance control means (performance control CPU 120);
A display means (image display device 5),
The game control means (game control microcomputer 100)
Determining whether or not the game medium (game ball) is controlled to the advantageous state when the game medium (game ball) enters the start area (first start winning hole, second start winning hole);
Execute variable display of the specific identification information (first special chart, second special chart),
Based on the result of the judgment, a first fluctuation pattern (PB1-JA, PB1-JB) which is a fluctuation pattern controlled to the advantageous state, a second fluctuation pattern (PA2-2, PA2-3) which is a fluctuation pattern not controlled to the advantageous state, a third fluctuation pattern (PB1-2 to PB1-10) which is a fluctuation pattern controlled to the advantageous state, and a fourth fluctuation pattern (PA2-4 to 12) which is a fluctuation pattern not controlled to the advantageous state are selected from a plurality of fluctuation patterns;
When the first variation pattern is determined, a first command (a variation pattern designation command designating PB1-JA and PB1-JB) is transmitted to the performance control means;
When the second variation pattern (variation pattern designation command designating PA2-2, PA2-3) is determined, a second command is transmitted to the performance control means;
When the third variation pattern is determined, a third command (a variation pattern designation command designating PB1-2 to PB1-10) is transmitted to the performance control means;
When the fourth variation pattern is determined, a fourth command (a variation pattern designation command designating PA2-4 to PA2-12) is transmitted to the performance control means;
The performance control means (performance control CPU 120)
When the first command is received, it is possible to notify that the first reach (low base weak reach A, B performance) will be controlled to the advantageous state (jackpot game state),
When the second command is received, it is possible to notify that the first reach (low base weak reach A, B performance) is not controlled to the advantageous state (jackpot game state),
When the third command is received, it is possible to notify that the game will be controlled to the advantageous state (jackpot game state) in the second reach (low base strong reach A to C performance),
When the fourth command is received, it is possible to notify that the second reach (low base strong reach A to C performance) is not controlled to the advantageous state (jackpot game state),
The first reach (low base weak reach A, B performance) is configured to include a title display part that displays a title display (title character) corresponding to the first reach, and an introduction part until the result of the advantageous state is notified,
The second reach (low base strong reach A to C performance) is configured to include a title display part that displays a title display (title character) corresponding to the second reach, and an introduction part until the result of the advantageous state is notified,
The second reach (low base strong reach A to C performance) has a higher expectation of being controlled into the advantageous state (jackpot game state) than the first reach (low base weak reach A, B performance),
The second reach (low base strong reach A to C performance) has a longer execution time than the first reach (low base weak reach A, B performance),
The first reach and the second reach are reaches in which dialogue subtitles are used,
The display means (image display device 5)
In the title display part in the first reach (low base weak reach A, B performance), a title display (title characters) and dialogue subtitles are displayed,
In the introductory part of the first reach (low base weak reach A, B performance), the dialogue subtitles that were displayed in the title display part in the first reach are continuously displayed,
In the title display part of the second reach (low base strong reach A to C performance), dialogue subtitles are not displayed, but a title display (title text) is displayed.
According to this feature, during the second reach, which has a relatively high expectation and a long execution time, the title display and dialogue subtitles are displayed so as not to overlap as much as possible, while during the first reach, which has a relatively low expectation and a short execution time, even if the dialogue subtitles and title display overlap, the title display is ended first so that the player can also focus on the dialogue subtitles. This makes it possible to provide the title display and dialogue subtitles to the player in an optimal manner, and as a result, the title display can be performed in an optimal manner.

The gaming machine of aspect 6-2 is the gaming machine according to aspect 6-1,
When a title display (title characters) and dialogue subtitles corresponding to the first reach (low base weak reach A, B performance) are displayed in the title display part, in the subsequent introductory part, the performance scene is not switched until the display of the dialogue subtitles that were displayed simultaneously with the title display (title characters) ends.
According to this feature, when a title display corresponding to the first reach and a dialogue subtitle are displayed in the title display part in the first reach, in the subsequent introductory part, the scene of the performance does not change until the display of the dialogue subtitle that was displayed simultaneously with the title display ends, so that attention can be drawn to the title display and then to the dialogue subtitle.

The gaming machine of aspect 6-3 is the gaming machine according to aspect 6-1 or 6-2,
This is characterized in that when a title display (title characters) and dialogue subtitles corresponding to the first reach are displayed in the title display part in the first reach (low base weak reach A, B performance), audio corresponding to the dialogue subtitles is output, while audio corresponding to the title display (title characters) is not output.
According to this feature, when a title display and dialogue subtitles are displayed simultaneously, audio corresponding to the dialogue subtitles is output while audio corresponding to the title display is not output, making it easier to hear the audio corresponding to the dialogue subtitles.

[Form 7]
The gaming machine of form 7-1 is
A gaming machine (pachinko gaming machine 1) that can be controlled to a favorable state (jackpot gaming state) that is advantageous to a player by executing a variable display of specific identification information (first special chart, second special chart) and deriving a specific display result (a special chart display result of "jackpot") as a result of the variable display of the specific identification information,
A game control means (a game control microcomputer 100);
A performance control means (performance control CPU 120);
A display means (image display device 5);
A plurality of light emitting means (frame LEDs LWL1 to LWL12, frame LEDs LWR2 to LWR12, logo LEDs LL1 to LL4, decorative LEDs LS1 to LS5, and attacca lamps LA1 to LA4);
A light emission control means (performance control CPU 120);
The game control means (game control microcomputer 100)
When the game medium (game ball) enters the start area (first start winning hole, second start winning hole), it is determined whether or not the game medium is controlled to the advantageous state (jackpot game state);
Execute variable display of the specific identification information (first special chart, second special chart),
Based on the result of the judgment, a fluctuation pattern is determined from among a plurality of fluctuation patterns including a first fluctuation pattern (jackpot fluctuation pattern) which is a fluctuation pattern controlled to the advantageous state, and a second fluctuation pattern (miss fluctuation pattern) which is a fluctuation pattern not controlled to the advantageous state;
When the first fluctuation pattern is determined, a first command (a fluctuation pattern designation command for designating a jackpot fluctuation pattern) is transmitted to the performance control means;
When the second variation pattern is determined, a second command (a variation pattern designation command for designating a miss variation pattern) is transmitted to the performance control means;
The performance control means (performance control CPU 120)
When the first command is received, it is possible to notify that a specific reach (low base strongest reach effect, high base reach A to D effect) will be controlled to the advantageous state (jackpot game state),
When the second command is received, it is possible to notify that the specific reach (low base strongest reach performance, high base reach A to D performance) is not controlled to the advantageous state (jackpot game state),
The specific reach (low base strongest reach performance, high base reach A to D performance) is configured to include a title display part that displays a title display (title character) corresponding to the specific reach, and an introduction part until the result of the control of the advantageous state is notified,
The title display of the specific reach (low base strongest reach performance, high base reach A to D performance) is composed of multiple characters ("Catch the Bakuchu with 6 people!", "Battle Reach A (Battle Reach B to D)"),
The display means (image display device 5) starts displaying the title display (title characters) of the specific reach in a first size (enlarged size) in which only a part of the multiple characters is visible in the title display part in the specific reach, and displays the title display (title characters) of the specific reach so that the display size is gradually reduced from the first size to a second size (reduced size) in which all of the multiple characters are visible,
The light emission control means (performance control CPU 120)
Controlling the light emitting means using a luminance data table configured with luminance data;
In the title display part, the light emitting means is controlled using a brightness data table for title display (strongest reach title of the strongest reach type, high base reach common title of the high base reach type);
In the introduction part, the light emitting means is controlled using a brightness data table for the introduction part (introduction of strongest reach system strongest reach, introduction of high base reach system reach A (introduction of high base reach system reach B, introduction of high base reach system reach C, introduction of high base reach system reach D)).
According to this feature, in the title display part in the specific reach, the display is performed in a first size in which only some of the characters are visible, and then the size gradually decreases until all the characters are visible, so that the player can focus on the title display. Also, in the title display part, the light-emitting means is controlled using a brightness data table for the title display that is different from the brightness data table for the introduction part, so that the light-emitting means can be made to emit light in a suitable light-emitting mode according to the title display. As a result of these, the title display can be performed in a suitable manner.

The gaming machine of aspect 7-2 is the gaming machine according to aspect 7-1,
Before the title display part of the specific reach (low-base strongest reach performance) starts, a movable object (movable body 32) is moved to overlap the front side of the display means (image display device 5),
During the period from when the movable object moves to when it returns to its initial position (falling effect), a background corresponding to the movement of the movable object (background dedicated to the falling effect) is displayed, and when the movable object returns to its initial position, a title display (title characters) begins to be displayed at a first size (enlarged size) in which not all of the multiple characters are visible and the display area of the display means is filled so that the background becomes unvisible, and then a title display at a second size (reduced size) and a background corresponding to the title display (background dedicated to the title display) are displayed.
According to this feature, the reach title display method creates an impact while at the same time switching the background without creating an awkward feeling, allowing the title display to be viewed favorably by the player.

[Form 8]
The gaming machine of form 8-1 is
A gaming machine (pachinko gaming machine 1) that can be controlled to a favorable state (jackpot gaming state) that is advantageous to a player by executing a variable display of specific identification information (first special chart, second special chart) and deriving a specific display result (a special chart display result of "jackpot") as a result of the variable display of the specific identification information,
A game control means (a game control microcomputer 100);
A performance control means (performance control CPU 120);
A display means (image display device 5);
A plurality of light emitting means (frame LEDs LWL1 to LWL12, frame LEDs LWR2 to LWR12, logo LEDs LL1 to LL4, decorative LEDs LS1 to LS5, and attacca lamps LA1 to LA4);
A light emission control means (performance control CPU 120);
The game control means (game control microcomputer 100)
When the game medium (game ball) enters the start area (first start winning hole, second start winning hole), it is determined whether or not the game medium is controlled to the advantageous state (jackpot game state);
Execute variable display of the specific identification information (first special chart, second special chart),
Based on the result of the judgment, a fluctuation pattern is determined from among a plurality of fluctuation patterns including a first fluctuation pattern (jackpot fluctuation pattern) which is a fluctuation pattern controlled to the advantageous state, and a second fluctuation pattern (miss fluctuation pattern) which is a fluctuation pattern not controlled to the advantageous state;
When the first fluctuation pattern is determined, a first command (a fluctuation pattern designation command for designating a jackpot fluctuation pattern) is transmitted to the performance control means;
When the second variation pattern is determined, a second command (a variation pattern designation command for designating a miss variation pattern) is transmitted to the performance control means;
The performance control means (performance control CPU 120)
When the first command is received, it is possible to notify that a specific reach (low base strongest reach effect, high base reach A to D effect) will be controlled to the advantageous state (jackpot game state),
When the second command is received, it is possible to notify that the specific reach (low base strongest reach performance, high base reach A to D performance) is not controlled to the advantageous state (jackpot game state),
The specific reach (low base strongest reach performance, high base reach A to D performance) is configured to include a title display part that displays a title display (title character) corresponding to the specific reach, and an introduction part until the result of the control of the advantageous state is notified,
The title display of the specific reach (low base strongest reach performance, high base reach A to D performance) is composed of multiple characters ("Catch the Bakuchu with 6 people!", "Battle Reach A (Battle Reach B to D)"),
The display means (image display device 5) displays, in the title display part in the specific reach, a plurality of characters from a state where the plurality of characters are displayed (a state where the plurality of characters are displayed in a fixed position at a reduced size) in an enlarged manner (enlarged until the entire display area is filled with a portion of the title characters), thereby ending the title display part, and displays a display corresponding to the introduction part in the specific reach (the background at the start of the introduction part) so as to be visible;
The light emission control means (performance control CPU 120)
Controlling the light emitting means using a luminance data table configured with luminance data;
In the title display part, the light emitting means is controlled using a brightness data table for title display (strongest reach title of the strongest reach type, high base reach common title of the high base reach type);
In the introduction part, the light emitting means is controlled using a brightness data table for the introduction part (introduction of strongest reach system strongest reach, introduction of high base reach system reach A (introduction of high base reach system reach B, introduction of high base reach system reach C, introduction of high base reach system reach D)).
According to this feature, the player pays attention to the title display during the title display part, and the title display can be used appropriately to seamlessly switch to the display corresponding to the next introduction part. Also, in the title display part, the light-emitting means is controlled using a brightness data table for the title display that is different from the brightness data table for the introduction part, so that the light-emitting means can be made to emit light in a suitable light-emitting mode according to the title display. As a result, the title display can be performed in a suitable manner.

[Mode 9]
The gaming machine of form 9-1 is
A gaming machine (pachinko gaming machine 1) that can be controlled to a favorable state (jackpot gaming state) that is advantageous to a player by executing a variable display of specific identification information (first special chart, second special chart) and deriving a specific display result (a special chart display result of "jackpot") as a result of the variable display of the specific identification information,
A game control means (a game control microcomputer 100);
A performance control means (performance control CPU 120);
A display means (image display device 5),
The game control means (game control microcomputer 100)
Determining whether or not the game medium (game ball) is controlled to the advantageous state when the game medium (game ball) enters the start area (first start winning hole, second start winning hole);
Execute variable display of the specific identification information (first special chart, second special chart),
Based on the result of the judgment, a first fluctuation pattern (PB1-JA, PB1-JB) which is a fluctuation pattern controlled to the advantageous state, a second fluctuation pattern (PA2-2, PA2-3) which is a fluctuation pattern not controlled to the advantageous state, a third fluctuation pattern (PB1-2 to PB1-10) which is a fluctuation pattern controlled to the advantageous state, and a fourth fluctuation pattern (PA2-4 to 12) which is a fluctuation pattern not controlled to the advantageous state are selected from a plurality of fluctuation patterns;
When the first variation pattern is determined, a first command (a variation pattern designation command designating PB1-JA and PB1-JB) is transmitted to the performance control means;
When the second variation pattern is determined, a second command (a variation pattern designation command designating PA2-2 and PA2-3) is transmitted to the performance control means;
When the third variation pattern is determined, a third command (a variation pattern designation command designating PB1-2 to PB1-10) is transmitted to the performance control means;
When the fourth variation pattern is determined, a fourth command (a variation pattern designation command designating PA2-4 to PA2-12) is transmitted to the performance control means;
The performance control means (performance control CPU 120)
When the first command is received, it is possible to notify that the first reach (low base weak reach A, B performance) will be controlled to the advantageous state (jackpot game state),
When the second command is received, it is possible to notify that the first reach (low base weak reach A, B performance) is not controlled to the advantageous state (jackpot game state),
When the third command is received, it is possible to notify that the game will be controlled to the advantageous state (jackpot game state) in the second reach (low base strong reach A to C performance),
When the fourth command is received, it is possible to notify that the second reach (low base strong reach A to C performance) is not controlled to the advantageous state (jackpot game state),
The first reach (low base weak reach A, B performance) is configured to include a title display part that displays a title display (title character) corresponding to the first reach, and an introduction part until the result of the advantageous state is notified,
The second reach (low base strong reach A to C performance) is configured to include a title display part that displays a title display (title character) corresponding to the second reach, and an introduction part until the result of the advantageous state is notified,
The execution time (T1-1 to T2-2) of the title display part in the first reach (low base weak reach A, B performance) is different from the execution time (T2-1 to T2-3) of the title display part in the second reach (low base strong reach A to C performance),
The title display part is composed of a first part (title start period) from when the title display starts to when it is displayed at a fixed position, a second part (title display period) that is displayed at the fixed position, and a third part (title end period) from when the title display starts to when it is displayed at the fixed position to when it is ended,
The display means (image display device 5)
In a title display part in the first reach (low base weak reach A, B performance), a title display (title characters) is displayed so that the second part (title display period) is longer than the first part (title start period) and the third part (title end period), and the first part (title start period) is longer than the third part (title end period);
In the title display part in the second reach (low base strong reach A to C performance), the title display (title characters) is displayed so that the second part (title display period) is longer than the first part (title start period) and the third part (title end period), and the first part (title start period) is longer than the third part (title end period).
According to this feature, even if the execution time of the title display part differs between the first reach and the second reach, the second part displayed in the fixed position is made the longest, so that attention can be drawn to the type of title display. Also, even if the execution time of the title display part differs between the first reach and the second reach, the first part until it is displayed in the fixed position is made longer than the third part from the display in the fixed position until the display ends, so that it is possible to incite which title display will be displayed. Also, even if the execution time of the title display part differs between the first reach and the second reach, the title display part can be made easier to understand by making the relationship of the execution times of the first part, second part, and third part the same.

[Form 10]
The gaming machine of form 10-1 is
A gaming machine (pachinko gaming machine 1) that can be controlled to a favorable state (jackpot gaming state) that is advantageous to a player by executing a variable display of specific identification information (first special chart, second special chart) and deriving a specific display result (a special chart display result of "jackpot") as a result of the variable display of the specific identification information,
A game control means (a game control microcomputer 100);
A performance control means (performance control CPU 120);
A display means (image display device 5),
The game control means (game control microcomputer 100)
Determining whether or not the game medium (game ball) is controlled to the advantageous state when the game medium (game ball) enters the start area (first start winning hole, second start winning hole);
Execute variable display of the specific identification information (first special chart, second special chart),
Based on the result of the judgment, a first fluctuation pattern (a jackpot fluctuation pattern in a normal state) which is a fluctuation pattern controlled in the advantageous state, a second fluctuation pattern (a miss fluctuation pattern in a normal state) which is a fluctuation pattern not controlled in the advantageous state, a third fluctuation pattern (a jackpot fluctuation pattern in a high probability state) which is a fluctuation pattern controlled in the advantageous state, and a fourth fluctuation pattern (a miss fluctuation pattern in a high probability state) which is a fluctuation pattern not controlled in the advantageous state are selected from a plurality of fluctuation patterns,
When the first fluctuation pattern is determined, a first command (a fluctuation pattern designation command for designating a jackpot fluctuation pattern in a normal state) is transmitted to the performance control means;
When the second variation pattern is determined, a second command (a variation pattern designation command designating a deviation variation pattern in a normal state) is transmitted to the performance control means;
When the third variation pattern is determined, a third command (a variation pattern designation command for designating a jackpot variation pattern in a probability variation state) is transmitted to the performance control means;
When the fourth variation pattern is determined, a fourth command (a variation pattern designation command for designating a miss variation pattern in a probability variation state) is transmitted to the performance control means;
The performance control means (performance control CPU 120)
When the first command is received, it is possible to notify that the game will be controlled to the advantageous state (jackpot game state) in the first reach (super reach presentation in the normal state),
When the second command is received, it is possible to notify that the first reach (super reach presentation in a normal state) is not controlled to the advantageous state (jackpot game state),
When the third command is received, it is possible to notify that the advantageous state will be controlled in the second reach (super reach performance in the probability variable state),
When the fourth command is received, it is possible to notify that the second reach (super reach presentation in a probability variable state) is not controlled to the advantageous state (jackpot game state),
The first reach (super reach effect in a normal state) is configured to include a title display part that displays a title display (title characters) corresponding to the first reach, and an introduction part until the result of the advantageous state is notified,
The second reach (super reach effect in a probability variable state) is configured to include a title display part that displays a title display (title characters) corresponding to the second reach, and an introduction part until the result of the control of the advantageous state is notified,
The execution time (T1-1 to T2-1 to T3, T3) of the title display part in the first reach (super reach performance in normal state) is different from the execution time (T4) of the title display part in the second reach (super reach performance in the probability change state),
The first reach (super reach effect in a normal state) is a reach that is executed in a normal state, and the second reach (super reach effect in a probability variable state) is a reach that is executed in a special state (probability variable state) that is more advantageous than the normal state,
The title display part is composed of a first part (title start period) from when the title display starts to when it is displayed at a fixed position, a second part (title display period) that is displayed at the fixed position, and a third part (title end period) from when the title display starts to when it is displayed at the fixed position to when it is ended,
The display means (image display device 5)
displaying a title display (title characters) in a title display part in the first reach (super reach effect in a normal state) such that the second part (title display period) is longer than the first part (title start period) and the third part (title end period), and the first part (title start period) is longer than the third part (title end period);
In the title display part in the second reach (super reach performance in a probability variable state), the title display (title characters) is displayed so that the second part (title display period) is longer than the first part (title start period) and the third part (title end period), and the first part (title start period) is longer than the third part (title end period).
According to this feature, even if the execution time of the title display part differs between the first reach executed in the normal state and the second reach executed in the special state, the second part displayed in the fixed position is made the longest, so that the type of title display can be drawn to. Also, even if the execution time of the title display part differs between the first reach executed in the normal state and the second reach executed in the special state, the first part until it is displayed in the fixed position is made longer than the third part until it is displayed in the fixed position and ends, so that it is possible to inspire which title display will be displayed. Also, even if the execution time of the title display part differs between the first reach executed in the normal state and the second reach executed in the special state, the title display part can be made easier to understand by making the relationship between the execution times of the first part, the second part, and the third part common.

The gaming machine of aspect 10-2 is the gaming machine according to aspect 10-1,
The execution time (T4) of the title display part in the second reach (super reach performance in a special probability state) is shorter than the execution time (T1-1 to 2, T2-1 to 3, T3) of the title display part in the first reach (super reach performance in a normal state).
According to this feature, the execution time of the title display part in the second reach executed in the special state is relatively short, allowing the special state to progress at a good pace, while the execution time of the title display part in the first reach executed in the normal state is relatively long, allowing for strong excitement.

[Form 11]
The gaming machine of form 11-1 is
A gaming machine (pachinko gaming machine 1) that can be controlled to a favorable state (jackpot gaming state) that is advantageous to a player by executing a variable display of specific identification information (first special chart, second special chart) and deriving a specific display result (a special chart display result of "jackpot") as a result of the variable display of the specific identification information,
A game control means (a game control microcomputer 100);
A performance control means (performance control CPU 120);
A display means (image display device 5);
A plurality of light emitting means (frame LEDs LWL1 to LWL12, frame LEDs LWR2 to LWR12, logo LEDs LL1 to LL4, decorative LEDs LS1 to LS5, and attacca lamps LA1 to LA4);
A light emission control means (performance control CPU 120);
The game control means (game control microcomputer 100)
When the game medium (game ball) enters the start area (first start winning hole, second start winning hole), it is determined whether or not the game medium is controlled to the advantageous state (jackpot game state);
Execute variable display of the specific identification information (first special chart, second special chart),
Based on the result of the judgment, a fluctuation pattern is determined from among a plurality of fluctuation patterns including a first fluctuation pattern (jackpot fluctuation pattern) which is a fluctuation pattern controlled to the advantageous state, and a second fluctuation pattern (miss fluctuation pattern) which is a fluctuation pattern not controlled to the advantageous state;
When the first fluctuation pattern is determined, a first command (a fluctuation pattern designation command for designating a jackpot fluctuation pattern) is transmitted to the performance control means;
When the second variation pattern is determined, a second command (a variation pattern designation command for designating a miss variation pattern) is transmitted to the performance control means;
The performance control means (performance control CPU 120)
When the first command is received, it is possible to notify that the game will be controlled to the advantageous state (jackpot game state) in a specific reach (super reach effect),
When the second command is received, it is possible to notify that the specific reach (super reach effect) is not controlled to the advantageous state (jackpot game state),
The specific reach (super reach effect) is configured to include a title display part that displays a title display (title characters) corresponding to the specific reach, and an introduction part until the result of the control of the advantageous state is notified,
The title display part is composed of a first part (title start period) from when the title display starts to when it is displayed at a fixed position, a second part (title display period) that is displayed at the fixed position, and a third part (title end period) from when the title display starts to when it is displayed at the fixed position to when it is ended,
the display means (image display device 5) displays a title display (title characters) in a title display part in the specific reach (super reach effect) such that the second part (title display period) is longer than the first part (title start period) and the third part (title end period), and the first part (title start period) is longer than the third part (title end period);
Controlling the light emitting means using a luminance data table configured with luminance data;
In the title display part, the light emitting means is controlled using a brightness data table for title display (a weak reach common title, a strong reach common title, and a high base reach common title);
In the introduction part, the light emitting means is controlled using a brightness data table for the introduction part (introduction of weak reach A of weak reach system, introduction of weak reach B of weak reach system, introduction of strong reach A of strong reach system, introduction of strong reach B of strong reach system, introduction of strong reach C of strong reach system, introduction of reach A of high base reach system, introduction of reach B of high base reach system, introduction of reach C of high base reach system, introduction of reach D of high base reach system).
According to this feature, the second part displayed at the fixed position is made the longest, thereby drawing attention to the type of title display. Also, the first part until it is displayed at the fixed position is made longer than the third part from the display at the fixed position until the display ends, thereby making it possible to arouse interest in which title display is to be displayed. Also, in the title display part, the light-emitting means is controlled using a luminance data table for the title display that is different from the luminance data table for the introductory part, so that the light-emitting means can be made to emit light in a suitable light-emitting mode according to the title display. As a result of these, the title display can be performed in a suitable manner.

[Form 12]
The gaming machine of form 12-1 is
A gaming machine (pachinko gaming machine 1) that can be controlled to a favorable state (jackpot gaming state) that is advantageous to a player by executing a variable display of specific identification information (first special chart, second special chart) and deriving a specific display result (a special chart display result of "jackpot") as a result of the variable display of the specific identification information,
A game control means (a game control microcomputer 100);
A performance control means (performance control CPU 120);
A display means (image display device 5);
A plurality of light emitting means (frame LEDs LWL1 to LWL12, frame LEDs LWR2 to LWR12, logo LEDs LL1 to LL4, decorative LEDs LS1 to LS5, and attacca lamps LA1 to LA4);
A light emission control means (performance control CPU 120);
The game control means (game control microcomputer 100)
When the game medium (game ball) enters the start area (first start winning hole, second start winning hole), it is determined whether or not the game medium is controlled to the advantageous state (jackpot game state);
Execute variable display of the specific identification information (first special chart, second special chart),
Based on the result of the judgment, a fluctuation pattern is determined from among a plurality of fluctuation patterns including a first fluctuation pattern (jackpot fluctuation pattern) which is a fluctuation pattern controlled to the advantageous state, and a second fluctuation pattern (miss fluctuation pattern) which is a fluctuation pattern not controlled to the advantageous state;
When the first fluctuation pattern is determined, a first command (a fluctuation pattern designation command for designating a jackpot fluctuation pattern) is transmitted to the performance control means;
When the second variation pattern is determined, a second command (a variation pattern designation command for designating a miss variation pattern) is transmitted to the performance control means;
The performance control means (performance control CPU 120)
When the first command is received, it is possible to notify that a specific reach (low base strong reach A to C performance, low base strongest reach performance) will be controlled to the advantageous state (jackpot game state),
When the second command is received, it is possible to notify that the specific reach (low base strong reach A to C performance, low base strongest reach performance) is not controlled to the advantageous state (jackpot game state),
The specific reach (low base strong reach A to C performance, low base strongest reach performance) is configured to include a title display part that displays a title display (title character) corresponding to the specific reach, and an introduction part until the result of the control of the advantageous state is notified,
The display means includes:
It is possible to display the title display (title characters) corresponding to the specific reach (low base strong reach A to C effects, low base strongest reach effects) in a first mode (white mode) and the title display corresponding to the specific reach in a second mode (red mode) having a higher expectation of being controlled to the advantageous state than in the first mode,
In the title display part (title display part shown in FIG. 11-43) in the specific reach (low base strong reach A to C performance, low base strongest reach performance), an expectation indication corresponding to the specific reach is displayed in a first size, and then a title display (title characters) corresponding to the specific reach is displayed in a second size larger than the first size,
In both cases of displaying the title display (title characters) corresponding to the specific reach in the first mode (white mode) and displaying the title display (title characters) corresponding to the specific reach in the second mode (red mode), the expectation degree suggestion display is displayed in a common mode;
The light emission control means (performance control CPU 120)
Controlling the light emitting means using a luminance data table configured with luminance data;
In the title display part, the light emitting means is controlled using a brightness data table for title display (strongest reach title of the strongest reach type, strong reach common title of the strong reach type),
In the introductory part, the light emitting means is controlled using a brightness data table for the introductory part (strong reach system strong reach C introduction, strongest reach system strongest reach introduction, strong reach system strong reach B introduction).
According to this feature, the title display corresponding to the specific reach is larger in size than the expectation suggestion display, and since the expectation is suggested by its appearance, it attracts the player's attention, but by displaying the expectation suggestion display before the title display, it is possible to draw the player's attention to the expectation suggestion first. Also, since the expectation suggestion display is performed in a common manner whether the title display is displayed in the first manner or the second manner, it is possible to draw the player's attention to the appearance of the subsequent title display.

[Form 13]
The gaming machine of form 13-1 is
A gaming machine (pachinko gaming machine 1) that can be controlled to a favorable state (jackpot gaming state) that is advantageous to a player by executing a variable display of specific identification information (first special chart, second special chart) and deriving a specific display result (a special chart display result of "jackpot") as a result of the variable display of the specific identification information,
A game control means (a game control microcomputer 100);
A performance control means (performance control CPU 120);
A display means (image display device 5);
A plurality of light emitting means (frame LEDs LWL1 to LWL12, frame LEDs LWR2 to LWR12, logo LEDs LL1 to LL4, decorative LEDs LS1 to LS5, and attacca lamps LA1 to LA4);
A light emission control means (performance control CPU 120);
The game control means (game control microcomputer 100)
When the game medium (game ball) enters the start area (first start winning hole, second start winning hole), it is determined whether or not the game medium is controlled to the advantageous state (jackpot game state);
Execute variable display of the specific identification information (first special chart, second special chart),
Based on the result of the judgment, a first fluctuation pattern (PB1-5 to PB1-7) which is a fluctuation pattern controlled to the advantageous state, a second fluctuation pattern (PA2-7 to PB2-9) which is a fluctuation pattern not controlled to the advantageous state, a third fluctuation pattern (PB1-8 to PB1-10) which is a fluctuation pattern controlled to the advantageous state, and a fourth fluctuation pattern (PA2-10 to PB2-12) which is a fluctuation pattern not controlled to the advantageous state are selected as one of the fluctuation patterns;
When the first variation pattern is determined, a first command (a variation pattern designation command designating PB1-5 to PB7) is transmitted to the performance control means;
When the second variation pattern is determined, a second command (a variation pattern designation command designating PA2-7 to PA2-9) is transmitted to the performance control means;
When the third variation pattern is determined, a third command (a variation pattern designation command designating PB1-8 to PB1-10) is transmitted to the performance control means;
When the fourth variation pattern is determined, a fourth command (a variation pattern designation command designating PA2-10 to PA2-12) is transmitted to the performance control means;
The performance control means (performance control CPU 120)
When the first command is received, it is possible to notify that the game will be controlled to the advantageous state (jackpot game state) in the first reach (low base strong reach B presentation),
When the second command is received, it is possible to notify that the first reach (low base strong reach B presentation) is not controlled to the advantageous state (jackpot game state),
When the third command is received, it is possible to notify that the game will be controlled to the advantageous state (jackpot game state) in the second reach (low base strong reach C presentation),
When the fourth command is received, it is possible to notify that the second reach (low base strong reach C presentation) is not controlled to the advantageous state (jackpot game state),
The first reach (low base strong reach B performance) is configured to include a title display part that displays a title display (title characters) corresponding to the first reach, and an introduction part until the result of the advantageous state is notified,
The second reach (low base strong reach C performance) is configured to include a title display part that displays a title display (title characters) corresponding to the second reach, and an introduction part until the result of the advantageous state is notified,
The second reach (low base strong reach C effect) has a higher expectation of being controlled to the advantageous state than the first reach (low base strong reach B effect),
The display means is
In the title display part of the first reach (low base strong reach B performance), an expectation indication is displayed in the first mode (3.5 stars),
In the title display part of the second reach (low base strong reach C performance), the expectation indication display is displayed in the second mode (four stars),
A highlight display is displayed so as to be common between the expectation suggestion display in the title display part of the first reach (low base strong reach B performance) and the expectation suggestion display in the title display part of the second reach (low base strong reach C performance),
The light emission control means (performance control CPU 120)
Controlling the light emitting means using a luminance data table configured with luminance data;
In the title display part of the first reach (low base strong reach B performance), the light emitting means is controlled using a brightness data table (strong reach system strong reach B title) for the title display part of the first reach,
In the title display part of the second reach (low base strong reach C performance), the light emitting means is controlled using a brightness data table (strong reach system strong reach C title) for the title display part of the second reach,
In the introduction part of the first reach (low base strong reach B performance), the light emitting means is controlled using a brightness data table (strong reach system strong reach B introduction) for the introduction part of the first reach,
In the introductory part of the second reach (low base strong reach C presentation), the light emitting means is controlled using a brightness data table (strong reach system strong reach C introduction) for the introductory part of the second reach.
According to this feature, development costs can be reduced by using the same highlighting whether the expectation level indication is displayed in the first mode in the title display part in the first reach or the second mode in the title display part in the second reach. Also, in the title display parts in the first reach and the second reach, the light emitting means is controlled using a brightness data table for the title display of the first reach and the second reach that is different from the brightness data table for the introductory part of the first reach and the second reach, so that the light emitting means can be made to emit light in a suitable light emitting mode according to the title display. As a result of these, the title display can be made to be suitable.

The gaming machine of aspect 13-2 is the gaming machine according to aspect 13-1,
The expectation indication display is composed of a plurality of objects (star-shaped objects),
The first reach (low base strong reach B performance) is indicated by N (N is an integer) + 0.5 (3.5) objects,
The second reach (low base strong reach C performance) is indicated by N+1 (4) objects.
The expectation indication is characterized in that each object (star-shaped object) is highlighted, and the highlighting is performed in a common manner whether one object is highlighted or 0.5 objects are highlighted.
According to this feature, whether highlighting one object or 0.5 objects, the highlighting is performed in a common manner, thereby reducing development costs.

The gaming machine of aspect 13-3 is the gaming machine according to aspect 13-2,
The expectation degree suggestion display is characterized in that the time during which one object (star-shaped object) is highlighted and the time during which 0.5 object (star-shaped object) is highlighted are the same.
According to this feature, the time during which one object is highlighted and the time during which 0.5 objects are highlighted are made common, thereby making it possible to reduce development costs.

The gaming machine of aspect 13-4 is the gaming machine according to aspect 13-2 or 13-3,
The expectation level indication display is characterized in that a common emphasis sound (expectation level indication sound) is output whether one object (star-shaped object) is highlighted or 0.5 object (star-shaped object) is highlighted.
According to this feature, the same sound is output whether one object is highlighted or 0.5 objects are highlighted, thereby reducing development costs.

[Form 14]
The gaming machine of form 14-1 is
A gaming machine (pachinko gaming machine 1) that can be controlled to a favorable state (jackpot gaming state) that is advantageous to a player by executing a variable display of specific identification information (first special chart, second special chart) and deriving a specific display result (a special chart display result of "jackpot") as a result of the variable display of the specific identification information,
A game control means (a game control microcomputer 100);
A performance control means (performance control CPU 120);
A display means (image display device 5),
The game control means (game control microcomputer 100)
When the game medium (game ball) enters the start area (first start winning hole, second start winning hole), it is determined whether or not the game medium is controlled to the advantageous state (jackpot game state);
Execute variable display of the specific identification information (first special chart, second special chart),
Based on the result of the judgment, a fluctuation pattern is determined from among a plurality of fluctuation patterns including a first fluctuation pattern (jackpot fluctuation pattern) which is a fluctuation pattern controlled to the advantageous state, and a second fluctuation pattern (miss fluctuation pattern) which is a fluctuation pattern not controlled to the advantageous state;
When the first fluctuation pattern is determined, a first command (a fluctuation pattern designation command for designating a jackpot fluctuation pattern) is transmitted to the performance control means;
When the second variation pattern is determined, a second command (a variation pattern designation command for designating a miss variation pattern) is transmitted to the performance control means;
The performance control means (performance control CPU 120)
When the first command is received, it is possible to notify that a specific reach (low base strong reach A to C performance, low base strongest reach performance, high base reach A to D performance) will be controlled to the advantageous state (jackpot game state),
When the second command is received, it is possible to notify that the specific reach (low base strong reach A to C performance, low base strongest reach performance, high base reach A to D performance) is not controlled to the advantageous state (jackpot game state),
The specific reach (low base strong reach A to C performance, low base strongest reach performance, high base reach A to D performance) is configured to include a title display part that displays a title display (title character) corresponding to the specific reach, and an introduction part until the result of the control of the advantageous state is notified,
The display means (image display device 5)
In the title display part of the specific reach (low base strong reach A to C performance, low base strongest reach performance, high base reach A to D performance), an expectation suggestion display consisting of a plurality of objects (star-shaped objects) can be displayed,
In the expectation indication display in the title display part of the specific reach (low base strong reach A to C effects, low base strongest reach effect, high base reach A to D effect), the first object (star-shaped object) is highlighted, then, while continuing the highlighting of the first object (star-shaped object), the second object (star-shaped object) is highlighted, and then, the highlighting of the first object (star-shaped object) is ended and the third object (star-shaped object) is highlighted.
According to this feature, in the title display part in a specific reach, an expectation suggestion display consisting of a plurality of objects can be displayed, and in the expectation suggestion display, highlighting of the second object begins before highlighting of the first object ends, but highlighting of the third object does not begin until highlighting of the first object ends, making it easier to recognize the number of objects suggesting expectation.

The gaming machine of aspect 14-2 is the gaming machine according to aspect 14-1,
The expectation level indication display is characterized in that an emphasis sound (expectation level indication sound) is output each time an object (star-shaped object) is highlighted, and after the output of the emphasis sound (expectation level indication sound) for the highlighting of one object (star-shaped object) has been completed, an emphasis sound (expectation level indication sound) for the highlighting of the next object is output.
According to this feature, the emphasis sound for highlighting one object and the emphasis sound for highlighting the next object do not overlap, making it easier to recognize the number of objects suggesting the degree of expectation.

The gaming machine of aspect 14-3 is the gaming machine according to aspect 14-1 or 14-2,
The expectation indication is composed of a plurality of objects (star-shaped objects) and characters (characters "expectation");
The object (star-shaped object) is highlighted in a size that overlaps with the text (text "Expectation").
According to this feature, it is possible to draw attention to both the multiple objects and characters that make up the expectation level suggestion display by highlighting the objects.

[Form 15]
The gaming machine of form 15-1 is
A gaming machine (pachinko gaming machine 1) that can be controlled to a favorable state (jackpot gaming state) that is advantageous to a player by executing a variable display of specific identification information (first special chart, second special chart) and deriving a specific display result (a special chart display result of "jackpot") as a result of the variable display of the specific identification information,
A game control means (a game control microcomputer 100);
A performance control means (performance control CPU 120);
A display means (image display device 5);
A plurality of light emitting means (frame LEDs LWL1 to LWL12, frame LEDs LWR2 to LWR12, logo LEDs LL1 to LL4, decorative LEDs LS1 to LS5, and attacca lamps LA1 to LA4);
A light emission control means (performance control CPU 120);
The game control means (game control microcomputer 100)
When the game medium (game ball) enters the start area (first start winning hole, second start winning hole), it is determined whether or not the game medium is controlled to the advantageous state (jackpot game state);
Execute variable display of the specific identification information (first special chart, second special chart),
Based on the result of the judgment, a fluctuation pattern is determined from among a plurality of fluctuation patterns including a first fluctuation pattern (jackpot fluctuation pattern) which is a fluctuation pattern controlled to the advantageous state, and a second fluctuation pattern (miss fluctuation pattern) which is a fluctuation pattern not controlled to the advantageous state;
When the first fluctuation pattern is determined, a first command (a fluctuation pattern designation command for designating a jackpot fluctuation pattern) is transmitted to the performance control means;
When the second variation pattern is determined, a second command (a variation pattern designation command for designating a miss variation pattern) is transmitted to the performance control means;
The performance control means (performance control CPU 120)
When the first command is received, it is possible to notify that a specific reach (low base strong reach A to C performance, low base strongest reach performance, high base reach A to D performance) will be controlled to the advantageous state (jackpot game state),
When the second command is received, it is possible to notify that the specific reach (low base strong reach A to C performance, low base strongest reach performance, high base reach A to D performance) is not controlled to the advantageous state (jackpot game state),
The specific reach (low base strong reach A to C performance, low base strongest reach performance, high base reach A to D performance) is configured to include a title display part that displays a title display (title character) corresponding to the specific reach, and an introduction part until the result of the control of the advantageous state is notified,
The display means (image display device 5)
A plurality of pending displays corresponding to variable displays that have not yet started can be displayed;
In the title display part of the specific reach (low base strong reach A to C performance, low base strongest reach performance, high base reach A to D performance), an expectation suggestion display consisting of a plurality of objects (star-shaped objects) can be displayed,
In the title display part of the specific reach (low base strong reach A to C performance, low base strongest reach performance, high base reach A to D performance), the hold display is not displayed at the same time as the expectation suggestion display,
The light emission control means (performance control CPU 120)
Controlling the light emitting means using a luminance data table configured with luminance data;
In the title display part, the light emitting means is controlled using a brightness data table for title display (a strong reach type common title, a strongest reach type strongest reach title, and a high base reach type common title);
In the introduction part, the light emitting means is controlled using a brightness data table for the introduction part (introduction of strong reach A of strong reach system, introduction of strong reach B of strong reach system, introduction of strong reach C of strong reach system, introduction of strongest reach system strongest reach, introduction of high base reach system reach A, introduction of high base reach system reach B, introduction of high base reach system reach C, introduction of high base reach system reach D).
According to this feature, in the title display part in a specific reach, an expectation indication consisting of a plurality of objects is displayed, while by not displaying the hold indication at the same time as the expectation indication, it is possible to prevent the hold indication from being mistakenly recognized as an expectation indication. Also, in the title display part, the light-emitting means is controlled using a brightness data table for the title display that is different from the brightness data table for the introduction part, so that the light-emitting means can be made to emit light in a suitable light-emitting mode according to the title display. As a result of these, the title display can be performed in a suitable manner.

The gaming machine of aspect 15-2 is the gaming machine according to aspect 15-1,
The maximum number of active displays corresponding to the pending display and the started variable display is characterized by being equal to the maximum number (five) of objects (star-shaped objects) constituting the expectation indication display.
According to this feature, even if a specific reach occurs when the maximum number of pending displays and active displays are displayed, it is possible to prevent the pending displays and active displays from being mistakenly recognized as the maximum number of objects that make up the expectation indication display.

The gaming machine of aspect 15-3 is the gaming machine according to aspect 15-1 or 15-2,
The hold display is terminated when the display means (image display device 5) displays in monochrome before the title display part starts.
This feature allows the hold display to end without any awkwardness.

[Form 16]
The gaming machine of form 16-1 is
A gaming machine (pachinko gaming machine 1) that can be controlled to a favorable state (jackpot gaming state) that is advantageous to a player by executing a variable display of specific identification information (first special chart, second special chart) and deriving a specific display result (a special chart display result of "jackpot") as a result of the variable display of the specific identification information,
A game control means (a game control microcomputer 100);
A performance control means (performance control CPU 120);
A display means (image display device 5),
The game control means (game control microcomputer 100)
Determining whether or not the game medium (game ball) is controlled to the advantageous state when the game medium (game ball) enters the start area (first start winning hole, second start winning hole);
Execute variable display of the specific identification information (first special chart, second special chart),
Based on the result of the judgment, a first fluctuation pattern (PB1-2 to 4/PB1-14) which is a fluctuation pattern controlled to the advantageous state, a second fluctuation pattern (PA2-4 to 6/PA2-16) which is a fluctuation pattern not controlled to the advantageous state, a third fluctuation pattern (PB1-5 to 7/PB1-15) which is a fluctuation pattern controlled to the advantageous state, a fourth fluctuation pattern (PA2-7 to 9/PA2-17) which is a fluctuation pattern not controlled to the advantageous state, a fifth fluctuation pattern (PB1-8 to 10/PB1-16) which is a fluctuation pattern controlled to the advantageous state, and a sixth fluctuation pattern (PA2-10 to 12/PA2-18) which is a fluctuation pattern not controlled to the advantageous state are selected from a plurality of fluctuation patterns;
When the first variation pattern is determined, a first command (a variation pattern designation command designating PB1-2 to PB1-4/PB1-14) is transmitted to the performance control means;
When the second variation pattern is determined, a second command (a variation pattern designation command designating PA2-4 to PA2-6/PA2-16) is transmitted to the performance control means;
When the third variation pattern is determined, a third command (a variation pattern designation command designating PB1-5 to PB1-7/PB1-15) is transmitted to the performance control means;
When the fourth variation pattern is determined, a fourth command (a variation pattern designation command designating PA2-7 to PA2-9/PA2-17) is transmitted to the performance control means;
When the fifth variation pattern is determined, a fifth command (a variation pattern designation command designating PB1-8 to PB1-10/PB1-16) is transmitted to the performance control means;
When the sixth variation pattern is determined, a sixth command (a variation pattern designation command designating PA2-10 to 12/PA2-18) is transmitted to the performance control means;
The performance control means (performance control CPU 120)
When the first command is received, it is possible to notify that the first reach (low base strong reach A performance/high base reach A performance) will be controlled to the advantageous state (jackpot game state),
When the second command is received, it is possible to notify that the first reach (low base strong reach A presentation/high base reach A presentation) is not controlled to the advantageous state (jackpot game state),
When the third command is received, it is possible to notify that the game will be controlled to the advantageous state (jackpot game state) in the second reach (low base strong reach B performance/high base reach B performance),
When the fourth command is received, it is possible to notify that the second reach (low base strong reach B presentation/high base reach B presentation) is not controlled to the advantageous state (jackpot game state),
When the fifth command is received, it is possible to notify that the third reach (low base strong reach C effect/high base reach C effect) will be controlled to the advantageous state (jackpot game state),
When the sixth command is received, it is possible to notify that the third reach (low base strong reach C presentation/high base reach C presentation) is not controlled to the advantageous state (jackpot game state),
The first reach (low base strong reach A performance/high base reach A performance) is configured to include a title display part that displays a title display (title characters) corresponding to the first reach, and an introduction part until the result of the advantageous state is notified,
The second reach (low base strong reach B performance/high base reach B performance) is configured to include a title display part that displays a title display (title characters) corresponding to the second reach, and an introduction part until the result of the advantageous state is notified,
The third reach (low base strong reach C effect/high base reach C effect) is configured to include a title display part that displays a title display (title characters) corresponding to the third reach, and an introduction part until the result of the advantageous state is notified,
The display means (image display device 5)
In the title display part in the first reach (low base strong reach A performance/high base reach A performance), an expectation suggestion display consisting of a first number (3) of objects (star-shaped objects) can be displayed,
In the title display part in the second reach (low base strong reach B performance/high base reach B performance), an expectation suggestion display consisting of a second number (3.5) of objects (star-shaped objects) that is greater than the first number can be displayed,
In the title display part in the third reach (low base strong reach C performance/high base reach C performance), an expectation suggestion display consisting of a third number (4) of objects (star-shaped objects) greater than the second number can be displayed,
the difference between the first number and the second number is the same as the difference between the second number and the third number (0.5);
The difference between the degree of expectation controlled to the advantageous state when the third reach (low base strong reach C performance/high base reach C performance) is executed and the degree of expectation controlled to the advantageous state when the second reach (low base strong reach B performance/high base reach B performance) is executed is greater than the difference between the degree of expectation controlled to the advantageous state when the second reach (low base strong reach B performance/high base reach B performance) is executed and the degree of expectation controlled to the advantageous state when the first reach (low base strong reach A performance/high base reach A performance) is executed.
According to this feature, when the number of objects displayed as an expectation level indication display in the title display part increases from a first number to a second number, the increase in the number of objects is the same as when the number of objects increases from the second number to a third number, but the increase in the expectation level of being controlled to an advantageous state is greater when the number of objects increases from the second number to the third number than when the number of objects increases from the first number to the second number. Therefore, as the number of objects increases, the player can expect that the number of objects will be controlled to an advantageous state relative to the increased number of objects, while not being overly hopeful that the number of objects will be controlled to an advantageous state when the number of objects is small.

The gaming machine of aspect 16-2 is the gaming machine according to aspect 16-1,
The plurality of fluctuation patterns include a seventh fluctuation pattern (PB1-11 to 13/PB1-17) which is a fluctuation pattern controlled to the advantageous state, and an eighth fluctuation pattern (PA2-13 to 15/PA2-19) which is a fluctuation pattern not controlled to the advantageous state,
A game control means (a game control microcomputer 100);
When the seventh variation pattern is determined, a seventh command (a variation pattern designation command designating PB1-11 to PB1-13/PB1-17) is transmitted to the performance control means;
When the eighth variation pattern is determined, an eighth command (a variation pattern designation command designating PA2-13 to 15/PA2-19) is transmitted to the performance control means;
The performance control means (performance control CPU 120)
When the seventh command is received, it is possible to notify that the fourth reach (low base strongest reach effect/high base reach D effect) will be controlled to the advantageous state (jackpot game state),
When the eighth command is received, it is possible to notify that the fourth reach (low base strongest reach performance/high base reach D performance) is not controlled to the advantageous state (jackpot game state),
The fourth reach (low base strongest reach performance/high base reach D performance) is configured to include a title display part that displays a title display (title characters) corresponding to the fourth reach, and an introduction part until the result of the advantageous state is notified,
The display means is capable of displaying an expectation indication display consisting of a fourth number (4.5) object (star-shaped object) that is greater than the third number in a title display part in the fourth reach (low base strongest reach performance/high base reach D performance),
the difference between the third number and the fourth number (0.5) is smaller than the difference between the first number and the third number (1);
The difference between the degree of expectation controlled to the advantageous state when the fourth reach (low base strongest reach performance/high base reach D performance) is executed and the degree of expectation controlled to the advantageous state when the third reach (low base strong reach C performance/high base reach C performance) is executed is greater than the difference between the degree of expectation controlled to the advantageous state when the third reach (low base strong reach C performance/high base reach C performance) is executed and the degree of expectation controlled to the advantageous state when the first reach (low base strong reach A performance/high base reach A performance) is executed.
According to this feature, the increase in the number of objects displayed as an expectation level indication display in the title display part is smaller when the number of objects increases from the third number to the fourth number than when it increases from the first number to the third number, but the increase in the expectation level that will be controlled to an advantageous state is greater when the number increases from the third number to the fourth number than when it increases from the first number to the third number. Therefore, the more the number of objects increases, the more it can be expected that the object will be controlled to an advantageous state even if the number of increased objects is small.

The gaming machine of aspect 16-3 is the gaming machine according to aspect 16-2,
The difference between the third number and the fourth number is 0.5, and the difference between the first number and the third number is 1.
According to this feature, it can be expected that the number of objects displayed as an expectation level indication in the title display part will be controlled in a more favorable state when it increases by 0.5 from the third number to the fourth number, rather than when it increases by 1 from the first number to the third number.
The gaming machine of aspect 16-4 is the gaming machine according to any one of aspects 16-1 to 16-3,
The difference between the degree of expectation controlled to the advantageous state when the third reach (high base reach C performance) is executed in a special state (probable change state) which is more advantageous than the normal state and the degree of expectation controlled to the advantageous state when the second reach (high base reach B performance) is executed is greater than the difference between the degree of expectation controlled to the advantageous state when the third reach (low base strong reach C performance) is executed in the normal state and the degree of expectation controlled to the advantageous state when the second reach (low base strong reach B performance) is executed.
According to this feature, it is possible to expect that a special state that is more advantageous than a normal state will be controlled to be an advantageous state when the number of objects displayed as an expectation level indication in the title display part increases.

[Form 17]
The gaming machine of form 17-1 is
A gaming machine (pachinko gaming machine 1) that can be controlled to a favorable state (jackpot gaming state) that is advantageous to a player by executing a variable display of specific identification information (first special chart, second special chart) and deriving a specific display result (a special chart display result of "jackpot") as a result of the variable display of the specific identification information,
A game control means (a game control microcomputer 100);
A performance control means (performance control CPU 120);
A display means (image display device 5);
A plurality of light emitting means (frame LEDs LWL1 to LWL12, frame LEDs LWR2 to LWR12, logo LEDs LL1 to LL4, decorative LEDs LS1 to LS5, and attacca lamps LA1 to LA4);
A light emission control means (performance control CPU 120);
The game control means (game control microcomputer 100)
When the game medium (game ball) enters the start area (first start winning hole, second start winning hole), it is determined whether or not the game medium is controlled to the advantageous state (jackpot game state);
Execute variable display of the specific identification information (first special chart, second special chart),
Based on the result of the judgment, a first fluctuation pattern (PB1-JA, PB1-JB) which is a fluctuation pattern controlled to the advantageous state, a second fluctuation pattern (PA2-2, PA2-3) which is a fluctuation pattern not controlled to the advantageous state, a third fluctuation pattern (PB1-2 to PB1-10) which is a fluctuation pattern controlled to the advantageous state, and a fourth fluctuation pattern (PA2-4 to 12) which is a fluctuation pattern not controlled to the advantageous state are selected from a plurality of fluctuation patterns;
When the first variation pattern is determined, a first command (a variation pattern designation command designating PB1-JA and PB1-JB) is transmitted to the performance control means;
When the second variation pattern is determined, a second command (a variation pattern designation command designating PA2-2 and PA2-3) is transmitted to the performance control means;
When the third variation pattern is determined, a third command (a variation pattern designation command designating PB1-2 to PB1-10) is transmitted to the performance control means;
When the fourth variation pattern is determined, a fourth command (a variation pattern designation command designating PA2-4 to PA2-12) is transmitted to the performance control means;
The performance control means (performance control CPU 120)
When the first command is received, it is possible to notify that the first reach (low base weak reach A, B performance) will be controlled to the advantageous state (jackpot game state),
When the second command is received, it is possible to notify that the first reach (low base weak reach A, B performance) is not controlled to the advantageous state (jackpot game state),
When the third command is received, it is possible to notify that the game will be controlled to the advantageous state (jackpot game state) in the second reach (low base strong reach A to C performance),
When the fourth command is received, it is possible to notify that the second reach (low base strong reach A to C performance) is not controlled to the advantageous state (jackpot game state),
The first reach (low base weak reach A, B performance) is configured to include a title display part that displays a title display (title character) corresponding to the first reach, and an introduction part until the result of the advantageous state is notified,
The second reach (low base strong reach A to C performance) is configured to include a title display part that displays a title display (title character) corresponding to the second reach, and an introduction part until the result of the advantageous state is notified,
The first reach (low base weak reach A, B effect) and the second reach (low base strong reach A to C effect) are both reaches executed in a normal state, and the second reach (low base strong reach A to C effect) has a higher expectation of being controlled to the advantageous state than the first reach (low base weak reach A, B effect),
The title display part in the second reach (low base strong reach A to C performance) is longer than the title display part in the first reach (low base weak reach A, B performance),
The display means (image display device 5)
In the title display part of the second reach (low base strong reach A to C performance), an expectation indication is displayed,
The expectation indication is not displayed in the title display part in the first reach (low base weak reach A, B performance),
The light emission control means (performance control CPU 120)
Controlling the light emitting means using a luminance data table configured with luminance data;
In the title display part in the first reach (low base weak reach A, B performance), the light emitting means is controlled using a brightness data table (weak reach common title) for the title display part of the first reach,
In the title display part in the second reach (low base strong reach A to C performance), the light emitting means is controlled using a brightness data table (common title for strong reach) for the title display part of the second reach,
In the introduction part of the first reach (low base weak reach A, B performance), the light emitting means is controlled using a brightness data table (weak reach system weak reach A introduction, weak reach system weak reach B introduction) for the introduction part of the first reach,
In the introductory part of the second reach (low base strong reach A to C performance), the light emitting means is controlled using a brightness data table (strong reach system strong reach A introduction, strong reach system strong reach B introduction, strong reach system strong reach C introduction) for the introductory part of the second reach.
According to this feature, the title display part in the second reach, which has a relatively high expectation, is longer than the title display part in the first reach, which has a relatively low expectation, and while an expectation suggestion display is displayed in the title display part in the second reach, an expectation suggestion display is not displayed in the title display part in the first reach, so that the player can physically recognize that the expectation of the second reach is higher than that of the first reach. Also, in the title display parts in the first reach and the second reach, the light-emitting means is controlled using a brightness data table for the title display of the first reach and the second reach, which is different from the brightness data table for the introduction part of the first reach and the second reach, so that the light-emitting means can be made to emit light in a suitable light-emitting mode according to the title display. As a result of these, the title display can be performed suitably.

The gaming machine of aspect 17-2 is the gaming machine according to aspect 17-1,
The title display part in the second reach (low base strong reach A to C performance) is composed of a prologue part (prologue display period) and a character display part (title start period, title display period, title end period),
The title display part in the first reach (low base weak reach A, B performance) does not have a prologue part (prologue display period) and is composed only of character display parts (title start period, title display period, title end period),
The character display part of the title display part in the second reach (low base strong reach A to C performance) is longer than the character display part of the title display part in the first reach (low base weak reach A, B performance).
According to this feature, since the character display part of the title display part in the second reach is longer than the character display part of the title display part in the first reach, the player can intuitively recognize that the second reach has a higher expectation than the first reach.

The gaming machine of aspect 17-3 is the gaming machine according to aspect 17-1 or 17-2,
The reach is executed in the normal state, and includes a third reach (low base strongest reach presentation) having a higher expectation of being controlled to the advantageous state than the second reach (low base strong reach A to C presentation),
The title display part in the second reach (low base strong reach A to C performance) is composed of a prologue part (prologue display period) and a character display part (title start period, title display period, title end period),
The title display part in the third reach (low-base strongest reach performance) does not have a prologue part (prologue display period), and is composed only of text display parts (title start period, title display period, title end period),
The character display part of the title display part in the third reach (low base strongest reach performance) is longer than the character display part of the title display part in the second reach (low base strong reach A to C performance).
According to this feature, since the character display part of the title display part in the third reach is longer than the character display part of the title display part in the second reach, it is possible to intuitively recognize that the third reach has a higher expectation than the second reach.

[Form 18]
The gaming machine of form 18-1 is
A gaming machine (pachinko gaming machine 1) that can be controlled to a favorable state (jackpot gaming state) that is advantageous to a player by executing a variable display of specific identification information (first special chart, second special chart) and deriving a specific display result (a special chart display result of "jackpot") as a result of the variable display of the specific identification information,
A game control means (a game control microcomputer 100);
A performance control means (performance control CPU 120);
A display means (image display device 5);
A plurality of light emitting means (frame LEDs LWL1 to LWL12, frame LEDs LWR2 to LWR12, logo LEDs LL1 to LL4, decorative LEDs LS1 to LS5, and attacca lamps LA1 to LA4);
A light emission control means (performance control CPU 120);
The game control means (game control microcomputer 100)
When the game medium (game ball) enters the start area (first start winning hole, second start winning hole), it is determined whether or not the game medium is controlled to the advantageous state (jackpot game state);
Execute variable display of the specific identification information (first special chart, second special chart),
Based on the result of the judgment, a first fluctuation pattern (PB1-2, 5, 8) which is a fluctuation pattern controlled to the advantageous state, a second fluctuation pattern (PA2-2 to 3) which is a fluctuation pattern not controlled to the advantageous state, a third fluctuation pattern (PB1-2 to 10) which is a fluctuation pattern controlled to the advantageous state, and a fourth fluctuation pattern (PA2-4 to 12) which is a fluctuation pattern not controlled to the advantageous state are selected from a plurality of fluctuation patterns;
When the first variation pattern is determined, a first command (a variation pattern designation command designating PB1-2, 5, 8) is transmitted to the performance control means;
When the second variation pattern is determined, a second command (a variation pattern designation command designating PA2-2 to PA2-3) is transmitted to the performance control means;
When the third variation pattern is determined, a third command (a variation pattern designation command designating PB1-2 to PB1-10) is transmitted to the performance control means;
When the fourth variation pattern is determined, a fourth command (a variation pattern designation command designating PA2-4 to PA2-12) is transmitted to the performance control means;
The performance control means (performance control CPU 120)
When the first command is received, the first reach (low base weak reach A, B performance) can be executed,
When the second command is received, the first reach (low base weak reach A, B performance) can be executed,
When the third command is received, the second reach (low base strong reach A to C performance) can be executed,
When the fourth command is received, the second reach (low base strong reach A to C performance) can be executed,
The first reach (low base weak reach A, B effect) and the second reach (low base strong reach A to C effect) are both reaches executed in a normal state,
The first reach (low base weak reach A, B performance) is a reach that does not notify the fact that it will be controlled to the advantageous state (jackpot gaming state) as a performance result, and may be a reach that notifies the fact that it will not be controlled to the advantageous state (jackpot gaming state) as a performance result, or may be a reach that executes another reach (super reach performance).
The second reach (low base strong reach A to C performance) is a reach that has a performance result in which it is notified that the advantageous state (jackpot gaming state) will be controlled, and in which it is notified that the advantageous state (jackpot gaming state) will not be controlled,
The first reach (low base weak reach A, B performance) is configured to include a title display part that displays a title display (title character) corresponding to the first reach, and an introduction part until it is notified whether the other reach is executed,
The second reach (low base strong reach A to C performance) is configured to include a title display part that displays a title display (title character) corresponding to the second reach, and an introduction part until the result of the advantageous state is notified,
The display means (image display device 5)
In the title display part of the second reach (low base strong reach A to C performance), an expectation indication is displayed,
The expectation indication is not displayed in the title display part in the first reach (low base weak reach A, B performance),
The light emission control means (performance control CPU 120)
Controlling the light emitting means using a luminance data table configured with luminance data;
In the title display part in the first reach (low base weak reach A, B performance), the light emitting means is controlled using a brightness data table (weak reach common title) for the title display part of the first reach,
In the title display part in the second reach (low base strong reach A to C performance), the light emitting means is controlled using a brightness data table (common title for strong reach) for the title display part of the second reach,
In the introduction part of the first reach (low base weak reach A, B performance), the light emitting means is controlled using a brightness data table (weak reach system weak reach A introduction, weak reach system weak reach B introduction) for the introduction part of the first reach,
In the introductory part of the second reach (low base strong reach A to C performance), the light emitting means is controlled using a brightness data table (strong reach system strong reach A introduction, strong reach system strong reach B introduction, strong reach system strong reach C introduction) for the introductory part of the second reach.
According to this feature, while an expectation indication is displayed in the title display part in the second reach where it may be directly notified that the game will be controlled to an advantageous state, an expectation indication is not displayed in the title display part in the first reach where it is not directly notified that the game will be controlled to an advantageous state, so that it is possible to prevent the first reach from causing an excessive sense of expectation. Also, in the title display parts in the first reach and the second reach, the light-emitting means is controlled using a brightness data table for the title display of the first reach and the second reach that is different from the brightness data table for the introductory part of the first reach and the second reach, so that the light-emitting means can be made to emit light in a suitable light-emitting mode according to the title display. As a result of these, the title display can be performed in a suitable manner.

The gaming machine of aspect 18-2 is the gaming machine according to aspect 18-1,
The title display part in the first reach (low base weak reach A, B performance) is characterized in that it is possible to display a title display (title characters) in a confirmed state (gold) that confirms that another reach (super reach performance) will be executed.
According to this feature, it is possible to draw the player's attention even to the title display part in the first reach where the expectation indication display is not displayed.

[Form 19]
The gaming machine of form 19-1 is
A gaming machine (pachinko gaming machine 1) that can be controlled to a favorable state (jackpot gaming state) that is advantageous to a player by executing a variable display of specific identification information (first special chart, second special chart) and deriving a specific display result (a special chart display result of "jackpot") as a result of the variable display of the specific identification information,
A game control means (a game control microcomputer 100);
A performance control means (performance control CPU 120);
A display means (image display device 5),
The game control means (game control microcomputer 100)
When the game medium (game ball) enters the start area (first start winning hole, second start winning hole), it is determined whether or not the game medium is controlled to the advantageous state (jackpot game state);
Execute variable display of the specific identification information (first special chart, second special chart),
Based on the result of the judgment, a fluctuation pattern is determined from among a plurality of fluctuation patterns including a first fluctuation pattern (jackpot fluctuation pattern) which is a fluctuation pattern controlled to the advantageous state, and a second fluctuation pattern (miss fluctuation pattern) which is a fluctuation pattern not controlled to the advantageous state;
When the first fluctuation pattern is determined, a first command (a fluctuation pattern designation command for designating a jackpot fluctuation pattern) is transmitted to the performance control means;
When the second variation pattern is determined, a second command (a variation pattern designation command for designating a miss variation pattern) is transmitted to the performance control means;
The performance control means (performance control CPU 120)
When the first command is received, it is possible to notify that a specific reach (low base strong reach A to C performance, low base strongest reach) will be controlled to the advantageous state (jackpot game state),
When the second command is received, it is possible to notify that the specific reach (low base strong reach A to C performance, low base strongest reach) is not controlled to the advantageous state (jackpot game state),
The specific reach (low base strong reach A to C effects, low base strongest reach) is configured to include a title display part that displays a title display (title character) corresponding to the specific reach, and an introduction part until the result of the control of the advantageous state is notified,
The specific reach (low base strong reach A to C effects, low base strongest reach) may be executed via a selection effect using a title display (title characters) corresponding to a plurality of reaches (super reach effects) including the specific reach,
The display means includes:
It is possible to display an expectation indication together with the title indication (title characters) in the title display part and the selection effect of the specific reach (low base strong reach A to C effect, low base strongest reach),
When displaying the expectation indication in the title display part of the specific reach (low base strong reach A to C performance, low base strongest reach), a expectation indication consisting of a plurality of objects (star-shaped objects) is displayed in stages,
When the expectation indication display is displayed in the selection performance, the expectation indication display consisting of a plurality of objects (star-shaped objects) is not displayed in stages.
According to this feature, when an expectation suggestion display is displayed in the title display part of a specific reach, the expectation suggestion display made up of a plurality of objects is displayed in stages, whereas when an expectation suggestion display is displayed in a selection performance, the expectation suggestion display made up of a plurality of objects is not displayed in stages, thereby eliminating the annoyance of the expectation suggestion display being displayed in stages not only in the title display part but also in the selection performance preceding it.

The gaming machine of aspect 19-2 is the gaming machine according to aspect 19-1,
The selection effect is an effect that changes stepwise from a reach with low expectation (super reach effect) to a reach with high expectation (super reach effect) by operating the effect operation means (push button 31B),
The time required for the selection effect to change by one step (the minimum time required to switch to the title image of the next super reach effect) may be shorter than the time required for the expectation indication display of the title display part of the specific reach (low base strong reach A to C effects, low base strongest reach) to display by one step (the time it takes for a star-shaped object to change from black to highlighted and then to gold).
This characteristic makes it possible to impart a sense of speed to the gradual changes in the selection presentation.

The gaming machine of aspect 19-3 is the gaming machine according to aspect 19-2,
The selection presentation is a presentation that changes step by step from the current reach (super reach presentation) to a reach (super reach presentation) with one step higher expectation, and is characterized in that the number of operations of the presentation operation means (push button 31B) required to change to the next stage increases with each step change.
According to this feature, the higher the expectation of a reach, the more impatient the player can be.

A gaming machine according to aspect 19-4 is a gaming machine according to any one of aspects 19-1 to 19-3,
When the specific reach (low base strong reach A to C effects, low base strongest reach) is selected by the selection effect, the game starts from the title display part.
According to this feature, even when a specific reach is executed via a selection performance, the game starts from the title display part, so that it is easy for the player to determine which reach has ultimately been executed.

[Form 20]
The gaming machine of form 20-1 is
A gaming machine (pachinko gaming machine 1) that can be controlled to a favorable state (jackpot gaming state) that is advantageous to a player by executing a variable display of specific identification information (first special chart, second special chart) and deriving a specific display result (a special chart display result of "jackpot") as a result of the variable display of the specific identification information,
A game control means (a game control microcomputer 100);
A performance control means (performance control CPU 120);
A display means (image display device 5);
A plurality of light emitting means (frame LEDs LWL1 to LWL12, frame LEDs LWR2 to LWR12, logo LEDs LL1 to LL4, decorative LEDs LS1 to LS5, and attacca lamps LA1 to LA4);
A light emission control means (performance control CPU 120);
The game control means (game control microcomputer 100)
When the game medium (game ball) enters the start area (first start winning hole, second start winning hole), it is determined whether or not the game medium is controlled to the advantageous state (jackpot game state);
Execute variable display of the specific identification information (first special chart, second special chart),
Based on the result of the judgment, a fluctuation pattern is determined from among a plurality of fluctuation patterns including a first fluctuation pattern (jackpot fluctuation pattern) which is a fluctuation pattern controlled to the advantageous state, and a second fluctuation pattern (miss fluctuation pattern) which is a fluctuation pattern not controlled to the advantageous state;
When the first fluctuation pattern is determined, a first command (a fluctuation pattern designation command for designating a jackpot fluctuation pattern) is transmitted to the performance control means;
When the second variation pattern is determined, a second command (a variation pattern designation command for designating a miss variation pattern) is transmitted to the performance control means;
The performance control means (performance control CPU 120)
When the first command is received, it is possible to notify that the game will be controlled to the advantageous state (jackpot game state) in a specific reach (super reach effect),
When the second command is received, it is possible to notify that the specific reach (super reach effect) is not controlled to the advantageous state (jackpot game state),
The specific reach (super reach effect) is configured to include a title display part that displays a title display (title characters) corresponding to the specific reach, and an introduction part until the result of the control of the advantageous state is notified,
The display means (image display device 5)
After it is notified that the specific reach (super reach effect) will control the game to the advantageous state, a name display of the advantageous state (title character of the big win start effect) corresponding to the controlled advantageous state can be displayed.
The advantageous state name display (title character of the big win start performance) is displayed in a manner with greater movement than the title display corresponding to the specific reach (title character of the super reach performance),
The light emission control means (performance control CPU 120)
Controlling the light emitting means using a luminance data table configured with luminance data;
In the title display part, the light emitting means is controlled using a brightness data table for title display (a weak reach common title, a strong reach common title, and a high base reach common title);
In the introduction part, the light emitting means is controlled using a brightness data table for the introduction part (introduction of weak reach A of weak reach system, introduction of weak reach B of weak reach system, introduction of strong reach A of strong reach system, introduction of strong reach B of strong reach system, introduction of strong reach C of strong reach system, introduction of reach A of high base reach system, introduction of reach B of high base reach system, introduction of reach C of high base reach system, introduction of reach D of high base reach system).
According to this feature, in a specific reach, the situation in which the title display is performed is one in which it is not yet clear whether or not the game will be controlled to an advantageous state, whereas the situation in which the advantageous state name display is performed is one in which it has already been announced that the game will be controlled to an advantageous state, and the game can be celebrated by moving the advantageous state name display more greatly. Also, in the title display part, the light-emitting means is controlled using a brightness data table for the title display that is different from the brightness data table for the introduction part, so that the light-emitting means can be made to emit light in a suitable light-emitting mode according to the title display, and as a result, the title display can be performed in a suitable manner.

The gaming machine of aspect 20-2 is the gaming machine according to aspect 20-1,
In the title display part of the specific reach (low base strong reach B, C performance, low base strongest reach performance, high base reach A to D), when the title display (title character) is displayed, a background dedicated to the title display is displayed,
The background of the advantageous state name display (title characters of the jackpot start performance) is characterized by being displayed in a manner with greater movement than the background dedicated to the title display.
According to this feature, the background of the advantageous state name display can be moved more dramatically to celebrate being in an advantageous state.

[Form 21]
The gaming machine of form 21-1 is
A gaming machine (pachinko gaming machine 1) that can be controlled to a favorable state (jackpot gaming state) that is advantageous to a player by executing a variable display of specific identification information (first special chart, second special chart) and deriving a specific display result (a special chart display result of "jackpot") as a result of the variable display of the specific identification information,
A game control means (a game control microcomputer 100);
A performance control means (performance control CPU 120);
A display means (image display device 5);
A plurality of light emitting means (frame LEDs LWL1 to LWL12, frame LEDs LWR2 to LWR12, logo LEDs LL1 to LL4, decorative LEDs LS1 to LS5, and attacca lamps LA1 to LA4);
A light emission control means (performance control CPU 120);
The game control means (game control microcomputer 100)
When the game medium (game ball) enters the start area (first start winning hole, second start winning hole), it is determined whether or not the game medium is controlled to the advantageous state (jackpot game state);
Execute variable display of the specific identification information (first special chart, second special chart),
Based on the result of the judgment, a fluctuation pattern is determined from among a plurality of fluctuation patterns including a first fluctuation pattern (jackpot fluctuation pattern) which is a fluctuation pattern controlled to the advantageous state, and a second fluctuation pattern (miss fluctuation pattern) which is a fluctuation pattern not controlled to the advantageous state;
When the first fluctuation pattern is determined, a first command (a fluctuation pattern designation command for designating a jackpot fluctuation pattern) is transmitted to the performance control means;
When the second variation pattern is determined, a second command (a variation pattern designation command for designating a miss variation pattern) is transmitted to the performance control means;
The performance control means (performance control CPU 120)
When the first command is received, it is possible to notify that the game will be controlled to the advantageous state (jackpot game state) in a specific reach (super reach effect),
When the second command is received, it is possible to notify that the specific reach (super reach effect) is not controlled to the advantageous state (jackpot game state),
The specific reach (super reach effect) is configured to include a title display part that displays a title display (title characters) corresponding to the specific reach, and an introduction part until the result of the control of the advantageous state is notified,
The display means (image display device 5)
In the introductory part (operation prompting performance B, D) of the specific reach (super reach performance), a prompting character display (operation prompting character (small)) for prompting the player to take an action can be displayed.
The promotion character display (operation promotion character (small)) is displayed in a manner in which the movement is larger than that of the title display (title character) corresponding to the specific reach (super reach effect),
The light emission control means (performance control CPU 120)
Controlling the light emitting means using a luminance data table configured with luminance data;
In the title display part, the light emitting means is controlled using a brightness data table for title display (a weak reach common title, a strong reach common title, and a high base reach common title);
In the introduction part, the light emitting means is controlled using a brightness data table for the introduction part (introduction of weak reach A of weak reach system, introduction of weak reach B of weak reach system, introduction of strong reach A of strong reach system, introduction of strong reach B of strong reach system, introduction of strong reach C of strong reach system, introduction of reach A of high base reach system, introduction of reach B of high base reach system, introduction of reach C of high base reach system, introduction of reach D of high base reach system).
According to this feature, the prompting character display displayed in the introduction part prompts the player to take an action, and by moving it more than the title display displayed in the title display part, the player can be intuitively prompted to take an action. Also, in the title display part, the light-emitting means is controlled using a brightness data table for the title display that is different from the brightness data table for the introduction part, so that the light-emitting means can be made to emit light in a suitable light-emitting mode according to the title display, and as a result, the title display can be performed suitably.

The gaming machine of aspect 21-2 is the gaming machine according to aspect 21-1,
In the introductory part of the specific reach (super reach effect), a special prompting character display (operation prompting character (large)) that prompts the player to take an action and suggests a more advantageous situation than the prompting character display (operation prompting character (small)) can be displayed;
The feature of this invention is that both the promotion character display (operation promotion character (small)) and the special promotion character display (operation promotion character (large)) are displayed in a manner that shows greater movement than the title display (title character) corresponding to the specific reach (super reach effect).
According to this feature, whether the promotion character display or the special promotion character display is moved more than the title display displayed in the title display part, the player can be intuitively prompted to take an action.

The gaming machine of aspect 21-3 is the gaming machine according to aspect 21-1 or 21-2,
The number of characters (3) of the promotion character display (operation promotion character (small)) is less than the number of characters (7 to 13) of the title display (title characters).
According to this feature, since the number of characters in the promotional text display is smaller than the number of characters in the title display, the content of the text can be recognized even if the text is moved widely.

[Mode 22]
The gaming machine of form 22-1 is
A gaming machine (pachinko gaming machine 1) that can be controlled to a favorable state (jackpot gaming state) that is advantageous to a player by executing a variable display of specific identification information (first special chart, second special chart) and deriving a specific display result (a special chart display result of "jackpot") as a result of the variable display of the specific identification information,
A game control means (a game control microcomputer 100);
A performance control means (performance control CPU 120);
A display means (image display device 5);
A plurality of light emitting means (frame LEDs LWL1 to LWL12, frame LEDs LWR2 to LWR12, logo LEDs LL1 to LL4, decorative LEDs LS1 to LS5, and attacca lamps LA1 to LA4);
A light emission control means (performance control CPU 120);
The game control means (game control microcomputer 100)
When the game medium (game ball) enters the start area (first start winning hole, second start winning hole), it is determined whether or not the game medium is controlled to the advantageous state (jackpot game state);
Execute variable display of the specific identification information (first special chart, second special chart),
Based on the result of the judgment, a fluctuation pattern is determined from among a plurality of fluctuation patterns including a first fluctuation pattern (jackpot fluctuation pattern) which is a fluctuation pattern controlled to the advantageous state, and a second fluctuation pattern (miss fluctuation pattern) which is a fluctuation pattern not controlled to the advantageous state;
When the first fluctuation pattern is determined, a first command (a fluctuation pattern designation command for designating a jackpot fluctuation pattern) is transmitted to the performance control means;
When the second variation pattern is determined, a second command (a variation pattern designation command for designating a miss variation pattern) is transmitted to the performance control means;
The performance control means (performance control CPU 120)
When the first command is received, it is possible to notify that the game will be controlled to the advantageous state (jackpot game state) in a specific reach (super reach effect),
When the second command is received, it is possible to notify that the specific reach (super reach effect) is not controlled to the advantageous state (jackpot game state),
The specific reach (super reach effect) is configured to include a title display part that displays a title display (title characters) corresponding to the specific reach, and an introduction part until the result of the control of the advantageous state is notified,
The display means (image display device 5)
When the first command is received, it is possible to notify that the game will be controlled to the advantageous state (jackpot game state) in a specific reach (super reach effect),
When the second command is received, it is possible to notify that the specific reach (super reach effect) is not controlled to the advantageous state (jackpot game state),
The specific reach (super reach effect) is configured to include a title display part that displays a title display (title characters) corresponding to the specific reach, and an introduction part until the result of the control of the advantageous state is notified,
The display means (image display device 5)
A display that is different from the title display (title characters) corresponding to the specific reach (super reach effect) and that explains the content of the specific reach (explanatory characters) can be displayed.
The explanatory character display (explanatory character) is displayed in a manner with greater movement than the title display (title character) corresponding to the specific reach (super reach effect),
The light emission control means (performance control CPU 120)
Controlling the light emitting means using a luminance data table configured with luminance data;
In the title display part, the light emitting means is controlled using a brightness data table for title display (a weak reach common title, a strong reach common title, and a high base reach common title);
In the introduction part, the light emitting means is controlled using a brightness data table for the introduction part (introduction of weak reach A of weak reach system, introduction of weak reach B of weak reach system, introduction of strong reach A of strong reach system, introduction of strong reach B of strong reach system, introduction of strong reach C of strong reach system, introduction of reach A of high base reach system, introduction of reach B of high base reach system, introduction of reach C of high base reach system, introduction of reach D of high base reach system).
According to this feature, the explanatory text display that is additionally displayed is displayed in a manner that has greater movement than the title display, so that the fact that the explanatory text display is added in addition to the title display can be drawn to. Also, in the title display part, the light-emitting means is controlled using a luminance data table for the title display that is different from the luminance data table for the introductory part, so that the light-emitting means can be made to emit light in a suitable light-emitting mode according to the title display. As a result of these, the title display can be performed in a suitable manner.

The gaming machine of aspect 22-2 is the gaming machine according to aspect 22-1,
The explanatory text display (explanatory text) is characterized in that it contains content that suggests that the specific reach (super reach effect) is advantageous.
According to this feature, it is possible to draw more attention to the fact that the explanatory text display has been added.

[Mode 23]
The gaming machine of form 23-1 is
A gaming machine (pachinko gaming machine 1) that can be controlled to a favorable state (jackpot gaming state) that is advantageous to a player by executing a variable display of specific identification information (first special chart, second special chart) and deriving a specific display result (a special chart display result of "jackpot") as a result of the variable display of the specific identification information,
A game control means (a game control microcomputer 100);
A performance control means (performance control CPU 120);
A display means (image display device 5);
A plurality of light emitting means (frame LEDs LWL1 to LWL12, frame LEDs LWR2 to LWR12, logo LEDs LL1 to LL4, decorative LEDs LS1 to LS5, and attacca lamps LA1 to LA4);
A light emission control means (performance control CPU 120);
The game control means (game control microcomputer 100)
When the game medium (game ball) enters the start area (first start winning hole, second start winning hole), it is determined whether or not the game medium is controlled to the advantageous state (jackpot game state);
Execute variable display of the specific identification information (first special chart, second special chart),
Based on the result of the judgment, a first fluctuation pattern (PB1-JA, PB1-JB) which is a fluctuation pattern controlled to the advantageous state, a second fluctuation pattern (PA2-2, PA2-3) which is a fluctuation pattern not controlled to the advantageous state, a third fluctuation pattern (PB1-2 to PB1-10) which is a fluctuation pattern controlled to the advantageous state, and a fourth fluctuation pattern (PA2-4 to 12) which is a fluctuation pattern not controlled to the advantageous state are selected from a plurality of fluctuation patterns;
When the first variation pattern is determined, a first command (a variation pattern designation command designating PB1-JA and PB1-JB) is transmitted to the performance control means;
When the second variation pattern is determined, a second command (a variation pattern designation command designating PA2-2 and PA2-3) is transmitted to the performance control means;
When the third variation pattern is determined, a third command (a variation pattern designation command designating PB1-2 to PB1-10) is transmitted to the performance control means;
When the fourth variation pattern is determined, a fourth command (a variation pattern designation command designating PA2-4 to PA2-12) is transmitted to the performance control means;
The performance control means (performance control CPU 120)
When the first command is received, it is possible to notify that the first reach (low base weak reach A, B performance) will be controlled to the advantageous state (jackpot game state),
When the second command is received, it is possible to notify that the first reach (low base weak reach A, B performance) is not controlled to the advantageous state (jackpot game state),
When the third command is received, it is possible to notify that the game will be controlled to the advantageous state (jackpot game state) in the second reach (low base strong reach A to C performance),
When the fourth command is received, it is possible to notify that the second reach (low base strong reach A to C performance) is not controlled to the advantageous state (jackpot game state),
The first reach (low base weak reach A, B performance) is configured to include a title display part that displays a title display (title character) corresponding to the first reach, and an introduction part until the result of the advantageous state is notified,
The second reach (low base strong reach A to C performance) is configured to include a title display part that displays a title display (title character) corresponding to the second reach, and an introduction part until the result of the advantageous state is notified,
The second reach (low base strong reach A to C performance) has a higher expectation of being controlled to the advantageous state than the first reach (low base weak reach A, B performance),
The display means (image display device 5)
The title display (title characters) corresponding to the second reach (low base strong reach A to C performance) is displayed in a larger font size than the title display (title characters) corresponding to the first reach (low base weak reach A, B performance);
The light emission control means (performance control CPU 120)
Controlling the light emitting means using a luminance data table configured with luminance data;
In the title display part in the first reach (low base weak reach A, B performance), the light emitting means is controlled using a brightness data table (weak reach common title) for the title display part of the first reach,
In the title display part in the second reach (low base strong reach A to C performance), the light emitting means is controlled using a brightness data table (common title for strong reach) for the title display part of the second reach,
In the introduction part of the first reach (low base weak reach A, B performance), the light emitting means is controlled using a brightness data table (weak reach system weak reach A introduction, weak reach system weak reach B introduction) for the introduction part of the first reach,
In the introductory part of the second reach (low base strong reach A to C performance), the light emitting means is controlled using a brightness data table (strong reach system strong reach A introduction, strong reach system strong reach B introduction, strong reach system strong reach C introduction) for the introductory part of the second reach.
According to this feature, the title display corresponding to the second reach, which has a relatively high expectation, is displayed in a larger font size than the title display corresponding to the first reach, which has a relatively low expectation, so that the title display alone can make the player intuitively recognize that the second reach has a higher expectation than the first reach. Also, in the title display part in the first reach and the second reach, the light-emitting means is controlled using a brightness data table for the title display of the first reach and the second reach, which is different from the brightness data table for the introductory part of the first reach and the second reach, so that the light-emitting means can be made to emit light in a suitable light-emitting mode according to the title display. As a result of these, the title display can be performed in a suitable manner.

The gaming machine of aspect 23-2 is the gaming machine according to aspect 23-1,
The number of characters (10) constituting the title display (title characters) corresponding to the first reach (low base weak reach A, B effect) is greater than the number of characters (7, 8) constituting the title display (title characters) corresponding to the second reach (low base strong reach B, C effect), but the display area (display area size) of the title display (title characters) corresponding to the second reach (low base strong reach B, C effect) is larger than the display area (display area size) of the title display (title characters) corresponding to the first reach (low base weak reach A, B effect).
According to this feature, the title display corresponding to the second reach occupies a larger display area per character, so that the player can intuitively recognize that the second reach has a higher expectation than the first reach.

[Form 24]
The gaming machine of form 24-1 is
A gaming machine (pachinko gaming machine 1) that can be controlled to a favorable state (jackpot gaming state) that is advantageous to a player by executing a variable display of specific identification information (first special chart, second special chart) and deriving a specific display result (a special chart display result of "jackpot") as a result of the variable display of the specific identification information,
A game control means (a game control microcomputer 100);
A performance control means (performance control CPU 120);
A display means (image display device 5);
A plurality of light emitting means (frame LEDs LWL1 to LWL12, frame LEDs LWR2 to LWR12, logo LEDs LL1 to LL4, decorative LEDs LS1 to LS5, and attacca lamps LA1 to LA4);
A light emission control means (performance control CPU 120);
The game control means (game control microcomputer 100)
When the game medium (game ball) enters the start area (first start winning hole, second start winning hole), it is determined whether or not the game medium is controlled to the advantageous state (jackpot game state);
Execute variable display of the specific identification information (first special chart, second special chart),
Based on the result of the judgment, a fluctuation pattern is determined from among a plurality of fluctuation patterns including a first fluctuation pattern (jackpot fluctuation pattern) which is a fluctuation pattern controlled to the advantageous state, and a second fluctuation pattern (miss fluctuation pattern) which is a fluctuation pattern not controlled to the advantageous state;
When the first fluctuation pattern is determined, a first command (a fluctuation pattern designation command for designating a jackpot fluctuation pattern) is transmitted to the performance control means;
When the second variation pattern is determined, a second command (a variation pattern designation command for designating a miss variation pattern) is transmitted to the performance control means;
The performance control means (performance control CPU 120)
When the first command is received, it is possible to notify that the game will be controlled to the advantageous state (jackpot game state) in a specific reach (super reach effect),
When the second command is received, it is possible to notify that the specific reach (super reach effect) is not controlled to the advantageous state (jackpot game state),
The specific reach (super reach effect) is configured to include a title display part that displays a title display (title characters) corresponding to the specific reach, and an introduction part until the result of the control of the advantageous state is notified,
The title display (title characters) corresponding to the specific reach (super reach effect) is composed of multiple characters,
The display means (image display device 5)
It is possible to display a variable display of decorative identification information (decorative pattern) corresponding to the variable display of the specific identification information (first special pattern, second special pattern),
The decoration identification information (decorative pattern (large)) of a first size is displayed in a reach state before a title display part in the specific reach (super reach effect), and then the decoration identification information (decorative pattern (small)) of a second size smaller than the first size is displayed in a reach state;
At least one character of the title display (title character) corresponding to the specific reach (super reach effect) is displayed in a size larger than the second size (decorative pattern (small));
The light emission control means (performance control CPU 120)
Controlling the light emitting means using a luminance data table configured with luminance data;
In the title display part, the light emitting means is controlled using a brightness data table for title display (a weak reach common title, a strong reach common title, and a high base reach common title);
In the introduction part, the light emitting means is controlled using a brightness data table for the introduction part (introduction of weak reach A of weak reach system, introduction of weak reach B of weak reach system, introduction of strong reach A of strong reach system, introduction of strong reach B of strong reach system, introduction of strong reach C of strong reach system, introduction of reach A of high base reach system, introduction of reach B of high base reach system, introduction of reach C of high base reach system, introduction of reach D of high base reach system).
According to this feature, at least one character of the title display corresponding to the specific reach is displayed in a size larger than the decoration identification information reduced to the second size, so that the title display can be focused on in the title display part. Also, in the title display part, the light-emitting means is controlled using a brightness data table for the title display that is different from the brightness data table for the introduction part, so that the light-emitting means can be made to emit light in a suitable light-emitting mode according to the title display. As a result of these, the title display can be performed in a suitable manner.

The gaming machine of aspect 24-2 is the gaming machine according to aspect 24-1,
The present invention is characterized in that all characters of the title display (title characters) corresponding to the specific reach (super reach performance) are displayed in a size smaller than the first size (decorative pattern (large)) and larger than the second size (decorative pattern (small)).
According to this feature, the decorative identification information when a reach state is reached can be reliably recognized, and thereafter, the decorative identification information is reduced in size and each character that makes up the title display is displayed at a size larger than the decorative identification information, thereby drawing attention to the title display in the title display part.

[Form 25]
The gaming machine of form 25-1 is
A gaming machine (pachinko gaming machine 1) that can be controlled to a favorable state (jackpot gaming state) that is advantageous to a player by executing a variable display of specific identification information (first special chart, second special chart) and deriving a specific display result (a special chart display result of "jackpot") as a result of the variable display of the specific identification information,
A game control means (a game control microcomputer 100);
A performance control means (performance control CPU 120);
A display means (image display device 5);
A plurality of light emitting means (frame LEDs LWL1 to LWL12, frame LEDs LWR2 to LWR12, logo LEDs LL1 to LL4, decorative LEDs LS1 to LS5, and attacca lamps LA1 to LA4);
A light emission control means (performance control CPU 120);
The game control means (game control microcomputer 100)
When the game medium (game ball) enters the start area (first start winning hole, second start winning hole), it is determined whether or not the game medium is controlled to the advantageous state (jackpot game state);
Execute variable display of the specific identification information (first special chart, second special chart),
Based on the result of the judgment, a fluctuation pattern is determined from among a plurality of fluctuation patterns including a first fluctuation pattern (jackpot fluctuation pattern) which is a fluctuation pattern controlled to the advantageous state, and a second fluctuation pattern (miss fluctuation pattern) which is a fluctuation pattern not controlled to the advantageous state;
When the first fluctuation pattern is determined, a first command (a fluctuation pattern designation command for designating a jackpot fluctuation pattern) is transmitted to the performance control means;
When the second variation pattern is determined, a second command (a variation pattern designation command for designating a miss variation pattern) is transmitted to the performance control means;
The performance control means (performance control CPU 120)
When the first command is received, it is possible to notify that the game will be controlled to the advantageous state (jackpot game state) in a specific reach (super reach effect),
When the second command is received, it is possible to notify that the specific reach (super reach effect) is not controlled to the advantageous state (jackpot game state),
The specific reach (super reach effect) is configured to include a title display part that displays a title display (title characters) corresponding to the specific reach, and an introduction part until the result of the control of the advantageous state is notified,
The display means (image display device 5)
In the introductory part (operation prompting performance B, D) of the specific reach (super reach performance), a prompting character display (operation prompting character (small)) for prompting the player to take an action can be displayed.
After it is notified that the specific reach (super reach effect) will control the game to the advantageous state, a name display of the advantageous state (title character of the big win start effect) corresponding to the controlled advantageous state can be displayed.
The advantageous state name display (title character of the big win start performance) is displayed larger than the promotion character display (operation promotion character (small)),
The light emission control means (performance control CPU 120)
Controlling the light emitting means using a luminance data table configured with luminance data;
In the title display part, the light emitting means is controlled using a brightness data table for title display (a weak reach common title, a strong reach common title, and a high base reach common title);
In the introduction part, the light emitting means is controlled using a brightness data table for the introduction part (introduction of weak reach A of weak reach system, introduction of weak reach B of weak reach system, introduction of strong reach A of strong reach system, introduction of strong reach B of strong reach system, introduction of strong reach C of strong reach system, introduction of reach A of high base reach system, introduction of reach B of high base reach system, introduction of reach C of high base reach system, introduction of reach D of high base reach system).
According to this feature, in a specific reach, the situation in which the promotion character display is performed is a situation in which it is not yet known whether or not the game will be controlled to an advantageous state, whereas the situation in which the advantageous state name display is performed is a situation in which it has already been announced that the game will be controlled to an advantageous state, and the advantageous state name display is displayed larger than the promotion character display to congratulate the game being controlled to an advantageous state. Also, in the title display part, the light-emitting means is controlled using a brightness data table for the title display that is different from the brightness data table for the introduction part, so that the light-emitting means can be made to emit light in a suitable light-emitting mode according to the title display, and as a result, the title display can be performed suitably.

The gaming machine of aspect 25-2 is the gaming machine according to aspect 25-1,
The advantageous state name display (title character of the big win start performance) is composed of a first character string ("BIG" or "REGULAR") and a second character string ("BONUS");
The first character string ("BIG" or "REGULAR") is displayed in the first position (the upper fixed position), and then the second character string ("BONUS") is displayed in the second position (the lower fixed position);
After the second character string ("BONUS") is displayed at the second position (lower fixed position), the first character string ("BIG" or "REGULAR") displayed at the first position (upper fixed position) and the second character string ("BONUS") displayed at the second position (lower fixed position) are gradually enlarged and displayed.
The first character string ("BIG" or "REGULAR") and the second character string ("BONUS") are displayed in the smallest character size when displayed at the first position (top of the fixed position) and the second position (bottom of the fixed position),
The size of the characters when the first character string ("BIG" or "REGULAR") and the second character string ("BONUS") are displayed in the first position (upper fixed position) and the second position (lower fixed position) is larger than the size of the characters constituting the promotion character display (operation promotion character (small)).
According to this feature, the characters constituting the advantageous state name display are always displayed larger than the characters constituting the promotion character display, so that being controlled in an advantageous state can be more congratulated.

The gaming machine of aspect 25-3 is the gaming machine of aspect 25-1 or 25-2,
The smallest character among the characters constituting the advantageous state name display (title characters of the jackpot start performance) is larger than the largest character among the characters constituting the promotion character display (operation promotion character (small)).
According to this feature, the smallest character among the characters constituting the advantageous state name display is displayed larger than the largest character among the characters constituting the promotion character display, so that no matter which character you focus on, the advantageous state name display is displayed larger than the promotion character display, making it possible to more congratulate yourself on being controlled into the advantageous state.

The gaming machine of aspect 25-4 is the gaming machine according to any one of aspects 25-1 to 25-3,
A special prompting character display (operation prompting character (large)) that suggests a more favorable situation than the prompting character display (operation prompting character (small)) can be displayed;
The special prompt character display (operation prompt character (large)) is characterized by being displayed larger than the advantageous state name display (title character of the big win start performance).
According to this feature, the special promotion character display, which suggests a more advantageous situation than the promotion character display, is displayed larger than the advantageous state name display, thereby allowing the player to sense the advantageous situation.

The gaming machine of aspect 25-5 is the gaming machine according to aspect 25-4,
The smallest character among the character strings constituting the special promotion character display (operation promotion character (large)) is characterized in that it is larger than the largest character among the character strings constituting the advantageous state name display (title character of the jackpot start performance).
According to this feature, the smallest character among the characters constituting the special promotion character display is displayed larger than the largest character among the characters constituting the advantageous state name display, so that no matter which character the player focuses on, the special promotion character display is displayed larger than the advantageous state name display, allowing the player to sense the advantageous situation.

[Form 26]
The gaming machine of form 26-1 is
A gaming machine (pachinko gaming machine 1) that can be controlled to a favorable state (jackpot gaming state) that is advantageous to a player by executing a variable display of specific identification information (first special chart, second special chart) and deriving a specific display result (a special chart display result of "jackpot") as a result of the variable display of the specific identification information,
A game control means (a game control microcomputer 100);
A performance control means (performance control CPU 120);
A display means (image display device 5);
A plurality of light emitting means (frame LEDs LWL1 to LWL12, frame LEDs LWR2 to LWR12, logo LEDs LL1 to LL4, decorative LEDs LS1 to LS5, and attacca lamps LA1 to LA4);
A light emission control means (performance control CPU 120);
The game control means (game control microcomputer 100)
When the game medium (game ball) enters the start area (first start winning hole, second start winning hole), it is determined whether or not the game medium is controlled to the advantageous state (jackpot game state);
Execute variable display of the specific identification information (first special chart, second special chart),
Based on the result of the judgment, a fluctuation pattern is determined from among a plurality of fluctuation patterns including a first fluctuation pattern (jackpot fluctuation pattern) which is a fluctuation pattern controlled to the advantageous state, and a second fluctuation pattern (miss fluctuation pattern) which is a fluctuation pattern not controlled to the advantageous state;
When the first fluctuation pattern is determined, a first command (a fluctuation pattern designation command for designating a jackpot fluctuation pattern) is transmitted to the performance control means;
When the second variation pattern is determined, a second command (a variation pattern designation command for designating a miss variation pattern) is transmitted to the performance control means;
The performance control means (performance control CPU 120)
When the first command is received, it is possible to notify that the game will be controlled to the advantageous state (jackpot game state) in a specific reach (super reach effect),
When the second command is received, it is possible to notify that the specific reach (super reach effect) is not controlled to the advantageous state (jackpot game state),
The specific reach (super reach effect) is configured to include a title display part that displays a title display (title characters) corresponding to the specific reach, and an introduction part until the result of the control of the advantageous state is notified,
The display means (image display device 5)
After it is notified that the specific reach (super reach effect) will control the game to the advantageous state, a name display of the advantageous state (title character of the big win start effect) corresponding to the controlled advantageous state can be displayed.
The advantageous state name display (title characters of the big win start performance) is displayed larger than the title display (title characters) corresponding to the specific reach (super reach performance),
The light emission control means (performance control CPU 120)
Controlling the light emitting means using a luminance data table configured with luminance data;
In the title display part, the light emitting means is controlled using a brightness data table for title display (a weak reach common title, a strong reach common title, and a high base reach common title);
In the introduction part, the light emitting means is controlled using a brightness data table for the introduction part (introduction of weak reach A of weak reach system, introduction of weak reach B of weak reach system, introduction of strong reach A of strong reach system, introduction of strong reach B of strong reach system, introduction of strong reach C of strong reach system, introduction of reach A of high base reach system, introduction of reach B of high base reach system, introduction of reach C of high base reach system, introduction of reach D of high base reach system).
According to this feature, in a specific reach, the situation in which the title display is performed is one in which it is not yet clear whether or not the game will be controlled to an advantageous state, whereas the situation in which the advantageous state name display is performed is one in which it has already been announced that the game will be controlled to an advantageous state, and the advantageous state name display is displayed larger than the title display to congratulate the game being controlled to an advantageous state. Also, in the title display part, the light-emitting means is controlled using a brightness data table for the title display that is different from the brightness data table for the introduction part, so that the light-emitting means can be made to emit light in a suitable light-emitting mode according to the title display, and as a result, the title display can be performed in a suitable manner.

The gaming machine of aspect 26-2 is the gaming machine according to aspect 26-1,
The specific reach (super reach effect) includes a plurality of types of specific reaches having different title displays (title characters),
The advantageous state name display (title characters of the big win start performance) is characterized by being displayed larger than the title display (title characters) corresponding to any type of specific reach (super reach performance).
According to this feature, the advantageous state name display is displayed larger than the title display corresponding to any type of specific reach, thereby making it possible to celebrate being controlled into an advantageous state.

The gaming machine of aspect 26-3 is the gaming machine according to aspect 26-2,
The smallest character among the character strings constituting the advantageous state name display (title character of the jackpot start performance) is characterized in that it is larger than the largest character among the character strings constituting the title display (title character) corresponding to any type of specific reach (super reach performance).
According to this feature, the smallest character among the characters constituting the advantageous state name display is displayed larger than the largest character among the characters constituting the title display corresponding to any type of specific reach, so that no matter which character you focus on, the advantageous state name display is displayed larger than the title display corresponding to the specific reach, making it possible to more fully celebrate being controlled into an advantageous state.

[Mode 27]
The gaming machine of form 27-1 is
A gaming machine (pachinko gaming machine 1) that can be controlled to a favorable state (jackpot gaming state) that is advantageous to a player by executing a variable display of specific identification information (first special chart, second special chart) and deriving a specific display result (a special chart display result of "jackpot") as a result of the variable display of the specific identification information,
A game control means (a game control microcomputer 100);
A performance control means (performance control CPU 120);
A display means (image display device 5);
A plurality of light emitting means (frame LEDs LWL1 to LWL12, frame LEDs LWR2 to LWR12, logo LEDs LL1 to LL4, decorative LEDs LS1 to LS5, and attacca lamps LA1 to LA4);
A light emission control means (performance control CPU 120);
The game control means (game control microcomputer 100)
When the game medium (game ball) enters the start area (first start winning hole, second start winning hole), it is determined whether or not the game medium is controlled to the advantageous state (jackpot game state);
Execute variable display of the specific identification information (first special chart, second special chart),
Based on the result of the judgment, a first fluctuation pattern (PB1-JA, PB1-JB) which is a fluctuation pattern controlled to the advantageous state, and a second fluctuation pattern (PA2-2, PA2-3) which is a fluctuation pattern not controlled to the advantageous state are selected from a plurality of fluctuation patterns;
When the first variation pattern is determined, a first command (a variation pattern designation command designating (PA2-2, PA2-3)) is transmitted to the performance control means;
When the second variation pattern is determined, a second command (a variation pattern designation command designating PA2-2 and PA2-3) is transmitted to the performance control means;
The performance control means (performance control CPU 120)
When the first command is received, it is possible to notify that the game will be controlled to the advantageous state (jackpot game state) in a specific reach (low base weak reach A, B performance),
When the second command is received, it is possible to notify that the specific reach (low base weak reach A, B performance) is not controlled to the advantageous state (jackpot game state),
The specific reach (low base weak reach A, B performance) is configured to include a title display part that displays a title display (title character) corresponding to the specific reach, and an introduction part until the result of the control of the advantageous state is notified,
The display means (image display device 5)
In the specific reach (low base weak reach A, B performance), before the title display part (operation prompt performance A), a prompting character display (operation prompt character (small)) to prompt the player to take an action can be displayed.
A title display (title character) corresponding to the specific reach (low base weak reach A, B performance) is displayed larger than the promotion character display (operation promotion character (small)),
The light emission control means (performance control CPU 120)
Controlling the light emitting means using a luminance data table configured with luminance data;
In the title display part, the light emitting means is controlled using a brightness data table for title display (weak reach common titles);
In the introductory part, the light emitting means is controlled using a brightness data table for the introductory part (weak reach system weak reach A introduction, weak reach system weak reach B introduction).
According to this feature, the promotional text display is displayed before the title display part, and the title display to be displayed thereafter is displayed larger than the promotional text display, thereby drawing attention to the title display. In addition, in the title display part, the light-emitting means is controlled using a luminance data table for the title display, which is different from the luminance data table for the introduction part, so that the light-emitting means can be made to emit light in a suitable light-emitting mode according to the title display, and as a result, the title display can be performed in a suitable manner.

The gaming machine of aspect 27-2 is the gaming machine according to aspect 27-1,
After the prompting character display (operation prompting character (small)) is displayed, the specific reach (low base weak reach A, B performance) develops and the title display part in the specific reach starts.
According to this feature, the promotional text display is displayed before the title display part in a series of flows, and the title display to be displayed thereafter is displayed larger than the promotional text display, thereby drawing attention to the title display.

The gaming machine of aspect 27-3 is the gaming machine according to aspect 27-1 or 27-2,
The smallest character among the character strings constituting the title display (title character) corresponding to the specific reach (low base weak reach A, B performance) is larger than the largest character among the character strings constituting the promotion character display (operation promotion character (small)).
According to this feature, the smallest character among the characters constituting the title display corresponding to the specific reach is displayed larger than the largest character among the characters constituting the promotion character display, so that the title display can be focused on regardless of which character is focused on.

[Mode 28]
The gaming machine of form 28-1 is
A gaming machine (pachinko gaming machine 1) that can be controlled to a favorable state (jackpot gaming state) that is advantageous to a player by executing a variable display of specific identification information (first special chart, second special chart) and deriving a specific display result (a special chart display result of "jackpot") as a result of the variable display of the specific identification information,
A game control means (a game control microcomputer 100);
A performance control means (performance control CPU 120);
A display means (image display device 5);
A plurality of light emitting means (frame LEDs LWL1 to LWL12, frame LEDs LWR2 to LWR12, logo LEDs LL1 to LL4, decorative LEDs LS1 to LS5, and attacca lamps LA1 to LA4);
A light emission control means (performance control CPU 120);
The game control means (game control microcomputer 100)
When the game medium (game ball) enters the start area (first start winning hole, second start winning hole), it is determined whether or not the game medium is controlled to the advantageous state (jackpot game state);
Execute variable display of the specific identification information (first special chart, second special chart),
Based on the result of the judgment, a first fluctuation pattern (PB1-JA, PB1-JB) which is a fluctuation pattern controlled to the advantageous state, and a second fluctuation pattern (PA2-2, PA2-3) which is a fluctuation pattern not controlled to the advantageous state are selected from a plurality of fluctuation patterns;
When the first variation pattern is determined, a first command (a variation pattern designation command designating (PA2-2, PA2-3)) is transmitted to the performance control means;
When the second variation pattern is determined, a second command (a variation pattern designation command designating PA2-2 and PA2-3) is transmitted to the performance control means;
The performance control means (performance control CPU 120)
When the first command is received, it is possible to notify that the game will be controlled to the advantageous state (jackpot game state) in a specific reach (low base weak reach A, B performance),
When the second command is received, it is possible to notify that the specific reach (low base weak reach A, B performance) is not controlled to the advantageous state (jackpot game state),
The specific reach (low base weak reach A, B performance) is configured to include a title display part that displays a title display (title character) corresponding to the specific reach, and an introduction part until the result of the control of the advantageous state is notified,
The display means (image display device 5)
Before the title display part in the specific reach (low base weak reach A, B performance) (operation prompt performance A), a prompting character display (operation prompt character (small)) to prompt the player to take an action can be displayed.
After it is notified that the specific reach (low base weak reach A, B performance) will control the game to the advantageous state, a display of the advantageous state name (title character of the jackpot start performance) corresponding to the controlled advantageous state can be displayed.
The advantageous state name display (title characters of the big win start performance) is displayed larger than the title display (title characters) corresponding to the specific reach (low base weak reach A, B performance),
A title display (title character) corresponding to the specific reach (low base weak reach A, B performance) is displayed larger than the promotion character display (operation promotion character (small)),
The light emission control means (performance control CPU 120)
Controlling the light emitting means using a luminance data table configured with luminance data;
In the title display part, the light emitting means is controlled using a brightness data table for title display (weak reach common titles);
In the introductory part, the light emitting means is controlled using a brightness data table for the introductory part (weak reach system weak reach A introduction, weak reach system weak reach B introduction).
According to this feature, in a specific reach, the situation in which the title display is performed is a situation in which it is not yet clear whether or not the game will be controlled to an advantageous state, whereas the situation in which the advantageous state name display is performed is a situation after it has already been notified that the game will be controlled to an advantageous state, and the advantageous state name display is displayed larger than the title display, so that the game can be celebrated for being controlled to an advantageous state. Also, a promotional character display is displayed before the title display part, and the title display that is displayed thereafter is displayed larger than the promotional character display, so that the title display can be drawn to attention. Also, in the title display part, the light-emitting means is controlled using a brightness data table for the title display that is different from the brightness data table for the introduction part, so that the light-emitting means can be illuminated in a suitable light-emitting mode according to the title display, and as a result, the title display can be displayed in a suitable manner.

The gaming machine of aspect 28-2 is the gaming machine according to aspect 28-1,
After the prompting character display (operation prompting character (small)) is displayed, the specific reach (low base weak reach A, B performance) is developed, the title display part in the specific reach starts, and after it is notified that the specific reach (low base weak reach A, B performance) will control the advantageous state, the advantageous state name display (title character of the jackpot start performance) is displayed.
According to this feature, a promotional text display is displayed before the title display part in a series of events, and the title display that is displayed afterwards is displayed larger than the promotional text display, thereby drawing attention to the title display, and then, after it is announced that a specific reach has resulted in control into an advantageous state, a display of the advantageous state name is displayed larger than the title display, allowing the player to celebrate being controlled into the advantageous state.

[Mode 29]
The gaming machine of form 29-1 is
A gaming machine (pachinko gaming machine 1) that can be controlled to a favorable state (jackpot gaming state) that is advantageous to a player by executing a variable display of specific identification information (first special chart, second special chart) and deriving a specific display result (a special chart display result of "jackpot") as a result of the variable display of the specific identification information,
A game control means (a game control microcomputer 100);
A performance control means (performance control CPU 120);
A display means (image display device 5);
A plurality of light emitting means (frame LEDs LWL1 to LWL12, frame LEDs LWR2 to LWR12, logo LEDs LL1 to LL4, decorative LEDs LS1 to LS5, and attacca lamps LA1 to LA4);
A light emission control means (performance control CPU 120);
The game control means (game control microcomputer 100)
When the game medium (game ball) enters the start area (first start winning hole, second start winning hole), it is determined whether or not the game medium is controlled to the advantageous state (jackpot game state);
Execute variable display of the specific identification information (first special chart, second special chart),
Based on the result of the judgment, a fluctuation pattern is determined from among a plurality of fluctuation patterns including a first fluctuation pattern (jackpot fluctuation pattern) which is a fluctuation pattern controlled to the advantageous state, and a second fluctuation pattern (miss fluctuation pattern) which is a fluctuation pattern not controlled to the advantageous state;
When the first fluctuation pattern is determined, a first command (a fluctuation pattern designation command for designating a jackpot fluctuation pattern) is transmitted to the performance control means;
When the second variation pattern is determined, a second command (a variation pattern designation command for designating a miss variation pattern) is transmitted to the performance control means;
The performance control means (performance control CPU 120)
When the first command is received, it is possible to notify that the game will be controlled to the advantageous state (jackpot game state) in a specific reach (super reach effect),
When the second command is received, it is possible to notify that the specific reach (super reach effect) is not controlled to the advantageous state (jackpot game state),
The specific reach (super reach effect) is configured to include a title display part that displays a title display (title characters) corresponding to the specific reach, and an introduction part until the result of the control of the advantageous state is notified,
The display means (image display device 5)
After it is notified that the specific reach (super reach effect) will control the game to the advantageous state, a name display of the advantageous state (title character of the big win start effect) corresponding to the controlled advantageous state can be displayed.
The advantageous state name display (title characters of the big win start performance) is displayed for a longer time than the title display (title characters) corresponding to the specific reach (super reach performance),
The light emission control means (performance control CPU 120)
Controlling the light emitting means using a luminance data table configured with luminance data;
In the title display part, the light emitting means is controlled using a brightness data table for title display (a weak reach common title, a strong reach common title, and a high base reach common title);
In the introduction part, the light emitting means is controlled using a brightness data table for the introduction part (introduction of weak reach A of weak reach system, introduction of weak reach B of weak reach system, introduction of strong reach A of strong reach system, introduction of strong reach B of strong reach system, introduction of strong reach C of strong reach system, introduction of reach A of high base reach system, introduction of reach B of high base reach system, introduction of reach C of high base reach system, introduction of reach D of high base reach system).
According to this feature, in a specific reach, the situation in which the title display is performed is one in which it is not yet clear whether or not the game will be controlled to an advantageous state, whereas the situation in which the advantageous state name display is performed is one in which it has already been announced that the game will be controlled to an advantageous state, and by displaying the advantageous state name display for a longer period of time than the title display, it is possible to celebrate the game being controlled to an advantageous state. Also, in the title display part, the light-emitting means is controlled using a brightness data table for the title display that is different from the brightness data table for the introduction part, so that the light-emitting means can be made to emit light in a suitable light-emitting mode according to the title display, and as a result, the title display can be performed in a suitable manner.

The gaming machine of aspect 29-2 is the gaming machine according to aspect 29-1,
The time from when the character string constituting the advantageous state name display (title characters of the jackpot start performance) is all displayed to when at least a part of the character string is no longer displayed is longer than the time from when a part of the character string constituting the title display (title characters) corresponding to the specific reach (super reach performance) is displayed to when the whole of the character string is no longer displayed.
According to this feature, the time during which the congratulatory advantageous state name display is clearly visible is made longer than the time during which the title display, the purpose of which is to encourage the possibility of control over the advantageous state, is displayed, thereby giving the player a sense of satisfaction.

The gaming machine of aspect 29-3 is the gaming machine of aspect 29-1 or 28-2,
After the advantageous state name display (title characters of the jackpot start performance) is displayed, the advantageous state name display is switched to an operation suggestion display (right hit promotion image (small) and right hit promotion image (large)) suggesting an operation method during the advantageous state, and after a predetermined period of time has elapsed since the switch to the operation suggestion display, control is performed to gain an advantage by operating the operation method suggested by the operation suggestion display (operation method for shooting the game ball toward the right game area 2R),
The time required to switch from the advantageous state name display (title letters of the jackpot start effect) to the operation suggestion display (right hit promotion image (small) and right hit promotion image (large)) is shorter than the time required to end the title display (title letters) corresponding to the specific reach (super reach effect).
According to this feature, the advantageous state name display is switched to the operation suggestion display in a short time, and then after a predetermined period of time has elapsed, control is performed to give an advantage by operating in the operation method suggested by the operation suggestion display, thereby preventing the player from being disadvantaged by changing the operation method during the period when the advantageous state name display is ended.

[Form 30]
The gaming machine of form 30-1 is
A gaming machine (pachinko gaming machine 1) that can be controlled to a favorable state (jackpot gaming state) that is advantageous to a player by executing a variable display of specific identification information (first special chart, second special chart) and deriving a specific display result (a special chart display result of "jackpot") as a result of the variable display of the specific identification information,
A game control means (a game control microcomputer 100);
A performance control means (performance control CPU 120);
A display means (image display device 5);
A plurality of light emitting means (frame LEDs LWL1 to LWL12, frame LEDs LWR2 to LWR12, logo LEDs LL1 to LL4, decorative LEDs LS1 to LS5, and attacca lamps LA1 to LA4);
A light emission control means (performance control CPU 120);
The game control means (game control microcomputer 100)
When the game medium (game ball) enters the start area (first start winning hole, second start winning hole), it is determined whether or not the game medium is controlled to the advantageous state (jackpot game state);
Execute variable display of the specific identification information (first special chart, second special chart),
Based on the result of the judgment, a fluctuation pattern is determined from among a plurality of fluctuation patterns including a first fluctuation pattern (jackpot fluctuation pattern) which is a fluctuation pattern controlled to the advantageous state, and a second fluctuation pattern (miss fluctuation pattern) which is a fluctuation pattern not controlled to the advantageous state;
When the first fluctuation pattern is determined, a first command (a fluctuation pattern designation command for designating a jackpot fluctuation pattern) is transmitted to the performance control means;
When the second variation pattern is determined, a second command (a variation pattern designation command for designating a miss variation pattern) is transmitted to the performance control means;
The performance control means (performance control CPU 120)
When the first command is received, it is possible to notify that the game will be controlled to the advantageous state (jackpot game state) in a specific reach (super reach effect),
When the second command is received, it is possible to notify that the specific reach (super reach effect) is not controlled to the advantageous state (jackpot game state),
The specific reach (super reach effect) is configured to include a title display part that displays a title display (title characters) corresponding to the specific reach, and an introduction part until the result of the control of the advantageous state is notified,
The display means (image display device 5)
In the introductory part (operation prompting performance B, D) of the specific reach (super reach performance), a prompting character display (operation prompting character (small)) for prompting the player to take an action can be displayed.
After it is notified that the specific reach (super reach effect) will control the game to the advantageous state, a name display of the advantageous state (title character of the big win start effect) corresponding to the controlled advantageous state can be displayed.
The advantageous state name display (title character of the big win start performance) is displayed for a longer time than the promotion character display (operation promotion character (small)),
The light emission control means (performance control CPU 120)
Controlling the light emitting means using a luminance data table configured with luminance data;
In the title display part, the light emitting means is controlled using a brightness data table for title display (a weak reach common title, a strong reach common title, and a high base reach common title);
In the introduction part, the light emitting means is controlled using a brightness data table for the introduction part (introduction of weak reach A of weak reach system, introduction of weak reach B of weak reach system, introduction of strong reach A of strong reach system, introduction of strong reach B of strong reach system, introduction of strong reach C of strong reach system, introduction of reach A of high base reach system, introduction of reach B of high base reach system, introduction of reach C of high base reach system, introduction of reach D of high base reach system).
According to this feature, in a specific reach, the situation in which the promotion character display is performed is a situation in which it is not yet known whether or not the game will be controlled to an advantageous state, whereas the situation in which the advantageous state name display is performed is a situation after it has already been notified that the game will be controlled to an advantageous state, and by displaying the advantageous state name display for a longer period of time than the promotion character display, it is possible to celebrate the game being controlled to an advantageous state. Also, in the title display part, the light-emitting means is controlled using a brightness data table for the title display that is different from the brightness data table for the introduction part, so that the light-emitting means can be made to emit light in a suitable light-emitting mode according to the title display, and as a result, the title display can be performed suitably.

The gaming machine of aspect 30-2 is the gaming machine according to aspect 30-1,
The prompting character display (operation prompting character (small)) is displayed until the prompted action is performed or until the effective time for the prompted action has elapsed;
The time for which the advantageous state name display (title characters of the jackpot start performance) is displayed is characterized by being longer than the time from when the prompting character display (operation prompting character (small)) is displayed until the time during which the prompted action is not taken and the time during which the prompted action is valid has elapsed.
According to this feature, after the prompting character display is displayed, the advantageous state name display is displayed for a longer period of time than the period of time that would be displayed if the prompted action was not taken, thereby allowing the player to be congratulated for being controlled into the advantageous state.

The gaming machine of aspect 30-3 is the gaming machine according to aspect 30-1 or 30-2,
The time from when the character string constituting the advantageous state name display (title character of the jackpot start performance) is all displayed to when at least a part of the character string disappears is longer than the time when the prompt character display (operation prompt character (small)) is displayed.
According to this feature, the time for which the congratulatory advantageous state name display is clearly visible is made longer than the time for which the promotional text display intended to encourage the player to take action is displayed, thereby giving the player a sense of satisfaction.

The gaming machine of aspect 30-4 is a gaming machine according to any one of aspects 30-1 to 30-3,
A special prompting character display (operation prompting character (large)) that suggests a more favorable situation than the prompting character display (operation prompting character (small)) can be displayed;
The promotion character display (operation promotion character (small)) is a promotion character (character that encourages an operation) that is displayed without accompanying a promotion introduction display (promotion introduction performance),
The special operation prompting display (operation prompting character (large)) is a prompting introduction display (promotion introduction performance) followed by a prompting character (character encouraging an operation),
The time during which the advantageous state name display (title characters of the big win start performance) is displayed is longer than the time during which the special prompt character display (operation prompt character (large)) is displayed.
According to this feature, the time for which the advantageous state name display, which has a congratulatory meaning, is displayed is longer than the time for which the special promotion character display accompanied by the promotion introduction display is displayed, thereby giving the player a sense of satisfaction.

[Mode 31]
The gaming machine of form 31-1 is
A gaming machine (pachinko gaming machine 1) that can be controlled to a favorable state (jackpot gaming state) that is advantageous to a player by executing a variable display of specific identification information (first special chart, second special chart) and deriving a specific display result (a special chart display result of "jackpot") as a result of the variable display of the specific identification information,
A game control means (a game control microcomputer 100);
A performance control means (performance control CPU 120);
A display means (image display device 5);
A plurality of light emitting means (frame LEDs LWL1 to LWL12, frame LEDs LWR2 to LWR12, logo LEDs LL1 to LL4, decorative LEDs LS1 to LS5, and attacca lamps LA1 to LA4);
A light emission control means (performance control CPU 120);
The game control means (game control microcomputer 100)
When the game medium (game ball) enters the start area (first start winning hole, second start winning hole), it is determined whether or not the game medium is controlled to the advantageous state (jackpot game state);
Execute variable display of the specific identification information (first special chart, second special chart),
Based on the result of the judgment, a first fluctuation pattern (PB1-JA, PB1-JB) which is a fluctuation pattern controlled to the advantageous state, and a second fluctuation pattern (PA2-2, PA2-3) which is a fluctuation pattern not controlled to the advantageous state are selected from among a plurality of fluctuation patterns;
When the first variation pattern is determined, a first command (a variation pattern designation command designating (PA2-2, PA2-3)) is transmitted to the performance control means;
When the second variation pattern is determined, a second command (a variation pattern designation command designating PA2-2 and PA2-3) is transmitted to the performance control means;
The performance control means (performance control CPU 120)
When the first command is received, it is possible to notify that the game will be controlled to the advantageous state (jackpot game state) in a specific reach (low base weak reach A, B performance),
When the second command is received, it is possible to notify that the specific reach (low base weak reach A, B performance) is not controlled to the advantageous state (jackpot game state),
The specific reach (low base weak reach A, B performance) is configured to include a title display part that displays a title display (title character) corresponding to the specific reach, and an introduction part until the result of the control of the advantageous state is notified,
The display means (image display device 5)
In the specific reach (low base weak reach A, B performance), before the title display part (operation prompt performance A), a prompting character display (operation prompt character (small)) to prompt the player to take an action can be displayed.
A title display (title character) corresponding to the specific reach (low base weak reach A, B performance) is displayed for a longer time than the promotion character display (operation promotion character (small)),
The light emission control means (performance control CPU 120)
Controlling the light emitting means using a luminance data table configured with luminance data;
In the title display part, the light emitting means is controlled using a brightness data table for title display (weak reach common titles);
In the introductory part, the light emitting means is controlled using a brightness data table for the introductory part (weak reach system weak reach A introduction, weak reach system weak reach B introduction).
According to this feature, the promotional text display is displayed before the title display part, and the title display that is displayed thereafter is displayed for a longer time than the promotional text display, thereby drawing attention to the title display. Also, in the title display part, the light-emitting means is controlled using a luminance data table for the title display that is different from the luminance data table for the introduction part, so that the light-emitting means can be made to emit light in a suitable light-emitting mode according to the title display, and as a result, the title display can be performed in a suitable manner.

The gaming machine of aspect 31-2 is the gaming machine according to aspect 31-1,
The time from when the character string constituting the title display (title characters) is entirely displayed until at least a part of the character string disappears is longer than the time when the promotion character display (operation promotion character (small)) is displayed.
According to this feature, the time during which the title display is clearly visible is set to be longer than the time during which the promotion text display, the purpose of which is to encourage the player to take an action, is displayed, thereby drawing attention to the title display.

The gaming machine of aspect 31-3 is the gaming machine according to aspect 31-1 or 31-2,
A special prompting character display (operation prompting character (large)) that suggests a more favorable situation than the prompting character display (operation prompting character (small)) can be displayed;
The promotion character display (operation promotion character (small)) is a promotion character (character that encourages an operation) that is displayed without accompanying a promotion introduction display (promotion introduction performance),
The special operation prompting display (operation prompting character (large)) is a prompting introduction display (promotion introduction performance) followed by a prompting character (character encouraging an operation),
The time period during which the title display (title characters) is displayed is longer than the time period during which the special prompting character display (operation prompting character (large)) is displayed.
According to this feature, the time for which the title display is displayed is made longer than the time for which the special promotion character display accompanying the promotion introduction display is displayed, so that attention can be drawn to the title display.

[Mode 32]
The gaming machine of form 32-1 is
A gaming machine (pachinko gaming machine 1) that can be controlled to a favorable state (jackpot gaming state) that is advantageous to a player by executing a variable display of specific identification information (first special chart, second special chart) and deriving a specific display result (a special chart display result of "jackpot") as a result of the variable display of the specific identification information,
A game control means (a game control microcomputer 100);
A performance control means (performance control CPU 120);
A display means (image display device 5);
A plurality of light emitting means (frame LEDs LWL1 to LWL12, frame LEDs LWR2 to LWR12, logo LEDs LL1 to LL4, decorative LEDs LS1 to LS5, and attacca lamps LA1 to LA4);
A light emission control means (performance control CPU 120);
The game control means (game control microcomputer 100)
When the game medium (game ball) enters the start area (first start winning hole, second start winning hole), it is determined whether or not the game medium is controlled to the advantageous state (jackpot game state);
Execute variable display of the specific identification information (first special chart, second special chart),
Based on the result of the judgment, a first fluctuation pattern (PB1-JA, PB1-JB) which is a fluctuation pattern controlled to the advantageous state, and a second fluctuation pattern (PA2-2, PA2-3) which is a fluctuation pattern not controlled to the advantageous state are selected from a plurality of fluctuation patterns;
When the first variation pattern is determined, a first command (a variation pattern designation command designating (PA2-2, PA2-3)) is transmitted to the performance control means;
When the second variation pattern is determined, a second command (a variation pattern designation command designating PA2-2 and PA2-3) is transmitted to the performance control means;
The performance control means (performance control CPU 120)
When the first command is received, it is possible to notify that the game will be controlled to the advantageous state (jackpot game state) in a specific reach (low base weak reach A, B performance),
When the second command is received, it is possible to notify that the specific reach (low base weak reach A, B performance) is not controlled to the advantageous state (jackpot game state),
The specific reach (low base weak reach A, B performance) is configured to include a title display part that displays a title display (title character) corresponding to the specific reach, and an introduction part until the result of the control of the advantageous state is notified,
The display means (image display device 5)
In the specific reach (low base weak reach A, B performance), before the title display part (operation prompt performance A), a prompting character display (operation prompt character (small)) to prompt the player to take an action can be displayed.
After it is notified that the specific reach (low base weak reach A, B performance) will control the game to the advantageous state, a display of the advantageous state name (title character of the jackpot start performance) corresponding to the controlled advantageous state can be displayed.
The advantageous state name display (title characters of the jackpot start performance) is displayed for a longer time than the title display (title characters) corresponding to the specific reach (low base weak reach A, B performance),
A title display (title character) corresponding to the specific reach (low base weak reach A, B performance) is displayed for a longer time than the promotion character display (operation promotion character (small)),
The light emission control means (performance control CPU 120)
Controlling the light emitting means using a luminance data table configured with luminance data;
In the title display part, the light emitting means is controlled using a brightness data table for title display (weak reach common titles);
In the introductory part, the light emitting means is controlled using a brightness data table for the introductory part (weak reach system weak reach A introduction, weak reach system weak reach B introduction).
According to this feature, in a specific reach, the situation in which the title display is performed is a situation in which it is not yet clear whether or not the game will be controlled to an advantageous state, whereas the situation in which the advantageous state name display is performed is a situation after it has already been notified that the game will be controlled to an advantageous state, and the advantageous state name display is displayed for a longer period of time than the title display, so that the game can be celebrated for being controlled to an advantageous state. Also, by displaying the promotion character display before the title display part and displaying the title display that is displayed thereafter for a longer period of time than the promotion character display, it is possible to draw attention to the title display. Also, in the title display part, the light-emitting means is controlled using a brightness data table for the title display that is different from the brightness data table for the introduction part, so that the light-emitting means can be made to emit light in a suitable light-emitting mode according to the title display, and as a result, the title display can be performed in a suitable manner.

[Mode 33]
The gaming machine of form 33-1 is
A gaming machine (pachinko gaming machine 1) that can be controlled to a favorable state (jackpot gaming state) that is advantageous to a player by executing a variable display of specific identification information (first special chart, second special chart) and deriving a specific display result (a special chart display result of "jackpot") as a result of the variable display of the specific identification information,
A game control means (a game control microcomputer 100);
A performance control means (performance control CPU 120);
A display means (image display device 5),
The game control means (game control microcomputer 100)
When the game medium (game ball) enters the start area (first start winning hole, second start winning hole), it is determined whether or not the game medium is controlled to the advantageous state (jackpot game state);
Execute variable display of the specific identification information (first special chart, second special chart),
Based on the result of the judgment, a first fluctuation pattern (PB1-JA, PB1-JB) which is a fluctuation pattern controlled to the advantageous state, a second fluctuation pattern (PA2-2, PA2-3) which is a fluctuation pattern not controlled to the advantageous state, a third fluctuation pattern (PB1-2 to PB1-10) which is a fluctuation pattern controlled to the advantageous state, a fourth fluctuation pattern (PA2-4 to PB1-12) which is a fluctuation pattern not controlled to the advantageous state, a fifth fluctuation pattern (PB1-14) which is a fluctuation pattern controlled to the advantageous state, a sixth fluctuation pattern (PA2-16) which is a fluctuation pattern not controlled to the advantageous state, a seventh fluctuation pattern (PB1-15 to PB1-17) which is a fluctuation pattern controlled to the advantageous state, and an eighth fluctuation pattern (PA2-17 to PB1-19) which is a fluctuation pattern not controlled to the advantageous state are selected as one of the fluctuation patterns;
When the first variation pattern is determined, a first command (a variation pattern designation command designating PB1-JA and PB1-JB) is transmitted to the performance control means;
When the second variation pattern is determined, a second command (a variation pattern designation command designating PA2-2 and PA2-3) is transmitted to the performance control means;
When the third variation pattern is determined, a third command (a variation pattern designation command designating PB1-2 to PB1-10) is transmitted to the performance control means;
When the fourth variation pattern is determined, a fourth command (a variation pattern designation command designating PA2-4 to PA2-12) is transmitted to the performance control means;
When the fifth variation pattern is determined, a fifth command (a variation pattern designation command designating PB1-14) is transmitted to the performance control means;
When the sixth variation pattern is determined, a sixth command (a variation pattern designation command designating PA2-16) is transmitted to the performance control means;
When the seventh variation pattern is determined, a seventh command (a variation pattern designation command designating PB1-15 to PB1-17) is transmitted to the performance control means;
When the eighth variation pattern is determined, an eighth command (a variation pattern designation command designating PA2-17 to PA2-19) is transmitted to the performance control means;
The performance control means includes:
When the first command is received, it is possible to notify that the first reach (low base weak reach A, B performance) will be controlled to the advantageous state (jackpot game state),
When the second command is received, it is possible to notify that the first reach (low base weak reach A, B performance) is not controlled to the advantageous state (jackpot game state),
When the third command is received, it is possible to notify that the game will be controlled to the advantageous state (jackpot game state) in the second reach (low base strong reach A to C performance),
When the fourth command is received, it is possible to notify that the second reach (low base strong reach A to C performance) is not controlled to the advantageous state (jackpot game state),
When the fifth command is received, it is possible to notify that the third reach (high base reach A presentation) will be controlled to the advantageous state (jackpot game state),
When the sixth command is received, it is possible to notify that the third reach (high base reach A presentation) is not controlled to the advantageous state (jackpot game state),
When the seventh command is received, it is possible to notify that the fourth reach (high base reach B to D performance) will be controlled to the advantageous state (jackpot game state),
When the eighth command is received, it is possible to notify that the fourth reach (high base reach B to D performance) is not controlled to the advantageous state (jackpot game state),
The first reach (low base weak reach A, B performance) is configured to include a title display part that displays a title display (title character) corresponding to the first reach, and an introduction part until the result of the advantageous state is notified,
The second reach (low base strong reach A to C performance) is configured to include a title display part that displays a title display (title character) corresponding to the second reach, and an introduction part until the result of the advantageous state is notified,
The third reach (high base reach A performance) is configured to include a title display part that displays a title display (title characters) corresponding to the third reach, and an introduction part until the result of the advantageous state is notified,
The fourth reach (high base reach B to D performance) is configured to include a title display part that displays a title display (title character) corresponding to the fourth reach, and an introduction part until the result of the advantageous state is notified,
The first reach (low base weak reach A, B effect) and the second reach (low base strong reach A to C effect) are reaches executed in a normal state,
The third reach (high base reach A performance) and the fourth reach (high base reach B to D performance) are reaches executed in a special state (probable change state) that is more advantageous than the normal state,
The second reach (low base strong reach A to C performance) has a higher expectation of being controlled to the advantageous state than the first reach (low base weak reach A, B performance),
The fourth reach (high base reach B to D performance) has a higher expectation of being controlled to the advantageous state than the third reach (high base reach A performance),
The third reach (high base reach A effect) has a higher expectation of being controlled to the advantageous state than the first reach (low base weak reach A, B effect),
The display means is
In the title display part in the second reach (low base strong reach A to C performance), an expectation suggestion display consisting of a plurality of objects (star-shaped objects) can be displayed,
The expectation indication can be displayed in the title display part in the third reach (high base reach A performance),
The expectation indication can be displayed in the title display part in the fourth reach (high base reach A performance),
This is characterized in that the expectation indication display is not displayed in the title display part in the first reach (low base weak reach A, B performance).
According to this feature, since the first reach in the normal state has a lower expectation than the second reach in the normal state, the expectation suggestion display is displayed in the second reach, but the expectation suggestion display is not displayed in the first reach, thereby preventing excessive expectation that the first reach will control the game to an advantageous state. On the other hand, since the third reach in the special state, which is more advantageous than the normal state, has a lower expectation than the fourth reach in the special state, but is higher expectation than the first reach in the normal state, the expectation suggestion display is displayed in both the third reach and the fourth reach, thereby allowing expectation that the game will be controlled to an advantageous state in both the third reach and the fourth reach.

[Form 34]
The gaming machine of form 34-1 is
A gaming machine (pachinko gaming machine 1) that can be controlled to a favorable state (jackpot gaming state) that is advantageous to a player by executing a variable display of specific identification information (first special chart, second special chart) and deriving a specific display result (a special chart display result of "jackpot") as a result of the variable display of the specific identification information,
A game control means (a game control microcomputer 100);
A performance control means (performance control CPU 120);
A display means (image display device 5);
A plurality of light emitting means (frame LEDs LWL1 to LWL12, frame LEDs LWR2 to LWR12, logo LEDs LL1 to LL4, decorative LEDs LS1 to LS5, and attacca lamps LA1 to LA4);
A light emission control means (performance control CPU 120);
The game control means (game control microcomputer 100)
When the game medium (game ball) enters the start area (first start winning hole, second start winning hole), it is determined whether or not the game medium is controlled to the advantageous state (jackpot game state);
Execute variable display of the specific identification information (first special chart, second special chart),
Based on the result of the judgment, a first fluctuation pattern (a jackpot fluctuation pattern in a normal state) which is a fluctuation pattern controlled in the advantageous state, a second fluctuation pattern (a miss fluctuation pattern in a normal state) which is a fluctuation pattern not controlled in the advantageous state, a third fluctuation pattern (a jackpot fluctuation pattern in a high probability state) which is a fluctuation pattern controlled in the advantageous state, and a fourth fluctuation pattern (a miss fluctuation pattern in a high probability state) which is a fluctuation pattern not controlled in the advantageous state are selected from a plurality of fluctuation patterns,
When the first fluctuation pattern is determined, a first command (a fluctuation pattern designation command for designating a jackpot fluctuation pattern in a normal state) is transmitted to the performance control means;
When the second variation pattern is determined, a second command (a variation pattern designation command designating a deviation variation pattern in a normal state) is transmitted to the performance control means;
When the third variation pattern is determined, a third command (a variation pattern designation command for designating a jackpot variation pattern in a probability variation state) is transmitted to the performance control means;
When the fourth variation pattern is determined, a fourth command (a variation pattern designation command for designating a miss variation pattern in a probability variation state) is transmitted to the performance control means;
The performance control means (performance control CPU 120)
When the first command is received, it is possible to notify that the game will be controlled to the advantageous state (jackpot game state) in the first reach (super reach presentation in the normal state),
When the second command is received, it is possible to notify that the first reach (super reach presentation in a normal state) is not controlled to the advantageous state (jackpot game state),
When the third command is received, it is possible to notify that the advantageous state will be controlled in the second reach (super reach performance in the probability variable state),
When the fourth command is received, it is possible to notify that the second reach (super reach presentation in a probability variable state) is not controlled to the advantageous state (jackpot game state),
The first reach (super reach effect in a normal state) is configured to include a title display part that displays a title display (title characters) corresponding to the first reach, and an introduction part until the result of the advantageous state is notified,
The second reach (super reach effect in a probability variable state) is configured to include a title display part that displays a title display (title characters) corresponding to the second reach, and an introduction part until the result of the control of the advantageous state is notified,
The first reach (super reach effect in the normal state) is a reach executed in the normal state,
The second reach (super reach effect in a probability variable state) is a reach executed in a special state (probability variable state) that is more advantageous than the normal state,
The title display part in the second reach (super reach performance in a probability variable state) is shorter than the title display part in the first reach (super reach performance in a normal state),
The light emission control means (performance control CPU 120)
Controlling the light emitting means using a luminance data table configured with luminance data;
In the title display part in the first reach (the super reach performance in the normal state), the light emitting means is controlled using a brightness data table (a weak reach common title, a strong reach common title) for the title display part of the first reach,
In the title display part in the second reach (super reach performance in a probability variable state), the light emitting means is controlled using a brightness data table (high base reach common title) for the title display part of the second reach,
In the introduction part of the first reach (super reach performance in a normal state), the light emitting means is controlled using a brightness data table (weak reach system weak reach A introduction, weak reach system weak reach B introduction, strong reach system strong reach A introduction, strong reach system strong reach B introduction, strong reach system strong reach C introduction) for the introduction part of the first reach,
In the introductory part of the second reach (super reach performance in a special probability state), the light emitting means is controlled using a brightness data table (introduction of high base reach system reach A, introduction of high base reach system reach B, introduction of high base reach system reach C, introduction of high base reach system reach D) for the introductory part of the second reach.
According to this feature, the title display part of the second reach in the special state is shorter than the title display part of the first reach in the normal state, so that the special state can be advanced at a good tempo. Also, in the title display part of the first reach and the second reach, the light emitting means is controlled using a brightness data table for the title display of the first reach and the second reach, which is different from the brightness data table for the introductory part of the first reach and the second reach, so that the light emitting means can be made to emit light in a suitable light emitting mode according to the title display. As a result of these, the title display can be performed in a suitable manner.

The gaming machine of aspect 34-2 is the gaming machine according to aspect 34-1,
The frequency with which the second reach (super reach performance in the special state) occurs in the special state (probability change state) is higher than the frequency with which the first reach (super reach performance in the normal state) occurs in the normal state.
According to this feature, even if the frequency of the second reach occurring in the special state increases, the special state can be progressed at a good pace.

[Form 35]
The gaming machine of form 35-1 is
A gaming machine (pachinko gaming machine 1) that can be controlled to a favorable state (jackpot gaming state) that is favorable to a player by executing a variable display of specific identification information (first special chart, second special chart) and deriving a specific display result (a special chart display result of "jackpot") as a result of the variable display of the specific identification information,
A game control means (a game control microcomputer 100);
A performance control means (performance control CPU 120);
A display means (image display device 5),
The game control means (game control microcomputer 100)
Determining whether or not the game medium (game ball) is controlled to the advantageous state when the game medium (game ball) enters the start area (first start winning hole, second start winning hole);
Execute variable display of the specific identification information (first special chart, second special chart),
Based on the result of the judgment, a first fluctuation pattern (PB1-2 to PB1-10) which is a fluctuation pattern controlled to the advantageous state, a second fluctuation pattern (PA2-4 to PB2-12) which is a fluctuation pattern not controlled to the advantageous state, a third fluctuation pattern (PB1-11 to PB1-13) which is a fluctuation pattern controlled to the advantageous state, and a fourth fluctuation pattern (PA2-13 to PB2-15) which is a fluctuation pattern not controlled to the advantageous state are selected as one of the fluctuation patterns;
When the first variation pattern is determined, a first command (a variation pattern designation command designating PB1-2 to PB1-10) is transmitted to the performance control means;
When the second variation pattern is determined, a second command (a variation pattern designation command designating PA2-4 to PA2-12) is transmitted to the performance control means;
When the third variation pattern is determined, a third command (a variation pattern designation command designating PB1-11 to PB1-13) is transmitted to the performance control means;
When the fourth variation pattern is determined, a fourth command (a variation pattern designation command designating PA2-13 to PA2-15) is transmitted to the performance control means;
The game can be controlled to a plurality of states, including a normal state, a special state after a specific number of times is reached (time-saving state B (Yu-time)), which is a state in which the start condition is more easily established than in the normal state and in which the result of the variable display is not a specific display result (the special display result of a "jackpot"), and is controlled based on the execution of the variable display a specific number of times (900 times),
The performance control means (performance control CPU 120)
When the first command is received, it is possible to notify that the first reach (low base strong reach A to C performance) will be controlled to the advantageous state (jackpot game state),
When the second command is received, it is possible to notify that the first reach (low base strong reach A to C performance) is not controlled to the advantageous state (jackpot game state),
When the third command is received, it is possible to notify that the game will be controlled to the advantageous state (jackpot game state) in the second reach (low base strongest reach presentation),
When the fourth command is received, it is possible to notify that the advantageous state (jackpot game state) is not controlled in the second reach (low base strongest reach presentation),
The first reach (low base strong reach A to C performance) is configured to include a title display part that displays a title display (title character) corresponding to the first reach, and an introduction part until the result of the advantageous state is notified,
The second reach (low-base strongest reach presentation) is configured to include a title display part that displays a title display (title characters) corresponding to the second reach, and an introduction part until the result of the advantageous state is notified,
The second reach (low base strongest reach effect) has a higher expectation of becoming the advantageous state than the first reach (low base strong reach A to C effect),
The display means (image display device 5)
In the title display part in the first reach (low base strong reach A to C performance), a title display (title characters) corresponding to the first reach is displayed in a first display operation mode (a display mode in which the title characters are displayed while moving from the left side of the display area to the center),
In a title display part in the second reach (low-base strongest reach presentation), a title display (title characters) corresponding to the second reach is displayed in a second display operation mode (a display mode in which the title characters are displayed reduced from an enlarged display) different from the first display operation mode,
When the special state (time-saving state B (Yu-Time)) is entered after the specific number of times has been reached, a display indicating that the special state will be entered after the specific number of times has been reached (title characters of the Yu-Time start presentation) is displayed in the second display operation mode (a display mode in which the title characters are displayed reduced from an enlarged display).
According to this feature, when the special state is controlled after the specific number of times is reached, the display indicating that the special state will be controlled after the specific number of times is reached is displayed in the same second display operation mode as the title display of the second reach, which has a relatively high expectation, so that the special state after the specific number of times is recognized as being highly advantageous.

The gaming machine of aspect 35-2 is the gaming machine according to aspect 35-1,
When terminating the display (title characters of the Yu-Time start presentation) indicating that control will be made to a special state (time-saving state B (Yu-Time)) after the specific number of times has been reached, the display is terminated in the same display operation mode as the display operation mode (display mode in which the title characters are erased while expanding) when terminating the title display (title characters) of the title display part in the second reach (low-base strongest reach presentation).
According to this feature, even when the display indicating that the special state will be entered after a specific number of times is reached is terminated, it is terminated in the same display operation mode as when terminating the title display of the second reach, which has a relatively high expectation, so that it can be recognized that the special state after a specific number of times is highly advantageous.

[Form 36]
The gaming machine of form 36-1 is
A gaming machine (pachinko gaming machine 1) that can be controlled to a favorable state (jackpot gaming state) that is advantageous to a player by executing a variable display of specific identification information (first special chart, second special chart) and deriving a specific display result (a special chart display result of "jackpot") as a result of the variable display of the specific identification information,
A game control means (a game control microcomputer 100);
A performance control means (performance control CPU 120);
A display means (image display device 5);
A plurality of light emitting means (frame LEDs LWL1 to LWL12, frame LEDs LWR2 to LWR12, logo LEDs LL1 to LL4, decorative LEDs LS1 to LS5, and attacca lamps LA1 to LA4);
A light emission control means (performance control CPU 120);
The game control means (game control microcomputer 100)
When the game medium (game ball) enters the start area (first start winning hole, second start winning hole), it is determined whether or not the game medium is controlled to the advantageous state (jackpot game state);
Execute variable display of the specific identification information (first special chart, second special chart),
Based on the result of the judgment, a fluctuation pattern is determined from among a plurality of fluctuation patterns including a first fluctuation pattern (jackpot fluctuation pattern) which is a fluctuation pattern controlled to the advantageous state, and a second fluctuation pattern (miss fluctuation pattern) which is a fluctuation pattern not controlled to the advantageous state;
When the first fluctuation pattern is determined, a first command (a fluctuation pattern designation command for designating a jackpot fluctuation pattern) is transmitted to the performance control means;
When the second variation pattern is determined, a second command (a variation pattern designation command for designating a miss variation pattern) is transmitted to the performance control means;
The game can be controlled to a plurality of states, including a normal state, a special state after a specific number of times is reached (time-saving state B (Yu-time)), which is a state in which the start condition is more easily established than in the normal state and in which the result of the variable display is not a specific display result (the special display result of a "jackpot"), and is controlled based on the execution of the variable display a specific number of times (900 times),
The performance control means (performance control CPU 120)
When the first command is received, it is possible to notify that the game will be controlled to the advantageous state (jackpot game state) in a specific reach (super reach effect),
When the second command is received, it is possible to notify that the specific reach (super reach effect) is not controlled to the advantageous state (jackpot game state),
The specific reach (super reach effect) is configured to include a title display part that displays a title display (title characters) corresponding to the specific reach, and an introduction part until the result of the control of the advantageous state is notified,
The display means (image display device 5)
When the special state (time-saving state B (Yu-time)) is controlled after the specific number of times is reached, a display (title character of the Yu-time start effect) indicating that the special state will be controlled after the specific number of times is reached can be displayed,
The size of the characters constituting the display (title characters of the Yu-time start effect) indicating that the special state will be entered after the specific number of times has been reached is larger than the size of the characters constituting the title display (title characters) corresponding to the specific reach (super reach effect);
The light emission control means (performance control CPU 120)
Controlling the light emitting means using a luminance data table configured with luminance data;
In the title display part, the light emitting means is controlled using a brightness data table for title display (a weak reach common title, a strong reach common title, and a high base reach common title);
In the introduction part, the light emitting means is controlled using a brightness data table for the introduction part (introduction of weak reach A of weak reach system, introduction of weak reach B of weak reach system, introduction of strong reach A of strong reach system, introduction of strong reach B of strong reach system, introduction of strong reach C of strong reach system, introduction of reach A of high base reach system, introduction of reach B of high base reach system, introduction of reach C of high base reach system, introduction of reach D of high base reach system).
According to this feature, the situation in which the title display is performed in a specific reach is a situation in which it is not yet known whether or not the game will be controlled to an advantageous state, whereas the display indicating that the game will be controlled to a special state after the specific number of times is a situation in which the game will be controlled to a special state after the specific number of times is reached, and by making the size of the characters constituting the display indicating that the game will be controlled to a special state after the specific number of times is larger than the size of the characters constituting the title display corresponding to the specific reach, the game can be celebrated for being controlled to a special state after the specific number of times is reached. Also, in the title display part, the light-emitting means is controlled using a brightness data table for the title display that is different from the brightness data table for the introduction part, so that the light-emitting means can be made to emit light in a suitable light-emitting mode according to the title display, and as a result, the title display can be performed in a suitable manner.

The gaming machine of aspect 36-2 is the gaming machine according to aspect 36-1,
The specific reach (super reach effect) includes a plurality of types of specific reaches having different title displays (title characters),
The characters constituting the display (title characters of the Yu-time start effect) indicating that the special state will be entered after the specific number of times has been reached are characterized by being larger than the characters constituting the title display (title characters) corresponding to any type of specific reach (super reach effect).
According to this feature, the characters constituting the display indicating that the player will be controlled to a special state after the specific number of times is reached are displayed larger than the characters constituting the title display corresponding to any type of specific reach, thereby allowing the player to celebrate the player being controlled to a special state after the specific number of times is reached.

The gaming machine of aspect 36-3 is the gaming machine according to aspect 36-2,
The smallest character among the character strings constituting the display (title character of the Yu-time start effect) indicating that the special state will be entered after the specific number of times has been reached is larger than the largest character among the character strings constituting the title display (title character) corresponding to any type of specific reach (super reach effect).
According to this feature, the smallest character among the characters constituting the display indicating that the player will be controlled to a special state after a specific number of times is reached is displayed larger than the largest character among the characters constituting the title display corresponding to any type of specific reach, so that no matter which character you focus on, the display indicating that the player will be controlled to a special state after a specific number of times is reached is displayed larger than the title display corresponding to the specific reach, making it even more congratulatory that the player will be controlled to a special state after a specific number of times is reached.

[Mode 37]
The gaming machine of form 37-1 is
A gaming machine (pachinko gaming machine 1) that can be controlled to a favorable state (jackpot gaming state) that is advantageous to a player by executing a variable display of specific identification information (first special chart, second special chart) and deriving a specific display result (a special chart display result of "jackpot") as a result of the variable display of the specific identification information,
A game control means (a game control microcomputer 100);
A performance control means (performance control CPU 120);
A display means (image display device 5);
A plurality of light emitting means (frame LEDs LWL1 to LWL12, frame LEDs LWR2 to LWR12, logo LEDs LL1 to LL4, decorative LEDs LS1 to LS5, and attacca lamps LA1 to LA4);
A light emission control means (performance control CPU 120);
The game control means (game control microcomputer 100)
When the game medium (game ball) enters the start area (first start winning hole, second start winning hole), it is determined whether or not the game medium is controlled to the advantageous state (jackpot game state);
Execute variable display of the specific identification information (first special chart, second special chart),
Based on the result of the judgment, a fluctuation pattern is determined from among a plurality of fluctuation patterns including a first fluctuation pattern (jackpot fluctuation pattern) which is a fluctuation pattern controlled to the advantageous state, and a second fluctuation pattern (miss fluctuation pattern) which is a fluctuation pattern not controlled to the advantageous state;
When the first fluctuation pattern is determined, a first command (a fluctuation pattern designation command for designating a jackpot fluctuation pattern) is transmitted to the performance control means;
When the second variation pattern is determined, a second command (a variation pattern designation command for designating a miss variation pattern) is transmitted to the performance control means;
The game can be controlled to a plurality of states, including a normal state, a special state after a specific number of times is reached (time-saving state B (Yu-time)), which is a state in which the start condition is more easily established than in the normal state and in which the result of the variable display is not a specific display result (the special display result of a "jackpot"), and is controlled based on the execution of the variable display a specific number of times (900 times),
The performance control means (performance control CPU 120)
When the first command is received, it is possible to notify that the game will be controlled to the advantageous state (jackpot game state) in a specific reach (super reach effect),
When the second command is received, it is possible to notify that the specific reach (super reach effect) is not controlled to the advantageous state (jackpot game state),
The specific reach (super reach effect) is configured to include a title display part that displays a title display (title characters) corresponding to the specific reach, and an introduction part until the result of the control of the advantageous state is notified,
The display means (image display device 5)
When the special state (time-saving state B (Yu-time)) is controlled after the specific number of times is reached, a display (title character of the Yu-time start effect) indicating that the special state will be controlled after the specific number of times is reached can be displayed,
The display time of the display (title characters of the Yu-time start effect) indicating that the special state will be entered after the specific number of times is reached is longer than the display time of the title display (title characters) corresponding to the specific reach (super reach effect),
The light emission control means (performance control CPU 120)
Controlling the light emitting means using a luminance data table configured with luminance data;
In the title display part, the light emitting means is controlled using a brightness data table for title display (a weak reach common title, a strong reach common title, and a high base reach common title);
In the introduction part, the light emitting means is controlled using a brightness data table for the introduction part (introduction of weak reach A of weak reach system, introduction of weak reach B of weak reach system, introduction of strong reach A of strong reach system, introduction of strong reach B of strong reach system, introduction of strong reach C of strong reach system, introduction of reach A of high base reach system, introduction of reach B of high base reach system, introduction of reach C of high base reach system, introduction of reach D of high base reach system).
According to this feature, the situation in which the title display is performed in a specific reach is a situation in which it is not yet clear whether or not the game will be controlled to an advantageous state, whereas the display indicating that the game will be controlled to a special state after the specific number of times is reached is a situation in which the game will be controlled to a special state after the specific number of times is reached, and by displaying the display indicating that the game will be controlled to a special state after the specific number of times is reached longer than the title display corresponding to the specific reach, the game can be celebrated for being controlled to a special state after the specific number of times is reached. Also, in the title display part, the light-emitting means is controlled using a brightness data table for the title display that is different from the brightness data table for the introduction part, so that the light-emitting means can be made to emit light in a suitable light-emitting mode according to the title display, and as a result, the title display can be performed suitably.

The gaming machine of aspect 37-2 is the gaming machine according to aspect 37-1,
The time from when all of the characters constituting the display (title characters of the Yu-time start performance) indicating that the special state will be entered after the specific number of times has been reached to when at least a part of the characters are no longer displayed is longer than the time from when a part of the characters constituting the title display (title characters) corresponding to the specific reach (super reach performance) is displayed to when all of the characters are no longer displayed.
According to this feature, the time during which the display indicating that the player will be controlled to a special state after a certain number of congratulatory counts is reached is clearly visible is longer than the time during which the title display intended to encourage the player to assume the possibility of being controlled to an advantageous state is displayed, thereby giving the player a sense of satisfaction.

[Mode 38]
The gaming machine of form 38-1 is
A gaming machine (pachinko gaming machine 1) that can be controlled to a favorable state (jackpot gaming state) that is advantageous to a player by executing a variable display of specific identification information (first special chart, second special chart) and deriving a specific display result (a special chart display result of "jackpot") as a result of the variable display of the specific identification information,
A game control means (a game control microcomputer 100);
A performance control means (performance control CPU 120);
A display means (image display device 5);
A plurality of light emitting means (frame LEDs LWL1 to LWL12, frame LEDs LWR2 to LWR12, logo LEDs LL1 to LL4, decorative LEDs LS1 to LS5, and attacca lamps LA1 to LA4);
A light emission control means (performance control CPU 120);
The game control means (game control microcomputer 100)
When the game medium (game ball) enters the start area (first start winning hole, second start winning hole), it is determined whether or not the game medium is controlled to the advantageous state (jackpot game state);
Execute variable display of the specific identification information (first special chart, second special chart),
Based on the result of the judgment, a fluctuation pattern is determined from among a plurality of fluctuation patterns including a first fluctuation pattern (jackpot fluctuation pattern) which is a fluctuation pattern controlled to the advantageous state, and a second fluctuation pattern (miss fluctuation pattern) which is a fluctuation pattern not controlled to the advantageous state;
When the first fluctuation pattern is determined, a first command (a fluctuation pattern designation command for designating a jackpot fluctuation pattern) is transmitted to the performance control means;
When the second variation pattern is determined, a second command (a variation pattern designation command for designating a miss variation pattern) is transmitted to the performance control means;
The game can be controlled to a plurality of states, including a normal state, a special state after a specific number of times is reached (time-saving state B (Yu-time)), which is a state in which the start condition is more easily established than in the normal state and in which the result of the variable display is not a specific display result (the special display result of a "jackpot"), and is controlled based on the execution of the variable display a specific number of times (900 times),
The performance control means (performance control CPU 120)
When the first command is received, it is possible to notify that the game will be controlled to the advantageous state (jackpot game state) in a specific reach (super reach effect),
When the second command is received, it is possible to notify that the specific reach (super reach effect) is not controlled to the advantageous state (jackpot game state),
The specific reach (super reach effect) is configured to include a title display part that displays a title display (title characters) corresponding to the specific reach, and an introduction part until the result of the control of the advantageous state is notified,
The display means (image display device 5)
In the normal state, a display indicating the number of times remaining until the special state after the specific number of times is reached (characters indicating the number of times remaining until the play time) can be displayed;
The size of the characters constituting the title display (title characters) corresponding to the specific reach (super reach performance) is larger than the size of the characters constituting the display (remaining number of times until Yu-time) indicating the number of times remaining until the special state after the specific number of times is reached,
The light emission control means (performance control CPU 120)
Controlling the light emitting means using a luminance data table configured with luminance data;
In the title display part, the light emitting means is controlled using a brightness data table for title display (a weak reach common title, a strong reach common title, and a high base reach common title);
In the introduction part, the light emitting means is controlled using a brightness data table for the introduction part (introduction of weak reach A of weak reach system, introduction of weak reach B of weak reach system, introduction of strong reach A of strong reach system, introduction of strong reach B of strong reach system, introduction of strong reach C of strong reach system, introduction of reach A of high base reach system, introduction of reach B of high base reach system, introduction of reach C of high base reach system, introduction of reach D of high base reach system).
According to this feature, the size of the characters constituting the title display corresponding to the specific reach is made larger than the size of the characters constituting the display showing the number of times remaining until the special state after the specific number of times is reached, so that attention can be drawn to the title display corresponding to the specific reach. Also, in the title display part, the light emitting means is controlled using a brightness data table for the title display that is different from the brightness data table for the introduction part, so that the light emitting means can be made to emit light in a suitable light emitting mode according to the title display. As a result of these, the title display can be performed in a suitable manner.

The gaming machine of aspect 38-2 is the gaming machine according to aspect 38-1,
The specific reach (super reach effect) includes a first reach (low base weak reach A, B effect) and a second reach (low base strong reach A to C effect) which has a higher expectation of being controlled to the advantageous state than the first reach,
The display showing the remaining number of times until the special state after the specific number of times has been reached (characters indicating the remaining number of times until Yu-time) is displayed during the execution of the first reach (low base weak reach A, B performance), but is not displayed during the execution of the second reach (low base strong reach A to C performance).
According to this feature, in the first reach, which has a low expectation, the number of times remaining until the special state is reached after the specific number of times is reached is displayed, making it possible to make the player aware of the number of times until the special state is reached after the specific number of times is reached, whereas in the second reach, which has a high expectation, the number of times remaining until the special state is reached after the specific number of times is not displayed, making it possible to draw attention to the presentation and also to reduce the player's disappointment when there are only a few times until the special state is reached after the specific number of times is reached.

The gaming machine of aspect 38-3 is the gaming machine according to aspect 38-2,
When it is notified that the game will be controlled to the advantageous state in the second reach (low base strong reach A to C performance), the game is controlled to the advantageous state (jackpot game state) without displaying again the display (characters of the remaining number of times until the play time) indicating the remaining number of times until the special state after the specific number of times is reached,
When it is notified that the advantageous state will not be achieved in the second reach (low base strong reach A to C performance), a display showing the remaining number of times until the special state after the specific number of times is reached (characters showing the remaining number of times until the Yu-time) is displayed again after the second reach (low base strong reach A to C performance) ends.
According to this feature, when it is notified that the advantageous state will be controlled in the second reach, by not displaying again the number of times remaining until the special state after the specific number of times is reached, it is possible to alleviate the disappointment of the player when there are only a few times until the special state after the specific number of times is reached. Also, when it is notified that the advantageous state will not be controlled in the second reach, the number of times remaining until the special state after the specific number of times is reached is displayed again after the end of the second reach, so that the player can feel relieved as soon as possible when there are only a few times until the special state after the specific number of times is reached.

[Mode 39]
The gaming machine of embodiment 39-1 is
A gaming machine (pachinko gaming machine 1) that can be controlled to a favorable state (jackpot gaming state) that is advantageous to a player by executing a variable display of specific identification information (first special chart, second special chart) and deriving a specific display result (a special chart display result of "jackpot") as a result of the variable display of the specific identification information,
A game control means (a game control microcomputer 100);
A performance control means (performance control CPU 120);
A display means (image display device 5);
A plurality of light emitting means (frame LEDs LWL1 to LWL12, frame LEDs LWR2 to LWR12, logo LEDs LL1 to LL4, decorative LEDs LS1 to LS5, and attacca lamps LA1 to LA4);
A light emission control means (performance control CPU 120);
The game control means (game control microcomputer 100)
When the game medium (game ball) enters the start area (first start winning hole, second start winning hole), it is determined whether or not the game medium is controlled to the advantageous state (jackpot game state);
Execute variable display of the specific identification information (first special chart, second special chart),
Based on the result of the judgment, a fluctuation pattern is determined from among a plurality of fluctuation patterns including a first fluctuation pattern (jackpot fluctuation pattern) which is a fluctuation pattern controlled to the advantageous state, and a second fluctuation pattern (miss fluctuation pattern) which is a fluctuation pattern not controlled to the advantageous state;
When the first fluctuation pattern is determined, a first command (a fluctuation pattern designation command for designating a jackpot fluctuation pattern) is transmitted to the performance control means;
When the second variation pattern is determined, a second command (a variation pattern designation command for designating a miss variation pattern) is transmitted to the performance control means;
The game can be controlled to a plurality of states, including a normal state, a special state after a specific number of times is reached (time-saving state B (Yu-time)), which is a state in which the start condition is more easily established than in the normal state and in which the result of the variable display is not a specific display result (the special display result of a "jackpot"), and is controlled based on the execution of the variable display a specific number of times (900 times),
The performance control means (performance control CPU 120)
When the first command is received, it is possible to notify that the game will be controlled to the advantageous state (jackpot game state) in a specific reach (super reach effect),
When the second command is received, it is possible to notify that the specific reach (super reach effect) is not controlled to the advantageous state (jackpot game state),
The specific reach (super reach effect) is configured to include a title display part that displays a title display (title characters) corresponding to the specific reach, and an introduction part until the result of the control of the advantageous state is notified,
The display means (image display device 5)
At the timing (operation prompting performances A to D) related to the specific reach (super reach performance), a prompting character display (operation prompting character (small)) for prompting the player to take an action can be displayed.
In the normal state, a display indicating the number of times remaining until the special state after the specific number of times is reached (characters indicating the number of times remaining until the play time) can be displayed;
The size of the characters constituting the prompt character display (operation prompt character (small)) is larger than the size of the characters constituting the display (remaining number of times until the play time) indicating the number of times remaining until the special state after the specific number of times is reached,
The light emission control means (performance control CPU 120)
Controlling the light emitting means using a luminance data table configured with luminance data;
In the title display part, the light emitting means is controlled using a brightness data table for title display (a weak reach common title, a strong reach common title);
In the introductory part, the light emitting means is controlled using a brightness data table for the introductory part (weak reach system weak reach A introduction, weak reach system weak reach B introduction, strong reach system strong reach A introduction, strong reach system strong reach B introduction, strong reach system strong reach C introduction).
According to this feature, by making the size of the characters constituting the prompting character display that prompts the player to take an action at a timing related to a specific reach larger than the size of the characters constituting the display indicating the number of times remaining until the special state after the specific number of times is reached, it is possible to draw attention to the prompting character display and effectively prompt the player to take an action. Also, in the title display part, since the light emitting means is controlled using a brightness data table for the title display that is different from the brightness data table for the introduction part, it is possible to make the light emitting means emit light in a suitable light emitting mode according to the title display, and as a result, the title display can be performed in a suitable manner.

The gaming machine of aspect 39-2 is the gaming machine according to aspect 39-1,
When the promotion character display (operation promotion character (small)) is displayed before the title display part (operation promotion performance A) in the specific reach (low base strong reach A to C performance), a display indicating the remaining number of times until the special state after the specific number of times is reached (remaining number of times until Yu-time character) is displayed at the same time,
When the prompting character display (operation prompting character (small)) is displayed in the introductory part (operation prompting performance D) of the specific reach (low base strong reach A to C performance), the display indicating the number of times remaining until the special state after the specific number of times is reached (number of times remaining until Yu-time) is not displayed.
According to this feature, before the development into the specific reach, the remaining number of times until the special state after the specific number of times is reached is displayed at the same time as the promotion character display, so that the player can be made aware of the remaining number of times until the special state after the specific number of times is reached, and the operation promotion display in the introduction part does not display the remaining number of times until the special state after the specific number of times is reached, so that the player is informed of whether or not the game will be controlled to an advantageous state.

[Form 40]
The gaming machine of form 40-1 is
A gaming machine (pachinko gaming machine 1) that can be controlled to a favorable state (jackpot gaming state) that is advantageous to a player by executing a variable display of specific identification information (first special chart, second special chart) and deriving a specific display result (a special chart display result of "jackpot") as a result of the variable display of the specific identification information,
A game control means (a game control microcomputer 100);
A performance control means (performance control CPU 120);
A display means (image display device 5);
A plurality of light emitting means (frame LEDs LWL1 to LWL12, frame LEDs LWR2 to LWR12, logo LEDs LL1 to LL4, decorative LEDs LS1 to LS5, and attacca lamps LA1 to LA4);
A light emission control means (performance control CPU 120);
The game control means (game control microcomputer 100)
When the game medium (game ball) enters the start area (first start winning hole, second start winning hole), it is determined whether or not the game medium is controlled to the advantageous state (jackpot game state);
Execute variable display of the specific identification information (first special chart, second special chart),
Based on the result of the judgment, a fluctuation pattern is determined from among a plurality of fluctuation patterns including a first fluctuation pattern (jackpot fluctuation pattern) which is a fluctuation pattern controlled to the advantageous state, and a second fluctuation pattern (miss fluctuation pattern) which is a fluctuation pattern not controlled to the advantageous state;
When the first fluctuation pattern is determined, a first command (a fluctuation pattern designation command for designating a jackpot fluctuation pattern) is transmitted to the performance control means;
When the second variation pattern is determined, a second command (a variation pattern designation command for designating a miss variation pattern) is transmitted to the performance control means;
The game can be controlled to a plurality of states, including a normal state, a special state after a specific number of times is reached (time-saving state B (Yu-time)), which is a state in which the start condition is more easily established than in the normal state and in which the result of the variable display is not a specific display result (the special display result of a "jackpot"), and is controlled based on the execution of the variable display a specific number of times (900 times),
The performance control means (performance control CPU 120)
When the first command is received, it is possible to notify that the game will be controlled to the advantageous state (jackpot game state) in a specific reach (super reach effect),
When the second command is received, it is possible to notify that the specific reach (super reach effect) is not controlled to the advantageous state (jackpot game state),
The specific reach (super reach effect) is configured to include a title display part that displays a title display (title characters) corresponding to the specific reach, and an introduction part until the result of the control of the advantageous state is notified,
The display means (image display device 5)
After it is notified that the specific reach (super reach effect) will control the game to the advantageous state, a name display of the advantageous state (title character of the big win start effect) corresponding to the controlled advantageous state can be displayed.
In the normal state, a display indicating the number of times remaining until the special state after the specific number of times is reached (characters indicating the number of times remaining until the play time) can be displayed;
Before displaying the advantageous state name display (title character of the jackpot start performance), the display indicating the remaining number of times until the special state after reaching the specific number of times (characters of the remaining number of times until the play time) is ended,
The size of the characters constituting the advantageous state name display (title characters of the jackpot start performance) is larger than the size of the characters constituting the display indicating the remaining number of times until the special state after the specific number of times is reached (characters of the remaining number of times until the play time),
The light emission control means (performance control CPU 120)
Controlling the light emitting means using a luminance data table configured with luminance data;
In the title display part, the light emitting means is controlled using a brightness data table for title display (a weak reach common title, a strong reach common title);
In the introductory part, the light emitting means is controlled using a brightness data table for the introductory part (weak reach system weak reach A introduction, weak reach system weak reach B introduction, strong reach system strong reach A introduction, strong reach system strong reach B introduction, strong reach system strong reach C introduction).
According to this feature, the situation in which the advantageous state name display is performed is a situation after the fact that it has already been notified that it will be controlled to the advantageous state, and there is no need for a display indicating the number of times remaining until the special state after the specific number of times is reached, so that the display indicating the number of times remaining until the special state after the specific number of times is reached is terminated before the advantageous state name display is displayed, and the size of the characters constituting the advantageous state name display is made larger than the size of the characters constituting the display indicating the number of times remaining until the special state after the specific number of times is reached, thereby making it possible to celebrate the control to the advantageous state. Also, in the title display part, the light-emitting means is controlled using a luminance data table for the title display that is different from the luminance data table for the introduction part, so that the light-emitting means can be made to emit light in a suitable light-emitting mode according to the title display, and as a result, the title display can be performed suitably.

The gaming machine of aspect 40-2 is the gaming machine according to aspect 40-1,
Regardless of the number of times remaining until the special state (time-saving state B (Yu-time)) after the specific number of times is reached, the size of the characters constituting the display (characters of the remaining number of times until Yu-time) indicating the number of times remaining until the special state after the specific number of times is reached is the same,
The size of the characters constituting the advantageous state name display (title characters of the jackpot start performance) is larger than the size of the characters constituting the display showing the number of times remaining until the special state occurs after the specific number of times is reached (characters indicating the number of times remaining until Yu-time).
According to this feature, regardless of the number of times remaining until the special state is reached after the specific number of times has been reached, the size of the characters constituting the advantageous state name display can be made larger than the size of the characters constituting the display indicating the number of times remaining until the special state is reached after the specific number of times has been reached, thereby allowing the player to celebrate being controlled into the advantageous state.

The gaming machine of aspect 40-3 is the gaming machine according to aspect 40-1 or 40-2,
The game control means (game control microcomputer 100) is characterized in that it determines a special fluctuation pattern (time-saving B start fluctuation pattern) when the game medium (game ball) first enters the start area (first start winning port, second start winning port) in a special state (time-saving state B (Yu-time)) after a specific number of times has been reached.
According to this feature, when the game medium first enters the starting area in the special state after the specific number of times is reached, a presentation according to the special variation pattern can be executed.

[Form 41]
The gaming machine of form 41-1 is
A gaming machine (pachinko gaming machine 1) that can be controlled to a favorable state (jackpot gaming state) that is advantageous to a player by executing a variable display of specific identification information (first special chart, second special chart) and deriving a specific display result (a special chart display result of "jackpot") as a result of the variable display of the specific identification information,
A game control means (a game control microcomputer 100);
A performance control means (performance control CPU 120);
A display means (image display device 5);
A plurality of light emitting means (frame LEDs LWL1 to LWL12, frame LEDs LWR2 to LWR12, logo LEDs LL1 to LL4, decorative LEDs LS1 to LS5, and attacca lamps LA1 to LA4);
A light emission control means (performance control CPU 120);
The game control means (game control microcomputer 100)
When the game medium (game ball) enters the start area (first start winning hole, second start winning hole), it is determined whether or not the game medium is controlled to the advantageous state (jackpot game state);
Execute variable display of the specific identification information (first special chart, second special chart),
Based on the result of the judgment, a first fluctuation pattern (PB1-JA, PB1-JB) which is a fluctuation pattern controlled to the advantageous state, and a second fluctuation pattern (PA2-2, PA2-3) which is a fluctuation pattern not controlled to the advantageous state are selected from a plurality of fluctuation patterns;
When the first variation pattern is determined, a first command (a variation pattern designation command designating (PA2-2, PA2-3)) is transmitted to the performance control means;
When the second variation pattern is determined, a second command (a variation pattern designation command designating PA2-2 and PA2-3) is transmitted to the performance control means;
The performance control means (performance control CPU 120)
When the first command is received, it is possible to notify that the game will be controlled to the advantageous state (jackpot game state) in a specific reach (low base weak reach A, B performance),
When the second command is received, it is possible to notify that the specific reach (low base weak reach A, B performance) is not controlled to the advantageous state (jackpot game state),
The specific reach (low base weak reach A, B performance) is configured to include a title display part that displays a title display (title character) corresponding to the specific reach, and an introduction part until the result of the control of the advantageous state is notified,
The display means (image display device 5)
The title display (title characters) corresponding to the specific reach (low base weak reach A, B performance) can be changed from a first state (white state) to a second state (red or gold state) and displayed.
In a title display part that displays a title display (title letters) corresponding to the specific reach (low base weak reach A, B performance), when the title display (title letters) corresponding to the specific reach (low base weak reach A, B performance) is changed from the first aspect (white aspect) to the second aspect (red or gold aspect), the time during which the title display (title letters) corresponding to the specific reach (low base weak reach A, B performance) is displayed in the second aspect (red or gold aspect) is longer than the time during which the title display (title letters) corresponding to the specific reach (low base weak reach A, B performance) is displayed in the first aspect (white aspect),
The light emission control means (performance control CPU 120)
Controlling the light emitting means using a luminance data table configured with luminance data;
In the title display part, the light emitting means is controlled using a brightness data table for title display (weak reach common titles);
In the introductory part, the light emitting means is controlled using a brightness data table for the introductory part (weak reach system weak reach A introduction, weak reach system weak reach B introduction).
According to this feature, when the title display corresponding to a specific reach is changed from the first state to the second state in the title display part that displays the title display corresponding to the specific reach, the time during which the title display corresponding to the specific reach is displayed in the second state is made longer than the time during which the title display corresponding to the specific reach is displayed in the first state, so that the change to the second state can be reliably recognized. Also, in the title display part, the light-emitting means is controlled using a brightness data table for the title display that is different from the brightness data table for the introduction part, so that the light-emitting means can be made to emit light in a suitable light-emitting state according to the title display. As a result of these, the title display can be performed in a suitable manner.

The gaming machine of aspect 41-2 is the gaming machine according to aspect 41-1,
In the title display part that displays the title display (title letters) corresponding to the specific reach (low base weak reach A, B performance), the title display (title letters) corresponding to the specific reach (low base weak reach A, B performance) may be changed from the first aspect (white aspect) to the second aspect (red or gold aspect) or may remain unchanged in the first aspect (white aspect),
When changing the title display (title characters) corresponding to the specific reach (low base weak reach A, B performance) from the first aspect (white aspect) to the second aspect (red or gold aspect), at a specific timing (when a time t1 has elapsed from the start of the title display period), the title display (title characters) is changed from the first aspect (white aspect) to the second aspect (red or gold aspect) and a specific sound effect (specific sound) is output.
In the case where the title display (title characters) corresponding to the specific reach (low base weak reach A, B performance) is not changed from the first state (white state), when the specific timing is reached (when a time t1 has elapsed from the start of the title display period), the display is not changed from the first state (white state) and the specific sound effect (specific sound) is output.
According to this feature, a specific sound effect is output when the title display corresponding to a specific reach changes from a first state to a second state at a specific timing, and also when the title display does not change from the first state at the specific timing, so that the output of the specific sound effect can create anticipation of a change to the second state.

The gaming machine of aspect 41-3 is the gaming machine according to aspect 41-1 or 41-2,
The second aspect includes a plurality of aspects (red, gold),
When the title display (title characters) corresponding to the specific reach (low base weak reach A, B performance) is changed from the first state (white state) to the second state (red, gold state), a specific sound effect (specific sound) is output regardless of the type of second state (red, gold state) to which it is changed.
According to this feature, when the title display corresponding to a specific reach changes from a first state to a second state at a specific timing, a specific sound effect is output regardless of the type of second state to which it is changed, so that the output of the specific sound effect draws attention to the type of second state to which it is changed.

[Form 42]
The gaming machine of form 42-1 is
A gaming machine (pachinko gaming machine 1) that can be controlled to a favorable state (jackpot gaming state) that is advantageous to a player by executing a variable display of specific identification information (first special chart, second special chart) and deriving a specific display result (a special chart display result of "jackpot") as a result of the variable display of the specific identification information,
A game control means (a game control microcomputer 100);
A performance control means (performance control CPU 120);
A display means (image display device 5),
The game control means (game control microcomputer 100)
When the game medium (game ball) enters the start area (first start winning hole, second start winning hole), it is determined whether or not the game medium is controlled to the advantageous state (jackpot game state);
Execute variable display of the specific identification information (first special chart, second special chart),
Based on the result of the judgment, a first fluctuation pattern (PB1-JA, PB1-JB) which is a fluctuation pattern controlled to the advantageous state, and a second fluctuation pattern (PA2-2, PA2-3) which is a fluctuation pattern not controlled to the advantageous state are selected from a plurality of fluctuation patterns;
When the first variation pattern is determined, a first command (a variation pattern designation command designating (PA2-2, PA2-3)) is transmitted to the performance control means;
When the second variation pattern is determined, a second command (a variation pattern designation command designating PA2-2 and PA2-3) is transmitted to the performance control means;
The performance control means (performance control CPU 120)
When the first command is received, it is possible to notify that the game will be controlled to the advantageous state (jackpot game state) in a specific reach (low base weak reach A, B performance),
When the second command is received, it is possible to notify that the specific reach (low base weak reach A, B performance) is not controlled to the advantageous state (jackpot game state),
The specific reach (low base weak reach A, B performance) is configured to include a title display part that displays a title display (title character) corresponding to the specific reach, and an introduction part until the result of the control of the advantageous state is notified,
The display means (image display device 5)
The title display (title characters) corresponding to the specific reach (low base weak reach A, B performance) can be changed from a first state (white state) to a second state (red state) and displayed.
The title display (title characters) corresponding to the specific reach (low base weak reach A, B performance) can be changed from the first mode (white mode) to a third mode (gold mode) which has a higher expectation of being controlled to a favorable state than the second mode (red mode), and displayed.
In the title display part that displays the title display (title letters) corresponding to the specific reach (low base weak reach A, B performance), in either case where the title display (title letters) corresponding to the specific reach (low base weak reach A, B performance) is changed from the first aspect (white aspect) to the second aspect (red aspect) or the third aspect (gold aspect), the display is characterized in that it is displayed so as to change from the first aspect (white aspect) to a common display aspect (an aspect that appears to glow) and then to the second aspect (red aspect) or the third aspect (gold aspect).
According to this feature, in the title display part that displays the title display corresponding to a specific reach, whether the title display corresponding to the specific reach is changed from the first mode to the second mode or from the first mode to the third mode, the display is changed to a common display mode and then changed to the second mode or the third mode. Therefore, by changing from the first mode to the common display mode, the player can expect until the end that the display will change to the third mode, which has a higher expectation than the second mode, until the display changes from the common display mode to the second mode or the third mode.

The gaming machine of aspect 42-2 is the gaming machine according to aspect 42-1,
The common display mode is a mode in which the characters constituting the title display (title characters) are illuminated, and is characterized in that when the light clears, it changes to the second mode (red mode) or the third mode (gold mode).
According to this feature, the characters constituting the title display light up, thereby encouraging the change to the second or third mode.

[Form 43]
The gaming machine of form 43-1 is
A gaming machine (pachinko gaming machine 1) that can be controlled to a favorable state (jackpot gaming state) that is advantageous to a player by executing a variable display of specific identification information (first special chart, second special chart) and deriving a specific display result (a special chart display result of "jackpot") as a result of the variable display of the specific identification information,
A game control means (a game control microcomputer 100);
A performance control means (performance control CPU 120);
A display means (image display device 5);
A plurality of light emitting means (frame LEDs LWL1 to LWL12, frame LEDs LWR2 to LWR12, logo LEDs LL1 to LL4, decorative LEDs LS1 to LS5, and attacca lamps LA1 to LA4);
A light emission control means (performance control CPU 120);
The game control means (game control microcomputer 100)
When the game medium (game ball) enters the start area (first start winning hole, second start winning hole), it is determined whether or not the game medium is controlled to the advantageous state (jackpot game state);
Execute variable display of the specific identification information (first special chart, second special chart),
Based on the result of the judgment, a first fluctuation pattern (PB1-JA) which is a fluctuation pattern controlled to the advantageous state, a second fluctuation pattern (PA2-2) which is a fluctuation pattern not controlled to the advantageous state, a third fluctuation pattern (PB1-JB) which is a fluctuation pattern controlled to the advantageous state, and a fourth fluctuation pattern (PA2-3) which is a fluctuation pattern not controlled to the advantageous state are selected as one of a plurality of fluctuation patterns;
When the first variation pattern is determined, a first command (a variation pattern designation command designating PB1-JA) is transmitted to the performance control means;
When the second variation pattern is determined, a second command (a variation pattern designation command designating PA2-2) is transmitted to the performance control means;
When the third variation pattern is determined, a third command (a variation pattern designation command designating PB1-JB) is transmitted to the performance control means;
When the fourth variation pattern is determined, a fourth command (a variation pattern designation command designating PA2-3) is transmitted to the performance control means;
The performance control means (performance control CPU 120)
When the first command is received, it is possible to notify that the game will be controlled to the advantageous state (jackpot game state) in the first reach (low base weak reach A presentation),
When the second command is received, it is possible to notify that the first reach (low base weak reach A presentation) is not controlled to the advantageous state (jackpot game state),
When the third command is received, it is possible to notify that the game will be controlled to the advantageous state (jackpot game state) in the second reach (low base weak reach B presentation),
When the fourth command is received, it is possible to notify that the second reach (low base weak reach B presentation) is not controlled to the advantageous state (jackpot game state),
The first reach (low base weak reach A performance) is configured to include a title display part that displays a title display (title characters) corresponding to the first reach, and an introduction part until the result of the advantageous state is notified,
The second reach (low base weak reach B performance) is configured to include a title display part that displays a title display (title characters) corresponding to the second reach, and an introduction part until the result of the advantageous state is notified,
The light emission control means (performance control CPU 120)
Controlling the light emitting means using a luminance data table configured with luminance data;
In the title display part in the first reach (low base weak reach A performance) and the title display part in the second reach (low base weak reach B performance), a brightness data table (weak reach common title) for a common title display part is used to control the light emitting means;
In the introductory part of the first reach (low base weak reach A performance), the light emitting means is controlled using a brightness data table (weak reach system weak reach A introduction) for the introductory part of the first reach,
In the introductory part of the second reach (low base weak reach B presentation), the light emitting means is controlled using a brightness data table (weak reach system weak reach B introduction) for the introductory part of the second reach.
According to this feature, by making the brightness data table corresponding to the title display part common for two different reaches, an increase in cost and capacity can be prevented, and by using the brightness data table corresponding to each of the introductory parts, it is possible to appropriately stimulate the period until notification of whether or not an advantageous state is achieved, and as a result, it is possible to perform an appropriate title display.

[Form 44]
The gaming machine of form 44-1 is
A gaming machine (pachinko gaming machine 1) that can be controlled to a favorable state (jackpot gaming state) that is advantageous to a player by executing a variable display of specific identification information (first special chart, second special chart) and deriving a specific display result (a special chart display result of "jackpot") as a result of the variable display of the specific identification information,
A game control means (a game control microcomputer 100);
A performance control means (performance control CPU 120);
A display means (image display device 5);
A plurality of light emitting means (frame LEDs LWL1 to LWL12, frame LEDs LWR2 to LWR12, logo LEDs LL1 to LL4, decorative LEDs LS1 to LS5, and attacca lamps LA1 to LA4);
A light emission control means (performance control CPU 120);
The game control means (game control microcomputer 100)
When the game medium (game ball) enters the start area (first start winning hole, second start winning hole), it is determined whether or not the game medium is controlled to the advantageous state (jackpot game state);
Execute variable display of the specific identification information (first special chart, second special chart),
Based on the result of the judgment, a first fluctuation pattern (PB1-JA) which is a fluctuation pattern controlled to the advantageous state, a second fluctuation pattern (PA2-2) which is a fluctuation pattern not controlled to the advantageous state, a third fluctuation pattern (PB1-JB) which is a fluctuation pattern controlled to the advantageous state, a fourth fluctuation pattern (PA2-3) which is a fluctuation pattern not controlled to the advantageous state, a fifth fluctuation pattern (PB1-2 to 4) which is a fluctuation pattern controlled to the advantageous state, a sixth fluctuation pattern (PA2-4 to 6) which is a fluctuation pattern not controlled to the advantageous state, a seventh fluctuation pattern (PB1-5 to 7/PB1-8 to 10) which is a fluctuation pattern controlled to the advantageous state, and an eighth fluctuation pattern (PA2-7 to 9/PA2-10 to 12) which is a fluctuation pattern not controlled to the advantageous state are determined;
When the first variation pattern is determined, a first command (a variation pattern designation command designating PB1-JA) is transmitted to the performance control means;
When the second variation pattern is determined, a second command (a variation pattern designation command designating PA2-2) is transmitted to the performance control means;
When the third variation pattern is determined, a third command (a variation pattern designation command designating PB1-JB) is transmitted to the performance control means;
When the fourth variation pattern is determined, a fourth command (a variation pattern designation command designating PA2-3) is transmitted to the performance control means;
When the fifth variation pattern is determined, a fifth command (a variation pattern designation command designating PB1-2 to PB1-4) is transmitted to the performance control means;
When the sixth variation pattern is determined, a sixth command (a variation pattern designation command designating PA2-4 to PA2-6) is transmitted to the performance control means;
When the seventh variation pattern is determined, a seventh command (a variation pattern designation command designating PB1-5 to PB1-7/PB1-8 to PB1-10) is transmitted to the performance control means;
When the eighth variation pattern is determined, an eighth command (a variation pattern designation command designating PA2-7 to PA2-9/PA2-10 to PA2-12) is transmitted to the performance control means;
The performance control means (performance control CPU 120)
When the first command is received, it is possible to notify that the game will be controlled to the advantageous state (jackpot game state) in the first reach (low base weak reach A presentation),
When the second command is received, it is possible to notify that the first reach (low base weak reach A presentation) is not controlled to the advantageous state (jackpot game state),
When the third command is received, it is possible to notify that the game will be controlled to the advantageous state (jackpot game state) in the second reach (low base weak reach B presentation),
When the fourth command is received, it is possible to notify that the second reach (low base weak reach B presentation) is not controlled to the advantageous state (jackpot game state),
When the fifth command is received, it is possible to notify that the third reach (low base strong reach A presentation) will be controlled to the advantageous state (jackpot game state),
When the sixth command is received, it is possible to notify that the third reach (low base strong reach A presentation) is not controlled to the advantageous state (jackpot game state),
When the seventh command is received, it is possible to notify that the fourth reach (low base strong reach B performance/low base strong reach C performance) will be controlled to the advantageous state (jackpot game state),
When the eighth command is received, it is possible to notify that the fourth reach (low base strong reach B performance/low base strong reach C performance) is not controlled to the advantageous state (jackpot game state),
The first reach (low base weak reach A performance) is configured to include a title display part that displays a title display (title characters) corresponding to the first reach, and an introduction part until the result of the advantageous state is notified,
The second reach includes a title display part that displays a title display (title characters) corresponding to the second reach (low base weak reach B performance), and an introduction part until the result of the advantageous state is notified,
The third reach includes a title display part that displays a title display (title characters) corresponding to the third reach (low base strong reach A performance), and an introduction part until the result of the advantageous state is notified,
The fourth reach includes a title display part that displays a title display (title characters) corresponding to the fourth reach (low base strong reach B effect/low base strong reach C effect), and an introduction part until the result of the advantageous state is notified.
The third reach (low base strong reach A performance) and the fourth reach (low base strong reach B performance/low base strong reach C performance) have a higher expectation of being controlled to the advantageous state than the first reach (low base weak reach A performance) and the second reach (low base weak reach B performance),
The light emission control means (performance control CPU 120)
Controlling the light emitting means using a luminance data table configured with luminance data;
In the title display part in the first reach (low base weak reach A performance) and the title display part in the second reach (low base weak reach B performance), a brightness data table (weak reach common title) for the first title display part which is common to the first reach is used to control the light emitting means;
In the title display part in the third reach (low base strong reach A performance) and the title display part in the fourth reach (low base strong reach B performance/low base strong reach C performance), the light emitting means is controlled using a common brightness data table (strong reach common title) for the second title display part,
In the introduction part of the first reach (low base weak reach A performance), the light emitting means is controlled using a brightness data table (weak reach system weak reach A introduction) for the introduction part of the first reach,
In the introduction part of the second reach (low base weak reach B performance), the light emitting means is controlled using a brightness data table (weak reach system weak reach B introduction) for the introduction part of the second reach,
In the introduction part of the third reach (low base strong reach A performance), the light emitting means is controlled using a brightness data table (strong reach system strong reach A introduction) for the introduction part of the third reach,
In the introductory part of the fourth reach (low base strong reach B performance/low base strong reach C performance), the light-emitting means is controlled using a brightness data table for the introductory part of the fourth reach (strong reach system strong reach B introduction/strong reach system strong reach C introduction).
According to this feature, by making the brightness data table corresponding to the title display part common for the high expectation reach 2 and the low expectation reach 2, an increase in cost and capacity is prevented, and by using the corresponding brightness data table for each of the introductory parts, it is possible to appropriately stimulate the period until notification of whether or not an advantageous state will be achieved, and as a result, an appropriate title display can be performed.

[Form 45]
The gaming machine of form 45-1 is
A gaming machine (pachinko gaming machine 1) that can be controlled to a favorable state (jackpot gaming state) that is advantageous to a player by executing a variable display of specific identification information (first special chart, second special chart) and deriving a specific display result (a special chart display result of "jackpot") as a result of the variable display of the specific identification information,
A game control means (a game control microcomputer 100);
A performance control means (performance control CPU 120);
A display means (image display device 5);
A plurality of light emitting means (frame LEDs LWL1 to LWL12, frame LEDs LWR2 to LWR12, logo LEDs LL1 to LL4, decorative LEDs LS1 to LS5, and attacca lamps LA1 to LA4);
A light emission control means (performance control CPU 120);
The game control means (game control microcomputer 100)
When the game medium (game ball) enters the start area (first start winning hole, second start winning hole), it is determined whether or not the game medium is controlled to the advantageous state (jackpot game state);
Execute variable display of the specific identification information (first special chart, second special chart),
Based on the result of the judgment, a first fluctuation pattern (PB1-JA) which is a fluctuation pattern controlled to the advantageous state, a second fluctuation pattern (PA2-2) which is a fluctuation pattern not controlled to the advantageous state, a third fluctuation pattern (PB1-JB) which is a fluctuation pattern controlled to the advantageous state, a fourth fluctuation pattern (PA2-3) which is a fluctuation pattern not controlled to the advantageous state, a fifth fluctuation pattern (PB1-2 to PB1-4) which is a fluctuation pattern controlled to the advantageous state, and a sixth fluctuation pattern (PB1-J) which is a fluctuation pattern not controlled to the advantageous state. determining a fluctuation pattern from among a plurality of fluctuation patterns including a fluctuation pattern (PA2-4 to 6), a seventh fluctuation pattern (PB1-5 to 7/PB1-8 to 10) which is a fluctuation pattern controlled to the advantageous state, an eighth fluctuation pattern (PA2-7 to 9/PA2-10 to 12) which is a fluctuation pattern not controlled to the advantageous state, a ninth fluctuation pattern (PB1-11 to 13) which is a fluctuation pattern controlled to the advantageous state, and a tenth fluctuation pattern (PA2-13 to 15) which is a fluctuation pattern not controlled to the advantageous state;
When the first variation pattern is determined, a first command (a variation pattern designation command designating PB1-JA) is transmitted to the performance control means;
When the second variation pattern is determined, a second command (a variation pattern designation command designating PA2-2) is transmitted to the performance control means;
When the third variation pattern is determined, a third command (a variation pattern designation command designating PB1-JB) is transmitted to the performance control means;
When the fourth variation pattern is determined, a fourth command (a variation pattern designation command designating PA2-3) is transmitted to the performance control means;
When the fifth variation pattern is determined, a fifth command (a variation pattern designation command designating PB1-2 to PB1-4) is transmitted to the performance control means;
When the sixth variation pattern is determined, a sixth command (a variation pattern designation command designating PA2-4 to PA2-6) is transmitted to the performance control means;
When the seventh variation pattern is determined, a seventh command (a variation pattern designation command designating PB1-5 to PB1-7/PB1-8 to PB1-10) is transmitted to the performance control means;
When the eighth variation pattern is determined, an eighth command (a variation pattern designation command designating PA2-7 to PA2-9/PA2-10 to PA2-12) is transmitted to the performance control means;
When the ninth variation pattern is determined, a ninth command (a variation pattern designation command designating PB1-11 to PB1-13) is transmitted to the performance control means;
When the tenth variation pattern is determined, a tenth command (a variation pattern designation command designating PA2-13 to PA2-15) is transmitted to the performance control means;
The performance control means (performance control CPU 120)
When the first command is received, it is possible to notify that the game will be controlled to the advantageous state (jackpot game state) in the first reach (low base weak reach A presentation),
When the second command is received, it is possible to notify that the first reach (low base weak reach A presentation) is not controlled to the advantageous state (jackpot game state),
When the third command is received, it is possible to notify that the game will be controlled to the advantageous state (jackpot game state) in the second reach (low base weak reach B presentation),
When the fourth command is received, it is possible to notify that the second reach (low base weak reach B presentation) is not controlled to the advantageous state (jackpot game state),
When the fifth command is received, it is possible to notify that the third reach (low base strong reach A presentation) will be controlled to the advantageous state (jackpot game state),
When the sixth command is received, it is possible to notify that the third reach (low base strong reach A presentation) is not controlled to the advantageous state (jackpot game state),
When the seventh command is received, it is possible to notify that the fourth reach (low base strong reach B performance/low base strong reach C performance) will be controlled to the advantageous state (jackpot game state),
When the eighth command is received, it is possible to notify that the fourth reach (low base strong reach B performance/low base strong reach C performance) is not controlled to the advantageous state (jackpot game state),
When the ninth command is received, it is possible to notify that the fifth reach (low base strongest reach presentation) will be controlled to the advantageous state (jackpot game state),
When the tenth command is received, it is possible to notify that the fifth reach (low base strongest reach presentation) is not controlled to the advantageous state (jackpot game state),
The first reach (low base weak reach A performance) is configured to include a title display part that displays a title display (title characters) corresponding to the first reach, and an introduction part until the result of the advantageous state is notified,
The second reach includes a title display part that displays a title display (title characters) corresponding to the second reach (low base weak reach B performance), and an introduction part until the result of the advantageous state is notified,
The third reach includes a title display part that displays a title display (title characters) corresponding to the third reach (low base strong reach A performance), and an introduction part until the result of the advantageous state is notified,
The fourth reach includes a title display part that displays a title display (title characters) corresponding to the fourth reach (low base strong reach B effect/low base strong reach C effect), and an introduction part until the result of the advantageous state is notified,
The fifth reach includes a title display part that displays a title display (title characters) corresponding to the fifth reach (low-base strongest reach presentation), and an introduction part until the result of the advantageous state is notified.
The third reach (low base strong reach A performance) and the fourth reach (low base strong reach B performance/low base strong reach C performance) have a higher expectation of being controlled to the advantageous state than the first reach (low base weak reach A performance) and the second reach (low base weak reach B performance),
The fifth reach (low base strongest reach effect) has a higher expectation of being controlled to the advantageous state than any of the first reach (low base weak reach A effect), the second reach (low base weak reach B effect), the third reach (low base strong reach A effect), and the fourth reach (low base strong reach B effect/low base strong reach C effect),
The light emission control means (performance control CPU 120)
Controlling the light emitting means using a luminance data table configured with luminance data;
In the title display part in the first reach (low base weak reach A performance) and the title display part in the second reach (low base weak reach B performance), a brightness data table (weak reach common title) for the first title display part which is common to the first reach is used to control the light emitting means;
In the title display part in the third reach (low base strong reach A performance) and the title display part in the fourth reach (low base strong reach B performance/low base strong reach C performance), the light emitting means is controlled using a common brightness data table (strong reach common title) for the second title display part,
In the title display part in the fifth reach (low base strongest reach performance), the light emitting means is controlled using a brightness data table (strongest reach series strongest reach title) for the third title display part for the fifth reach,
In the introduction part of the first reach (low base weak reach A performance), the light emitting means is controlled using a brightness data table (weak reach system weak reach A introduction) for the introduction part of the first reach,
In the introduction part of the second reach (low base weak reach B performance), the light emitting means is controlled using a brightness data table (weak reach system weak reach B introduction) for the introduction part of the second reach,
In the introduction part of the third reach (low base strong reach A performance), the light emitting means is controlled using a brightness data table (strong reach system strong reach A introduction) for the introduction part of the third reach,
In an introduction part of the fourth reach (low base strong reach B performance/low base strong reach C performance), the light emitting means is controlled using a brightness data table (strong reach system strong reach B introduction/strong reach system strong reach C introduction) for the introduction part of the fourth reach,
In the introductory part of the fifth reach (low base strongest reach presentation), the light emitting means is controlled using a brightness data table (strongest reach system strongest reach introduction) for the introductory part of the fifth reach.
According to this feature, by making the brightness data table corresponding to the title display part common for the high expectation 2 reach and the low expectation 2 reach, an increase in costs and capacity can be prevented, and by using the corresponding brightness data table for each of the introduction parts, it is possible to appropriately stimulate the period until notification of whether or not an advantageous state will be achieved, and further, by providing a dedicated brightness data table for the title display part and introduction part for the reach with the highest expectation, interest is heightened, and as a result, an ideal title display can be achieved.

[Form 46]
The gaming machine of form 46-1 is
A gaming machine (pachinko gaming machine 1) that can be controlled to a favorable state (jackpot gaming state) that is advantageous to a player by executing a variable display of specific identification information (first special chart, second special chart) and deriving a specific display result (a special chart display result of "jackpot") as a result of the variable display of the specific identification information,
A game control means (a game control microcomputer 100);
A performance control means (performance control CPU 120);
A display means (image display device 5);
A plurality of light emitting means (frame LEDs LWL1 to LWL12, frame LEDs LWR2 to LWR12, logo LEDs LL1 to LL4, decorative LEDs LS1 to LS5, and attacca lamps LA1 to LA4);
A light emission control means (performance control CPU 120);
The game control means (game control microcomputer 100)
When the game medium (game ball) enters the start area (first start winning hole, second start winning hole), it is determined whether or not the game medium is controlled to the advantageous state (jackpot game state);
Execute variable display of the specific identification information (first special chart, second special chart),
Based on the result of the judgment, a first fluctuation pattern (PB1-JA, PB1-JB) which is a fluctuation pattern controlled to the advantageous state, and a second fluctuation pattern (PA2-2, PA2-3) which is a fluctuation pattern not controlled to the advantageous state are selected from a plurality of fluctuation patterns;
When the first variation pattern is determined, a first command (a variation pattern designation command designating (PA2-2, PA2-3)) is transmitted to the performance control means;
When the second variation pattern is determined, a second command (a variation pattern designation command designating PA2-2 and PA2-3) is transmitted to the performance control means;
The performance control means (performance control CPU 120)
When the first command is received, it is possible to notify that the game will be controlled to the advantageous state (jackpot game state) in a specific reach (low base weak reach A, B performance),
When the second command is received, it is possible to notify that the specific reach (low base weak reach A, B performance) is not controlled to the advantageous state (jackpot game state),
The specific reach (low base weak reach A, B performance) is configured to include a title display part that displays a title display (title character) corresponding to the specific reach, and an introduction part until the result of the control of the advantageous state is notified,
The display means (image display device 5)
The title display (title characters) corresponding to the specific reach (low base weak reach A, B performance) can be changed from a first state (white) to a second state (red or gold) and displayed.
The light emission control means (performance control CPU 120)
Controlling the light emitting means using a luminance data table configured with luminance data;
In the title display part in the specific reach (low base weak reach A, B performance), when the title display (title characters) is not changed to the second mode (red or gold), a first brightness data table (weak reach common title (white)) is used to control the light emitting means,
In the title display part in the specific reach (low base weak reach A, B performance), when the title display (title characters) is changed to a second mode (red or gold), the light emitting means is controlled using a second brightness data table (weak reach common title (red) or weak reach common title (gold));
In the introductory part of the specific reach (low base weak reach A, B performance), regardless of whether the title display (title characters) corresponding to the specific reach has changed to the second form (red or gold) or not, the light-emitting means is controlled using a common brightness data table for the introductory part (weak reach system weak reach A introduction, weak reach system weak reach B introduction).
According to this feature, by using a common brightness data table corresponding to each introduction part whether the title display is not changed to the second mode in the title display part of a specific reach or is changed to the second mode, an increase in cost and capacity is prevented, and by using a corresponding brightness data table for each title display part, it is possible to appropriately present the title display whether the title display is not changed to the second mode or is changed to the second mode, resulting in an appropriate title display.

[Form 47]
The gaming machine of form 47-1 is
A gaming machine (pachinko gaming machine 1) that can be controlled to a favorable state (jackpot gaming state) that is advantageous to a player by executing a variable display of specific identification information (first special chart, second special chart) and deriving a specific display result (a special chart display result of "jackpot") as a result of the variable display of the specific identification information,
A game control means (a game control microcomputer 100);
A performance control means (performance control CPU 120);
A display means (image display device 5);
A plurality of light emitting means (frame LEDs LWL1 to LWL12, frame LEDs LWR2 to LWR12, logo LEDs LL1 to LL4, decorative LEDs LS1 to LS5, and attacca lamps LA1 to LA4);
A light emission control means (performance control CPU 120);
The game control means (game control microcomputer 100)
When the game medium (game ball) enters the start area (first start winning hole, second start winning hole), it is determined whether or not the game medium is controlled to the advantageous state (jackpot game state);
Execute variable display of the specific identification information (first special chart, second special chart),
Based on the result of the judgment, a first fluctuation pattern (PB1-JA, PB1-JB) which is a fluctuation pattern controlled to the advantageous state, and a second fluctuation pattern (PA2-2, PA2-3) which is a fluctuation pattern not controlled to the advantageous state are selected from a plurality of fluctuation patterns;
When the first variation pattern is determined, a first command (a variation pattern designation command designating (PA2-2, PA2-3)) is transmitted to the performance control means;
When the second variation pattern is determined, a second command (a variation pattern designation command designating PA2-2 and PA2-3) is transmitted to the performance control means;
The performance control means (performance control CPU 120)
When the first command is received, it is possible to notify that the game will be controlled to the advantageous state (jackpot game state) in a specific reach (low base weak reach A, B performance),
When the second command is received, it is possible to notify that the specific reach (low base weak reach A, B performance) is not controlled to the advantageous state (jackpot game state),
The specific reach (low base weak reach A, B performance) is configured to include a title display part that displays a title display (title character) corresponding to the specific reach, and an introduction part until the result of the control of the advantageous state is notified,
The title display part in the specific reach (low base weak reach A, B performance) is,
A first part (title start period) from when the title display corresponding to the specific reach starts to when the title display is displayed at a fixed position;
A second part (title display period, title end period) after the title display corresponding to the specific reach (low base weak reach A, B performance) is displayed at the fixed position,
The performance control means (performance control CPU 120)
Controlling the light emitting means using a luminance data table configured with luminance data;
In the first part (title start period) of the title display part in the specific reach (low base weak reach A, B performance), a brightness data table (weak reach title start) for the first part is used to control the light emitting means,
In the second part (title display period, title end period) of the title display part in the specific reach (low base weak reach A, B performance), a brightness data table for the second part (weak reach title display) is used to control the light emitting means,
In the introductory part of the specific reach (low base weak reach A, B performance), the light emitting means is controlled using a brightness data table for the introductory part (weak reach system weak reach A introduction, weak reach system weak reach B introduction).
According to this feature, by using a brightness data table corresponding to the first part from when the title display starts to be displayed in the fixed position in a specific reach until the title display is displayed in the fixed position, a brightness data table corresponding to the second part after the title display is displayed in the fixed position, and a brightness data table corresponding to the introduction part, it is possible to suitably stimulate the period during which the title display is performed and the period until notification of whether or not an advantageous state will be achieved, and as a result, it is possible to perform an appropriate title display.

[Example]
DETAILED DESCRIPTION OF THE PREFERRED EMBODIMENTS A gaming machine according to an embodiment of the present invention will be described below.

[Basic explanation]
First, the basic configuration and control of the pachinko gaming machine 1 (which is also the configuration and control of a general pachinko gaming machine) will be described.

[Configuration of Pachinko Game Machine 1]
1 is a front view of a pachinko game machine 1, showing the layout of the main components. The pachinko game machine (game machine) 1 is broadly composed of a game board (gauge board) 2 that constitutes the game board surface, and a game machine frame (base frame) 3 that supports and fixes the game board 2. A game area is formed on the game board 2, and game balls as game media are shot into this game area by a predetermined ball shooting device.

Note that the "variable display" of special symbols means, for example, a variable display of multiple types of special symbols (the same applies to other symbols described below). The variations include updating the display of multiple symbols, scrolling the display of multiple symbols, transforming one or more symbols, and enlarging/reducing one or more symbols. In the variation of special symbols and normal symbols described below, multiple types of special symbols or normal symbols are updated and displayed. In the variation of decorative symbols described below, multiple types of decorative symbols are scrolled or updated, or one or more decorative symbols are transformed or enlarged/reduced. Note that variations also include a mode in which a certain symbol is displayed flashing. At the end of the variable display, a specified special symbol is displayed stationary (also called derived or derived display) as the display result (the same applies to the variable display of other symbols described below). Note that the variable display may be expressed as a variable display or variation.

The special pattern variably displayed on the first special pattern display device 4A is also called the "first special pattern," and the special pattern variably displayed on the second special pattern display device 4B is also called the "second special pattern." A special pattern game using the first special pattern is also called the "first special pattern game," and a special pattern game using the second special pattern is also called the "second special pattern game." There may be only one type of special pattern display device that variably displays the special patterns.

An image display device 5 is provided near the center of the play area on the game board 2. The image display device 5 is composed of, for example, an LCD (liquid crystal display device) or an organic EL (electro luminescence) device, and displays various presentation images. The image display device 5 may also be composed of a projector and a screen. Various presentation images are displayed on the image display device 5.

For example, on the screen of the image display device 5, in synchronization with the first special game or the second special game, multiple types of decorative patterns (such as patterns showing numbers, etc.) that are different from the special patterns are variably displayed as decorative identification information. Here, in synchronization with the first special game or the second special game, decorative patterns are variably displayed (for example, scrolled up and down or updated) in each of the "left", "middle" and "right" decorative pattern display areas 5L, 5C, 5R. Note that the special game and the variable display of decorative patterns that are executed in synchronization are collectively referred to as simply variable display.

The screen of the image display device 5 may be provided with a display area for displaying a pending display corresponding to a variable display whose execution is pending, and an active display corresponding to a variable display that is being executed. The pending display and the active display are collectively referred to as a variable display-compatible display corresponding to the variable display.

The number of reserved variable displays is also referred to as the reserved memory number. The reserved memory number corresponding to the first special game is also referred to as the first reserved memory number, and the reserved memory number corresponding to the second special game is also referred to as the second reserved memory number. The sum of the first reserved memory number and the second reserved memory number is also referred to as the total reserved memory number.

A first hold indicator 25A and a second hold indicator 25B, each of which includes a plurality of LEDs, are provided at predetermined positions on the game board 2. The first hold indicator 25A displays the first hold memory number by the number of lit LEDs. The second hold indicator 25B displays the second hold memory number by the number of lit LEDs.

A winning ball device 6A is provided below the image display device 5, and a variable winning ball device 6B is provided to the right of the winning ball device 6A.

The winning ball device 6A forms a first start winning hole that is always kept in a constant open state so that game balls can enter, for example, by a specified ball receiving member. When a game ball enters the first start winning hole, a specified number of prize balls (for example, three) are paid out and the first special game can be started.

The variable winning ball device 6B (normal electric device) forms a second start winning hole that changes between a closed state and an open state by the solenoid 81 (see FIG. 3). The variable winning ball device 6B, for example, has an electric tulip-type device having a pair of movable pieces, and when the solenoid 81 is in the off state, the movable pieces are in a vertical position, so that the tip of the movable pieces approaches the winning ball device 6A, and the second start winning hole is in a closed state in which the game ball does not enter (also referred to as the second start winning hole being in a closed state). On the other hand, when the solenoid 81 is in the on state, the movable pieces of the variable winning ball device 6B are in a tilted position, so that the second start winning hole is in an open state in which the game ball can enter (also referred to as the second start winning hole being in an open state). When a game ball enters the second start winning hole, a predetermined number of prize balls (for example, three) are paid out and the second special game can be started. The variable winning ball device 6B may be any device that can change between a closed state and an open state, and is not limited to devices that include an electric tulip-type device.

At predetermined positions on the game board 2 (in the example shown in FIG. 1, three locations are provided at the lower left of the game area and one location is provided above the variable winning ball device 6B), general winning openings 10 are provided which are always kept in a constant open state by a predetermined ball receiving member. In this case, when a game ball enters one of the general winning openings 10, a predetermined number of game balls (for example, 10 balls) are paid out as prize balls.

A special variable winning ball device 7 having a large winning opening is provided between the winning ball device 6A and the variable winning ball device 6B. The special variable winning ball device 7 has a large winning opening door that is driven to open and close by a solenoid 82 (see Figure 3), and the large winning opening door forms the large winning opening as a specific area that can be switched between an open state and a closed state.

As an example, in the special variable winning ball device 7, when the solenoid 82 for the large prize opening door (for the special electric device) is in the OFF state, the large prize opening door closes the large prize opening, and game balls cannot enter (pass through) the large prize opening. On the other hand, in the special variable winning ball device 7, when the solenoid 82 for the large prize opening door is in the ON state, the large prize opening door opens the large prize opening, and game balls can easily enter the large prize opening.

When a game ball enters the large prize opening, a predetermined number of game balls (for example, 14 balls) are paid out as prize balls. When a game ball enters the large prize opening, more prize balls are paid out than when a game ball enters the first start prize opening, the second start prize opening, or the general prize opening 10, for example.

The entry of a game ball into each winning port, including the general winning port 10, is also referred to as a "winning". In particular, a winning ball into the starting port (first starting winning port, second starting winning port) is also referred to as a starting winning port.

A normal symbol display 20 is provided at a predetermined position on the game board 2 (the lower left of the game area in the example shown in FIG. 1). As an example, the normal symbol display 20 is made up of a 7-segment LED or the like, and performs a variable display of normal symbols as multiple types of normal identification information different from the special symbols. The normal symbols are represented by numbers showing "0" to "9" or lighting patterns such as "-". The normal symbols may also include a pattern in which all LEDs are turned off. Such a variable display of normal symbols is also called a normal symbol game.

A pass gate 41 through which the game ball can pass is provided to the right of the image display device 5. When the game ball passes through the pass gate 41, a regular game is executed.

A regular symbol pending display 25C is provided below the regular symbol display 20. The regular symbol pending display 25C is configured to include, for example, four LEDs, and displays the regular symbol pending memory count, which is the number of regular symbol games that are pending execution, by the number of lit LEDs.

In addition to the above features, the surface of the game board 2 is provided with windmills that change the direction and speed of the game balls, as well as numerous obstacle nails. At the bottom of the game area, there is an outlet that takes in game balls that do not enter any of the winning holes.

Speakers 8L, 8R for playing and outputting sound effects and the like are provided at the upper left and right positions of the gaming machine frame 3. A main lamp 9a is provided above the image display device 5 on the gaming machine frame 3, and frame lamps 9b are provided on the left and right of the main lamp 9a so as to surround the playing area. Furthermore, an attacca lamp 9c is provided near the special variable winning ball device 7 on the gaming board 2.

At a predetermined position on the game board 2 (above the image display device 5 in FIG. 1), a movable body 32 (described later) that operates according to the performance is provided. The movable body 32 is also provided with a movable body lamp 9d. The movable body lamp 9d and the above-mentioned main lamp 9a, frame lamp 9b, and attacca lamp 9c may be collectively referred to as the game effect lamp 9. The main lamp 9a, frame lamp 9b, attacca lamp 9c, and movable body lamp 9d are each configured to include an LED.

At the lower right position of the gaming machine frame 3, a ball-hitting operation handle (operation knob) 30 is provided, which is operated by the player or the like to launch the gaming ball toward the gaming area using the ball-hitting device.

At a predetermined position of the gaming machine frame 3 below the playing area, a ball supply tray (upper tray) is provided to hold (store) gaming balls dispensed as prize balls or game balls loaned from a predetermined ball loaning machine so that they can be supplied to the ball launching device. In addition to the upper tray, the gaming machine frame 3 may also be provided with a payout section (ball supply tray) from which prize balls are paid out when the upper tray is full.

A stick controller 31A that can be held and tilted by the player is attached to a predetermined position on the gaming machine frame 3 below the playing area. The stick controller 31A is provided with a trigger button that can be pressed by the player. Operations on the stick controller 31A are detected by the controller sensor unit 35A (see FIG. 3).

At a predetermined position on the gaming machine frame 3 below the playing area, a push button 31B is provided that the player can press to give a predetermined command. The operation of the push button 31B is detected by a push sensor 35B (see FIG. 3).

In the pachinko gaming machine 1, a stick controller 31A and a push button 31B are provided as detection means for detecting the player's actions (operations, etc.), but other detection means may also be provided.

Figure 2 is a rear perspective view of the pachinko gaming machine 1. The main board 11, housed in a board case 201, is mounted on the rear of the pachinko gaming machine 1. The main board 11 is provided with a setting key 51 and a setting change switch 52. The setting key 51 functions as a lock switch for switching to a setting change state or a setting confirmation state. The setting change switch 52 functions as a setting switch for changing settings such as the probability of winning a jackpot and the ball payout rate in the setting change state. The setting key 51 and the setting change switch 52 may be attached to the outside of the main board 11, for example, at a predetermined position on the power supply board 17.

A display monitor 29 is disposed in the center of the back surface of the main board 11, and a display changeover switch 31 is disposed to the side of the display monitor 29. The display monitor 29 may be configured, for example, using a seven-segment LED display device. The display monitor 29 and the display changeover switch 31 are disposed directly in front of the main board 11 when the back surface of the game board 2 is viewed with the game machine frame 3 open.

The display monitor 29 can display winning information such as consecutive win ratio, winning combination ratio, and base. The consecutive win ratio is the ratio of the number of winning balls that have entered the large winning port (attacker) to the total number of winning balls. The winning combination ratio is the ratio of the number of winning balls that have entered the second start winning port (electric chute) and the number of winning balls that have entered the large winning port (attacker) to the total number of winning balls. The base is the ratio of the total number of winning balls to the number of game balls shot out. When in a setting change state or a setting confirmation state, the display monitor 29 can display the setting values in the pachinko gaming machine 1. When in a setting change state or a setting confirmation state, the display monitor 29 may display setting values to be changed or confirmed.

When the gaming machine frame 3 is closed, the setting key 51 and the setting changeover switch 52 cannot be operated from the front side of the pachinko gaming machine 1. The gaming machine frame 3 is provided with a rotatable glass door frame 3a having a glass window, and is configured so that the gaming area can be opened and closed by the glass door frame 3a. When the glass door frame 3a is closed, the gaming area can be seen through the glass window.

In the pachinko gaming machine 1, a security cover 50A is attached to the right end of the outer frame 1a, which is formed in a vertically long rectangular frame shape. When the gaming machine frame 3 is closed, the security cover 50A covers the right side of the board case 201, including the setting key 51 and the setting changeover switch 52, from the rear side. The security cover 50A is a roughly L-shaped member including a short piece 50Aa and a long piece 50Ab, and may be made of a transparent synthetic resin.

[Outline of game progress]
The game ball is launched toward the game area by the player rotating the ball hitting operation handle 30 provided on the pachinko game machine 1. When the game ball passes through the passing gate 41, a normal game is started by the normal symbol display 20. If the game ball passes through the passing gate 41 during the period during which the previous normal game is being played (if the game ball passes through the passing gate 41 but the normal game based on the passing cannot be played immediately), the normal game based on the passing is put on hold up to a predetermined upper limit (for example, 4).

In this normal game, if a specific normal symbol (a normal winning symbol) is displayed as a fixed normal symbol, the display result of the normal symbol will be "normal winning". On the other hand, if a normal symbol other than a normal winning symbol (a normal losing symbol) is displayed as a fixed normal symbol, the display result of the normal symbol will be "normal losing". When a "normal winning" occurs, an opening control is performed to keep the variable winning ball device 6B in an open state for a predetermined period of time (the second starting winning port is opened).

When a game ball enters the first start winning hole formed in the winning ball device 6A, the first special symbol game is started by the first special symbol display device 4A.

When a game ball enters the second start winning hole formed in the variable winning ball device 6B, a second special game is started by the second special pattern display device 4B.

In addition, if the game ball enters (wins) the start winning hole during the period when the special game is being played or during the period when the game is controlled to the jackpot game state described below (when a start winning occurs but the special game based on the start winning cannot be played immediately), the special game based on that entry will be put on hold until a specified upper limit number (for example, 4) is reached.

In the special game, if a specific special symbol (a jackpot symbol, for example, "7"; the actual symbol varies depending on the type of jackpot, as described below) is displayed as a confirmed special symbol, it is a "jackpot", and if a special symbol different from the jackpot symbol (a losing symbol, for example, "-") is displayed as a stopped symbol, it is a "miss". Note that "misses" in this pachinko game machine 1 include "misses with time reduction" that are controlled to a high base state (time reduction state) from the next variable display without going through a jackpot game.

After the display result in the special game becomes "jackpot," the game is controlled to a jackpot game state, which is an advantageous state for the player.

In the jackpot game state, the large prize opening formed by the special variable prize ball device 7 is opened in a predetermined manner. This open state continues until either a predetermined period of time (e.g., 29 seconds or 1.8 seconds) has elapsed, or the number of game balls that have entered the large prize opening reaches a predetermined number (e.g., 9), whichever comes first. The predetermined period is the maximum period during which the large prize opening can be opened in one round, and is hereinafter also referred to as the maximum opening period. This cycle in which the large prize opening is open is called a round (round game). In the jackpot game state, the round can be repeated until the predetermined maximum number of times (15 times or 2 times) is reached.

In the jackpot gaming state, the player can get prize balls by making the gaming ball enter the big prize opening. Therefore, the jackpot gaming state is an advantageous state for the player. The more rounds there are in the jackpot gaming state, and the longer the upper limit opening period, the more advantageous it is for the player.

A jackpot type is set for a "jackpot." For example, there are multiple types of opening modes of the jackpot opening (number of rounds or maximum opening period) and game states after a jackpot game state (normal state, time-saving state, special state, etc.), and the jackpot type is set according to these. There may be jackpot types that offer many prize balls, jackpot types that offer few prize balls, or jackpot types that offer almost no prize balls.

After the jackpot game state ends, the game may be controlled to a time-saving state or a special state depending on the type of jackpot mentioned above.

In the time-saving state, control (time-saving control) is executed to shorten the average special symbol fluctuation time (period during which the special symbol fluctuates) more than in the normal state. In the time-saving state, control (high opening control, high base control) is also executed to make it easier for the game ball to enter the second start winning hole by shortening the average regular symbol fluctuation time (period during which the regular symbol fluctuates) more than in the normal state and by improving the probability of a "regular symbol hit" in the regular symbol game more than in the normal state. The time-saving state is an advantageous state for the player because it is a state in which the fluctuation efficiency of special symbols (especially the second special symbol) is improved.

In the probability variable state (probability fluctuating state), in addition to time-saving control, probability variable control is executed, which increases the probability that the display result will be a "jackpot" compared to the normal state. The probability variable state is an even more advantageous state for the player, as it not only improves the efficiency of special symbol fluctuation, but also makes it easier to get a "jackpot."

The time-saving state or the probability of a special bonus state will continue until one of the end conditions is met first, such as the specified number of special games being played or the start of the next big win game state. The end condition of the state in which the specified number of special games have been played is also called a count-cut (count-cut time-saving state, count-cut probability of a special bonus state, etc.).

The normal state refers to a game state other than advantageous states such as a jackpot game state that is advantageous to the player, and special states such as a time-saving state and a probability-varying state, and is a state in which the pachinko game machine 1, such as the probability that the display result in the normal game will be a "normal hit" and the probability that the display result in the special game will be a "jackpot", is controlled in the same way as the initial setting state of the pachinko game machine 1 (for example, when a system reset is performed and the specified return process is not executed after the power is turned on).

The state in which probability variable control is being executed is also called a high probability state, and the state in which probability variable control is not being executed is also called a low probability state. The state in which time-saving control is being executed is also called a high base state, and the state in which time-saving control is not being executed is also called a low base state. Combining these, the time-saving state is also called a low probability/high base state, the probability variable state is a high probability/high base state, and the normal state is a low probability/low base state. A high probability state and a low base state is also called a high probability low base state.

The game state may change based on the game ball passing through a specific area (e.g., a specific area in a big prize opening) during a big win game state. For example, when the game ball passes through a specific area, the game state may be controlled to a high probability state after the big win game state.

[Progress of the production, etc.]
In the pachinko game machine 1, various effects (effects to notify the progress of the game or to liven up the game) are executed according to the progress of the game. The effects are described below. The effects are executed by displaying various effect images on the image display device 5, but in addition to or instead of the display, sound output from the speakers 8L and 8R, turning on and off the game effect lamp 9, operation of the movable body 32, or any effect device including some or all of these may be used.

As an effect that is executed according to the progress of the game, in the "left", "middle" and "right" decorative pattern display areas 5L, 5C and 5R provided on the image display device 5, a variable display of decorative patterns begins in response to the start of the first or second special pattern game. At the timing when the display result (also called the determined special pattern) in the first or second special pattern game is displayed statically, the determined decorative pattern (a combination of three decorative patterns) which is the display result of the variable display of the decorative patterns is also displayed statically (derived).

During the period from when the variable display of the decorative symbols starts to when it ends, the state of the variable display of the decorative symbols may become a predetermined reach state (a reach is achieved). Here, a reach state refers to a state in which the decorative symbols that have not yet been stopped and displayed on the screen of the image display device 5 continue to be variable displayed when the decorative symbols that have not yet been stopped and displayed form part of a jackpot combination, which will be described later.

In addition, when the above-mentioned reach state occurs during the variable display of the decorative symbols, a reach effect is executed. In the pachinko gaming machine 1, multiple types of reach effects are executed, which have different rates of the display result (the display result of the special game or the display result of the variable display of the decorative symbols) becoming a "jackpot" (also called the jackpot reliability or jackpot expectation rate) depending on the performance state. Reach effects include, for example, a normal reach and a super reach, which has a higher jackpot reliability than a normal reach.

When the display result of the special game is a "jackpot", a fixed decorative pattern that is a predetermined jackpot combination is derived as the display result of the variable display of decorative patterns on the screen of the image display device 5 (the display result of the variable display of decorative patterns is a "jackpot"). As an example, the same decorative patterns (for example, "7") are displayed stopped in line on a predetermined effective line in the "left", "center", and "right" decorative pattern display areas 5L, 5C, and 5R.

In the case of a "probability jackpot" that is controlled to a probability jackpot state after the end of the jackpot game state, odd decorative symbols (e.g., "7") are displayed in a line, and in the case of a "non-probability jackpot (normal jackpot)" that is not controlled to a probability jackpot state after the end of the jackpot game state, even decorative symbols (e.g., "6") may be displayed in a line. In this case, odd decorative symbols are also called probability jackpot symbols, and even decorative symbols are also called non-probability jackpot symbols (normal symbols). After a reach state is reached with non-probability jackpot symbols, a promotion effect may be executed that ultimately results in a "probability jackpot".

When the display result of the special game is a "miss," the state of the variable display of the decorative pattern does not become a reach state, and the display result of the variable display of the decorative pattern may display a fixed decorative pattern of a non-reach combination (also called a "non-reach miss") as a "non-reach miss" (the display result of the variable display of the decorative pattern may be a "non-reach miss"). Also, when the display result is a "miss," after the state of the variable display of the decorative pattern becomes a reach state, the display result of the variable display of the decorative pattern may display a fixed decorative pattern of a predetermined reach combination (also called a "reach miss") that is not a jackpot combination as a "reach miss" (the display result of the variable display of the decorative pattern may be a "reach miss").

The effects that the pachinko gaming machine 1 can execute include displaying the variable display compatible display (reserved display or active display) described above. In addition, as other effects, for example, a preview effect that predicts the jackpot reliability is executed during the variable display of the decorative pattern. Preview effects include a preview effect that predicts the jackpot reliability in the variable display currently being executed, and a pre-reading preview effect that predicts the jackpot reliability in the variable display before execution (variable display whose execution is on hold). As a pre-reading preview effect, an effect that changes the display mode of the variable display compatible display (reserved display or active display) to a mode different from normal may be executed.

In addition, the image display device 5 may temporarily stop the decorative pattern during the variable display of the decorative pattern and then resume the variable display, thereby executing a pseudo consecutive performance in which a single variable display appears to be multiple variable displays.

Even during a jackpot game state, a jackpot performance is executed to notify the player of the jackpot game state. The jackpot performance may be a performance to notify the player of the number of rounds or a promotion performance to show that the value of the jackpot game state is increasing.

In addition, for example, when a special game or the like is not being executed, a demo (demonstration) image is displayed on the image display device 5 (a customer waiting demo performance is executed).

[Board configuration]
The pachinko game machine 1 is equipped with a main board 11, a performance control board 12, a sound control board 13, a lamp control board 14, a relay board 15, and the like, as shown in Fig. 3. In addition, various boards, such as a payout control board, an information terminal board, and a launch control board, are arranged on the back of the pachinko game machine 1. Furthermore, a power supply board 17 is also equipped. The various control boards are not only electronic circuit boards such as printed wiring boards on which conductor patterns are formed and on which electrical components can be mounted, but also electronic circuit mounting boards configured to realize specific electrical functions by mounting electrical components on the electronic circuit board.

A power switch 91 is connected to the power supply board 17, and by operating the power supply switch 91 (turning it ON), power from an AC power source such as an external power source such as a commercial power supply, such as 100V AC, can be supplied from the power supply board 17 to electrical components including various control boards such as the main board 11 and the performance control board 12. The power supply board 17 is equipped with, for example, a rectifier circuit for converting alternating current (AC) to direct current (DC), and a power supply circuit for converting a specified DC voltage to a specific DC voltage (for example, 12V DC or 5V DC).

The main board 11 is the main control board, and has the function of controlling the progress of the above-mentioned games in the pachinko game machine 1 (execution of special games (including reserved game management), execution of regular games (including reserved game management), jackpot game status, game status, etc.). The main board 11 has a game control microcomputer 100, a switch circuit 110, a solenoid circuit 111, etc.

The game control microcomputer 100 mounted on the main board 11 is, for example, a one-chip microcomputer, and includes a ROM (Read Only Memory) 101, a RAM (Random Access Memory) 102, a CPU (Central Processing Unit) 103, a random number circuit 104, and an I/O (Input/Output port) 105.

The CPU 103 executes the programs stored in the ROM 101 to perform processes that control the progress of the game (processes that realize the functions of the main board 11). At this time, various data stored in the ROM 101 (such as data on fluctuation patterns, performance control commands, and tables referenced when making various decisions) are used, and the RAM 102 is used as the main memory. The RAM 102 serves as a backup RAM in which the stored contents are preserved for a predetermined period of time even if the power supply to the pachinko gaming machine 1 is stopped in part or in whole. It is also possible to deploy all or part of the programs stored in the ROM 101 to the RAM 102 and execute them on the RAM 102.

The random number circuit 104 counts updatable numerical data indicating various random numbers (game random numbers) used to control the progress of the game. The game random numbers may be updated by the CPU 103 executing a specific computer program (updated by software).

The I/O 105 is configured to include, for example, an input port to which various signals (detection signals described below) are input, and an output port for transmitting various signals (signals for controlling (driving) the first special pattern display device 4A, the second special pattern display device 4B, the normal pattern display device 20, the first hold display device 25A, the second hold display device 25B, the normal hold display device 25C, etc., solenoid drive signals).

The switch circuit 110 takes in detection signals (such as a detection signal indicating that a game ball has passed or entered and the switch has been turned on) from various switches for detecting game balls (gate switch 21, start port switch (first start port switch 22A and second start port switch 22B), count switch 23), and transmits them to the game control microcomputer 100. The transmission of the detection signal indicates that the game ball has passed or entered.

The switch circuit 110 receives a reset signal, a power-off signal, and a clear signal from the power supply board 17 and transmits them to the game control microcomputer 100. The reset signal is an operation stop signal for stopping the operation of control circuits such as the game control microcomputer 100, and can be output using either a power supply monitoring circuit, an IC with a built-in watchdog timer, or a system reset IC. The power-off signal is turned off when the specified power supply voltage used in the pachinko game machine 1 exceeds a specified value, and is turned on when the period during which the specified power supply voltage is below the specified value continues for longer than the power-off reference time. The clear signal is turned on in response to, for example, pressing the clear switch 92 provided on the power supply board 17.

The solenoid circuit 111 transmits solenoid drive signals (such as signals to turn on solenoid 81 and solenoid 82) from the game control microcomputer 100 to the solenoid 81 for the normal electric device and the solenoid 82 for the large prize opening door.

The main board 11 is connected to a display monitor 29, a display changeover switch 31, a setting key 51, a setting changeover switch 52, and a door open sensor 90. The door open sensor 90 detects the opening of the gaming machine frame 3, including the glass door frame 3a.

As part of controlling the progress of the game, the main board 11 (game control microcomputer 100) supplies presentation control commands (commands that specify (notify) the progress of the game, etc.) to the presentation control board 12 in accordance with the progress of the game. The presentation control commands output from the main board 11 are relayed by the relay board 15 and supplied to the presentation control board 12. The presentation control commands include, for example, commands that specify various determination results in the main board 11 (for example, the display results of the special game (including the type of jackpot), the variable pattern used when executing the special game (described in detail later)), the game status (for example, the start or end of the variable display, the opening status of the jackpot opening, the occurrence of a win, the number of reserved memories, the game status), the occurrence of an error, etc.

The performance control board 12 is a sub-control board independent of the main board 11, and has the function of receiving performance control commands and executing performances (various performances according to the progress of the game, including various notifications such as driving the movable body 32, notifying errors, and notifying of power outage recovery) based on the received performance control commands.

The performance control board 12 is equipped with a performance control CPU 120, a ROM 121, a RAM 122, a display control unit 123, a random number circuit 124, and an I/O 125.

The performance control CPU 120 executes the programs stored in the ROM 121 to perform processing for executing performances together with the display control unit 123 (processing for realizing the above-mentioned functions of the performance control board 12, including determining the performance to be executed). At this time, various data (data such as various tables) stored in the ROM 121 are used, and the RAM 122 is used as the main memory.

The presentation control CPU 120 may instruct the display control unit 123 to execute a presentation based on detection signals from the controller sensor unit 35A and the push sensor 35B (signals that are output when an operation by the player is detected and that appropriately indicate the content of the operation).

The display control unit 123 includes a VDP (Video Display Processor), CGROM (Character Generator ROM), VRAM (Video RAM), etc., and executes the performance based on instructions to execute the performance from the performance control CPU 120.

The display control unit 123 displays a performance image on the image display unit 5 by supplying a video signal corresponding to the performance to be executed to the image display unit 5 based on an instruction to execute the performance from the performance control CPU 120. The display control unit 123 further supplies a sound designation signal (a signal designating the sound to be output) to the sound control board 13 and a lamp signal (a signal designating the on/off state of the lamp) to the lamp control board 14 in order to output sound synchronized with the display of the performance image and to turn on/off the game effect lamp 9. The display control unit 123 also supplies a signal to operate the movable body 32 to the movable body 32 or to a drive circuit that drives the movable body 32.

The audio control board 13 is equipped with various circuits that drive the speakers 8L and 8R, and drives the speakers 8L and 8R based on the sound designation signal, causing the speakers 8L and 8R to output the sound designated by the sound designation signal.

The lamp control board 14 is equipped with various circuits that drive the game effect lamp 9, and drives the game effect lamp 9 based on the lamp signal, turning the game effect lamp 9 on and off in the manner specified by the lamp signal. In this way, the display control unit 123 controls the sound output and the turning on and off of the lamp.

In addition, the control of sound output, turning on/off of the lamp (such as supplying a sound designation signal or a lamp signal), and control of the movable body 32 (such as supplying a signal to operate the movable body 32) may be performed by the performance control CPU 120.

The random number circuit 124 counts updatable numerical data indicating various random number values (random numbers for performance) used to execute various performances. The random numbers for performance may be updated by the performance control CPU 120 executing a specific computer program (updated by software).

The I/O 125 mounted on the performance control board 12 includes an input port for taking in performance control commands transmitted from, for example, the main board 11, and an output port for transmitting various signals (video signals, sound designation signals, lamp signals).

Boards other than the main board 11, such as the performance control board 12, the sound control board 13, and the lamp control board 14, are also called sub-boards. As with the pachinko game machine 1, multiple sub-boards may be provided for different functions, or one sub-board may be configured to have multiple functions.

[Action]
Next, the operation (function) of the pachinko gaming machine 1 will be described.

[Major operations of main board 11]
First, a description will be given of the main operations of the main board 11. When power supply to the pachinko gaming machine 1 is started, the game control microcomputer 100 is started, and a game control main process is executed by the CPU 103. Fig. 4 is a flowchart showing the game control main process executed by the CPU 103 on the main board 11.

In the game control main process shown in FIG. 4, the CPU 103 first sets interrupts to be prohibited (step S1). Then, it performs the necessary initial settings (step S2). The initial settings include setting the stack pointer, register settings for built-in devices (CTC (counter/timer circuit), parallel input/output port, etc.), and setting the RAM 102 to be accessible.

Next, it is determined whether the recovery condition is met (step S3). The recovery condition can be met when the clear signal is off, backup data is present, and the backup RAM is normal. When power supply to the pachinko gaming machine 1 is started, if the clear switch provided on the power supply board 17 is pressed, for example, an on-state clear signal is input to the game control microcomputer 100. If such an on-state clear signal is input, it is sufficient to determine in step S3 that the recovery condition is not met. The backup data only needs to be able to be stored in the RAM 102, which serves as the backup RAM for game control. In step S3, it is sufficient to check or inspect the presence or absence of backup data and the presence or absence of data errors to determine whether the recovery condition can be met.

If the recovery condition is met (step S3; Yes), recovery processing (step S4) is executed, followed by setting confirmation processing (step S5). The recovery processing in step S4 sets a working area based on the contents stored in RAM 102. By setting the working area using the backup data stored in RAM 102, the game state when the power supply was stopped is restored, and if, for example, a special symbol was changing, it is sufficient if the change of the special symbol can be resumed from the state before the stoppage.

If the recovery condition is not met (step S3; No), an initialization process (step S6) is executed, and then a setting change process (step S7) is executed. The initialization process in step S6 includes a clearing process that clears flags, counters, and buffers stored in RAM 102, and the execution of the clearing process sets initial values in the working area.

In the setting confirmation process of step S5, it is determined whether a predetermined setting confirmation condition is met. The setting confirmation condition is met, for example, when power supply is started, the detection signal from the door open sensor 90 is in the ON state and the setting key 51 is turned ON. The setting confirmation process of step S5 is executed when the recovery condition is met in step S3, including the clear signal being in the OFF state. Therefore, since the setting confirmation condition can be met when the clear signal is in the OFF state, the clear signal being in the OFF state can also be included in the setting confirmation condition.

If the setting confirmation condition is met in the setting confirmation process of step S5, the pachinko gaming machine 1 enters a setting confirmation state in which the setting values set therein can be confirmed, and a setting confirmation start command is sent from the main board 11 to the performance control board 12. In the setting confirmation state, the setting values set in the pachinko gaming machine 1 can be confirmed by viewing them on the display monitor 29. When the setting confirmation state is to end, a setting confirmation end command is sent from the main board 11 to the performance control board 12.

When the pachinko gaming machine 1 is in the setting confirmation state, it may be in a game stop state in which the progress of the game on the pachinko gaming machine 1 is stopped. In the game stop state, the launch of game balls by operating the ball-hitting handle, the detection of game balls by various switches, etc. are stopped, and the first special symbol display device 4A, the second special symbol display device 4B, and the normal symbol display device 20 may be controlled to stop displaying a losing symbol or the like, or to display a symbol corresponding to a game stop state other than a losing symbol. When the setting confirmation state ends, the game stop state associated with it may also end.

In the setting change process of step S7, it is determined whether a predetermined setting change condition is met. The setting change condition is met, for example, when power supply is started, the detection signal from the door open sensor 90 is in the ON state, and the setting key 51 is turned ON. The setting change condition may also include the clear signal being in the ON state.

When the setting change condition is met in the setting change process of step S7, the pachinko gaming machine 1 enters a setting change state in which the setting value set therein can be changed, and a setting change start command is sent from the main board 11 to the performance control board 12. In the setting change state, the setting value is displayed on the display monitor 29, and the numerical value displayed on the display monitor 29 is updated and displayed sequentially each time the setting change switch 52 is operated. After that, when the setting key 51 is turned off by an attendant at the game center or the like, the setting value displayed on the display monitor 29 is stored (updated and stored) in the backup area of the RAM 102, and the display monitor 29 is turned off. When the setting change state is to be ended, a setting change end command is sent from the main board 11 to the performance control board 12.

When the pachinko gaming machine 1 is in the setting change state, the pachinko gaming machine 1 may be in a play stop state, just as when it is in the setting confirmation state. When the setting change state ends, the associated play stop state may also end.

When the performance control board 12 receives a setting check start command or a setting change start command, it may perform control to notify the user that the setting is being checked or changed. For example, it may display a specific image on the image display device 5, output a specific sound from the speakers 8L and 8R, or cause a light-emitting component such as the game effect lamp 9 to emit light in a specific manner.

The clear signal is turned on by, for example, pressing a clear switch provided on the power supply board 17. Therefore, when power supply is started, if the detection signal from the door open sensor 90 is on and the setting key 51 is on, if the clear switch is on, the initialization process of step S6 and the setting change process of step S7 are executed, making it possible to control the device to the setting change state, and if the clear switch is off, the recovery process of step S4 and the setting confirmation process of step S5 are executed, making it possible to control the device to the setting confirmation state. When power supply is started, if the detection signal from the door open sensor 90 is off or the setting key 51 is off, if the clear switch is on, the initialization process of step S6 is executed but the device is not controlled to the setting change state, and if the clear switch is off, the recovery process of step S4 is executed but the device is not controlled to the setting confirmation state.

After executing the setting confirmation process or setting change process, the CPU 103 executes a random number circuit setting process to initialize the random number circuit 104 (step S8). Then, the register of the CTC built into the game control microcomputer 100 is set so that a timer interrupt occurs periodically at a predetermined time (e.g., every 2 ms) (step S9), and the interrupt is permitted (step S10). After that, a loop process is entered. After that, an interrupt request signal is sent from the CTC to the CPU 103 at predetermined time intervals (e.g., every 2 ms), and the CPU 103 can execute the timer interrupt process periodically.

When the CPU 103 that has executed such game control main processing receives an interrupt request signal from the CTC and accepts the interrupt request, it executes the game control timer interrupt processing shown in the flowchart of FIG. 5. When the game control timer interrupt processing shown in FIG. 5 is started, the CPU 103 first executes a predetermined switch processing to determine whether or not detection signals have been received from various switches such as the gate switch 21, the first start port switch 22A, the second start port switch 22B, and the count switch 23 via the switch circuit 110 (step S21). Next, by executing a predetermined main side error processing, it performs an abnormality diagnosis of the pachinko game machine 1, and can issue a warning if necessary depending on the diagnosis result (step S22). After that, by executing a predetermined information output processing, it outputs data such as jackpot information (information indicating the number of jackpots), start information (information indicating the number of start winnings), and probability fluctuation information (information indicating the number of times the game has entered a probability variable state) that are supplied to a hall management computer installed outside the pachinko game machine 1 (step S23).

Following the information output process, a game random number update process is executed to update at least a portion of the game random numbers used on the main board 11 side by software (step S24). After this, the CPU 103 executes a special symbol process process (step S25). By the CPU 103 executing the special symbol process process at each timer interrupt, the execution and reservation management of the special symbol game, the control of the jackpot game state, the control of the game state, etc. are realized.

Following the special symbol process, the normal symbol process is executed (step S26). The CPU 103 executes the normal symbol process at each timer interrupt, enabling the execution and reservation management of the normal symbol game based on the detection signal from the gate switch 21 (based on the game ball passing through the passing gate 41), and the opening control of the variable winning ball device 6B based on a "normal symbol hit". The normal symbol game is executed by driving the normal symbol display 20, and the number of reserved normal symbols is displayed by lighting the normal symbol reservation display 25C.

After executing the normal symbol process processing, as part of the game control timer interrupt processing, processing when a power outage occurs, processing for paying out prize balls, etc. may be performed. After that, the CPU 103 executes a command control processing (step S27). The CPU 103 may set a performance control command for transmission in each of the above processes. In the command control processing of step S27, a process is performed to transmit the performance control command set for transmission to a sub-side control board such as the performance control board 12. After executing the command control processing, the interrupt is permitted and then the game control timer interrupt processing is terminated.

Figure 6 is a flow chart showing an example of the special symbol process executed in step S25 shown in Figure 5. In this special symbol process, the CPU 103 first executes a start winning determination process (step S101).

In the start winning judgment process, a process is executed to detect the occurrence of a start winning, store the reserved information in a specified area of the RAM 102, and update the reserved memory number. When a start winning occurs, a random number value for determining the display result (including the type of big win) and the variation pattern is extracted and stored as reserved information. In addition, a process for predicting and judging the display result and the variation pattern based on the extracted random number value may be executed. After the reserved information and the reserved memory number are stored, a transmission setting is performed to transmit a performance control command to the performance control board 12 to specify the judgment results such as the occurrence of a start winning, the reserved memory number, and the predictive judgment. The performance control command at the time of the start winning that has been transmitted and set in this way is transmitted from the main board 11 to the performance control board 12, for example, after the special pattern process is completed, by executing the command control process of step S27 shown in FIG. 4.

After executing the start winning determination process in step S101, the CPU 103 selects and executes one of the processes in steps S110 to S120 depending on the value of the special symbol process flag provided in the RAM 102. Note that in each step of the special symbol process (steps S110 to S120), a transmission setting is made to transmit a performance control command corresponding to each step to the performance control board 12.

The normal special symbol processing in step S110 is executed when the value of the special symbol process flag is "0" (initial value). In this normal special symbol processing, a determination is made as to whether or not to start the first special symbol game or the second special symbol game based on the presence or absence of reserved information. In addition, in the normal special symbol processing, based on a random number value for determining the display result, whether or not the display result of the special symbol or the decorative symbol is to be a "jackpot" and, if it is a "jackpot", the type of jackpot is determined (pre-determined) before the display result is derived and displayed. Furthermore, in the normal special symbol processing, a determined special symbol (either a jackpot symbol or a losing symbol) to be stopped and displayed in the special symbol game is set in accordance with the determined display result. After that, the value of the special symbol process flag is updated to "1", and the normal special symbol processing is terminated. In addition, the special symbol game using the second special symbol may be executed in preference to the special symbol game using the first special symbol (also called special symbol 2 priority consumption). Also, the order in which the game balls enter the first start winning slot and the second start winning slot may be stored, and the conditions for starting the special game may be met in the order in which the balls enter (also known as winning order consumption).

When making various decisions based on random number values, various tables stored in ROM 101 (tables in which decision values compared with random number values are assigned to decision results) are referenced. The same applies to other decisions on the main board 11 and various decisions on the performance control board 12. On the performance control board 12, various tables are stored in ROM 121.

The fluctuation pattern setting process of step S111 is executed when the value of the special chart process flag is "1". This fluctuation pattern setting process includes a process of determining one of multiple types of fluctuation patterns using a random number value for determining the fluctuation pattern based on a pre-determined result of whether or not the display result is a "jackpot". In the fluctuation pattern setting process, when a fluctuation pattern is determined, the value of the special chart process flag is updated to "2" and the fluctuation pattern setting process ends.

The variation pattern specifies the execution time of the special game (special game variation time) (which is also the execution time of the variable display of the decorative symbols), the manner of the variable display of the decorative symbols (whether or not there is a reach, etc.), and the content of the presentation during the variable display of the decorative symbols (type of reach presentation, etc.), and is also called the variable display pattern.

The special pattern change process of step S112 is executed when the value of the special pattern process flag is "2". This special pattern change process includes a process for making settings to change the special pattern in the first special pattern display device 4A and the second special pattern display device 4B, and a process for measuring the elapsed time since the special pattern started to change. It also determines whether the measured elapsed time has reached the special pattern change time corresponding to the change pattern. Then, when the elapsed time since the special pattern started to change reaches the special pattern change time, the value of the special pattern process flag is updated to "3", and the special pattern change process ends.

The special pattern stop process in step S113 is executed when the value of the special pattern process flag is "3". This special pattern stop process includes a process for setting the first special pattern display device 4A and the second special pattern display device 4B to stop the fluctuation of the special pattern and to stop displaying (deriving) the confirmed special pattern that is the display result of the special pattern. If the display result is a "jackpot", the value of the special pattern process flag is updated to "4". If the display result is a "miss", when the time-saving state or the probability bonus state is controlled and the end of the number-cutting is established, the game state is also updated. When the value of the special pattern process flag is updated, the special pattern stop process ends.

The pre-opening process for the jackpot in step S114 is executed when the value of the special chart process flag is "4". This pre-opening process for the jackpot includes a process for setting the jackpot opening port to open by starting the execution of a round in the jackpot game state based on the display result being "jackpot". When the jackpot opening port is opened, a process for supplying a solenoid drive signal to the solenoid 82 for the jackpot opening port is executed. At this time, for example, depending on the type of jackpot, the maximum open period for the jackpot opening port and the maximum number of rounds to be executed are set. When these settings are completed, the value of the special chart process flag is updated to "5" and the pre-opening process for the jackpot is completed.

The jackpot opening process of step S115 is executed when the value of the special chart process flag is "5". This jackpot opening process includes a process for measuring the time that has elapsed since the jackpot opening was opened, and a process for determining whether or not it is time to return the jackpot opening from an open state to a closed state based on the measured elapsed time and the number of game balls detected by the count switch 23. When the jackpot opening is to be returned to a closed state, a process for stopping the supply of a solenoid drive signal to the solenoid 82 for the jackpot opening door is executed, and then the value of the special chart process flag is updated to "6", and the jackpot opening process is terminated.

The post-jackpot release process of step S116 is executed when the value of the special chart process flag is "6". This post-jackpot release process includes a process for determining whether the number of times the round that opens the big prize opening has been executed has reached a set upper limit, and a process for making settings to end the jackpot game state when the upper limit has been reached. When the number of times the round has been executed has not reached the upper limit, the value of the special chart process flag is updated to "5", whereas when the number of times the round has been executed has reached the upper limit, the value of the special chart process flag is updated to "7". When the value of the special chart process flag is updated, the post-jackpot release process ends.

The jackpot end process of step S117 is executed when the value of the special chart process flag is "7". This jackpot end process includes a process of waiting until a waiting time corresponding to the period during which an ending presentation is executed as a presentation operation that notifies the end of the jackpot game state has elapsed, and a process of making various settings for starting special rate control or time-saving control in response to the end of the jackpot game state. When such settings are made, the value of the special chart process flag is updated to "0", and the jackpot end process ends.

The pachinko game machine 1 is configured so that the winning probability of a jackpot and the ball output rate change according to the setting value. For example, in the special symbol normal processing of the special symbol process processing, the winning probability of a jackpot and the ball output rate change by using a display result judgment table (winning probability) according to the setting value. For example, the setting value is made up of six levels from 1 to 6, with 6 being the highest winning probability of a jackpot, and the winning probability of a jackpot decreasing as the value decreases in the order of 6, 5, 4, 3, 2, and 1. In this example, when the setting value is set to 6, the player has the highest advantage, and the advantage decreases stepwise as the value decreases in the order of 6, 5, 4, 3, 2, and 1. If the winning probability of a jackpot changes according to the setting value, the ball output rate may also change according to the setting value. The winning probability of a jackpot is constant regardless of the setting value, while the number of rounds in the jackpot game state may change according to the setting value. The pachinko gaming machine 1 may be configured to be able to set one of a number of setting values that have different degrees of advantage for the player. The setting value set in the pachinko gaming machine 1 is notified by sending a setting value designation command from the main board 11 to the performance control board 12.

Figure 7 shows an example of the configuration of a display result judgment table. Figure 7 (A) shows an example of the configuration of a display result judgment table for the first special symbol used when the variable special symbol is the first special symbol, and Figure 7 (B) shows an example of the configuration of a display result judgment table for the second special symbol used when the variable special symbol is the second special symbol. The display result judgment table is a collection of data stored in ROM 101. In the display result judgment table, a winning judgment value compared with the random number value MR1 according to a set value is assigned to the special symbol display result, which is the variable display result of the special symbol. The random number value MR1 is a random number value for determining the display result, and the value is updated randomly within the range of 0 to 65535. As the display result judgment table, a display result judgment table common to the first special symbol and the second special symbol may be used.

As shown in FIG. 7(A), when the variable special chart is the first special chart, if the setting value is 1 and the game state is normal or time-saving, the value can be a number in the range of 0 to 65535, and of the hit determination values compared with the random number value MR1 for determining the special chart display result, 1020 to 1237 are assigned to "jackpot", 65317 to 65535 are assigned to "miss with time-saving", and the other numerical ranges are assigned to "miss". Also, when the setting value is 1 and the game state is a probability variable state, of the hit determination values mentioned above, 1020 to 1346 are assigned to "jackpot", and the other numerical ranges are assigned to "miss". Note that when the setting value in the first special chart is 2 to 6 and the game state is normal or time-saving, it is as shown in FIG. 7(A).

As shown in FIG. 7(B), when the variable special chart is the second special chart, if the setting value is 1 and the game state is normal or time-saving, the value can be a number in the range of 0 to 65535, and of the hit determination values compared with the random number value MR1 for determining the special chart display result, 1020 to 1237 are assigned to "jackpot", 65317 to 65425 are assigned to "miss with time-saving", and the other numerical ranges are assigned to "miss". Also, when the setting value is 1 and the game state is a probability variable state, of the aforementioned hit determination values, 1020 to 1346 are assigned to "jackpot", and the other numerical ranges are assigned to "miss". Note that when the setting value in the second special chart is 2 to 6 and the game state is normal or time-saving, it is as shown in FIG. 7(B).

Now, looking at the numerical range of hit determination values assigned to "jackpot" and "miss with time-saving" in each display result determination table, as shown in FIG. 8, in the display result determination table for the first special chart when the game state is normal or time-saving, the range of hit determination values from 1020 to 1237 is set as a common numerical range of jackpot determination values for determining a jackpot regardless of the set value.

When the setting value is 1, only the common numerical range of the jackpot determination value is set (1020 to 1237 is assigned to "jackpot"), while when the setting value is 2 to 6, the numerical range corresponding to each setting value is set from 1238 as the non-common numerical range of the jackpot determination value so as to be continuous from the common numerical range of the jackpot determination value. This non-common numerical range of the jackpot determination value is set to the range of 1238 to 1253 for setting value 2, the range of 1238 to 1272 for setting value 3, the range of 1238 to 1292 for setting value 4, the range of 1238 to 1317 for setting value 5, and the range of 1238 to 1346 for setting value 6.

In other words, in the first special chart display result judgment table when the game state is normal or time-saving, when the setting value is 1, among the hit judgment values that can take a value in the range of 0 to 65535, only values within the common numerical range (1020 to 1237) are assigned to "jackpot", while when the setting value is 2 or more, among the jackpot judgment values, values within the range obtained by adding the non-common numerical range to the common numerical range are assigned to "jackpot". Furthermore, the non-common numerical range increases with 1238 as the setting value increases.

For this reason, the probability of a jackpot is increased by increasing the non-common numerical range that is adjacent to the common numerical range as the set value increases, with 1020 being the reference value for determining a jackpot (jackpot reference value).

Furthermore, in the first special chart display result judgment table when the game state is the normal state or the time-saving state, the range of 65317 to 65535 among the hit judgment values is set as the common numerical range of the time-saving miss judgment value for judging a time-saving miss regardless of the setting value. If we focus on the case where the setting value is 6, as described above, the hit judgment value is set to 1020 to 1346 as the numerical range of the jackpot judgment value, and the time-saving miss judgment value is set to the range of 65317 to 65535 with 65317 as the reference value for the time-saving miss (time-saving miss reference value) in a numerical range different from the range of the jackpot judgment value of the setting value 6 (1020 to 1346), so that the numerical range of the time-saving miss judgment value is prevented from overlapping with the range of the jackpot judgment value that changes according to each setting value.

In addition, in the first special chart display result judgment table when the game state is in a special probability state, the range of hit judgment values from 1020 to 1346 is set as a common numerical range of jackpot judgment values for determining a jackpot regardless of the set value.

When the setting value is 1, only the common numerical range of the jackpot determination value is set (1020 to 1346 is assigned to "jackpot"), while when the setting value is 2 to 6, the numerical range corresponding to each setting value is set from 1347 as the non-common numerical range of the jackpot determination value so as to be continuous from the common numerical range of the jackpot determination value. This non-common numerical range of the jackpot determination value is set to the range of 1347 to 1383 for setting value 2, the range of 1347 to 1429 for setting value 3, the range of 1347 to 1487 for setting value 4, the range of 1347 to 1556 for setting value 5, and the range of 1347 to 1674 for setting value 6.

In other words, in the first special chart display result judgment table when the game state is in the high probability state, when the setting value is 1, among the hit judgment values that can take a value in the range of 0 to 65535, only values within the common numerical range (1020 to 1346) are assigned to "jackpot", while when the setting value is 2 or more, among the jackpot judgment values, values within the range obtained by adding the non-common numerical range to the common numerical range are assigned to "jackpot". Furthermore, the non-common numerical range increases with 1347 as the setting value increases.

For this reason, the probability of a jackpot is increased by increasing the non-common numerical range that is adjacent to the common numerical range as the set value increases, with 1020 being the reference value for determining a jackpot (jackpot reference value).

In the display result judgment table for the second special chart when the game state is normal or time-saving, the range of hit judgment values from 1020 to 1237 is set as the common numerical range of the jackpot judgment value for determining a jackpot regardless of the set value.

When the setting value is 1, only the common numerical range of the jackpot determination value is set (1020 to 1237 is assigned to "jackpot"), while when the setting value is 2 to 6, the numerical range corresponding to each setting value is set from 1238 as the non-common numerical range of the jackpot determination value so as to be continuous from the common numerical range of the jackpot determination value. This non-common numerical range of the jackpot determination value is set to the range of 1238 to 1253 for setting value 2, the range of 1238 to 1272 for setting value 3, the range of 1238 to 1292 for setting value 4, the range of 1238 to 1317 for setting value 5, and the range of 1238 to 1346 for setting value 6.

In other words, in this pachinko gaming machine 1, in the second special chart display result judgment table when the game state is normal or time-saving, when the set value is 1, among the hit judgment values that can take a value in the range of 0 to 65535, only values within the common numerical range (1020 to 1237) are assigned to "jackpot", while when the set value is 2 or more, among the jackpot judgment values, values within the range obtained by adding the non-common numerical range to the common numerical range are assigned to "jackpot". Furthermore, the non-common numerical range increases with 1238 as the set value increases.

For this reason, the probability of a jackpot is increased by increasing the non-common numerical range that is adjacent to the common numerical range as the set value increases, with 1020 being the reference value for determining a jackpot (jackpot reference value).

Furthermore, in the second special display result judgment table when the game state is the normal state or the time-saving state, the range of 65317 to 65425 among the hit judgment values is set as the common numerical range of the time-saving miss judgment value for judging a time-saving miss regardless of the setting value. If we focus on the case where the setting value is 6, as described above, the hit judgment value is set to 1020 to 1346 as the numerical range of the jackpot judgment value, and the time-saving miss judgment value is set to the range of 65317 to 65425 with 65317 as the reference value for the time-saving miss (time-saving miss reference value) in a numerical range different from the range of the jackpot judgment value of the setting value 6 (1020 to 1346), so that the numerical range of the time-saving miss judgment value is prevented from overlapping with the range of the jackpot judgment value that changes according to each setting value.

In the second special symbol display result determination table when the game state is in a probability bonus state, the hit determination value range of 1020 to 1346 is set as a common numerical range of jackpot determination values for determining a jackpot regardless of the set value. The other features of the second special symbol display result determination table are the same as those of the first special symbol display result determination table.

As described above, in this pachinko game machine 1, when the variable special symbol is the first special symbol, the range of 65317 to 65535 is set as the common numerical range for time-saving misses regardless of the setting value when the game state is normal and when the time-saving state, and when the variable special symbol is the second special symbol, the range of 65317 to 65425 is set as the common numerical range for time-saving misses regardless of the setting value when the game state is normal and when the time-saving state. In other words, when the game state is normal and when the time-saving state, the rate at which the variable display result is a time-saving miss is the same rate for all setting values, so it is possible to prevent the setting value from excessively increasing gambling nature. Furthermore, for the time-saving misses to which a common judgment value number is assigned for each setting value, it is set to a continuous numerical range from 65317, which is the time-saving miss reference value, for all setting values, so that it is possible to reduce the processing load on the CPU 103 regarding the judgment of the variable display result being a time-saving miss.

In addition, in this pachinko gaming machine 1, six setting values can be set, from 1 to 6, but the setting values that can be set in the pachinko gaming machine 1 may be five or less or seven or more. Also, the smaller the setting value set in the pachinko gaming machine 1, the more advantageous it may be for the player.

The jackpot type may be determined at different rates depending on the set value, based on the allocation of judgment values in the jackpot type determination table. Alternatively, the jackpot type may be determined at a common rate regardless of the set value. The fluctuation pattern may be determined at different rates depending on the set value, based on the allocation of judgment values in the fluctuation pattern determination table. Alternatively, the fluctuation pattern may be determined at a common rate regardless of the set value. The execution rate of normal reaches and super reaches may differ depending on the set value, so that the setting value may be suggested by the frequency at which normal reaches and super reaches are executed. Alternatively, the execution rate of normal reaches and super reaches may be common regardless of the set value. In addition, any setting suggestion performance may be possible at different rates depending on the set value.

[Major operations of the performance control board 12]
Next, the main operations of the performance control board 12 will be described. When the performance control board 12 receives a power supply voltage from a power supply board or the like, the performance control CPU 120 starts up and executes the performance control main process as shown in the flowchart of Fig. 9. When the performance control main process shown in Fig. 9 starts, the performance control CPU 120 first executes a predetermined initialization process (step S71), clears the RAM 122, sets various initial values, and sets the registers of the CTC (counter/timer circuit) mounted on the performance control board 12. In addition, it executes an initial operation control process (step S72). In the initial operation control process, control is executed to perform the initial operation of the movable body 32, such as control to drive the movable body 32 to return it to the origin position and control to perform a predetermined operation check.

Then, it is determined whether the timer interrupt flag is on or not (step S73). The timer interrupt flag is set to the on state every time a predetermined time (e.g., 2 milliseconds) elapses, for example based on the register setting of the CTC. At this time, if the timer interrupt flag is off (step S73; No), the process of step S73 is repeatedly executed and the process waits.

In addition, on the performance control board 12 side, an interrupt occurs to receive a performance control command from the main board 11, in addition to a timer interrupt that occurs every time a predetermined time has elapsed. This interrupt occurs, for example, when the performance control INT signal from the main board 11 becomes ON. When an interrupt occurs due to the performance control INT signal becoming ON, the performance control CPU 120 automatically sets the interrupt to be prohibited, but if a CPU that does not automatically become interrupt prohibited is used, it is desirable to issue an interrupt prohibition command (DI command). In response to an interrupt due to the performance control INT signal becoming ON, the performance control CPU 120 executes, for example, a predetermined command reception interrupt process. In this command reception interrupt process, a performance control command is taken in from a predetermined input port that receives a control signal transmitted from the main board 11 via the relay board 15, among the input ports included in the I/O 125. The performance control command taken in at this time is stored in a performance control command reception buffer provided in, for example, the RAM 122. The performance control CPU 120 then sets the interrupt to permitted and ends the command reception interrupt process.

If the timer interrupt flag is on in step S73 (step S73; Yes), the timer interrupt flag is cleared to an off state (step S74), and a command analysis process is executed (step S75). In the command analysis process, for example, various presentation control commands transmitted from the game control microcomputer 100 of the main board 11 and stored in the presentation control command reception buffer are read, and then settings and controls corresponding to the read presentation control commands are performed. For example, the read presentation control command is stored in a specified area of the RAM 122, or a reception flag provided in the RAM 122 is turned on so that which presentation control command was received and the contents specified by the presentation control command can be confirmed in the presentation control process process, etc. In addition, if the presentation control command specifies the game state, the display control unit 123 may be instructed to display a background corresponding to the game state.

After executing the command analysis process in step S75, the performance control process is executed (step S76). In the performance control process, for example, control is performed to operate various performance devices, such as the display operation of the performance image in the display area of the image display device 5, the sound output operation from the speakers 8L and 8R, the lighting operation of the decorative light-emitting elements such as the game effect lamp 9 and the decorative LEDs, and the driving operation of the movable body 32. In addition, judgments, decisions, settings, etc. are made regarding the control contents of the performance operations using the various performance devices in accordance with the performance control commands, etc. transmitted from the main board 11.

Following the performance control process processing of step S76, a performance random number update process is executed (step S77), and at least a portion of the performance random numbers used on the performance control board 12 side is updated by software. Then, the process returns to step S73. Before returning to step S73, other processes may be executed.

Figure 10 is a flow chart showing an example of the processing executed in step S76 of Figure 9 as the performance control process processing. In the performance control process processing shown in Figure 10, the performance control CPU 120 first executes a look-ahead preview setting process (step S161). In the look-ahead preview setting process, for example, judgments, decisions, settings, etc. for executing the look-ahead preview performance are made based on the performance control command at the time of the start winning transmitted from the main board 11. In addition, processing is executed to display the hold display based on the number of hold memories specified from the performance control command.

After executing the processing of step S161, the performance control CPU 120 selects and executes one of the processing of steps S170 to S175 as described below, depending on the value of a performance process flag provided in, for example, RAM 122.

The variable display start waiting process of step S170 is executed when the value of the presentation process flag is "0" (initial value). This variable display start waiting process includes a process of determining whether or not to start the variable display of the decorative pattern on the image display device 5 based on whether or not a command specifying the start of variable display has been received from the main board 11. If it is determined that the variable display of the decorative pattern on the image display device 5 should be started, the value of the presentation process flag is updated to "1" and the variable display start waiting process ends.

The variable display start setting process of step S171 is a process executed when the value of the performance process flag is "1". In this variable display start setting process, the display result of the variable display of the decorative pattern (determined decorative pattern), the mode of the variable display of the decorative pattern, whether or not various performances such as reach performances and various advance notice performances are executed, and the mode and execution start timing are determined based on the display result and the variation pattern specified by the performance control command. Then, a performance control pattern (a collection of control data for instructing the display control unit 123 to execute a performance) that reflects the determined result is set. After that, based on the set performance control pattern, the display control unit 123 is instructed to start the execution of the variable display of the decorative pattern, the value of the performance process flag is updated to "2", and the variable display start setting process is terminated. In response to the instruction to start the execution of the variable display of the decorative pattern, the display control unit 123 starts the variable display of the decorative pattern on the image display device 5.

The variable display performance process of step S172 is a process executed when the performance process flag is "2". In this variable display performance process, the performance control CPU 120 instructs the display control unit 123 to display a performance image based on the performance control pattern set in step S171 on the display screen of the image display device 5, to drive the movable body 32, to output voice and sound effects from the speakers 8L and 8R by outputting a command (sound effect signal) to the voice control board 13, and to turn on/off/blink the game effect lamp 9 and the decorative LED by outputting a command (illumination signal) to the lamp control board 14, thereby executing various performance controls during the variable display of the decorative pattern. After performing such performance control, for example, in response to the reading of an end code indicating the end of the variable display of the decorative pattern from the performance control pattern, or the reception of a command specifying the stop display of the fixed decorative pattern from the main board 11, the fixed decorative pattern, which is the display result of the decorative pattern, is stopped. When the final decorative pattern is displayed in a stopped state, the value of the performance process flag is updated to "3" and the performance process during variable display ends.

The special winning wait process of step S173 is executed when the value of the presentation process flag is "3". In this special winning wait process, the presentation control CPU 120 judges whether or not a presentation control command designating the start of a jackpot game state has been received from the main board 11. Then, when a presentation control command designating the start of a jackpot game state is received, the value of the presentation process flag is updated to "4". Also, when a command designating the start of a jackpot game state is not received and the waiting time for receiving the command has elapsed, it is judged that the display result in the special winning game was a "miss", and the value of the presentation process flag is updated to the initial value of "0". When the value of the presentation process flag is updated, the special winning wait process is terminated.

The jackpot performance process of step S174 is executed when the performance process flag value is "6". In this jackpot performance process, the performance control CPU 120 sets, for example, a performance control pattern corresponding to the performance content in the jackpot gaming state, and executes various performance controls in the jackpot gaming state based on the set content. In addition, in the jackpot performance process, for example, in response to receiving a command from the main board 11 specifying that the jackpot gaming state is to end, the value of the performance process flag is updated to "5", which is a value corresponding to the ending performance process, and the jackpot performance process ends.

The ending presentation process of step S175 is executed when the value of the presentation process flag is "7". In this ending presentation process, the presentation control CPU 120 sets a presentation control pattern corresponding to, for example, the end of a jackpot gaming state, and executes various presentation controls for the ending presentation at the end of the jackpot gaming state based on the set contents. After that, the value of the presentation process flag is updated to the initial value "0", and the ending presentation process is terminated.

[Variations of the basic description]
This invention is not limited to the pachinko gaming machine 1 described in the basic description above, and various modifications and applications are possible without departing from the spirit of the present invention.

The pachinko gaming machine 1 described above is a payout type gaming machine that pays out a predetermined number of gaming media as prizes when a win is made, but it may also be an enclosed type gaming machine that encloses gaming media and awards points when a win is made.

Only one type of pattern (for example, a symbol showing "- ") may be displayed during the variable display of the special pattern, and the variable display may be achieved by repeatedly turning on and off the pattern. Furthermore, even if the pattern is displayed during the variable display, the pattern may not be displayed when the variable display is stopped (the display result may not include the symbol showing "- ").

In the above basic explanation, a pachinko gaming machine 1 was shown as the gaming machine, but the present invention can also be applied to slot machines (e.g., slot machines equipped with one or more of big bonus, regular bonus, RT, AT, ART, CZ (hereinafter, bonus, etc.)) that can play a game in which medals are inserted and a predetermined bet amount is set, multiple types of symbols are rotated in response to the player's operation of the control lever, and when the symbols are stopped in response to the player's operation of the stop button, a specific combination of symbols is formed, and a predetermined number of medals is paid out to the player.

The programs and data for implementing the present invention are not limited to being distributed or provided to the computer device included in the pachinko gaming machine 1 by a removable recording medium, but may be distributed by being pre-installed in a storage device of the computer device or the like. Furthermore, the programs and data for implementing the present invention may be distributed by being downloaded from another device on a network connected via a communication line or the like by providing a communications processing unit.

The game can be executed not only by inserting a removable recording medium, but also by temporarily storing a program and data downloaded via a communication line or the like in an internal memory, or by directly executing the game using the hardware resources of another device on a network connected via a communication line or the like. Furthermore, the game can be executed by exchanging data with another computer device or the like via a network.

In this specification, expressions of comparison of various percentages such as the execution percentage of effects (such as "high", "low", "different", etc.) may include one being a percentage of "0%". For example, it also includes one being a percentage of "0%" and the other being a percentage of "100%" or a percentage less than "100%".

[Description of Characteristic Part 131SG]
Next, the pachinko game machine 1 with respect to the characteristic part 131SG will be described. In the description of each step of the flowchart in the characteristic part 131SG, for example, the part described as "step S1" may be abbreviated to "S1" or "131SGS1", and "normal reach" may be abbreviated to "N reach" and "super reach" to "SP reach". In addition, in the characteristic part 131SG, "variable" may be referred to as "variable display". In addition, detailed description will be omitted for configurations similar to those of the pachinko game machine 1 described in the basic description or configurations having similar functions but different forms or positions, etc., by assigning the same reference numerals. In addition, in the following, the front side of FIG. 11-1 is the front (front, front) side of the pachinko game machine 1, and the back side is the back (rear) side, and the description will be based on the up, down, left and right directions when the pachinko game machine 1 is viewed from the front side. In this embodiment, the front surface of the pachinko gaming machine 1 is the surface facing the player playing the pachinko gaming machine 1.

The pachinko gaming machine 1 of this embodiment differs from the description in FIG. 7 in that it is not possible to set one of a number of setting values (e.g., 1 to 6) that have different rates at which the jackpot display result is displayed, and is described as a gaming machine in which a "miss with time reduction" is not provided as a variable display result, and the jackpot probability is set to approximately 1/319.

In addition, after the gaming machine is powered on (when RAM clear processing is executed) or after a jackpot occurs, if the next jackpot does not occur even though the variable display is executed a certain number of times (900 times in this embodiment) in succession in a low probability state, the machine may be controlled to time-saving state B (also called rescue time-saving state or rescue time-saving) out of the multiple types of time-saving states. This rescue time-saving state is provided to rescue players who have played for a long period of time but have not yet won a jackpot (for example, to reduce the amount of money invested in playing), and in this embodiment, it is a playing state also called "play time".

In this embodiment, when the game is controlled to the jackpot game state of jackpot A among the multiple types of jackpots, 110 variable displays are performed in the time-saving state A (low probability/high base state) among the multiple types of time-saving states, so the number of variable displays remaining from the end of the time-saving state A to the arrival of the rescue time-saving state is 790, while when the game is controlled to the jackpot game state of either jackpot B or jackpot C among the multiple types of jackpots, 110 variable displays are performed in the probability variable state (high probability/high base state), so the number of variable displays remaining from the end of the probability variable state to the arrival of the rescue time-saving state is 900. Also, in this embodiment, the number of variable displays in the time-saving state B (low probability/high base state) based on the value of the rescue time-saving count counter becoming "0" is 1100.

In this embodiment, as shown in FIG. 11-1, a first special chart reserved memory display area 130SG005D is provided at the bottom left of the image display device 5, capable of displaying a reserved display corresponding to a first special chart reserved memory that has been started but for which variable display has not yet been executed, and a second special chart reserved memory display area 130SG005U is provided at the bottom right of the image display device 5, capable of displaying a reserved display corresponding to a second special chart reserved memory that has been started but for which variable display has not yet been executed. And an active display area 130SG005F is provided at the bottom center of the image display device 5 for displaying a reserved display corresponding to a variable display currently being executed as an active display.

The right part of the image display device 5 can display a fourth symbol 131SG005J to notify the player that a variable display is being performed, and a small symbol 131SG005M, which is variable displayed in the same manner as the variable display of the decorative symbol in the center of the image display device 5, and the top right part of the image display device 5 can display a remaining number of times to reach the rescue time reduction display 131SG005Z, which shows the remaining number of times to reach the rescue time reduction, which is the number of remaining variable displays until the game is controlled to the time reduction state B (rescue time reduction state) described below.

The left side of the image display device 5 on the game board 2 of the pachinko game machine 1 is formed as a left game area 2L where game balls can flow down, and the right side of the image display device 5 on the game board 2 is formed as a right game area 2R where game balls can flow down. Game balls that are weakly shot out by the launching device flow down a first path as the left game area 2L, and game balls that are strongly shot out by the launching device flow down a second path as the right game area 2R.

Furthermore, a first reserved memory display area 131SG005D is provided at the bottom left of the image display device 5, which indicates the number of reserved memories of the first special chart by the number displayed on the reserved display, and a second reserved memory display area 131SG005U is provided at the bottom right of the image display device 5, which indicates the number of reserved memories of the second special chart by the number displayed on the reserved display. Furthermore, an active display area 131SG005F is provided at the bottom center of the image display device 5, which displays the reserved display corresponding to the variable display currently being executed as an active display.

In this embodiment, the special variable winning ball device 7 has a first large winning opening and a second large winning opening formed along the flow direction of the game balls. The first large winning opening can be changed between an open state where game balls can enter and a closed state where game balls cannot enter by driving a large winning opening door (not shown) to open and close by driving a solenoid 131SG082A (see FIG. 11-2). The second large winning opening can be changed between an open state where game balls can enter and a closed state where game balls cannot enter by driving a large winning opening door (not shown) to open and close by driving a solenoid 131SG082B (see FIG. 11-2).

Furthermore, a first count switch 131SG023A capable of detecting a gaming ball is provided in the first large prize opening, and a second count switch 131SG023B capable of detecting a gaming ball is provided in the second large prize opening.

In other words, game balls flowing down the left game area 2L (first path) can win in the general winning port 10 and the first start winning port formed by the winning ball device 6A, and game balls flowing down the right game area 2R (second path) can win in the second start winning port formed by the variable winning ball device 6B, the general winning port 10, and the first or second large winning port formed by the special variable winning ball device 7, and can also pass through the passing gate 41.

In addition, in this embodiment, the switch circuit 110 is connected to the first count switch 131SG023A, the second count switch 131SG023B, and the jackpot start switch 131SG024 built into the jackpot start gate 131SG042.

A number of obstacle nails are arranged between the winning ball device 6A and the variable winning ball device 6B and the special variable winning ball device 7. For this reason, game balls flowing down the left game area 2L cannot win in the second start winning hole or the large winning hole, and game balls flowing down the right game area 2R cannot win in the first start winning hole.

As shown in FIG. 11-2, at a predetermined position on the game board 2 of the pachinko game machine 1 in this embodiment (for example, the lower left position of the game area), there are a first special pattern display device 131SG004A capable of variable display of the first special pattern, a second special pattern display device 131SG004B capable of variable display of the second special pattern, a first reserved indicator 131SG025A capable of displaying the first reserved memory number, a second reserved indicator 131SG025B capable of displaying the second reserved memory number, a normal pattern display device 131SG020 capable of variable display of normal patterns, a normal reserved indicator 131SG025C capable of displaying the normal reserved memory number, a jackpot The game information display section includes a round indicator 131SG131 capable of displaying the number of rounds (jackpot type) of the jackpot game during play, a right-hit lamp 131SG132 that lights up in a game state in which a game ball is shot toward the right game area 2R, such as a jackpot game state, a high probability/high base state (high probability state), or a low probability/high base state (time-saving state), a high probability/high base state (high probability state), a high probability lamp 131SG133 that lights up when the game is in a high probability/high base state (high probability state), and a time-saving lamp 131SG134 that lights up in a high probability/high base state (high probability state) and a low probability/high base state (time-saving state). Note that, when the game state is normal, the right-hit lamp 131SG132 exceptionally lights up from the timing when the variable display stops if the variable display result is a jackpot.

As shown in FIG. 11-2, the main board 11 is equipped with an information output circuit for outputting game information (signals) to an external device such as a management computer of the gaming center where the pachinko gaming machine 1 is installed, via a terminal board (not shown).

In this embodiment, the second large prize opening has a V prize opening and a discharge outlet downstream of the V prize opening. In addition, a variable V prize opening device (V lid) is provided upstream of the V prize opening. The variable V prize opening device changes between a closed state and an open state by a solenoid. In other words, the game balls flowing down the second large prize opening can pass through the V prize opening when the variable V prize opening device is in the open state, and cannot pass through the V prize opening and instead flow down to the discharge outlet when the variable V prize opening device is in the closed state.

As shown in FIG. 11-2, the main board 11 is provided with a V switch 131SG023B1 that can detect, via the switch circuit 110, that the gaming ball has passed through the V entry port located downstream of the second large entry port, and an ejection switch 131SG023B2 that can detect that the gaming ball has passed through the ejection port.

The performance control board 12 is also connected to a vibration motor 61 built into the push button 31B and a movable body motor 207 for operating the movable body 32. The lamp control board 14 is also connected to a right-hit LED 131SG031 for encouraging a right-hit operation, a first special symbol LED 131SG032 that lights up during the variable display of the first special symbol, a second special symbol LED 131SG033 that lights up during the variable display of the second special symbol, a first hold LED 131SG034A that lights up when the first hold memory number is 1 to 2, and a first hold LED 131SG035A that lights up when the first hold memory number is 3 to 4. 31SG034B, a second pending LED 131SG035A that lights up when the second pending memory number is 1 to 2, a second pending LED 131SG035B that lights up when the second pending memory number is 3 to 4, a button LED 62 built into the push button 31B, a movable body LED 208 built into the movable body 32, and frame LEDs 9L1 to 9L12 and 9R1 to 9R12 provided on the gaming machine frame 3 are connected.

Figure 11-3 (A) is an explanatory diagram illustrating the random number value counted on the main board 11 side. As shown in Figure 11-3 (A), in this embodiment, on the main board 11 side, in addition to the random number value MR1 for determining the special chart display result, the random number value MR2 for determining the jackpot type, the random number value MR3 for determining the variation pattern type, the random number value MR4 for determining the variation pattern, the random number value MR5 for determining the normal chart display result, and the random number value MR6 for determining the initial value of MR5 are controlled to be countable. In addition, random number values other than these may be used to enhance the gaming effect. These random number values MR1 to MR6 may be counted by updating by software using different random counters in the CPU 103, or may be updated by the random number circuit 104. The random number circuit 104 may be built into the gaming control microcomputer 100, or may be configured as a random number circuit chip different from the gaming control microcomputer 100. Random numbers used to control the progress of such games are also called gaming random numbers.

In this embodiment, the random numbers MR1 to MR6 are set to the ranges shown in FIG. 11-3(A), but the present invention is not limited to this, and the ranges of the random numbers MR1 to MR6 may be different depending on the settings set in the pachinko game machine 1.

In the game control microcomputer 100, the CPU 103 executes a program read from the ROM 101 and uses the RAM 102 as a work area to execute various processes for controlling the progress of the game in the pachinko game machine 1. The CPU 103 also executes a random number generation program to generate all of the various random numbers used on the main board 11.

The ROM 101 provided in the game control microcomputer 100 stores various table data used to control the progress of the game in addition to the game control program. For example, the ROM 101 stores table data constituting a plurality of judgment tables prepared for the CPU 103 to make various judgments and decisions. The ROM 101 also stores table data constituting a plurality of control pattern tables used by the CPU 103 to output various control signals from the main board 11, and a variation pattern judgment table that stores a plurality of variation patterns that become the variable display mode of each pattern in the variable display of special patterns, normal patterns, etc.

Figure 11-3 (B) shows an example of the configuration of a special chart display result judgment table stored in ROM 101. In this embodiment, a common special chart display result judgment table is used for the first special chart and the second special chart as the special chart display result judgment table, but the present invention is not limited to this, and separate special chart display result judgment tables may be used for the first special chart and the second special chart.

The special symbol display result determination table is a table that is referenced to determine whether or not to control the variable display result to a jackpot game state as a "jackpot" before a determined special symbol that is a variable display result is derived and displayed in a special symbol game using a first special symbol by the first special symbol display device 4A or a special symbol game using a second special symbol by the second special symbol display device 4B, based on a random number value MR1 for determining the special symbol display result.

In the special chart display result judgment table in this embodiment, a numerical value (judgment value) that is compared with the random number value MR1 for judging the special chart display result is assigned to the special chart display result of "jackpot" or "miss" depending on whether the game state of the pachinko game machine 1 is a normal state or a time-saving state (low probability state), or a probability change state (high probability state).

In the special chart display result judgment table, the table data indicating the judgment value to be compared with the random number value MR1 for judging the special chart display result is judgment data assigned to the decision result of whether or not to control the special chart display result to a jackpot game state as a "jackpot". In the special chart display result judgment table in this embodiment, when the game state is a probability variable state (high probability state), more judgment values are assigned to the special chart display result of a "jackpot" than when the game state is a normal state or a time-saving state (low probability state). As a result, in the probability variable state (high probability state) in which the probability variable control is performed in the pachinko game machine 1, the probability of determining that the special chart display result is a "jackpot" and controlled to a jackpot game state is higher (about 1/80.02 in this embodiment) than the probability of determining that the special chart display result is a "jackpot" and controlled to a jackpot game state when the game state is a normal state or a time-saving state (low probability state) (about 1/319.68 in this embodiment). That is, in the special chart display result judgment table, when the gaming state of the pachinko gaming machine 1 is in a probability variable state (high probability state), the judgment data is assigned to the decision result of whether or not to control to a jackpot gaming state so that the probability of deciding to control to a jackpot gaming state is higher than when it is in a normal state or a time-saving state.

The judgment tables stored in ROM 101 include the first special symbol display result judgment table and the second special symbol display result judgment table shown in FIG. 7, as well as the jackpot type judgment table (for the first special symbol) shown in FIG. 11-3 (C1) and the jackpot type judgment table (for the second special symbol) shown in FIG. 11-3 (C2), as well as a fluctuation pattern type judgment table, a fluctuation pattern judgment table, a normal symbol display result judgment table (not shown), and a normal symbol fluctuation pattern determination table (not shown).

The pachinko game machine 1 of this embodiment is configured so that the probability of winning a jackpot (ball payout rate) does not change depending on the set value, but it may also be configured so that the probability of winning a jackpot (ball payout rate) changes depending on the set value.

[Big hit type determination table]
11-3(C1) and 11-3(C2) are explanatory diagrams showing the jackpot type determination table (for the first special symbol) and the jackpot type determination table (for the second special symbol) stored in the ROM 101. Of these, FIG. 11-3(C1) is a table for determining the jackpot type using reserved memory based on the game ball winning the first start winning slot (i.e., when the first special symbol is variably displayed). Also, FIG. 11-3(C1) is a table for determining the jackpot type using reserved memory based on the game ball winning the second start winning slot (i.e., when the second special symbol is variably displayed).

The jackpot type determination table is a table that is referenced when a decision is made to make the variable display result a jackpot pattern, to determine the type of jackpot as one of jackpots A to C based on the random number (MR2) for determining the jackpot type.

Now, the types of jackpots in this embodiment will be explained with reference to FIG. 11-3 (D). In this embodiment, the jackpot types provided are jackpot A, jackpot B, and jackpot C, for which time-saving control is executed for a maximum of 110 variable displays after the end of the jackpot game state. In addition, these jackpots A, B, and C are also jackpots for which special control is executed for a maximum of 110 variable displays after the end of the jackpot game by the game ball entering the V winning port after entering the second large winning port in the first round of the jackpot game state.

In this embodiment, the open state of the variable V winning ball device (V lid) includes a short open state (e.g., 0.1 seconds) in which the open state lasts for a short period of time, and a long open state (e.g., 15 seconds) in which the open state lasts for a long period of time. In the first round of the jackpot game state, jackpot A causes the variable V winning ball device to be in a short open state, and in the first round of the jackpot game state, jackpot B and jackpot C cause the variable V winning ball device to be in a long open state.

The jackpot game state resulting from "jackpot A" is a normal opening jackpot that changes the second large prize entry port to an open state advantageous to the player in the first round, and changes the first large prize entry port to an open state advantageous to the player in the second to sixth rounds. In addition, with "jackpot A", the variable V prize entry device is in a short open state in the first round, making it extremely difficult to get the game ball to enter the V prize entry port, and it is not expected that the special bonus control will be executed, so it is essentially a normal jackpot.

The jackpot game state resulting from "jackpot B" is a normal opening jackpot that changes the second large prize entry port to an open state advantageous to the player in the first round, and changes the first large prize entry port to an open state advantageous to the player in the second to sixth rounds. In addition, with "jackpot B", the variable V prize entry device is in a long open state in the first round, making it extremely easy to get the game ball to enter the V prize entry port, and it is expected that the special chance control will be executed, making it a virtual special chance jackpot.

The jackpot game state resulting from "jackpot C" is a normal opening jackpot that changes the second large prize entry port to an open state advantageous to the player in the first round, and changes the first large prize entry port to an open state advantageous to the player in the second to tenth rounds. In addition, with "jackpot C", the variable V prize entry ball device is in a long open state in the first round, making it extremely easy to get the game ball to enter the V prize entry port, and it is expected that the special chance control will be executed, making it a virtual special chance jackpot.

In this embodiment, three types of jackpots, A to C, are provided as jackpot types, but the present invention is not limited to this, and two or less types of jackpots, or four or more types of jackpots may be provided.

Also, as shown in FIG. 11-3 (C1), in the jackpot type determination table (for the first special symbol), of the range of MR2 determination values from 0 to 299, 0 to 149 is assigned to jackpot A, and 150 to 299 is assigned to jackpot B. On the other hand, as shown in FIG. 11-3 (C2), in the jackpot type determination table (for the second special symbol), of the range of MR2 determination values from 0 to 299, 0 to 99 is assigned to jackpot B, and 100 to 299 is assigned to jackpot C.

In other words, in this embodiment, when the variable special symbol is the first special symbol, there is a 50% probability that the game ball will enter the V winning hole in the first round of the jackpot game state, and both the special probability control and the time-saving control are implemented after the jackpot game ends. Furthermore, when the variable special symbol is the second special symbol, there is a 100% probability that the game ball will enter the V winning hole in the first round of the jackpot game state, and both the special probability control and the time-saving control are implemented after the jackpot game ends.

In this embodiment, even if a jackpot A occurs, it is possible but extremely rare for a V entry to occur when the V lid is in a short open state, so in the case of a jackpot A, it will be explained as not having a V entry and the special rate control not being executed. Also, even if a jackpot B or jackpot C occurs, it is possible but extremely rare for a V entry not to occur when the V lid is in a long open state, so in the case of a jackpot B or jackpot C, it will be explained as having a V entry and the special rate control being executed.

In this embodiment, the type of jackpot is determined using MR2, which is a random number value for determining the type of jackpot, but the present invention is not limited to this, and the type of jackpot may be determined using MR1, which is a random number value for determining the result of the special chart display.

In addition, in this embodiment, for example, as the jackpot type for the second special symbol, a form having jackpots B and C in which 110 times of probability variable control and time-saving control can be executed after the end of the jackpot game state is exemplified, but the present invention is not limited to this. For example, a jackpot D in which time-saving control is executed 1009 times (probability variable state: 110 times + time-saving state A: 899 times) after the end of the jackpot game state may be provided. By doing so, it is almost certain that the next jackpot will be won, which increases interest, and even if a jackpot does not occur in the 110 times probability variable state after the end of jackpot D and the probability variable control ends, after 899 variable displays are executed without a jackpot occurring in time-saving state A (low probability/high base state), simply executing one variable display in the normal state will further control to time-saving state B (rescue time-saving state) described later, which increases interest.

[Time-saving count]
FIG. 11-4 is an explanatory diagram for explaining the number of time-saving times for each transition trigger. As shown in FIG. 11-4, in this embodiment, if a jackpot A occurs and the game ball does not enter the probability variable area, (1) the time-saving control is performed 110 times, and (2) the low probability control is performed 110 times, and the game enters the probability variable area (in this embodiment, the game enters the time-saving state A, which is a battle rush (BATTLE RUSH) in which the time-saving number of times is 110 times). Also, if either a jackpot B or a jackpot C occurs and the game ball enters the probability variable area, (1) the time-saving control is performed 110 times, and (2) the probability variable state is a very battle rush (KIWAMI BATTLE RUSH) in which the time-saving number of times is 110 times. In addition, when 900 variable displays are performed in a low probability state without being controlled to a jackpot, (1) time-saving control is performed 1100 times, and (2) the game is controlled to a time-saving state B (in this embodiment, a play time with 1100 time-saving times) in which low probability control is performed 1100 times. However, even if 900 fluctuations are performed again in a low probability state without being controlled to a jackpot after the end of the time-saving state B, the game is not controlled to the time-saving state B again based on this.

The rescue time-saving achievement rate is the rate at which the game is controlled to a time-saving state via rescue time-saving. The time-saving state via rescue time-saving is controlled by performing variable display n times (900 times in this embodiment) without being controlled to a jackpot game state, so the rescue time-saving achievement rate K can be calculated as follows.

K={(1-ML)^n}×100
(K = rescue time reduction achievement rate, ML = jackpot probability, n = variable display number)

Specifically, for example, if the jackpot probability ML in this embodiment is approximately 1/319, the rescue time reduction achievement rate K will be 5.9%. In addition, in the case of a gaming machine that allows the setting value to be set, if the rescue time reduction achievement rate is set to be higher as the jackpot probability is set to a lower value, the player can be rescued even if the jackpot probability is set to a low value.

[Fluctuation pattern]
11-5 and 11-6 are explanatory diagrams showing specific examples of the variation patterns in this embodiment. The variation patterns in this embodiment are roughly classified into a loss variation pattern in which the variable display result is a loss and a big win variation pattern in which the variable display result is a big win.

As shown in Figure 11-5, the miss fluctuation patterns can be broadly divided into non-reach miss fluctuation patterns (fluctuation pattern type: non-reach fluctuation pattern) in which no reach performance is executed and a miss occurs, normal reach fluctuation patterns (fluctuation pattern type: normal reach fluctuation pattern) in which a normal reach reach performance is executed and a miss occurs, low base weak super reach fluctuation patterns (fluctuation pattern type: low base weak super reach fluctuation pattern) in which a low base weak super reach A reach performance or a low base weak super reach B reach performance is executed in a normal state (low base state) and a miss occurs, and normal state (low base state) The fluctuation pattern of low base strong Super Reach A (fluctuation pattern type: low base strong Super Reach A fluctuation pattern) in which a reach performance of low base strong Super Reach A is finally executed and a miss is obtained in a normal state (low base state), the fluctuation pattern of low base strong Super Reach B (fluctuation pattern type: low base strong Super Reach B fluctuation pattern) in which a reach performance of low base strong Super Reach B is finally executed and a miss is obtained in a normal state (low base state), the fluctuation pattern of low base strong Super Reach C (fluctuation pattern type: low base strong Super Reach C fluctuation pattern) in which a reach performance of low base strong Super Reach C is finally executed and a miss is obtained in a normal state (low base state). The fluctuation pattern of the low base Strong Super Reach C in which the reach performance of the low base Strongest Super Reach is finally executed and results in a miss in the normal state (low base state) (fluctuation pattern type is the fluctuation pattern of the low base Strongest Super Reach); the fluctuation pattern of the high base Super Reach A in which the reach performance of the high base Super Reach A is finally executed and results in a miss in the time-saving state A or the probability change state (high base state) (fluctuation pattern type is the fluctuation pattern of the high base Super Reach A); the fluctuation pattern of the high base Super Reach B in which the reach performance of the high base Super Reach B is finally executed and results in a miss in the time-saving state A or the probability change state (high base state) There are fluctuation patterns for high base super reach B (fluctuation pattern type: high base super reach B fluctuation pattern) in which the reach effect of high base super reach C is finally executed and a miss in time-saving state A or high probability state (high base state), fluctuation patterns for high base super reach C (fluctuation pattern type: high base super reach C fluctuation pattern) in which the reach effect of high base super reach D is finally executed and a miss in time-saving state A or high probability state (high base state), fluctuation patterns for high base super reach D (fluctuation pattern type: high base super reach D fluctuation pattern) are provided.

Four types of non-reach fluctuation patterns are provided: PA1-1, in which the special chart fluctuation time is 12,000 ms and no reach performance is executed when the number of reserved memories of the target special chart of the variable display is two or less in the normal state; PA1-2, in which the special chart fluctuation time is 5,000 ms and no reach performance is executed when the number of reserved memories of the target special chart of the variable display is three in the normal state; PA1-3, in which the special chart fluctuation time is 2,000 ms and no reach performance is executed during time-saving control (time-saving state A or special probability state); and PA1-4, in which the special chart fluctuation time is 500 ms and no reach performance is executed during time-saving control (time-saving state B).

For the normal reach type of fluctuation pattern, there is one type of fluctuation pattern, PA2-1, in which the special chart fluctuation time is 20,000 ms and the normal reach reach performance is executed, resulting in a miss.

There are two types of fluctuation patterns for the low base weak super reach type: PA2-2, where the special chart fluctuation time is 43,000 ms and the reach performance of low base weak super reach A is executed and results in a miss, and PA2-3, where the special chart fluctuation time is 53,000 ms and the reach performance of low base weak super reach B is executed and results in a miss.

The three types of fluctuation patterns for the fluctuation pattern type low base strong super reach A are PA2-4, where the special chart fluctuation time is 63,000 ms, and the reach performance of low base weak super reach A is executed followed by the reach performance of low base strong super reach A, resulting in a miss; PA2-5, where the special chart fluctuation time is 73,000 ms, and the reach performance of low base weak super reach B is executed followed by the reach performance of low base strong super reach A, resulting in a miss; and PA2-6, where the special chart fluctuation time is 40,000 ms, and the reach performance of low base weak super reach A or low base weak super reach B is not executed, and the reach performance of low base strong super reach A is executed, resulting in a miss.

The three types of fluctuation patterns for the fluctuation pattern type low base strong super reach B are PA2-7, where the special chart fluctuation time is 78,000 ms, and the reach performance of low base weak super reach A is executed followed by the reach performance of low base strong super reach B, resulting in a miss; PA2-8, where the special chart fluctuation time is 83,000 ms, and the reach performance of low base weak super reach B is executed followed by the reach performance of low base strong super reach B, resulting in a miss; and PA2-9, where the special chart fluctuation time is 45,000 ms, and the reach performance of low base weak super reach A or low base weak super reach B is not executed, and the reach performance of low base strong super reach B is executed, resulting in a miss.

The three types of fluctuation patterns for the fluctuation pattern type low base strong super reach C are PA2-10, where the special chart fluctuation time is 88,000 ms, and the reach performance of low base weak super reach A is executed followed by the reach performance of low base strong super reach C, resulting in a miss; PA2-11, where the special chart fluctuation time is 93,000 ms, and the reach performance of low base weak super reach B is executed followed by the reach performance of low base strong super reach C, resulting in a miss; and PA2-12, where the special chart fluctuation time is 50,000 ms, and the reach performance of low base weak super reach A or low base weak super reach B is not executed, and the reach performance of low base strong super reach C is executed, resulting in a miss.

The three types of fluctuation patterns for the low base strongest super reach type are PA2-13, where the special chart fluctuation time is 98,000 ms, and the reach performance of low base weak super reach A is executed, followed by the reach performance of low base strongest super reach, resulting in a miss; PA2-14, where the special chart fluctuation time is 103,000 ms, and the reach performance of low base weak super reach B is executed, followed by the reach performance of low base strongest super reach, resulting in a miss; and PA2-15, where the special chart fluctuation time is 60,000 ms, and the reach performance of low base weak super reach A or low base weak super reach B is not executed, and the reach performance of low base strongest super reach is executed, resulting in a miss.

For the high base super reach A type of fluctuation pattern, there is one type of fluctuation pattern, PA2-16, where the special chart fluctuation time is 30,000 ms and the reach performance of the high base super reach A is executed and results in a miss. For the high base super reach B type of fluctuation pattern, there is one type of fluctuation pattern, PA2-17, where the special chart fluctuation time is 30,000 ms and the reach performance of the high base super reach B is executed and results in a miss. For the high base super reach C type of fluctuation pattern, there is one type of fluctuation pattern, PA2-18, where the special chart fluctuation time is 30,000 ms and the reach performance of the high base super reach C is executed and results in a miss. For the high base super reach D type of fluctuation pattern, there is one type of fluctuation pattern, PA2-19, where the special chart fluctuation time is 30,000 ms and the reach performance of the high base super reach D is executed and results in a miss.

Also, as shown in Figure 11-6, the jackpot fluctuation patterns are similar to the miss fluctuation patterns in that the following fluctuation patterns are provided: non-reach, normal reach, low base strong super reach A, low base strong super reach B, low base strong super reach C, low base strongest super reach, high base super reach A, high base super reach B, high base super reach C, and high base super reach D.

More specifically, as shown in FIG. 11-6, as a non-reach fluctuation pattern type, there is one type of fluctuation pattern PB1-18 in which the special chart fluctuation time is 500 ms + 15,000 ms and no reach performance is executed during time-saving control (time-saving state B).

For the normal reach type of fluctuation pattern, there is one type of fluctuation pattern PB1-1, where the special chart fluctuation time is 20,000 ms + 15,000 ms and the normal reach reach performance is executed to result in a jackpot.

The three types of fluctuation patterns for the low base strong super reach A fluctuation pattern type are PB1-2, where the special chart fluctuation time is 63,000 ms + 15,000 ms, and the reach performance of low base weak super reach A is executed, followed by the reach performance of low base strong super reach A, resulting in a jackpot; PB1-3, where the special chart fluctuation time is 73,000 ms + 15,000 ms, and the reach performance of low base weak super reach B is executed, followed by the reach performance of low base strong super reach A, resulting in a jackpot; and PB-4, where the special chart fluctuation time is 40,000 ms + 15,000 ms, and the reach performance of low base weak super reach A or low base weak super reach B is not executed, and the reach performance of low base strong super reach A is executed, resulting in a jackpot.

The three types of fluctuation patterns for the fluctuation pattern type low base strong super reach B are PB1-5, where the special chart fluctuation time is 78,000 ms + 15,000 ms, and the reach performance of low base weak super reach A is executed, followed by the reach performance of low base strong super reach B, resulting in a jackpot; PB1-6, where the special chart fluctuation time is 83,000 ms + 15,000 ms, and the reach performance of low base weak super reach B is executed, followed by the reach performance of low base strong super reach B, resulting in a jackpot; and PB1-7, where the special chart fluctuation time is 45,000 ms + 15,000 ms, and the reach performance of low base weak super reach A or low base weak super reach B is not executed, and the reach performance of low base strong super reach B is executed, resulting in a jackpot.

The three types of fluctuation patterns for the fluctuation pattern type low base strong super reach C are PB1-8, where the special chart fluctuation time is 88,000 ms + 15,000 ms, and the reach performance of low base weak super reach A is executed, followed by the reach performance of low base strong super reach C, resulting in a jackpot; PB1-9, where the special chart fluctuation time is 93,000 ms + 15,000 ms, and the reach performance of low base weak super reach B is executed, followed by the reach performance of low base strong super reach C, resulting in a jackpot; and PB1-10, where the special chart fluctuation time is 50,000 ms + 15,000 ms, and the reach performance of low base weak super reach A or low base weak super reach B is not executed, and the reach performance of low base strong super reach C is executed, resulting in a jackpot.

The three types of fluctuation patterns for the low base strongest super reach type are PB1-11, where the special chart fluctuation time is 98,000 ms + 15,000 ms, and the reach performance of low base weak super reach A is executed, followed by the reach performance of low base strongest super reach, resulting in a jackpot; PB1-12, where the special chart fluctuation time is 103,000 ms + 15,000 ms, and the reach performance of low base weak super reach B is executed, followed by the reach performance of low base strongest super reach, resulting in a jackpot; and PB1-13, where the special chart fluctuation time is 60,000 ms + 15,000 ms, and the reach performance of low base weak super reach A or low base weak super reach B is not executed, and the reach performance of low base strongest super reach is executed, resulting in a jackpot.

For the high base super reach A fluctuation pattern, there is one type of fluctuation pattern PB1-14, where the special chart fluctuation time is 30000ms + 15000ms, and the reach performance of the high base super reach A is executed to result in a jackpot. For the high base super reach B fluctuation pattern, there is one type of fluctuation pattern PB1-15, where the special chart fluctuation time is 30000ms + 15000ms, and the reach performance of the high base super reach B is executed to result in a jackpot. For the high base super reach C fluctuation pattern, there is one type of fluctuation pattern PB1-16, where the special chart fluctuation time is 30000ms + 15000ms, and the reach performance of the high base super reach C is executed to result in a jackpot. The variation pattern type for high base super reach D is a variation pattern in which the special chart variation time is 30,000 ms + 15,000 ms, and one type of variation pattern, PB1-17, is provided, in which the reach performance of high base super reach D is executed and a jackpot is reached.

[Fluctuation pattern type determination table/fluctuation pattern determination table]
The judgment table stored in ROM 101 includes a plurality of fluctuation pattern type judgment tables for determining a fluctuation pattern type according to a game state and a variable display result, and a plurality of fluctuation pattern type judgment tables for determining a fluctuation pattern according to a fluctuation pattern determined in the fluctuation pattern type judgment table, a game state, a variable display result, and the number of reserved memories of special patterns that execute a variable display (number of reserved memories subject to variable display).

In the variation pattern setting process in this embodiment, a variation pattern type determination table is selected according to the game state and the variable display result. Next, the selected variation pattern type determination table is compared with the random number value MR3 read in step 131SGS55 of the normal special symbol processing to determine the variation pattern type.

For example, when the game state is normal and the variable display result is a miss, the miss fluctuation pattern determination table A shown in Figure 11-7 (A) is selected, and the miss fluctuation pattern determination table A is compared with the value of the random number value MR3 to determine the fluctuation pattern type. If the value of the random number value MR3 is in the range of 0 to 3299, the fluctuation pattern type is determined to be "non-reach", if the value of the random number value MR3 is in the range of 3300 to 4053, the fluctuation pattern type is determined to be "normal reach", if the value of the random number value MR3 is in the range of 4054 to 4073, the fluctuation pattern type is determined to be "low base weak super reach", if the value of the random number value MR3 is in the range of 4074 to 4081, the fluctuation pattern type is determined to be "low base strong super reach A", if the value of the random number value MR3 is in the range of 4082 to 4089, the fluctuation pattern type is determined to be "low base strong super reach B", if the value of the random number value MR3 is in the range of 4090 to 4094, the fluctuation pattern type is determined to be "low base strong super reach C", and if the value of the random number value MR3 is in the range of 4095, the fluctuation pattern type is determined to be "low base strongest super reach".

In addition, if the game state is the time-saving state A or the probability variable state and the variable display result is a miss, the miss fluctuation pattern determination table B shown in Figure 11-7 (B) is selected, and the miss fluctuation pattern determination table B is compared with the value of the random number value MR3 to determine the fluctuation pattern type. If the value of the random number value MR3 is in the range of 0 to 3849, the fluctuation pattern type is determined to be "non-reach", if the value of the random number value MR3 is in the range of 3850 to 4048, the fluctuation pattern type is determined to be "normal reach", if the value of the random number value MR3 is in the range of 4049 to 4066, the fluctuation pattern type is determined to be "high base super reach A", if the value of the random number value MR3 is in the range of 4067 to 4083, the fluctuation pattern type is determined to be "high base super reach B", if the value of the random number value MR3 is in the range of 4084 to 4094, the fluctuation pattern type is determined to be "high base super reach C", and if the value of the random number value MR3 is in the range of 4095, the fluctuation pattern type is determined to be "high base super reach D".

In addition, if the game state is time-saving state B and the variable display result is a miss, the miss fluctuation pattern determination table C shown in FIG. 11-7 (C) is selected, and the miss fluctuation pattern determination table C is compared with the value of the random number value MR3 to determine the fluctuation pattern type. If the value of the random number value MR3 is in the range of 0 to 4095, the fluctuation pattern type is determined to be "non-reach."

Also, if the game state is normal and the variable display result is a jackpot, the jackpot fluctuation pattern determination table A shown in FIG. 11-7 (D) is selected, and the fluctuation pattern type is determined by comparing the jackpot fluctuation pattern determination table A with the value of the random number value MR3. If the value of the random number value MR3 is in the range of 0 to 1298, the fluctuation pattern type is determined to be "normal reach", if the value of the random number value MR3 is in the range of 1299 to 1934, the fluctuation pattern type is determined to be "low base strong super reach A", if the value of the random number value MR3 is in the range of 1935 to 2676, the fluctuation pattern type is determined to be "low base strong super reach B", if the value of the random number value MR3 is in the range of 2677 to 3706, the fluctuation pattern type is determined to be "low base strong super reach C", and if the value of the random number value MR3 is in the range of 3707 to 4095, the fluctuation pattern type is determined to be "low base strongest super reach".

In addition, if the game state is the time-saving state A or the probability variable state and the variable display result is a miss, the jackpot fluctuation pattern determination table B shown in FIG. 11-7 (E) is selected, and the fluctuation pattern type is determined by comparing the jackpot fluctuation pattern determination table B with the value of the random number value MR3. If the value of the random number value MR3 is in the range of 0 to 25, the fluctuation pattern type is determined to be "normal reach", if the value of the random number value MR3 is in the range of 26 to 975, the fluctuation pattern type is determined to be "high base super reach A", if the value of the random number value MR3 is in the range of 976 to 2075, the fluctuation pattern type is determined to be "high base super reach B", if the value of the random number value MR3 is in the range of 2076 to 3380, the fluctuation pattern type is determined to be "high base super reach C", and if the value of the random number value MR3 is in the range of 3381 to 4095, the fluctuation pattern type is determined to be "high base super reach D".

In addition, if the game state is the time-saving state B and the variable display result is a miss, the jackpot fluctuation pattern determination table C shown in FIG. 11-7 (F) is selected, and the miss fluctuation pattern determination table C is compared with the value of the random number value MR3 to determine the fluctuation pattern type. If the value of the random number value MR3 is in the range of 0 to 4095, the fluctuation pattern type is determined to be "non-reach."

After the type of variation pattern is determined as described above, one of the variation pattern determination tables shown in Figures 11-8 to 11-10 is selected according to the game state, the variable display result, and the reserved memory number of special symbols that execute the variable display (reserved number of objects for variable display), and the selected variation pattern determination table is compared with the random number value MR3 read in step 131SGS55 of the normal processing of the special symbols to determine the type of variation pattern.

For example, if the variable display result is a miss, the game state is normal, and the number of reserved memories for variable display is 0 to 2, the miss variation pattern determination table A shown in FIG. 11-8 (A) is selected, and the variation pattern is determined by comparing the miss variation pattern determination table A with the value of the random number value MR4. At this time, if the determined variation pattern type is a non-reach, the variation pattern is determined to be PA1-1 if the value of the random number value MR4 is within the range of 0 to 255. If the determined variation pattern type is a normal reach, the variation pattern is determined to be PA2-1 if the value of the random number value MR4 is within the range of 0 to 255. If the determined variation pattern type is a low base weak super reach, the variation pattern is determined to be PA2-2 if the value of the random number value MR4 is within the range of 0 to 199, and the variation pattern is determined to be PA2-3 if the value of the random number value MR4 is within the range of 200 to 255.

If the determined type of fluctuation pattern is low base strong super reach A, if the value of random number MR4 is within the range of 0 to 88, the fluctuation pattern is determined to be PA2-4, if the value of random number MR4 is within the range of 89 to 173, the fluctuation pattern is determined to be PA2-4, and if the value of random number MR4 is within the range of 174 to 255, the fluctuation pattern is determined to be PA2-5. If the determined type of fluctuation pattern is low base strong super reach B, if the value of random number MR4 is within the range of 0 to 88, the fluctuation pattern is determined to be PA2-7, if the value of random number MR4 is within the range of 89 to 173, the fluctuation pattern is determined to be PA2-8, and if the value of random number MR4 is within the range of 174 to 255, the fluctuation pattern is determined to be PA2-9.

If the determined type of fluctuation pattern is low base strong super reach C, if the value of random number MR4 is within the range of 0 to 88, the fluctuation pattern is determined to be PA2-10, if the value of random number MR4 is within the range of 89 to 173, the fluctuation pattern is determined to be PA2-11, and if the value of random number MR4 is within the range of 174 to 255, the fluctuation pattern is determined to be PA2-12. If the determined type of fluctuation pattern is low base strongest super reach, if the value of random number MR4 is within the range of 0 to 88, the fluctuation pattern is determined to be PA2-13, if the value of random number MR4 is within the range of 89 to 173, the fluctuation pattern is determined to be PA2-14, and if the value of random number MR4 is within the range of 1743 to 255, the fluctuation pattern is determined to be PA2-15.

In addition, if the variable display result is a miss, the game state is normal, and the number of reserved memories for variable display is three, the miss variation pattern determination table B shown in FIG. 11-8 (B) is selected, and the variation pattern is determined by comparing the miss variation pattern determination table B with the value of the random number value MR4. At this time, if the determined variation pattern type is a non-reach, the variation pattern is determined to be PA1-2 if the value of the random number value MR4 is within the range of 0 to 255. If the determined variation pattern type is a normal reach, the variation pattern is determined to be PA2-1 if the value of the random number value MR4 is within the range of 0 to 255.

If the determined type of fluctuation pattern is low base strong super reach A, if the value of random number MR4 is within the range of 0 to 88, the fluctuation pattern is determined to be PA2-4, if the value of random number MR4 is within the range of 89 to 173, the fluctuation pattern is determined to be PA2-4, and if the value of random number MR4 is within the range of 173 to 255, the fluctuation pattern is determined to be PA2-5. If the determined type of fluctuation pattern is low base strong super reach B, if the value of random number MR4 is within the range of 0 to 88, the fluctuation pattern is determined to be PA2-7, if the value of random number MR4 is within the range of 89 to 173, the fluctuation pattern is determined to be PA2-8, and if the value of random number MR4 is within the range of 174 to 255, the fluctuation pattern is determined to be PA2-9.

If the determined type of fluctuation pattern is low base strong super reach C, if the value of random number MR4 is within the range of 0 to 88, the fluctuation pattern is determined to be PA2-10, if the value of random number MR4 is within the range of 89 to 173, the fluctuation pattern is determined to be PA2-11, and if the value of random number MR4 is within the range of 174 to 255, the fluctuation pattern is determined to be PA2-12. If the determined type of fluctuation pattern is low base strongest super reach, if the value of random number MR4 is within the range of 0 to 88, the fluctuation pattern is determined to be PA2-13, if the value of random number MR4 is within the range of 89 to 173, the fluctuation pattern is determined to be PA2-14, and if the value of random number MR4 is within the range of 174 to 255, the fluctuation pattern is determined to be PA2-15.

In addition, if the variable display result is a miss and the game state is time-saving state A or a sure-win state, the miss fluctuation pattern determination table C shown in FIG. 11-9 (A) is selected, and the fluctuation pattern is determined by comparing the miss fluctuation pattern determination table C with the value of the random number value MR4. At this time, if the determined fluctuation pattern type is a non-reach, the fluctuation pattern is determined to be PA1-3 if the value of the random number value MR4 is within the range of 0 to 255. If the determined fluctuation pattern type is a normal reach, the fluctuation pattern is determined to be PA2-1 if the value of the random number value MR4 is within the range of 0 to 255.

If the determined type of fluctuation pattern is high base super reach A, the fluctuation pattern is determined to be PA2-16 if the value of random number value MR4 is within the range of 0 to 255. If the determined type of fluctuation pattern is high base super reach B, the fluctuation pattern is determined to be PA2-17 if the value of random number value MR4 is within the range of 0 to 255. If the determined type of fluctuation pattern is high base super reach C, the fluctuation pattern is determined to be PA2-18 if the value of random number value MR4 is within the range of 0 to 255. If the determined type of fluctuation pattern is high base super reach D, the fluctuation pattern is determined to be PA2-19 if the value of random number value MR4 is within the range of 0 to 255.

In addition, if the variable display result is a miss and the game state is time-saving state B, the miss fluctuation pattern determination table D shown in FIG. 11-9 (B) is selected, and the fluctuation pattern is determined by comparing the miss fluctuation pattern determination table D with the value of the random number value MR4. At this time, if the determined fluctuation pattern type is a non-reach, the fluctuation pattern is determined to be PA1-4 if the value of the random number value MR4 is within the range of 0 to 255.

In addition, if the variable display result is a jackpot and the game state is normal, the jackpot fluctuation pattern determination table A shown in FIG. 11-10 (A) is selected, and the fluctuation pattern is determined by comparing the jackpot fluctuation pattern determination table A with the value of the random number value MR4. At this time, if the determined fluctuation pattern type is a normal reach, the fluctuation pattern is determined to be PB1-1 if the value of the random number value MR4 is within the range of 0 to 255.

If the determined type of fluctuation pattern is low base strong super reach A, if the value of random number MR4 is within the range of 0 to 81, the fluctuation pattern is determined to be PB1-2, if the value of random number MR4 is within the range of 82 to 166, the fluctuation pattern is determined to be PB1-3, and if the value of random number MR4 is within the range of 167 to 255, the fluctuation pattern is determined to be PB1-4. If the determined type of fluctuation pattern is low base strong super reach B, if the value of random number MR4 is within the range of 0 to 81, the fluctuation pattern is determined to be PB1-5, if the value of random number MR4 is within the range of 82 to 166, the fluctuation pattern is determined to be PB1-6, and if the value of random number MR4 is within the range of 167 to 255, the fluctuation pattern is determined to be PB1-7.

If the determined type of fluctuation pattern is low base strong super reach C, if the value of random number MR4 is within the range of 0 to 81, the fluctuation pattern is determined to be PB1-8, if the value of random number MR4 is within the range of 82 to 166, the fluctuation pattern is determined to be PB1-9, and if the value of random number MR4 is within the range of 167 to 255, the fluctuation pattern is determined to be PB1-10. If the determined type of fluctuation pattern is low base strongest super reach, if the value of random number MR4 is within the range of 0 to 81, the fluctuation pattern is determined to be PB1-11, if the value of random number MR4 is within the range of 82 to 166, the fluctuation pattern is determined to be PB1-12, and if the value of random number MR4 is within the range of 167 to 255, the fluctuation pattern is determined to be PB1-13.

In addition, if the variable display result is a jackpot and the game state is time-saving state A or a sure-win state, the jackpot fluctuation pattern determination table B shown in FIG. 11-10 (B) is selected, and the fluctuation pattern is determined by comparing the jackpot fluctuation pattern determination table B with the value of the random number value MR4. At this time, if the determined fluctuation pattern type is a normal reach, the fluctuation pattern is determined to be PB1-1 if the value of the random number value MR4 is within the range of 0 to 255.

If the determined fluctuation pattern type is high base super reach A, the fluctuation pattern is determined to be PB1-14 if the value of random number value MR4 is within the range of 0 to 255. If the determined fluctuation pattern type is high base super reach B, the fluctuation pattern is determined to be PB1-15 if the value of random number value MR4 is within the range of 0 to 255. If the determined fluctuation pattern type is high base super reach C, the fluctuation pattern is determined to be PB1-16 if the value of random number value MR4 is within the range of 0 to 255. If the determined fluctuation pattern type is high base super reach D, the fluctuation pattern is determined to be PB1-17 if the value of random number value MR4 is within the range of 0 to 255.

In addition, if the variable display result is a jackpot and the game state is time-saving state B, the jackpot fluctuation pattern determination table C shown in FIG. 11-10 (C) is selected, and the fluctuation pattern is determined by comparing the jackpot fluctuation pattern determination table C with the value of the random number value MR4. At this time, if the determined fluctuation pattern type is a non-reach, the fluctuation pattern is determined to be PB1-18 if the value of the random number value MR4 is within the range of 0 to 255.

[Super Reach Performance Expectations]
The jackpot expectation rate when the variation pattern type and the variation pattern are determined as described above is as shown in Figures 11-11 (A) to (C). The jackpot expectation rate of the Super Reach performance is the rate of a jackpot when the corresponding Super Reach performance is executed, and is a value calculated by dividing the rate of a jackpot when the corresponding Super Reach performance is executed by the sum of the rate of a jackpot when the corresponding Super Reach performance is executed and the rate of a miss when the corresponding Super Reach performance is executed.

As shown in Figure 11-11 (A), of the Super Reach reach effects executed when the game state is normal, the low base weak Super Reach A and low base weak Super Reach B reach effects do not directly result in a jackpot, so the expected jackpot probability is 0% for each. However, the low base weak Super Reach A and low base weak Super Reach B reach effects can develop into other Super Reach (low base strong Super Reach A-C, low base strongest reach) reach effects, and the expected probability of development from low base weak Super Reach A to other Super Reach reach effects is approximately 44%, and the expected probability of development from low base weak Super Reach B to other Super Reach reach effects is approximately 68%. The expected rate of development of a Super Reach performance is the rate at which the corresponding Super Reach performance develops into another Super Reach performance when it is executed, and is a value calculated by dividing the rate at which the corresponding Super Reach performance develops into another Super Reach performance by the sum of the rate at which the corresponding Super Reach performance develops into another Super Reach performance and the rate at which the corresponding Super Reach performance is executed and does not develop into another Super Reach performance, but is a miss.

In addition, among the Super Reach reach effects that are executed when the game state is normal, the expected jackpot probability of the low base strong Super Reach A reach effect is approximately 20%, the expected jackpot probability of the low base strong Super Reach B reach effect is approximately 25%, the expected jackpot probability of the low base strong Super Reach C reach effect is approximately 35%, and the expected jackpot probability of the low base strongest Super Reach reach effect is approximately 55%. Furthermore, the jackpot expectancy of the reach performances of low base strong Super Reach A to C and low base strongest Super Reach differs depending on whether it develops from low base weak Super Reach A, when it develops from low base weak Super Reach B, or when it is executed directly without going through low base weak Super Reach A or B. The jackpot expectancy of the reach performance of low base strong Super Reach A developed from low base weak Super Reach A is approximately 19%, the jackpot expectancy of the reach performance of low base strong Super Reach A developed from low base weak Super Reach B is approximately 20%, the jackpot expectancy of the reach performance of low base strong Super Reach A executed directly without going through B is approximately 21%, the jackpot expectancy of the reach performance of low base strong Super Reach B developed from low base weak Super Reach A is approximately 24%, and the jackpot expectancy of the reach performance of low base strong Super Reach B developed from low base weak Super Reach B is approximately 23%. The expected jackpot probability of the reach performance is about 25%, the expected jackpot probability of the reach performance of low base strong super reach B executed directly without going through B is about 27%, the expected jackpot probability of the reach performance of low base strong super reach C developed from low base weak super reach A is about 33%, the expected jackpot probability of the reach performance of low base strong super reach C developed from low base weak super reach B is about 35%, the expected jackpot probability of the reach performance of low base strong super reach C executed directly without going through B is about 37%, the expected jackpot probability of the reach performance of low base strongest super reach developed from low base weak super reach A is about 53%, the expected jackpot probability of the reach performance of low base strongest super reach developed from low base weak super reach B is about 55%, the expected jackpot probability of the reach performance of low base strongest super reach executed directly without going through B is about 57%.

As shown in Figure 11-11 (B), when the game state is time-saving state A, the expected jackpot probability of the reach effect of high base super reach A is approximately 14%, the expected jackpot probability of the reach effect of high base super reach B is approximately 16%, the expected jackpot probability of the reach effect of high base super reach C is approximately 27%, and the expected jackpot probability of the reach effect of high base super reach D is approximately 70%.

As shown in Figure 11-11 (C), when the game state is in a special probability state, the expected jackpot probability of the reach effect of high base Super Reach A is approximately 40%, the expected jackpot probability of the reach effect of high base Super Reach B is approximately 45%, the expected jackpot probability of the reach effect of high base Super Reach C is approximately 60%, and the expected jackpot probability of the reach effect of high base Super Reach D is approximately 90%.

As described below, in the Super Reach performance, it is possible to display an expectation indication display that indicates the jackpot expectation of the corresponding Super Reach performance by the number of stars. As shown in Figure 11-11 (A), among the Super Reach that are executed when the game state is in the normal state, the expectation indication display is not displayed in the reach performances of low base weak Super Reach A and B, while the expectation indication display in the reach performance of low base strong Super Reach A displays 3 stars, the expectation indication display in the reach performance of low base strong Super Reach B displays 3.5 stars, the expectation indication display in the reach performance of low base strong Super Reach C displays 4 stars, and the expectation indication display in the reach performance of low base strongest Super Reach displays 4.5 stars. As shown in Figures 11-11 (B) and (C), when the game state is in the time-saving state A and the probability bonus state, the expectation indication display for the reach performance of high base super reach A displays 3 stars, the expectation indication display for the reach performance of high base super reach B displays 3.5 stars, the expectation indication display for the reach performance of high base super reach C displays 4 stars, and the expectation indication display for the reach performance of high base super reach D displays 4.5 stars.

In the Super Reach reach performance executed when the game state is normal and in the Super Reach reach performance executed when the game state is in a special probability state, the same number of stars may be displayed in the expectation indication display, but as shown in Figures 11-12 (A) and (B), even if the number of stars displayed in the expectation indication display is the same, the suggested jackpot expectation is not the same. In the case where the number of stars displayed in the expectation indication display is the same, the Super Reach reach performance executed when the game state is in a special probability state suggests a higher jackpot expectation than the Super Reach reach performance executed when the game state is normal.

In addition, whether it is a Super Reach reach performance that is executed when the gaming state is normal or a Super Reach reach performance that is executed when the gaming state is in a special state, the suggested probability of a jackpot increases for every 0.5 increase in the number of stars displayed in the expectation suggestion display, and as shown in Figures 11-12 (A) and (B), in the expectation suggestion display of a Super Reach reach performance in either gaming state, the more stars there are, the greater the increase in the suggested probability of a jackpot. Also, as shown in Figures 11-12 (A) and (B), the increase in the jackpot expectation rate when the number of stars displayed in the expectation rate suggestion display increases from 3 to 3.5 is the same for both the Super Reach reach performance executed when the game state is normal and the Super Reach reach performance executed when the game state is in a special probability state, but the increase in the jackpot expectation rate when the number of stars displayed in the expectation rate suggestion display increases from 3.5 to 4, or from 4 to 4.5, is greater for the Super Reach reach performance executed when the game state is in a special probability state than for the Super Reach reach performance executed when the game state is normal.

[Performance control command]
FIG. 11-13(A) is an explanatory diagram showing an example of the contents of the performance control command in this embodiment. The performance control command is, for example, a two-byte configuration, with the first byte indicating MODE (classification of command) and the second byte indicating EXT (type of command). The first bit (bit 7) of the MODE data is always set to "1", and the first bit of the EXT data is set to "0". Note that the command form shown in FIG. 11-13(A) is only an example, and other command forms may be used. Also, in this example, the control command is composed of two control signals, but the number of control signals constituting the control command may be one, or may be three or more.

In the example shown in FIG. 11-13(A), command 8001H is a first variable display start command that specifies the start of variable display in a special symbol game using the first special symbol in the first special symbol display device 4A. Command 8002H is a second variable display start command that specifies the start of variable display in a special symbol game using the second special symbol in the second special symbol display device 4B. Command 81XXH is a variation pattern designation command that specifies the variation pattern (variation time) of the decorative symbols etc. that are variably displayed in the "left", "middle", and "right" decorative symbol display areas 5L, 5C, and 5R in the image display device 5 in response to the variable display of the special symbol in the special symbol game. Here, XXH indicates an unspecified hexadecimal number, and may be any value that is set arbitrarily according to the contents of the instruction by the performance control command. In addition, in the variation pattern designation command, different EXT data is set according to the specified variation pattern etc.

Command 8C00H is a variable display result specification command, which is a presentation control command that specifies a variable display result such as a special pattern or a decorative pattern. For example, as shown in FIG. 11-13 (B), the variable display result specification command sets different EXT data depending on the determination result (predetermined result) of whether the variable display result is a "miss" or a "jackpot", and the determination result (jackpot type determination result) of which of several types of jackpot type should be used if the variable display result is a "jackpot".

For example, as shown in FIG. 11-13(B), command 8C00H is a first variable display result designation command in which the variable display result is "miss". Command 8C01H is a second variable display result designation command that notifies the pre-determined result and the jackpot type determination result that the variable display result is "jackpot" and the jackpot type is "jackpot A". Command 8C02H is a third variable display result designation command that notifies the pre-determined result and the jackpot type determination result that the variable display result is "jackpot" and the jackpot type is "jackpot B". Command 8C03H is a fourth variable display result designation command that notifies the pre-determined result and the jackpot type determination result that the variable display result is "jackpot" and the jackpot type is "jackpot C".

Command 8F00H is a pattern confirmation command that specifies the stopping (confirmation) of the variable display of decorative patterns in each of the "left", "middle", and "right" decorative pattern display areas 5L, 5C, and 5R of the image display device 5.

Command 9000H is an initialization specification (power-on specification) command for displaying the initial screen when power is turned on in the image display device 5. Command 9200H is a power outage recovery specification command for displaying a power outage recovery screen on the image display device 5 indicating that the pachinko gaming machine 1 has been restored from a power outage (power outage) state.

Command 95XXH is a game state designation command that designates the current game state of the pachinko gaming machine 1. In the game state designation command, for example, different EXT data is set depending on the current game state of the pachinko gaming machine 1. As a specific example, command 9500H is a first game state designation command corresponding to a game state in which time-saving control is not performed (low base state, normal state), and command 9501H is a second game state designation command corresponding to a game state in which time-saving control is performed (high base state, time-saving state).

Command A0XXH is a jackpot start command (also called a "fanfare command") that specifies the display of an effect image indicating the start of a jackpot game state. Command A1XXH is a large prize opening open notification command that notifies the player that the large prize opening is in an open state during a jackpot game state. Command A2XXH is a large prize opening post-open notification command that notifies the player that the large prize opening has changed from an open state to a closed state during a jackpot game state. Command A3XXH is a jackpot end command that specifies the display of an effect image at the end of a jackpot game state.

In the jackpot start designation command and jackpot end designation command, different EXT data may be set according to the pre-determined result and the jackpot type determination result, for example by setting the same EXT data as the variable display result notification command. Alternatively, in the jackpot start designation command and jackpot end designation command, the correspondence between the pre-determined result and the jackpot type determination result and the set EXT data may be made different from the correspondence in the variable display result notification command. In the jackpot opening notification command and the jackpot opening after notification command, different EXT data is set according to the number of rounds executed in the jackpot game state (for example, "1" to "10").

Command B100H is a first start port entry designation command that notifies the first start condition for executing a special symbol game using a first special symbol in the first special symbol display device 4A has been established based on the occurrence of a start winning (first start winning) caused by a game ball passing through (entering) the first start winning port formed by the winning ball device 6A being detected by the first start port switch 22A. Command B200H is a second start port entry designation command that notifies the second start condition for executing a special symbol game using a second special symbol in the second special symbol display device 4B has been established based on the occurrence of a start winning (second start winning) caused by a game ball passing through (entering) the second start winning port formed by the variable winning ball device 6B being detected by the second start port switch 22B.

Command C1XXH is a first reserved memory number notification command that notifies the first reserved memory number in order to display the reserved memory number of special figures in an identifiable manner in the first reserved memory display area 132SG005D, etc. Command C2XXH is a second reserved memory number notification command that notifies the second reserved memory number in order to display the reserved memory number of special figures in an identifiable manner in the second reserved memory display area 132SG005U, etc. The first reserved memory number notification command is transmitted from the main board 11 to the performance control board 12 when the first start port entry designation command is transmitted based on, for example, the first start condition being satisfied when the game ball passes (enters) the first start entry port. The second reserved memory number notification command is transmitted from the main board 11 to the performance control board 12 when the second start port entry designation command is transmitted based on, for example, the second start condition being satisfied when the game ball passes (enters) the second start entry port. In addition, the first pending memory number notification command and the second pending memory number notification command may be sent in response to the start of execution of the special game when either the first start condition or the second start condition is met (when the pending memory number is reduced).

Instead of the first pending memory number notification command and the second pending memory number notification command, a total pending memory number notification command that notifies the total pending memory number may be sent. In other words, the total pending memory number notification command may be used to notify an increase (or decrease) in the total pending memory number.

Command C4XXH is a pattern designation command that specifies the winning result at the time of the initial winning. Command C6XXH is a variable category designation command that specifies the variable category of the winning result at the time of the initial winning.

Command D100H is a jackpot start switch passing notification command that notifies the player that the game ball has passed the jackpot start switch 131SG024 when the variable display result is a jackpot, i.e., that the jackpot game has started. Command D200H is a V win notification command that notifies the player that the game ball has passed the V switch 131SG023B1 during a jackpot game, i.e., that the game state will be controlled to a high probability state after the jackpot game ends.

Command E1XXH is a remaining time-saving count notification command that notifies the number of remaining time-saving control times in the time-saving state excluding rescue time-saving (time-saving state A). Command E2XXH is a remaining chance-change count notification command that notifies the number of remaining chance-change control times in the chance-change state.

Command F100H is a right-hit LED on notification command that notifies the right-hit LED131SG031 to light up. Command F101H is a right-hit LED off notification command that notifies the right-hit LED131SG031 to light up.

Command 91XXH is a command to specify the number of times rescue time-saving is performed upon recovery, and is a performance control command that converts the value of the rescue time-saving counter to a hexadecimal number when the power is restored and specifies it. With the command to specify the number of times rescue time-saving is performed upon recovery, different EXT data is set according to each digit (first, second, third, fourth digit) of the value of the rescue time-saving counter when the power is restored (a four-digit value), as shown in FIG. 11-13 (C), for example.

For example, as shown in FIG. 11-13 (C), commands 9100H to 910FH are recovery time reduction number specification 1 commands that specify the first digit of the value of the recovery time reduction number. Commands 9110H to 911FH are recovery time reduction number specification 2 commands that specify the second digit of the value of the recovery time reduction number. Commands 9130H to 913FH are recovery time reduction number specification 3 commands that specify the third digit of the value of the recovery time reduction number. Commands 9140H to 914FH are recovery time reduction number specification 4 commands that specify the fourth digit of the value of the recovery time reduction number.

Command 94XXH is a rescue time reduction count designation command, which is a presentation control command that designates the remaining number of variable display times (126 times or less) until rescue time reduction occurs. With the rescue time reduction count designation command, for example, as shown in FIG. 11-13 (D), different EXT data is set according to the remaining number of variable display times (126 times or less) until rescue time reduction occurs.

For example, as shown in FIG. 11-13 (D), command 9400H is a command specifying number A of rescue time reductions that specifies that the rescue time reduction has been reached. Command 9401H is a command specifying number B of rescue time reductions that specifies that 1 to 125 times remain until the rescue time reduction is reached. Command 947EH is a command specifying number C of rescue time reductions that specifies that 126 times remain until the rescue time reduction is reached. Command 947FH is a command specifying number D of rescue time reductions that specifies that 127 or more times remain until the rescue time reduction is reached.

Command 96XXH is a rescue time reduction number 2 designation command, which is a performance control command that designates the remaining number of variable displays (in units of 100) until the rescue time reduction occurs. In the rescue time reduction number 2 designation command, for example, a value corresponding to the remaining number of variable displays (in units of 100) until the rescue time reduction occurs is set in the EXT data of the rescue time reduction number 2 designation command. For example, if the remaining number of variable displays until the rescue time reduction occurs is 100, command 9601H is sent as the rescue time reduction number 2 designation command, and if the remaining number of variable displays is 700, command 9607H is sent as the rescue time reduction number 1 designation command. Command 9F00(H) is a customer waiting demonstration display designation command that designates a customer waiting demonstration.

[Game control data storage area]
The RAM 102 provided in the game control microcomputer 100 shown in FIG. 11-2 may be a backup RAM, part or all of which is backed up by a backup power source created in a predetermined power supply board. In other words, even if the power supply to the pachinko game machine 1 is stopped, part or all of the contents of the RAM 102 are stored for a predetermined period (until the capacitor serving as the backup power source discharges and the backup power source is unable to supply power). In particular, at least the data corresponding to the game state, i.e., the control state of the game control means (such as a special chart process flag) and the data indicating the number of unpaid winning balls may be stored in the backup RAM. The data corresponding to the control state of the game control means is data necessary to restore the control state to the state before the occurrence of a power outage, etc., based on the data, when the power is restored after a power outage, etc. occurs. In addition, the data corresponding to the control state and the data indicating the number of unpaid winning balls are defined as data indicating the progress state of the game.

In this RAM 102, for example, a game control data holding area 131SG150 as shown in FIG. 11-14 is provided as an area for holding various data used to control the progress of the game in the pachinko game machine 1. The game control data holding area 131SG150 shown in FIG. 11-14 includes a first special chart reserve memory unit 131SG151A, a second special chart reserve memory unit 131SG151B, a regular chart reserve memory unit 131SG151C, a game control flag setting unit 131SG152, a game control timer setting unit 131SG153, a game control counter setting unit 131SG154, and a game control buffer setting unit 131SG155.

The first special symbol reservation memory unit 131SG151A stores reservation data for a special symbol game (a special symbol game using the first special symbol in the first special symbol display device 4A) that has not yet started, but in which a game ball has passed (entered) through the first start winning port formed by the winning ball device 6A and a start winning (first start winning) has occurred. As an example, the first special symbol reservation memory unit 131SG151A associates reservation numbers with the order of winning (the order of detection of the game ball) into the first start winning port, and stores, as reservation data, random number values MR1 for determining the special symbol display result, random number values MR2 for determining the jackpot type, random number values MR3 for determining the fluctuation pattern type, and numerical data indicating random number values MR4 for determining the fluctuation pattern, which are extracted by the CPU 103 from the random number circuit 104, etc., based on the establishment of the first start condition when the game ball passes (enters), until the number of memories reaches a predetermined upper limit (for example, "4"). The upper limit of reserved data (reserved memory) that can be stored in the second special chart reserved memory unit 131SG151B is always 4 regardless of the game state. The reserved data stored in the first special chart reserved memory unit 131SG151A in this way indicates that the execution of the special chart game using the first special chart is reserved, and becomes reserved information that makes it possible to determine whether or not a jackpot will be hit based on the variable display result (special chart display result) in this special chart game.

The second special symbol reservation memory unit 131SG151B stores reservation data of a special symbol game (a special symbol game using a second special symbol in the second special symbol display device 4B) in which a game ball has passed (entered) through the second start winning port formed by the variable winning ball device 6B and a start winning (second start winning) has occurred but has not yet started. As an example, the second special symbol reservation memory unit 131SG151B associates the reserved number with the winning order (the order of detection of the game ball) into the second start winning port, and stores the random number value MR1 for determining the special symbol display result, the random number value MR2 for determining the jackpot type, the random number value MR3 for determining the fluctuation pattern type, and the random number value MR4 for determining the fluctuation pattern, which are extracted by the CPU 103 from the random number circuit 104, etc. based on the establishment of the second start condition when the game ball passes (enters), as reserved data until the number reaches a predetermined upper limit value (for example, "4"). The upper limit of reserved data (reserved memory) that can be stored in the second special chart reserved memory unit 131SG151B is always 4, regardless of the game status. The reserved data stored in the second special chart reserved memory unit 131SG151B thus indicates that the execution of a special chart game using the second special chart is reserved, and serves as reserved information that makes it possible to determine whether or not a jackpot will be hit based on the variable display result (special chart display result) in this special chart game.

In other words, in this embodiment, a maximum of four reserved memories can be stored as the first special chart reserved memory (reserved memories that can be stored in the first special chart reserved memory unit 131SG151A), and a maximum of four reserved memories can be stored as the second special chart reserved memory (reserved memories that can be stored in the second special chart reserved memory unit 131SG151B).

The reserved information (first reserved information) based on the establishment of the first start condition by the game ball passing (entering) the first start winning port, and the reserved information (second reserved information) based on the establishment of the second start winning condition by the game ball passing (entering) the second start winning port may be stored in a common reserved memory unit in association with the reserved number. In this case, start port data indicating whether the game ball passed (entered) the first or second start winning port may be included in the reserved information and stored in association with the reserved number.

When variable display is executed, first, if there is a second special symbol reserved memory in the normal special symbol processing (see FIG. 6), the CPU 103 reads out the random numbers MR1 to MR4 from the second special symbol reserved memory 131SG151B and then shifts the contents of the second special symbol reserved memory 131SG151B. In other words, if the random numbers MR1 to MR4 are stored as reserved memories for reserved number 1 in the second special symbol reserved memory 131SG151B, the CPU 103 reads out the random numbers MR1 to MR4 stored as reserved memories for reserved number 1, erases the reserved memories for reserved number 1, and re-stores the reserved memories stored as reserved memories for reserved number 2 as reserved memories for reserved number 1, the reserved memories stored as reserved memories for reserved number 3 as reserved memories for reserved number 2, and the reserved memories stored as reserved memories for reserved number 4 as reserved memories for reserved number 3.

In addition, if no reserved memory is stored in the second special chart reserved memory unit 131SG151B, the CPU 103 determines whether or not the first special chart reserved memory exists. If the first special chart reserved memory exists, the CPU 103 reads the random number values MR1 to MR4 from the first special chart reserved memory unit 131SG151A and then shifts the memory contents of the first special chart reserved memory unit 131SG151A. In other words, when the random number values MR1 to MR4 are stored as the reserved memory of reserved number 1 in the first special chart reserved memory unit 131SG151A, the CPU 103 reads out the values of the random number values MR1 to MR4 stored as the reserved memory of reserved number 1, erases the reserved memory of reserved number 1, and re-stores the reserved memory stored as reserved memory of reserved number 2 as reserved memory of reserved number 1, the reserved memory stored as reserved memory of reserved number 3 as reserved memory of reserved number 2, and the reserved memory stored as reserved memory of reserved number 4 as reserved memory of reserved number 3.

Then, the CPU 103 executes a judgment of the variable display result based on the random number value MR1 read from the first special pattern reserved memory unit 131SG151A or the second special pattern reserved memory unit 131SG151B (if the variable display result is a jackpot, it also judges the type of jackpot based on the random number value MR2), and then in the variation pattern judgment process (see FIG. 6), it judges the variation pattern type using a variation pattern type judgment table that differs depending on the game state, the variable display result, and the number of reserved memories of the special pattern that executes the variable display, and then it further determines the variation pattern using a variation pattern judgment table that differs depending on the determined variation pattern type, the game state, the number of reserved memories, etc.

In other words, in this embodiment, the CPU 103 can determine the variation pattern in the variation pattern setting process according to the number of reserved memories subtracted by 1 from the number of reserved memories immediately before the variable display.

The regular symbol reserve memory unit 131SG151C stores reserve information for regular symbol games that have not yet been started by the regular symbol display device 20, even though a game ball has been detected by the gate switch 21. For example, the regular symbol reserve memory unit 131SG151C associates the game balls with reserve numbers in the order in which they were detected by the gate switch 21, and stores numerical data indicating a random number value MR4 for determining the regular symbol display result extracted by the CPU 103 from the random number circuit 104, etc. based on the passage of the game ball as reserved data, until the number reaches a predetermined upper limit (for example, "4").

The game control flag setting unit 131SG152 is provided with multiple types of flags whose states can be updated depending on the progress of the game on the pachinko game machine 1. For example, the game control flag setting unit 131SG152 stores data indicating the value of the flag and data indicating the on or off state for each of the multiple types of flags.

The game control timer setting unit 131SG153 is provided with various timers used to control the progress of the game in the pachinko game machine 1. For example, the game control timer setting unit 131SG153 stores data indicating the timer values of multiple types of timers.

The game control counter setting unit 131SG154 is provided with multiple types of counters for counting count values used to control the progress of the game in the pachinko game machine 1. For example, the game control counter setting unit 131SG154 stores data indicating the count values of each of the multiple types of counters. Here, the game control counter setting unit 131SG154 may be provided with a random counter for counting some or all of the game random numbers in a manner that allows the CPU 103 to update them by software.

In the random counter of the game control counter setting unit 131SG154, random numbers not generated by the random number circuit 104, for example, numerical data indicating random numbers MR1 to MR6, are stored as random count values, and the numerical data indicating each random number is updated periodically or irregularly according to the execution of software by the CPU 103. The software executed by the CPU 103 to update the random count value may be for updating the random count value separately from the updating operation of the numerical data in the random number circuit 104, or may be for updating the random count value by performing a predetermined process such as scrambling or arithmetic processing on all or part of the numerical data extracted from the random number circuit 104.

The game control buffer setting unit 131SG155 is provided with various buffers that temporarily store data used to control the progress of the game in the pachinko game machine 1. For example, the game control buffer setting unit 131SG155 stores data indicating the buffer values for each of multiple types of buffers.

[Performance control data storage area]
The RAM 122 mounted on the performance control board 12 is provided with a performance control data holding area 131SG190 as shown in Fig. 11-15(A) as an area for holding various data used to control performance operations. The performance control data holding area 131SG190 shown in Fig. 11-15(A) includes a performance control flag setting unit 131SG191, a performance control timer setting unit 131SG192, a performance control counter setting unit 131SG193, and a performance control buffer setting unit 131SG194.

The performance control flag setting unit 131SG191 is provided with multiple types of flags whose states can be updated according to the performance operation state, such as the display state of the performance image on the screen of the image display device 5, and the performance control commands sent from the main board 11. For example, the performance control flag setting unit 131SG191 stores data indicating the flag value and data indicating the on or off state for each of the multiple types of flags.

The performance control timer setting unit 131SG192 is provided with multiple types of timers that are used to control the progress of various performance operations, such as the display operation of a performance image on the screen of the image display device 5. For example, the performance control timer setting unit 131SG192 stores data indicating the timer values of each of the multiple types of timers.

The performance control counter setting unit 131SG193 is provided with multiple types of counters used to control the progress of various performance operations. For example, the performance control counter setting unit 131SG193 stores data indicating the count values of each of the multiple types of counters.

The performance control buffer setting unit 131SG194 is provided with various buffers that temporarily store data used to control the progress of various performance operations. For example, the performance control buffer setting unit 131SG194 stores data indicating the buffer values for each of multiple types of buffers.

In this embodiment, the data constituting the start winning time receiving command buffer 131SG194A as shown in FIG. 11-15(B) is stored in a predetermined area of the performance control buffer setting unit 131SG194. The start winning time receiving command buffer 131SG194A is provided with a storage area (area corresponding to buffer numbers "1-1" to "1-4") corresponding to the maximum value of the total reserved memory number of the first special chart reserved memory (for example, "4"). The start winning time receiving command buffer 131SG194A is provided with a storage area (area corresponding to buffer numbers "2-1" to "2-4") corresponding to the maximum value of the total reserved memory number of the second special chart reserved memory (for example, "4"). When a start winning occurs in the first start winning port or the second start winning port, a set of four commands, namely, a start winning port winning designation command (first start winning port winning designation command or second start winning port winning designation command), a pattern designation command, a variable category designation command, and a reserved memory number notification command (first reserved memory number notification command or second reserved memory number notification command), is transmitted from the main board 11 to the performance control board 12. The storage area corresponding to the first special pattern reserved memory and the storage area corresponding to the second special pattern reserved memory in the start winning reception command buffer 131SG194A are provided with storage areas (entries) for storing these start winning port winning designation commands, the area for storing pattern designation commands, the area for storing variable category designation commands, the area for storing reserved memory number notification commands, and the area for storing reserved display flags, in correspondence with the reserved memory number, and for storing them separately as the first special pattern reserved memory and the second special pattern reserved memory.

When the start condition is met and the variable display of the top reserved memory (buffer number "1-1" or buffer number "2-1") begins, the contents (data) of the reserved memory for which the start condition is met are copied to the active display buffer 131SG194B in FIG. 11-15 (C), and the contents of the copied reserved memory are themselves deleted from the start winning time reception command buffer 131SG194A. The contents of the storage areas lower than the deleted reserved memory are then shifted one by one to the higher storage areas.

As described above, when the variable display of the reserved memory (buffer number "1-1" or "2-1") begins, the contents (data) of the reserved memory for which the start condition is met are copied to the active display buffer 131SG194B, so as shown in FIG. 11-15 (C), a storage area similar to that of the start winning reception command buffer 131SG194A is provided. In other words, an area for storing the start winning designation command, an area for storing the pattern designation command, an area for storing the variable category command, an area for storing the reserved memory count notification command, and an area for storing the reserved display flag are provided.

In this embodiment, if a start win occurs when no variable display is being executed and no reserved memory exists, the start win designation command, pattern designation command, variable category command, and reserved memory number notification command based on the start win are stored in the active display buffer 131SG194B without passing through the start win reception command buffer 131SG194A. The reserved display flag is set by the performance control CPU 120 executing the advance notice setting process (S161) described below.

The contents stored in the active display buffer 131SG194B are cleared (deleted) during the special chart hit waiting process that is executed when the variable display ends.

The reserved display flag is a flag that indicates the display mode of the reserved display or the active display that corresponds to the variable display being executed. Details will be described later, but in this embodiment, the display mode of these reserved displays and active displays (the value of the reserved display flag) can suggest the proportion of times the game will be controlled to a jackpot game state.

[Start winning judgment process]
FIG. 11-16 is a flow chart showing the start winning judgment process (S101) shown in FIG. 6. In the start winning judgment process, the CPU 103 first judges whether the first start opening switch 22A is on or not based on a detection signal from the first start opening switch 22A provided corresponding to the first start winning opening formed by the winning ball device 6A (131SGS101). At this time, if the first start opening switch 22A is on (131SGS101; Y), it judges whether the first special chart reserved memory number, which is the reserved memory number of the special chart game using the first special chart, is a predetermined upper limit value (for example, "4" as the upper limit memory number) or not (131SGS102). The CPU 103 may specify the first special chart reserved memory number by reading the first reserved memory number count value, which is the stored value of the first reserved memory number counter provided in the game control counter setting unit 131SG154, for example. When the number of reserved first special charts in 131SGS102 is not the upper limit (131SGS102; N), for example, the storage value of the start port buffer provided in the game control buffer setting unit 131SG155 is set to "1" (131SGS103).

When the first start port switch 22A is off in 131SGS101 (131SGS101; N) or when the first special symbol reserved memory number has reached the upper limit in 131SGS102 (131SGS102; Y), the second start port switch 22B, which is provided corresponding to the second start winning port formed by the variable winning ball device 6B, is judged to be on or not (131SGS104). At this time, if the second start port switch 22B is on (131SGS104; Y), it is judged to be whether the second special symbol reserved memory number, which is the reserved memory number of the special symbol game using the second special symbol, has reached a predetermined upper limit (for example, "4" as the upper limit memory number) (131SGS105). The CPU 103 can specify the number of reserved second special figures by reading the second reserved memory count value, which is the stored value of the second reserved memory count counter provided in the game control counter setting unit 131SG154, for example. When the second reserved memory count in 131SGS105 is not the upper limit value (131SGS105; N), for example, the storage value of the start port buffer provided in the game control buffer setting unit 131SG155 is set to "2" (131SGS106).

After executing either of the processes of 131SGS103 and 131SGS106, the number of reserved memories corresponding to the start port buffer value, which is the stored value of the start port buffer, is updated to add 1 (131SGS107). For example, when the start port buffer value is "1", the first reserved memory count value is added by 1, while when the start port buffer value is "2", the second reserved memory count value is added by 1. Thus, the first reserved memory count value is updated to increase by 1 when the game ball passes (enters) the first start winning port and the first start condition corresponding to the special game using the first special game is established. In addition, the second reserved memory count value is updated to increase by 1 when the game ball passes (enters) the second start winning port and the second start condition corresponding to the special game using the second special game is established. At this time, the total reserved memory number is also updated to add 1 (131SGS108). For example, the total reserved memory count value, which is the stored value of the total reserved memory count counter provided in the game control counter setting unit 131SG154, can be updated to add 1.

After executing the process of 131SGS108, the CPU 103 extracts numerical data indicating the random number value MR1 for determining the special chart display result, the random number value MR2 for determining the type of winning, the random number value MR3 for determining the type of fluctuation pattern, and the random number value MR4 for determining the fluctuation pattern from the numerical data updated by the random number circuit 104 and the random counter of the game control counter setting unit 131SG154 (131SGS109). The numerical data indicating each of the random number values thus extracted and the start port buffer value are stored by being set as reserve information at the top of the free entry in the special chart reserve memory unit (131SGS110).

The numerical data indicating the random number value MR1 for determining the special symbol display result and the random number value MR2 for determining the type of hit are used to determine whether the variable display result of the special symbol or decorative symbol is a "big hit" or a "small hit", and further to determine the type of big hit or small hit when the variable display result is a "big hit" or a "small hit". The random number value MR3 for determining the type of variation pattern and the random number value MR4 for determining the variation pattern are used to determine the variation pattern including the variable display time of the special symbol or decorative symbol. By executing the processing of 131SGS109, the CPU 103 extracts numerical data indicating all of the random number values used to determine the variable display state including the variable display result and the variable display time of the special symbol or decorative symbol.

Following the processing of 131SGS110, the sending setting of the start port winning designation command according to the start port buffer value is performed (131SGS111). For example, when the start port buffer value is "1", the storage address of the first start port winning designation command table in ROM 101 is stored in the buffer area specified by the transmission command pointer in the transmission command buffer, and the setting is performed to send the first start port winning designation command to the performance control board 12. On the other hand, when the start port buffer value is "2", the storage address of the second start port winning designation command table in ROM 101 is stored in the buffer area of the transmission command buffer, and the setting is performed to send the second start port winning designation command to the performance control board 12. The start port winning designation command thus set is transmitted from the main board 11 to the performance control board 12, for example, by executing the command control process of S27 shown in FIG. 4 after the special pattern process is completed.

Following the processing of 131SGS111, the CPU 103 executes a winning random number value determination process (131SGS112). After that, the CPU 103 performs settings for sending a pending memory number notification command to the performance control board 12, for example by storing the storage address of the pending memory number notification command table in the ROM 101 in a buffer area specified by the transmission command pointer in the transmission command buffer (131SGS113). The pending memory number notification command thus set is transmitted from the main board 11 to the performance control board 12, for example by executing the command control process of S27 shown in FIG. 4 after the special symbol process process is completed.

After executing the process of 131SGS113, it is determined whether the start port buffer value is "1" (131SGS114). At this time, if the start port buffer value is "1" (Y in 131SGS114), the start port buffer is cleared and its stored value is initialized to "0" (131SGS115), and then the process of 2390SGS104 is advanced to. In contrast, if the start port buffer value is "2" (N in 131SGS114), the start port buffer is cleared and its stored value is initialized to "0" (131SGS116), and then the start winning process is terminated. This ensures that even if both the first start port switch 22A and the second start port switch 22B simultaneously detect a valid game ball start winning, the process based on the detection of both valid start winnings can be completed.

[Random value judgment process when winning]
FIG. 11-17(A) is a flow chart showing an example of a process executed by the 131SGS112 in FIG. 11-17 as a winning random number value determination process. In this embodiment, when the variable display of the special symbol or the decorative symbol is started, the special symbol normal process (FIG. 6) determines whether or not to control the special symbol display result (the variable display result of the special symbol) to a "jackpot" game state. In addition, in the variable pattern setting process (FIG. 6), a variable pattern that specifically specifies the variable display mode of the decorative symbol is determined. On the other hand, apart from these determinations, at the timing when the game ball is detected at the start winning hole (the first start winning hole or the second start winning hole), the CPU 103 executes the winning random number value determination process of S112 to determine whether or not it is determined that the jackpot symbol is derived and displayed as the special symbol display result. As a result, before the variable display of special patterns and decorative patterns based on the detection of a gaming ball entering the starting winning hole begins, in other words, before it is determined whether or not a jackpot will be reached at the start of the variable display, it is determined that the special pattern display result will be a "jackpot," and based on this determination result, the presentation control CPU 120, etc., will execute pre-reading predictions such as panel display presentations and hold prediction presentations, as will be described later.

In the winning random number value determination process shown in FIG. 11-17, the CPU 103 first identifies the game state (step 131SGS121) and selects the display result determination table shown in FIG. 11-3 (B) (step 131SGS122). Then, in step 131SGS123a, the CPU 103 compares the random number value MR1 extracted in step 131SGS109 with the display result determination table, and determines whether the random number value MR1 is within the jackpot determination range.

If the random number value MR1 is outside the range for determining a big win, i.e., if the variable display result is a miss, a setting is made for sending a symbol designation command corresponding to the miss (step 131SGS126a). Then, it is determined whether the game state is normal or not (step 131SGS126b). If the game state is normal, the miss variable pattern type determination table A shown in FIG. 11-7(A) is selected and the process proceeds to step 131SGS131 (step 131SGS126c).

If the game state is not the normal state, it is further determined whether the game state is the time-saving state B or not (step 131SGS126d). If the game state is not the time-saving state B, that is, if the game state is the time-saving state A or the guaranteed bonus state, the loss fluctuation pattern type determination table B shown in FIG. 11-7 (B) is selected and the process proceeds to step 131SGS131 (step 131SGS126e), and if the game state is the time-saving state B, the loss fluctuation pattern type determination table C shown in FIG. 11-7 (C) is selected and the process proceeds to step step 131SGS131 (step 131SGS126f).

In step 131SGS123a, if the random number value MR1 is within the jackpot determination value range, the CPU 103 sets the transmission of a pattern designation command corresponding to the jackpot (step 131SGS129). Then, it determines whether the game state is normal or not (step 131SGS130a). If the game state is normal, it selects the jackpot fluctuation pattern type determination table A shown in FIG. 11-7 (D). If the game state is time-saving state A or high probability state, it selects the jackpot fluctuation pattern type determination table B shown in FIG. 11-7 (E). If the game state is time-saving state B, it selects the jackpot fluctuation pattern type determination table C shown in FIG. 11-7 (F), and proceeds to step 131SGS131 (step 131SGS130b, step 131SGS130d, step 131SGS130e).

In step 131SGS131, the CPU 103 compares the selected fluctuation pattern type determination table with the random number value MR3 extracted in step 131SGS109, and determines the fluctuation category from non-reach, super reach, or other (normal reach). For example, if the random number value MR3 is a fluctuation pattern type of non-reach, the fluctuation category is determined to be non-reach, if the random number value MR3 is a fluctuation pattern type of normal reach, the fluctuation category is determined to be other (normal reach), and if the random number value MR3 is any of low base weak super reach A/B, low base strong super reach A, low base strong super reach B, low base strong super reach C, low base strongest super reach, high base super reach A, high base super reach B, high base super reach C, and high base super reach D, the fluctuation category is determined to be super reach. Then, the sending of a variable category designation command (any of those shown in FIG. 11-17 (B)) according to the judgment result is set, and the winning random number judgment process is terminated (step 131 SGS132).

The commands set for transmission are sent to the performance control board 12 by the CPU 103 executing the command control process shown in FIG. 5.

[Game control main processing]
11-18 is a flow chart showing the game control main process in this embodiment. In this embodiment, the processes in steps S1 to S7, S8 to S9, and S10 to S12 are the same as those shown in FIG.

In this embodiment, when a performance control command instructing recovery from a power outage is sent in step S7, the CPU 103 checks the value of a rescue time reduction counter for counting the number of variable displays remaining until the rescue time reduction occurs, sets the current rescue time reduction counter value converted to a hexadecimal number, and controls the transmission of a rescue time reduction number designation command upon recovery to the performance control CPU 120 (step 131SGS0013).

Next, the CPU 103 sets a value corresponding to the current value of the rescue time reduction counter and controls to send a rescue time reduction number designation command to the performance control CPU 120 (step 131SGS0014). For example, if the current value of the rescue time reduction counter is 1 to 125 times, the CPU 103 controls to send command 9401H as the rescue time reduction number designation command. Therefore, in this embodiment, if the RAM clear process is not performed when the gaming machine is turned on and the recovery process is performed, the rescue time reduction number designation command is sent and the remaining number of variable display times until the current rescue time reduction is notified.

In this embodiment, when power is restored after a power outage, a command to specify the number of times to shorten the time for recovery and a command to specify the number of times to shorten the time for recovery are sent separately from the command at the time of recovery, but this is not limited to this form. For example, the EXT data of the command at the time of recovery (e.g., a command to specify power on) sent in step S7 may be configured to be set to a value corresponding to the number of times remaining until the time for recovery is shortened, and then sent.

In addition, when a RAM clear is requested in step S3, when there is no backup data in step S4, or when an abnormality is detected in the backup RAM in step S5, a clear process is performed on the area including the area of the rescue time reduction counter in the initialization process in step S8.

Also, when the CPU 103 transmits a presentation control command instructing initialization in step S9, it sets the rescue time reduction counter to "900" (step 131SGS0015). Therefore, in this embodiment, if the RAM clear process is executed when the gaming machine is powered on, the rescue time reduction counter is set to "900". That is, in this embodiment, if the RAM clear process is executed when the gaming machine is powered on and a jackpot is not generated even after 900 variable displays are executed, rescue time reduction is performed and the time reduction state B is controlled. Note that, in this embodiment, since the presentation control command instructing initialization transmitted in step S9 corresponds to the initial value ("900") set in the rescue time reduction counter, the CPU 103 can also specify the initial value to be set in the rescue time reduction counter based on the transmission of the presentation control command instructing initialization.

Next, the CPU 103 checks the value of the rescue time reduction counter (which is set to "900" in this embodiment), converts the current value of the rescue time reduction counter into a hexadecimal number, sets the value, and transmits a recovery time reduction count designation command to the performance control CPU 120 (step 131SGS0016).

In this way, the rescue time reduction counter is set before the timer interrupt process, which is the game progress process, is executed, so that the variable display does not start before the rescue time reduction counter is set, and the number of times until the rescue time reduction can be reliably managed.

In this embodiment, the rescue time reduction counter is initially set to "900" when the RAM clear process is executed when the gaming machine is powered on, but this is not the only possible configuration, and the rescue time reduction counter may not be initially set when the RAM clear process is executed. If configured in this way, gameplay can be started from the continuation of the value of the rescue time reduction counter from the previous day, reducing the amount of investment required to reach the rescue time reduction, and the configuration can be made so as not to be disadvantageous to the player.

In addition, when configured as described above, the system may be configured so that the initial setting of the rescue time reduction counter is not performed only when the clear switch is detected to be on (step S3; Yes) and the RAM clear process is performed, and the initial setting of the rescue time reduction counter is performed when a RAM abnormality is detected (steps S4, S5; No) and the RAM clear process is performed.

[Time-saving flag, guaranteed win flag]
In this embodiment, when any of the conditions for controlling to the time-saving state is satisfied, the time-saving flag can be set. The time-saving flag includes a time-saving flag A and a time-saving flag B. In the following description, erasing (or clearing) the flag may be described as resetting the flag.

The time-saving flag A is set when the game is controlled to time-saving state A via jackpot A, jackpot B, and jackpot C. This time-saving flag A is set when the jackpot game state of jackpot A ends, and is cleared when time-saving state A ends (when a jackpot occurs during time-saving state A, or when 110 times of time-saving control end and the game is controlled to the normal state).

The time-saving flag B is set when the game is in the time-saving state B controlled via the rescue time-saving function. This time-saving flag B is set when 900 variable displays that do not result in a jackpot pattern have been executed since the RAM was cleared, or when 900 variable displays that do not result in a jackpot pattern have been executed in a low probability state after the jackpot game state ends, and is cleared when the time-saving state B ends (when a jackpot occurs during the time-saving state B, when the time-saving control ends after 1100 times and the game is controlled to the normal state, etc.).

The high probability flag is set when the game is controlled to the high probability state. In this embodiment, if a V is won in the first round of a jackpot game, the game state is controlled to the high probability state when the jackpot game ends, and the high probability flag is set accordingly. This high probability flag is erased when the high probability state ends (when a jackpot occurs during the high probability state, when the 110th high probability control is executed and the game is controlled to the normal state, etc.). For example, the high probability flag is erased when step 131SGS69A in FIG. 11-20 described later is judged as YES, based on the fact that it is the 110th time since the variable display has been controlled to the high probability state.

[Special pattern normal processing]
11-19 and 11-20 are flow charts showing the normal special symbol processing (step S110) in the special symbol processing. In the normal special symbol processing, the CPU 103 checks the value of the total reserved memory number (step 131SGS51). Specifically, the count value of the total reserved memory number counter for counting the total number of the first reserved memory number and the second reserved memory number is checked. If the total reserved memory number is not 0, the CPU 103 checks whether the second reserved memory number is 0 (step 131SGS52). Specifically, the CPU 103 checks whether the value of the second reserved memory number counter for counting the second reserved memory number is 0. If the second reserved memory number is not 0, the CPU 103 sets data indicating "second" to the special symbol pointer (a flag indicating whether the special symbol processing is being performed for the first special symbol or the second special symbol) (step 131SGS53). If the second reserved memory number is 0 (i.e., if only the first reserved memory number is accumulated), the CPU 103 sets data indicating "first" to the special pattern pointer (step 131SGS54).

In this embodiment, the processing of steps 131SGS52 to S54 is executed, so that the variable display of the second special symbol is executed with priority over the variable display of the first special symbol. In other words, the second start condition for starting the variable display of the second special symbol is controlled to be satisfied with priority over the first start condition for starting the variable display of the first special symbol.

In addition, the present embodiment is not limited to the above embodiment, and the display may be configured to perform variable display of the first special symbol and variable display of the second special symbol in the order in which the game balls enter the first start winning slot and the second start winning slot, for example.

Next, the CPU 103 reads out each random number stored in the storage area in the RAM 102 corresponding to the reserved memory number=1 indicated by the special symbol pointer, and stores it in the random number buffer area of the RAM 102 (step 131SGS55). Specifically, when the special symbol pointer indicates "first", the CPU 103 reads out each random number stored in the storage area in the first reserved memory number buffer corresponding to the first reserved memory number=1, and stores it in the random number buffer area of the RAM 102. Also, when the special symbol pointer indicates "second", the CPU 103 reads out each random number stored in the storage area in the second reserved memory number buffer corresponding to the second reserved memory number=1, and stores it in the random number buffer area of the RAM 102.

Then, the CPU 103 subtracts one from the count value of the reserved memory number counter indicated by the special pattern pointer, and shifts the contents of each storage area (step 131SGS56). Specifically, when the special pattern pointer indicates "first," the CPU 103 subtracts one from the count value of the first reserved memory number counter, and shifts the contents of each storage area in the first reserved memory number buffer. When the special pattern pointer indicates "second," the CPU 103 subtracts one from the count value of the second reserved memory number counter, and shifts the contents of each storage area in the second reserved memory number buffer.

In other words, when the special symbol pointer indicates "1st", the CPU 103 stores each random number stored in the storage area corresponding to the first reserved memory number = n (n = 2, 3, 4) in the first reserved memory number buffer of the RAM 102 in the storage area corresponding to the first reserved memory number = n-1. Also, when the special symbol pointer indicates "2nd", the CPU 103 stores each random number stored in the storage area corresponding to the second reserved memory number = n (n = 2, 3, 4) in the second reserved memory number buffer of the RAM 102 in the storage area corresponding to the second reserved memory number = n-1.

Therefore, the order in which the random numbers stored in the respective storage areas corresponding to each first pending memory number (or each second pending memory number) are extracted always matches the order of the first pending memory number (or second pending memory number) = 1, 2, 3, 4.

Then, the CPU 103 reduces the value of the combined pending memory count by 1. That is, the count value of the combined pending memory count counter is decremented by 1 (step 131 SGS57). The CPU 103 stores the value of the combined pending memory count counter before the count value is decremented by 1 in a specified area of the RAM 102.

Next, the CPU 103 reads the random number for hit determination from the random number buffer area (step 131SGS61) and executes the jackpot determination module (step 131SGS62). In this case, the CPU 103 reads the random number for hit determination extracted in the start winning determination process (step S101) and stored in advance in the first reserved memory buffer or the second reserved memory buffer, and performs a jackpot determination. The jackpot determination module is a program that executes a process to compare a predetermined jackpot determination value with the random number for hit determination, and decides that a jackpot has occurred if they match. In other words, it is a program that executes a jackpot determination process. In this case, if the probability variable flag indicating that the jackpot state is in a probability variable state is not set (if the state is in a low probability state), the CPU 103 performs a jackpot determination using the jackpot determination value for low probability. Also, if the probability variable flag is set (if the state is in a high probability state), the CPU 103 performs a jackpot determination using the jackpot determination value for high probability. When the value of the random number for determining a win matches any of the jackpot determination values, the CPU 103 determines that the special symbol is a jackpot.

If it is determined that a jackpot has been reached (step 131SGS63; Yes), the CPU 103 sets a jackpot flag indicating that a jackpot has been reached (step 131SGS64). The CPU 103 then determines the type of jackpot to be the type (jackpot A, jackpot B, or jackpot C) that corresponds to the value that matches the type-determining random number stored in the random number buffer area (step 131SGS65). In this case, the CPU 103 reads out the type-determining random number extracted in the start winning determination process (step S101) and stored in advance in the first reserved memory buffer or the second reserved memory buffer, and determines the type of jackpot. Then, the process proceeds to step 131SGS70. On the other hand, if it is not determined that a jackpot has been reached (step 131SGS63; No), the process proceeds to step 131SGS66.

In this embodiment, by performing normal special pattern processing, a rescue time-saving condition (reducing the value of the rescue time-saving counter to "0") can occur to control to rescue time-saving regardless of the variable display result (jackpot, miss). In this embodiment, the time-saving state A is entered based on a jackpot A being reached, and the time-saving state B is entered based on the fact that no next jackpot has occurred even after a predetermined number of variable displays (900 in this embodiment) have ended. However, it is assumed that the variable display result of the variable display for which the rescue time-saving condition is met will be a jackpot. Therefore, when the variable display result of the variable display for which the rescue time-saving condition is met is a jackpot, the system is configured to control to the time-saving state A based on the jackpot being reached.

Next, the CPU 103 checks whether the value of the time-saving counter for counting the number of times the variable display is executed during the time-saving state is 0 (step 131SGS66). If the value of the time-saving counter is not 0, the CPU 103 subtracts 1 from the value of the time-saving counter (step 131SGS67) and checks whether the value of the time-saving counter after the subtraction is 0 (step 131SGS68). If the value of the time-saving counter after the subtraction is 0, the CPU 103 sets a time-saving end flag indicating that the time-saving state will end when the variable display ends (step 131SGS69).

In this embodiment, steps 131SGS66 to 131SGSS69 are executed before the counting process of the variable display number until the rescue time reduction from step 131SGS71 onwards, and the time reduction counter is decremented, but this is not the only processing mode. For example, the time reduction counter may be decremented after the counting process of the variable display number until the rescue time reduction from step 131SGS71 onwards. In this case, for example, in the case of a variable display that is a rescue time reduction, if the time reduction counter is set to "110" (see step 131SGS172) and then the decrement process is executed, the value of the time reduction counter is decremented by one extra, so in the case of a variable display that is a rescue time reduction, the time reduction counter may be configured to be incremented by one again after the decrement process. Also, the time reduction counter may be configured to be set to "111", which is one more than the time reduction counter, in advance.

Then, the CPU 103 checks whether the high probability flag is set (step 131SGS69A). If the high probability flag is set (i.e., the game is in a high probability state), the process proceeds to step 131SGS84. In this embodiment, the process of step 131SGS69A is executed, and if the game is in a high probability state, the process of steps 131SGS70 and after (particularly the process of step 131SGSS71) is not executed. Therefore, even if a variable display is executed when the game state is in a high probability state (in this embodiment, during Extreme Battle Rush), the value of the rescue time reduction counter is not decremented. If the high probability flag is not set (i.e., the game is not in a high probability state), the process proceeds to step 131SGSS70.

In this embodiment, when the high probability flag is set, the process proceeds to step 131SGSS84 without executing the processes after step 131SGSS70. However, this is not limited to the above. When the high probability flag is set, the process proceeds to step 131SGSS70, but step 131SGSS71 may not be executed. In other words, the value of the rescue time reduction counter is not updated, but a rescue time reduction number designation command or rescue time reduction number 2 designation command corresponding to the value of the unupdated rescue time reduction counter may be sent.

Next, the CPU 103 judges whether the value of the rescue time reduction counter is 0 (step 131SGS70; Yes). If the value of the rescue time reduction counter is 0 (step 131SGS70; Yes), the process proceeds to step 131SGS84. If the value of the rescue time reduction counter is 0 at this point, it means that the game has already been controlled to the time reduction state (time reduction state B) via the rescue time reduction (time that is controlled to the time reduction state B, or time that is controlled to the normal state after 1100 fluctuations in the time reduction state B), and a jackpot has not occurred, which is the trigger for setting the rescue time reduction counter to 900. Also, if the value of the rescue time reduction counter is not 0 (step 131SGS70; No), the value of the rescue time reduction counter is decremented by 1 (step 131SGS71). In addition, in this embodiment, the processing of step 131SGS71 is executed, and the value of the rescue time reduction counter is updated uniformly regardless of whether the variable display of the first special pattern is executed or the variable display of the second special pattern is executed.

Next, the CPU 103 checks whether the value of the rescue time reduction counter after subtraction is 127 or more (step 131SGS72). If the value of the rescue time reduction counter after subtraction is 126 or less (step 131SGS72; No), the CPU 103 sets a value corresponding to the value of the rescue time reduction counter to the EXT data and controls the transmission of a rescue time reduction number designation command to the performance control CPU 120 (step 131SGS73). For example, if the value of the rescue time reduction counter is 1, the CPU 103 controls the transmission of command 9401H as the rescue time reduction number designation command. Also, if the value of the rescue time reduction counter is 126, the CPU 103 controls the transmission of command 947EH as the rescue time reduction number designation command.

Next, the CPU 103 checks whether the value of the rescue time reduction counter after subtraction is 0 (step 131SGS74). If the value of the rescue time reduction counter after subtraction is not 0, the CPU 103 proceeds to step 131SGS84. If the value of the rescue time reduction counter after subtraction is 0, the CPU 103 sets a rescue time reduction determination flag indicating that the rescue time reduction has occurred and that control will be made to time reduction state B at the end of the fluctuation (step 131SGS75). Then, the CPU 103 proceeds to step 131SGS84.

On the other hand, if the value of the rescue time reduction counter after subtraction is 127 or more (step 131SGS72; Yes), the CPU 103 sets 7FH uniformly as the EXT data and controls to send the command 957FH as the rescue time reduction number designation command to the performance control CPU 120 (step 131SGS76). Next, the CPU 103 checks whether the remaining variable display number until the rescue time reduction is a number in units of 100 (in this embodiment, 100, 200, 300, 400, 500, 600, 700, or 800) (step 131SGS77). Note that whether the remaining variable display number until the rescue time reduction is a number in units of 100 can be determined by checking the value of the rescue time reduction counter. If the remaining variable display count until the rescue time reduction is in units of 100, the CPU 103 sets a value corresponding to the value of the rescue time reduction counter in the EXT data and controls the transmission of a rescue time reduction count 2 designation command to the performance control CPU 120 (step 131SGS78). For example, if the value of the rescue time reduction counter is 100, the CPU 103 controls the transmission of command 9601H as the rescue time reduction count 2 designation command. Also, if the value of the rescue time reduction counter is 800, the CPU 103 controls the transmission of command 9608H as the rescue time reduction count 2 designation command. Then, the process proceeds to step 131SGS84.

In this embodiment, the game control microcomputer 100 (specifically, CPU 103) counts the number of variable displays remaining until the rescue time reduction and transmits a rescue time reduction number designation command or a rescue time reduction number 2 designation command, but this is not limited to the above. For example, the presentation control CPU 120 may be configured to count the number of variable displays remaining until the rescue time reduction and execute the teasing presentation or countdown presentation described below.

In addition, for example, if the rescue time reduction counter is set (set to "900") at the time of the rescue time reduction so that rescue time reductions can occur consecutively, the rescue time reduction number designation command or rescue time reduction number 2 designation command may be sent only the first time the rescue time reduction occurs, and the rescue time reduction number designation command or rescue time reduction number 2 designation command may not be sent the second or subsequent time the rescue time reduction occurs.

Next, the CPU 103 determines the stopping pattern of the special pattern according to the result of the determination of the jackpot type (step 131SGS84). In this case, for example, if it is determined to be a jackpot A, the stopping pattern of the special pattern is determined to be "2", if it is determined to be a jackpot B, the stopping pattern of the special pattern is determined to be "3", if it is determined to be a jackpot C, the stopping pattern of the special pattern is determined to be "7", and if it is determined to be a miss, the stopping pattern of the special pattern is determined to be "-". The CPU 103 also stores the determined stopping pattern of the special pattern in a stopping pattern storage area provided in the RAM 102 (step 131SGS85).

Then, the CPU 103 updates the value of the special pattern process flag to a value corresponding to the variable pattern setting process (step S111) (step 131SGS86).

[Special symbol stop processing]
11-21 is a flow chart showing the special symbol stop processing (step S113) in the special symbol process processing. In the special symbol stop processing, the CPU 103 first judges whether or not the symbol determination period timer is operating (step 131SGS131). If the symbol determination period timer is not operating, the CPU 103 performs a derived display of the special symbol stop pattern (step 131SGS132). Then, it judges whether or not the big win flag is set (step 131SGS133).

If the jackpot flag is set, the game status flags such as the time-saving A flag, time-saving B flag, and probability bonus flag are cleared (step 131SGS134), the time-saving count counter is cleared (step 131SGS135), and the jackpot start command transmission setting corresponding to the jackpot type is performed, and the process proceeds to step 131SGS147 (step 131SGS136). The jackpot start command transmission setting is transmitted to the performance control board 12 by the CPU 103 executing the command control process (see FIG. 5).

Also, if the jackpot flag is not set in step 131SGS133, the CPU 103 determines whether or not the rescue time-saving determination flag is set (step 131SGS140). If the rescue time-saving determination flag is not set, proceed to step 131SGS147. If the rescue time-saving determination flag is set, the rescue time-saving determination flag is cleared and the time-saving B flag indicating that the time-saving state is B is set (steps 131SGS141 and 131SGS142). Furthermore, the time-saving count counter is set to 1100 corresponding to the time-saving state B (rescue time-saving), and the time-saving state B designation command is set for transmission (steps 131SGS143 and 131SGS144). The time-saving state B designation command that has been set for transmission is transmitted to the performance control board 12 by the CPU 103 executing the command control process (see FIG. 5).

The right hit lamp 131SG132 starts to light up, and the right hit LED lighting notification command is set for transmission (steps 131SGS145 and 131SGS146). The right hit LED lighting notification command that has been set for transmission is sent to the performance control board 12 by the CPU 103 executing the command control process (see FIG. 5).

Then, the pattern determination period timer is set to a value corresponding to the pattern determination period of 0.5 seconds, and a pattern determination command is set for transmission, and the process proceeds to step 131SGS149 (step 131SGS147, step 131SGS148). The pattern determination command set for transmission is transmitted to the performance control board 12 by the CPU 103 executing the command control process (see FIG. 5).

In step 131SGS149, the CPU 103 sets the game state designation command to be sent according to the game state, and ends the special symbol stop process. The game state designation command that has been set to be sent is sent to the performance control board 12 by the CPU 103 executing the command control process (see FIG. 5).

If the pattern determination period timer is running in step 131SGS131, the CPU 103 decrements the value of the pattern determination period timer by 1 (step 131SGS150) and determines whether the pattern determination period timer has timed out (step 131SGS151). If the pattern determination period timer has not timed out, the CPU 103 terminates the special pattern stop process. If the pattern determination period timer has timed out, the CPU 103 determines whether the derived stopped pattern is a losing pattern (step 131SGS152). If the derived stopped pattern is a losing pattern, the CPU 103 updates the value of the special pattern process flag to a value corresponding to the normal special pattern process and terminates the special pattern stop process (step 131SGS153). If the derived stopped pattern is a jackpot pattern, the CPU 103 updates the value of the special pattern process flag to a value corresponding to the jackpot release pre-processing and terminates the special pattern stop process (step 131SGS154).

[state transition]
Next, the state transition in this embodiment will be described. Figure 11-22 is a state transition diagram for explaining the state transition in this embodiment.

As shown in Figure 11-22, in the normal state (low probability/low base state), if a jackpot B occurs and the game ball passes through the high probability area (V switch 131SG023B1), the game is controlled to the high probability state, and if a jackpot A occurs, the game is controlled to the time-saving state A (time-saving state via jackpot (low probability/high base state)). Although not shown, even if a jackpot B occurs and the game ball does not pass through the high probability area (V switch 131SG023B1), the game is also controlled to the time-saving state A (time-saving state via jackpot). Also, even if it is a miss, if the rescue time-saving state is entered (if the number of variable displays reaches 900 without the next jackpot occurring after the RAM clear process or the end of the special probability state, or if the number of variable displays reaches 790 without the next jackpot occurring after the end of 110 variable displays in time-saving state A), it will be controlled to time-saving state B (time-saving state via rescue time-saving state (low probability/high base state)).

Also, as shown in FIG. 11-22, in the probability variable state (high probability/high base state), if either jackpot B or jackpot C occurs and the game ball passes through the probability variable area, the game will be controlled to the probability variable state again. Although not shown, if either jackpot B or jackpot C occurs and the game ball does not pass through the probability variable area, the game will be controlled to the time-saving state A (time-saving state via jackpot).

Also, as shown in FIG. 11-22, in time-saving state A (low probability/high base state), if either jackpot B or jackpot C occurs and the game ball passes through the probability variable area, the state is controlled to the probability variable state. Although not shown, if either jackpot B or jackpot C occurs and the game ball does not pass through the probability variable area, the state is controlled back to time-saving state A (time-saving state via jackpot). Also, in time-saving state A, if 110 variable displays end without a jackpot occurring, the state is controlled to the normal state.

As shown in FIG. 11-22, in time-saving state B (low probability/high base state), if either jackpot B or jackpot C occurs and the game ball passes through the probability variable area, the state is controlled to the probability variable state. Although not shown, if either jackpot B or jackpot C occurs and the game ball does not pass through the probability variable area, the state is controlled to the time-saving state A (time-saving state via jackpot) again. In time-saving state B, if 1100 variable displays are completed without a jackpot occurring, the state is controlled to the normal state. Furthermore, even if it is a miss, if it is a rescue time-saving state (if the number of variable displays reaches 900 without the next jackpot occurring after the RAM clear process or the end of the probability variable state, or if the number of variable displays reaches 790 without the next jackpot occurring after the end of 110 variable displays in time-saving state A), the state is controlled to the time-saving state B (time-saving state via rescue time-saving).

In this embodiment, if a jackpot occurs during time-saving state B and the game ball does not enter the variable probability area, the game will always transition to time-saving state A, but this control is not limited to this. For example, the current remaining number of time-saving times may be compared with the number of time-saving times (110 times in this embodiment) that would occur if the game ball did not enter the variable probability area (V switch 131SG023B1), and if the current remaining number of time-saving times is greater, the game may be configured to continue the current time-saving state B as is.

In this embodiment, although it is possible to execute a variable display of the first special symbol during the time-saving state or the probability of a special bonus state, this would be disadvantageous to the player, so the state transition is explained without assuming that the variable display of the first special symbol will be executed during the time-saving state or the probability of a special bonus state.

[Direction control process/preview notice]
As shown in Figures 11-23 and 11-24, in the advance notice setting process of this embodiment, the display mode of the active display and the reserved display is determined by setting the reserved display flag to either 0 or 2 at the timing when a start winning occurs (the timing when the start winning port winning designation command, pattern designation command, variable category command, and reserved memory number notification command are newly stored as reserved memory in the start winning time received command buffer shown in Figure 11-15 (B)), and the display mode of these active display and reserved display makes it possible to suggest the proportion of times the game will be controlled to a jackpot game state.

For example, as shown in FIG. 11-24, if the variable display result indicated by the pattern designation command is "miss" and the variable category indicated by the variable category command is "non-reach," it is determined that the pre-reading preview will not be executed (the value of the pending display flag is set to "0") 95% of the time, the pre-reading preview will be executed in presentation pattern α (the value of the pending display flag is set to "1") 5% of the time, and the pre-reading preview will be executed in presentation pattern β (the value of the pending display flag is set to "2") 0% of the time.

In addition, if the variable display result indicated by the pattern designation command is "miss" and the variable category indicated by the variable category command is "other (normal reach)", it is determined that the pre-reading notice will not be executed (the value of the pending display flag is set to "0") with a probability of 90%, the pre-reading notice will be executed in presentation pattern α (the value of the pending display flag is set to "1") with a probability of 10%, and the pre-reading notice will be executed in presentation pattern β (the value of the pending display flag is set to "2") with a probability of 0%.

In addition, if the variable display result indicated by the pattern designation command is "miss" and the variable category indicated by the variable category command is "super reach," it is determined that the pre-reading prediction will not be executed (the value of the pending display flag is set to "0") with a probability of 70%, the pre-reading prediction will be executed in presentation pattern α (the value of the pending display flag is set to "1") with a probability of 20%, and the pre-reading prediction will be executed in presentation pattern β (the value of the pending display flag is set to "2") with a probability of 10%.

In addition, if the variable display result indicated by the pattern designation command is a "jackpot," then it is determined that the pre-reading prediction will not be performed (the reserved display flag value is set to "0") at a rate of 5%, the pre-reading prediction will be performed in presentation pattern α (the reserved display flag value is set to "1") at a rate of 30%, and the pre-reading prediction will be performed in presentation pattern β (the reserved display flag value is set to "2") at a rate of 65%.

After the execution of the advance notice setting process, the pending display/active display update process (131SGS162), the remaining number of times when the rescue time reduction etc. has been reached display update process (step 131SGS163), and the rescue time reduction reaching notification performance execution process (step 131SGS164) are executed. In the pending display/active display update process, a process is executed to start displaying the pending display or active display in a display mode according to the value of the pending display flag, a process is executed to erase the active display from the active display area 131SG005F at the timing of the end of the variable display, a process is executed to hide or start displaying the pending display or active display according to the progress of the performance during the variable display, and the like. In the rescue time reduction reaching remaining number of times display update process, a process is executed to reduce and update the value of the rescue time reduction reaching remaining number display 131SG005Z (see FIG. 11-1) displayed on the image display device 5 at the start of the variable display, a process is executed to hide or start displaying the rescue time reduction reaching remaining number display 131SG005Z according to the progress of the performance during the variable display, and the like. In the rescue time-saving reaching notification display execution process, a process is executed to execute the rescue time-saving reaching notification display that notifies the player that the time-saving state B has been entered, from the timing when the variable display ends when the number of variable displays reaches 900.

[Variable display start setting process]
FIG. 11-25 is a flowchart showing an example of the variable display start setting process shown in FIG. 11. In the variable display start setting process, the performance control CPU 120 first judges whether the first variable display start command reception flag is set (step 131SGS601). If the first variable display start command reception flag is set, various command data stored in association with the buffer number "1-1" in the start winning reception command buffer 131SG194A is copied to the active display buffer 131SG194B (131SGS602). In addition, the first special chart reserved memory (various command data stored in association with buffer numbers "1-1" to "1-4") in the start winning reception command buffer 131SG194A is shifted one by one to the upper position (step 131SGS603). At this time, the various command data stored in the buffer number "1-1" is erased because there is no destination to shift to.

Also, in step 131SGS601, if the first variable display start command reception flag is not on, it is determined whether the second variable display start command reception flag is set (step 131SGS604). If the second variable display start command reception flag is set, the various command data stored in association with buffer number "2-1" in the start winning reception command buffer 131SG194A is copied to the active display buffer 131SG194B (131SGS605). Also, the second special chart reserved memory (various command data stored in association with buffer numbers "2-1" to "2-4") in the start winning reception command buffer 131SG194A is shifted up one by one (step 131SGS606). At this time, the various command data stored in buffer number "2-1" is erased because there is no destination to shift to.

If the second special chart variable display start command reception flag is not on, the variable display start setting process ends.

After executing step 131SGS603 or step 131SGS6060, the performance control CPU 120 reads the variation pattern designation command from the variation pattern designation command storage area (step 131SGS607). Furthermore, it determines the stopping pattern of the decorative pattern according to the read variation pattern designation command and the data stored in the display result designation command storage area (step 131SGS608).

For example, as shown in FIG. 11-26, when the variable display result is a "miss" and the fluctuation pattern is a non-reach (non-reach miss), the stopping pattern is determined to be a "non-reach" combination such as "124" or "578" (non-reach mode, non-reach miss mode) with a probability of 100%. Also, when the variable display result is a "miss" and the fluctuation pattern is a normal reach (normal reach miss), the stopping pattern is determined to be an even number "reach" combination such as "242" or "676" (even number reach mode, even number reach miss mode) with a probability of 95%, and a "reach" combination with an odd number other than 7 such as "131" or "545" (odd number reach mode, odd number reach miss mode) with a probability of 5%.

In addition, if the variable display result is "miss" and the fluctuation pattern is super reach (super reach miss), the stopping pattern is determined to be a "reach" combination of even numbers such as "242" or "676" (even number reach mode, even number reach miss mode) with an 80% probability, a "reach" combination of odd numbers other than 7 such as "131" or "545" (odd number reach mode, odd number reach miss mode) with a 19% probability, and a "reach" combination of 7 symbols such as "767" or "787" ("7" reach mode, "7" reach miss mode) with a 1% probability.

If the variable display result is a "jackpot," the stopping symbols are determined to be a "reach" combination of even numbers such as "222" or "666" (even reach mode, even reach jackpot mode) with a probability of 20%, a "reach" combination of odd numbers other than 7 such as "111" or "555" (odd reach mode, odd reach jackpot mode) with a probability of 50%, and a "reach" combination of the 7 symbols "777" ("7" reach mode, "7" reach jackpot mode) with a probability of 30%.

In other words, the likelihood of a jackpot is highest when the decorative symbol is a "7" symbol, followed by a decreasing likelihood of a jackpot when an odd symbol other than a "7" is in reach, an even symbol is in reach, and then a non-reach (expected likelihood of a jackpot based on decorative symbol: reach with "7" symbol > reach with odd symbol other than a "7" > reach with even symbol > non-reach). For this reason, in this embodiment, it is possible to draw the player's attention to whether or not the decorative symbol will be in reach, and which symbol will be in reach.

In this embodiment, the expected probability of a jackpot is different depending on whether the decorative symbols are an even number combination or an odd number combination, but the present invention is not limited to this. The expected probability of a jackpot may be the same regardless of the decorative symbol combination that results in a jackpot, or the expected probability of a jackpot when a jackpot is reached may differ depending on the size of the numbers indicated by the decorative symbols.

Returning to FIG. 11-25, after determining the stopping pattern of the decorative symbols, the performance control CPU 120 executes a variable display preview performance determination process (step 131SGS609) to determine whether or not to execute a variable display preview performance that suggests that the variable display result may be a jackpot during the variable display.

Then, the presentation control CPU 120 selects a process table (presentation control pattern) according to the variation pattern, game status, variable display result, and the result of the variable display preview presentation determination process (step 131SGS610), and starts the process timer (step 131SGS611).

In addition, each process table has a performance control pattern set. Specifically, display control execution data for controlling the display of the image display device 5, lamp control execution data for controlling the lighting of each LED, sound control execution data for controlling the sound output from the speakers 8L and 8R, and operation unit control execution data for controlling the operation of the push button 31B and stick controller 31A are arranged in chronological order in correspondence with each process data n (numbers 1 to N).

Then, the performance control CPU 120 executes control of the performance device (image display device 5 as a performance component, various lamps as performance components, speakers 8L, 8R as performance components, and operation unit (push button 31B, stick controller 31A, etc.)) according to the contents of process data 1 (display control execution data 1, lamp control execution data 1, sound control execution data 1, operation unit control execution data 1) (131SGS612). For example, to display an image corresponding to a fluctuation pattern on the image display device 5, it outputs a command to the display control unit 123. It also outputs a control signal (lamp control execution data) to the lamp control board 14 to control the lighting/extinguishing of various lamps. It also outputs a control signal (sound number data) to the sound control board 13 to output sound from the speakers 8L, 8R.

In this embodiment, the performance control CPU 120 controls the display of the decorative pattern to vary according to a variation pattern that corresponds one-to-one to the variation pattern designation command, but the performance control CPU 120 may select a variation pattern to be used from multiple types of variation patterns that correspond to the variation pattern designation command.

Then, the variable display time timer is set to a value equivalent to the variable display time specified by the variable pattern designation command (131SGS613). A predetermined time is also set to the variable display control timer (131SGS614). The predetermined time is, for example, 30 ms, and the performance control CPU 120 writes image data indicating the display state of the left, center, and right decorative patterns to the VRAM every time the predetermined time elapses, the display control unit 123 outputs a signal corresponding to the image data written to the VRAM to the image display device 5, and the image display device 5 displays an image corresponding to the signal, thereby realizing the variable display of the decorative patterns. Next, the value of the performance control process flag is set to a value corresponding to the performance processing during variable display (S172) (131SGS615).

In addition, in the variable display performance processing, the values of the process timer, variable display time timer, and variable display control timer are each set to -1. Then, control of the performance device is executed according to the value of the process timer, the variable display of the decorative pattern is realized as described above according to the value of the variable display control timer, and the variable display of the decorative pattern is stopped according to the value of the variable display time timer, and the value of the performance control process flag is set to a value according to the special pattern hit waiting processing (S173).

[About the effects during variable display]
When the performance control CPU 120 receives a first variable display start command or a second variable display start command that specifies the start of variable display in the variable display start waiting process of step S170, it determines the display result of the variable display of the decorative pattern (confirmed decorative pattern), the mode of the variable display of the decorative pattern, whether or not to execute a reach performance, the mode thereof, the execution start timing, etc. based on the variable pattern specified by the variable pattern designation command and the variable display results such as special patterns and decorative patterns specified by the variable display result designation command in the subsequent variable display start setting process of step S171, sets a performance control pattern that reflects the determined results, etc., and controls the variable display of the decorative pattern and the reach performance, etc. based on the set performance control pattern.

[About the production control pattern]
As shown in Figures 11-27 and 11-28, the performance control patterns are set for each of the variation patterns PA1-1 to 4, PA2-1 to 19, and PB1-1 to 18.

As the presentation control patterns corresponding to the fluctuation patterns PA1-1 to PA1-4, non-reach patterns 1 to 4 are set in which the decorative symbols do not reach a target state and are not reached. Fluctuation patterns PA1-1 and PA1-2 are fluctuation patterns designated in the normal state, PA1-3 is a fluctuation pattern selected in the time-saving state A or the probability variable state, and PA1-4 is a fluctuation pattern selected in the time-saving state B. In the corresponding non-reach patterns 1 to 4, the time until the variable display of the decorative symbols ends is set to be different depending on the fluctuation time corresponding to the fluctuation pattern.

The control pattern corresponding to the variation pattern PA2-1 is a pattern in which a normal reach effect ("normal" in the figure) is executed in which the decorative pattern is in a reach state, and then the reach is lost. The variation pattern PA2-1 is a variation pattern specified in the normal state, the time-saving state A, and the probability variable state.

The presentation control pattern corresponding to variation pattern PA2-2 is set to a pattern in which, after a normal reach reach performance, a low base weak super reach A reach performance ("low base weak A" in the diagram) is executed, and then the reach is missed.The presentation control pattern corresponding to variation pattern PA2-3 is set to a pattern in which, after a normal reach reach performance, a low base weak super reach B reach performance ("low base weak B" in the diagram) is executed, and then the reach is missed.

The presentation control pattern corresponding to variation pattern PA2-4 is a pattern in which, after a normal reach reach performance, a low base weak super reach A reach performance is executed, and then a low base strong reach A reach performance ("low base strong A" in the diagram) is executed, after which the reach is missed.The presentation control pattern corresponding to variation pattern PA2-5 is a pattern in which, after a normal reach reach performance, a low base weak super reach B reach performance is executed, and then a low base strong reach A reach performance is executed, after which the reach is missed.The presentation control pattern corresponding to variation pattern PA2-6 is a pattern in which, after a normal reach reach performance, a low base strong reach A reach performance is executed, and then the reach is missed.

The presentation control pattern corresponding to variation pattern PA2-7 is a pattern in which, after a normal reach reach performance, a low base weak super reach A reach performance is executed, and then a low base strong reach B reach performance ("low base strong B" in the diagram) is executed, after which the reach is missed.The presentation control pattern corresponding to variation pattern PA2-8 is a pattern in which, after a normal reach reach performance, a low base weak super reach B reach performance is executed, and then a low base strong reach B reach performance is executed, after which the reach is missed.The presentation control pattern corresponding to variation pattern PA2-9 is a pattern in which, after a normal reach reach performance, a low base strong reach B reach performance is executed, and then the reach is missed.

The presentation control pattern corresponding to variation pattern PA2-10 is a pattern in which, after a normal reach reach performance, a low base weak super reach A reach performance is executed, and then a low base strong reach C reach performance is executed, after which the reach is missed.The presentation control pattern corresponding to variation pattern PA2-11 is a pattern in which, after a normal reach reach performance, a low base weak super reach B reach performance is executed, and then a low base strong reach C reach performance is executed, after which the reach is missed.The presentation control pattern corresponding to variation pattern PA2-12 is a pattern in which, after a normal reach reach performance, a low base strong reach C reach performance is executed, and then the reach is missed.

The presentation control pattern corresponding to variation pattern PA2-13 is a pattern in which, after a normal reach reach performance, a low base weak super reach A reach performance is executed, and then a low base strongest super reach reach performance ("low base strongest" in the diagram) is executed, followed by a reach miss.The presentation control pattern corresponding to variation pattern PA2-14 is a pattern in which, after a normal reach reach performance, a low base weak super reach B reach performance is executed, and then a low base strongest super reach reach performance is executed, followed by a reach miss.The presentation control pattern corresponding to variation pattern PA2-15 is a pattern in which, after a normal reach reach performance, a low base strongest super reach reach performance is executed, followed by a reach miss.

Fluctuation patterns PA2-2 to PA2-15 are all specified in the normal state.

As a presentation control pattern corresponding to the variation pattern PA2-16, a pattern is set in which after the reach performance of a normal reach, a reach performance of a high base reach A ("high base A" in the figure) is executed, and then the reach is missed. As a presentation control pattern corresponding to the variation pattern PA2-17, a pattern is set in which after the reach performance of a normal reach, a reach performance of a high base reach B ("high base B" in the figure) is executed, and then the reach is missed. As a presentation control pattern corresponding to the variation pattern PA2-18, a pattern is set in which after the reach performance of a normal reach, a reach performance of a high base reach C ("high base C" in the figure) is executed, and then the reach is missed. As a presentation control pattern corresponding to the variation pattern PA2-19, a pattern is set in which after the reach performance of a normal reach, a reach performance of a high base reach D ("high base D" in the figure) is executed, and then the reach is missed.

Patterns PA2-16 to PA2-19 are all selected in time-saving state A and special state.

The presentation control pattern corresponding to the variation pattern PB1-1 is set to execute a normal reach presentation followed by a jackpot.

The presentation control pattern corresponding to the variation pattern PB1-2 is set to a pattern in which, after a normal reach reach performance, a low base weak super reach A reach performance is executed, and then a low base strong reach A reach performance is executed, followed by a jackpot.The presentation control pattern corresponding to the variation pattern PB1-3 is set to a pattern in which, after a normal reach reach performance, a low base weak super reach B reach performance is executed, and then a low base strong reach A reach performance is executed, followed by a jackpot.The presentation control pattern corresponding to the variation pattern PB1-4 is set to a pattern in which, after a normal reach reach performance, a low base strong reach A reach performance is executed, followed by a jackpot.

The presentation control pattern corresponding to the variation pattern PB1-5 is a pattern in which, after the normal reach reach performance, a low base weak super reach A reach performance is executed, and then a low base strong reach B reach performance is executed, followed by a jackpot.The presentation control pattern corresponding to the variation pattern PB1-6 is a pattern in which, after the normal reach reach performance, a low base weak super reach B reach performance is executed, and then a low base strong reach B reach performance is executed, followed by a jackpot.The presentation control pattern corresponding to the variation pattern PB1-7 is a pattern in which, after the normal reach reach performance, a low base strong reach B reach performance is executed, followed by a jackpot.

The presentation control pattern corresponding to the variation pattern PB1-8 is set to a pattern in which, after the reach performance of a normal reach, a reach performance of a low base weak super reach A is executed, and then a reach performance of a low base strong reach C is executed, followed by a jackpot.The presentation control pattern corresponding to the variation pattern PB1-9 is set to a pattern in which, after the reach performance of a normal reach, a reach performance of a low base weak super reach B is executed, and then a reach performance of a low base strong reach C is executed, followed by a jackpot.The presentation control pattern corresponding to the variation pattern PB1-10 is set to a pattern in which, after the reach performance of a normal reach, a reach performance of a low base strong reach C is executed, followed by a jackpot.

The presentation control pattern corresponding to the variation pattern PB1-11 is set to execute a normal reach reach performance, followed by a low base weak super reach A reach performance, then a low base strongest super reach reach performance, followed by a jackpot. The presentation control pattern corresponding to the variation pattern PA2-12 is set to execute a normal reach reach performance, followed by a low base weak super reach B reach performance, then a low base strongest super reach reach performance, followed by a jackpot. The presentation control pattern corresponding to the variation pattern PB1-13 is set to execute a normal reach reach performance, followed by a low base strongest super reach reach performance, followed by a jackpot.

Fluctuation patterns PB1-1 to PB1-13 are all fluctuation patterns selected in normal conditions.

As a presentation control pattern corresponding to the variation pattern PB1-14, a pattern is set in which after the reach performance of a normal reach, a reach performance of a high base reach A is executed, followed by a jackpot. As a presentation control pattern corresponding to the variation pattern PB1-15, a pattern is set in which after the reach performance of a normal reach, a reach performance of a high base reach B is executed, followed by a jackpot. As a presentation control pattern corresponding to the variation pattern PB1-16, a pattern is set in which after the reach performance of a normal reach, a reach performance of a high base reach C is executed, followed by a jackpot. As a presentation control pattern corresponding to the variation pattern PB1-17, a pattern is set in which after the reach performance of a normal reach, a reach performance of a high base reach D is executed, followed by a jackpot.

Patterns PB1-14 to PB1-17 are all selected in time-saving state A and special state.

The effect control pattern corresponding to the fluctuation pattern PB1-18 is set to a pattern in which a jackpot is achieved without executing the reach effect of a normal reach or super reach. The fluctuation pattern PB1-18 is the fluctuation pattern selected in the time-saving state B.

[About the flow of the presentation during variable display]
11-29 is a diagram showing the flow of the presentation during variable display in the normal state. The presentation control CPU 120 receives the first variable display start command or the second variable display start command in the normal state, and when the variable pattern designated by the variable pattern designation command is PA1-1 or PA1-2, controls the decorative pattern to be not in a reach state but in a non-reach miss state.

The presentation control CPU 120 receives the first variable display start command or the second variable display start command in the normal state, and if the fluctuation pattern specified by the fluctuation pattern designation command is PA2-1 or PB1-1, executes a normal reach reach presentation in which the decorative pattern is in a reach state, and then controls so that the reach is missed if the fluctuation pattern specified by the fluctuation pattern designation command is PA2-1, and controls so that a jackpot is reached if the fluctuation pattern specified by the fluctuation pattern designation command is PB1-1.

The performance control CPU 120 receives the first variable display start command or the second variable display start command in the normal state, and if the fluctuation pattern specified by the fluctuation pattern specification command is PA2-2, it executes the reach performance of a normal reach, then executes the reach performance of a low base weak super reach A, and then notifies a miss as the performance result of the reach performance of a low base weak super reach A, and controls so that the reach is a miss.

The performance control CPU 120 receives the first variable display start command or the second variable display start command in the normal state, and if the fluctuation pattern specified by the fluctuation pattern specification command is PA2-3, it executes the reach performance of a normal reach, then executes the reach performance of a low base weak super reach B, and then notifies a miss as the performance result of the reach performance of the low base weak super reach B, and controls so that the reach is a miss.

The performance control CPU 120 receives the first variable display start command or the second variable display start command in the normal state, and if the fluctuation pattern specified by the fluctuation pattern designation command is PA2-4 or PB1-2, it executes the reach performance of a normal reach, then executes the reach performance of a low base weak super reach A, and then executes the reach performance of a low base strong super reach A, and then, if the fluctuation pattern specified by the fluctuation pattern designation command is PA2-4, it controls so that a miss is announced as the performance result of the reach performance of the low base strong super reach A, and the reach is a miss, and if the fluctuation pattern specified by the fluctuation pattern designation command is PB1-2, it controls so that a jackpot is announced as the performance result of the reach performance of the low base strong super reach A, and the jackpot is achieved.

The performance control CPU 120 receives the first variable display start command or the second variable display start command in the normal state, and if the fluctuation pattern specified by the fluctuation pattern designation command is PA2-5 or PB1-3, it executes the reach performance of a normal reach, then executes the reach performance of a low base weak super reach B, and then executes the reach performance of a low base strong super reach A, and then, if the fluctuation pattern specified by the fluctuation pattern designation command is PA2-5, it controls so that a miss is announced as the performance result of the reach performance of the low base strong super reach A, and it controls so that the reach is a miss, and if the fluctuation pattern specified by the fluctuation pattern designation command is PB1-3, it controls so that a jackpot is announced as the performance result of the reach performance of the low base strong super reach A, and it is a jackpot.

The performance control CPU 120 receives the first variable display start command or the second variable display start command in the normal state, and if the fluctuation pattern specified by the fluctuation pattern designation command is PA2-6 or PB1-4, it executes the reach performance of a normal reach, and then executes the reach performance of a low base strong super reach A, and then, if the fluctuation pattern specified by the fluctuation pattern designation command is PA2-6, it controls so that a miss is announced as the performance result of the reach performance of the low base strong super reach A, and the reach is a miss, and if the fluctuation pattern specified by the fluctuation pattern designation command is PB1-4, it controls so that a jackpot is announced as the performance result of the reach performance of the low base strong super reach A, and the jackpot is achieved.

The performance control CPU 120 receives the first variable display start command or the second variable display start command in the normal state, and if the fluctuation pattern specified by the fluctuation pattern designation command is PA2-7 or PB1-5, it executes the reach performance of a normal reach, then executes the reach performance of a low base weak super reach A, and then executes the reach performance of a low base strong super reach B, and then, if the fluctuation pattern specified by the fluctuation pattern designation command is PA2-7, it controls so that a miss is announced as the performance result of the reach performance of the low base strong super reach B, and the reach is a miss, and if the fluctuation pattern specified by the fluctuation pattern designation command is PB1-5, it controls so that a jackpot is announced as the performance result of the reach performance of the low base strong super reach B, and the jackpot is achieved.

The performance control CPU 120 receives the first variable display start command or the second variable display start command in the normal state, and if the fluctuation pattern specified by the fluctuation pattern designation command is PA2-8 or PB1-6, it executes the normal reach reach performance, then executes the low base weak super reach B reach performance, and then executes the low base strong super reach B reach performance, and then, if the fluctuation pattern specified by the fluctuation pattern designation command is PA2-8, it controls so that a miss is announced as the performance result of the low base strong super reach B reach performance, and the reach is a miss, and if the fluctuation pattern specified by the fluctuation pattern designation command is PB1-6, it controls so that a jackpot is announced as the performance result of the low base strong super reach B reach performance, and the jackpot is achieved.

The performance control CPU 120 receives the first variable display start command or the second variable display start command in the normal state, and if the fluctuation pattern specified by the fluctuation pattern designation command is PA2-9 or PB1-7, it executes the reach performance of a normal reach, and then executes the reach performance of a low base strong super reach B, and then, if the fluctuation pattern specified by the fluctuation pattern designation command is PA2-9, it controls so that a miss is announced as the performance result of the reach performance of the low base strong super reach B, and the reach is a miss, and if the fluctuation pattern specified by the fluctuation pattern designation command is PB1-7, it controls so that a jackpot is announced as the performance result of the reach performance of the low base strong super reach B, and the jackpot is achieved.

The performance control CPU 120 receives the first variable display start command or the second variable display start command in the normal state, and if the fluctuation pattern specified by the fluctuation pattern designation command is PA2-10 or PB1-8, it executes the reach performance of a normal reach, then executes the reach performance of a low base weak super reach A, and then executes the reach performance of a low base strong super reach C, and then, if the fluctuation pattern specified by the fluctuation pattern designation command is PA2-10, it controls so that a miss is announced as the performance result of the reach performance of the low base strong super reach C, and the reach is a miss, and if the fluctuation pattern specified by the fluctuation pattern designation command is PB1-8, it controls so that a jackpot is announced as the performance result of the reach performance of the low base strong super reach C, and the jackpot is achieved.

The performance control CPU 120 receives the first variable display start command or the second variable display start command in the normal state, and if the fluctuation pattern specified by the fluctuation pattern designation command is PA2-11 or PB1-9, it executes the reach performance of a normal reach, then executes the reach performance of a low base weak super reach B, and then executes the reach performance of a low base strong super reach C, and then, if the fluctuation pattern specified by the fluctuation pattern designation command is PA2-11, it controls so that a miss is announced as the performance result of the reach performance of the low base strong super reach C, and the reach is a miss, and if the fluctuation pattern specified by the fluctuation pattern designation command is PB1-9, it controls so that a jackpot is announced as the performance result of the reach performance of the low base strong super reach C, and the jackpot is achieved.

The performance control CPU 120 receives the first variable display start command or the second variable display start command in the normal state, and if the fluctuation pattern specified by the fluctuation pattern designation command is PA2-12 or PB1-10, it executes the reach performance of a normal reach, and then executes the reach performance of a low base strong super reach C, and then, if the fluctuation pattern specified by the fluctuation pattern designation command is PA2-12, it controls so that a miss is announced as the performance result of the reach performance of the low base strong super reach C, and the reach is a miss, and if the fluctuation pattern specified by the fluctuation pattern designation command is PB1-10, it controls so that a jackpot is announced as the performance result of the reach performance of the low base strong super reach C, and the jackpot is achieved.

The performance control CPU 120 receives the first variable display start command or the second variable display start command in the normal state, and if the fluctuation pattern specified by the fluctuation pattern designation command is PA2-13 or PB1-11, it executes the reach performance of a normal reach, then executes the reach performance of a low base weak super reach A, and then executes the reach performance of a low base strongest super reach, and then, if the fluctuation pattern specified by the fluctuation pattern designation command is PA2-13, it controls so that a miss is announced as the performance result of the reach performance of the low base strongest super reach, and the reach is a miss, and if the fluctuation pattern specified by the fluctuation pattern designation command is PB1-11, it controls so that a jackpot is announced as the performance result of the reach performance of the low base strongest super reach, and the jackpot is achieved.

The performance control CPU 120 receives the first variable display start command or the second variable display start command in the normal state, and if the fluctuation pattern specified by the fluctuation pattern designation command is PA2-14 or PB1-12, it executes the normal reach reach performance, then executes the low base weak super reach B reach performance, and then executes the low base strongest super reach reach performance, and then, if the fluctuation pattern specified by the fluctuation pattern designation command is PA2-14, it controls so that a miss is announced as the performance result of the low base strongest super reach reach performance, and the reach is a miss, and if the fluctuation pattern specified by the fluctuation pattern designation command is PB1-12, it controls so that a jackpot is announced as the performance result of the low base strongest super reach reach performance, and the jackpot is achieved.

The performance control CPU 120 receives the first variable display start command or the second variable display start command in the normal state, and if the fluctuation pattern specified by the fluctuation pattern designation command is PA2-15 or PB1-13, it executes the reach performance of a normal reach, and then executes the reach performance of a low base strongest super reach, and then, if the fluctuation pattern specified by the fluctuation pattern designation command is PA2-15, it controls so that a miss is announced as the performance result of the reach performance of the low base strongest super reach, and the reach is a miss, and if the fluctuation pattern specified by the fluctuation pattern designation command is PB1-13, it controls so that a jackpot is announced as the performance result of the reach performance of the low base strongest super reach, and the jackpot is achieved.

In this way, in the normal state, a jackpot is announced as the result of the low base weak super reach A and B reach performance, and is not controlled to a jackpot.Only the reach performances of low base strong super reach A-C, which are executed via the low base weak super reach A and B reach performance, low base strongest reach, and low base weak super reach A and B reach performance, low base strong super reach A-C and low base strongest super reach are announced as the result of the performance and are controlled to a jackpot.

Figure 11-30 is a diagram showing the flow of presentation during variable display in time-saving state A and high probability state. The presentation control CPU 120 receives the first variable display start command or the second variable display start command in time-saving state A and high probability state, and when the variable pattern specified by the variable pattern specification command is PA1-3, controls so that the decorative pattern does not become a reach state but becomes a non-reach miss.

The CPU 120 for controlling the presentation receives the first variable display start command or the second variable display start command in the time-saving state A or the probability variable state, and executes a normal reach presentation if the fluctuation pattern specified by the fluctuation pattern designation command is PA2-1 or PB1-1, and then controls so that the reach is missed if the fluctuation pattern specified by the fluctuation pattern designation command is PA2-1, and controls so that a jackpot is reached if the fluctuation pattern specified by the fluctuation pattern designation command is PB1-1.

The performance control CPU 120 receives the first variable display start command or the second variable display start command in the time-saving state A or the probability variable state, and if the fluctuation pattern specified by the fluctuation pattern designation command is PA2-16 or PB1-14, executes the reach performance of a normal reach, and then executes the reach performance of a high base super reach A, and then, if the fluctuation pattern specified by the fluctuation pattern designation command is PA2-16, controls so that a miss is announced as the performance result of the reach performance of the high base super reach A, and controls so that the reach is a miss, and if the fluctuation pattern specified by the fluctuation pattern designation command is PB1-14, controls so that a jackpot is announced as the performance result of the reach performance of the high base super reach A, and controls so that a jackpot is announced.

The performance control CPU 120 receives the first variable display start command or the second variable display start command in the time-saving state A or the probability variable state, and if the fluctuation pattern specified by the fluctuation pattern designation command is PA2-17 or PB1-15, executes a normal reach reach performance, and then executes a high base super reach B reach performance, and then, if the fluctuation pattern specified by the fluctuation pattern designation command is PA2-17, a miss is announced as the performance result of the high base super reach B reach performance, and controls so that the reach is a miss, and if the fluctuation pattern specified by the fluctuation pattern designation command is PB1-15, a jackpot is announced as the performance result of the high base super reach B reach performance, and controls so that the jackpot is announced.

The performance control CPU 120 receives the first variable display start command or the second variable display start command in the time-saving state A or the probability variable state, and if the fluctuation pattern specified by the fluctuation pattern designation command is PA2-18 or PB1-16, it executes the reach performance of a normal reach, and then executes the reach performance of a high base super reach C, and then, if the fluctuation pattern specified by the fluctuation pattern designation command is PA2-18, it controls so that a miss is announced as the performance result of the reach performance of the high base super reach C, and the reach is a miss, and if the fluctuation pattern specified by the fluctuation pattern designation command is PB1-16, it controls so that a jackpot is announced as the performance result of the reach performance of the high base super reach C, and the jackpot is achieved.

The performance control CPU 120 receives the first variable display start command or the second variable display start command in the time-saving state A or the probability variable state, and if the fluctuation pattern specified by the fluctuation pattern designation command is PA2-19 or PB1-17, executes the reach performance of a normal reach, and then executes the reach performance of a high base super reach D, and then, if the fluctuation pattern specified by the fluctuation pattern designation command is PA2-19, controls so that a miss is announced as the performance result of the reach performance of the high base super reach D, and controls so that the reach is a miss, and if the fluctuation pattern specified by the fluctuation pattern designation command is PB1-17, controls so that a jackpot is announced as the performance result of the reach performance of the high base super reach D, and controls so that a jackpot is announced.

In this way, in the time-saving state A and the probability variable state, the result of a big hit or a miss is announced in the normal performance or in the reach performance of the high base super reach A to D that is controlled after the normal performance, and then it is controlled to a big hit or a miss, and no other reach performance is executed from the high base super reach A to D that is controlled after the normal performance.

Figure 11-31 is a diagram showing the flow of the presentation during variable display in time-saving state B. The presentation control CPU 120 receives the first variable display start command or the second variable display start command in time-saving state B, and when the variable pattern specified by the variable pattern specification command is PA1-4, controls the decorative pattern so that it does not become a reach state but becomes a non-reach miss.

The performance control CPU 120 receives the first variable display start command or the second variable display start command in the time-saving state B, and when the variation pattern specified by the variation pattern specification command is PB1-18, controls the decorative pattern so that it does not become a reach state but becomes a jackpot.

In this way, in time-saving state B, the game is controlled so that misses and big wins always result in a non-reach.

[About the Super Reach Production]
In this embodiment, the performance control CPU 120 can execute the reach performance of the super reach during the variable display. The reach performance of the super reach includes the reach performance of the low base weak super reach A, B, the low base strong super reach A to C, and the low base strongest super reach executed in the normal state as described above, and the reach performance of the high base super reach A to D executed in the time-saving state A and the probability variable state. In the following, the reach effects of normal reaches and super reaches may be simply referred to as normal reach effects and super reach effects, respectively, the reach effects of low base weak super reach A, low base weak super reach B, low base strong super reach A, low base strong super reach B, low base strong super reach C and low base strongest super reach may be simply referred to as low base weak reach A effects, low base weak reach B effects, low base strong reach A effects, low base strong reach B effects, low base strong reach C effects and low base strongest reach effects, respectively, and the reach effects of high base super reach A, high base super reach B, high base super reach C and high base super reach D may be simply referred to as high base reach A effects, high base reach B effects, high base reach C effects and high base reach effects, respectively.

The Super Reach effect is an effect that suggests the possibility of a jackpot, and also announces the final result of whether or not a jackpot will occur (for low base weak Super Reach A and B, the result will be whether it develops into low base strong Super Reach A-C or low base strongest Super Reach, or whether it will be a miss).

In addition, each type of super reach performance has a title set for it, and the super reach performance is made up of a title display part where the title of the super reach performance is displayed, and an introduction part that follows the title display part and ends when the performance result is announced.

[Variations of low base weak reach A and B effects]
In this embodiment, the fluctuation pattern for executing a low base weak reach A performance or a low base weak reach B performance does not include a fluctuation pattern in which a jackpot is reached without developing into other super reach performances after the execution of a low base weak reach A performance or a low base weak reach B performance, but it may also be a fluctuation pattern PB1-JA in which a jackpot is reached without developing into other super reach performances after the execution of a low base weak reach A performance, and a fluctuation pattern PB1-JB in which a jackpot is reached without developing into other super reach performances after the execution of a low base weak reach B performance.

In such a configuration, the presentation control CPU 120 receives the first variable display start command or the second variable display start command in the normal state, and when the fluctuation pattern specified by the fluctuation pattern designation command is PB1-JA, it executes a normal reach presentation, then executes a low base weak reach A presentation, and controls so that a jackpot is announced as the presentation result of the low base weak reach A presentation, resulting in a jackpot, and when it receives the first variable display start command or the second variable display start command in the normal state, and when the fluctuation pattern specified by the fluctuation pattern designation command is PB1-JB, it executes a normal reach presentation, then executes a low base weak reach B presentation, and controls so that a jackpot is announced as the presentation result of the low base weak reach B presentation, resulting in a jackpot. Therefore, in this configuration, in the introductory part of the low base weak reach A performance, it is either announced whether or not the performance will result in a jackpot or it will develop into another super reach performance, and in the introductory part of the low base weak reach B performance, it is either announced whether or not the performance will result in a jackpot or it will develop into another super reach performance.

In addition, the configuration may not include a variation pattern that develops into another super reach performance after the execution of the low base weak reach A or B performance. In such a configuration, in the introductory part of the low base weak reach A or B performance, it will be announced whether or not the performance will result in a jackpot.

In the following examples, a configuration may also be applied that includes a variation pattern that results in a jackpot without developing into other super reach effects after the execution of low base weak reach A and B effects. In this case, the configuration is set to have a higher jackpot expectancy for low base strong reach A to C effects and low base strongest reach effects than for low base weak reach A effects and low base weak reach A effects, and a determination ratio for variation patterns that result in a miss after the execution of low base weak reach A and B effects, and variation patterns that result in a jackpot without developing into other super reach effects after the execution of low base weak reach A and B effects.

[About the low base weak reach A performance]
FIG. 11-32 is a diagram showing the progression of the image displayed on the image display device 5 when the low base weak reach A performance is executed, and FIG. 11-33 is a timing chart showing the execution status of the low base weak reach A performance.

When the CPU 120 for controlling the performance receives the first variable display start command or the second variable display start command in the normal state and, when a variable pattern corresponding to a low base weak super reach A is specified by the variable pattern specification command, it starts the variation of a relatively large size decorative pattern (decorative pattern (large)), and executes a normal reach performance in which the decorative pattern (large) of the type specified by the variable display result specification command at a predetermined timing stops in the "left" and "right" decorative pattern display areas 5L and 5R on the image display device 5 to create a reach state, as shown in FIG. 11-32 (a1). After that, it executes the operation promotion performance A described later, and executes a white flash performance in which the entire display area is displayed in white while maintaining the pending display and active display of the first pending memory display area 131SG005D, the second pending memory display area 131SG005U, and the active display area 131SG005F, as shown in FIG. 11-32 (a2), and then starts the title display part of the low base weak reach A performance.

As shown in Figures 11-32 (a1) to (a3), the background (daytime sky background) of the changing decorative pattern (large) in the normal state that was displayed before the white flash performance changes to the background (corridor background) of the low base weak reach A performance after the white flash performance, and the decorative pattern (large) that was displayed in a reach mode before the white flash performance changes to a reach mode of a decorative pattern (small) that is smaller than the decorative pattern (large) after the white flash performance.

As shown in FIG. 11-33, the title display part of the low base weak reach A performance includes a title start period from when part of the title characters "Catch a Bakuchu!" of the low base weak reach A performance is displayed in the display area of the image display device 5 until they are displayed in their fixed position, a title display period during which the title characters "Catch a Bakuchu!" are displayed in their fixed position, and a title end period from when the title characters "Catch a Bakuchu!" that were displayed in their fixed position disappear and switch to the introduction part.

When the performance control CPU 120 transitions to the title display part of the low base weak reach A performance, it first starts displaying the title start period. During the title start period of the low base weak reach A performance, as shown in Figures 11-32 (a3) to (a4), part of the title characters "Catch a Bakuchu!" are made to appear from the left side of the display area in a manner overlapping with the left decorative pattern (small) of the left and right decorative patterns (small) of the reach mode, and then the entire title characters "Catch a Bakuchu!" are moved toward their fixed position and stopped at the fixed position. When the title characters "Catch a Bakuchu!" are stopped at their fixed position, part of the title characters "Catch a Bakuchu!" are displayed in a manner overlapping with both the left and right decorative patterns (small) of the reach mode.

The small decorative symbols on the left and right of the reach state will be any number between "1" and "9" ("2" in the figure), but during the title start period of the low base weak reach A performance, whether the small decorative symbols on the left and right of the reach state are any number between "1" and "9", part of the title characters "Catch the Bakuchu!" will appear overlapping with the left small decorative symbol on the left and right of the reach state, and when the title characters "Catch the Bakuchu!" are stationary in their fixed position, part of the title characters "Catch the Bakuchu!" will be displayed overlapping with both the small decorative symbols on the left and right of the reach state.

The performance control CPU 120 displays the title characters "Catch Bakuchu!" in a fixed position during the title start period, and then transitions to displaying the title display period. During the title display period of the low base weak reach A performance, as shown in Figures 11-32 (a4) to (a5), the enemy character "Bakuchu" appears behind the title characters "Catch Bakuchu!" displayed in a fixed position, and a subtitle "Try and catch him if you can!", which corresponds to the scene in which the enemy character "Bakuchu" appears, is displayed below the title characters "Catch Bakuchu!", and the audio of the subtitled line is output from the speakers 8L and 8R. At this time, as shown in Figure 11-33, audio reading the title is not output. Also, as shown in Figure 11-33, the title display period of the low base weak reach A performance is executed for a longer time than the title start period of the low base weak reach A performance (see Figures 11-47 and 11-48).

After the title display period ends, the performance control CPU 120 transitions to displaying the title end period. During the title end period of the low base weak reach A performance, as shown in Figures 11-32 (a5) to (a6), the title characters "Catch the Bakuchu!" displayed in their fixed position are moved from their fixed position to the right side of the display area until all of the title characters disappear. As shown in Figure 11-33, the title end period of the low base weak reach A performance ends in a shorter time than the title start period and title display period of the low base weak reach A performance (see Figures 11-47 and 11-48). Also, as shown in Figure 11-33, the expectation indication display, which will be described later, is not displayed in the title display part of the low base weak reach A performance.

After the title end period ends, the performance control CPU 120 starts the introductory part of the low base weak reach A performance. As shown in FIG. 11-32 (a6) to (a7), the background at the start of the introductory part of the low base weak reach A performance is the same as the background of the title display part (the background of the hallway), the video scene that started from the title display part (the scene in which the enemy character "Bakuchu" appears) also continues throughout the introductory part, the line "Try and catch him if you can!" that was displayed in the title display part also continues to be displayed, and the audio of the line output from the speakers 8L and 8R also continues to be output. After that, as shown in FIG. 11-32 (a7) to (a8), at the timing when the audio output of the line "Try and catch him if you can!" that was displayed in the title display part ends, the scene switches to the next video scene of the introductory part (a scene in which the ally character "Yume Yume" chases the enemy character "Bakuchu").

When a variation pattern is specified by the variation pattern specification command to develop into either low base strong super reach A-C or low base strongest super reach after low base weak super reach A, the CPU 120 for controlling the performance executes a drop performance in which the movable body 32 falls at the end of the introduction part, and then develops into either low base strong reach A performance, low base strong reach B performance, low base strong reach C performance, or low base strongest reach performance. On the other hand, when a variation pattern is specified by the variation pattern specification command to develop into a reach miss after low base weak super reach A, the CPU 120 notifies the user that the ally character "Yume Yume" is unable to catch the enemy character "Bakuchu" at the end of the introduction part, and the low base weak reach A performance result is not a jackpot, and then displays on the image display device 5 a combination of decorative patterns (large) indicating a reach miss of the type specified by the variable display result specification command.

In a configuration including a variation pattern in which a jackpot is reached without developing into other super reach effects after the execution of a low base weak reach A performance, when a variation pattern in which a jackpot is reached without developing into other super reach effects after the execution of a low base weak reach A performance after a low base weak super reach A is specified by a variation pattern specification command, the performance control CPU 120 notifies the player of the performance result that a jackpot is reached (the game is controlled to a jackpot game state) as the performance result of the low base weak reach A performance at the end of the introductory part, and then displays on the image display device 5 a combination of decorative patterns (large) indicating the type of jackpot specified by the variable display result specification command.

[About the low base weak reach B performance]
FIG. 11-34 is a diagram showing the progression of the image displayed on the image display device 5 when the low base weak reach B performance is executed, and FIG. 11-35 is a timing chart showing the execution status of the low base weak reach B performance.

When the CPU 120 for controlling the performance receives the first variable display start command or the second variable display start command in the normal state and, when a variable pattern corresponding to the low base weak super reach B is specified by the variable display result specification command, it starts the variation of the decorative pattern (large) and executes a normal reach performance in which the decorative pattern (large) of the type specified by the variable display result specification command is stopped in the "left" and "right" decorative pattern display areas 5L and 5R of the image display device 5 at a predetermined timing to set the reach state, as shown in FIG. 11-34 (b1). After that, it executes the operation promotion performance A described later, and, as shown in FIG. 11-34 (b2), it executes a white flash performance in which the entire display area is displayed in white while maintaining the reserved display and active display of the first reserved memory display area 131SG005D, the second reserved memory display area 131SG005U, and the active display area 131SG005F, and then starts the title display part of the low base weak reach B performance.

As shown in Figures 11-34 (b1) to (b3), the background (daytime sky background) of the changing decorative pattern (large) in the normal state that was displayed before the white flash performance changes to the background of the low base weak reach B performance (a background in which the characters "Yume Yume" and "Boingo" face each other on either side of a hockey table) after the white flash performance, and the decorative pattern (large) that was displayed in a reach mode before the white flash performance changes to a reach mode of a decorative pattern (small) that is smaller in size than the decorative pattern (large) after the white flash performance.

As shown in FIG. 11-35, the title display part of the low base weak reach B effect includes a title start period from when a part of the title characters "Bilibili hockey showdown" of the low base weak reach B effect is displayed in the display area of the image display device 5 until it is displayed in the fixed position, a title display period during which the title characters "Bilibili hockey showdown" are displayed in the fixed position, and a title end period from when the title characters "Bilibili hockey showdown" that were displayed in the fixed position disappear and switch to the introductory part.

When the CPU 120 for controlling the performance transitions to the title display part of the low base weak reach B performance, it first starts displaying the title start period. During the title start period of the low base weak reach B performance, as shown in FIG. 11-34 (b3) to (b4), part of the title characters "Bilibili Hockey Showdown" is made to appear from the left side of the display area in a manner overlapping with the left decorative pattern (small) of the left and right decorative patterns (small) of the reach mode, and then the entire title characters "Bilibili Hockey Showdown" are moved toward the fixed position and stopped at the fixed position. When the title characters "Bilibili Hockey Showdown" are stopped at the fixed position, part of the title characters "Bilibili Hockey Showdown" is displayed in a manner overlapping with both the left and right decorative patterns (small) of the reach mode.

The small decorative symbols on the left and right of the reach state will be any of the numbers "1" to "9" ("2" in the figure), but during the title start period of the low base weak reach B performance, whether the small decorative symbols on the left and right of the reach state are any of the numbers "1" to "9", part of the title characters "Bilibili Hockey Showdown" will appear overlapping with the left small decorative symbol on the left and right of the reach state, and when the title characters "Bilibili Hockey Showdown" are stationary in their fixed position, part of the title characters "Bilibili Hockey Showdown" will be displayed overlapping with both the small decorative symbols on the left and right of the reach state.

The CPU 120 for controlling the performance displays the title characters "Bilibili Hockey Showdown" in a fixed position during the title start period, and then transitions to displaying the title display period. During the title display period of the low base weak reach B performance, as shown in FIG. 11-34 (b4) to (b5), a subtitle "Let's play hockey! I won't lose!" is displayed below the title characters "Bilibili Hockey Showdown", corresponding to the scene in which the friendly character "Yume Yume" and the enemy character "Boingo" face each other on the left and right, and the audio of the line displayed in the subtitle is output from the speakers 8L and 8R. At this time, as shown in FIG. 11-35, the audio of the title being read out is not output. Also, as shown in FIG. 11-35, the title display period of the low base weak reach B performance is executed for a longer time than the title start period of the low base weak reach B performance (see FIG. 11-47 and FIG. 11-48).

After the title display period ends, the performance control CPU 120 transitions to displaying the title end period. During the title end period of the low base weak reach B performance, as shown in (b5) to (b6), the title characters "Bilibili Hockey Showdown" displayed in a fixed position are moved from their fixed position to the right side of the display area until all of the title characters disappear. As shown in Figure 11-35, the title end period of the low base weak reach B performance ends in a shorter time than the title start period and title display period of the low base weak reach B performance (see Figures 11-47 and 11-48). Also, as shown in Figure 11-35, the expectation indication display, which will be described later, is not displayed in the title display part of the low base weak reach B performance.

After the title end period ends, the performance control CPU 120 starts the introductory part of the low base weak reach B performance. As shown in Figures 11-34 (b6) to (b7), the background at the start of the introductory part of the low base weak reach B performance is the same as the background of the title display part (the background in which the characters "Yume Yume" and "Boingo" face each other on either side of a hockey table), the video scene that started from the title display part (the scene in which the friendly character "Yume Yume" and the enemy character "Boingo" face each other on either side) also continues throughout the introductory part, the line that was displayed in the title display part "Let's play hockey! I won't lose!" also continues to be displayed, and the sound of the line output from speakers 8L and 8R also continues to be output. After that, as shown in Figure 11-34 (b7) to (b8), when the voice output of the line displayed in the title display part, "Let's play hockey! I won't lose!", ends, the scene switches to the next video scene in the introductory part (a scene in which the teammate character "Yume Yume" hits the puck back).

When a variation pattern is specified by the variation pattern specification command to develop into either low base strong super reach A-C or low base strongest super reach after low base weak super reach B, the CPU 120 for controlling the performance executes a drop performance in which the movable body 32 falls at the end of the introduction part, and then develops into either low base strong reach A performance, low base strong reach B performance, low base strong reach C performance, or low base strongest reach performance. On the other hand, when a variation pattern is specified by the variation pattern specification command to develop into a reach miss after low base weak super reach B, the CPU 120 notifies the user that the ally character "Yume Yume" was unable to win against the enemy character "Boingo" at the end of the introduction part, and the low base weak reach B performance is not a big win as a performance result, and then displays on the image display device 5 a combination of decorative patterns (large) indicating a reach miss of the type specified by the variable display result specification command.

In a configuration including a variation pattern in which a jackpot is reached without developing into other super reach effects after the execution of a low base weak reach B performance, when a variation pattern in which a jackpot is reached without developing into other super reach effects after the execution of a low base weak reach B performance is specified by a variation pattern specification command, the performance control CPU 120 notifies the player of the performance result that the ally character "Yume Yume" wins the game against the enemy character "Boingo" at the end of the introductory part and that the low base weak reach B performance results in a jackpot (the game is controlled to a jackpot game state), and then causes the image display device 5 to display a combination of decorative patterns (large) indicating the type of jackpot specified by the variable display result specification command.

[About the low base strong reach A performance]
FIG. 11-36 is a diagram showing the transition of the image displayed on the image display device 5 when the low base strong reach A performance is executed, and FIG. 11-37 is a timing chart showing the execution status of the low base strong reach A performance.

When the performance control CPU 120 receives the first variable display start command or the second variable display start command in the normal state, and when a fluctuation pattern corresponding to a low base strong super reach A is specified by the fluctuation pattern specification command, if the fluctuation pattern is a fluctuation pattern that develops from a normal reach via a low base weak super reach A or a low base weak super reach B, after executing the normal reach performance, it executes a low base weak reach A performance or a low base weak reach B performance, and develops it into a low base strong reach A performance. Also, when a fluctuation pattern corresponding to a low base strong super reach A is specified by the fluctuation pattern specification command, if the fluctuation pattern is a fluctuation pattern that develops directly from a normal reach, after executing the normal reach performance, it executes a selection performance described below, and develops it into a low base strong reach A performance.

When developing from a low base weak reach A or low base weak reach B performance, the performance control CPU 120 executes a drop performance in which the movable body 32 drops at the end of the low base weak reach A or low base weak reach B performance, and then starts the title display part of the low base strong reach A performance. In the drop performance, as shown in FIG. 11-36 (c1), while maintaining the display of the decorative patterns (small) on the left and right of the reach state, and the hold display and active display in the first hold memory display area 131SG005D, the second hold memory display area 131SG005U, and the active display area 131SG005F, the background at the end of the low base weak reach A or low base weak reach B performance is switched to a background dedicated to the drop performance (a background with a pattern spreading radially from the center), and then the movable body 32 drops, and then the movable body 32 is raised to the initial position.

In addition, when a direct progression from a normal reach occurs, the performance control CPU 120 executes the selection performance described below, as shown in FIG. 11-36 (c1'), and then starts the title display part of the low base strong reach A performance. Details of the selection performance will be described later, but when the selection performance starts, the hold display and active display in the first hold memory display area 131SG005D, the second hold memory display area 131SG005U, and the active display area 131SG005F are hidden.

As shown in FIG. 11-37, the title display part of the low base strong reach A performance includes a prologue display period before the title characters "Two people, catch a Bakuchu!" of the low base strong reach A performance are displayed, a title start period from when part of the title characters "Two people, catch a Bakuchu!" are displayed in the display area of the image display device 5 until they are displayed in their fixed position, a title display period during which the title characters "Two people, catch a Bakuchu!" are displayed in their fixed position, and a title end period until the title characters "Two people, catch a Bakuchu!" that were displayed in their fixed position disappear and switch to the introduction part.

When the performance control CPU 120 transitions to the title display part of the low base strong reach A performance, it first starts displaying the prologue display period.

During the prologue display period of the low base strong reach A effect transitioned from the drop effect, the background dedicated to the drop effect (background with a pattern radiating from the center), the display of the decorative patterns (small) on the left and right of the reach state, and the reserved and active displays of the first reserved memory display area 131SG005D, the second reserved memory display area 131SG005U, and the active display area 131SG005F are maintained, while the ally character "Yume Yume" is displayed on a layer in front of the background dedicated to the drop effect (background with a pattern radiating from the center), the reserved and active displays, and then the ally character "Yume Yume" is enlarged until the entire display area is filled.

In addition, during the prologue display period of the low base strong reach A effect transitioned from the selection effect, the display of the selection result image of the selection effect (here, the result image of the low base strong reach A effect) and the decorative patterns (small) on the left and right of the reach state are maintained, and the ally character "Yume Yume" is displayed on a layer in front of the selection result screen of the selection effect, and then the ally character "Yume Yume" is enlarged until the entire display area is filled.

After the prologue display period ends, the performance control CPU 120 transitions to the title start period.

As shown in Figure 11-36 (c1) to (c3), during the prologue display period transitioned from the drop effect, the background dedicated to the drop effect (a background with a pattern spreading out radially from the center) that was displayed before the entire display area was filled with the enlarged display of the ally character "Yume Yume" switches to the background of the low base strong reach A effect (a background in which the ally characters "Yume Yume" and "Jam" are displayed in the hallway) after the prologue display period ends, and the pending display and active display that were displayed before the entire display area was filled with the enlarged display of the ally character "Yume Yume" are hidden after the prologue display period ends. Note that the display of the decorative patterns (small) on the left and right of the reach mode is maintained even after the prologue display period ends.

Also, although not shown, during the prologue display period transitioned from the selection performance, the selection result image of the selection performance that was displayed before the display area was filled entirely with the enlarged display of the ally character "Yume Yume" switches to the background of the low base strong reach A performance (the background where the ally characters "Yume Yume" and "Jam" are displayed in the hallway) after the prologue display period ends. Note that the display of the decorative patterns (small) on the left and right of the reach state is maintained even after the prologue display period ends, and the pending display and active display that were hidden during the selection performance are maintained as hidden.

As shown in Figure 11-36 (c3) to (c4), during the title start period of the low base strong reach A performance, part of the title characters "Two people, catch the Bakuchu!" appears from the left side of the display area, overlapping with the left decorative pattern (small) of the left and right decorative patterns of the reach mode, and then the entire title characters "Two people, catch the Bakuchu!" are moved toward their fixed position and stopped at the fixed position. When the title characters "Two people, catch the Bakuchu!" are stopped at their fixed position, part of the title characters "Two people, catch the Bakuchu!" is displayed overlapping with both the left and right decorative patterns (small) of the reach mode.

The small decorative symbols on the left and right of the reach state will be any number between "1" and "9" ("2" in the figure), but during the title start period of the low base strong reach A performance, whether the small decorative symbols on the left and right of the reach state are any number between "1" and "9", part of the title text "Two people, catch the explosive chu!" will appear overlapping with the left small decorative symbol on the left and right of the small decorative symbols on the left and right of the reach state, and when the title text "Two people, catch the explosive chu!" is stationary in its fixed position, part of the title text "Two people, catch the explosive chu!" will be displayed overlapping with both the small decorative symbols on the left and right of the reach state.

The CPU 120 for controlling the performance displays the title characters "Two people, catch the explosive chu!" in a fixed position during the title start period, and then transitions to displaying the title display period. During the title display period of the low base strong reach A performance, first, as shown in FIG. 11-36 (c4), the title characters "Two people, catch the explosive chu!" are displayed in a fixed position with the expectation indication display hidden for a predetermined time, and during that time, as shown in FIG. 11-37, a voice reading the title is output from the speakers 8L and 8R. Next, as shown in FIG. 11-36 (c5) to (c6), an expectation indication display is displayed below the title characters "Two people, catch the explosive chu!" in a size smaller than the title characters "Two people, catch the explosive chu!". As shown in FIG. 11-37, the title display period of the low base strong reach A performance is executed for a longer time than the title start period of the low base strong reach A performance (see FIG. 11-47 and FIG. 11-48).

After the title display period ends, the CPU 120 for controlling the performance transitions to the display of the title end period. In the title end period of the low base strong reach A performance, as shown in FIG. 11-36 (c6) to (c7), the title characters "Two people, catch the explosive chu!" displayed in the fixed position are moved from the fixed position to the right side of the display area until all of the title characters disappear. In addition, the expectation indication display is also moved to the right side of the display area together with the title characters until all of them disappear. As shown in FIG. 11-37, the title end period of the low base strong reach A performance ends in a shorter time than the title start period and title display period of the low base strong reach A performance (see FIG. 11-47 and FIG. 11-48). In addition, as shown in FIG. 11-37, in the title display part of the low base strong reach A performance, the subtitles of the dialogue are not displayed as in the low base weak reach A performance and the low base weak reach B performance, and the sound of the dialogue is not output from the speakers 8L and 8R.

After the title end period ends, the performance control CPU 120 starts the introductory part of the low base strong reach A performance. As shown in Figures 11-36 (c3) to (c8), the background at the start of the introductory part of the low base strong reach A performance is the same as the background after the title start period in the title display part (the background where the ally characters "Yume Yume" and "Jam" are displayed in the hallway), and the video scene that starts from the title display part (the scene where the ally characters "Yume Yume" and "Jam" are displayed in the hallway) also continues through the introduction part. Also, as shown in Figures 11-36 (c8) and 11-37, after the start of the introduction part, the enemy character "Bakuchu" appears, and a subtitle of the line "Try and catch him if you can!" corresponding to the scene in which the enemy character "Bakuchu" appears is displayed, and the sound of the line displayed in the subtitle is output from speakers 8L and 8R.

In this way, in the low base strong reach A performance, during the title display part, audio is output from speakers 8L, 8R reading the title, but subtitles of the lines corresponding to the scene in the title display part are not displayed, and audio of the lines corresponding to the scene in the title display part is not output from speakers 8L, 8R. After the introduction part starts, subtitles of the lines corresponding to the scene in the introduction part are displayed, and audio of the lines corresponding to the scene in the introduction part is output from speakers 8L, 8R.

When a variation pattern that results in a big win after a low base strong super reach A is specified by the variation pattern specification command, the CPU 120 for controlling the performance notifies the player that the ally characters "Yume Yume" and "Jam" catch the enemy character "Bakuchu" at the end of the introductory part, and that the low base strong reach A performance is a big win (the game state is controlled to be a big win), and then causes the image display device 5 to display a combination of decorative symbols (large) indicating a big win of the type specified by the variable display result specification command. On the other hand, when a variation pattern that results in a reach miss after a low base strong super reach A is specified by the variation pattern specification command, the CPU 120 notifies the player that the ally characters "Yume Yume" and "Jam" cannot catch the enemy character "Bakuchu" at the end of the introductory part, and that the low base strong reach A performance is not a big win, and then causes the image display device 5 to display a combination of decorative symbols (large) indicating a reach miss of the type specified by the variable display result specification command.

[About the indication of the expectation of low base strong reach A performance]
In the title display part of the low base strong reach A performance, the image display device 5 displays the title text "Two people, catch the explosive chu!" along with an expectation suggestion display in a size smaller than the title text "Two people, catch the explosive chu!". The expectation suggestion display displayed in the title display part is composed of five star-shaped objects and the text "Expectation" displayed above the star-shaped objects to indicate that the star-shaped objects indicate the expectation, as shown in Fig. 11-36 (c5), and the number of star-shaped objects whose color has changed from black to gold among the five star-shaped objects suggests the expectation.

In the normal state in which the low base strong reach A performance is executed, an object indicating the number of reserved balls and an object indicating an active display may be displayed on the image display device 5. On the other hand, since the expectation indication displayed in the title display part also indicates the expectation level using multiple objects, if the hold indication and active display and the expectation indication are displayed simultaneously in the title display part, there is a risk that the objects constituting the hold indication and active display will be mistaken for objects in the expectation indication display. For this reason, in the title display part of the low base strong reach A performance in which the expectation indication is displayed, the hold indication and active display are not displayed simultaneously with the expectation indication, thereby preventing the objects constituting the hold indication and active display from being mistaken for objects in the expectation indication display.

In addition, since it is almost impossible for a game ball to enter the second start winning hole under normal circumstances, when the number of reserved balls in the first special chart is at its maximum (four) and is being displayed variably, a maximum of five objects may be displayed as reserved and active displays, which matches the number of objects indicating that the expectation level is at its maximum in the expectation level indication display. However, in the title display part of the low base strong reach A performance, the reserved and active displays are not displayed at the same time as the expectation level indication display, so even if the low base strong reach A performance is executed in a situation where a maximum of five objects are displayed as reserved and active displays, it is possible to prevent the objects displayed as reserved and active displays from being confused with the objects in the expectation level indication display, and the expectation level indication display from being mistakenly recognized as the maximum expectation level.

In the example shown in FIG. 11-36, the pending display and active display are displayed during the prologue display period before the expectation indication is displayed in the title display part. However, the pending display and active display may be hidden from the start of the prologue display period. Even in such a configuration, it is possible to prevent the objects constituting the pending display and active display from being mistaken for objects in the expectation indication display.

Furthermore, when a low base strong reach A performance is executed, as shown in Figures 11-36 (c2) to (c3), during the prologue display period, the ally character "Yume Yume" is displayed on a background dedicated to the falling performance (a background with a pattern spreading out radially from the center) and on a layer in front of the pending display and active display, and then the ally character "Yume Yume" is enlarged until the entire display area is filled, and the pending display and active display that were displayed before the display area was filled by the enlarged display of the ally character "Yume Yume" are hidden after the prologue display period ends, so that the pending display and active display can be hidden without creating a sense of incongruity. In the example shown in FIG. 11-36, the characters are displayed in a layer in front of the pending and active displays, and are enlarged until the entire display area is filled, thereby hiding the pending and active displays that were displayed before the entire display area was filled. However, when a low base strong reach A performance is executed, a monochrome display performance may be executed in which the entire display area is displayed in a monochrome color such as white, except for the decorative pattern (small) of the reach mode, thereby erasing the pending and active displays that were displayed before the monochrome display performance. Even with this configuration, the pending and active displays can be hidden without any sense of incongruity.

In the title display part of the low base strong reach A performance, as shown in FIG. 11-36(c4), the title text "Two people, catch the explosive chu!" is displayed in a fixed position for a predetermined time with the expectation indication hidden, and then, as shown in FIG. 11-36(c5)-(c6), the expectation indication is displayed below the title text "Two people, catch the explosive chu!". At this time, as shown in FIG. 11-36(c5), in the initial stage, the color of the five star-shaped objects that make up the expectation indication is all displayed in black, and then, as shown in FIG. 11-36(c6), the color of three of the five star-shaped objects that correspond to the low base strong reach A performance is changed from black to gold, suggesting the expectation of a jackpot in the low base strong reach A performance.

When a low base weak reach A performance or a low base weak reach B performance progresses to a low base strong reach A performance, as shown in Figures 11-38 (x1) to (x2), if there are any reserved numbers remaining, the reserved display and active display are displayed until the entire display area is filled by the enlarged display of the ally character "Yume Yume" during the prologue display period, and in the subsequent title display part, without going through a stage where the title characters "Catch the Bakuchu together!" are displayed in a fixed position with the expectation indication display hidden, as shown in Figures 11-38 (x3) to (x4), five star-shaped objects that constitute the expectation indication display are displayed simultaneously with the title characters "Catch the Bakuchu together!", and then, if the color of the star-shaped objects is changed from black to gold, the objects that constitute the expectation indication display will be displayed immediately after the objects that constitute the reserved display and active display are hidden, which may cause confusion between the reserved display and active display and the expectation indication display. In contrast, in the example shown in FIG. 11-36, after the expectation indication display is hidden during the prologue display period, the expectation indication display is hidden during the title display period, and the title characters "Two people, catch a Bakuchu!" are displayed in a fixed position for a predetermined time, and then the expectation indication display is displayed below the title characters "Two people, catch a Bakuchu!", preventing the pending and active displays from being confused with the expectation indication display.

[About the low base strong reach B performance]
FIG. 11-39 is a diagram showing the progression of the image displayed on the image display device 5 when the low base strong reach B performance is executed, and FIG. 11-40 is a timing chart showing the execution status of the low base strong reach B performance.

When the performance control CPU 120 receives the first variable display start command or the second variable display start command in the normal state, and when a fluctuation pattern corresponding to a low base strong super reach B is specified by the fluctuation pattern specification command, if the fluctuation pattern is a fluctuation pattern that develops from a normal reach via a low base weak super reach A or a low base weak super reach B, after executing the normal reach performance, it executes a low base weak reach A performance or a low base weak reach B performance, and develops it into a low base strong reach B performance. Also, when a fluctuation pattern corresponding to a low base strong super reach B is specified by the fluctuation pattern specification command, if the fluctuation pattern is a fluctuation pattern that develops directly from a normal reach, after executing the normal reach performance, it executes a selection performance described below, and develops it into a low base strong reach B performance.

When developing from a low base weak reach A or low base weak reach B performance, the performance control CPU 120 executes a drop performance in which the movable body 32 drops at the end of the low base weak reach A or low base weak reach B performance, and then starts the title display part of the low base strong reach B performance. In the drop performance, as shown in FIG. 11-39 (d1), while maintaining the display of the decorative patterns (small) on the left and right of the reach state, and the hold display and active display in the first hold memory display area 131SG005D, the second hold memory display area 131SG005U, and the active display area 131SG005F, the background at the end of the low base weak reach A or low base weak reach B performance is switched to a background dedicated to the drop performance (a background with a pattern spreading radially from the center), and then the movable body 32 is dropped, and then the movable body 32 is raised to the initial position.

In addition, when a direct progression from a normal reach occurs, the performance control CPU 120 executes the selection performance described below, as shown in FIG. 11-39 (d1'), and then starts the title display part of the low base strong reach B performance. Details of the selection performance will be described later, but when the selection performance starts, the hold display and active display in the first hold memory display area 131SG005D, the second hold memory display area 131SG005U, and the active display area 131SG005F are hidden.

As shown in FIG. 11-40, the title display part of the low base strong reach B performance includes a prologue display period before the title characters "Shingeki Robo Battle" of the low base strong reach B performance are displayed, a title start period from when a part of the title characters "Shingeki Robo Battle" is displayed in the display area of the image display device 5 until they are displayed in their fixed position, a title display period during which the title characters "Shingeki Robo Battle" are displayed in their fixed position, and a title end period until the display of the title characters "Shingeki Robo Battle" that were displayed in their fixed position disappears and switches to the introduction part.

When the performance control CPU 120 transitions to the title display part of the low base strong reach B performance, it first starts displaying the prologue display period.

During the prologue display period of the low base strong reach B effect transitioned from the drop effect, the background dedicated to the drop effect (background with a pattern radiating from the center), the display of the decorative patterns (small) on the left and right of the reach mode, and the reserved and active displays in the first reserved memory display area 131SG005D, the second reserved memory display area 131SG005U, and the active display area 131SG005F are maintained, while the ally character "Yume Yume" is displayed on a layer in front of the background dedicated to the drop effect (background with a pattern radiating from the center), the reserved and active displays, and then the ally character "Yume Yume" is enlarged until the entire display area is filled.

In addition, during the prologue display period of the low base strong reach B effect transitioned from the selection effect, the display of the selection result image of the selection effect (here, the result image of the low base strong reach B effect) and the decorative patterns (small) on the left and right of the reach state are maintained, and the ally character "Yume Yume" is displayed on a layer in front of the selection result screen of the selection effect, and then the ally character "Yume Yume" is enlarged until the entire display area is filled.

After the prologue display period ends, the performance control CPU 120 transitions to the title start period.

As shown in Figure 11-39 (d1) to (d3), during the prologue display period transitioned from the drop effect, the background dedicated to the drop effect (a background with a pattern spreading out radially from the center) that was displayed before the entire display area was filled with the enlarged display of the ally character "Yume Yume" switches to a background dedicated to the title display of the low base strong reach B effect (a background with the ally characters "Jam" and "Nana" and the enemy character "Robo" displayed on the left and right) after the prologue display period ends, and the pending display and active display that were displayed before the entire display area was filled with the enlarged display of the ally character "Yume Yume" are hidden after the prologue display period ends. Note that the display of the decorative patterns (small) on the left and right of the reach mode is maintained even after the prologue display period ends.

Also, although not shown, during the prologue display period transitioned from the selection performance, the selection result image of the selection performance that was displayed before the display area was filled entirely with the enlarged display of the ally character "Yume Yume" switches to a background dedicated to the title display of the low base strong reach B performance (a background in which the ally characters "Jam" and "Nana" and the enemy character "Robo" are displayed on the left and right) after the prologue display period ends. Note that the display of the decorative patterns (small) on the left and right of the reach mode is maintained even after the prologue display period ends, and the pending display and active display that were hidden during the selection performance are maintained as hidden.

During the title start period of the low base strong reach B performance, as shown in Figures 11-39 (d3) to (d4), part of the title characters "Gekishin Robo Battle" are made to appear from the left side of the display area overlapping with the left decorative pattern (small) of the left and right decorative patterns of the reach mode, and then the entire title characters "Gekishin Robo Battle" are moved toward the fixed position and stopped at the fixed position. When the title characters "Gekishin Robo Battle" are stopped at the fixed position, part of the title characters "Gekishin Robo Battle" are displayed overlapping with both the left and right decorative patterns (small) of the reach mode.

The small decorative symbols on the left and right of the reach state will be any number between "1" and "9" ("2" in the figure), but during the title start period of the low base strong reach B performance, whether the small decorative symbols on the left and right of the reach state are any number between "1" and "9", part of the title characters "Gekishin Robo Battle" will appear overlapping with the left small decorative symbol on the left and right of the reach state, and when the title characters "Gekishin Robo Battle" are stationary in a fixed position, part of the title characters "Gekishin Robo Battle" will be displayed overlapping with both the small decorative symbols on the left and right of the reach state.

The CPU 120 for controlling the performance displays the title characters "Gekishin Robo Battle" in a fixed position during the title start period, and then transitions to displaying the title display period. During the title display period of the low base strong reach B performance, first, as shown in FIG. 11-39 (d4), the title characters "Gekishin Robo Battle" are displayed in a fixed position with the expectation indication display hidden for a predetermined time, and during that time, as shown in FIG. 11-40, audio is output from the speakers 8L and 8R to read out the title. Next, as shown in FIG. 11-39 (d5) to (d6), an expectation indication display is displayed below the title characters "Gekishin Robo Battle" in a size smaller than the title characters "Gekishin Robo Battle". As shown in FIG. 11-40, the title display period of the low base strong reach B performance is executed for a longer time than the title start period of the low base strong reach B performance (see FIG. 11-47 and FIG. 11-48).

After the title display period ends, the CPU 120 for controlling the performance transitions to the display of the title end period. In the title end period of the low base strong reach B performance, as shown in FIG. 11-39 (d6) to (d7), the title characters "Gekishin Robo Battle" displayed in the fixed position are moved from the fixed position to the right side of the display area until all of the title characters disappear. In addition, the expectation indication display is also moved to the right side of the display area together with the title characters until all of them disappear. As shown in FIG. 11-40, the title end period of the low base strong reach B performance ends in a shorter time than the title start period and title display period of the low base strong reach B performance (see FIG. 11-47 and FIG. 11-48). In addition, as shown in FIG. 11-40, in the title display part of the low base strong reach B performance, no subtitles of the dialogue are displayed, as in the low base weak reach A performance and the low base weak reach B performance, and no sound of the dialogue is output from the speakers 8L and 8R.

After the title end period ends, the performance control CPU 120 starts the introduction part of the low base strong reach B performance. As shown in FIG. 11-39 (d3) to (d8), the background at the start of the introduction part of the low base strong reach B performance is different from the background dedicated to title display in the title display part (the background where the ally characters "Jam" and "Nana" and the enemy character "Robo" are displayed at the left and right positions), and at the start of the introduction part, it switches from the background dedicated to title display in the title display part to the background at the start of the introduction part of the low base strong reach B performance (the background where the ally characters "Jam" and "Nana" and the enemy character "Robo" confront each other in the town). The introduction part of the low base strong reach B performance starts with a video scene in which the enemy character "Robo" faces forward at a position on the far side as seen from the player, and the ally characters "Jam" and "Nana" face each other with their backs turned at a position on the near side as seen from the player. At this time, both the enemy character "Robo" located at the back as seen by the player, and the ally characters "Jam" and "Nana" located at the front as seen by the player, are displayed in positions that overlap with the fixed positions where the title characters "Shocking Robot Battle" were displayed during the title display period of the title display part. Also, as shown in Figures 11-39 (d8) and 11-40, after the start of the introductory part, a subtitle for the line "I won't lose!" is displayed in accordance with the scene in which the ally characters "Jam" and "Nana" confront the enemy character "Robo", and the sound of the line displayed in the subtitles is output from speakers 8L and 8R.

In this way, in the low base strong reach B performance, during the title display part, audio is output from speakers 8L, 8R reading the title, but subtitles of the lines corresponding to the scene in the title display part are not displayed, and audio of the lines corresponding to the scene in the title display part is not output from speakers 8L, 8R. After the introduction part starts, subtitles of the lines corresponding to the scene in the introduction part are displayed, and audio of the lines corresponding to the scene in the introduction part is output from speakers 8L, 8R.

When a variation pattern that results in a big win after a low base strong super reach B is specified by the variation pattern specification command, the CPU 120 for controlling the performance notifies the user that the ally characters "Jam" and "Nana" win the battle against the enemy character "Robo" at the end of the introductory part, and that the low base strong reach B performance is a big win (the game state is controlled to a big win), and then causes the image display device 5 to display a combination of decorative symbols (large) indicating a big win of the type specified by the variable display result specification command. On the other hand, when a variation pattern that results in a reach miss after a low base strong super reach B is specified by the variation pattern specification command, the CPU 120 notifies the user that the ally characters "Jam" and "Nana" lose the battle against the enemy character "Robo" at the end of the introductory part, and that the low base strong reach B performance is not a big win, and then causes the image display device 5 to display a combination of decorative symbols (large) indicating a reach miss of the type specified by the variable display result specification command.

[About the indication of the expectation of low base strong reach B performance]
In the title display part of the low base strong reach B performance, the expectation suggestion display is displayed on the image display device 5 in a size smaller than the title characters "Severe Shock Robot Battle" along with the title characters "Severe Shock Robot Battle". The expectation suggestion display displayed in the title display part is composed of five star-shaped objects and the characters "Expectation" displayed above the star-shaped objects to indicate that the star-shaped objects indicate the expectation, as shown in Fig. 11-39 (d5), and the number of star-shaped objects whose color has changed from black to gold among the five star-shaped objects suggests the expectation.

In the normal state in which the low base strong reach B performance is executed, an object indicating the number of reserved balls and an object indicating an active display may be displayed on the image display device 5, and if the reserved display, active display, and expectation level indication display are displayed simultaneously in the title display part, there is a risk that the objects constituting the reserved display and active display will be mistaken for objects in the expectation level indication display. For this reason, in the title display part of the low base strong reach B performance in which the expectation level indication display is displayed, the reserved display and active display are not displayed simultaneously with the expectation level indication display, thereby preventing the objects constituting the reserved display and active display from being mistaken for objects in the expectation level indication display.

In addition, in the title display part of the low base strong reach B performance, the pending and active displays are not displayed at the same time as the expectation level suggestion display, so even if the low base strong reach B performance is executed in a situation where a maximum of five objects are displayed as pending and active displays, it is possible to prevent confusion between the objects displayed as pending and active displays and the objects in the expectation level suggestion display, leading to the mistaken belief that the expectation level is at its maximum in the expectation level suggestion display.

Furthermore, in the low base strong reach B performance, the pending display and active display may be hidden from the start of the prologue display period, and even in this configuration, it is possible to prevent the objects constituting the pending display and active display from being mistaken for objects indicating the expectation level.

When the low base strong reach B performance is executed, as shown in Fig. 11-39 (d2) to (d3), the ally character "Yume Yume" is displayed on the background dedicated to the falling performance (background with a pattern spreading out radially from the center) and on a layer in front of the reserved display and active display during the prologue display period, and then the ally character "Yume Yume" is enlarged until the display area is completely filled, and the reserved display and active display that were displayed before the display area was completely filled by the enlarged display of the ally character "Yume Yume" are hidden after the prologue display period ends, so that the reserved display and active display can be hidden without any sense of incongruity. Note that when the low base strong reach B performance is executed, a single-color display performance in which the entire display area is displayed in a single color such as white, except for the decorative pattern (small) of the reach mode, may be executed to erase the reserved display and active display that were displayed before the single-color display performance, and even in such a configuration, the reserved display and active display can be hidden without any sense of incongruity.

In the title display part of the low base strong reach B performance, as shown in FIG. 11-39 (d4), the title characters "Gekishin Robo Battle" are displayed in a fixed position with the expectation indication hidden for a predetermined time, and then, as shown in FIG. 11-39 (d5) to (d6), the expectation indication is displayed below the title characters "Gekishin Robo Battle". At this time, as shown in FIG. 11-39 (d5), in the initial stage, the color of the five star-shaped objects constituting the expectation indication is all displayed in black, and then, as shown in FIG. 11-39 (d6), the color of 3.5 star-shaped objects corresponding to the low base strong reach B performance among the five star-shaped objects is changed from black to gold to suggest the expectation of a jackpot in the low base strong reach B performance. This prevents the pending and active displays from being confused with the expectation indication.

[About the low base strong reach C performance]
As the low base strong reach C performance has many things in common with the aforementioned low base strong reach B performance, a drawing of the low base strong reach C performance will be omitted.

When the performance control CPU 120 receives the first variable display start command or the second variable display start command in the normal state, and when a fluctuation pattern corresponding to a low base strong super reach C is specified by the fluctuation pattern specification command, if the fluctuation pattern is a fluctuation pattern that develops from a normal reach via a low base weak super reach A or a low base weak super reach B, after executing the normal reach performance, it executes a low base weak reach A performance or a low base weak reach B performance, and develops it into a low base strong reach C performance. Also, when a fluctuation pattern corresponding to a low base strong super reach C is specified by the fluctuation pattern specification command, if the fluctuation pattern is a fluctuation pattern that develops directly from a normal reach, after executing the normal reach performance, it executes a selection performance described below, and develops it into a low base strong reach C performance.

When developing from a low base weak reach A or low base weak reach B performance, the performance control CPU 120 executes a drop performance in which the movable body 32 drops at the end of the low base weak reach A or low base weak reach B performance, and then starts the title display part of the low base strong reach C performance. In the drop performance, while maintaining the display of the decorative patterns (small) on the left and right of the reach state, and the hold display and active display in the first hold memory display area 131SG005D, the second hold memory display area 131SG005U, and the active display area 131SG005F, the background at the end of the low base weak reach A or low base weak reach B performance is switched to a background dedicated to the drop performance (a background with a pattern spreading radially from the center), and then the movable body 32 drops, and then the movable body 32 is raised to the initial position.

In addition, when a direct progression from a normal reach occurs, the performance control CPU 120 executes the selection performance described below, and then starts the title display part of the low base strong reach B performance. The details of the selection performance will be described later, but when the selection performance starts, the hold display and active display in the first hold memory display area 131SG005D, the second hold memory display area 131SG005U, and the active display area 131SG005F are hidden.

The title display part of the low base strong reach C performance includes a prologue display period before the title characters "Great Earthquake Robot Battle" of the low base strong reach C performance are displayed, a title start period from when part of the title characters "Great Earthquake Robot Battle" is displayed in the display area of the image display device 5 until they are displayed in their fixed position, a title display period during which the title characters "Great Earthquake Robot Battle" are displayed in their fixed position, and a title end period until the title characters "Great Earthquake Robot Battle" that were displayed in their fixed position disappear and switch to the introductory part.

When the performance control CPU 120 transitions to the title display part of the low base strong reach C performance, it first starts displaying the prologue display period.

During the prologue display period of the low base strong reach C effect transitioned from the drop effect, the background dedicated to the drop effect (background with a pattern radiating from the center), the display of the decorative patterns (small) on the left and right of the reach mode, and the reserved and active displays of the first reserved memory display area 131SG005D, the second reserved memory display area 131SG005U, and the active display area 131SG005F are maintained, while the ally character "Yume Yume" is displayed on a layer in front of the background dedicated to the drop effect (background with a pattern radiating from the center), the reserved and active displays, and then the ally character "Yume Yume" is enlarged until the entire display area is filled.

In addition, during the prologue display period of the low base strong reach C effect transitioned from the selection effect, the display of the selection result image of the selection effect (here, the result image of the low base strong reach C effect) and the decorative patterns (small) on the left and right of the reach state are maintained, and the ally character "Yume Yume" is displayed on a layer in front of the selection result screen of the selection effect, and then the ally character "Yume Yume" is enlarged until the entire display area is filled.

After the prologue display period ends, the performance control CPU 120 transitions to the title start period.

During the prologue display period following the fall effect, the background dedicated to the fall effect (a background with patterns radiating from the center) that was displayed before the entire display area was filled with the enlarged display of the ally character "Yume Yume" switches to the background of the low base strong reach B effect (a background with ally characters "Yume Yume" and "Nana" and enemy character "Dai Robo" displayed on the left and right) after the prologue display period ends, and the pending display and active display that were displayed before the entire display area was filled with the enlarged display of the ally character "Yume Yume" are hidden after the prologue display period ends. Note that the display of the decorative patterns (small) on the left and right of the reach mode is maintained even after the prologue display period ends.

Also, although not shown, during the prologue display period transitioned from the selection performance, the selection result image of the selection performance that was displayed before the display area was filled with the enlarged display of the ally character "Yume Yume" switches to a background dedicated to the title display of the low base strong reach C performance (a background in which the ally characters "Yume Yume" and "Nana" and the enemy character "Dai Robo" are displayed on the left and right) after the prologue display period ends. Note that the display of the decorative patterns (small) on the left and right of the reach mode is maintained even after the prologue display period ends, and the pending display and active display that were hidden during the selection performance are maintained as hidden.

During the title start period of the low base strong reach C performance, part of the title characters "Daishin Robo Battle" appears from the left side of the display area, overlapping with the left decorative pattern (small) of the left and right decorative patterns of the reach mode, and then the entire title characters "Daishin Robo Battle" moves toward its fixed position and stops at the fixed position. When the title characters "Daishin Robo Battle" are stopped at the fixed position, part of the title characters "Daishin Robo Battle" is displayed overlapping with both the left and right decorative patterns (small) of the reach mode.

The small decorative symbols on the left and right of the reach mode will be any number between "1" and "9" ("2" in the illustration), but during the title start period, whether the small decorative symbols on the left and right of the reach mode are any number between "1" and "9," part of the title characters "Dai Gekishin Robo Battle" will appear overlapping with the left small decorative symbol on the left and right of the reach mode, and when the title characters "Dai Gekishin Robo Battle" are stationary in a fixed position, part of the title characters "Dai Gekishin Robo Battle" will be displayed overlapping with both the small decorative symbols on the left and right of the reach mode.

The performance control CPU 120 displays the title characters "Dai Gekishin Robo Battle" in a fixed position during the title start period, and then transitions to displaying the title display period. During the title display period of the low base strong reach C performance, first, the title characters "Dai Gekishin Robo Battle" are displayed in a fixed position with the expectation indication display hidden, and this state is maintained for a predetermined time, during which time audio is output from speakers 8L and 8R reading out the title. Next, an expectation indication display is displayed below the title characters "Dai Gekishin Robo Battle" in a size smaller than the title characters "Dai Gekishin Robo Battle". The title display period of the low base strong reach C performance is executed for a longer time than the title start period of the low base strong reach C performance (see Figures 11-47 and 11-48).

After the title display period ends, the performance control CPU 120 transitions to displaying the title end period. During the title end period of the low base strong reach C performance, the title characters "Great Shock Robot Battle" displayed in the fixed position are moved from their fixed position to the right side of the display area until all of the title characters have disappeared. In addition, the expectation indication display is also moved to the right side of the display area together with the title characters until all of them have disappeared. The title end period of the low base strong reach C performance ends in a shorter time than the title start period and title display period of the low base strong reach C performance (see Figures 11-47 and 11-48). Furthermore, during the title display part of the low base strong reach C performance, no subtitles of the dialogue are displayed, as in the low base weak reach A performance and the low base weak reach B performance, and no sound of the dialogue is output from the speakers 8L and 8R.

After the title end period ends, the performance control CPU 120 starts the introduction part of the low base strong reach C performance. The background at the start of the introduction part of the low base strong reach C performance is different from the background dedicated to the title display in the title display part (the background where the ally characters "Yume Yume" and "Nana" and the enemy character "Dai Robo" are displayed on the left and right), and at the start of the introduction part, it switches from the background dedicated to the title display in the title display part to the background at the start of the introduction part of the low base strong reach C performance (the background where the ally characters "Yume Yume" and "Nana" and the enemy character "Dai Robo" confront each other in the town). The introduction part of the low base strong reach C performance starts with a video scene in which the enemy character "Dai Robo" faces the front on the far side as seen from the player, and the ally characters "Yume Yume" and "Nana" face each other on the near side as seen from the player. At this time, both the enemy character "Big Robo", located at the back as seen by the player, and the ally characters "Yume Yume" and "Nana", located at the front as seen by the player, are displayed in positions that overlap with the fixed positions where the title characters "Great Shock Robot Battle" were displayed during the title display period of the title display part. In addition, after the start of the introductory part, a subtitle for the line "I'll never lose!" is displayed in accordance with the scene in which the ally characters "Yume Yume" and "Nana" confront the enemy character "Big Robo", and the sound of the line displayed in the subtitles is output from speakers 8L and 8R.

In this way, in the low base strong reach C performance, during the title display part, audio is output from speakers 8L, 8R reading the title, but subtitles of the lines corresponding to the scene in the title display part are not displayed, and audio of the lines corresponding to the scene in the title display part is not output from speakers 8L, 8R. After the introduction part starts, subtitles of the lines corresponding to the scene in the introduction part are displayed, and audio of the lines corresponding to the scene in the introduction part is output from speakers 8L, 8R.

When a variation pattern designation command is used to designate a variation pattern resulting in a jackpot after a low base strong super reach C, the CPU 120 notifies the player of the result of the low base strong reach C presentation that the ally characters "Yume Yume" and "Nana" win the battle against the enemy character "Dai Robo" at the end of the introductory part, and that the presentation result is a jackpot (the game state is controlled to be a jackpot), and then causes the image display device 5 to display a combination of decorative symbols (large) indicating a jackpot of the type designated by the variable display result designation command. On the other hand, when a variation pattern designation command is used to designate a jackpot miss after a low base strong super reach C, the CPU 120 notifies the player of the result of the low base strong reach C presentation that the ally characters "Yume Yume" and "Nana" lose the battle against the enemy character "Dai Robo" at the end of the introductory part, and that the presentation result is not a jackpot, and then causes the image display device 5 to display a combination of decorative symbols (large) indicating a jackpot miss of the type designated by the variable display result designation command.

[About the indication of the expectation of low base strong reach C performance]
In the title display part of the low base strong reach C performance, the expectation indication is displayed on the image display device 5 in a size smaller than the title characters "Great Earthquake Robot Battle" along with the title characters "Great Earthquake Robot Battle". The expectation indication displayed in the title display part is composed of five star-shaped objects and the characters "Expectation" displayed above the star-shaped objects to indicate that the star-shaped objects indicate the expectation, and the expectation is indicated by the number of star-shaped objects that have changed color from black to gold among the five star-shaped objects.

In the normal state when the low base strong reach C performance is executed, an object indicating the number of reserved balls and an object indicating an active display may be displayed on the image display device 5, and if the reserved display and active display and the expectation level indication display are displayed simultaneously in the title display part, there is a risk that the objects constituting the reserved display and active display will be mistaken for objects in the expectation level indication display. For this reason, in the title display part of the low base strong reach C performance where the expectation level indication display is displayed, the reserved display and active display are not displayed simultaneously with the expectation level indication display, thereby preventing the objects constituting the reserved display and active display from being mistaken for objects in the expectation level indication display.

In addition, in the title display part of the low base strong reach C performance, the pending and active displays are not displayed at the same time as the expectation suggestion display, so even if the low base strong reach C performance is executed in a situation where a maximum of five objects are displayed as pending and active displays, it is possible to prevent confusion between the objects displayed as pending and active displays and the objects in the expectation suggestion display, leading to a mistaken belief that the expectation is at its maximum in the expectation suggestion display.

Furthermore, in the low base strong reach C performance, the pending display and active display may be hidden from the start of the prologue display period, and even in this configuration, it is possible to prevent the objects constituting the pending display and active display from being mistaken for objects indicating the expectation level.

When the low base strong reach B performance is executed, the ally character "Yume Yume" is displayed on a background dedicated to the falling performance (a background with a pattern spreading out radially from the center) and on a layer in front of the reserved display and active display during the prologue display period, and then the ally character "Yume Yume" is enlarged until the entire display area is filled, and the reserved display and active display that were displayed before the display area was filled by the enlarged display of the ally character "Yume Yume" are hidden after the prologue display period ends, so that the reserved display and active display can be hidden without any sense of incongruity. When the low base strong reach C performance is executed, a monochrome display performance can be executed in which the entire display area is displayed in a monochrome color such as white, except for the decorative pattern (small) of the reach mode, etc., to erase the reserved display and active display that were displayed before the monochrome display performance, and even in this configuration, the reserved display and active display can be hidden without any sense of incongruity.

In the title display part of the low base strong reach C performance, the title characters "Dai Gekishin Robo Battle" are displayed in a fixed position for a predetermined time with the expectation indication hidden, and then the expectation indication is displayed below the title characters "Dai Gekishin Robo Battle". At this time, in the initial stage, the color of the five star-shaped objects that make up the expectation indication is all displayed in black, and then the color of four of the five star-shaped objects that correspond to the low base strong reach C performance is changed from black to gold, suggesting the expectation of a jackpot in the low base strong reach C performance. This prevents the pending and active displays from being confused with the expectation indication.

[About the Low Base Strongest Reach Production]
FIG. 11-41 is a diagram showing a transition of the image displayed on the image display device 5 when the low-base strongest reach presentation is executed, and FIG. 11-42 is a timing chart showing the execution status of the low-base strongest reach presentation.

When the performance control CPU 120 receives the first variable display start command or the second variable display start command in the normal state, and when a fluctuation pattern corresponding to a low base strongest super reach is specified by the fluctuation pattern specification command, if the fluctuation pattern is a fluctuation pattern that develops from a normal reach via a low base weak super reach A or a low base weak super reach B, after executing the normal reach performance, it executes a low base weak reach A performance or a low base weak reach B performance, and develops it into a low base strongest reach performance. Also, when a fluctuation pattern corresponding to a low base strongest super reach is specified by the fluctuation pattern specification command, if the fluctuation pattern is a fluctuation pattern that develops directly from a normal reach, after executing the normal reach performance, it executes a selection performance described below, and develops it into a low base strongest reach performance.

When developing from a low base weak reach A or low base weak reach B performance, the performance control CPU 120 executes a drop performance in which the movable body 32 drops at the end of the low base weak reach A or low base weak reach B performance, and then starts the title display part of the low base strongest reach performance. In the drop performance, as shown in FIG. 11-41 (e1), while maintaining the display of the decorative patterns (small) on the left and right of the reach state, and the hold display and active display in the first hold memory display area 131SG005D, the second hold memory display area 131SG005U, and the active display area 131SG005F, the background at the end of the low base weak reach A or low base weak reach B performance is switched to a background dedicated to the drop performance (a background with a pattern spreading radially from the center), and then the movable body 32 is dropped, and then the movable body 32 is raised to the initial position.

In addition, when a direct progression from a normal reach occurs, the performance control CPU 120 executes the selection performance described below, as shown in FIG. 11-41 (e1'), and then starts the title display part of the low-base strongest reach performance. Details of the selection performance will be described later, but when the selection performance starts, the hold display and active display in the first hold memory display area 131SG005D, the second hold memory display area 131SG005U, and the active display area 131SG005F are hidden.

As shown in FIG. 11-42, the title display part of the low-base strongest reach performance includes a title start period from when part of the title characters "Six people, catch a Bakuchu!" of the low-base strongest reach performance is displayed in the display area of the image display device 5 until they are displayed in their fixed position, a title display period during which the title characters "Six people, catch a Bakuchu!" are displayed in their fixed position, and a title end period from when the title characters "Six people, catch a Bakuchu!" that were displayed in their fixed position disappear and switch to the introduction part.

When the performance control CPU 120 transitions to the title display part of the low-base strongest reach performance, it first starts displaying the title start period.

During the title start period of the low-base strongest reach performance, as shown in FIG. 11-41 (e3), the display of the left and right decorative symbols (small) of the reach mode is maintained, and the title characters "Catch the Bakuchu with 6 people!" are displayed in an expanded size where only a part of the characters is visible in the display area. At this time, the display area is displayed in such a manner that the entire display area is filled with a part of the title characters "Catch the Bakuchu with 6 people!". In addition, the part of the title characters "Catch the Bakuchu with 6 people!" displayed in the display area appears in such a manner that it overlaps with both the left and right decorative symbols (small) of the reach mode. After that, as shown in FIG. 11-41 (e4), the title characters "Catch the Bakuchu with 6 people!" are gradually reduced in size, and the title characters "Catch the Bakuchu with 6 people!", which have been reduced in size so that all of the characters of the title characters "Catch the Bakuchu with 6 people!" are visible in the display area, are stopped in their fixed position. When the title text "Six people, catch the Bakuchu!" is reduced in size and stationary in a fixed position, a portion of the title text "Six people, catch the Bakuchu!" for the low base strongest reach effect is displayed overlapping with both of the small decorative patterns on the left and right of the reach effect.

The small decorative symbols on the left and right of the reach mode will be any number between "1" and "9" ("2" in the figure), but during the title start period of the low base strongest reach performance, whether the small decorative symbols on the left and right of the reach mode are any number between "1" and "9", the enlarged title text "Catch the Bakuchu with Six People!" will appear overlapping with both the small decorative symbols on the left and right of the reach mode, and the reduced title text "Catch the Bakuchu with Six People!" that is stationary in the fixed position will be displayed with a portion of it overlapping with both the small decorative symbols on the left and right of the reach mode.

As shown in Figures 11-41 (e1) to (e4), during the title start period transitioned from the falling effect, the background dedicated to the falling effect (a background with a pattern spreading radially from the center) that was displayed before the entire display area was filled with part of the enlarged-sized title characters "Six people, catch a Bakuchu!" is switched to a background dedicated to the title display of the low-base strongest reach effect (a background in which six friendly characters and the enemy character "Bakuchu" are displayed on the left and right), while the display area is filled with part of the enlarged-sized title characters "Six people, catch a Bakuchu!", and when the title characters "Six people, catch a Bakuchu!" are reduced in size and stationary in their fixed positions, the background dedicated to the title display of the low-base strongest reach effect is displayed as its background. Also, during the title start period that transitions from the falling effect, the pending display and active display that were displayed before the display area was filled with part of the enlarged title text "Catch the Bakuchu with six people!" are hidden while the display area is filled with part of the enlarged title text "Catch the Bakuchu with six people!". Note that the display of the decorative patterns (small) on the left and right of the reach mode is maintained even after the title start period ends.

In addition, during the title start period transitioned from the selection performance, the selection result image (here, the title image of the low-base strongest reach performance) of the selection performance that was displayed before the display area was completely filled with part of the enlarged-sized title text "Catch a Bakuchu with six people!" is switched to a background dedicated to the title display of the low-base strongest reach performance (a background in which six friendly characters and the enemy character "Bakuchu" are displayed on the left and right) while the display area is completely filled with part of the enlarged-sized title text "Catch a Bakuchu with six people!", and when the title text "Catch a Bakuchu with six people!" is stationary in a fixed position in a reduced size, the background dedicated to the title display of the low-base strongest reach performance is displayed as its background. Note that the display of the decorative patterns (small) on the left and right of the reach mode is maintained even after the end of the title start period, and the reserved display and active display that were hidden during the selection performance are maintained as hidden.

The CPU 120 for controlling the performance displays the title characters "Catch the Bakuchu with six people!" in a reduced size at a fixed position during the title start period, and then transitions to displaying the title display period. During the title display period of the low-base strongest reach performance, first, as shown in FIG. 11-41 (e4), the title characters "Catch the Bakuchu with six people!" are displayed at a fixed position with the expectation indication display hidden for a predetermined time, and during that time, as shown in FIG. 11-42, a voice reading the title is output from the speakers 8L and 8R. Next, as shown in FIG. 11-41 (e5) to (e6), an expectation indication display is displayed below the title characters "Catch the Bakuchu with six people!" in a size smaller than the title characters "Catch the Bakuchu with six people!". As shown in FIG. 11-42, the title display period of the low-base strongest reach performance is executed for a longer time than the title start period of the low-base strongest reach performance (see FIG. 11-47 and FIG. 11-48).

After the title display period ends, the performance control CPU 120 transitions to displaying the title end period. During the title end period of the low-base strongest reach performance, as shown in FIG. 11-41 (e6) to (e7), the title characters "Catch a Bakuchu with Six People!", which are displayed in a reduced size and at a fixed position, are enlarged until the entire display area is filled with parts of the title characters "Catch a Bakuchu with Six People!". At this time, the title characters "Catch a Bakuchu with Six People!" are not enlarged in the opposite manner to when the title characters "Catch a Bakuchu with Six People!" are displayed in a reduced size during the title start period, but are enlarged in a manner different from the opposite manner to when the title characters "Catch a Bakuchu with Six People!" are displayed in a reduced size during the title start period until the entire display area is filled with parts of the title characters "Catch a Bakuchu with Six People!". That is, the path that each part of the title character follows as the title character "Catch the Bakuchu with six people!" shrinks during the title start period is different from the path that each part of the title character follows as the title character "Catch the Bakuchu with six people!" expands during the title end period. Therefore, the display area is completely filled with parts of the title character "Catch the Bakuchu with six people!" in a manner different from the manner in which the display area is completely filled at the start of the title start period. As shown in FIG. 11-42, the title end period of the low base strongest reach effect ends in a shorter time than the title start period and title display period of the low base strongest reach effect (see FIG. 11-47 and FIG. 11-48). Also, as shown in FIG. 11-42, in the title display part of the low base strongest reach effect, subtitles of the dialogue are not displayed like the low base weak reach A effect and the low base weak reach B effect, and the dialogue is not output from speakers 8L and 8R.

After the title end period ends, the performance control CPU 120 starts the introductory part of the low base strongest reach performance. As shown in FIG. 11-41 (e4) to (e8), the background at the start of the introductory part of the low base strongest reach performance (a background in which six ally characters chase the enemy character "Bakuchu" in the city) is different from the background dedicated to title display in the title display part (a background in which six ally characters and the enemy character "Bakuchu" are displayed on the left and right), and after the title end period ends and the background dedicated to title display is completely filled with part of the title characters "Catch Bakuchu with six people!" during the title end period, it switches to the background at the start of the introductory part of the low base strongest reach performance. The introductory part of the low base strongest reach performance starts with a video scene in which six ally characters chase the enemy character "Bakuchu". Also, as shown in FIG. 11-41 (e8) and FIG. 11-42, after the introductory part starts, a subtitle is displayed with the line "Try and catch him if you can!" in response to the scene in which six friendly characters chase the enemy character "Bakuchu", and the voice of the line displayed in the subtitles is output from speakers 8L and 8R.

In this way, in the low base strongest reach performance, during the title display part, audio is output from speakers 8L, 8R reading the title, but subtitles of the lines corresponding to the scene in the title display part are not displayed, and audio of the lines corresponding to the scene in the title display part is not output from speakers 8L, 8R. After the introduction part starts, subtitles of the lines corresponding to the scene in the introduction part are displayed, and audio of the lines corresponding to the scene in the introduction part is output from speakers 8L, 8R.

When a variation pattern that results in a jackpot after a low-base strongest super reach is specified by the variation pattern specification command, the CPU 120 for controlling the performance notifies the player that the six ally characters catch the enemy character "Bakuchu" at the end of the introductory part and that the low-base strongest reach performance is a jackpot (the game is controlled to a jackpot game state) as a result of the performance, and then causes the image display device 5 to display a combination of decorative symbols (large) indicating a jackpot of the type specified by the variable display result specification command. On the other hand, when a variation pattern that results in a reach miss after a low-base strongest super reach is specified by the variation pattern specification command, the CPU 120 notifies the player that the six ally characters cannot catch the enemy character "Bakuchu" at the end of the introductory part and that the low-base strongest reach performance is not a jackpot as a result of the performance, and then causes the image display device 5 to display a combination of decorative symbols (large) indicating a reach miss of the type specified by the variable display result specification command.

[About the indication of the expectation of the strongest low-base reach performance]
In the title display part of the low-base strongest reach performance, the image display device 5 displays the title text "Catch the explosive chuu with six people!" along with an expectation suggestion display in a size smaller than the title text "Catch the explosive chuu with six people!". The expectation suggestion display displayed in the title display part is composed of five star-shaped objects and the text "Expectation" displayed above the star-shaped objects to indicate that the star-shaped objects indicate the expectation, as shown in Fig. 11-41 (e6), and the expectation suggestion display is indicated by the number of star-shaped objects whose color has changed from black to gold among the five star-shaped objects.

In the normal state in which the low-base strongest reach performance is executed, an object indicating the number of reserved balls and an object indicating an active display may be displayed on the image display device 5, and if the reserved and active displays and the expectation level indication display are displayed simultaneously in the title display part, there is a risk that the objects constituting the reserved and active displays will be mistaken for objects in the expectation level indication display. For this reason, in the title display part of the low-base strongest reach performance in which the expectation level indication display is displayed, the reserved and active displays are not displayed simultaneously with the expectation level indication display, thereby preventing the objects constituting the reserved and active displays from being mistaken for objects in the expectation level indication display.

In addition, in the title display part of the low-base strongest reach performance, the pending and active displays are not displayed at the same time as the expectation indication, so even if the low-base strongest reach performance is executed in a situation where a maximum of five objects are displayed as pending and active displays, it is possible to prevent confusion between the objects displayed as pending and active displays and the objects in the expectation indication display, leading to a mistaken belief that the expectation indication display shows the highest expectation.

When the low-base strongest reach performance is executed, as shown in FIG. 11-41 (e2) to (e4), the title text "Catch the Bakuchu with 6 people!" is displayed in an enlarged size in which only a portion of the text is visible in the display area during the title start period, and then the size is reduced so that all the text is visible in the display area. When the background dedicated to the title display of the low-base strongest reach performance is displayed, the reserved display and active display that were displayed before the title start period are hidden, so that the reserved display and active display can be hidden without any sense of incongruity. Note that when the low-base strongest reach performance is executed, a monochrome display performance in which the entire display area is displayed in a monochrome color such as white, except for the decorative pattern (small) of the reach mode, may be executed to erase the reserved display and active display that were displayed before the monochrome display performance, and even in this configuration, the reserved display and active display can be hidden without any sense of incongruity.

In the title display part of the low-base strongest reach performance, as shown in FIG. 11-41(e4), the title text "Catch the Bakuchu with 6 people!" is displayed in a fixed position for a predetermined time with the expectation indication hidden, and then, as shown in FIG. 11-41(e5) to (e6), the expectation indication is displayed below the title text "Catch the Bakuchu with 6 people!". At this time, as shown in FIG. 11-41(e5), in the initial stage, the color of the five star-shaped objects that make up the expectation indication is all displayed in black, and then, as shown in FIG. 11-41(e6), the color of 4.5 star-shaped objects that correspond to the low-base strongest reach performance among the five star-shaped objects is changed from black to gold, suggesting the expectation of a jackpot in the low-base strongest reach performance. This prevents the pending and active displays from being confused with the expectation indication.

[Variations of the title display part]
Figure 11-43 is a diagram showing the transition of images in modified title display parts of low base strong reach A performance, low base strong reach B performance, low base strong reach C performance, and low base strongest reach performance.

When the performance control CPU 120 transitions to the title display part of the corresponding Super Reach performance, it first executes a blackout performance in which the entire display area is displayed in black, except for the display of the decorative patterns (small) on the left and right of the Reach state, as shown in FIG. 11-43 (f1). If the pending display and active display were displayed before the execution of the blackout performance, the pending display and active display are hidden when the blackout performance begins.

After the blackout effect continues for a predetermined period of time, the effect control CPU 120 displays an expectation indication (an expectation indication for the low-base strongest reach effect in FIG. 11-43(f2)) while maintaining the background of the entire display area in black, as shown in FIG. 11-43(f2).

Next, the performance control CPU 120 maintains the state in which the background of the entire display area is displayed in black and the expectation indication display is displayed for a predetermined period of time, and displays the title character of the corresponding super reach performance (the title character of the low-base strongest reach performance in Fig. 11-43 (f3) (f5)) in a fixed position and in a size larger than the expectation indication display, as shown in Fig. 11-43 (f3) (f5).

When the title letters of the corresponding Super Reach performance are displayed in their fixed positions, a portion of the title letters is displayed overlapping both the left and right decorative symbols (small) of the Reach mode. The left and right decorative symbols (small) of the Reach mode will be any of the numbers "1" to "9" ("2" in the figure), but even if the left and right decorative symbols (small) of the Reach mode are any of the numbers "1" to "9," when the title letters of the corresponding Super Reach performance are displayed in their fixed positions, a portion of the title letters is displayed overlapping both the left and right decorative symbols (small) of the Reach mode.

In addition, the title characters are displayed in one of the two modes, a white mode (FIG. 11-43 (f3)) or a red mode (FIG. 11-43 (f5)). Whether the title characters are displayed in white mode or red mode is determined in the variable display preview performance determination process of step 131SGS609 described above. In the variable display preview performance determination process, when a variable pattern including the execution of a low base strong reach A performance, a low base strong reach B performance, a low base strong reach C performance, and a low base strongest reach performance is specified, it is determined whether the title characters are displayed in white mode or red mode with a probability according to whether or not there is a jackpot, and it is determined whether the title characters are displayed in white mode or red mode with a probability that the rate of a jackpot when the title characters are displayed in red mode is higher than the rate of a jackpot when the title characters are displayed in white mode. Therefore, when the title characters are displayed in red during the title display part of the corresponding Super Reach performance, the expectation of a jackpot is higher than when the title characters are displayed in white.

Next, the performance control CPU 120 displays the expectation indication display and the title characters of the corresponding Super Reach performance, and then, as shown in Figure 11-43 (f4) (f6), while maintaining the display of the expectation indication display and the title characters of the corresponding Super Reach performance, displays a background corresponding to the title display part of the corresponding Super Reach performance, and outputs audio reading the title from speakers 8L, 8R. Meanwhile, in the title display part, no subtitles of the dialogue are displayed, as in the low base weak reach A performance and the low base weak reach B performance, and no audio of the dialogue is output from speakers 8L, 8R. Also, in the title display part, the title characters are displayed for a longer period of time than the time until the title characters are displayed after the start of the blackout performance (see Figures 11-47 and 11-48).

Then, the performance control CPU 120 transitions to the title end period. Note that the control of the title end period is the same as for each of the super reach performances described above, so a description of it will be omitted here.

In this modified version of the title display part, the title text of the corresponding Super Reach performance is larger than the expectation indication display, and the expectation level is indicated by whether it is white or red, which attracts the player's attention. However, by displaying the expectation indication display before the title text, the player's attention can be drawn to the expectation indication first.

Also, as shown in FIG. 11-43 (f2), whether the title characters are displayed in white or red, if the type of super reach presentation is the same, the expectation level indication is displayed in the same manner. This allows the player to pay attention to whether the title characters are displayed in white or red after the expectation level indication is displayed.

[About high base reach A to D performance]
Fig. 11-44 is a diagram showing the transition of the image displayed on the image display device 5 when the high base reach A to D effects are being executed, and Fig. 11-44 is a timing chart showing the execution status of the high base reach A to D effects. Note that the high base reach A to D effects are common except for the types of enemy characters that appear, the title name, and the expectation level suggested by the expectation level suggestion display, so here we will explain the high base reach A effect and omit the explanation of the high base reach B to D effects.

The performance control CPU 120 receives the first variable display start command or the second variable display start command in the time-saving state A or the probability variable state, and when a variation pattern corresponding to a high base super reach A is specified by the variation pattern specification command, it starts varying the decorative pattern (large), and executes a normal reach performance in which the decorative pattern (large) of the type specified by the variable display result specification command is stopped at the "left" and "right" decorative pattern display areas 5L and 5R of the image display device 5 at a predetermined timing to create a reach state, as shown in FIG. 11-44 (g2). Then, the title display part of the high base reach A performance is started.

As shown in FIG. 11-45, the title display part of the high base reach A performance includes a title start period from when a part of the title characters "Battle Reach A" of the high base reach A performance is displayed in the display area of the image display device 5 until they are displayed in their fixed position, a title display period during which the title characters "Battle Reach A" are displayed in their fixed position, and a title end period from when the title characters "Battle Reach A" that were displayed in their fixed position disappear and switch to the introduction part.

When the performance control CPU 120 transitions to the title display part of the high base reach A performance, it first starts displaying the title start period.

During the title start period of the high base reach A performance, as shown in FIG. 11-44 (g2), the display of the decorative patterns (small) on the left and right of the reach state is maintained, and the title characters "Battle Reach A" are displayed at an enlarged size such that only a portion of the characters is visible in the display area. At this time, the display area is displayed in such a manner that the entire display area is filled with a portion of the title characters "Battle Reach A". In addition, the portion of the title characters "Battle Reach A" that is displayed in the display area appears overlapping with both the decorative patterns (small) on the left and right of the reach state. After that, as shown in FIG. 11-44 (g3), the title characters "Battle Reach A" are gradually reduced in size, and the title characters "Battle Reach A", which have now been reduced to a size where all of the characters of the title characters "Battle Reach A" are visible in the display area, are stopped in a fixed position. When the title letters "Battle Reach A" are reduced in size and stationary in a fixed position, a portion of the title letters "Battle Reach A" is displayed overlapping both of the small decorative patterns on the left and right of the reach state.

The small decorative symbols on the left and right of the reach state will be any number between "1" and "9" ("2" in the figure), but during the title start period of the high base reach A performance, whether the small decorative symbols on the left and right of the reach state are any number between "1" and "9", the title letters "Battle Reach A" that appear in an enlarged size will appear overlapping with both the small decorative symbols on the left and right of the reach state, and the title letters "Battle Reach A" that are displayed in a reduced size while stationary in a fixed position will be displayed with part of them overlapping with both the small decorative symbols on the left and right of the reach state.

As shown in Figures 11-44 (g1) to (g3), the background (night sky background) during the change of the decorative pattern (large) in the time-saving state A or the probability change state that was displayed before the entire display area was filled with a portion of the enlarged-sized title characters "Battle Reach A" is switched to a background dedicated to the title display of the high base reach A performance (a background in which the ally character "Yume Yume" and the enemy character "Masked Man" are displayed on the left and right) while the entire display area is filled with a portion of the enlarged-sized title characters "Battle Reach A", and when the title characters "Battle Reach A" are stationary in a fixed position at a reduced size, a background dedicated to the title display of the high base reach A performance is displayed as its background. In addition, the pending display and active display that were displayed before the entire display area was filled with a portion of the enlarged-sized title characters "Battle Reach A" are hidden while the entire display area is filled with a portion of the enlarged-sized title characters "Battle Reach A". Furthermore, the display of the small decorative symbols on the left and right of the reach state will remain even after the title start period ends.

The CPU 120 for controlling the performance displays the title characters "Battle Reach A" in a reduced size at a fixed position during the title start period, and then transitions to displaying the title display period. During the title display period of the high base reach A performance, first, as shown in FIG. 11-44 (g3), the title characters "Battle Reach A" are displayed at a fixed position with the expectation indication hidden for a predetermined time, and during that time, as shown in FIG. 11-45, audio is output from the speakers 8L and 8R to read out the title. Next, as shown in FIG. 11-44 (g4) to (g5), an expectation indication is displayed below the title characters "Battle Reach A" in a size smaller than the title characters "Battle Reach A". As shown in FIG. 11-45, the title display period of the high base reach A performance is executed for a longer time than the title start period of the high base reach A performance (see FIG. 11-47 and FIG. 11-48).

After the title display period ends, the performance control CPU 120 transitions to the display of the title end period. In the title end period of the high base reach A performance, as shown in Figures 11-44 (g5) to (g6), the title characters "Battle Reach A", which are displayed in a reduced size at a fixed position, are enlarged until the entire display area is filled with parts of the title characters "Battle Reach A". At this time, the title characters "Battle Reach A" are not enlarged in the opposite manner to when the title characters "Battle Reach A" are displayed in a reduced size during the title start period, but are enlarged in a manner different from the opposite manner to when the title characters "Battle Reach A" are displayed in a reduced size during the title start period until the entire display area is filled with parts of the title characters "Battle Reach A". In other words, the trajectory that each part of the title characters follows as the title characters "Battle Reach A" shrink during the title start period is different from the trajectory that each part of the title characters follows as the title characters "Battle Reach A" expand during the title end period. Therefore, the entire display area is filled with part of the title characters "Battle Reach A" in a manner different from the manner in which the entire display area is filled at the start of the title start period. As shown in FIG. 11-45, the title end period of the high base reach A effect ends in a time shorter than the title start period and title display period of the high base reach A effect (see FIG. 11-47 and FIG. 11-48). Also, as shown in FIG. 11-45, in the title display part of the high base reach A effect, no subtitles of the dialogue are displayed, as in the low base weak reach A effect and the low base weak reach B effect, and no sound of the dialogue is output from speakers 8L and 8R.

After the title end period ends, the performance control CPU 120 starts the introductory part of the high base reach A performance. As shown in FIG. 11-44 (g3) to (g7), the background at the start of the introductory part of the high base reach A performance (the background where the ally character "Yume Yume" and the enemy character "Masked Man" are fighting) is different from the background dedicated to title display in the title display part (the background where the ally character "Yume Yume" and the enemy character "Masked Man" are displayed on the left and right), and after the title end period ends and the background dedicated to title display is completely filled with part of the title characters "Battle Reach A" during the title end period, it switches to the background at the start of the introductory part of the high base reach A performance. The introductory part of the high base reach A performance starts with a video scene where the ally character "Yume Yume" and the enemy character "Masked Man" are fighting. Also, as shown in FIG. 11-44 (g7) and FIG. 11-45, after the introductory part starts, a subtitle for the line "Fight!" is displayed in response to the scene in which the friendly character "Yume Yume" and the enemy character "Masked Man" are fighting, and the voice of the line displayed in the subtitles is output from speakers 8L and 8R.

In this way, in the high bass reach A performance, during the title display part, audio of the title being read out is output from speakers 8L, 8R, but subtitles of the dialogue corresponding to the scene in the title display part are not displayed, and audio of the dialogue corresponding to the scene in the title display part is not output from speakers 8L, 8R. After the introduction part starts, subtitles of the dialogue corresponding to the scene in the introduction part are displayed, and audio of the dialogue corresponding to the scene in the introduction part is output from speakers 8L, 8R.

When a variation pattern designation command is used to designate a variation pattern resulting in a jackpot after a high base super reach A, the CPU 120 for controlling the performance notifies the user that the ally character "Yume Yume" wins the fight against the enemy character "Masked Man" at the end of the introductory part, and that the performance result of the high base reach A performance is a jackpot (the game state is controlled to be a jackpot), and then causes the image display device 5 to display a combination of decorative symbols (large) indicating a jackpot of the type designated by the variable display result designation command. On the other hand, when a variation pattern designation command is used to designate a jackpot miss after a high base super reach A, the CPU 120 notifies the user that the ally character "Yume Yume" loses to the enemy character "Masked Man" at the end of the introductory part, and that the performance result of the high base reach A performance is not a jackpot, and then causes the image display device 5 to display a combination of decorative symbols (large) indicating a jackpot miss of the type designated by the variable display result designation command.

[About the indication of the expectation of high base reach A to D performance]
The expectation suggestion displays for the high base reach A to D effects are all common to all, except for the degree of expectation suggested by the expectation suggestion display. Therefore, here we will explain the expectation suggestion display for the high base reach A effect, and omit the explanation of the expectation suggestion displays for the high base reach B to D effects.

In the title display part of the high base reach A performance, the image display device 5 displays the title characters "Battle Reach A" along with an expectation indication in a smaller size than the title characters "Battle Reach A". As shown in FIG. 11-44 (g5), the expectation indication displayed in the title display part is composed of five star-shaped objects and the characters "Expectation" displayed above the star-shaped objects to indicate that the star-shaped objects indicate the expectation, and the expectation is indicated by the number of star-shaped objects that have changed color from black to gold among the five star-shaped objects.

In the time-saving state A or the probability bonus state in which the high base reach A performance is executed, an object indicating the number of reserved balls and an object indicating an active display may be displayed on the image display device 5, and if the reserved display and active display and the expectation level indication display are displayed simultaneously in the title display part, there is a risk that the objects constituting the reserved display and active display will be mistaken for objects in the expectation level indication display. For this reason, in the title display part of the high base reach A performance in which the expectation level indication display is displayed, the reserved display and active display are not displayed simultaneously with the expectation level indication display, thereby preventing the objects constituting the reserved display and active display from being mistaken for objects in the expectation level indication display.

In addition, since the game ball almost never enters the first start winning hole in the time-saving state A or the probability change state, when the number of reserved balls in the second special chart is at its maximum (four) and is being displayed variably, a maximum of five objects may be displayed as reserved and active displays, which matches the number of objects indicating that the expectation level is at its maximum in the expectation level indication display. However, in the title display part of the high base reach A performance, the reserved and active displays are not displayed at the same time as the expectation level indication display, so even if the high base reach A performance is executed in a situation where a maximum of five objects are displayed as reserved and active displays, it is possible to prevent the objects displayed as reserved and active displays from being confused with the objects in the expectation level indication display, and the expectation level being mistakenly recognized as being at its maximum in the expectation level indication display.

When the high base reach A performance is executed, as shown in Figures 11-44 (g1) to (g3), the title characters "Battle Reach A" are displayed in an enlarged size in which only a portion of the characters are visible in the display area during the title start period, and then reduced in size so that all characters are visible in the display area. When the background dedicated to the title display of the high base reach A performance is displayed, the pending display and active display that were displayed before the title start period are hidden, so that the pending display and active display can be hidden without any sense of incongruity. When the high base reach A performance is executed, a monochrome display performance can be executed in which the entire display area is displayed in a monochrome color such as white, except for the decorative pattern (small) of the reach mode, etc., to erase the pending display and active display that were displayed before the monochrome display performance. Even in this configuration, the pending display and active display can be hidden without any sense of incongruity.

In the title display part of the high base reach A performance, as shown in FIG. 11-44(g3), the title characters "Battle Reach A" are displayed in a fixed position with the expectation indication hidden for a predetermined time, and then, as shown in FIG. 11-44(g4) to (g5), the expectation indication is displayed below the title characters "Battle Reach A". At this time, as shown in FIG. 11-44(g4), in the initial stage, the color of the five star-shaped objects constituting the expectation indication is all displayed in black, and then, as shown in FIG. 11-44(g5), the color of three of the five star-shaped objects corresponding to the high base reach A performance (3.5 for the high base reach B performance, 4 for the high base reach C performance, and 4.5 for the high base reach D performance) is changed from black to gold, suggesting the expectation of a jackpot in the high base reach A performance. This prevents confusion between the pending and active displays and the expectation level indication.

[Title text display position]
FIG. 11-46 is a diagram showing the position where the title characters are displayed in the display area of the image display device 5. As shown in FIG.

As shown in Figures 11-46 (A) and (B), the image display device 5 has a rectangular display area 5L, but since the game board 2 is placed in front of it, the visible area in the display area 5L of the image display device 5 is the area that is visible through the opening 24 formed in the game board 2, that is, the area that is not covered by the components that make up the game board 2.

As described above, the performance control CPU 120 displays the title characters "Catch the Bakuchu!" in a fixed position during the title display period of the title display part of the low base weak reach A performance. In this case, the fixed position where the title characters "Catch the Bakuchu!" are displayed is a position where the title characters "Catch the Bakuchu!" overlap with the intersection of diagonal lines of the display area 5L of the image display device 5, as shown in FIG. 11-46(A), and a position where the title characters overlap with the intersection of diagonal lines of the visible square area 5S, which is the largest rectangular area within the visible area of the image display device 5 that is not obstructed by components of the game board 2, as shown in FIG. 11-46(B).

Similarly, the title text of the low base weak reach B effect is "Electric Hockey Showdown", the title text of the low base strong reach A effect is "Two people should catch the explosive chu!," the title text of the low base strong reach B effect is "Shocking Robot Battle," the title text of the low base strong reach C effect is "Super Shocking Robot Battle," the title text of the low base strongest reach effect is "Six people should catch the explosive chu!," the title text of the high base reach A effect is "Battle Reach A," the title text of the high base reach B effect is "Battle Reach B," and the title text of the high base reach C effect is " For both the title characters of the "Battle Reach C" and the title characters of the high base reach D performance "Battle Reach D," the fixed position at which the title characters are displayed during the title display period is a position where the title characters overlap with the intersection of diagonal lines of the display area 5L of the image display device 5, as shown in FIG. 11-46(A), and a position where the title characters overlap with the intersection of diagonal lines of the visible square area 5S, which is the largest rectangular area within the visible area of the image display device 5 that is not obstructed by components of the game board 2, as shown in FIG. 11-46(B).

Design changes are often made to gaming machines during the development stage, and a change in the design of the gaming board 2 may change the area of the display area 5L of the image display device 5 that is covered by the components that make up the gaming board 2, changing the visible area of the display area 5L. Also, gaming machines installed in gaming establishments may be taken back, refurbished, and resold, and in such cases, a change in the design of the gaming board 2 may change the area of the display area 5L of the image display device 5 that is covered by the components that make up the gaming board 2, changing the visible area of the display area 5L. In such cases, if the position of the title characters in the super reach performance is determined based on the display area 5L of the image display device 5, there is a risk that the display position of the title characters may deviate significantly from the center of the visible area.

In contrast to this, in this embodiment, in the title display part of any Super Reach performance, the fixed position where the title characters are displayed during the title display period is a position where the title characters overlap with the intersection of the diagonals of the display area 5L of the image display device 5, and also overlap with the intersection of the diagonals of the visible square area 5S, which is the largest rectangular area within the visible area of the image display device 5 that is not obstructed by components of the game board 2. Therefore, the title characters displayed at the fixed position during the title display period are displayed at a position where they overlap with both the intersection of the diagonals of the display area 5L and the intersection of the diagonals of the visible square area 5S. This prevents the display position of the title characters from deviating significantly from the center of the visible area even if the design of the game board 2 is changed due to design changes or when the game machine is reused.

[Super Reach performance duration]
FIG. 11-47 is a diagram showing the presentation time of each Super Reach performance, and FIG. 11-48 is a diagram showing one form of the relationship between the presentation times of each Super Reach performance.

As shown in Figure 11-47, the overall presentation time of the low base weak reach A presentation (the time from when the title display part starts to when the introductory part ends) is T1-1, the presentation time of the title display part is Tt1, of which the presentation time of the title start period is Tt1a, the presentation time of the title display period is Tt1b, and the presentation time of the title end period is Tt1c.

The overall presentation time of the low base weak reach B presentation is T1-2, the presentation time of the title display part is Tt1, of which the presentation time of the title start period is Tt1a, the presentation time of the title display period is Tt1b, and the presentation time of the title end period is Tt1c.

Note that while the overall presentation times for the low base weak reach A and low base weak reach B presentations are different, the presentation time for the title display part, the presentation time for the title start period, the presentation time for the title display period, and the presentation time for the title end period are all the same.

As shown in Figure 11-47, the overall presentation time of the low base strong reach A presentation is T2-1, the presentation time of the title display part is Tt2, of which the presentation time of the title start period is Tt2a, the presentation time of the title display period is Tt2b, and the presentation time of the title end period is Tt2c.

The overall presentation time of the low base strong reach B presentation is T2-2, the presentation time of the title display part is Tt2, of which the presentation time of the title start period is Tt2a, the presentation time of the title display period is Tt2b, and the presentation time of the title end period is Tt2c.

The overall presentation time of the low base strong reach C presentation is T2-3, the presentation time of the title display part is Tt2, of which the presentation time of the title start period is Tt2a, the presentation time of the title display period is Tt2b, and the presentation time of the title end period is Tt2c.

Note that the overall presentation times for the low base strong reach A performance, low base strong reach B performance, and low base strong reach C performance are different, but the presentation time for the title display part, the presentation time for the title start period, the presentation time for the title display period, and the presentation time for the title end period are all the same.

The overall presentation time of the low base strongest reach presentation is T3, the presentation time of the title display part is Tt3, of which the presentation time of the title start period is Tt3a, the presentation time of the title display period is Tt3b, and the presentation time of the title end period is Tt3c.

The overall presentation time for all high base reach presentations A to D is T4, the presentation time for all title display parts is Tt4, of which the presentation time for all title start periods is Tt4a, the presentation time for all title display periods is Tt4b, and the presentation time for all title end periods is Tt4c.

Comparing the overall presentation time of the super reach effects during the low base (normal state) in this embodiment, as shown in FIG. 11-48 (A), the overall presentation time (T2-1, T2-2, T2-3) of the low base strong reach A effects, low base strong reach B effects, and low base strong reach C effects, which have a higher jackpot expectation than the low base weak reach A effects and low base weak reach B effects, is longer than the overall presentation time (T1-1, T1-2) of the low base weak reach A effects and low base weak reach B effects, and the overall presentation time (T3) of the low base strongest reach effect, which has a higher jackpot expectation than the low base strong reach A effects, low base strong reach B effects, and low base weak reach C effects, is set longer than the overall presentation time (T2-1, T2-2, T2-3) of the low base strong reach A effects, low base strong reach B effects, and low base weak reach C effects.

In addition, of the low base weak reach A performance and the low base weak reach B performance, the low base weak reach B performance, which has a higher expectation of developing into other super reach performances than the low base weak reach A performance, is set to be longer than the overall performance time (T1-1) of the low base weak reach A performance. In addition, the overall presentation time (T2-3) of the low base strong reach C presentation, which has a higher jackpot expectation than the low base strong reach A presentation and the low base strong reach B presentation, among the low base strong reach A presentation, low base strong reach B presentation, is longer than the overall presentation time (T2-1, T2-2) of the low base strong reach A presentation and the low base strong reach B presentation, and the overall presentation time (T2-2) of the low base strong reach B presentation, which has a higher jackpot expectation than the low base strong reach A presentation, among the low base strong reach A presentation and the low base strong reach B presentation, is set longer than the overall presentation time (T2-1) of the low base strong reach A presentation.

When comparing the presentation times of the title start period, title display period, and title end period in the title display part in this embodiment, as shown in FIG. 11-48 (B), in all super reach presentations (low base weak reach A, B presentations, low base strong reach A-C presentations, low base strongest reach presentations, high base reach A-D presentations), the presentation time of the title display period (Tt1b/Tt2b/Tt3b/Tt4b) is longer than the presentation time of the title start period (Tt1a/Tt2a/Tt3a/Tt4a) and the presentation time of the title end period (Tt1c/Tt2c/Tt3c/Tt4c), and the presentation time of the title start period (Tt1a/Tt2a/Tt3a/Tt4a) is set longer than the presentation time of the title end period (Tt1c/Tt2c/Tt3c/Tt4c).

When comparing the presentation time of the title display part in the super reach performance in this embodiment, as shown in Figure 11-48 (C), the presentation time (Tt2) of the title display part of the low base strong reach A performance, low base strong reach B performance, and low base strong reach C performance, which have a higher expectation of a jackpot than the low base weak reach A performance and low base weak reach B performance, is longer than the presentation time (Tt1) of the title display part of the low base weak reach A performance and low base weak reach B performance, and the presentation time (Tt3) of the title display part of the low base strongest reach performance, which has a higher expectation of a jackpot than the low base strong reach A performance, low base strong reach performance B, and low base weak reach C performance, is set longer than the presentation time (Tt2) of the title display part of the low base strong reach A performance, low base strong reach B performance, and low base strong reach C performance. In addition, the presentation time (Tt4) of the title display part of the high base reach A to D effects is set shorter than the presentation time (Tt1, Tt2, Tt3) of the title display part of the low base weak reach A and B effects, the low base strong reach A to C effects, and the low base strongest reach effect.

In this embodiment, when comparing the presentation time of the title start period and the title display period in the low base strongest reach presentation and the high base reach A to D presentation, as shown in Figure 11-48 (D), the presentation time (Tt3a) of the title start period in the low base strongest reach presentation is set longer than the presentation time (Tt4a) of the title start period in the high base reach A to D presentation, and as shown in Figure 11-48 (E), the presentation time (Tt3b) of the title display period in the low base strongest reach presentation is set longer than the presentation time (Tt4b) of the title display period in the high base reach A to D presentation.

In this embodiment, when comparing the presentation times of the title start periods of super reach effects (low base weak reach A, B effects, low base strong reach A-C effects, low base strongest reach effect) during a low base (normal state), as shown in FIG. 11-48 (F), the presentation time (Tt2a) of the title start periods of the low base strong reach A effects, low base strong reach B effects, and low base strong reach C effects, which have a higher expectation of a jackpot than the low base weak reach A effects and low base weak reach B effects, is longer than the presentation time (Tt1a) of the title start periods of the low base weak reach A effects and low base weak reach B effects, and the presentation time (Tt3a) of the title start period of the low base strongest reach effect, which has a higher expectation of a jackpot than the low base strong reach A effects, low base strong reach effect B, and low base weak reach C effects, is set longer than the presentation time (Tt2a) of the title start periods of the low base strong reach A effects, low base strong reach B effects, and low base strong reach C effects.

In this embodiment, when comparing the presentation time of the title display period in super reach effects (low base weak reach A, B effects, low base strong reach A-C effects, low base strongest reach effect) during a low base (normal state), as shown in FIG. 11-48 (G), the presentation time (Tt2b) of the title display period of the low base strong reach A effect, low base strong reach B effect, and low base strong reach C effect, which have a higher expectation of a jackpot than the low base weak reach A effect and low base weak reach B effect, is longer than the presentation time (Tt1b) of the title display period of the low base weak reach A effect and low base weak reach B effect, and the presentation time (Tt3b) of the title display period of the low base strongest reach effect, which has a higher expectation of a jackpot than the low base strong reach A effect, low base strong reach effect B, and low base weak reach C effect, is set longer than the presentation time (Tt2b) of the title display period of the low base strong reach A effect, low base strong reach B effect, and low base strong reach C effect.

In this embodiment, when comparing the presentation time of the title end period in super reach effects (low base weak reach A, B effects, low base strong reach A-C effects, low base strongest reach effect) during a low base (normal state), as shown in FIG. 11-48 (H), the presentation time (Tt2c) of the title end period of the low base strong reach A effect, low base strong reach B effect, and low base strong reach C effect, which have a higher expectation of a jackpot than the low base weak reach A effect and low base weak reach B effect, is longer than the presentation time (Tt1c) of the title end period of the low base weak reach A effect and low base weak reach B effect, and the presentation time (Tt3c) of the title end period of the low base strongest reach effect, which has a higher expectation of a jackpot than the low base strong reach A effect, low base strong reach effect B, and low base weak reach C effect, is set longer than the presentation time (Tt2c) of the title end period of the low base strong reach A effect, low base strong reach B effect, and low base strong reach C effect.

In this form, when comparing the presentation time of the text display period of the title display part (the period in the title display part that does not include the prologue period described later, which is the period that combines the title start period, title display period, and title end period) in the super reach presentation (low base weak reach A, B presentation, low base strong reach A-C presentation, low base strongest reach presentation) during a low base (normal state), as shown in Figure 11-48 (I), the low base strong reach A presentation has a higher expectation of a jackpot than the low base weak reach A presentation and the low base weak reach B presentation. The presentation time (Tt2d) of the text display period of the low base strong reach B effect and the low base strong reach C effect is longer than the presentation time (Tt1d) of the text display period of the low base weak reach A effect and the low base weak reach B effect, and the presentation time (Tt3d) of the text display period of the low base strongest reach effect, which has a higher expectation of a jackpot than the low base strong reach A effect, the low base strong reach B effect and the low base weak reach C effect, is set longer than the presentation time (Tt2d) of the text display period of the low base strong reach A effect, the low base strong reach B effect and the low base strong reach C effect.

In this embodiment, when comparing the presentation time of the title start period and the title display period in the super reach performance (low base weak reach A, B performance, low base strong reach A-C performance, low base strongest reach performance) during a low base (normal state), as shown in Figure 11-48 (J) (K), in all the super reach performances (low base weak reach A, B performance, low base strong reach A-C performance, low base strongest reach performance) during a low base (normal state), the presentation time of the title display period (Tt1b/Tt2b/Tt3b) is longer than the presentation time of the title start period (Tt1a/Tt2a/Tt3a), and the presentation time of the title start period (Tt1a/Tt2a/Tt3a) is set longer than the presentation time of the title end period (Tt1c/Tt2c/Tt3c).

In this embodiment, when comparing the overall presentation time of the super reach effects (low base weak reach A, B effects, low base strong reach A-C effects, low base strongest reach effects) during a low base (normal state) with the super reach effects (high base reach A-D effects) during a high base (time-saving state A and special probability state), as shown in Figure 11-48 (L), the overall presentation time (T4) of the super reach effects (high base reach A-D effects) during a high base (time-saving state A and special probability state) is set shorter than the overall presentation time (T1-1, T1-2, T2-1, T2-3, T3) of the super reach effects (low base weak reach A, B effects, low base strong reach A-C effects, low base strongest reach effects) during a low base (normal state).

[About the title text of the Super Reach performance]
FIG. 11-49 is a diagram showing one form of the relationship between the title characters and decorative patterns in the title display part in the super reach performance.

As shown in Figure 11-49 (A), the title text of the low base weak reach A performance is "Catch the Bakuchu!", the number of characters in the title is 10, the font size of the title characters (standard size per character) is FJ, and the size of the display area in which the title characters are displayed (the size of the area including all the title characters) is EJA.

The title text of the low base weak reach B performance is "Bilibili Hockey Showdown", the title has 10 characters, the font size of the title text is FJ, and the size of the display area in which the title text is displayed is EJB.

The title text of the low base strong reach A performance is "Catch the Bakuchu together!", the title has 13 characters, the font size of the title text is FK, and the size of the display area in which the title text is displayed is EKA.

The title of the low base strong reach B performance is "Shocking Robot Battle", the title has 7 characters, the font size of the title is FK, and the size of the display area in which the title is displayed is EKB.

The title text of the low base strong reach C performance is "Great Shock Robot Battle", the title has 8 characters, the font size of the title text is FK, and the size of the display area in which the title text is displayed is EKC.

The title text of the low base strongest reach performance is "Catch the Bakuchu with 6 people!", the title has 13 characters, the font size of the title text is FSK, and the size of the display area in which the title text is displayed is ESK.

Also, as shown in Figure 11-49 (A), the font size of the decorative pattern (large) before the development into the Super Reach performance is KD, and the font size of the decorative pattern (small) after the development into the Super Reach performance is KS.

Comparing the font sizes of the title characters in this embodiment, as shown in FIG. 11-49 (B), the font size FK of the title characters in the low base strong reach A effects, low base strong reach B effects, and low base strong reach C effects, which have a higher expectation of a jackpot than the low base weak reach A effects and low base weak reach B effects, is larger than the font size FJ of the title characters in the low base weak reach A effects and low base weak reach B effects. Furthermore, the size of the smallest character among the characters that make up the title characters in the low base strong reach A effects, low base strong reach B effects, and low base strong reach C effects is larger than the size of the largest character among the characters that make up the title characters in the low base weak reach A effects and low base weak reach B effects.

In addition, the font size FSK of the title characters of the low base strongest reach effect, which has a higher expectation of a jackpot than the low base strong reach A effect, the low base strong reach B effect, and the low base weak reach C effect, is a larger font size than the font size FK of the title characters of the low base strong reach A effect, the low base strong reach B effect, and the low base strong reach C effect. In addition, the size of the smallest character among the characters that make up the title characters of the low base strongest reach effect is a larger size than the size of the largest character among the characters that make up the title characters of the low base strong reach A effect, the low base strong reach B effect, and the low base strong reach C effect.

Also, as shown in Figure 11-49 (B), the font size FJ of the title characters in the low base weak reach A performance and the low base weak reach B performance, the font size FK of the title characters in the low base strong reach A performance, the low base strong reach B performance and the low base strong reach C performance, and the font size FSK of the title characters in the low base strongest reach performance are all smaller than the font size KD of the decorative pattern (large) before the development into a super reach performance, and larger than the font size KS of the decorative pattern (small) after the development into a super reach performance. Furthermore, the size of the largest character among the characters that make up the title characters of the low base weak reach A performance and the low base weak reach B performance, the size of the largest character among the characters that make up the title characters of the low base strong reach A performance, the low base strong reach B performance, and the size of the largest character among the characters that make up the title characters of the low base strongest reach performance are all smaller than the size of the smallest character that can be used by the decorative pattern (large) before the performance develops into a super reach performance, and the size of the smallest character among the characters that make up the title characters of the low base weak reach A performance and the low base weak reach B performance, the size of the smallest character among the characters that make up the title characters of the low base strong reach A performance, the low base strong reach B performance, and the size of the smallest character among the characters that make up the title characters of the low base strongest reach performance are all larger than the size of the largest character among the characters that can be used by the decorative pattern (small) after the performance develops into a super reach performance.

Comparing the display area sizes of the title characters in this embodiment, as shown in FIG. 11-49 (C), the display area sizes EKA, EKB, and EKC of the title characters of the low base strong reach A effects, low base strong reach B effects, and low base strong reach C effects, which have a higher expectation of a jackpot than the low base weak reach A effects and low base weak reach B effects, are larger than the display area sizes EJA and EJB of the title characters of the low base weak reach A effects and low base weak reach B effects, and the display area size ESK of the title characters of the low base strongest reach effects, which have a higher expectation of a jackpot than the low base strong reach A effects, low base strong reach B effects, and low base weak reach C effects, is larger than the display area sizes EKA, EKB, and EKC of the title characters of the low base strong reach A effects, low base strong reach B effects, and low base weak reach C effects.

[About the expected level indication]
FIG. 11-50 is a diagram showing the execution status of the expectation level indication display in the title display part of the super reach performance.

As shown in FIG. 11-50(A), the expectation level indication displayed in the title display section is composed of five star-shaped objects and the word "expectation level" displayed above the star-shaped objects to indicate that the star-shaped objects indicate the expectation level, and the expectation level is indicated by the number of star-shaped objects that have changed color from black to gold among the five star-shaped objects.

When the CPU 120 for controlling the performance performs an expectation indication display, as shown in FIG. 11-50(A), it first displays five star-shaped objects in black and displays the word "Expectation" to indicate that the star-shaped objects indicate the expectation, and then causes the star-shaped objects that are to change from black to gold to change in color in stages from black to gold, starting from the left. Also, when the CPU 120 for controlling the performance changes a star-shaped object from black to gold, it highlights the corresponding star-shaped object and then changes it to its normal gold display.

At this time, as shown in FIG. 11-50(B), the performance control CPU 120 enlarges the star-shaped object that changes color, changes its color to white so that it shines from the center toward the periphery, changes the entire enlarged object to white until the outline disappears, and then displays the star-shaped object with the entire object or half of it changed to gold. In particular, the second and third star-shaped objects are enlarged to a size where part of the enlarged star-shaped object overlaps with part of the text "Expectation" to indicate that the star-shaped object indicates the expectation. The performance control CPU 120 also highlights in a common manner whether changing the entire star-shaped object from a black color to gold or changing half of the star-shaped object to gold.

Also, as shown in FIG. 11-50(A), when changing multiple star-shaped objects to gold, the performance control CPU 120 starts highlighting the star-shaped object one spot away at the timing (t1) before the highlighting of the star-shaped object that was started to be highlighted earlier ends and the object returns to normal display. On the other hand, the performance control CPU 120 does not start highlighting the star-shaped object two spots away until the highlighting of the star-shaped object that was started to be highlighted earlier ends at the timing (t2), and starts highlighting the star-shaped object two spots away at the timing (t2) when the highlighting of the star-shaped object that was started to be highlighted earlier ends. In other words, the highlighting of two adjacent star-shaped objects overlaps, but three star-shaped objects are not highlighted simultaneously and overlapping each other.

In addition, as shown in FIG. 11-50(A), the performance control CPU 120 outputs an expectation level indication sound from speakers 8L, 8R at the timing when the highlighting of a star-shaped object begins, and when multiple star-shaped objects are changed to gold, ends the output of the expectation level indication sound associated with the highlighting of the star-shaped object that was previously started to be highlighted before the highlighting of the next star-shaped object begins, so that the sound is not output overlapping with the expectation level indication sound associated with the highlighting of the next star-shaped object.

[About selection effects]
Fig. 11-51 is a diagram showing the execution status of the selection effect. The selection effect is an effect that specifies which type of super reach effect will be executed when the low base strong reach A to C effect or the low base strongest reach effect is executed directly from the normal reach effect without going through the low base weak reach A effect or the low base weak reach B effect.

When a selection effect is executed, the effect control CPU 120 executes a normal reach effect as shown in FIG. 11-51 (h1), and then displays a window in the display area of the image display device 5 as shown in FIG. 11-51 (h2), and displays the title of the selection effect in the window. The title of the selection effect displays the message "Upgrade your reach!", suggesting that a selection effect will be executed.

Then, as shown in Fig. 11-51 (h2) to (h8), the performance control CPU 120 displays in the window a title image of the super reach performance, and an operation prompt image consisting of a button image imitating the push button 31B and the operation prompt text "Continuous tap!" to encourage continuous operation of the push button 31B. The title image of the super reach performance is an image with the same content as the display content during the title display period in the title display part of each super reach performance, and the title images of the low base strong reach performances A to C and the low base strongest reach performance also display an indication of the expectation level.

The performance control CPU 120 first displays, as the title image of the Super Reach performance displayed in the window, the title image of the low base weak reach A performance, which has a jackpot expectation rate of 0 and the lowest expectation rate of development into other Super Reach performances, and each time an operation of the number of times push button 31B corresponding to the title image of the displayed Super Reach performance is detected, it switches to the title image of the next Super Reach performance until it becomes the title image of the Super Reach performance corresponding to the type of fluctuation pattern specified by the fluctuation pattern specification command.

As shown in Figure 11-51 (h2) to (h8), the title images of the Super Reach effects displayed in the window are switched in the following order: a title image of the low base weak reach A effect, which has the lowest expectation of development into other Super Reach effects, followed by a title image of the low base weak reach B effect, which has a higher expectation of development into other Super Reach effects than the low base weak reach A effect, a title image of the low base strong reach A effect, which has a higher expectation of a jackpot than the low base weak reach A and B effects, a title image of the low base strong reach B effect, which has a higher expectation of a jackpot than the low base strong reach A effect, a title image of the low base strong reach C effect, which has a higher expectation of a jackpot than the low base strong reach B effect, and a title image of the low base strongest reach effect, which has a higher expectation of a jackpot than the low base strong reach C effect.

Then, when the title image of the super reach performance that corresponds to the type of fluctuation pattern specified by the fluctuation pattern specification command appears, the performance control CPU 120 detects the operation of the number of times push button 31B that corresponds to the title image of the displayed super reach performance, and displays a confirmation image in which the operation prompt image disappears and only the title image of the super reach performance is displayed in the window, as shown in Figure 11-51 (h9), notifies the player that the super reach performance of the displayed title image will be executed, and then transitions to the title display part of that super reach performance.

As shown in FIG. 11-52, the number of times that the push button 3B is operated to switch from the title image of the low base weak reach A effect to the title image of the low base weak reach B effect is 3, the number of times that the push button 31B is operated to switch from the title image of the low base weak reach B effect to the title image of the low base strong reach A effect is 4, the number of times that the push button 31B is operated to switch from the title image of the low base strong reach A effect to the title image of the low base strong reach B effect is 8, and the number of times that the push button 31B is operated to switch from the title image of the low base strong reach B effect to the title image of the low base strong The number of times the push button 31B is operated to switch to the title image of the reach C effect is 10, and the number of times the push button 31B is operated to switch from the title image of the low base strong reach C effect to the title image of the low base strongest reach effect is 15, and the higher the developmental attitude of the super reach effect of the switching title image to other super reach effects or the higher the expectation of a jackpot, the more times the push button 31B needs to be operated to switch to the next title image, and the more times the push button 31B needs to be operated.

Also, as shown in Figure 11-52, when a selection effect is executed, the low base weak reach A and B effects will never be executed, and a super reach effect with a jackpot expectation level equal to or higher than the low base strong reach A effect will always be executed, with the rate at which the low base strong reach A effect is executed being approximately 32.18%, the rate at which the low base strong reach B effect is executed being approximately 30.16%, the rate at which the low base strong reach C effect is executed being approximately 30.30%, and the rate at which the low base strongest reach effect is executed being approximately 7.36%.

The performance control CPU 120 also displays an expectation indication in the title images of the low base strong reach A-C performances and the low base strongest reach performance in the selection performance, similar to the title display part. However, the expectation indication in the title display part displays five star-shaped objects in black, and the multiple star-shaped objects that change from black to gold change from black to gold in stages in order from the left, whereas the expectation indication displayed in the selection performance displays the number of star-shaped objects that indicate the expectation of the corresponding super reach performance out of the five star-shaped objects in gold from the start.

The minimum time required for the title image of the Super Reach effect displayed in the selection effect to switch to the title image of the next Super Reach effect is the time obtained by multiplying the number of times corresponding to the title image of the Super Reach effect by the time required for one operation of the push button 31B. The time required for one operation of the push button 31B is approximately 80 ms, and when switching from the title image of the low base weak reach A effect to the title image of the low base weak reach B effect, the push button 31B must be operated three times, and the minimum time required in this case is approximately 240 ms.

Meanwhile, the time it takes for the star-shaped object in the expectation suggestion display in the title display part to change from black to highlighted and then to gold, i.e., the time it takes for the suggested expectation level to change by one step, is approximately 300 ms, which is set longer than the minimum time it takes to switch from the title image of the low base weak reach A performance to the title image of the low base weak reach B performance. For this reason, the performance control CPU 120 is able to switch the title image of the low base weak reach A performance to the title image of the low base weak reach B performance in a selection performance in a time shorter than the time it takes for the expected level suggested in the expectation suggestion display in the title display part to change by one step.

[About effects that can be performed during variable display]
FIG. 11-53 is a diagram showing effects that can be executed during variable display. As shown in FIG. 11-53, the effects that can be executed during variable display include an explanatory text display effect, a title color change effect, and operation prompt effects A to D.

The explanatory text display effect is an effect that can be executed during the prologue display period in the title display part of the low base strong reach A to C effects, and is an effect that displays explanatory text that suggests that there is a high chance of a jackpot.

The title color change effect is an effect that can be executed during the title display period in the title display part of the low base weak reach A and B effects, and is an effect that changes the color of the title letters from the initial white to red or gold.

Operation prompting effect A is an effect that can be executed in a normal reach effect, and displays an operation prompting image that prompts the operation of push button 31B, and notifies the player whether or not the effect will progress to a low base weak reach A effect or B effect depending on the operation of push button 31B. Note that operation prompting effect A may be configured to progress not only to a low base weak reach A effect or B effect, but also to a low base strong reach A to C effect or a low base strongest reach effect depending on the operation of push button 31B.

Operation prompting effect B is an effect that can be executed at the end of the introductory part of the low base weak reach A and B effects, and displays an operation prompting image (small) or operation prompting image (large) that prompts the operation of push button 31B, and notifies the player whether or not the effect will develop into one of the low base strong reach A to C effects depending on the operation of push button 31B. Note that in a configuration in which the low base weak reach A and B effects are notified that a jackpot will be reached as a result of the effect, operation prompting effect B may be configured to notify the player of the result of the effect, whether or not a jackpot has been reached, depending on the operation of push button 31B.

Operation prompting effect C is an effect that can be executed in the middle of the introductory part of the low base strong reach A to C effects and the strongest reach effect, and displays an operation prompting image that prompts the operation of the push button 31B, and displays one of multiple types of cut-in images depending on the operation of the push button 31B.

Operation prompting effect D is an effect that can be executed at the end of the introductory part of the low base weak reach A and B effects, and displays an operation prompting image (small) or an operation prompting image (large) that prompts the user to operate the push button 31B, and notifies the user of the result of the effect, whether or not a jackpot has been reached, depending on the operation of the push button 31B.

The performance control CPU 120 determines in the preview performance determination process of the variable display start setting process whether or not to execute an explanatory text display performance during the variable display, whether or not to execute a title color change performance and to which color to change, whether or not to execute operation prompting performance A, whether or not to display either an operation prompting image (small) or an operation prompting image (large) in operation prompting performance B, whether or not to execute operation prompting performance C and whether or not to display either a cut-in image (A) or a cut-in image (B), and whether or not to display either an operation prompting image (small) or an operation prompting image (large) in operation prompting performance D.

As shown in FIG. 11-54(A), in the advance notice performance determination process, when a variation pattern in which the low base strong reach A to C performances are executed is identified, it is determined whether or not to execute the explanatory text display performance. At this time, when a variation pattern in which the performance result is a miss is identified, non-execution is determined 80% of the time, and execution is determined 20% of the time. Also, when a variation pattern in which the performance result is a jackpot is identified, non-execution is determined 20% of the time, and execution is determined 80% of the time. In this way, when a variation pattern in which the performance result is a jackpot is identified, execution of the explanatory text display performance is determined at a higher rate than when a variation pattern in which a miss is identified, so that the execution of the explanatory text display performance during the prologue display period in the title display part of the low base strong reach A to C performance suggests that there is a high possibility of a jackpot.

In this embodiment, the explanatory text display performance is executed during the prologue display period in the title display part, and the execution time of the low base strong reach A-C performance and the execution time of the title display part do not change regardless of whether the explanatory text display performance is executed in the title display part of the low base strong reach A-C performance. However, the low base strong reach A-C performance may be executed in a first fluctuation pattern and a second fluctuation pattern with a longer fluctuation time than the first fluctuation pattern as a fluctuation pattern, and when the first fluctuation pattern is specified, the explanatory text display performance is not executed, and when the second fluctuation pattern is specified, the explanatory text display performance is executed using a fluctuation time set longer than the first fluctuation pattern. In such a configuration, whether or not to execute the explanatory text display performance is not determined in the preview performance determination process, but whether or not to execute the explanatory text display performance is determined depending on whether the first fluctuation pattern or the second fluctuation pattern is specified. In this case, the first and second variation patterns are determined so that when the explanatory text display effect is executed, the likelihood of a jackpot is higher than when the explanatory text display effect is not executed, and the execution of the explanatory text display effect in the title display part of the low base strong reach A to C effects suggests that there is a high likelihood of a jackpot.

As shown in Figure 11-54 (B), in the preview performance decision process, when a fluctuation pattern in which a low base weak reach A or B performance is executed is identified, it is decided whether or not to execute a title color change performance, and if so, what color to change to if a title color change performance is executed. At this time, when a fluctuation pattern in which the performance result is a miss is identified, non-execution (white) is decided 80% of the time, execution (red) is decided 20% of the time, and execution (gold) is not decided. Also, when a fluctuation pattern that develops into a low base strong reach A to C performance or a low base strongest reach performance is identified, non-execution (white) is decided 20% of the time, execution (red) is decided 75% of the time, and execution (gold) is decided 5% of the time. In this way, when a fluctuation pattern that develops into a low base strong reach A-C performance or a low base strongest reach performance is identified, the execution of the title color change performance is decided at a higher rate than when a fluctuation pattern that results in a miss is identified, so the change in color of the title letters in the title display part of the low base strong reach A and B performance suggests that there is a high possibility of development into a low base strong reach A-C performance or a low base strongest reach performance. Also, since execution (gold) is decided only when a fluctuation pattern that develops into a low base strong reach A-C performance or a low base strongest reach performance is identified, the change in color of the title letters to gold in the title display part of the low base strong reach A and B performance confirms that it will develop into a low base strong reach A-C performance or a low base strongest reach performance.

In addition, in a configuration that includes a fluctuation pattern that results in a jackpot without developing into another super reach effect after the execution of the low base weak reach A or B effect, when a fluctuation pattern that results in a jackpot is identified, the execution of the title color change effect is decided at a higher rate than when a fluctuation pattern that results in a miss is identified, and the color of the title letters in the title display part of the low base strong reach A or B effect may change to indicate the high possibility of a jackpot. Also, in such a configuration, execution (gold) may be decided only when a fluctuation pattern that results in a jackpot is identified, and the color of the title letters in the title display part of the low base strong reach A or B effect may change to gold to confirm a jackpot.

As shown in FIG. 11-54(C), in the advance notice performance determination process, if a fluctuation pattern that results in a miss from the normal reach performance or a fluctuation pattern that develops from the normal reach performance to a low base weak reach A or B performance is identified, a decision is made as to whether or not to execute operation prompt performance A. At this time, if a fluctuation pattern that results in a miss is identified, non-execution is decided 50% of the time, and execution is decided 50% of the time. Also, if a fluctuation pattern that develops into a low base weak reach A or B performance is identified, execution is decided 100% of the time. In this way, execution is always decided when a fluctuation pattern that develops into a low base weak reach A or B performance is identified, and execution may also be decided when a fluctuation pattern that results in a miss is identified, so the execution of operation prompt performance A in a normal reach performance suggests the possibility of development into a low base weak reach A or B performance.

As shown in FIG. 11-54 (D), in the preview performance determination process, if a variation pattern is identified in which the performance result of a low base weak reach A, B performance is a miss, or a variation pattern in which a low base weak reach A, B performance develops into a low base strong reach A-C performance or a low base strongest reach performance, it is determined whether to display an operation prompt image (small) or an operation prompt image (large). At this time, if a variation pattern in which the performance result is a miss is identified, an operation prompt image (small) is determined 90% of the time, and an operation prompt image (large) is determined 10% of the time. Also, if a variation pattern in which the performance develops into a low base strong reach A-C performance or a low base strongest reach performance is identified, an operation prompt image (small) is determined 10% of the time, and an operation prompt image (large) is determined 90% of the time. In this way, when a fluctuation pattern that develops into a low base strong reach A-C performance or a low base strongest reach performance is identified, the operation prompting image (large) is determined out of the operation prompting image (small) and operation prompting image (large) at a higher rate than when a fluctuation pattern that results in a miss is identified, suggesting that when an operation prompting image (large) is displayed in operation prompting performance B at the end of the introductory part of a low base weak reach A, B performance, there is a higher possibility of it developing into a low base strong reach A-C performance or a low base strongest reach performance than when an operation prompting image (small) is displayed.

As shown in FIG. 11-54 (E), in the advance notice performance determination process, when a fluctuation pattern in which a low base strong reach A to C performance or a low base strongest reach performance is executed is identified, it is determined whether or not to execute operation prompt performance C, and if operation prompt performance C is executed, whether to display cut-in image (A) or cut-in image (B). At this time, when a fluctuation pattern in which the performance result is a miss is identified, non-execution is determined with a 50% probability, execution (cut-in image (A)) is determined with a 30% probability, and execution (cut-in image (B)) is determined with a 20% probability. Also, when a fluctuation pattern in which the performance result is a jackpot is identified, non-execution is determined with a 5% probability, execution (cut-in image (A)) is determined with a 30% probability, and execution (cut-in image (B)) is determined with a 65% probability. In this way, when a variation pattern that results in a jackpot is identified, the operation prompting performance C is executed at a higher rate than when a variation pattern that results in a miss is identified, so that the possibility of a jackpot is suggested by the execution of the operation prompting performance C at the end of the introductory part of the low base strong reach A to C performance. Also, when a variation pattern that results in a jackpot is identified, the cut-in image (B) out of the cut-in image (A) and the cut-in image (B) is displayed at a higher rate than when a variation pattern that results in a miss is identified, so that the operation prompting performance C is executed at the end of the introductory part of the low base strong reach A to C performance, so that the possibility of a jackpot is suggested to be higher when the cut-in image (B) is displayed than when the cut-in image (A) is displayed.

As shown in FIG. 11-54 (F), in the advance notice performance determination process, when a variation pattern in which a low base strong reach A to C performance or a low base strongest reach performance is executed is identified, it is determined whether to display an operation prompt image (small) or an operation prompt image (large). At this time, when a variation pattern in which the performance result is a miss is identified, an operation prompt image (small) is determined 90% of the time, and an operation prompt image (large) is determined 10% of the time. Also, when a variation pattern in which the performance result is a jackpot is identified, an operation prompt image (small) is determined 10% of the time, and an operation prompt image (large) is determined 90% of the time. In this way, when a fluctuation pattern that results in a jackpot is identified, the operation prompting image (large) is determined at a higher rate than when a fluctuation pattern that results in a miss is identified. Therefore, when an operation prompting image (large) is displayed in operation prompting image D at the end of the introductory part of the low base strong reach A-C effects and the low base strongest reach effect, it is suggested that there is a higher possibility of a jackpot than when an operation prompting image (small) is displayed.

[About the explanatory text display]
FIG. 11-55 is a diagram showing the display status of the explanatory text displayed in the explanatory text display performance, and FIG. 11-56 is a timing chart showing the display status of the explanatory text displayed in the explanatory text display performance.

During the prologue display period of the title display part in the low base strong reach A to C performances, the performance control CPU 120 displays the ally character "Yume Yume" as shown in Figures 11-55 (A) to (I), and then enlarges and displays the ally character "Yume Yume" until the entire display area is filled. When performing an explanatory text display performance during the prologue display period, the CPU 120 displays the explanatory text "Surprise!", "Peach tree", and "Great luck!" in order, which make up the explanatory text, on a layer in front of the background that is enlarged and displayed by the ally character "Yume Yume". At this time, the performance control CPU 120 first displays the explanatory text "Surprise!" while moving it from the right side of the display area toward the center at high speed in a leftward direction (Fig. 11-56 (t1)) as shown in Fig. 11-55 (A), and then, when it reaches the center, displays it while moving it slowly in a leftward direction (Fig. 11-56 (t2)) as shown in Fig. 11-55 (B), and then, after that, displays it while moving it again quickly in a leftward direction until it disappears from the display area as shown in Fig. 11-55 (C) (Fig. 11-56 (t3)).

Next, the performance control CPU 120 displays the explanatory text "peach tree" by moving it from the right side of the display area toward the center in a high-speed leftward direction (FIG. 11-56 (t4)), as shown in FIG. 11-55 (D), and when it reaches near the center, by moving it in a low-speed leftward direction (FIG. 11-56 (t5)), as shown in FIG. 11-55 (E), and then, by moving it again in a high-speed leftward direction until it disappears from the display area, as shown in FIG. 11-55 (F) (FIG. 11-56 (t6)).

Next, the performance control CPU 120 displays the explanatory text "Super Lucky!" while moving it from the right side of the display area toward the center at high speed in a leftward direction (Fig. 11-56 (t7)) as shown in Fig. 11-55 (G), and when it reaches the center, displays it while moving it slowly in a leftward direction (Fig. 11-56 (t8)) as shown in Fig. 11-55 (H), and then displays it while moving it again quickly in a leftward direction until it disappears from the display area as shown in Fig. 11-55 (I) (Fig. 11-56 (t9)).

[About the title color change effect]
FIG. 11-57 is a diagram showing the execution status of the title color change effect, and FIG. 11-58 is a diagram showing the timing at which the color of the title characters changes in the title color change effect.

The performance control CPU 120 can execute a title color change performance in which the white title characters change to red or gold in the title display part of the low base weak reach A and B performances.

During the title display part of the low base weak reach A and B performances, the performance control CPU 120 makes some of the white title characters appear from the left side of the display area during the title start period, moves them towards a fixed position, and stops them at the fixed position. After that, the performance control CPU 120 displays the white title characters in a stationary state at the fixed position during the title display period, as shown in FIG. 11-57 (A). Then, when it has not been decided to execute the title color change performance, the performance control CPU 120 outputs a specific sound from the speakers 8L and 8R after a time of t1 has elapsed from the start of the title display period, and maintains the white title characters in a stationary state at the fixed position, as shown in FIG. 11-57 (B) (C), and then moves the white title characters displayed at the fixed position from the fixed position to the right side of the display area during the title end period until all of the title characters disappear.

On the other hand, when it is determined that a title color change effect is to be executed, the CPU 120 for controlling the effect outputs a specific sound from the speakers 8L and 8R after a time t1 has elapsed since the start of the title display period, and changes the title characters displayed in the fixed position to a state in which they appear to glow, as shown in FIG. 11-57(D). After a time t2 has elapsed, if a change to red has been determined, the CPU 120 changes the title characters to red, as shown in FIG. 11-57(E), and if a change to gold has been determined, the CPU 120 changes the title characters to gold, as shown in FIG. 11-57(F). After that, during the title end period, the CPU 120 moves the title characters from their fixed positions to the right side of the display area, while maintaining the changed color displayed in their fixed positions, until all of the title characters have disappeared. When the title characters are changed from a state in which they appear to glow to red or gold, the title characters have changed to red or gold when the light on the title characters clears.

As shown in Figures 11-58 (A) and (B), in the low base weak reach A and B performances, the presentation time T1 of the title start period of the title display part is set to 500 ms, the presentation time T2 of the title display period is set to 2200 ms, and the presentation time T3 of the title end period is set to 300 ms. During the title display period, the time t1 from the start of the title display period to when the title characters change to a state where they appear to glow is set to 800 ms, the time t2 from when the title characters change to a state where they appear to glow to when the title characters change to red or gold is set to 200 ms, and the time t3 from when the title characters change to red or gold to when the title display period ends is set to 1200 ms.

For this reason, as shown in FIG. 11-58 (C), when the color of the title characters changes from white to red or gold, the time (t3) during which the title characters are displayed in the changed red or gold form during the title display period is longer than the time (t1) during which the title characters are displayed in white form during the title display period, and the time (t3+T3) during which the title characters are displayed in the changed red or gold form during the title display part is longer than the time (T1+t1) during which the title characters are displayed in white form during the title display part.

[Regarding operation promotion performance A]
Figure 11-59 is a diagram showing the execution status of operation promotion presentation A.

The presentation control CPU 120 can execute operation promotion presentation A, which prompts the player to operate the push button 31B, during a normal reach presentation.

When it has been decided that operation prompting performance A will be performed, as shown in Figures 11-59 (A) and (B), during the execution of a normal reach performance in which the decorative pattern (large) is in a reach state, the performance control CPU 120 displays an operation prompting image (small) consisting of a button image (small) that resembles the push button 31B and operation prompting text (small) "Press!" that prompts the player to operate the push button 31B.

The button image (small) has a remaining time meter formed that indicates the remaining time of the valid period during which operation of the push button 31B is valid, and if operation of the push button 31B is detected before the remaining time meter reaches 0, or if the remaining time meter reaches 0, the performance control CPU 120 executes a whiteout performance in which the entire display area is displayed in white, as shown in Figure 11-59 (C), in the case of a fluctuation pattern that develops into a low base weak reach A or B performance, and then executes a low base weak reach A or B performance, as shown in Figure 11-59 (D).

On the other hand, in the case of a variation pattern that results in a loss, the performance control CPU 120 erases the operation prompt image (small) and stops the decorative pattern (large) in a loss state, as shown in Figure 11-59 (E).

[About operation promotion performance B]
Figure 11-60 is a diagram showing the execution status of operation promotion presentation B.

In low-base weak reach A and B performances, the performance control CPU 120 can execute operation promotion performance B, which encourages the operation of push button 31B at the end of the introductory part.

When the CPU 120 for controlling the performance has decided to execute operation prompting performance B and has decided to display an operation prompting image (small), it displays an operation prompting image (small) consisting of a button image (small) that imitates the push button 31B and operation prompting text (small) "Press!" that encourages the operation of the push button 31B at the end of the introductory part, as shown in FIG. 11-60 (A).

When the CPU 120 for controlling the performance has decided to execute the operation prompting performance B and to display the operation prompting image (large), as shown in Fig. 11-60 (B) (C), the CPU 120 for controlling the performance displays an operation prompting image (large) consisting of a button image (large) that imitates the push button 31B and is larger than the button image (small) and operation prompting text (large) "Press!" that prompts the operation of the push button 31B at the end of the introductory part. At this time, unlike when the CPU 120 for controlling the performance displays an operation prompting image (small) as shown in Fig. 11-60 (B), the CPU 120 for controlling the performance displays multiple button images (large) with a transparent background and combines these multiple button images (large) into one button image (large), and then displays an operation prompting image (large) consisting of a button image (large) and operation prompting text (large) "Press!" that prompts the operation of the push button 31B.

Both the button image (small) and the button image (large) have a remaining time meter formed, and if the operation of the push button 31B is detected before the remaining time meter reaches 0, or if the remaining time meter reaches 0, the performance control CPU 120 erases the operation prompt image (small) or operation prompt image (large) as shown in FIG. 11-60 (D) in the case of a fluctuation pattern that develops into a low base strong reach A-C performance or a low base strongest reach performance, and then executes a drop performance in which the movable body 32 falls, as shown in FIG. 11-60 (E).

On the other hand, in the case of a variation pattern that results in a miss, the performance control CPU 120 erases the operation prompt image (small) or operation prompt image (large) as shown in FIG. 11-60 (F) and executes a blackout performance in which the entire display area goes dark, and then notifies the player of a miss as the performance result as shown in FIG. 11-60 (G).

[About operation promotion performance C]
Figure 11-61 is a diagram showing the execution status of operation promotion presentation C.

The performance control CPU 120 can execute operation promotion performance C, which encourages the user to operate the push button 31B in the middle of the introductory part, in the low base strong reach performances A to C and the low base strongest reach performance.

When it has been decided to execute operation prompting performance C, the performance control CPU 120 displays an operation prompting image (small) consisting of a button image (small) that resembles the push button 31B and operation prompting text (small) "Press!" that prompts the player to operate the push button 31B in the middle of the introductory part, as shown in Figures 11-61 (A) and (B).

The performance control CPU 120 has determined that a cut-in image (A) is to be displayed, and if operation of the push button 31B is detected before the remaining time meter reaches zero, the operation prompt image (small) is erased as shown in FIG. 11-61 (C), and a cut-in image (A) showing the ally character "Nana" is displayed, and then the continuation of the introductory part is executed as shown in FIG. 11-61 (F).

The performance control CPU 120 also determines that a cut-in image (B) is to be displayed, and if operation of the push button 31B is detected before the remaining time meter reaches zero, the operation prompt image (small) is erased as shown in FIG. 11-61 (D), and a cut-in image (B) showing the ally character "Jam" is displayed, and then the continuation of the introductory part is executed as shown in FIG. 11-61 (F).

In addition, whether it has been determined that a cut-in image (A) is to be displayed or that a cut-in image (B) is to be displayed, if the operation of the push button 31B is not detected before the remaining time meter reaches zero, the performance control CPU 120 erases the operation prompting image (small) while continuing the performance of the middle part of the introductory part, as shown in FIG. 11-61 (E), and executes the continuation of the introductory part, as shown in FIG. 11-61 (F).

[Regarding operation promotion performance D]
Figure 11-62 is a diagram showing the execution status of operation promotion presentation D.

The performance control CPU 120 can execute operation promotion performance D, which encourages the operation of the push button 31B at the end of the introductory part, in the low base strong reach performances A to C and the low base strongest reach performance.

When it has been decided that a small operation prompting image should be displayed, the performance control CPU 120 displays a small operation prompting image consisting of a small button image that resembles a push button 31B and small operation prompting text "Press!" encouraging the player to operate the push button 31B at the end of the introductory part, as shown in Figures 11-62 (A) and (B).

When it has been decided that an operation prompting image (large) is to be displayed, the performance control CPU 120 displays an operation prompting image (large) consisting of a button image (large) that is larger than the button image (small) and that imitates the push button 31B at the end of the introductory part, as shown in Fig. 11-62 (A) (G). At this time, unlike when an operation prompting image (small) is displayed, the performance control CPU 120 displays multiple button images (large) with a transparent background and performs a prompt introduction performance (see Fig. 11-60 (B)) in which these multiple button images (large) are combined into one button image (large), and then displays an operation prompting image (large) consisting of a button image (large) and operation prompting text (large) "Press!" that prompts the operation of the push button 31B.

When the operation of the push button 31B is detected before the remaining time meter reaches 0, or when the remaining time meter reaches 0, in the case of a variation pattern that indicates a jackpot, the presentation control CPU 120 executes a rainbow presentation in which a rainbow pattern swirls across the entire display area while the operation prompt image (small) or operation prompt image (large) gradually disappears, as shown in FIG. 11-62(C)(H), and then notifies the user of a jackpot as a presentation result, as shown in FIG. 11-62(D)(I).

On the other hand, in the case of a variation pattern that results in a miss, the performance control CPU 120 erases the operation prompt image (small) or operation prompt image (large) as shown in FIG. 11-62 (E) (J) and executes a blackout performance in which the entire display area goes dark, and then notifies the player of a miss as the performance result as shown in FIG. 11-62 (F) (K).

[About the operation promotion image]
Fig. 11-63 is a diagram showing the display mode of the operation prompting image. The performance control CPU 120 displays the button images constituting the operation prompting image (small) and the operation prompting image (large) while continuously moving alternately in the left and right direction as shown in Fig. 11-63 (A), and while continuously changing between the state where the button is not pressed and the state where the button is pressed. At this time, as shown in Fig. 11-63 (B), the interval at which the button image moves in the left and right direction is different from the interval at which the button changes from the state where the button is not pressed to the state where the button is pressed, and the action of the button image moving in the left and right direction and the action of the button changing from the state where the button is not pressed to the state where the button is pressed are not synchronized, resulting in a complex movement.

[About the start of the big win]
FIG. 11-64 shows the execution status of the jackpot start presentation.

As shown in FIG. 11-64(A), the presentation control CPU 120 stops the decorative pattern (large) in a jackpot state, and then executes the jackpot start presentation when it receives a jackpot start command that specifies the display of a presentation image indicating the start of the jackpot game state.

As shown in Figs. 11-64(B) to (G), the presentation control CPU 120 causes the image display device 5 to display an image of a flickering flame as the background during the jackpot start presentation, and as shown in Fig. 11-64(B), first displays the first half of the title letters "BIG (REG)" of the jackpot title letters "BIG BONUS (REG BONUS)" in an enlarged size, as shown in Fig. 11-64(B), and then gradually reduces the first half of the title letters "BIG (REG)" until it is reduced in size so that the entirety is visible in the display area, as shown in Fig. 11-64(C), and displays it in a fixed position near the top center of the display area.

Next, as shown in FIG. 11-64(D), the presentation control CPU 120 displays the latter half of the title letters "BONUS" in the title letters "BIG BONUS (REG BONUS)" of the jackpot title in an enlarged size, and then, as shown in FIG. 11-64(E), gradually reduces the latter half of the title letters "BONUS" until it is reduced in size so that the entire latter half is visible in the display area, and displays it at the bottom of the fixed position near the center of the display area (below the first half of the title letters "BIG").

In this embodiment, if the jackpot type is a 6-round jackpot game state, the title text is displayed as "REG BONUS", and if the jackpot type is a 10-round jackpot game state, the title text is displayed as "BIG BONUS".

Next, as shown in Fig. 11-64 (E) to (G), the presentation control CPU 120 displays the title letters "BIG BONUS" in their entirety in a fixed position, and then gradually enlarges the title letters "BIG BONUS", and then, as shown in Fig. 11-64 (H), starts the jackpot presentation and switches the display on the image display device 5 to the background of the jackpot game state.

When the performance control CPU 120 starts the jackpot performance, it first displays a right hit promotion image (large) and a right hit promotion image (small) to encourage the player to shoot the game ball toward the right game area 2R, as shown in FIG. 11-64 (H).

The right-hit promotion image (small) is composed of the message "right hit" (small) that encourages the player to shoot the game ball toward the right game area 2R, and an arrow image (small) that indicates the right direction. As shown in Figure 11-64 (H) (I), the presentation control CPU 120 displays the right-hit promotion image (small) in a position toward the top right of the display area from the start of the jackpot presentation until the end of the jackpot game state.

The right hit promotion image (large) is a message that encourages the player to shoot the game ball toward the right game area 2R, and is composed of the message "Right Hit" (large), which is larger in size than the right hit promotion image (small), and an arrow image (large), which is an arrow indicating the right direction and is larger in size than the arrow image (small).The presentation control CPU 120 repeatedly displays the right hit promotion image (large) in a manner that moves from the left side of the display area to the right side only for a certain amount of time during the period from the start of the jackpot presentation until the end of the jackpot game state, as shown in Figures 11-64 (H) (I).

In addition, when the game is controlled to a jackpot game state, after the title characters are displayed in the jackpot start performance, the game is switched to during the jackpot game, and a right hit promotion image (small) and a right hit promotion image (large) that suggest the operation method of the jackpot game state (operation method of shooting the game ball toward the right game area 2R) are displayed. At this time, the performance control CPU 120 switches to the jackpot game at a timing a predetermined time before the timing at which control is performed on the main board 11 side that is advantageous by operating the operation method of shooting the game ball toward the right game area 2R, and displays the right hit promotion image (small) and the right hit promotion image (large). Therefore, after a predetermined period of time has elapsed since the right hit promotion image (small) and the right hit promotion image (large) were displayed, control is performed that is advantageous by operating the operation method of shooting the game ball toward the right game area 2R.

In addition, when the CPU 120 for controlling the performance displays the title characters during the jackpot start performance, and then ends the jackpot start performance, erases the title characters, and switches to the next performance, the CPU 120 erases the title characters of the jackpot start performance and switches to the next performance in a shorter time than when erasing the title characters during the title end period in the title display part of the super reach performance.

In particular, the performance control CPU 120 switches to the jackpot performance in one frame (the minimum unit of image update) after displaying the title characters in the jackpot start performance, and displays a right hit prompt image (small) and a right hit prompt image (large). In the title display part of the super reach performance, a title end period is set instead of one frame, and the title characters are erased over a certain period of time. However, if the title characters are erased over a similar period of time when the title characters are displayed in the jackpot start performance and the performance is switched to the jackpot performance and the right hit prompt image (small) and the right hit prompt image (large) are displayed, there is a risk that the game ball will be operated in a manner that shoots out toward the right game area 2R during the period in which the title characters are being erased. However, if the game ball is launched toward the right game area 2R at this timing, the control that gives an advantage by operating the game ball in a manner that shoots out toward the right game area 2R has not yet started, and the game ball will be wasted. In response to this, the presentation control CPU 120 displays the title text in the jackpot start presentation, and then in one frame (the smallest unit of image update), switches to the jackpot mid-presentation and displays the right-hit promotion image (small) and right-hit promotion image (large), thereby reducing the generation of wasted game balls.

[Display of remaining spins until Yu-time]
When the game control microcomputer 100 performs 900 variable displays without being controlled to a jackpot in a low probability state, it controls the game to a time-saving state B (in this embodiment, a play time with 1100 time-saving times) in which (1) time-saving control is performed 1100 times and (2) low probability control is performed 1100 times.

The performance control CPU 120 can also display on the image display device 5 the remaining number of times to reach rescue time-saving mode (hereinafter referred to as the remaining number of times until Yu-time) 131SG005Z (see Figure 11-1), which is the remaining variable display number of times until control is given to time-saving mode B (Yu-time).

As shown in FIG. 11-65(A), in the normal state, when the normal reach effect, low base weak reach A, B effect, low base strong reach A-C effect, or low base strongest reach effect is not being executed, the effect control CPU 120 displays the remaining number of times until Yu-Time in the upper left corner of the display area. The remaining number of times until Yu-Time 131SG005Z is displayed as "XXX times remaining" (XXX is a number between 0 and 900 depending on the remaining number of times). In this case, whether the remaining number of times until Yu-Time is between 0 and 900, the remaining number of times until Yu-Time 131SG005Z is displayed in characters of the same font size.

As shown in FIG. 11-65(B), the presentation control CPU 120 continues to display the remaining number of times until the Yu-Time 131SG005Z even during the execution of a normal reach presentation in which the decorative pattern (large) is in a reach state.

In addition, as shown in FIG. 11-65(C), when a normal reach effect develops into a low base weak reach A or B effect, the effect control CPU 120 continues to display the remaining number of times 131SG005Z until the Yu-Time even while the low base weak reach A or B effect is being executed. In this case, as shown in FIG. 11-65(D)(E), if a miss is announced as the result of the low base weak reach A or B effect, the effect control CPU 120 continues to display the remaining number of times 131SG005Z until the Yu-Time even after the low base weak reach A or B effect has ended.

In addition, the configuration is such that a jackpot can be announced as the result of the low base weak reach A, B performance, and when a jackpot is announced as the result of the low base weak reach A, B performance, the remaining number of times until the Yu-time 131SG005Z continues to be displayed until the low base weak reach A, B performance ends, and the remaining number of times until the Yu-time 131SG005Z is erased at the end of the low base weak reach A, B performance. Furthermore, the remaining number of times until the Yu-time 131SG005Z may be erased at the point when the content indicating that a jackpot has been confirmed as the result of the low base weak reach A, B performance is displayed.

Also, as shown in FIG. 11-65(F), when a normal reach effect or a low base weak reach A or B effect develops into a low base strong reach A-C effect or a low base strongest reach effect, the effect control CPU 120 erases the remaining number of times 131SG005Z until the Yu-Time when the low base strong reach A-C effect or the low base strongest reach effect starts. At this time, when the effect develops from a normal reach effect, the effect control CPU 120 erases the remaining number of times 131SG005Z until the Yu-Time at the timing when the selection effect starts, and when the effect develops from a low base weak reach A or B effect, if it is a low base strong reach A-C effect, during the prologue display period of the title display part, the effect control CPU 120 erases the remaining number of times 131SG005Z until the Yu-Time together with the pending display and active display, and if it is a low base strongest reach effect, the effect control CPU 120 erases the remaining number of times 131SG005Z until the Yu-Time at the start of the title display part.

In addition, when progressing from a low base weak reach A or B performance, the hold display and active display as well as the remaining number of times until Yu-time 131SG005Z may be erased at the timing when the falling display associated with the execution of operation prompting display B starts (the timing shown in FIG. 11-60 (D)). This allows the timing for erasing the hold display, active display, and the remaining number of times until Yu-time 131SG005Z to be the same regardless of whether the performance progresses to a low base strong reach A to C performance or a low base strongest reach performance.

Then, when a miss is announced as the result of the low base strong reach A-C effect or the low base strongest reach effect, the effect control CPU 120 displays the remaining number of times 131SG005Z until the Yu-Time ends again after the low base strong reach A-C effect or the low base strongest reach effect ends, as shown in FIG. 11-65(G)(H). On the other hand, when a jackpot is announced as the result of the low base strong reach A-C effect or the low base strongest reach effect, the effect control CPU 120 keeps the remaining number of times 131SG005Z until the Yu-Time ends erased until the next time the normal state is reached, as shown in FIG. 11-65(I)(J).

In addition, if the operation prompting performance A is configured to develop into a low base strong reach A-C performance or a low base strongest reach performance in response to the operation of push button 31B, the remaining number of times 131SG005Z until the Yu-time can be displayed continuously while the operation prompting performance A is being executed, and the remaining number of times 131SG005Z until the Yu-time can be erased when the low base strong reach A-C performance or the low base strongest reach performance starts. In such a configuration, the remaining number of times 131SG005Z until the Yu-time can be displayed in the operation prompting performance A, but the remaining number of times 131SG005Z until the Yu-time can be not displayed in the operation prompting performances C and D in the subsequent low base strong reach A-C performance or the low base strongest reach performance.

[About the Yu-time start effect]
When the game control microcomputer 100 performs 900 variable display without being controlled by a jackpot in a low probability state, it controls to the time-saving state B (play time). At this time, the game control microcomputer 100 turns on the right hit lamp 131SG132 as shown in FIG. 11-66(C) and transmits a right hit LED lighting notification command. After that, the performance control CPU 120 stops the variable display when the remaining number of times until the play time is 0 as shown in FIG. 11-66(A)(B), and when it receives the right hit LED lighting notification command, it displays a right hit promotion image (small) that encourages the operation of shooting the game ball toward the right play area 2R as shown in FIG. 11-66(C). The timing of turning on the right hit lamp 131SG132 and the timing of displaying the right hit promotion image (small) are almost simultaneous, but the game control microcomputer 100 turns on the right hit lamp 131SG132 and then sends a right hit LED lighting notification command, and in response, the performance control CPU 120 displays the right hit promotion image (small), so that the right hit lamp 131SG132 turns on before the right hit promotion image (small) is displayed.

When the time-saving state B (Yu-time) is started, the game control microcomputer 100 keeps the right-hit lamp 131SG132 lit until the time-saving state B (Yu-time) ends. The right-hit promotion image (small) is composed of a message "right hit" (small) that encourages the player to shoot the game ball toward the right game area 2R, and an arrow image (small) that indicates the right direction. As shown in Figures 11-66 (C) to (H), when the time-saving state B (Yu-time) is started, the performance control CPU 120 displays the right-hit promotion image (small) in a position toward the upper right of the display area until the time-saving state B (Yu-time) ends.

When the variable display stops with the number of remaining plays until Yu-Time is 0 and a game state designation command that designates time-saving state B (Yu-Time) is received, the presentation control CPU 120 executes the Yu-Time start presentation as shown in Figures 11-66 (D) to (G).

The Yu-time start performance includes a title start period from when part of the Yu-time title characters "Yu-time entry" is displayed in the display area of the image display device 5 until they are displayed in the fixed position, a title display period during which the title characters "Yu-time entry" are displayed in the fixed position, and a title end period from when the title characters "Yu-time entry" that were displayed in the fixed position disappear and switch to the Yu-time performance.

The performance control CPU 120 displays the title characters "Entering Yu-Time" in the same manner as when it displays the title characters "Six people, catch the explosive chu!" during the title start period, title display period, and title end period of the Yu-Time start performance.

In more detail, during the title start period, the performance control CPU 120 displays the title characters "Enter Yu Time" in an enlarged size where only a portion of the characters is visible in the display area, as shown in FIG. 11-66 (D). At this time, the performance control CPU 120 displays the title characters "Enter Yu Time" in such a way that the entire display area is filled with a portion of the title characters "Enter Yu Time". After that, the performance control CPU 120 gradually reduces the title characters "Enter Yu Time" as shown in FIG. 11-66 (D) (E), and stops the title characters "Enter Yu Time" in a fixed position at a reduced size where all of the characters of the title characters "Enter Yu Time" are visible in the display area.

During the title start period, the performance control CPU 120 displays the title characters "Entering Yu-Time" in a reduced size at a fixed position, and then transitions to the display of the title display period. During the title display period, the performance control CPU 120 keeps the title characters "Entering Yu-Time" displayed in a fixed position and frozen, as shown in Figures 11-66 (E) and (F).

After the title display period ends, the performance control CPU 120 transitions to the display of the title end period. During the title end period, as shown in FIG. 11-66 (F) (G), the performance control CPU 120 enlarges the title characters "Enter Yu Time", which are displayed in a reduced size at a fixed position, until the entire display area is filled with parts of the title characters "Enter Yu Time". At this time, the title characters "Enter Yu Time" are not enlarged in the opposite manner to when the title characters "Enter Yu Time" are displayed in a reduced size during the title start period, but are enlarged in a manner different from the opposite manner to when the title characters "Enter Yu Time" are displayed in a reduced size during the title start period until the entire display area is filled with parts of the title characters "Enter Yu Time". In other words, the trajectory that each part of the title characters follows as the title characters "Enter Yu Time" shrink during the title start period is different from the trajectory that each part of the title characters follows as the title characters "Enter Yu Time" expand during the title end period. Therefore, the display area is completely filled with part of the title text "Entering Yu-Time" in a manner different from the manner in which the display area is completely filled at the start of the title start period. After that, as shown in FIG. 11-66(H), the background switches to the Yu-Time presentation and the Yu-Time presentation begins.

During the Yu-Time start presentation, the presentation control CPU 120 displays a right-hit promotion image (large) that encourages the player to shoot the game ball toward the right play area 2R, in addition to the right-hit promotion image (small), and also displays an image warning about addiction (message: "Be careful not to get addicted!") below the display area.

The right hit promotion image (large) is a message that encourages the player to shoot the game ball toward the right game area 2R, and is composed of the message "Right Hit" (large), which is larger in size than the right hit promotion image (small), and an arrow image (large), which is an arrow indicating the right direction and is larger in size than the arrow image (small).The presentation control CPU 120 repeatedly displays the right hit promotion image (large) in a manner that moves from the left side of the display area to the right side over the period during which the Yu-time start presentation is being executed, as shown in Figures 11-66 (D) to (G).

In addition, in this embodiment, the game control microcomputer 100 is controlled to the time-saving state B, and when the variable display result is a miss, it selects the variable pattern PA1-4 with a special chart variable time of 500 ms to perform the variable display, and when it is controlled to the time-saving state B, and when the variable display result is a jackpot, it selects the variable pattern PB1-18 with a special chart variable time of 500 ms + 15,000 ms to perform the variable display, and when the control of the time-saving state B starts, the performance control CPU 120 is configured to execute the Yu-time start performance during the period when the variable display according to these variable patterns is being performed. The microcomputer 100 may be configured to perform a variable display by selecting a time-saving B start variable pattern that has a longer variable time than the variable pattern PA1-4 and that has a variable time corresponding to the play time start presentation in the first variable display controlled to the time-saving state B, that is, in the variable display based on the first game ball winning the first start winning port and the second start winning port after controlling to the time-saving state B, when the variable display result is a miss, and the presentation control CPU 120 executes the play time start presentation during the period in which the variable display by the time-saving B start variable pattern is being performed in the first variable display controlled to the time-saving state B. In this configuration, the game control microcomputer 100 performs a variable display in the variable pattern PB1-18 with a special chart variable time of 500 ms + 15,000 ms when the variable display result is a jackpot in the first variable display controlled to the time-saving state B, and the presentation control CPU 120 may stop the decorative pattern (large) in a jackpot mode without executing the play time start presentation.

[About title characters, etc. 1]
Figure 11-67 is a diagram showing one form of the relationship between the title characters of the title display part in the super reach performance, the explanatory characters in the explanatory text display performance, the title characters of the jackpot start performance, the operation prompting characters (small) in the operation prompting performance (small), and the operation prompting characters (large) in the operation prompting performance (large).

As shown in Figure 11-67 (A), the title characters of the Super Reach performance are displayed in a stationary state during the title display period, and the background image at that time is a still image (low base strong reach B, C performance, low base strongest reach performance, high base reach A-D performance) or a moving image (low base weak reach A, B performance, low base strong reach A performance). In addition, the number of characters in the title characters of the Super Reach performance is 7 to 13 characters, the display time of the title characters of the Super Reach performance (the time from when all the characters constituting the title characters are displayed until at least a part of the characters are no longer displayed) is LR, the font size of the title characters of the Super Reach performance is FR, and the display area size in which the title characters of the Super Reach performance are displayed is ER.

As shown in Figure 11-67 (A), the explanatory characters are displayed in an operating state, and the background image at that time is an operating image. The number of explanatory characters is 3 to 6 characters, the display time (the time from when all the characters constituting the explanatory characters are displayed until at least a part of the character string is no longer displayed) of the explanatory characters (one explanatory character out of three explanatory characters) is LS, the font size of the explanatory characters is FS, and the display area size in which the explanatory characters (one explanatory character out of three explanatory characters) are displayed is ES.

As shown in FIG. 11-67(A), the title characters of the jackpot start performance are displayed in an operating state, and the background image at that time is an operating image. In addition, the number of characters in the title characters of the jackpot start performance is 8, the display time of the title characters of the jackpot start performance (the time from when all the characters constituting the title characters are displayed until at least a part of the characters are no longer displayed) is LB, the font size of the title characters of the jackpot start performance is FB, and the display area size in which the title characters of the jackpot start performance are displayed is EB.

As shown in FIG. 11-67(A), the operation prompting characters (small) are displayed in an operating state, and the background image at that time is an operating image. The number of characters in the operation prompting characters (small) is three, the display time of the operation prompting characters (small) (the effective operation period of the push button 31B during which the operation prompting characters (small) are displayed without the push button 31B being operated) is L1P, the font size of the operation prompting characters (small) is F1P, and the display area size in which the operation prompting characters (small) are displayed is E1P.

As shown in FIG. 11-67(A), the operation prompting characters (large) are displayed in an operating state, and the background image at that time is an operating image. The number of characters in the operation prompting characters (large) is three, the display time of the operation prompting characters (large) (the effective operation period of the push button 31B during which the operation prompting characters (large) are displayed without the push button 31B being operated) is L2P, the font size of the operation prompting characters (large) is F2P, and the display area size in which the operation prompting characters (large) are displayed is E2P.

In this embodiment, when comparing the display times of the title character, explanatory character, title character, operation prompt character (small), and operation prompt character (large) of the super reach effect, as shown in Figure 11-67 (B), the display time LB of the title character of the jackpot start effect is longer than the display times LR, LS, L1P, L2P of the title character, explanatory character, operation prompt character (small) and operation prompt character (large) of the super reach effect, the display time LR of the title character of the super reach effect is longer than the display times LS, L1P, L2P of the explanatory character, operation prompt character (small) and operation prompt character (large), and the display times LS, L1P of the operation prompt character (small) and operation prompt character (large) are set longer than the display time LS of the explanatory character. In addition, the display times LR, LB, L1P, and L2P of the title characters of the super reach effect, the title characters of the jackpot start effect, the operation prompt characters (small), and the operation prompt characters (large) are all set to be longer than the display time required for all three explanatory characters that make up the explanatory text display effect to be displayed. Furthermore, the relationship between these display times holds regardless of the type of super reach effect.

In this embodiment, when comparing the font sizes of the title characters, explanatory characters, title characters of the jackpot start performance, operation prompt characters (small), and operation prompt characters (large) of the super reach performance, as shown in FIG. 11-67 (C), the font size F2P of the operation prompt characters (large) is larger than the font sizes FR, FS, FB, and F1P of the title characters, explanatory characters, title characters of the jackpot start performance, and operation prompt characters (small) of the super reach performance. Furthermore, the size of the smallest character among the characters that make up the operation prompt characters (large) is larger than the size of the largest character among the characters that make up the title characters, explanatory characters, title characters of the jackpot start performance, operation prompt characters (small), and operation prompt characters (large) of the super reach performance.

Also, the font size FB of the title character of the jackpot start performance is larger than the font size FR, F1P of the title character, explanatory character, and operation prompt character (small) of the super reach performance. Also, the title character "BIG BONUS" of the jackpot start performance is first displayed in the first half "BIG" at the top of the fixed position, and then the second half "BONUS" is displayed at the bottom of the fixed position, and then the title character "BIG BONUS" is gradually enlarged and displayed. When the first half "BIG" is displayed at the top of the fixed position and the second half "BONUS" is displayed at the bottom of the fixed position, the size of the characters that make up the title character "BIG BONUS" is the smallest. In this configuration, the size of the title character of the jackpot start performance when the first half "BIG" is displayed at the top of the fixed position and the second half "BONUS" is displayed at the bottom of the fixed position is larger than the size of the title character, explanatory character, and operation prompt character (small) of the super reach performance. Furthermore, when the first half of "BIG" is displayed at the top of the fixed position and the second half of "BONUS" is displayed at the bottom of the fixed position, the size of the smallest character that makes up the title of the jackpot start performance is larger than the size of the largest character that makes up the title, explanation, operation prompt character (small), and operation prompt character (large) of the super reach performance.

The font size FR of the title characters of the Super Reach performance is larger than the font sizes FS and F1P of the explanatory characters and operation prompt characters (small). The size of the smallest character among the characters that make up the title characters of the Super Reach performance is larger than the size of the largest character among the characters that make up the explanatory characters and operation prompt characters (small).

The font size FS of the explanatory characters is larger than the font size F1P of the operation prompting characters (small). Furthermore, the size of the smallest character among the characters that make up the explanatory characters is larger than the size of the largest character among the characters that make up the operation prompting characters (small).

Furthermore, these font size and character size relationships apply regardless of the type of Super Reach performance.

In this embodiment, when comparing the display area sizes of the title character, explanatory character, title character, operation prompt character (small), and operation prompt character (large) of the super reach effect, as shown in FIG. 11-67 (D), the display area size E2P of the operation prompt character (large) is larger than the display area sizes ER, ES, EB, and E1P of the title character, explanatory character, title character, and operation prompt character (small) of the super reach effect. Also, the display area size EB of the title character of the jackpot start effect is larger than the display area sizes ER, ES, and E1P of the title character, explanatory character, and operation prompt character (small) of the super reach effect. Also, the display area size ES of the explanatory character is larger than the display area size E1P of the operation prompt character (small). Also, these display area size relationships hold regardless of the type of super reach effect.

[Title characters, etc. 2]
Figure 11-68 is a diagram showing one embodiment of the relationship between the title characters of the title display part in the super reach performance, the title characters of the jackpot start performance, the operation prompting characters (small) in the operation prompting performance (small), the operation prompting characters (large) in the operation prompting performance (large), the title characters of the Yu-time start performance, and the remaining number characters that constitute the remaining number of times until Yu-time.

As shown in FIG. 11-68(A), the display time of the title characters in the Super Reach performance (the time from when all the characters constituting the title characters are displayed until at least a part of the characters are no longer displayed) is LR, the font size of the title characters in the Super Reach performance is FR, and the size of the display area in which the title characters in the Super Reach performance are displayed is ER.

As shown in FIG. 11-68(A), the display time of the title characters of the jackpot start effect (the time from when all the characters constituting the title characters are displayed until at least a part of the characters are no longer displayed) is LB, the font size of the title characters of the jackpot start effect is FB, and the size of the display area in which the title characters of the jackpot start effect are displayed is EB.

As shown in FIG. 11-68 (A), the display time of the operation prompting character (small) (the effective operation period of the push button 31B during which the operation prompting character (small) is displayed without the push button 31B being operated) is L1P, the font size of the operation prompting character (small) is F1P, and the display area size in which the operation prompting character (small) is displayed is E1P.

As shown in FIG. 11-68 (A), the display time of the operation prompting character (large) (the effective operation period of the push button 31B during which the operation prompting character (large) is displayed without the push button 31B being operated) is L2P, the font size of the operation prompting character (large) is F2P, and the display area size in which the operation prompting character (large) is displayed is E2P.

As shown in FIG. 11-68(A), the display time of the title characters of the Yu-time start effect (the time from when all the characters constituting the title characters are displayed until at least a part of the characters are no longer displayed) is LY, the font size of the title characters of the Yu-time start effect is FY, and the size of the display area in which the title characters of the Yu-time start effect are displayed is EY.

As shown in FIG. 11-68(A), the font size of the remaining number of times until the Yu-time is FZ, and the size of the display area in which the remaining number of times until the Yu-time is displayed is EZ.

In this embodiment, when comparing the font sizes of the title characters of the Super Reach effect, the title characters of the jackpot start effect, the operation prompt character (small), the operation prompt character (large), the title characters of the Yu-time start effect, and the characters of the number of times remaining until Yu-time, as shown in FIG. 11-68(B), the font size F2P of the operation prompt character (large) is larger than the font sizes FR, FB, F1P, FY, and FZ of the title characters of the Super Reach effect, the title characters of the jackpot start effect, the operation prompt character (small), the title characters of the Yu-time start effect, and the characters of the number of times remaining until Yu-time. Furthermore, the size of the smallest character among the characters that make up the operation prompt character (large) is larger than the size of the largest character among the characters that make up the title characters of the Super Reach effect, the title characters of the jackpot start effect, the operation prompt character (small), the title characters of the Yu-time start effect, and the characters of the number of times remaining until Yu-time (remaining XXX times (X is a number between 0 and 900)). Additionally, the size of the smallest character that makes up the operation prompt character (large) is larger than the size of the largest character that makes up the remaining number of times until Yu-time, regardless of whether the number of times remaining until Yu-time is between 0 and 900.

Furthermore, the font size FB of the title characters of the jackpot start performance is larger than the font sizes FR, F1P, FY, and FZ of the title characters of the super reach performance, the operation prompt character (small), the title characters of the Yu-time start performance, and the characters indicating the number of times remaining until Yu-time. Furthermore, the size of the smallest character among the characters constituting the title characters of the jackpot start performance is larger than the size of the largest character among the characters constituting the title characters of the super reach performance, the operation prompt character (small), the title characters of the Yu-time start performance, and the characters indicating the number of times remaining until Yu-time. Furthermore, the size of the smallest character among the characters constituting the title characters of the jackpot start performance is larger than the size of the largest character among the characters constituting the characters indicating the number of times remaining until Yu-time, regardless of whether the number of times remaining until Yu-time is between 0 and 900.

Furthermore, the font size FY of the title characters of the Yu-time start effect is larger than the font sizes FR, F1P, and FZ of the title characters of the Super Reach effect, the operation prompt characters (small), and the remaining number of times until Yu-time. Furthermore, the size of the smallest character among the characters that make up the title characters of the Yu-time start effect is larger than the size of the largest character among the characters that make up the title characters of the Super Reach effect, the operation prompt characters (small), and the remaining number of times until Yu-time. Furthermore, the size of the smallest character among the characters that make up the title characters of the Yu-time start effect is larger than the size of the largest character among the characters that make up the remaining number of times until Yu-time, regardless of whether the remaining number of times until Yu-time is 0 to 900.

The font size FR of the title characters of the Super Reach performance is larger than the font sizes F1P and FZ of the operation prompt characters (small) and the remaining number of times until Yu-Time. The size of the smallest character among the characters that make up the title characters of the Super Reach performance is larger than the size of the operation prompt characters (small) and the largest character among the characters that make up the remaining number of times until Yu-Time. The size of the smallest character among the characters that make up the title characters of the Super Reach performance is larger than the size of the largest character among the characters that make up the remaining number of times until Yu-Time, regardless of whether the remaining number of times until Yu-Time is 0 to 900.

Furthermore, the font size F1P of the operation prompting characters (small) is larger than the font size FZ of the characters indicating the number of times remaining until Yu-time. Furthermore, the size of the smallest character among the characters that make up the operation prompting characters (small) is larger than the size of the largest character among the characters that make up the characters indicating the number of times remaining until Yu-time. Furthermore, the size of the smallest character among the characters that make up the operation prompting characters (small) is larger than the size of the largest character among the characters that make up the characters indicating the number of times remaining until Yu-time, regardless of whether the number of times remaining until Yu-time is 0 to 900.

Furthermore, these font size and character size relationships apply regardless of the type of Super Reach performance.

In this embodiment, when comparing the display area sizes of the title characters of the super reach effect, the title characters of the jackpot start effect, the operation prompt character (small), the operation prompt character (large), the title characters of the Yu-time start effect, and the characters of the remaining number of times until Yu-time, as shown in FIG. 11-68(C), the display area size E2P of the operation prompt character (large) is larger than the display area sizes ER, EB, E1P, EY, and EZ of the title characters of the super reach effect, the title characters of the jackpot start effect, the operation prompt character (small), the title characters of the Yu-time start effect, and the characters of the remaining number of times until Yu-time. Also, the display area size EB of the title characters of the jackpot start effect is larger than the display area sizes ER, E1P, EY, and EZ of the title characters of the super reach effect, the operation prompt character (small), the title characters of the Yu-time start effect, and the characters of the remaining number of times until Yu-time. In addition, the display area size EY of the title character of the Yu-time start performance is larger than the display area sizes ER, E1P, and EZ of the title character of the Super Reach performance, the operation prompt character (small), and the remaining number of times until Yu-time. In addition, the display area size ER of the title character of the Super Reach performance is larger than the display area sizes E1P and EZ of the operation prompt character (small) and the remaining number of times until Yu-time. In addition, the display area size E1P of the operation prompt character (small) is larger than the display area size EZ of the remaining number of times until Yu-time. In addition, these display area size relationships hold regardless of the type of Super Reach performance.

In this embodiment, when comparing the display time of the title characters of the Super Reach performance and the Yu-Time start performance, as shown in FIG. 11-68 (D), the display time LY of the title characters of the Yu-Time start performance is set longer than the display time LR of the title characters of the Super Reach performance. Furthermore, the relationship between these display times holds regardless of the type of Super Reach performance.

Comparing the display mode of the title characters in the Super Reach effect and the Yu-Time start effect in this embodiment, as shown in FIG. 11-68 (E), in the low base weak reach A, B effects and the low base strong reach A-C effects, during the title start period the title characters are displayed while moving from the left side of the display area to the center, and during the title end period the title characters are erased while moving from the center to the right side of the display area. On the other hand, in the low base strongest reach effect and the Yu-Time start effect, during the title start period the title characters are displayed in an enlarged and reduced form, and during the title end period the title characters are erased while enlarging.

[LED placement]
The game effect lamps 9 in this embodiment include frame LEDs LWL1 to LWL12, frame LEDs LWR2 to LWR12, logo LEDs LL1 to LL4, decorative LEDs LS1 to LS5, and attacca lamps LA1 to LA4.

As shown in FIG. 11-69, the LED frames LWL1 to LWL12 are provided to surround the upper position of the image display device 5 of the gaming machine frame 3 and the left side of the gaming area, and the LED frames LWR2 to LWR12 are provided to surround the right side of the gaming area of the gaming machine frame 3. The logo LEDs LL1 to LL4 are also located in positions corresponding to the logo "POWER II" formed on the front of the movable body 32. The decorative LEDs LS1 to LS5 are also located in positions corresponding to the decorative parts formed on the gaming area 2L. The attacca lamps LA1 to LA4 are also located in the vicinity of the special variable winning ball device 7 on the gaming board 2.

The frame LEDs LWL1-LWL12, frame LEDs LWR2-LWR12, and attacca lamps LA1-LA4 are full-color LEDs made up of RGB (Red, Green, Blue) light-emitting elements, the logo LEDs LL1-LL4 are red LEDs capable of emitting a single color red light, and the decorative LEDs LS1-LS5 are white LEDs capable of emitting a single color white light.

[Output mechanism to LED driver (lamp driver)]
FIG. 11-70 is a diagram for explaining the mechanism of output to the LED driver. In this embodiment, the performance control CPU 120 mounted on the performance control board 12 outputs brightness data for turning on/blinking/turning off one or more of the multiple LEDs included in the game effect lamp 9 to the LED driver (also called a lamp driver). In the following, the control of turning on/blinking/turning off lamps such as LEDs by the performance control CPU 120 is also called lamp control. The LED driver adjusts the current flowing through each lamp included in the game effect lamp 9 that is the lamp control target, based on the brightness data received from the performance control CPU 120, in order to turn on/blink/turn off each lamp. Each game effect lamp 9 turns on/blink/turns off based on the current adjusted by the LED driver.

To explain more specifically, the ROM 121 of the performance control board 12 stores a brightness data table that contains brightness data for controlling each game effect lamp 9. The brightness data table includes an error brightness data table that is used when an error occurs, an SP reach brightness data table that is used during a super reach, and a background brightness data table.

Furthermore, the background brightness data table includes a normal background brightness data table used in a low probability low base state (normal state), a fanfare background brightness data table used in a fanfare state in which a fanfare effect is executed, a jackpot background brightness data table used during a round in a jackpot game state, an ending background brightness data table used in an ending state in which an ending effect is executed to notify the end of the jackpot game state, and a time-saving background brightness data table used in a low probability high base state (time-saving state).

The above-mentioned background brightness data tables are used without overlapping, and one of the background brightness data tables is used depending on which of multiple game states the game is controlled to, such as normal state, fanfare state, jackpot game state, ending state, and time-saving state. In other words, the performance control CPU 120 uses one of the background brightness data tables for each game state being controlled, and outputs brightness data based on that background brightness data table to the LED driver. This causes each game effect lamp 9 to be lamp-controlled depending on the game state being controlled.

Furthermore, a priority is set for each of the error brightness data table, the SP reach brightness data table, and the background brightness data table. Specifically, as shown in FIG. 11-70, the error brightness data table, the SP reach brightness data table, and the background brightness data table have the highest priority when used.

For example, when the effect control CPU 120 outputs brightness data based on the normal background brightness data table in the normal state and the effect progresses to a super reach effect, it uses the SP reach brightness data table corresponding to the super reach effect in preference to the normal background brightness data table, and outputs brightness data based on the SP reach brightness data table to the LED driver. As a result, when the game effect lamp 9 is lamp-controlled in a manner corresponding to the normal state based on the normal background brightness data table and the effect progresses to a super reach effect, the game effect lamp 9 is lamp-controlled in a manner corresponding to the super reach effect based on the SP reach brightness data table. Note that during the period when the brightness data based on the SP reach brightness data table is output to the LED driver, the brightness data based on the normal background brightness data table is not output to the LED driver, but when the normal state is restored after the super reach effect ends, the brightness data based on the normal background brightness data table is output to the LED driver, and when a jackpot is hit and the fanfare state is entered, the brightness data based on the fanfare background brightness data table is output to the LED driver.

More specifically, the performance control CPU 120 uses a timer to measure the lamp control time corresponding to the game state being controlled, and outputs brightness data to the LED driver using the background brightness data table corresponding to the game state being controlled. However, when the performance progresses to a super reach performance, the SP reach brightness data table corresponding to the super reach performance is used preferentially over the background brightness data table to output brightness data to the LED driver. During this time, the performance control CPU 120 continues to update the timer value without stopping the measurement of the lamp control time using the background brightness data table. In other words, even while the performance control CPU 120 is controlling the game effect lamp 9 based on the SP reach brightness data table, it continues to update the brightness data contained in the background brightness data table, but since the brightness data contained in the background brightness data table has a lower priority than the brightness data contained in the SP reach brightness data table, the brightness data contained in the background brightness data table is not output to the LED driver. After the Super Reach performance ends, the performance control CPU 120 starts outputting the luminance data contained in the background luminance data table to the LED driver again, starting from the continuation of the luminance data that was being updated.

For example, when an error occurs while outputting brightness data based on the SP Reach brightness data table during a Super Reach performance, the performance control CPU 120 uses the error brightness data table corresponding to the error in preference to the SP Reach brightness data table, and outputs brightness data based on the error brightness data table to the LED driver. As a result, when an error occurs while the game effect lamp 9 is being lamp-controlled in a manner corresponding to the Super Reach performance based on the SP Reach brightness data table, the game effect lamp 9 is lamp-controlled in a manner corresponding to the error based on the error brightness data table. Note that during the period when the brightness data based on the error brightness data table is being output to the LED driver, the brightness data based on the SP Reach brightness data table is not output to the LED driver, but when the error is released and the game returns to the Super Reach performance, the brightness data based on the SP Reach brightness data table is output to the LED driver.

More specifically, the performance control CPU 120 uses a timer to measure the time of lamp control corresponding to the super reach performance being controlled, and outputs brightness data to the LED driver using the SP reach brightness data table corresponding to the super reach performance. However, when an error occurs, the performance control CPU 120 outputs brightness data to the LED driver using the error brightness data table corresponding to the error in preference to the SP reach brightness data table. During this time, the performance control CPU 120 continues to update the timer value without stopping the measurement of the time of lamp control using the SP reach brightness data table. In other words, even while the performance control CPU 120 is lamp controlling the game effect lamp 9 based on the error brightness data table, it continues to update the brightness data included in the SP reach brightness data table, but since the brightness data included in the SP reach brightness data table has a lower priority than the brightness data included in the error brightness data table, the brightness data included in the SP reach brightness data table is not output to the LED driver. After the error is cleared, the performance control CPU 120 again starts outputting the luminance data contained in the SP reach luminance data table to the LED driver, starting from the continuation of the luminance data that had been continuously updated.

[Lighting state of the game effect lamp]
In this embodiment, the game effect lamps 9 are controlled by the output of brightness data to the LED driver by the performance control CPU 120 as described above. In this embodiment, terms such as "off", "almost off", "on", and "blinking" are used to refer to the lighting of the game effect lamps 9. As described above, the states of the game effect lamps 9 according to "on" and "blinking" are also referred to as "lighting states".

The term "off" includes a state in which the game effect lamp 9 is not lit and has a brightness of 0. The term "almost off" includes a state in which the game effect lamp 9 is lit but has a very low brightness (for example, the brightness "1" described below).

For example, when the RGB (Red, Green, Blue) data defined as the brightness data is "000", the corresponding LED is "off". Also, when the brightness data (RGB data) is "111", the corresponding LED is lit in white with extremely low brightness. In this embodiment, the state of an LED when the RGB data is "111" is sometimes referred to as "almost off" for convenience.

When the R (Red) data defined as the brightness data of the logo LEDs LL1 to LL4 is "0", the logo LEDs LL1 to LL4 are "off". Also, when the brightness data (R data) of the logo LEDs LL1 to LL4 is "1", the logo LEDs LL1 to LL4 are lit at an extremely low brightness. In this embodiment, the state of the logo LEDs LL1 to LL4 when the R data is "1" is sometimes referred to as "almost off" for convenience.

When the W (White) data, which is defined as the brightness data of the decorative LEDs LS1 to LS5, is "0", the decorative LEDs LS1 to LS5 are "off". Also, when the brightness data (W data) of the decorative LEDs LS1 to LS5 is "1", the decorative LEDs LS1 to LS5 are lit at an extremely low brightness. In this embodiment, the state of the logo LEDs LL1 to LL4 in which the W data is "1" is sometimes referred to as "almost off" for convenience.

The term "lighting" includes a constant lighting state in which the game effect lamp 9 is always on, a wave lighting state in which the multiple lamps included in the game effect lamp 9 are switched from off to on in sequence, and a hazy lighting state in which the game effect lamp 9 is dimly lit while changing brightness. Specifically, "lighting" includes lighting of the game effect lamp 9 when the brightness data is any of "2" to "F." The brightness data is hexadecimal data that can be specified from "0" to "F," with "0" being no brightness, "1" being the lowest brightness, and "F" being the highest brightness.

The term "blinking" includes a state in which the game effect lamp 9 is in a state other than the above-mentioned "off" and "on", and in which the brightness of each lamp when it is on alternates between a first brightness and a second brightness higher than the first brightness. For example, "blinking" includes repeating on and off or almost off, and specifically, "blinking" includes switching over time between a case in which the brightness data is any of "2" to "F" and a case in which the brightness data is "0" or "1". As described above, in this embodiment, there is a hazy lighting as a lighting state of the lamp, but the hazy lighting is a state in which the game effect lamp 9 is dimly lit while changing its brightness, whereas the blinking is a state in which all of the lamps included in the game effect lamp 9 are repeatedly lit and off or almost off.

[Explanation of the game effect lamp]
Next, the lamp control of the game effect lamp 9 will be explained with reference to Figures 11-71 to 12-36.

[Regarding lamp control of game effect lamps using a brightness data table]
The performance control CPU 120 uses a brightness data table stored in the ROM 121 to control one or more of the lamps included in the game effect lamp 9 to light/blink/turn off through lamp control.

Specifically, the display control unit 123 sets the sub-variation time according to the variation pattern command transmitted from the CPU 103 mounted on the main board 11. The sub-variation time is a counter that is decremented by one for each frame (33 ms) of the image to be displayed. When the sub-variation time reaches the timing to start displaying corresponding to each part (for example, various displays in each part of the super reach performance), the display control unit 123 performs display control of the image display device 5 based on the image data (video data, animation data) stored in the ROM 121. The display control unit 123 sets an extension command (for example, an extension command BXXX (where "X" is any alphanumeric character)) corresponding to the performance display (performance scene) to be displayed on the image display device 5 according to the display control it is performing, and transmits the extension command to the performance control CPU 120. Based on the extension command received from the display control unit 123, the performance control CPU 120 specifies the address of the parent table corresponding to the performance display (performance scene) for which display control is performed by the display control unit 123.

Figure 11-71 is a diagram for explaining an example of lamp control using a brightness data table. As shown in Figure 11-71, for example, when the display control unit 123 performs display control on the title display part of a low base weak reach A performance, it sends an extension command (B421) for specifying the title display part of the low base weak reach A performance to the performance control CPU 120. Based on the extension command received from the display control unit 123, the performance control CPU 120 identifies the address of the parent table (weak reach common title (parent)) corresponding to the title display part of the low base weak reach A performance.

The parent table stores information specifying the lamps (illuminated locations) that are subject to lamp control among the various lamps included in the game effect lamp 9, information specifying the child table that is referenced during lamp control corresponding to the lamps that are subject to lamp control, and information specifying the maximum time for which lamp control is performed. Note that the parent table stores only information about lamps that are subject to lamp control, and does not store information about lamps that are not subject to lamp control.

For example, in the parent table shown in Figure 11-74, frame LEDs LWL1 to LWL12 and frame LEDs LWR2 to LWR12 (XD_A_LWU_1_B421), logo LEDs LL1 to LL4 (XD_A_LLOGO_B421), decorative LEDs LS1 to LS5 (XD_A_LSLMP_B421), and attacca lamps LA1 to LA4 (XD_A_LATAK_B421) are specified as targets for lamp control. In addition, a child table: XD_J_LWU_1_JAKU_KYOTU_TYTLE is specified corresponding to the frame LEDs LWL1 to LWL12 and the frame LEDs LWR2 to LWR12, and 600,000 ms (600,000/10) is specified as the maximum time for which lamp control is performed by this child table. A child table: XD_J_LLOGO_JAKU_KYOTU_TYTLE is specified corresponding to the logo LEDs LL1 to LL4, and 600,000 ms (600,000/10) is specified as the maximum time for which lamp control is performed by this child table. ) is specified, and a child table: XD_J_LSLMP_JAKU_KYOTU_TYTLE is specified corresponding to the decorative LEDs LS1 to LS5, with 600,000 ms (600,000/10) specified as the maximum time for which lamp control is performed by this child table, and a child table: XD_J_LATAK_JAKU_KYOTU_TYTLE is specified corresponding to the attaka lamps LA1 to LA4, with 600,000 ms (600,000/10) specified as the maximum time for which lamp control is performed by this child table.

As shown in FIG. 11-71, when the performance control CPU 120 performs lamp control of a lamp specified in a parent table using a specified child table, for example, if 600,000 ms (10 minutes) is specified as the maximum time, the performance control CPU 120 subtracts 1 from the counter every 10 ms to time this 600,000 ms (10 minutes). In other words, the performance control CPU 120 performs the counter subtraction process 60,000 times to time 600,000 ms (10 minutes). The performance control CPU 120 performs lamp control of the target lamp using the child table specified by the parent table until a maximum of 600,000 ms (10 minutes) has been timed. Furthermore, if the performance control CPU 120 receives a new extended command before timing out a maximum of 600,000 ms (10 minutes) after receiving an extended command, it will stop the ongoing lamp control and use the child table specified by the parent table specified by the newly received extended command to perform lamp control of the target lamp. Note that it is not anticipated that a performance display (performance scene) will take 600,000 ms, but the maximum time for lamp control using the child table is set to 600,000 ms, which is significantly longer than the time required for a performance display (performance scene). Therefore, even if the performance control CPU 120 does not receive the next extended command for some reason, it can continue the ongoing lamp control for a maximum of 600,000 ms (10 minutes).

In the child table, for each lamp (illuminated location) that is the subject of lamp control among the various lamps included in the game effect lamp 9, information specifying the grandchild table to be referenced during lamp control and information specifying the execution time for which the lamp control is performed are stored in the order in which each lamp control is performed.

For example, in the child table shown in Figure 11-75, corresponding to the frame LED LWL1 to LWL12 and the frame LED LWR2 to LWR12 (XD_J_LWU_1_JAKU_KYOTU_TYTLE), the grandchild table: XD___LWU_1_JAKU_KYOTU_TYTLE1_1 and the execution time when the lamp is controlled by this grandchild table: 500 ms, the grandchild table: XD___LWU_1_JAKU_KYOTU_TYTLE1_2 and the grandchild table The execution time for lamp control by the table is 500 ms, the execution time for lamp control by grandchild table: XD___LWU_1_JAKU_KYOTU_TYTLE1_3 and this grandchild table is 230 ms, and the execution time for lamp control by grandchild table: XD___LWU_1_JAKU_KYOTU_TYTLE1_2 and this grandchild table is 600,000 ms, which are specified as the order in which lamp control by these grandchild tables is performed.

In addition, in the child table shown in Figure 11-75, corresponding to logo LEDs LL1 to LL4 (XD_J_LLOGO_JAKU_KYOTU_TYTLE), the following are specified in the order in which lamp control by the grandchild tables is executed: grandchild table: XD___LLOGO_JAKU_KYOTU_TYTLE1_1 and execution time for lamp control by this grandchild table: 500 ms, grandchild table: XD___LLOGO_JAKU_KYOTU_TYTLE1_2 and execution time for lamp control by this grandchild table: 500 ms, grandchild table: XD___LLOGO_JAKU_KYOTU_TYTLE1_3 and execution time for lamp control by this grandchild table: 230 ms, grandchild table: XD___LLOGO_JAKU_KYOTU_TYTLE1_2 and execution time for lamp control by this grandchild table: 600,000 ms.

In the child table shown in FIG. 11-75, the following execution times are specified for the decorative LEDs LS1 to LS5 (XD_J_LSLMP_JAKU_KYOTU_TYTLE): grandchild table: XD_J_LSLMP_JAKU_KYOTU_TYTLE1_1 and lamp control by this grandchild table: execution time: 500 ms, grandchild table: XD_J_LSLMP_JAKU_KYOTU_TYTLE1_2 and lamp control by this grandchild table: execution time: 500 ms, grandchild table: XD_J_LSLMP_JAKU_KYOTU_TYTLE1_3 and lamp control by this grandchild table: execution time: 230 ms, grandchild table: X_J_LSLMP_JAKU_KYOTU_TYTLE1_2 and lamp control by this grandchild table: execution time: 600,000 ms, in the order in which lamp control by these grandchild tables is performed.

In the child table shown in Figure 11-75, corresponding to the attack lamps LA1 to LA4 (XD_J_LATAK_JAKU_KYOTU_TYTLE), the following execution time is specified in the order in which lamp control is performed by the grandchild table: XD_J_LATAK_JAKU_KYOTU_TYTLE1_1 and this grandchild table: execution time for lamp control by this grandchild table: XD_J_LATAK_JAKU_KYOTU_TYTLE1_2 and this grandchild table: execution time for lamp control by this grandchild table: XD_J_LATAK_JAKU_KYOTU_TYTLE1_3 and this grandchild table: execution time for lamp control by this grandchild table: 230 ms, and execution time for lamp control by the grandchild table: X_J_LATAK_JAKU_KYOTU_TYTLE1_2 and this grandchild table: execution time for lamp control by this grandchild table: 600,000 ms, in accordance with the order in which lamp control is performed by these grandchild tables.

As shown in Figure 11-71, when the performance control CPU 120 performs lamp control of a target lamp using a grandchild table specified by a child table, it performs the process of, for example, controlling the target lamp using the grandchild table specified first, timing the execution time corresponding to this grandchild table, and then performing lamp control of the target lamp using the grandchild table specified next, for all specified grandchild tables in the specified order. For example, in the case of the child table shown in Figure 11-75, for frame LEDs LWL1 to LWL12 and frame LEDs LWR2 to LWR12, lamp control is performed using grandchild table: XD___LWU_1_JAKU_KYOTU_TYTLE1_1 until 500 ms is first clocked, then lamp control is performed using grandchild table: XD___LWU_1_JAKU_KYOTU_TYTLE1_2 until 500 ms is clocked, then lamp control is performed using grandchild table: XD___LWU_1_JAKU_KYOTU_TYTLE1_3 until 230 ms is clocked, and then lamp control is performed using grandchild table: XD___LWU_1_JAKU_KYOTU_TYTLE1_2 until 600,000 ms is clocked. Although it is not anticipated that a performance display (performance scene) will take 600,000 ms, the last grandchild table specified sets the maximum time for lamp control to 600,000 ms, which is significantly longer than the time required for the performance display (performance scene), so that the currently running lamp control can be continued for up to 600,000 ms (10 minutes) even if the performance control CPU 120 does not receive the next extended command for some reason.

In addition, in the child table, when frame LEDs LWL1 to LWL12 and frame LEDs LWR2 to LWR12 are to be the targets of lamp control, one grandchild table, XD___LWU_1_JAKU_KYOTU_TYTLE1_1, may be specified as the grandchild table corresponding to frame LEDs LWL1 to LWL12 and frame LEDs LWR2 to LWR12, as shown in Figure 11-75, or two grandchild tables, XD___LWU_1_KYOTSU_CHANCE_AKA1_1 and XD___LWU_2_KYOTSU_CHANCE_AKA1_1, may be specified as the grandchild table corresponding to frame LEDs LWL1 to LWL12 and frame LEDs LWR2 to LWR12, as shown in Figure 11-75. When one grandchild table is designated as the grandchild table corresponding to the frame LEDs LWL1 to LWL12 and the frame LEDs LWR2 to LWR12, the performance control CPU 120 uses this one grandchild table to perform the same lamp control for both the frame LEDs LWL1 to LWL12 and the frame LEDs LWR2 to LWR12. On the other hand, when two grandchild tables are designated as the grandchild tables corresponding to the frame LEDs LWL1 to LWL12 and the frame LEDs LWR2 to LWR12, the performance control CPU 120 uses one of the two grandchild tables to perform lamp control for the frame LEDs LWL1 to LWL12, and uses the other grandchild table to perform lamp control for the frame LEDs LWR2 to LWR12. Therefore, when one grandchild table is specified as the grandchild table corresponding to frame LEDLWL1-LWL12 and frame LEDLWR2-LWR12, common lamp control is performed for frame LEDLWL1-LWL12 and frame LEDLWR2-LWR12, whereas when two grandchild tables are specified, individual lamp control is performed for frame LEDLWL1-LWL12 and frame LEDLWR2-LWR12.

The grandchild table stores, for each lamp (illuminated location) that is the subject of lamp control among the various lamps included in the game effect lamp 9, brightness data that is referenced during lamp control and information that specifies the execution time for the lamp control, in the order in which each lamp control is executed.

For example, in the grandchild table shown in FIG. 11-76, corresponding to frame LED LWL1 to LWL12 and frame LED LWR2 to LWR12 (XD___LWU_1_JAKU_KYOTU_TYTLE1_1), the following are set: brightness data: 0x000000, 0x000000, 0x000000, 0x000000, 0x000000, 0x000000, execution time for lamp control using this brightness data: 100 ms, brightness data: 0x000000, 0x000000, 0x000000, 0x000000, 0x000000, 0x000000, execution time for lamp control using this brightness data: 120 ms, brightness data: 0x000000, 0x000000, 0x000000, 0x000000, 0x000000, 0x000000, execution time for lamp control using this brightness data: 120 ms, brightness data: 0x5AA5AA, 0x5AA5AA, 0x5AA5AA, 0x5AA5AA, 0x5AA5AA, 0x5AA5AA, execution time for lamp control using this brightness data: 120 ms, brightness data: 0x5AA5AA, 0x5AA5AA, 0x5AA5AA, 0x5AA5AA, 0x5AA5AA, 0x5AA5AA, execution time for lamp control using this brightness data: 40 ms are specified as the order in which lamp control using this brightness data is performed.

In the grandchild table shown in Figure 11-76, the following are specified for logo LEDs LL1 to LL4 (XD___LLOGO_JAKU_KYOTU_TYTLE1_1): brightness data: 0x0000, execution time for lamp control using this brightness data: 100 ms, brightness data: 0xAAAA, execution time for lamp control using this brightness data: 120 ms, brightness data: 0xAAAA, execution time for lamp control using this brightness data: 120 ms, brightness data: 0xAAAA, execution time for lamp control using this brightness data: 120 ms, brightness data: 0xAAAA, execution time for lamp control using this brightness data: 120 ms, brightness data: 0xAAAA, execution time for lamp control using this brightness data: 40 ms.

In the grandchild table shown in Figure 11-76, the following are specified for decorative LEDs LS1 to LS5 (XD___LSLMP_JAKU_KYOTU_TYTLE1_1): brightness data: 0x00000, execution time for lamp control using this brightness data: 100 ms, brightness data: 0x00000, execution time for lamp control using this brightness data: 120 ms, brightness data: 0x66666, execution time for lamp control using this brightness data: 120 ms, brightness data: 0x66666, execution time for lamp control using this brightness data: 120 ms, brightness data: 0x66666, execution time for lamp control using this brightness data: 40 ms.

In the grandchild table shown in Figure 11-76, the following are specified for the Attacka lamps LA1 to LA4 (XD___LATAK_JAKU_KYOTU_TYTLE1_1): luminance data: 0x000000, 0x000000, execution time for lamp control using this luminance data: 100 ms, luminance data: 0x000000, 0x000000, execution time for lamp control using this luminance data: 120 ms, luminance data: 0x5AA5AA, 0x5AA5AA, execution time for lamp control using this luminance data: 120 ms, luminance data: 0x5AA5AA, 0x5AA5AA, execution time for lamp control using this luminance data: 120 ms, luminance data: 0x5AA5AA, 0x5AA5AA, execution time for lamp control using this luminance data: 120 ms, luminance data: 0x5AA5AA, 0x5AA5AA, execution time for lamp control using this luminance data: 40 ms.

In the brightness data of the grandchild table frames LEDLWL1 to LWL12 and LEDLWR2 to LWR12 (XD___LWU_1_JAKU_KYOTU_TYTLE1_1) shown in Figure 11-76, the values in the lowest 4th to 6th digits of the data corresponding to numbers 1 and 2 indicate the RGB values of frame LEDLWL1, the values in the lowest 1st to 3rd digits of the data corresponding to numbers 1 and 2 indicate the RGB values of frame LEDLWL2 and LWR2, the values in the lowest 4th to 6th digits of the data corresponding to numbers 3 and 4 indicate the RGB values of frame LEDLWL3 and LWR3, and the values in the lowest 4th to 6th digits of the data corresponding to numbers 3 and 4 indicate the RGB values of frame LEDLWL4 and LWR4. The values of the lowest 1st to 3rd digits of the data corresponding to numbers 5 and 6 indicate the RGB values of frame LEDLWL4 and LWR4, the values of the lowest 4th to 6th digits of the data corresponding to numbers 5 and 6 indicate the RGB values of frame LEDLWL5 and LWR5, the values of the lowest 1st to 3rd digits of the data corresponding to numbers 5 and 6 indicate the RGB values of frame LEDLWL6 and LWR6, the values of the lowest 4th to 6th digits of the data corresponding to numbers 7 and 8 indicate the RGB values of frame LEDLWL7 and LWR7, and the values of the lowest 1st to 3rd digits of the data corresponding to numbers 7 and 8 indicate the RGB values of frame LEDLWL8 and LWR8.

In addition, as in the grandchild table shown in Figure 11-81, when different grandchild tables are specified for frame LED LWL1 to LWL12 (XD___LWU_1_KYOTSU_CHANCE_AKA1_1) and frame LED LWR2 to LWR12 (XD___LWU_2_KYOTSU_CHANCE_AKA1_1), in the brightness data for frame LED LWL1 to LWL12 (XD___LWU_1_KYOTSU_CHANCE_AKA1_1), the values of the lowest 4th to 6th digits of the data corresponding to 1 and 2 represent the RGB values of frame LED LWL1. the first to third lowest digits of the data corresponding to numbers 1 and 2 indicate the RGB values of frame LEDLWL2, the fourth to sixth lowest digits of the data corresponding to numbers 3 and 4 indicate the RGB values of frame LEDLWL3, the first to third lowest digits of the data corresponding to numbers 3 and 4 indicate the RGB values of frame LEDLWL4, the fourth to sixth lowest digits of the data corresponding to numbers 5 and 6 indicate the RGB values of frame LEDLWL5, and the first to third lowest digits of the data corresponding to numbers 5 and 6 indicate the RGB values of frame LEDLWL6, The values of the 4th to 6th lowest digits of the data corresponding to numbers 7 and 8 indicate the RGB values of frame LEDLWL7, the values of the 1st to 3rd lowest digits of the data corresponding to numbers 7 and 8 indicate the RGB values of frame LEDLWL8, and in the luminance data of frame LEDLWR2 to LWR12 (XD___LWU_2_KYOTSU_CHANCE_AKA1_1), the values of the 1st to 3rd lowest digits of the data corresponding to number 2 indicate the RGB values of frame LEDLWR2, and the values of the 4th to 6th lowest digits of the data corresponding to numbers 3 and 4 indicate the RGB values of frame LEDLWR3. The values of the lowest digits of the data corresponding to numbers 3 and 4 indicate the RGB values of frame LEDLWR4, the values of the lowest digits of the data corresponding to numbers 5 and 6 indicate the RGB values of frame LEDLWR5, the values of the lowest digits of the data corresponding to numbers 5 and 6 indicate the RGB values of frame LEDLWR6, the values of the lowest digits of the data corresponding to numbers 7 and 8 indicate the RGB values of frame LEDLWR7, and the values of the lowest digits of the data corresponding to numbers 7 and 8 indicate the RGB values of frame LEDLWR8.

In addition, in the brightness data of logo LEDs LL1 to LL4 (XD_J_LLOGO_JAKU_KYOTU_TYTLE) in the grandchild table shown in Figure 11-76, the value in the fourth lowest digit indicates the R (Red) value of logo LED LL1, the value in the third lowest digit indicates the R value of logo LED LL2, the value in the second lowest digit indicates the R value of logo LED LL3, and the value in the fourth lowest digit indicates the R value of logo LED LL4.

In addition, in the brightness data of decorative LEDs LS1 to LS5 (XD_J_LSLMP_JAKU_KYOTU_TYTLE) in the grandchild table shown in Figure 11-76, the value in the fourth lowest digit indicates the W (White) value of decorative LED LS1, the value in the third lowest digit indicates the W value of decorative LED LS2, the value in the second lowest digit indicates the W value of decorative LED LS3, and the value in the fourth lowest digit indicates the W value of decorative LED LS4.

In the brightness data of the attacca lamps LA1 to LA4 (XD_J_LATAK_JAKU_KYOTU_TYTLE) in the grandchild table shown in Figure 11-76, the values in the lowest 4th to 6th digits of the data corresponding to numbers 1 and 2 indicate the RGB values of attacca lamp LA1, the values in the lowest 1st to 3rd digits of the data corresponding to numbers 1 and 2 indicate the RGB values of attacca lamp LA2, the values in the lowest 4th to 6th digits of the data corresponding to numbers 3 and 4 indicate the RGB values of attacca lamp LA3, and the values in the lowest 1st to 3rd digits of the data corresponding to numbers 3 and 4 indicate the RGB values of attacca lamp LA4.

The brightness data value corresponds to the current value output to the lamp that is the subject of lamp control. The frame LEDs LWL1-LWL12, frame LEDs LWR2-LWR12, and Attacka Lamps LA1-LA4 are composed of LEDs consisting of three elements, "R", "G", and "B", and the brightness data for each element corresponds to the current value output to each element. Specifically, the brightness data has 16 current values from 0 to F, and when the brightness data is 0, the current value is the minimum value (for example, 0), and when the brightness data is F, the current value is the maximum value. For example, when the brightness data of "A" is output to the "R" element, a current corresponding to the brightness data of "A" flows through the "R" element, when the brightness data of "1" is output to the "G" element, a current corresponding to the brightness data of "1" flows through the "G" element, and when the brightness data of "F" is output to the "G" element, a current corresponding to the brightness data of "F" flows through the "G" element.

The frame LEDs LWL1-LWL12, frame LEDs LWR2-LWR12, and Attacca lamps LA1-LA4 can emit light in various colors by passing a current corresponding to brightness data through each RGB element. The frame LEDs LWL1-LWL12, frame LEDs LWR2-LWR12, and Attacca lamps LA1-LA4 can also be lit in colors corresponding to each performance or character by emitting light based on brightness data. As an example, when data "F00" is output from an LED lamp to an LED as brightness data, a current corresponding to that data flows, causing the LED to light up in red. When data "F0F" is output from an LED lamp to an LED as brightness data, a current corresponding to that data flows, causing the LED to light up in magenta. When data "FF0" is output from an LED lamp to an LED as brightness data, causing a current corresponding to that data to flow, causing the LED to light up in yellow.

In addition, the logo LEDs LL1 to LL4 can emit red light with a brightness corresponding to the brightness data by passing a current corresponding to the brightness data through the R (Red) element, and the decorative LEDs LS1 to LS5 can emit white light with a brightness corresponding to the brightness data by passing a current corresponding to the brightness data evenly through the three "R", "G", and "B" elements.

As shown in Figure 11-71, when the performance control CPU 120 controls the target lamp by referring to the brightness data in the grandchild table, it performs the process of, for example, outputting the first specified brightness data to the LED driver, timing the execution time corresponding to this brightness data, and then outputting the next specified brightness data to the LED driver, for all specified brightness data, in the specified order. For example, in the case of the child table shown in FIG. 11-75, for frame LEDs LWL1 to LWL12 and frame LEDs LWR2 to LWR12, the following luminance data is output to the LED driver until 100 ms is first clocked: 0x000000, 0x000000, 0x000000, 0x000000, 0x000000, 0x000000. Then, the following luminance data is output to the LED driver until 120 ms is clocked: 0x000000, 0x000000, 0x000000, 0x000000, 0x000000. The CPU 120 outputs 0x000000, 0x000000, 0x000000 to the LED driver, and then outputs the following brightness data to the LED driver until 120 ms is clocked: 0x5AA5AA, 0x5AA5AA, 0x5AA5AA, 0x5AA5AA, 0x5AA5AA, 0x5AA5AA, and 0x5AA5AA. The CPU 120 then outputs 0x5AA5AA, 0x5AA5AA, 0x5AA5AA, 0x5AA5AA, 0x5AA5AA, 0x5AA5AA, and 0x5AA5AA to the LED driver until 40 ms is clocked. The LED driver then passes a current corresponding to the received brightness data through the specified LED based on the received brightness data. This allows the performance control CPU 120 to control each lamp included in the game effect lamp 9 via the LED driver.

As described above, the performance control CPU 120 has timers corresponding to each of the parent table, child table, and grandchild table, and performs lamp control based on the parent table, child table, and grandchild table while decrementing the timers at regular intervals (e.g., 10 ms intervals).

Specifically, the performance control CPU 120 starts outputting brightness data from the first specified location in the grandchild table, and when it has completed outputting brightness data up to the last specified location in the grandchild table, if the timer value corresponding to the child table specifying that grandchild table still remains, it starts outputting brightness data again from the first specified location in the grandchild table. On the other hand, if the timer value corresponding to the child table specifying that grandchild table becomes 0 while the performance control CPU 120 is outputting brightness data based on the grandchild table, it sets a timer corresponding to another child table specified by the parent table specifying that child table, and starts outputting brightness data from the first specified location in the grandchild table specified by that child table. This switches the grandchild table, and lamp control is performed based on the grandchild table after the switch.

The timer management of child tables by the performance control CPU 120 will be explained with reference to the figure. Figure 11-72 is a diagram to explain an example of lamp control using a grandchild table with timer management of a child table. As shown in Figure 11-72, in the child table: XD_J_LWU_1_JAKU_KYOTU_TYTLE, 500 ms is specified as the time when lamp control is first performed for frame LEDs LWL1 to LWL12, and the grandchild table: XD___LWU_1_JAKU_KYOTU_TYTLE1_1 is specified, 500 ms is specified as the time when lamp control is second performed and the grandchild table: XD___LWU_1_JAKU_KYOTU_TYTLE1_2 is specified, 230 ms is specified as the time when lamp control is third performed and the grandchild table: XD___LWU_1_JAKU_KYOTU_TYTLE1_3 is specified, and 600,000 ms is specified as the time when lamp control is fourth performed and the grandchild table: XD___LWU_1_JAKU_KYOTU_TYTLE1_2 is specified. In the second and fourth grandchild tables: XD___LWU_1_JAKU_KYOTU_TYTLE1_2, the brightness data (RGB data) for frame LEDs LWL1 to LWL12 is "0x5AA499, 0x388499, 0x5AA499, 0x388499, 0x5AA499, 0x388499", "0x4995AA, 0x499388, 0x4995AA, 0x499388, 0x4995AA, 0x499388", "0x388499, 0x5AA499, 0x388499, 0x5AA499, 0x388499, 0x5AA499", "0x499388, 0x4995AA, It is specified that the data should be executed at 100 ms intervals in the order "0x499388, 0x4995AA, 0x499388, 0x4995AA". For ease of explanation, the luminance data in the first 100 ms will be called data 1, the luminance data in the second 100 ms will be called data 2, the luminance data in the third 100 ms will be called data 3, and the luminance data in the fourth 100 ms will be called data 4.

When the performance control CPU 120 performs lamp control for the second specified grandchild table: XD___LWU_1_JAKU_KYOTU_TYTLE1_2 of the child table: XD_J_LWU_1_JAKU_KYOTU_TYTLE, it times the specified 500 ms by subtracting 1 from the counter every 10 ms, and outputs the brightness data of data 1, data 2, data 3, and data 4 to the LED driver at 100 ms intervals based on: XD___LWU_1_JAKU_KYOTU_TYTLE1_2 until the time reaches 500 ms. However, after data 1 to data 4 have been output, if the time has not yet reached 500 ms, it again outputs the brightness data to the LED driver in order, starting from the first data 1. When the timer reaches 500 ms, the performance control CPU 120 stops outputting brightness data based on the grandchild table: XD___LWU_1_JAKU_KYOTU_TYTLE1_2, and starts outputting brightness data based on the next grandchild table specified by the child table: XD___LWU_1_JAKU_KYOTU_TYTLE1_3.

In addition, when the performance control CPU 120 performs lamp control for the fourth specified grandchild table: XD___LWU_1_JAKU_KYOTU_TYTLE1_2 of the child table: XD_J_LWU_1_JAKU_KYOTU_TYTLE, it times the specified 600,000 ms by subtracting 1 from the counter every 10 ms, and outputs the brightness data of data 1, data 2, data 3, and data 4 to the LED driver at 100 ms intervals based on: XD___LWU_1_JAKU_KYOTU_TYTLE1_2 until the time reaches 600,000 ms. However, after data 1 to data 4 have been output, if the time has not yet reached 600,000 ms, it again outputs the brightness data to the LED driver in order starting from the first data 1. When the time reaches 600,000 ms, the performance control CPU 120 stops outputting brightness data based on the grandchild table: XD___LWU_1_JAKU_KYOTU_TYTLE1_2. At this time, because the child table does not specify a next grandchild table, it starts outputting brightness data based on the grandchild table: XD___LWU_1_JAKU_KYOTU_TYTLE1_1, which was specified first in the child table. However, unless some abnormality occurs, the time will not reach 600,000 ms, and by receiving the next extension command from the display control unit 123 before the time reaches 600,000 ms, it will start outputting brightness data based on the parent table, child table, and grandchild table specified by the newly received extension command.

As shown in the parent table in Figure 11-74, the maximum time for lamp control by a child table is specified as 600,000 ms (10 minutes), and the 10-minute data in this parent table serves as a measure against malfunctions. In other words, the performance control CPU 120 switches parent tables to control the lamps based on the performance control commands from the main board 11, but even if some malfunction occurs while lamp control is being performed based on a certain parent table and the performance control CPU 120 does not receive a performance control command from the main board 11, lamp control is performed based on the same parent table for 10 minutes, so it is possible to prevent different lamp controls from being performed one after another from the point where the malfunction occurred.

In addition, as in the child table shown in Figure 11-75, the execution time for lamp control by the last-specified grandchild table is specified as 600,000 ms (10 minutes). The 10-minute data in this type of child table serves to prevent lamp control from being performed again by the first-specified grandchild table of the child table when the value of the timer corresponding to the child table becomes 0, because the parent table's timer is still remaining.

In addition, in the grandchild table, 600,000 ms (10 minutes) may be specified as the execution time of the lamp control that references the last specified brightness data. With this configuration, the 10-minute data in the brightness data serves to prevent lamp control from being performed again using the brightness data specified at the beginning of the grandchild table when the timer corresponding to the grandchild table has reached 0, due to the timer of the child table still remaining. In this way, by setting the brightness data specified at the end of the grandchild table to 10-minute data, the lamp is maintained at a fixed light emission, preventing the problem of continuous changes in the lamp lighting. Furthermore, by specifying brightness data spanning 600,000 ms (10 minutes) at the end of the grandchild table specified at the end of the child table, the problem of continuous changes in the lamp lighting can be more effectively prevented.

[Brightness data table used for Super Reach performance 1]
FIG. 11-73 is a diagram showing a brightness data table used in the super reach performance.

The execution time of the title display part is the same for the low base weak reach A performance and the low base weak reach B performance, and as shown in FIG. 11-73, the performance control CPU 120 controls the game effect lamp 9 in the title display part using a common weak reach common title that defines the lighting mode of the title display part of the low base weak reach A and B performances as a brightness data table, whether the low base weak reach A performance or the low base weak reach B performance is executed.

In addition, when the performance control CPU 120 executes the low base weak reach A and B performances, it executes a title color change performance in the title display part, and when changing the title characters to red, it controls the lamp of the game effect lamp 9 using the common title common chance up red, which defines the light emission mode when changing the title characters to red in the title color change performance as a brightness data table, whether it is the title display part of the low base weak reach A performance or the title display part of the low base weak reach B performance, and when it executes the title color change performance in the title display part and changes the title characters to gold, it controls the lamp of the game effect lamp 9 using the common title common chance up gold, which defines the light emission mode when changing the title characters to gold in the title color change performance as a brightness data table, whether it is the title display part of the low base weak reach A performance or the title display part of the low base weak reach B performance.

The execution time of the introduction part differs between the low base weak reach A performance and the low base weak reach B performance, and as shown in Figure 11-73, when a low base weak reach A performance is executed, in the introduction part, the lamp control of the game effect lamp 9 is performed using a weak reach system weak reach A introduction in which the light emission mode specific to the introduction part of the low base weak reach A performance is defined as a brightness data table, and when a low base weak reach B performance is executed, in the introduction part, the lamp control of the game effect lamp 9 is performed using a weak reach system weak reach B introduction in which the light emission mode specific to the introduction part of the low base weak reach B performance is defined as a brightness data table.

The execution time of the title display part is the same for the low base strong reach A performance, the low base strong reach B performance, and the low base strong reach C performance, and as shown in FIG. 11-73, the performance control CPU 120 controls the game effect lamp 9 in the title display part using a common strong reach common title that defines the lighting mode of the title display part of the low base strong reach A to C performances as a brightness data table, regardless of whether the low base strong reach A performance, the low base strong reach B performance, or the low base strong reach C performance is executed.

The execution time of the introduction part differs between the low base strong reach A performance, the low base strong reach B performance, and the low base strong reach C performance, and as shown in FIG. 11-73, when a low base strong reach A performance is executed, in the introduction part, the lamp control of the game effect lamp 9 is performed using a strong reach system strong reach A introduction in which the light emission mode specific to the introduction part of the low base strong reach A performance is defined as a brightness data table, and when a low base strong reach B performance is executed, in the introduction part, the lamp control of the game effect lamp 9 is performed using a strong reach system strong reach B introduction in which the light emission mode specific to the introduction part of the low base strong reach B performance is defined as a brightness data table, and in the introduction part, the lamp control of the game effect lamp 9 is performed using a strong reach system strong reach C introduction in which the light emission mode specific to the introduction part of the low base strong reach C performance is defined as a brightness data table.

As shown in FIG. 11-73, when executing a low-base strongest reach presentation, the presentation control CPU 120 controls the game effect lamp 9 in the title display part and introduction part using a strongest reach system strongest reach title introduction that defines a series of light emission patterns from the title display part to the introduction part of the low-base strongest reach presentation as a brightness data table.

The execution time of the title display part is the same for high base reach A performance, high base reach B performance, high base reach C performance, and high base reach D performance, and as shown in FIG. 11-73, the performance control CPU 120 controls the lamp of the game effect lamp 9 in the title display part using a common high base reach series common title which defines the lighting mode of the title display part of the high base reach A to D performances as a brightness data table, whether it is executing a high base reach A performance, a high base reach B performance, a high base reach C performance, or a high base reach D performance.

The execution time of the title display part is the same for the high base reach A performance, high base reach B performance, high base reach C performance, and high base reach D performance, but as shown in Figure 11-73, when a high base reach A performance is executed, in the introduction part, the lamp control of the game effect lamp 9 is performed using a high base reach type reach A introduction in which the lighting mode specific to the introduction part of the high base reach A performance is defined as a brightness data table, and when a high base reach B performance is executed, in the introduction part, the lighting mode specific to the introduction part of the high base reach B performance is defined as a brightness data table. The lamp control of the game effect lamp 9 is performed using a high base reach-type reach B introduction that defines the light emission mode specific to the introduction part of the high base reach C presentation as a brightness data table, and when a high base reach C presentation is executed, the lamp control of the game effect lamp 9 is performed using a high base reach-type reach C introduction that defines the light emission mode specific to the introduction part of the high base reach C presentation as a brightness data table, and when a high base reach D presentation is executed, the lamp control of the game effect lamp 9 is performed using a high base reach-type reach D introduction that defines the light emission mode specific to the introduction part of the high base reach D presentation as a brightness data table.

In this way, whether a low base weak reach A performance is executed or a low base weak reach B performance is executed, the title display part uses a common weak reach-type common title as the brightness data table to control the lamp of the game effect lamp 9, so the storage capacity of the brightness data table can be saved, while in the introduction part, whether a low base weak reach A performance is executed or a low base weak reach B performance is executed, the lamp of the game effect lamp 9 is controlled using a separate weak reach-type weak reach A introduction and a weak reach-type weak reach B introduction, so that in the introduction part of the low base weak reach A performance and the low base weak reach B performance, the game effect lamp 9 can be made to emit light in different modes depending on the performance content of each, and the performance effect in the introduction part until the performance result is introduced in the super reach performance can be enhanced.

In this embodiment, whether a low base weak reach A performance is executed or a low base weak reach B performance is executed, the title display part uses a common weak reach common title as a brightness data table to control the lamp of the game effect lamp 9. However, the title display part of the low base weak reach A and B performances includes a weak reach title start which defines a unique lighting pattern for the title start period from when part of the title characters are displayed until they are displayed in a fixed position, and a weak reach title display which defines a unique lighting pattern after the title display period in which the title characters are displayed in a fixed position. When the display control unit 123 starts display control of the title display part of the low base weak reach A and B performances, By transmitting an extended command specifying the reach title start, the performance control CPU 120 uses the brightness data table: weak reach title start to control the lamps of the frame LED LWL1-LWL12 and the frame LED LWR2-LWR12, and the Attack lamp LA1-LA4, and when the display control unit 123 starts display control of the title display period of the title display part of the low base weak reach A and B performances, the performance control CPU 120 may use the brightness data table: weak reach title display to control the lamps of the frame LED LWL1-LWL12 and the frame LED LWR2-LWR12, and the Attack lamp LA1-LA4. Also, in such a configuration, depending on whether it is a low base weak reach A performance or a low base weak reach B performance, the brightness data table: weak reach title start or weak reach title display may be a common brightness data table for one of them, and a separate brightness data table with individual contents set for the other may be used.

In addition, when executing the low base weak reach A or B performance, when executing a title color change performance in the title display part, whether it is a low base weak reach A performance or a low base weak reach B performance, the lamp control of the game effect lamp 9 is performed using a common title common chance up red (title common chance up gold) as the brightness data table, so the storage capacity of the brightness data table can be saved.

In addition, whether a low base strong reach A performance is executed, whether a low base strong reach B performance is executed, or whether a low base strong reach C performance is executed, in the title display part, the lamp control of the game effect lamp 9 is performed using a common strong reach common title as the brightness data table, so that the storage capacity of the brightness data table can be saved. On the other hand, in the introduction part, when a low base strong reach A performance is executed, whether a low base strong reach B performance is executed, or whether a low base strong reach C performance is executed, the lamp control of the game effect lamp 9 is performed using a separate strong reach A system strong reach introduction, strong reach B system strong reach introduction, or strong reach C system strong reach introduction, so that in the introduction part of the low base strong reach A performance, low base strong reach B performance, and low base strong reach C performance, it is possible to make the game effect lamp 9 emit light in different modes according to the respective performance contents, and the performance effect in the introduction part until the performance result is introduced in the super reach performance can be enhanced.

In this embodiment, whether a low base strong reach A performance is executed, a low base strong reach B performance is executed, or a low base strong reach C performance is executed, the title display part uses a common strong reach common title as a brightness data table to control the lamp of the game effect lamp 9. Among the title display parts of the low base strong reach A to C performances, there is a strong reach title start that defines a unique lighting pattern for the prologue display period and the title start period from when a part of the title characters are displayed until they are displayed in a fixed position, and a strong reach title display that defines a unique lighting pattern after the title display period in which the title characters are displayed in a fixed position, and the display control unit 123 controls the title display parts of the low base strong reach A to C performances. When display control of the strong base weak reach A to C performance is started, the performance control CPU 120 may use the brightness data table: strong reach title start to send an extended command specifying the start of a strong reach title, so that the performance control CPU 120 controls the lamps of frame LEDs LWL1 to LWL12 and frame LEDs LWR2 to LWR12, and attacka lamps LA1 to LA4, and when the display control unit 123 starts display control of the title display period of the title display part of the strong base weak reach A to C performance, the performance control CPU 120 may use the brightness data table: strong reach title display to control the lamps of frame LEDs LWL1 to LWL12 and frame LEDs LWR2 to LWR12, and attacka lamps LA1 to LA4. Also, in such a configuration, depending on whether it is a low base strong reach A performance, a low base strong reach B performance, or a low base strong reach C performance, the brightness data table: either the start of a strong reach title or the display of a strong reach title may be a common brightness data table, and the other may be a separate brightness data table with individual contents set for each.

In addition, the title display parts of the low base strong reach A to C performances include a strong reach prologue that defines a unique lighting pattern for the prologue display period, a strong reach title start that defines a unique lighting pattern for the title start period from when part of the title characters are displayed until they are displayed in a fixed position, and a strong reach title display that defines a unique lighting pattern after the title display period in which the title characters are displayed in a fixed position. When the display control unit 123 starts display control of the title display parts of the low base strong reach A to C performances, it sends an extension command that specifies the strong reach prologue, and the performance control CPU 120 uses the brightness data table: strong reach prologue to control the lamps of the frame LEDs LWL1 to LWL12 and the frame LEDs LWR2 to LWR12, and the attacker lamps LA1 to LA4, and the display control unit 123 However, by sending an extended command specifying a strong reach title start when starting display control of the title start period of the title display part of the low base strong reach A to C performance, the performance control CPU 120 can control the lamps of frame LEDs LWL1 to LWL12 and frame LEDs LWR2 to LWR12, and attacca lamps LA1 to LA4 using the brightness data table: strong reach title start, and by sending an extended command specifying a strong reach title display when the display control unit 123 starts display control of the title display period of the title display part of the strong base weak reach A to C performance, the performance control CPU 120 can control the lamps of frame LEDs LWL1 to LWL12 and frame LEDs LWR2 to LWR12, and attacca lamps LA1 to LA4 using the brightness data table: strong reach title display. Also, in such a configuration, depending on whether it is a low base strong reach A performance, a low base strong reach B performance, or a low base strong reach C performance, the brightness data table: strong reach prologue, strong reach title start, or strong reach title display may be a common brightness data table for at least one table, and the remaining tables may be separate brightness data tables with individual contents set for each.

In addition, the title display part of the low base strong reach A to C performance includes a strong reach prologue that defines a unique lighting pattern during the prologue display period, and a strong reach title display that defines a unique lighting pattern after the title start period from when part of the title characters are displayed until they are displayed in a fixed position. When the display control unit 123 starts display control of the title display part of the low base strong reach A to C performance, it sends an extension command that specifies the strong reach prologue, and the performance control CPU 120 uses the brightness data table: strong reach prologue. When the display control unit 123 starts display control of the title start period of the title display part of the low base strong reach A to C performance, it transmits an extended command specifying the strong reach title display, so that the performance control CPU 120 can control the lamps of the frame LEDs LWL1 to LWL12 and frame LEDs LWR2 to LWR12, and the attacca lamps LA1 to LA4 using the brightness data table: strong reach title display. Also, in such a configuration, depending on whether it is a low base strong reach A performance, a low base strong reach B performance, or a low base strong reach C performance, the brightness data table: strong reach prologue, strong reach title display can be a common brightness data table for one of the brightness data tables, and a separate brightness data table with individual contents set for the other.

In addition, whether a high base reach A performance is executed, whether a high base reach B performance is executed, whether a high base reach C performance is executed, or whether a high base reach D performance is executed, in the title display part, the lamp control of the game effect lamp 9 is performed using a common high base reach common title as the brightness data table, so that the storage capacity of the brightness data table can be saved. On the other hand, in the introduction part, when a high base reach A performance is executed, whether a high base reach B performance is executed, whether a high base reach C performance is executed, or whether a high base reach D performance is executed, the lamp control of the game effect lamp 9 is performed using a separate high base reach A performance introduction, high base reach B performance introduction, high base reach C performance introduction, or high base reach D performance introduction, so that in the introduction part of the high base reach A performance, high base reach B performance, high base reach C performance, or high base reach D performance, it is possible to make the game effect lamp 9 have different light emission modes according to the respective performance contents, and the performance effect in the introduction part until the performance result is introduced in the super reach performance can be enhanced.

In this embodiment, whether a high base reach A performance is executed, a high base reach B performance is executed, a high base reach C performance is executed, or a high base reach D performance is executed, the title display part is configured to use a common high base reach series common title as a brightness data table to control the lamp of the game effect lamp 9. Among the title display parts of the high base reach A to D performances, there are a high base reach series title start which defines a unique lighting pattern for the title start period from when a part of the title characters are displayed until they are displayed in a fixed position, and a high base reach series title display which defines a unique lighting pattern after the title display period in which the title characters are displayed in a fixed position, and the display control unit 123 controls the title display parts of the high base reach A to D performances. When starting display control of the title display period of the title display part of the high base reach A to D performances, the performance control CPU 120 may send an extended command specifying the start of a high base reach title, so that the performance control CPU 120 uses the brightness data table: high base reach title start to control the lamps of frame LEDs LWL1 to LWL12 and frame LEDs LWR2 to LWR12, and attacca lamps LA1 to LA4, and when the display control unit 123 starts display control of the title display period of the title display part of the high base reach A to D performances, the performance control CPU 120 may send an extended command specifying the high base reach title display, so that the performance control CPU 120 uses the brightness data table: high base reach title display to control the lamps of frame LEDs LWL1 to LWL12 and frame LEDs LWR2 to LWR12, and attacca lamps LA1 to LA4. Also, in such a configuration, depending on whether it is a high base reach A performance, a high base reach B performance, a high base reach C performance, or a high base reach D performance, the brightness data table: either the high base reach title start or the high base reach title display may be a common brightness data table, and the other may be a separate brightness data table with individual contents set for each.

In addition, when a low-base strongest reach effect is executed, in which the execution time of the title display part is not common with other super reach effects, the game effect lamp 9 is controlled using a strongest reach series strongest reach title introduction, which defines a series of light emission patterns from the title display part to the introduction part of the low-base strongest reach effect as a brightness data table, in the title display part and introduction part, so the number of brightness data tables can be reduced.

In this embodiment, whether a low base weak reach A performance is executed or a low base weak reach B performance is executed, the title display part uses a common weak reach common title as the brightness data table to control the lamp of the game effect lamp 9. However, when a low base weak reach A performance is executed, the title display part uses a weak reach A title that defines the light emission mode specific to the title display part of the low base weak reach A performance as the brightness data table of the title display part to control the lamp of the game effect lamp 9. When a low base weak reach B performance is executed, the title display part uses a weak reach B title that defines the light emission mode specific to the title display part of the low base weak reach B performance as the brightness data table of the title display part to control the lamp of the game effect lamp 9. This makes it possible to set the game effect lamp 9 to a different light emission mode depending on the content of each performance in the title display part of the low base weak reach A performance and the low base weak reach B performance, thereby enhancing the performance effect in the title display part in the super reach performance.

In addition, in this embodiment, whether a low base strong reach A performance is executed, a low base strong reach B performance is executed, or a low base strong reach C performance is executed, the title display part is configured to use a common strong reach system common title as the brightness data table to control the lamp of the game effect lamp 9. When a low base strong reach A performance is executed, the title display part is configured to use a strong reach system strong reach A title that defines the lighting mode specific to the title display part of the low base strong reach A performance as the brightness data table of the title display part to control the lamp of the game effect lamp 9, and when a low base strong reach B performance is executed, the title display part is configured to use a low base strong reach B performance title as the brightness data table of the title display part. When performing lamp control of the game effect lamp 9 using a strong reach series strong reach B title that defines a lighting pattern specific to the display part, and executing a low base strong reach C performance, the lamp control of the game effect lamp 9 may be performed using a strong reach series strong reach C title that defines a lighting pattern specific to the title display part of the low base strong reach C performance as the brightness data table of the title display part. This makes it possible to set the game effect lamp 9 to a different lighting pattern according to the content of each performance in the title display parts of the low base strong reach A performance, low base strong reach B performance, and low base strong reach C performance, and enhances the performance effect in the title display part in the super reach performance.

In addition, in this embodiment, whether a high base reach A performance is executed, a high base reach B performance is executed, a high base reach C performance is executed, or a high base reach D performance is executed, the title display part uses a common high base reach series common title as a brightness data table to control the lamp of the game effect lamp 9. When a high base reach A performance is executed, the lamp of the game effect lamp 9 is controlled using a high base reach series reach A title that defines the light emission mode specific to the title display part of the high base reach A performance as the brightness data table of the title display part, and when a high base reach B performance is executed, the lamp of the game effect lamp 9 is controlled using a high base reach series reach B title that defines the light emission mode specific to the title display part of the high base reach B performance as the brightness data table of the title display part. When a high base reach C performance is executed, the lamp control of the game effect lamp 9 is performed using a high base reach series reach C title in which the lighting mode specific to the title display part of the high base reach C performance is defined as the brightness data table of the title display part, and when a high base reach D performance is executed, the lamp control of the game effect lamp 9 is performed using a high base reach series reach D title in which the lighting mode specific to the title display part of the high base reach D performance is defined as the brightness data table of the title display part. This makes it possible to set the game effect lamp 9 to a different lighting mode depending on the content of each performance in the title display parts of the high base reach A performance, high base reach B performance, high base reach C performance, and high base reach D performance, and enhances the performance effect in the title display part in the super reach performance.

In addition, in this embodiment, when a low base strongest reach performance is executed, the game effect lamp 9 is controlled using a strongest reach system strongest reach title introduction in the title display part and introduction part, which defines a series of light emission modes from the title display part to the introduction part of the low base strongest reach performance as a brightness data table. However, when a low base strongest reach performance is executed, the game effect lamp 9 may be controlled using a strongest reach system strongest reach title in which a light emission mode specific to the title display part of the low base strongest reach performance is defined as a brightness data table for the title display part, and the game effect lamp 9 may be controlled using a strongest reach system strongest reach introduction in which a light emission mode specific to the introduction part of the low base strongest reach performance is defined as a brightness data table for the introduction part.

In addition, in this embodiment, when low base weak reach A and B performances are executed, the lamp of the game effect lamp 9 is controlled using a common weak reach system common title as the brightness data table of the title display part, and the lamp of the game effect lamp 9 is controlled using the weak reach system weak reach A introduction and the weak reach system weak reach B introduction as the brightness data table of the introduction part, respectively. However, when a low base weak reach A performance is executed, the lamp of the game effect lamp 9 is controlled using the weak reach system weak reach A title introduction that defines a series of light emission modes from the title display part to the introduction part of the low base weak reach A as the brightness data table in the title display part and the introduction part, and when a low base weak reach B performance is executed, the lamp of the game effect lamp 9 is controlled using the weak reach system weak reach B title introduction that defines a series of light emission modes from the title display part to the introduction part of the low base weak reach B as the brightness data table in the title display part and the introduction part, and by doing so, the number of brightness data tables can be reduced.

In addition, in this embodiment, when a low base strong reach A to C performance is executed, the lamp of the game effect lamp 9 is controlled using a common strong reach system common title as the brightness data table of the title display part, and the lamp of the game effect lamp 9 is controlled using strong reach system strong reach A introduction, strong reach system strong reach B introduction, and strong reach system strong reach C introduction as the brightness data table of the introduction part, respectively. When a low base strong reach A performance is executed, in the title display part and introduction part, the lamp of the game effect lamp 9 is controlled using strong reach system strong reach A title introduction, which defines a series of light emission modes from the title display part to the introduction part of the low base strong reach A performance, as the brightness data table, and when a low base strong reach B performance is executed, in the title display part and introduction part, the lamp of the game effect lamp 9 is controlled using low base strong reach B performance as the brightness data table. When a low base strong reach C performance is executed, the lamp control of the game effect lamp 9 is performed using a strong reach system strong reach B title introduction that defines a series of light emission modes from the title display part to the introduction part of the low base strong reach C performance as a brightness data table in the title display part and introduction part, and when a low base strong reach D performance is executed, the lamp control of the game effect lamp 9 is performed using a strong reach system strong reach D title introduction that defines a series of light emission modes from the title display part to the introduction part of the low base strong reach D performance as a brightness data table in the title display part and introduction part, and by doing so, the number of brightness data tables can be reduced.

In addition, in this embodiment, when high base reach A to D performances are executed, the lamp of the game effect lamp 9 is controlled using a common high base reach common title as the brightness data table of the title display part, and the lamp of the game effect lamp 9 is controlled using high base reach reach A introduction, high base reach reach B introduction, high base reach reach C introduction, and high base reach reach D introduction as the brightness data table of the introduction part. When a high base reach A performance is executed, in the title display part and introduction part, the lamp of the game effect lamp 9 is controlled using a high base reach reach A title introduction, which defines a series of light emission modes from the title display part to the introduction part of the high base reach A performance, as the brightness data table. When a high base reach B performance is executed, in the title display part and introduction part, the lamp of the game effect lamp 9 is controlled using a high base reach common title as the brightness data table. The lamp control of the game effect lamp 9 is performed using a high base reach-type reach B title introduction that defines a series of light emission modes from the title display part to the introduction part of the base reach B performance, and when a high base reach C performance is executed, the lamp control of the game effect lamp 9 is performed using a high base reach-type reach C title introduction that defines a series of light emission modes from the title display part to the introduction part of the high base reach C performance as a brightness data table in the title display part and introduction part, and when a high base reach D performance is executed, the lamp control of the game effect lamp 9 is performed using a high base reach-type reach D title introduction that defines a series of light emission modes from the title display part to the introduction part of the high base reach D performance as a brightness data table in the title display part and introduction part, and by doing so, the number of brightness data tables can be reduced.

[Brightness data table used for Super Reach performance 2]
The following describes the settings of the brightness data table used in the super reach performance. As described above, the brightness data table is composed of a parent table, a child table, and a grandchild table, but in the brightness data table described below, only some of the parent table, child table, and grandchild table are shown, and the other tables may be omitted.

[Brightness data table used in the title display part of low base weak reach A and B effects]
Figure 11-74 is a diagram showing the setting contents of the parent table of the brightness data table: weak reach common title used when the display control unit 123 receives the extended command: B421 sent when performing display control of the title display part in the low base weak reach A and B performances, Figure 11-75 is a diagram showing the setting contents of the child table of the brightness data table: weak reach common title, and Figures 11-76 to 11-78 are diagrams showing the setting contents of the grandchild table of the brightness data table: weak reach common title.

When the performance control CPU 120 receives the extension command B421, it specifies the parent table of the weak reach common title based on the extension command B421. As shown in FIG. 11-74, the parent table of the weak reach common title is set to perform lamp control for frame LED LWL1-LWL12 and frame LED LWR2-LWR12 for a maximum of 600,000 ms by referring to the child table: XD_J_LWU_1_JAKU_KYOTU_TYTLE, and when the performance control CPU 120 receives the extension command B421, it performs lamp control for frame LED LWL1-LWL12 and frame LED LWR2-LWR12 by referring to the child table: XD_J_LWU_1_JAKU_KYOTU_TYTLE specified by the parent table of the weak reach common title.

Child table: XD_J_LWU_1_JAKU_KYOTU_TYTLE contains the grandchild tables and execution times for frames LEDLWL1 to LEDLWL12 and frames LEDLWR2 to LEDLWR12 in the order of reference, as shown in Figure 11-75.

The performance control CPU 120 first controls the lamps by referencing the grandchild table: XD___LWU_1_JAKU_KYOTU_TYTLE1_1 (Figure 11-76) that is set first in the child table: XD_J_LWU_1_JAKU_KYOTU_TYTLE. As a result, the frame LEDs LWL1 to LWL12 and the frame LEDs LWR2 to LWR12 are turned off for 340 ms, and then the frame LEDs LWL1 to LWL12 and the frame LEDs LWR2 to LWR12 are lit in blue for 160 ms.

Then, when the performance control CPU 120 has timed 500 ms, which is the execution time of the grandchild table: XD___LWU_1_JAKU_KYOTU_TYTLE1_1, it performs lamp control by referencing the grandchild table: XD___LWU_1_JAKU_KYOTU_TYTLE1_2 (Figure 11-77), which is the second grandchild table in the child table: XD_J_LWU_1_JAKU_KYOTU_TYTLE. As a result, the frame LEDs LWL1 to LWL12 and the frame LEDs LWR2 to LWR12 light up in a blue color, and the brightness changes every 100 ms.

Then, when the performance control CPU 120 has timed 500 ms, which is the execution time of the grandchild table: XD___LWU_1_JAKU_KYOTU_TYTLE1_2, it performs lamp control by referencing the grandchild table: XD___LWU_1_JAKU_KYOTU_TYTLE1_3 (Figure 11-78) that is set as the third grandchild table in the child table: XD_J_LWU_1_JAKU_KYOTU_TYTLE. As a result, some of the frame LEDs LWL1 to LWL12 and frame LEDs LWR2 to LWR12 are turned off and the rest are lit in blue, with the parts that are turned off and the parts that are lit changing every 30 ms or 20 ms.

Then, when the performance control CPU 120 has timed 230 ms, which is the execution time of the grandchild table: XD___LWU_1_JAKU_KYOTU_TYTLE1_3, it performs lamp control by referencing the grandchild table: XD___LWU_1_JAKU_KYOTU_TYTLE1_2 (Figure 11-77), which is set as the fourth grandchild table in the child table: XD_J_LWU_1_JAKU_KYOTU_TYTLE. As a result, the frame LEDs LWL1 to LWL12 and the frame LEDs LWR2 to LWR12 light up in a blue color, and the brightness changes every 100 ms.

Then, when the display control unit 123 receives an extension command (B400 or B40F) sent when controlling the display of the introductory part of the low base weak reach A and B effects, the performance control CPU 120 switches to lamp control using a brightness data table based on the newly received extension command. As a result, the frame LEDs LWL1 to LWL12 and frame LEDs LWR2 to LWR12 will continue to light up in a blue-based color and change brightness every 100 ms until a new extension command is received, and when a new extension command is received, they will switch to a lighting mode based on the received extension command.

As shown in Figure 11-74, the parent table for weak reach common titles has child tables set up that also refer to the logo LEDs LL1-LL4, decorative LEDs LS1-LS5, and attacca lamps LA1-LA4. These child tables also have grandchild tables etc. set up in order of execution to refer to, and these grandchild tables also have brightness data etc. set up in order of execution to refer to. The performance control CPU 120 refers to the child table specified in the parent table, the grandchild table specified in the child table, and the brightness data specified in the grandchild table to control the logo LEDs LL1-LL4, decorative LEDs LS1-LS5, and attacca lamps LA1-LA4 in the same procedure as above.

As a result, the logo LEDs LL1 to LL4 will change from off to red until 500 ms have elapsed, then stay red until 500 ms have elapsed, with the brightness changing every 100 ms, then go from red to almost off until 230 ms have elapsed, then stay red again, and continue to stay red and change brightness every 100 ms until a new extended command is received.

In addition, the decorative LEDs LS1 to LS5 change from an off state to white until 500 ms have passed, then stay white until 500 ms have passed, and the brightness changes every 100 ms, then go from white to a nearly off state until 230 ms have passed, and then stay white again, and continue to stay white and change brightness every 100 ms until a new extended command is received.

The attacca lamps LA1 to LA4 will change from off to blue until 500 ms have elapsed, then stay lit in blue until 500 ms have elapsed, and the brightness will change every 100 ms, then go from blue to almost off until 230 ms have elapsed, and then stay lit in blue again, and the brightness will continue to change every 100 ms until a new extended command is received.

As shown in Figure 11-152 (A), in the title display part in the low base weak reach A and B performances, the period from the start is the title start period of 500 sm, followed by the title display period of 2200 ms, followed by the title end period of 300 ms. Therefore, in the title display part of the low base weak reach A and B performances, lamp control is performed based on the brightness data table: weak reach common title, so that in the title start period (the period from the start of the title display part to 500 ms elapsed) in which the title characters move from the left side of the display area toward their fixed position, the frame LEDs LWL1-LWL12 and frame LEDs LWR2-LWR12, and the attacca lamps LA1-LA4 change from an off state to blue, the logo LEDs LL1-LL4 change from an off state to red, and the decorative LEDs LS1-LS5 change from an off state to white (lamp control based on the grandchild table (1) specified by the child table in Figure 11-75). In addition, during the title display period when the title characters remain stationary in a fixed position and the title end period (the period from the start of the title display period to the end of the title display part) when the title characters move from the fixed position to the right, the frame LEDs LWL1 to LWL12 and frame LEDs LWR2 to LWR12 and the attacca lamps LA1 to LA4 are lit in a blue color until 500 ms have elapsed, and the brightness changes every 100 ms (lamp control by grandchild table (2) specified by the child table in Figure 11-75), and then by the time 230 ms have elapsed, they go from blue to a nearly off state and then light up in blue again (lamp control by grandchild table (3) specified by the child table in Figure 11-75), and then they are lit in a blue color again, and the state of the brightness changing every 100 ms continues (lamp control by grandchild table (4) specified by the child table in Figure 11-75). In addition, the logo LEDs LL1 to LL4 will light up red until 500 ms have elapsed, and the brightness will change every 100 ms (lamp control by grandchild table (2) specified by the child table in Figure 11-75), and then within 230 ms, they will go from red to almost off, and then light up red again (lamp control by grandchild table (3) specified by the child table in Figure 11-75), and then they will light up red again, and the state of the brightness changing every 100 ms will continue (lamp control by grandchild table (4) specified by the child table in Figure 11-75). In addition, the decorative LEDs LS1 to LS5 are lit in white until 500 ms have elapsed, and the brightness changes every 100 ms (lamp control by grandchild table (2) specified by the child table in FIG. 11-75), then go from white to almost off once and then back to white within 230 ms (lamp control by grandchild table (3) specified by the child table in FIG. 11-75), after which they are lit in white again and the brightness continues to change every 100 ms (lamp control by grandchild table (4) specified by the child table in FIG. 11-75).

In addition, after 3000 ms has elapsed since the start of the title display part, the display control unit 123 receives an extended command (B400 or B40F) sent in conjunction with starting display control of the introductory part of the low base weak reach A and B performances, and the lamp control based on the brightness data table: weak reach common title ends and switches to lamp control based on the brightness data table corresponding to the introductory part of the low base weak reach A and B performances.

In this way, when the performance control CPU 120 receives the extended command B421, it performs lamp control based on the brightness data table: weak reach common title based on the extended command B421, so that the frame LEDs LWL1-LWL12 and frame LEDs LWR2-LWR12, logo LEDs LL1-LL4, decorative LEDs LS1-LS5, and attacca lamps LA1-LA4 change in light color and light pattern according to the title start period in which the title characters move from the left side of the display area towards their fixed position, and the title end period in which the title characters move from their fixed position towards the right side.

[Brightness data table used in title color change effect (red)]
Figure 11-79 is a diagram showing the setting contents of the parent table of the brightness data table: title common chance up red used when the display control unit 123 receives the extended command: B511 sent when performing display control of the title color change effect that changes the title text from white to red, Figure 11-80 is a diagram showing the setting contents of the child table of the brightness data table: title common chance up red, and Figures 11-81 to 11-83 are diagrams showing the setting contents of the grandchild table of the brightness data table: title common chance up red.

When controlling the display of a title color change effect in which the title characters change from white to red in the title display part of the low base weak reach A and B effects, the display control unit 123 transmits an extension command 511 at the timing when the title characters change (1,300 ms after the start of the title display part).

When the performance control CPU 120 receives the extended command B511, it specifies the parent table (Fig. 11-79) for the title common chance up red based on the extended command 511, and controls the lamps of the frame LEDs LWL1-LWL12 and frame LEDs LWR2-LWR12, logo LEDs LL1-LL4, decorative LEDs LS1-LS5, and attacca lamps LA1-LA4 by referring to the child table (Fig. 11-80) specified by the parent table, the grandchild tables (Figs. 11-81 to 83) specified by the child table, and the brightness data specified by the grandchild tables.

As a result, the frame LEDs LWL1-LWL12 and frame LEDs LWR2-LWR12, and the attacca lamps LA1-LA4 will flash white at 40 ms intervals until 200 ms have elapsed, then they will be lit in red until 1200 ms have elapsed, and their brightness will change at 20 ms intervals, after which they will gradually turn off from red at 280 ms, and will remain off until a new extended command is received.

In addition, the logo LEDs LL1 to LL4 will remain off until 200 ms have elapsed, then will remain red until 1200 ms have elapsed, with the brightness changing at 20 ms intervals, after which they will gradually turn off from red at 280 ms, and will remain off until a new extended command is received.

In addition, the decorative LEDs LS1 to LS5 will flash white at 40 ms intervals until 200 ms have elapsed, then they will remain lit in white until 1200 ms have elapsed, and their brightness will change at 20 ms intervals, after which they will gradually turn off from white at 280 ms, and will remain off until a new extended command is received.

As shown in Figure 11-152 (B), the title display part in the low base weak reach A and B performances is the title start period from the start of 500 ms, followed by the title display period of 2200 ms, followed by the title end period of 300 ms. Also, when executing a title color change performance in which the color changes from white to red, the title characters are displayed in a manner that makes them appear to glow for 200 ms 800 ms after the start of the title display period, after which the title characters change to red, and then the title end period begins after a further 1200 ms.

Therefore, after the start of the title display period, extended command B511 is received at the timing to execute the title color change effect, and lamp control is performed based on the brightness data table: Title Common Chance Up Red, so that during the period in which the title characters are displayed in a manner that appears to glow (the period up to 200 ms after extended command B511 is received), frame LEDs LWL1 to LWL12 and frame LEDs LWR2 to LWR12 and attacca lamps LA1 to LA4 flash white, logo LEDs LL1 to LL4 are turned off, and decorative LEDs LS1 to LS5 flash white (lamp control based on grandchild table (5) specified by the child table in Figure 11-80). In addition, until the title characters change to red and the title end period begins (the period from 200 ms after receiving extension command B511 until another 1,200 ms has passed), frame LEDs LWL1 to LWL12 and frame LEDs LWR2 to LWR12 and attacca lamps LA1 to LA4 light up in red and change brightness at 20 ms intervals, logo LEDs LL1 to LL4 light up in red and change brightness at 20 ms intervals, and decorative LEDs LS1 to LS5 light up in white and change brightness at 20 ms intervals (lamp control by grandchild table (6) specified by the child table in Figure 11-80). Also, during the title end period (the period 1,400 ms after receiving extension command B511) when the title characters move from their fixed position to the right and disappear, the frame LEDs LWL1-LWL12 and frame LEDs LWR2-LWR12 and the attacca lamps LA1-LA4 gradually turn off from red, the logo LEDs LL1-LL4 gradually turn off from red, and the decorative LEDs LS1-LS5 gradually turn off from white (lamp control by grandchild table (7) specified by the child table in Figure 11-80).

In addition, after 3000 ms has elapsed since the start of the title display part, the display control unit 123 receives an extended command (B400 or B40F) sent in conjunction with starting display control of the introductory part of the low base weak reach A and B performances, and the lamp control based on the brightness data table: title common chance up red ends and switches to lamp control based on the brightness data table corresponding to the introductory part of the low base weak reach A and B performances.

[Brightness data table used in title color change effect (gold)]
Figure 11-84 is a diagram showing the settings of the parent table of the Brightness Data Table: Title Common Chance Up Gold used when the display control unit 123 receives the extended command: B512 sent when performing display control of the title color change effect that changes the title text from white to gold, Figure 11-85 is a diagram showing the settings of the child table of the Brightness Data Table: Title Common Chance Up Gold, and Figures 11-86 to 11-88 are diagrams showing the settings of the grandchild table of the Brightness Data Table: Title Common Chance Up Gold.

When controlling the display of a title color change effect in which the title characters change from white to gold in the title display part of the low base weak reach A and B effects, the display control unit 123 transmits an extension command 512 at the timing when the title characters change (1,300 ms after the start of the title display part).

When the performance control CPU 120 receives the extension command B512, it specifies the parent table (Fig. 11-84) of the Title Common Chance Up Gold based on the extension command 512, and controls the lamps of the frame LEDs LWL1-LWL12 and frame LEDs LWR2-LWR12, logo LEDs LL1-LL4, decorative LEDs LS1-LS5, and attacca lamps LA1-LA4 by referring to the child table (Fig. 11-85) specified by the parent table, the grandchild tables (Figs. 11-86-88) specified by the child tables, and the brightness data specified by the grandchild tables.

As a result, the frame LEDs LWL1-LWL12 and frame LEDs LWR2-LWR12, and the attacca lamps LA1-LA4 will flash white at 40 ms intervals until 200 ms have elapsed, then they will light up in yellow until 1200 ms have elapsed, and their brightness will change at 20 ms intervals, after which they will gradually turn off from yellow at 280 ms, and will remain off until a new extended command is received.

In addition, the logo LEDs LL1 to LL4 will remain off until 200 ms have elapsed, then will remain red until 1200 ms have elapsed, with the brightness changing at 20 ms intervals, after which they will gradually turn off from red at 280 ms, and will remain off until a new extended command is received.

In addition, the decorative LEDs LS1 to LS5 flash white at 40 ms intervals until 200 ms have elapsed, then remain lit in white until 1200 ms have elapsed, with the brightness changing at 20 ms intervals, after which they gradually turn off from white at 280 ms, and remain off until a new extended command is received.

As shown in Figure 11-152 (B), the title display part in the low base weak reach A and B performances is the title start period from the start of 500 ms, followed by the title display period of 2200 ms, followed by the title end period of 300 ms. Also, when executing a title color change performance in which the color changes from white to gold, the title characters are displayed in a manner that makes them appear to glow for 200 ms 800 ms after the start of the title display period, after which the title characters change to gold, and after a further 1200 ms the transition to the title end period begins.

Therefore, after the start of the title display period, the extended command B512 is received at the timing to execute the title color change effect, and lamp control is performed based on the brightness data table: Title Common Chance Up Gold, so that during the period in which the title characters are displayed in a manner that appears to glow (the period up to 200 ms after receiving the extended command B512), the frame LEDs LWL1 to LWL12 and frame LEDs LWR2 to LWR12 and the attacca lamps LA1 to LA4 flash white, the logo LEDs LL1 to LL4 are turned off, and the decorative LEDs LS1 to LS5 flash white (lamp control based on the grandchild table (8) specified by the child table in Figure 11-85). In addition, until the title characters change to gold and the title end period begins (the period from 200 ms after receiving extension command B512 until another 1,200 ms has passed), frame LEDs LWL1 to LWL12 and frame LEDs LWR2 to LWR12 and attacca lamps LA1 to LA4 light up in yellow and change brightness at 20 ms intervals, logo LEDs LL1 to LL4 light up in red and change brightness at 20 ms intervals, and decorative LEDs LS1 to LS5 light up in white and change brightness at 20 ms intervals (lamp control by grandchild table (9) specified by the child table in Figure 11-85). Also, during the title end period (the period 1,400 ms after receiving extension command B512) when the title characters move from their fixed position to the right and disappear, the frame LEDs LWL1-LWL12 and frame LEDs LWR2-LWR12 and the attacca lamps LA1-LA4 gradually turn off from yellow, the logo LEDs LL1-LL4 gradually turn off from red, and the decorative LEDs LS1-LS5 gradually turn off from white (lamp control by grandchild table (10) specified by the child table in Figure 11-85).

In addition, after 3000 ms has elapsed since the start of the title display part, the display control unit 123 receives an extended command (B400 or B40F) sent in conjunction with starting display control of the introductory part of the low base weak reach A and B performances, and the lamp control based on the brightness data table: title common chance up gold ends and switches to lamp control based on the brightness data table corresponding to the introductory part of the low base weak reach A and B performances.

[Modification of the brightness data table used in the title color change effect]
In this embodiment, in the title display part of the low base weak reach A and B performances, regardless of whether or not a title change performance is performed, the performance control CPU 120 uses the brightness data table: weak reach common title to control the lamps of the frame LEDs LWL1 to LWL12 and the frame LEDs LWR2 to LWR12, and the attacca lamps LA1 to LA4. If a title change performance is not performed, the CPU 120 uses the brightness data table: weak reach common title to control the lamps of the frame LEDs LWL1 to LWL12 and the frame LEDs LWR2 to LWR12, and the attacca lamps LA1 to LA4. When lamp control is performed to perform a title change presentation, an extended command specifying title common chance up red or title common chance up gold, which is sent from the display control unit 123 at the timing of performing display control to change the color of the title characters, is received, and from the time the color of the title characters changes, lamp control of frame LEDs LWL1 to LWL12 and frame LEDs LWR2 to LWR12 and attacca lamps LA1 to LA4 is performed using the brightness data table: title common chance up red or title common chance up gold.

In contrast to this, in this modified example, the title display part of the low base weak reach A and B performances is provided with a brightness data table: weak reach common title (white) in which brightness data is set when no title change performance is performed, a brightness data table: weak reach common title (red) in which brightness data is set when a title change performance is performed in which the title characters change to red in the title display part of the low base weak reach A and B performances, and a brightness data table: weak reach common title (gold) in which brightness data is set when a title change performance is performed in which the title characters change to gold. When the display control unit 123 starts display control of the title display part of the low base weak reach A and B performances, if no title change performance is performed, the performance control CPU 120 uses the brightness data table: weak reach common title (white) to send an extension command that specifies the weak reach common title (white) to the frames LEDLWL1 to LWL12 and the frames LEDLWR2 to LWR12, the Attakkaran When the display control unit 123 starts display control of the title display part of the low base weak reach A and B performances, in order to perform a title change performance in which the title characters are changed to red, the performance control CPU 120 transmits an extension command that specifies the weak reach common title (red), and uses the brightness data table: weak reach common title (red) to control the frame LEDs LWL1 to LWL12 and the frame LEDs LWR2 to LWR12, the attacker lamps LA1 to LA4, When performing lamp control and the display control unit 123 starts display control of the title display part of the low base weak reach A and B performances, if a title change performance is performed in which the title characters change to gold, an extension command specifying the weak reach common title (gold) is sent, and the performance control CPU 120 performs lamp control of the frame LEDs LWL1-LWL12 and frame LEDs LWR2-LWR12, and the attacca lamps LA1-LA4 using the brightness data table: weak reach common title (gold).

This allows the performance control CPU 120 to control the frame LEDs LWL1-LWL12 and frame LEDs LWR2-LWR12, and the attacca lamps LA1-LA4 in a lighting mode that corresponds to each situation: when no title change performance is performed in the title display part of the base weak reach A and B performances, when a title change performance in which the title characters change to red is performed, or when a title change performance in which the title characters change to gold is performed.

[Brightness data table used in the introduction part of the low base weak reach A performance]
Fig. 11-89 is a diagram showing the setting contents of the parent table of the brightness data table: weak reach system weak reach A introduction, which is used when the display control unit 123 receives the extension command: B400 sent when performing display control of the introduction part in the low base weak reach A performance, Fig. 11-90 is a diagram showing the setting contents of the child table of the brightness data table: weak reach system weak reach A introduction, and Figs. 11-91 to 11-95 are diagrams showing the setting contents of the grandchild table of the brightness data table: weak reach system weak reach A introduction. Note that the child table and grandchild table are omitted except for some setting contents.

When the performance control CPU 120 receives the extension command B400, it specifies the parent table (Fig. 11-89) for the weak reach system weak reach A introduction based on the extension command B400, and controls the lamps of the frame LEDs LWL1-LWL12 and frame LEDs LWR2-LWR12, logo LEDs LL1-LL4, decorative LEDs LS1-LS5, and attacca lamps LA1-LA4 by referring to the child table (Fig. 11-90) specified by the parent table, the grandchild tables (Figs. 11-91 to 95) specified by the child table, and the brightness data specified by the grandchild tables.

In particular, the child table shown in Figure 11-90 has a grandchild table set with an execution time corresponding to the time when the performance scene changes in the introductory part of the low base weak reach A performance, an illumination color corresponding to the performance scene, and an illumination mode, and further, the grandchild tables shown in Figures 11-91 to 95 have brightness data set with illumination color and illumination mode corresponding to the characters etc. appearing in the performance scene.

As a result, the frame LEDs LWL1-LWL12 and frame LEDs LWR2-LWR12, the attacca lamps LA1-LA4, the logo LEDs LL1-LL4, and the decorative LEDs LS1-LS5 will change color and pattern according to the scene and characters appearing in the introductory part of the low base weak reach A performance.

[Brightness data table used in the introduction part of the low base weak reach B performance]
Fig. 11-96 is a diagram showing the setting contents of the parent table of the brightness data table: weak reach system weak reach B introduction used when the display control unit 123 receives the extension command: B40F sent when performing display control of the introduction part in the low base weak reach B performance, Fig. 11-97 is a diagram showing the setting contents of the child table of the brightness data table: weak reach system weak reach B introduction, and Figs. 11-99 to 11-103 are diagrams showing the setting contents of the grandchild table of the brightness data table: weak reach system weak reach B introduction. Note that the child table and grandchild table are omitted except for some setting contents.

When the performance control CPU 120 receives the extension command B40F, it specifies the parent table (Fig. 11-96) for the weak reach system weak reach B introduction based on the extension command B40F, and controls the lamps of the frame LEDs LWL1-LWL12 and frame LEDs LWR2-LWR12, logo LEDs LL1-LL4, decorative LEDs LS1-LS5, and attacca lamps LA1-LA4 by referring to the child table (Fig. 11-97) specified by the parent table, the grandchild tables (Figs. 11-98 to 103) specified by the child tables, and the brightness data specified by the grandchild tables.

In particular, the child table shown in Figure 11-97 has a grandchild table set with an execution time corresponding to the time when the scene of the performance changes in the introductory part of the low base weak reach B performance, and an illumination color and illumination mode corresponding to the performance scene, and further, the grandchild tables shown in Figures 11-98 to 103 have brightness data set with illumination color and illumination mode corresponding to the characters etc. appearing in the performance scene.

As a result, the frame LEDs LWL1-LWL12 and frame LEDs LWR2-LWR12, the attacca lamps LA1-LA4, the logo LEDs LL1-LL4, and the decorative LEDs LS1-LS5 will change color and pattern to match the scene and characters appearing in the introductory part of the low base weak reach B performance.

[Brightness data table used in the title display part of low base strong reach A to C effects]
Figure 11-104 is a diagram showing the setting contents of the parent table of the brightness data table: strong reach common title used when the display control unit 123 receives the extension command: B517 sent when performing display control of the title display part in the low base strong reach A to C performance, Figure 11-105 is a diagram showing the setting contents of the child table of the brightness data table: strong reach common title, and Figures 11-106 to 11-109 are diagrams showing the setting contents of the grandchild table of the brightness data table: strong reach common title.

When the performance control CPU 120 receives the extension command B517, it specifies the parent table (Fig. 11-105) of the strong reach common title based on the extension command B517, and controls the lamps of the frame LEDs LWL1-LWL12 and frame LEDs LWR2-LWR12, logo LEDs LL1-LL4, decorative LEDs LS1-LS5, and attacca lamps LA1-LA4 by referring to the child table (Fig. 11-106) specified by the parent table, the grandchild tables (Figs. 11-107-109) specified by the child table, and the brightness data specified by the grandchild tables.

In particular, the child table shown in Figure 11-106 is set with grandchild tables that set the execution time corresponding to the time when the performance scenes change, such as the prologue display period, title start period, title display period, and title end period that make up the title display part in the low base strong reach A to C performance, as well as the light emission color and light emission mode corresponding to the performance scene, and further, the grandchild tables shown in Figures 11-107 to 109 are set with brightness data that sets the light emission color and light emission mode corresponding to the characters that appear in the performance scene.

As a result, the frame LEDs LWL1-LWL12 and frame LEDs LWR2-LWR12, the Attacka Lamps LA1-LA4, the logo LEDs LL1-LL4, and the decorative LEDs LS1-LS5 will change color and pattern according to the scene and characters appearing in the title display part of the low base strong reach A-C performance.

[Brightness data table used in the introductory part of the low base strong reach A performance]
Fig. 11-110 is a diagram showing the setting contents of the parent table of the brightness data table: strong reach system strong reach A introduction, which is used when the display control unit 123 receives the extension command: B500 transmitted when performing display control of the introduction part in the low base strong reach A performance, Fig. 11-111 is a diagram showing the setting contents of the child table of the brightness data table: strong reach system strong reach A introduction, and Fig. 11-112 to Fig. 11-117 are diagrams showing the setting contents of the grandchild table of the brightness data table: strong reach system strong reach A introduction. Note that the child table and grandchild table are omitted except for some setting contents.

When the performance control CPU 120 receives the extended command B500, it specifies the parent table (Fig. 11-110) for the strong reach system strong reach A introduction based on the extended command B500, and controls the lamps of the frame LEDs LWL1-LWL12 and frame LEDs LWR2-LWR12, logo LEDs LL1-LL4, decorative LEDs LS1-LS5, and attacca lamps LA1-LA4 by referring to the child table (Fig. 11-111) specified by the parent table, the grandchild tables (Figs. 11-112 to 117) specified by the child tables, and the brightness data specified by the grandchild tables.

In particular, the child table shown in Figure 11-111 has a grandchild table set with an execution time corresponding to the time when the performance scene changes in the introductory part of the low base strong reach A performance, an illumination color corresponding to the performance scene, and illumination mode, and further, the grandchild tables shown in Figures 11-112 to 117 have brightness data set with illumination color and illumination mode corresponding to the characters etc. appearing in the performance scene.

As a result, the frame LEDs LWL1-LWL12 and frame LEDs LWR2-LWR12, the attacca lamps LA1-LA4, the logo LEDs LL1-LL4, and the decorative LEDs LS1-LS5 will change color and pattern according to the scene and characters appearing in the introductory part of the low base strong reach A performance.

[Brightness data table used in the introduction part of the low base strong reach B performance]
Fig. 11-118 is a diagram showing the setting contents of the parent table of the brightness data table: strong reach system strong reach B introduction, which is used when the display control unit 123 receives the extension command: B504 sent when performing display control of the introduction part in the low base strong reach B performance, Fig. 11-119 is a diagram showing the setting contents of the child table of the brightness data table: strong reach system strong reach B introduction, and Fig. 11-120 to Fig. 11-124 are diagrams showing the setting contents of the grandchild table of the brightness data table: strong reach system strong reach B introduction. Note that the child table and grandchild table are omitted except for some setting contents.

When the performance control CPU 120 receives the extension command B504, it specifies the parent table (Fig. 11-118) for the strong reach system strong reach B introduction based on the extension command B504, and controls the lamps of the frame LEDs LWL1-LWL12 and frame LEDs LWR2-LWR12, logo LEDs LL1-LL4, decorative LEDs LS1-LS5, and attacca lamps LA1-LA4 by referring to the child table (Fig. 11-119) specified by the parent table, the grandchild tables (Figs. 11-120-124) specified by the child tables, and the brightness data specified by the grandchild tables.

In particular, the child table shown in Figure 11-119 has a grandchild table set with an execution time corresponding to the time when the scene of the performance changes in the introductory part of the low base strong reach B performance, and an illumination color and illumination mode corresponding to the performance scene, and further, the grandchild tables shown in Figures 11-120 to 124 have brightness data set with illumination color and illumination mode corresponding to the characters etc. appearing in the performance scene.

As a result, the frame LEDs LWL1-LWL12 and frame LEDs LWR2-LWR12, the attacca lamps LA1-LA4, the logo LEDs LL1-LL4, and the decorative LEDs LS1-LS5 will change color and pattern according to the scene and characters appearing in the introductory part of the low base strong reach B performance.

[Brightness data table used in the introductory part of low base strong reach C performance]
When the performance control CPU 120 receives the extension command B505 transmitted when the display control unit 123 performs display control of the introductory part in a low base strong reach C performance, it specifies a parent table (not shown) for the strong reach C introduction of the strong reach system based on the extension command B505, and performs lamp control of frame LEDs LWL1 to LWL12 and frame LEDs LWR2 to LWR12, logo LEDs LL1 to LL4, decorative LEDs LS1 to LS5, and attacca lamps LA1 to LA4 by referring to the child table (not shown) specified by the parent table, the grandchild table (not shown) specified by the child table, and the brightness data specified by the grandchild table.

In particular, the child table of the strong reach system strong reach C introduction has a grandchild table set with an execution time corresponding to the time when the performance scene changes in the introductory part of the low base strong reach C performance, an illumination color corresponding to the performance scene, and an illumination mode, and further, the grandchild table of the strong reach system strong reach C introduction has brightness data set with an illumination color and illumination mode corresponding to the characters etc. appearing in the performance scene in the introductory part of the low base strong reach C performance.

As a result, the frame LEDs LWL1-LWL12 and frame LEDs LWR2-LWR12, the attacca lamps LA1-LA4, the logo LEDs LL1-LL4, and the decorative LEDs LS1-LS5 will change color and pattern according to the scene and characters that appear in the introductory part of the low base strong reach C performance.

[Brightness data table used in low-base strongest reach performance]
Fig. 11-125 is a diagram showing the setting contents of the parent table of the brightness data table: strongest reach system strongest reach title introduction, which is used when the display control unit 123 receives the extension command: B600 sent when performing display control of the low-base strongest reach performance, Fig. 11-126 is a diagram showing the setting contents of the child table of the brightness data table: strongest reach system strongest reach title introduction, and Fig. 11-127 to Fig. 11-135 are diagrams showing the setting contents of the grandchild table of the brightness data table: strongest reach system strongest reach title introduction. Note that the child table and grandchild table are omitted except for some setting contents.

When the performance control CPU 120 receives the extension command B600, it specifies the parent table (Fig. 11-126) for the strongest reach system strongest reach title introduction based on the extension command B600, and controls the lamps of the frame LEDs LWL1-LWL12 and frame LEDs LWR2-LWR12, logo LEDs LL1-LL4, decorative LEDs LS1-LS5, and attacca lamps LA1-LA4 by referring to the child table (Fig. 11-127) specified by the parent table, the grandchild tables (Figs. 11-128 to 135) specified by the child table, and the brightness data specified by the grandchild tables.

In particular, the child table shown in Figure 11-126 has a grandchild table set with an execution time corresponding to the time it takes for the performance scene to change from the title display part of the low base strongest reach performance to the end of the introductory part, and a light emission color and light emission mode corresponding to the performance scene, and further, the grandchild tables shown in Figures 11-127 to 135 have brightness data set with light emission color and light emission mode corresponding to the characters etc. appearing in the performance scene.

As a result, the frame LEDs LWL1-LWL12 and frame LEDs LWR2-LWR12, the Attacka Lamps LA1-LA4, the logo LEDs LL1-LL4, and the decorative LEDs LS1-LS5 will change color and pattern according to the scene and characters that appear in the introductory part of the low base strongest reach performance.

[Brightness data table used in the title display part of high base reach A to D performance]
Figure 11-136 is a diagram showing the setting contents of the parent table of the brightness data table: high bass reach common title used when the display control unit 123 receives the extended command: B605 sent when performing display control of the title display part in the high bass reach A to D performances, Figure 11-137 is a diagram showing the setting contents of the child table of the brightness data table: high bass reach common title, and Figures 11-138 to 11-140 are diagrams showing the setting contents of the grandchild table of the brightness data table: high bass reach common title.

When the performance control CPU 120 receives the extension command B605, it specifies the parent table (Fig. 11-136) of the high base reach common title based on the extension command B605, and controls the lamps of the frame LEDs LWL1-LWL12 and frame LEDs LWR2-LWR12, logo LEDs LL1-LL4, decorative LEDs LS1-LS5, and attacca lamps LA1-LA4 by referring to the child table (Fig. 11-137) specified by the parent table, the grandchild table (Fig. 11-138-140) specified by the child table, and the brightness data specified by the grandchild table.

In particular, the child table shown in Figure 11-137 is set with grandchild tables that set the execution time corresponding to the time when the performance scene changes, such as the title start period, title display period, and title end period that make up the title display part in the high base reach A to D performance, and the light emission color and light emission mode corresponding to the performance scene, and further, the grandchild tables shown in Figures 11-138 to 140 are set with brightness data that sets the light emission color and light emission mode corresponding to the characters, etc. that appear in the performance scene.

As a result, the frame LEDs LWL1-LWL12 and frame LEDs LWR2-LWR12, the attacca lamps LA1-LA4, the logo LEDs LL1-LL4, and the decorative LEDs LS1-LS5 will change color and pattern according to the scenes and characters appearing in the title display parts of the high base reach A-D performances.

[Brightness data table used in the introduction part of high base reach A performance]
Fig. 11-141 is a diagram showing the setting contents of the parent table of the brightness data table: high base reach type reach A introduction used when the display control unit 123 receives the extension command: B606 sent when performing display control of the introduction part in the high base reach A performance, Fig. 11-142 is a diagram showing the setting contents of the child table of the brightness data table: high base reach type reach A introduction, and Figs. 11-143 to 11-145 are diagrams showing the setting contents of the grandchild table of the brightness data table: high base reach type reach A introduction. Note that the child table and grandchild table have been omitted except for some setting contents.

When the performance control CPU 120 receives the extension command B606, it specifies the parent table (Fig. 11-141) for the introduction of high base reach type reach A based on the extension command B606, and controls the lamps of the frame LEDs LWL1-LWL12 and frame LEDs LWR2-LWR12, logo LEDs LL1-LL4, decorative LEDs LS1-LS5, and attacca lamps LA1-LA4 by referring to the child table (Fig. 11-142) specified by the parent table, the grandchild tables (Figs. 11-143 to 145) specified by the child table, and the brightness data specified by the grandchild tables.

In particular, the child table shown in Figure 11-142 has a grandchild table set with an execution time corresponding to the time when the performance scene changes in the introductory part of the high base reach A performance, and an illumination color and illumination mode corresponding to the performance scene, and further, the grandchild tables shown in Figures 11-143 to 145 have brightness data set with illumination color and illumination mode corresponding to the characters etc. appearing in the performance scene.

As a result, the frame LEDs LWL1-LWL12 and frame LEDs LWR2-LWR12, the attacca lamps LA1-LA4, the logo LEDs LL1-LL4, and the decorative LEDs LS1-LS5 will change color and pattern according to the scene and characters appearing in the introductory part of the high base reach A performance.

[Brightness data table used in the introduction part of high base reach B performance]
Fig. 11-146 is a diagram showing the setting contents of the brightness data table: parent table of high base reach type reach B introduction used when the display control unit 123 receives the extension command: B607 transmitted when performing display control of the introduction part in the high base reach B performance, and Fig. 11-147 is a diagram showing the setting contents of the brightness data table: child table of high base reach type reach B introduction. Note that the child table is omitted except for some setting contents, and all grandchild tables are omitted.

When the performance control CPU 120 receives the extension command B607, it specifies the parent table (Fig. 11-146) for the introduction of the high base reach type reach B based on the extension command B607, and controls the lamps of the frame LEDs LWL1-LWL12 and frame LEDs LWR2-LWR12, logo LEDs LL1-LL4, decorative LEDs LS1-LS5, and attacca lamps LA1-LA4 by referring to the child table (Fig. 11-147) specified by the parent table, the grandchild table (not shown) specified by the child table, and the brightness data specified by the grandchild table.

In particular, the child table shown in Figure 11-147 has a grandchild table set with an execution time corresponding to the time when the performance scene changes in the introductory part of the high base reach B performance, an illumination color corresponding to the performance scene, and illumination mode, and further, the grandchild table for the high base reach type reach B introduction has brightness data set with illumination color and illumination mode corresponding to the characters etc. that appear in the performance scene in the introductory part of the high base reach B performance.

As a result, the frame LEDs LWL1-LWL12 and frame LEDs LWR2-LWR12, the attacca lamps LA1-LA4, the logo LEDs LL1-LL4, and the decorative LEDs LS1-LS5 will change color and pattern according to the scene and characters appearing in the introductory part of the high base reach B performance.

[Brightness data table used in the introduction part of high base reach C performance]
Fig. 11-148 is a diagram showing the setting contents of the brightness data table: parent table of high base reach type reach C introduction used when the display control unit 123 receives the extension command: B608 transmitted when performing display control of the introduction part in the high base reach C performance, and Fig. 11-149 is a diagram showing the setting contents of the brightness data table: child table of high base reach type reach C introduction. Note that the child table is omitted except for some setting contents, and all grandchild tables are omitted.

When the performance control CPU 120 receives the extension command B608, it specifies the parent table (Fig. 11-148) for the introduction of the high base reach type reach C based on the extension command B608, and controls the lamps of the frame LEDs LWL1-LWL12 and frame LEDs LWR2-LWR12, logo LEDs LL1-LL4, decorative LEDs LS1-LS5, and attacca lamps LA1-LA4 by referring to the child table (Fig. 11-149) specified by the parent table, the grandchild table (not shown) specified by the child table, and the brightness data specified by the grandchild table.

In particular, the child table shown in Figure 11-148 has a grandchild table set with an execution time corresponding to the time when the performance scene changes in the introductory part of the high base reach C performance, an illumination color corresponding to the performance scene, and illumination mode, and further, the grandchild table for the high base reach type reach C introduction has brightness data set with illumination color and illumination mode corresponding to the characters etc. that appear in the performance scene in the introductory part of the high base reach C performance.

As a result, the frame LEDs LWL1-LWL12 and frame LEDs LWR2-LWR12, the attacca lamps LA1-LA4, the logo LEDs LL1-LL4, and the decorative LEDs LS1-LS5 will change color and pattern according to the scene and characters appearing in the introductory part of the high base reach C performance.

[Brightness data table used in the introduction part of high base reach D performance]
Fig. 11-150 is a diagram showing the setting contents of the brightness data table: parent table of high bass reach type reach D introduction used when the display control unit 123 receives the extension command: B609 transmitted when performing display control of the introduction part in the high bass reach D performance, and Fig. 11-151 is a diagram showing the setting contents of the brightness data table: child table of high bass reach type reach D introduction. Note that the child table is omitted except for some setting contents, and all grandchild tables are omitted.

When the performance control CPU 120 receives the extension command B609, it specifies the parent table (Fig. 11-150) for the introduction of the high base reach type reach D based on the extension command B609, and controls the lamps of the frame LEDs LWL1-LWL12 and frame LEDs LWR2-LWR12, logo LEDs LL1-LL4, decorative LEDs LS1-LS5, and attacca lamps LA1-LA4 by referring to the child table (Fig. 11-151) specified by the parent table, the grandchild table (not shown) specified by the child table, and the brightness data specified by the grandchild table.

In particular, the child table shown in Figure 11-150 has a grandchild table set with an execution time corresponding to the time when the performance scene changes in the introductory part of the high base reach D performance, an illumination color corresponding to the performance scene, and illumination mode, and further, the grandchild table for the high base reach type reach D introduction has brightness data set with illumination color and illumination mode corresponding to the characters etc. appearing in the performance scene in the introductory part of the high base reach D performance.

As a result, the frame LEDs LWL1-LWL12 and frame LEDs LWR2-LWR12, the attacca lamps LA1-LA4, the logo LEDs LL1-LL4, and the decorative LEDs LS1-LS5 will change color and pattern according to the scene and characters appearing in the introductory part of the high base reach D performance.

[Effect 1]
In this embodiment, the performance control CPU 120 can execute a super reach performance after the decorative pattern displayed on the image display device 5 becomes a reach state. The super reach performance is composed of a title display part that displays the corresponding title character, and an introduction part until the performance result is notified. Then, the decorative pattern is displayed in a reach state before the title display part in the super reach performance, and the title character corresponding to the super reach performance is displayed in the title display part so as to use the display position of the decorative pattern that has become a reach state. In this way, when the decorative pattern becomes a reach state, the player will pay attention to which decorative pattern has become a reach state, but by displaying the title character corresponding to the super reach performance using the display position of the decorative pattern that has become a reach state in the title display part in the super reach performance, the player can naturally pay attention to the title character, and as a result, the title display can be performed preferably.

In addition, since the likelihood of a big win differs depending on whether the decorative pattern that has reached the reach state is an odd number pattern or an even number pattern, when the decorative pattern reaches the reach state, the player will pay attention to which decorative pattern has reached the reach state, which will also draw more attention to the title text.

In addition, a decorative symbol (large) is displayed in reach mode before the title display part in the Super Reach performance, and then the decorative symbol (large) displayed in reach mode is reduced to a smaller decorative symbol (small), and the title characters corresponding to the Super Reach performance are displayed in a position that uses the reduced decorative symbol (small). In this way, the reduced display of the decorative symbol (large) attracts the player's attention, and the title characters corresponding to the Super Reach performance are displayed in a position that uses the reduced decorative symbol (small), making it easier to draw attention to the title characters.

In addition, in the title display part of the Super Reach performance, at the timing when the decorative pattern in the reach mode is displayed, the title text corresponding to the Super Reach performance is displayed so that it overlaps with the decorative pattern in the reach mode, making it easier to focus attention on the title text.

In addition, the super reach effects include low base weak reach A and B effects, and low base strong reach A to C effects, which have a higher chance of winning than the low base weak reach A and B effects. The title characters corresponding to the low base weak reach A and B effects and the title characters corresponding to the low base strong reach A to C effects appear overlapping with one of the decorative patterns (the decorative pattern on the left) of the decorative patterns that have become a reach mode, making it easier to draw attention to the title display.

The Super Reach effect also includes a low base strongest reach effect, which has a higher chance of winning than the low base strong reach effects A to C, and the title characters corresponding to the low base strongest reach effect appear overlapping with both decorative patterns (decorative patterns on both sides) that have reached the reach state, allowing the title characters corresponding to the low base strongest reach effect to be displayed in a more impactful manner.

In addition, the title characters corresponding to the low base weak reach A and B effects, the title characters corresponding to the low base strong reach A to C effects, and the title characters corresponding to the low base strongest reach effects appear overlapping with one of the decorative patterns that have reached the reach state (the decorative pattern on the left) or both decorative patterns (the decorative patterns on both sides) and are then displayed in their fixed positions, and even during the period when they are displayed in their fixed positions, they are displayed overlapping with a portion of the decorative patterns on both sides that have reached the reach state, making it easier to draw attention to the title characters even after they are displayed in their fixed positions.

In addition, the performance control CPU 120 uses a brightness data table composed of brightness data to control the game effect lamps 9 (frame LEDs LWL1 to LWL12, frame LEDs LWR2 to LWR12, logo LEDs LL1 to LL4, decorative LEDs LS1 to LS5, and attakka lamps LA1 to LA4), and in the title display part of the super reach performance, uses a brightness data table for title display (weak reach system common title, strong reach system common title, high base reach system The game effect lamp 9 is controlled using a brightness data table for the introduction part (introduction of weak reach A for weak reach systems, introduction of weak reach B for weak reach systems, introduction of strong reach A for strong reach systems, introduction of strong reach B for strong reach systems, introduction of strong reach C for strong reach systems, introduction of reach A for high base reach systems, introduction of reach B for high base reach systems, introduction of reach C for high base reach systems, introduction of reach D for high base reach systems). In this way, in the title display part of the super reach performance, the game effect lamp 9 is controlled using a brightness data table for title display that is different from the brightness data table for the introduction part, so that the game effect lamp 9 can be illuminated in a suitable illumination mode according to the title display. As a result of these, the title display can be performed suitably.

[Effect 2]
In this embodiment, after the decorative pattern displayed on the image display device 5 becomes a reach state, the performance control CPU 120 can execute the low base weak reach A, B performance and the low base strong reach A to C performance. The low base weak reach A, B performance and the low base strong reach A to C performance are each composed of a title display part that displays the corresponding title character and an introduction part until the performance result is announced. When an odd-numbered decorative pattern is displayed in a reach state before the title display part in the low base weak reach A, B performance, the title characters corresponding to the low base weak reach A, B performance are displayed in the title display part so as to use the display position of the odd-numbered decorative pattern in the reach state, when an even-numbered decorative pattern is displayed in a reach state before the title display part in the low base weak reach A, B performance, the title characters corresponding to the low base weak reach A, B performance are displayed in the title display part so as to use the display position of the even-numbered decorative pattern in the reach state, when an odd-numbered decorative pattern is displayed in a reach state before the title display part in the low base strong reach A to C performance, the title characters corresponding to the low base strong reach A to C performance are displayed in the title display part so as to use the display position of the odd-numbered decorative pattern in the reach state, and when an even-numbered decorative pattern is displayed in a reach state before the title display part in the low base strong reach A to C performance, the title characters corresponding to the low base strong reach A to C performance are displayed in the title display part so as to use the display position of the even-numbered decorative pattern in the reach state. By doing this, when a decorative pattern reaches a reach state, the player will pay attention to which decorative pattern has reached the reach state. However, by displaying the title letters corresponding to the low base weak reach A, B effects and the low base strong reach A to C effects using the display position of the decorative pattern that has reached the reach state in the title display part of the low base weak reach A, B effects and the low base strong reach A to C effects, the player can naturally pay attention to the title letters, and as a result, the title can be displayed in an optimal manner.

In addition, since the likelihood of a big win differs depending on whether the decorative pattern that has reached the reach state is an odd number pattern or an even number pattern, when the decorative pattern reaches the reach state, the player will pay attention to which decorative pattern has reached the reach state, which will also draw more attention to the title text.

[Effect 3]
In this embodiment, the performance control CPU 120 can execute low base weak reach A, B performance, low base strong reach A to C performance, and low base strongest reach performance after the decorative pattern displayed on the image display device 5 becomes a reach state. The low base weak reach A, B performance, low base strong reach A to C performance, and low base strongest reach performance are each composed of a title display part that displays the corresponding title character, and an introduction part until the performance result is announced. When an odd-numbered decorative pattern is displayed in a reach state before the title display part in the low base weak reach A, B performance, the title characters corresponding to the low base weak reach A, B performance are displayed in the title display part using the display position of the odd-numbered decorative pattern that has become the reach state, when an even-numbered decorative pattern is displayed in a reach state before the title display part in the low base weak reach A, B performance, the title characters corresponding to the low base weak reach A, B performance are displayed in the title display part using the display position of the even-numbered decorative pattern that has become the reach state, when an odd-numbered decorative pattern is displayed in a reach state before the title display part in the low base strong reach A to C performance, the title characters corresponding to the low base strong reach A to C performance are displayed in the title display part using the display position of the odd-numbered decorative pattern that has become the reach state. When an even-numbered decorative pattern is displayed in a reach state before the title display part in the low base strong reach A to C performances, title characters corresponding to the low base strong reach A to C performances are displayed in the title display part so as to use the display position of the even-numbered decorative pattern in the reach state, when an odd-numbered decorative pattern is displayed in a reach state before the title display part in the low base strongest reach performance, title characters corresponding to the low base strongest reach performance are displayed in the title display part so as to use the display position of the odd-numbered decorative pattern in the reach state, and when an even-numbered decorative pattern is displayed in a reach state before the title display part in the low base strongest reach performance, title characters corresponding to the low base strongest reach performance are displayed in the title display part so as to use the display position of the even-numbered decorative pattern in the reach state. By doing this, when a decorative pattern reaches a reach state, the player will pay attention to which decorative pattern has reached the reach state. However, by displaying the title letters corresponding to the low base weak reach A, B effects, the low base strong reach A-C effects, and the low base strongest reach effects using the display positions of the decorative patterns that have reached the reach state in the title display parts of the low base weak reach A, B effects, the low base strong reach A-C effects, and the low base strongest reach effects, the player can naturally pay attention to the title letters, and as a result, the title display can be performed preferably.

In addition, since the likelihood of a big win differs depending on whether the decorative pattern that has reached the reach state is an odd number pattern or an even number pattern, when the decorative pattern reaches the reach state, the player will pay attention to which decorative pattern has reached the reach state, which will also draw more attention to the title text.

[Effect 4]
In this embodiment, the performance control CPU 120 can execute a super reach performance after the decorative pattern displayed on the image display device 5 becomes a reach state. The super reach performance is composed of a title display part that displays the corresponding title character, and an introduction part until the performance result is notified. Then, the decorative pattern is displayed in a reach state before the title display part in the super reach performance, and the title character corresponding to the super reach performance is displayed in the title display part so as to use the display position of the decorative pattern that has become a reach state. In this way, when the decorative pattern becomes a reach state, the player will pay attention to which decorative pattern has become a reach state, but by displaying the title character corresponding to the super reach performance using the display position of the decorative pattern that has become a reach state in the title display part in the super reach performance, the player can naturally pay attention to the title character, and as a result, the title display can be performed preferably.

In addition, the performance control CPU 120 uses a brightness data table composed of brightness data to control the game effect lamps 9 (frame LEDs LWL1 to LWL12, frame LEDs LWR2 to LWR12, logo LEDs LL1 to LL4, decorative LEDs LS1 to LS5, and attakka lamps LA1 to LA4), and in the title display part of the super reach performance, uses a brightness data table for title display (weak reach system common title, strong reach system common title, high base reach system The game effect lamp 9 is controlled using a brightness data table for the introduction part (introduction of weak reach A for weak reach systems, introduction of weak reach B for weak reach systems, introduction of strong reach A for strong reach systems, introduction of strong reach B for strong reach systems, introduction of strong reach C for strong reach systems, introduction of reach A for high base reach systems, introduction of reach B for high base reach systems, introduction of reach C for high base reach systems, introduction of reach D for high base reach systems). In this way, in the title display part of the super reach performance, the game effect lamp 9 is controlled using a brightness data table for title display that is different from the brightness data table for the introduction part, so that the game effect lamp 9 can be illuminated in a suitable illumination mode according to the title display. As a result of these, the title display can be performed suitably.

[Effect 5]
In this embodiment, the performance control CPU 120 can execute a low base strong reach B performance that has a higher expectation of a jackpot than the low base weak reach B performance and the low base weak reach B performance. The low base weak reach B performance and the low base strong reach B performance are composed of both a title display part that displays the corresponding title character and an introduction part until the performance result is announced. In addition, in the low base weak reach B performance, the ally character "Yume Yume" and the enemy character "Boingo" are used, and the ally character "Yume Yume" announces that a jackpot will be reached, and in the low base strong reach B performance, the ally characters "Jam" and "Nana" and the enemy character "Robo" are used, and the ally characters "Jam" and "Nana" announce that a jackpot will be reached. In the introductory part of the low base strong reach B performance, the display is started in a manner in which the ally characters "Jam" and "Nana" are arranged in the foreground and the enemy character "Robo" is arranged in the background, and in the introductory part of the low base weak reach B performance, the display is started in a manner in which the ally character "Yume Yume" is arranged in the foreground and the enemy character "Boingo" is not arranged in the background (ally character "Yume Yume" and enemy character "Boingo" are arranged facing each other on the left and right). In this way, for the low base weak reach B performance, which has a relatively high expectation of a jackpot, the ally characters "Jam" and "Nana", which are notified of a jackpot, are arranged in the foreground and the enemy character "Robo" is arranged in the background, allowing the player to empathize and making it easier for the player to intuitively recognize that the expectation of a jackpot is high, and as a result, the title can be displayed appropriately.

Also, ally characters are characters who are given benefits if they win a battle, and enemy characters are characters who are not given benefits if they win a battle, and at the start of the introductory part of the low base strong reach B performance, the ally characters "Jam" and "Nana" are displayed in a position in front with their backs to you, and the enemy character "Robo" is displayed in a position in the back facing you, with the ally characters "Jam" and "Nana" facing the enemy character "Robo", and for the low base strong reach B performance, which has a relatively high expectation, the player and the ally characters "Jam" and "Nana" are facing in the same direction, making it easier for the player to empathize and recognize that there is a high expectation of a jackpot.

In addition, in the introductory part of the low base strong reach B performance, the ally characters "Jam" and "Nana" and the enemy character "Robo" are displayed in a position that includes the display area where the title characters were displayed in the title display part, so that when the title characters disappear, the player who was focusing on the title characters will naturally turn their attention to the ally characters "Jam" and "Nana" and the enemy character "Robo".

[Effect 6]
In this embodiment, the performance control CPU 120 can execute low base strong reach A to C performances that have a higher jackpot expectation than the low base weak reach A and B performances and a longer performance time than the low base weak reach A and B performances. The low base weak reach A and B performances and the low base strong reach A to C performances are each composed of a title display part that displays the corresponding title characters and an introduction part until the performance result is notified. In addition, the low base weak reach A and B performances and the low base strong reach A to C performances all use dialogue subtitles. In the low base weak reach A and B performances, the title characters and dialogue subtitles are displayed in the title display part, and in the introduction part, the dialogue subtitles that were displayed in the title display part are continuously displayed, while in the low base strong reach A to C performances, the dialogue subtitles are not displayed in the title display part, and the title characters are displayed. In this manner, the low base strong reach A to C effects, which have a relatively high probability of winning and a long execution time, are displayed so that the title text and dialogue subtitles do not overlap as much as possible, while in the low base weak reach A and B effects, which have a relatively low probability of winning and a short execution time, even if the dialogue subtitles and title text overlap, the display of the title text is completed first so that the player can also focus on the dialogue subtitles, making it possible to provide the title text and dialogue subtitles appropriately, and as a result, the title can be displayed appropriately.

In addition, when the title text and dialogue subtitles are displayed in the title display part in the low base weak reach A and B performances, in the subsequent introductory part, the performance scene does not change until the dialogue subtitles that were displayed simultaneously with the title text end, so it is possible to draw attention to the title text and then to the dialogue subtitles.

In addition, when title text and dialogue subtitles are displayed in the title display part in the low base weak reach A and B performances, the audio corresponding to the dialogue subtitles is output while the audio corresponding to the title text is not output, making it easier to hear the audio corresponding to the dialogue subtitles.

[Effect 7]
In this embodiment, the performance control CPU 120 can execute the low base strongest reach performance and the high base reach A to D performance. The low base strongest reach performance and the high base reach A to D performance are configured to include both a title display part that displays the corresponding title character and an introduction part until the performance result is announced. In addition, the title display of the low base strongest reach performance and the high base reach A to D performance is composed of multiple characters ("Catch the explosive chu with six people!", "Battle reach A (Battle reach B to D)"). Then, in the title display part of the low base strongest reach performance and the high base reach A to D performance, the title characters are started to be displayed at an enlarged size where only a portion of the multiple characters are visible, and the display size is gradually reduced from the enlarged size, and the title characters are displayed at a reduced size where all of the multiple characters are visible. In this way, in the title display part of the low base strongest reach performance and the high base reach A to D performance, the multiple characters are displayed at an enlarged size where only a portion of the multiple characters are visible, and then the size gradually becomes smaller until the title characters are displayed at a reduced size where all of the characters are visible, which allows the player to focus their attention on the title characters.

Also, before the title display part of the low base strongest reach performance starts, the movable body 32 is operated so as to overlap with the front side of the image display device 5, and a background dedicated to the falling performance is displayed during the period in which the falling performance is executed from when the movable body 32 operates until the movable body 32 returns to its initial position, and when the movable body 32 returns to its initial position, the title characters are displayed in an enlarged size in which not all of the characters that make up the title characters are visible and the display area is filled so that the background becomes unvisible, and then the reduced-sized title characters and a background dedicated to the title display are displayed. In this way, the title characters are displayed in an impactful way, while at the same time the background can be switched without any sense of incongruity, allowing the title characters to be viewed favorably by the player.

In addition, the performance control CPU 120 controls the game effect lamps 9 (frame LEDs LWL1-LWL12, frame LEDs LWR2-LWR12, logo LEDs LL1-LL4, decorative LEDs LS1-LS5, attacca lamps LA1-LA4) using a brightness data table composed of brightness data, and in the title display part of the high base reach A-D performances, it controls the game effect lamps 9 using a brightness data table for title display (common title for high base reach systems), and in the introduction part of the high base reach A-D performances, it controls the game effect lamps 9 using a brightness data table for the introduction part (introduction of high base reach system reach A, introduction of high base reach system reach B, introduction of high base reach system reach C, introduction of high base reach system reach D). In this way, in the title display part of the high base reach A to D performance, the game effect lamp 9 is controlled using a brightness data table for the title display that is different from the brightness data table for the introductory part, so the game effect lamp 9 can be illuminated in an appropriate lighting mode according to the title display. As a result, the title can be displayed in an appropriate manner.

In addition, in the low base strongest reach performance, the game effect lamp 9 is controlled in the title display part and the introduction part using one brightness data table (strongest reach title introduction) corresponding to the title display part and the introduction part. However, in the title display part of the low base strongest reach performance, the game effect lamp 9 is controlled using a brightness data table for title display (brightness data table composed of brightness data corresponding to the title display part of the low base strongest reach performance (strongest reach type strongest reach title)), and in the introduction part of the low base strongest reach performance, the game effect lamp 9 is controlled using a brightness data table for the introduction part (brightness data table composed of brightness data corresponding to the title display part of the low base strongest reach performance (strongest reach type strongest reach introduction)). With such a configuration, in the title display part of the low base strongest reach performance, the game effect lamp 9 is controlled using a brightness data table for title display that is different from the brightness data table for the introduction part, so that the game effect lamp 9 can be illuminated in a suitable illumination mode according to the title display, and as a result, the title display can be performed suitably.

[Effect 8]
In this embodiment, the performance control CPU 120 can execute the low base strongest reach performance and the high base reach A to D performance. The low base strongest reach performance and the high base reach A to D performance are configured to include both a title display part that displays the corresponding title characters and an introduction part until the performance result is announced. The title display of the low base strongest reach performance and the high base reach A to D performance is configured with multiple characters ("Catch the explosive chu with six people!", "Battle reach A (Battle reach B to D"). In the title display part of the low base strongest reach performance and the high base reach A to D performance, the multiple characters are enlarged from the state in which the multiple characters are displayed, thereby ending the title display part and displaying the background at the start of the introduction part. In this way, the player pays attention to the title characters in the title display part, and the title characters can be suitably used to switch to the background corresponding to the next introduction part without any discomfort.

In addition, the performance control CPU 120 controls the game effect lamps 9 (frame LEDs LWL1-LWL12, frame LEDs LWR2-LWR12, logo LEDs LL1-LL4, decorative LEDs LS1-LS5, attacca lamps LA1-LA4) using a brightness data table composed of brightness data, and in the title display part of the high base reach A-D performances, it controls the game effect lamps 9 using a brightness data table for title display (common title for high base reach systems), and in the introduction part of the high base reach A-D performances, it controls the game effect lamps 9 using a brightness data table for the introduction part (introduction of high base reach system reach A, introduction of high base reach system reach B, introduction of high base reach system reach C, introduction of high base reach system reach D). In this way, in the title display part of the high base reach A to D performance, the game effect lamp 9 is controlled using a brightness data table for the title display that is different from the brightness data table for the introductory part, so the game effect lamp 9 can be illuminated in an appropriate lighting mode according to the title display. As a result, the title can be displayed in an appropriate manner.

In addition, in the low base strongest reach performance, the game effect lamp 9 is controlled in the title display part and the introduction part using one brightness data table (strongest reach title introduction) corresponding to the title display part and the introduction part. However, in the title display part of the low base strongest reach performance, the game effect lamp 9 is controlled using a brightness data table for title display (brightness data table composed of brightness data corresponding to the title display part of the low base strongest reach performance (strongest reach type strongest reach title)), and in the introduction part of the low base strongest reach performance, the game effect lamp 9 is controlled using a brightness data table for the introduction part (brightness data table composed of brightness data corresponding to the title display part of the low base strongest reach performance (strongest reach type strongest reach introduction)). With such a configuration, in the title display part of the low base strongest reach performance, the game effect lamp 9 is controlled using a brightness data table for title display that is different from the brightness data table for the introduction part, so that the game effect lamp 9 can be illuminated in a suitable illumination mode according to the title display, and as a result, the title display can be performed suitably.

[Effect 9]
In this embodiment, the performance control CPU 120 can execute low base weak reach A, B performance, and low base strong reach A to C performance. The low base weak reach A, B performance, and low base strong reach A to C performance are each composed of a title display part that displays the corresponding title character, and an introduction part until the performance result is notified. Also, unlike the execution time (T1-1 to 2) of the title display part in the low base weak reach A, B performance and the execution time (T2-1 to 3) of the title display part in the low base strong reach A to C performance, each title display part is composed of a title start period from when the title character starts to be displayed to when it is displayed at a fixed position, a title display period that is displayed at a fixed position, and a title end period from when the title character is displayed at the fixed position to when it is displayed at the end. And, in the title display part in the low base weak reach A, B performance, and in the title display part in the low base strong reach A to C performance, the title character is displayed so that the title display period is longer than the title start period and the title end period, and the title start period is longer than the title end period. In this way, even if the execution time of the title display part differs between the low base weak reach A, B performance and the low base strong reach A to C performance, the title display period displayed at the fixed position is made the longest, so that attention can be drawn to the type of title characters. Also, even if the execution time of the title display part differs between the low base weak reach A, B performance and the low base strong reach A to C performance, the title start period until the title is displayed at the fixed position is made longer than the title end period from the display of the fixed position to the end of the display, so that it is possible to arouse interest in which title characters will be displayed. Also, even if the execution time of the title display part differs between the low base weak reach A, B performance and the low base strong reach A to C performance, the title display part can be made easier to understand by making the relationship of the execution times of the title start period, title display period, and title end period common.

[Effect 10]
In this embodiment, the performance control CPU 120 can execute the super reach performance in both the normal state and the probability variable state, which is more advantageous than the normal state. The super reach performance in the normal state and the probability variable state are both configured to include a title display part that displays the corresponding title characters and an introduction part until the performance result is notified. Also, the execution time (T1-1 to 2, T2-1 to 3, T3) of the title display part in the super reach performance in the normal state is different from the execution time (T4) of the title display part in the super reach performance in the probability variable state, and both title display parts are configured to include a title start period from when the title characters start to be displayed to when they are displayed at a fixed position, a title display period that is displayed at a fixed position, and a title end period from when the title characters are displayed at the fixed position to when they end being displayed. And, in the title display part in the super reach performance in the normal state and in the title display part in the super reach performance in the probability variable state, the title characters are displayed so that the title display period is longer than the title start period and the title end period, and the title start period is longer than the title end period. In this way, even if the execution time of the title display part differs between the super reach performance in the normal state and the super reach performance in the probability variable state, the title display period displayed at the fixed position is made the longest, so that the type of title character can be drawn to attention. Also, even if the execution time of the title display part differs between the super reach performance in the normal state and the super reach performance in the probability variable state, the title start period until the title is displayed at the fixed position is made longer than the title end period from the display at the fixed position to the end of the display, so that it is possible to incite which title character is to be displayed. Also, even if the execution time of the title display part differs between the super reach performance in the normal state and the super reach performance in the probability variable state, the title display part can be made easier to understand by making the execution time relationship between the title start period, the title display period, and the title end period common.

In addition, the execution time (T4) of the title display part of the Super Reach performance in the special probability state is shorter than the execution time (T1-1 to 2, T2-1 to 3, T3) of the title display part of the Super Reach performance in the normal state. Since the execution time of the title display part in the Super Reach performance executed in the special probability state is relatively short, gameplay in the special probability state can be played at a good tempo, while the execution time of the title display part in the Super Reach performance executed in the normal state is relatively long, so it can be thoroughly hyped up.

In addition, the Super Reach performance executed in the probability variable state, regardless of the type, has a higher probability of winning than the low base weak reach A and B performances, which have a lower probability of winning among the Super Reach performances executed in the normal state, and even if the execution time of the title display part in the Super Reach performance executed in the probability variable state is relatively short, the mere execution of the Super Reach performance can give the player hope of winning a jackpot.

In addition, the execution time of the Super Reach performance and the execution time of the title display part are the same for all types of Super Reach performances executed in the special probability state, but among the Super Reach performances executed in the normal state, the expectation of a jackpot is higher than that of the low base weak Reach A and B performances, which have a lower expectation of a jackpot, and even though the execution time of the Super Reach performance and the execution time of the title display part are the same regardless of the type of Super Reach performance executed in the special probability state, the execution of the Super Reach performance alone can give the player hope of a jackpot.

In addition, among the super reach effects executed in the normal state, the execution time of the title display part in the low base strong reach A-C effects, which have a higher jackpot expectation than the low base weak reach A and B effects, is set to be longer than the execution time of the title display part in the low base weak reach AB effect, and the execution time of the title display part in the low base strongest reach effect, which has a higher jackpot expectation than the low base strong reach A-C effects, is set to be longer than the execution time of the title display part in the low base strong reach A-C effects. By doing this, in the normal state, the execution time of the title display part is longer for super reach effects with a higher jackpot expectation, so it can be effectively excited.

In addition, among the super reach effects executed in the normal state, the execution time of the title display period in which the title characters are displayed in a fixed position in the low base strong reach A-C effects, which have a higher jackpot expectation than the low base weak reach A and B effects, is set to be longer than the execution time of the title display period in the low base weak reach AB effects, and the execution time of the title display period in the low base strongest reach effects, which have a higher jackpot expectation than the low base strong reach A-C effects, is set to be longer than the execution time of the title display period in the low base strong reach A-C effects. By doing this, in the normal state, the higher the jackpot expectation of the super reach effect, the longer the execution time of the title display period in which the title characters are displayed in a fixed position, so it can be more exciting.

[Effect 11]
In this embodiment, the performance control CPU 120 can execute a super reach performance. The super reach performance includes both a title display part that displays the corresponding title character and an introduction part until the performance result is notified. The title display part includes a title start period from when the title character starts to be displayed at the fixed position until it is displayed at the fixed position, a title display period that is displayed at the fixed position, and a title end period from when the title character is displayed at the fixed position until it is ended. In the title display part, the title character is displayed so that the title display period is longer than the title start period and the title end period, and the title start period is longer than the title end period. In this way, the title display period displayed at the fixed position is made the longest, so that attention can be drawn to the type of title character. In addition, by making the title start period until it is displayed at the fixed position longer than the title end period from when the title character is displayed at the fixed position until it is ended, it is possible to incite which title character is to be displayed. In addition, even if the execution time of the title display part differs between the super reach performance in the normal state and the super reach performance in the probability change state, the title display part can be made easier to understand by making the relationship between the execution times of the title start period, the title display period, and the title end period common.

[Effect 12]
In this embodiment, the performance control CPU 120 can execute the low base strong reach A to C performance and the low base strongest reach performance. The low base strong reach A to C performance and the low base strongest reach performance are configured to include both a title display part that displays the corresponding title character and an introduction part until the performance result is notified. Also, as shown in FIG. 11-43, in the title display part of the low base strongest reach performance and the low base strong reach A to C performance, it is possible to display the title character in a white form and a red form that has a higher jackpot expectation than the white form. Then, in the title display part of the low base strongest reach performance and the low base strong reach A to C performance, the corresponding expectation indication is displayed, and then the title character is displayed in a size larger than the expectation indication. In this case, in both cases of displaying the title character in a white form and displaying it in a red form, the expectation indication is displayed in a common form. In this way, the title characters corresponding to the low base strongest reach effects and the low base strong reach A to C effects are larger in size than the expectation suggestion display, and the expectation is suggested by its appearance, so that it attracts the attention of the player, but by displaying the expectation suggestion display before the title characters, it is possible to draw the player's attention to the expectation suggestion first. Also, whether the title characters are displayed in white or red, the expectation suggestion display is performed in a common manner, so that the player can be drawn to the appearance of the subsequent title characters.

[Effect 13]
In this embodiment, the performance control CPU 120 can execute the low base strong reach B performance and the low base strong reach C performance, which has a higher jackpot expectation than the low base strong reach B performance. The low base strong reach B and C performances are composed of both a title display part that displays the corresponding title characters and an introduction part until the performance result is announced. In addition, the expectation suggestion display is displayed in the first mode (3.5 stars) in the title display part of the low base strong reach B performance, and the expectation suggestion display is displayed in the second mode (4 stars) in the title display part of the low base strong reach C performance. At this time, the expectation suggestion display in the title display part of the low base strong reach B performance and the expectation suggestion display in the title display part of the low base strong reach C performance are highlighted in a common manner. By doing this, development costs can be reduced by making the highlighting a common mode whether the expectation level indication is displayed in a first manner in the title display part of a low base strong reach B performance, or whether the expectation level indication is displayed in a second manner in the title display part of a low base strong reach C performance.

The expectation indication display is composed of multiple star-shaped objects, and in the low base strong reach B performance, the expectation is indicated by N (N is an integer) + 0.5 (3.5) objects, and in the low base strong reach C performance, the expectation is indicated by N + 1 (4) objects, and each star-shaped object is highlighted, and the highlighting is done in a common manner whether one object is highlighted or 0.5 objects are highlighted. In this way, the highlighting is done in a common manner whether one star-shaped object is highlighted or 0.5 star-shaped objects are highlighted, thereby reducing development costs.

In addition, in the expectation suggestion display, the time when one star-shaped object is highlighted and the time when 0.5 star-shaped objects are highlighted are the same. By doing this, the time when one star-shaped object is highlighted and the time when 0.5 star-shaped objects are highlighted are the same, which can reduce development costs.

In addition, in the expectation indication display, a common expectation indication sound is output whether a single star-shaped object is highlighted or a 0.5 star-shaped object is highlighted. In this way, a common expectation indication sound is output whether a single star-shaped object is highlighted or a 0.5 star-shaped object is highlighted, thereby reducing development costs.

The performance control CPU 120 also controls the game effect lamps 9 (frame LEDs LWL1-LWL12, frame LEDs LWR2-LWR12, logo LEDs LL1-LL4, decorative LEDs LS1-LS5, and attacker lamps LA1-LA4) using a brightness data table composed of brightness data, and in the title display part of the low base strong reach B and C performances, it controls the game effect lamps 9 using a brightness data table for title display (strong base common title), and in the introduction part of the low base strong reach B and C performances, it controls the game effect lamps 9 using the brightness data table for each introduction part (strong reach system strong reach B introduction, strong reach system strong reach C introduction). In this way, in the title display part of the low base strong reach B and C performances, the game effect lamps 9 are controlled using a brightness data table for title display that is different from the brightness data table for the introduction part, so that the game effect lamps 9 can be illuminated in a suitable illumination mode according to the title display. As a result of these, the title display can be performed suitably.

In the low base strong reach B and C performances, the game effect lamp 9 is controlled using a common brightness data table (strong base common title) in the title display part, but in the title display part of the low base strong reach B performance, the game effect lamp 9 is controlled using a brightness data table for title display in the low base strong reach B performance (brightness data table (strong reach strong reach B title) composed of brightness data corresponding to the title display part of the low base strong reach B performance). The game effect lamp 9 may be controlled using a brightness data table (a brightness data table (strong reach series strong reach C title) composed of brightness data corresponding to the title display part of the low base strong reach C performance). With such a configuration, the game effect lamp 9 is controlled using different brightness data tables for title display for the title display part of the low base strong reach B performance and the title display part of the low base strong reach C performance, so that the game effect lamp 9 can be illuminated in an appropriate illumination mode according to the title display, and as a result, the title display can be performed appropriately.

[Effect 14]
In this embodiment, the performance control CPU 120 can execute the low base strong reach A to C performances, the low base strongest reach performance, and the high base reach A to D performances. The low base strong reach A to C performances, the low base strongest reach performance, and the high base reach A to D performances are configured to include a title display part that displays the corresponding title characters, and an introduction part until the performance result is notified. In addition, the title display part of the low base strong reach A to C performances, the low base strongest reach performance, and the high base reach A to D performances can display an expectation suggestion display composed of multiple star-shaped objects. Then, in the expectation suggestion display, the first star-shaped object is highlighted, and then, while continuing the highlighting of the first star-shaped object, the second star-shaped object is highlighted, and then, the highlighting of the first star-shaped object is ended, and the third star-shaped object is highlighted. By doing this, in the expectation indication display, highlighting of the second star-shaped object begins before highlighting of the first star-shaped object ends, but highlighting of the third star-shaped object does not begin until highlighting of the first star-shaped object ends, making it easier to recognize the number of objects suggesting the expectation of a jackpot.

In addition, in the expectation indication display, an expectation indication sound is output each time a star-shaped object is highlighted, and after the output of the expectation indication sound for the highlighting of one star-shaped object has finished, an expectation indication sound for the highlighting of the next object is output. In this way, the emphasis sound for the highlighting of one object and the emphasis sound for the highlighting of the next object do not overlap, making it easier to recognize the number of objects indicating the expectation.

The expectation suggestion display is composed of multiple star-shaped objects and the text "expectation" indicating that the star-shaped objects indicate the expectation, and the star-shaped objects are highlighted in a size that overlaps with the text "expectation." In this way, highlighting the star-shaped objects draws attention to both the multiple star-shaped objects that make up the expectation suggestion display and the text indicating that the star-shaped objects indicate the expectation.

In this embodiment, when some of the multiple star-shaped objects are highlighted, the highlighting of the star-shaped objects is superimposed on text indicating that the star-shaped objects indicate the degree of expectation. However, for all star-shaped objects, the highlighting of the star-shaped objects may be superimposed on text indicating that the star-shaped objects indicate the degree of expectation.

[Effect 15]
In this embodiment, the performance control CPU 120 can execute the low base strong reach A to C performance, the low base strongest reach performance, and the high base reach A to D performance. The low base strong reach A to C performance, the low base strongest reach performance, and the high base reach A to D performance are configured to include both a title display part that displays the corresponding title characters, and an introduction part until the performance result is notified. In addition, it is possible to display multiple pending displays corresponding to variable displays that have not yet started, and it is possible to display an expectation suggestion display composed of multiple star-shaped objects in the title display part of the low base strong reach A to C performance, the low base strongest reach performance, and the high base reach A to D performance. And, in the title display part of the low base strong reach A to C performance, the low base strongest reach performance, and the high base reach A to D performance, the pending display is not displayed simultaneously with the expectation suggestion display. By doing this, an expectation indication display consisting of a plurality of objects is displayed in the title display part in the low base strong reach A to C performances, the low base strongest reach performances, and the high base reach A to D performances, while the hold display is not displayed simultaneously with the expectation indication display, thereby preventing the hold display from being mistakenly recognized as the expectation indication display.

In particular, the maximum number of pending displays and active displays corresponding to the variable displays that have been started will match the maximum number of star-shaped objects that make up the expectation indication display, but even if a low base strong reach A-C performance, a low base strongest reach performance, or a high base reach A-D performance is executed when the maximum number of pending displays and active displays are displayed, it is possible to prevent the pending displays and active displays from being mistakenly recognized as the maximum number of star-shaped objects that make up the expectation indication display.

In addition, by erasing the hold display when a monochrome display effect is executed in which the display area is displayed in monochrome before the start of the title display part, the hold display can be ended without any awkwardness.

In addition, the CPU 120 for controlling the performance controls the game effect lamps 9 (frame LEDs LWL1-LWL12, frame LEDs LWR2-LWR12, logo LEDs LL1-LL4, decorative LEDs LS1-LS5, and attacker lamps LA1-LA4) using a brightness data table composed of brightness data, and in the title display part of the low base strong reach A-C performance and the high base reach A-D performance, the CPU 120 controls the game effect lamps 9 (frame LEDs LWL1-LWL12, frame LEDs LWR2-LWR12, logo LEDs LL1-LL4, decorative LEDs LS1-LS5, and attacker lamps LA1-LA4) using a brightness data table composed of brightness data. In the title display part of the low base strong reach A-C performance and the high base reach A-D performance, the game effect lamp 9 is controlled using a brightness data table for the introduction part (introduction of strong reach A of the strong reach system, introduction of strong reach B of the strong reach system, introduction of strong reach C of the strong reach system, introduction of high base reach A of the reach system, introduction of high base reach B of the reach system, introduction of high base reach C of the reach system, introduction of high base reach D of the reach system). In this way, in the title display part of the low base strong reach A-C performance and the high base reach A-D performance, the game effect lamp 9 is controlled using a brightness data table for the title display that is different from the brightness data table for the introduction part, so that the game effect lamp 9 can be illuminated in a suitable illumination mode according to the title display. As a result of these, the title display can be performed in a suitable manner.

In addition, in the low base strongest reach performance, the game effect lamp 9 is controlled in the title display part and the introduction part using one brightness data table (strongest reach title introduction) corresponding to the title display part and the introduction part. However, in the title display part of the low base strongest reach performance, the game effect lamp 9 is controlled using a brightness data table for title display (brightness data table composed of brightness data corresponding to the title display part of the low base strongest reach performance (strongest reach type strongest reach title)), and in the introduction part of the low base strongest reach performance, the game effect lamp 9 is controlled using a brightness data table for the introduction part (brightness data table composed of brightness data corresponding to the title display part of the low base strongest reach performance (strongest reach type strongest reach introduction)). With such a configuration, in the title display part of the low base strongest reach performance, the game effect lamp 9 is controlled using a brightness data table for title display that is different from the brightness data table for the introduction part, so that the game effect lamp 9 can be illuminated in a suitable illumination mode according to the title display, and as a result, the title display can be performed suitably.

[Effect 16]
In this embodiment, the performance control CPU 120 can execute low base strong reach A to C performances and high base reach A to C performances. The low base strong reach A to C performances and high base reach A to C performances are configured to include both a title display part that displays the corresponding title characters and an introduction part until the performance result is announced. In addition, in the title display part of the low base strong reach A performance/high base reach A performance, it is possible to display an expectation suggestion display composed of a first number (3) of star-shaped objects, in the title display part of the low base strong reach B performance/high base reach B performance, it is possible to display an expectation suggestion display composed of a second number (3.5) of star-shaped objects that is greater than the first number, in the title display part of the low base strong reach C performance/high base reach C performance, it is possible to display an expectation suggestion display composed of a third number (4) of star-shaped objects that is greater than the second number. The difference between the first number (3) and the second number (3.5) is the same (0.5) as the difference between the second number (3.5) and the third number (4), and the difference between the expectation of a jackpot when a low base strong reach C effect/high base reach C effect corresponding to the third number (4) is executed and the expectation of a jackpot when a low base strong reach B effect/high base reach B effect corresponding to the second number (3.5) is executed is greater than the difference between the expectation of a jackpot when a low base strong reach B effect/high base reach B effect corresponding to the second number (3.5) is executed and the expectation of a jackpot when a low base strong reach A effect/high base reach A effect corresponding to the first number (3). By doing this, when the number of star-shaped objects displayed as an expectation indication display in the title display part increases from the first number (3) to the second number (3.5) and when it increases from the second number (3.5) to the third number (4), the increase in the number of star-shaped objects is the same as when it increases from the second number (3.5) to the third number (4). However, the increase in the expectation of a jackpot is greater when it increases from the second number (3.5) to the third number (4) than when it increases from the first number (3) to the second number (3.5). Therefore, as the number of star-shaped objects increases, the player can expect a jackpot that is greater than the number of increased star-shaped objects, while not being overly led to expect a jackpot when the number of star-shaped objects is small.

In addition, the performance control CPU 120 can execute a low base strongest reach performance/high base reach D performance, and can display an expectation indication display consisting of a fourth number (4.5) star-shaped object that is greater than the third number (4) in the title display part in the low base strongest reach performance/high base reach D performance, and the difference in numbers (0.5) between the third number (4) and the fourth number (4.5) is smaller than the difference in numbers (1) between the first number (3) and the third number (4), and the low base corresponding to the fourth number (4.5) can be displayed. The difference between the probability of a jackpot when a low base strong reach C performance/high base reach D performance corresponding to the third number (4) is executed and the probability of a jackpot when a low base strong reach C performance/high base reach C performance corresponding to the third number (4) is executed is greater than the difference between the probability of a jackpot when a low base strong reach C performance/high base reach C performance corresponding to the third number (4) is executed and the probability of a jackpot when a low base strong reach B performance/high base reach B performance corresponding to the first number (3) is executed. By doing this, the increase in the number of star-shaped objects displayed as the expectation indication in the title display part is smaller when the number of star-shaped objects increases from the third number (4) to the fourth number (4.5) than when it increases from the first number (3) to the third number (4), but the increase in the expectation of a jackpot is greater when it increases from the third number (4) to the fourth number (4.5) than when it increases from the first number (3) to the third number (4). Therefore, the more the number of star-shaped objects increases, the more the player can expect a jackpot even if the number of increased star-shaped objects is small.

In addition, the difference between the third number (4) and the fourth number (4.5) is 0.5, and the difference between the first number (3) and the third number (4) is 1, so it is more likely to be a jackpot when the number of star-shaped objects displayed as an expectation indication in the title display part increases by 0.5 from the third number (4) to the fourth number (4.5) than when the number increases by 1 from the first number (3) to the third number (4).

In addition, the difference between the probability of a jackpot when a high base reach C effect corresponding to the third number (4) is executed in a probability variable state that is more favorable than the normal state and the probability of a jackpot when a high base reach B effect corresponding to the second number (3.5) is executed is greater than the difference between the probability of a jackpot when a low base strong reach C effect corresponding to the third number (4) is executed in the normal state and the probability of a jackpot when a low base strong reach B effect corresponding to the second number (3.5) is executed. In this way, it can be expected that a jackpot will occur when the number of star-shaped objects displayed as the probability suggestion display in the title display part increases in a probability variable state that is more favorable than the normal state.

[Effect 17]
In this embodiment, the performance control CPU 120 can execute low base strong reach A to C performances that have a higher jackpot expectation than the low base weak reach A and B performances and the low base weak reach A and B performances under normal conditions. The low base weak reach A and B performances and the low base strong reach A to C performances are each composed of a title display part that displays the corresponding title characters and an introduction part until the performance result is announced. The title display part in the low base strong reach A to C performances has a longer execution time than the title display part in the low base weak reach A and B performances, and while the expectation suggestion display is displayed in the title display part in the low base strong reach A to C performances, the expectation suggestion display is not displayed in the title display part in the low base weak reach A and B performances. By doing this, the title display part in the low base strong reach A to C performances, which have a relatively high level of expectation, is longer than the title display part in the low base weak reach A and B performances, which have a relatively low level of expectation, and while an expectation suggestion display is displayed in the title display part in the low base strong reach A to C performances, an expectation suggestion display is not displayed in the title display part in the low base weak reach A and B performances, so that the player can intuitively recognize that the low base strong reach A to C performances have a higher level of expectation than the low base weak reach A and B performances.

In addition, the title display part in the low base strong reach A to C performance consists of a prologue display period and a title character display period in which the title characters are displayed (title start period, title display period, title end period), while the title display part in the low base weak reach A and B performance does not have a prologue display period and is composed only of the title character display period, and the title character display period of the title display part in the low base strong reach A to C performance is longer than the title character display period of the title display part in the low base weak reach A and B performance. By doing this, since the title character display period of the title display part in the low base strong reach A to C performance is longer than the title character display period of the title display part in the low base weak reach A and B performance, it can be recognized by experience that the low base strong reach A to C performance has a higher expectation than the low base weak reach A and B performance.

In addition, the performance control CPU 120 can execute a low base strongest reach performance that has a higher jackpot expectation than the low base strong reach A to C performances in the normal state, and the title display part in the low base strong reach A to C performances is composed of a prologue display period and a title character display period in which the title characters are displayed (title start period, title display period, title end period), and the title display part in the low base strongest reach performance does not have a prologue display period and is composed only of the title character display period, and the title character display period of the title display part in the low base strongest reach performance is longer than the title character display period of the title display part in the low base strong reach A to C performance. By doing this, the title character display period of the title display part in the low base strongest reach performance is longer than the title character display period of the title display part in the low base strong reach A to C performance, so that the user can physically recognize that the low base strongest reach performance has a higher expectation than the low base strong reach A to C performance.

In addition, the performance control CPU 120 controls the game effect lamps 9 (frame LEDs LWL1-LWL12, frame LEDs LWR2-LWR12, logo LEDs LL1-LL4, decorative LEDs LS1-LS5, attacca lamps LA1-LA4) using a brightness data table composed of brightness data, and in the title display parts of the low base weak reach A, B performances and the low base strong reach A-C performances, it controls the game effect lamps 9 using the brightness data tables for each title display (weak reach system common title, strong reach system common title), and in the introduction parts of the low base weak reach A, B performances and the low base strong reach A-C performances, it controls the game effect lamps 9 using the brightness data tables for each introduction part (weak reach system weak reach A introduction, weak reach system weak reach B introduction, strong reach system strong reach A introduction, strong reach system strong reach B introduction, strong reach system strong reach C introduction). In this way, in the title display parts of the low base weak reach A and B effects and the low base strong reach A to C effects, the game effect lamp 9 is controlled using a brightness data table for the title display that is different from the brightness data table for the introductory part, so the game effect lamp 9 can be illuminated in an appropriate lighting mode according to the title display. As a result, the title can be displayed in an appropriate manner.

[Effect 18]
In this embodiment, the performance control CPU 120 can execute low base strong reach A to C performances that have a higher jackpot expectation than the low base weak reach A and B performances and the low base weak reach A and B performances in a normal state. The low base weak reach A and B performances and the low base strong reach A to C performances are configured to include both a title display part that displays the corresponding title characters and an introduction part until the performance result is notified. In addition, in the low base weak reach A and B performances, there are cases where a jackpot is notified as a performance result, and cases where a miss is notified as a performance result, and cases where it develops into another super reach performance, and in the low base strong reach A to C performances, there are cases where a jackpot is notified as a performance result, and cases where a miss is notified as a performance result. And, while an expectation suggestion display is displayed in the title display part in the low base strong reach A to C performances, an expectation suggestion display is not displayed in the title display part in the low base weak reach A and B performances. By doing this, an expectation indication display is displayed in the title display part in low base strong reach A to C performances, which may directly notify the player that a jackpot will occur, while an expectation indication display is not displayed in the title display part in low base weak reach A and B performances, which do not directly notify the player that a jackpot will occur, thereby preventing the player from having excessive expectations due to the low base weak reach A and B performances.

In addition, in the title display part of the low base weak reach A and B performances, it is possible to display the title text in a golden form, which confirms that the performance will develop into another super reach performance, so it is possible to draw the player's attention even in the title display part of the low base weak reach A and B performances, where the expectation indication display is not displayed.

In addition, the performance control CPU 120 controls the game effect lamps 9 (frame LEDs LWL1-LWL12, frame LEDs LWR2-LWR12, logo LEDs LL1-LL4, decorative LEDs LS1-LS5, attacca lamps LA1-LA4) using a brightness data table composed of brightness data, and in the title display parts of the low base weak reach A, B performances and the low base strong reach A-C performances, it controls the game effect lamps 9 using the brightness data tables for each title display (weak reach system common title, strong reach system common title), and in the introduction parts of the low base weak reach A, B performances and the low base strong reach A-C performances, it controls the game effect lamps 9 using the brightness data tables for each introduction part (weak reach system weak reach A introduction, weak reach system weak reach B introduction, strong reach system strong reach A introduction, strong reach system strong reach B introduction, strong reach system strong reach C introduction). In this way, in the title display parts of the low base weak reach A and B effects and the low base strong reach A to C effects, the game effect lamp 9 is controlled using a brightness data table for the title display that is different from the brightness data table for the introductory part, so the game effect lamp 9 can be illuminated in an appropriate lighting mode according to the title display. As a result, the title can be displayed in an appropriate manner.

[Effect 19]
In this embodiment, the performance control CPU 120 can execute low base strong reach A to C performances and low base strongest reach. The low base strong reach A to C performances and low base strongest reach are configured to include both a title display part that displays the corresponding title characters and an introduction part until the performance result is notified. In addition, the low base strong reach A to C performances and low base strongest reach may be executed via a selection performance using title characters corresponding to a plurality of super reach performances, and it is possible to display an expectation degree suggestion display together with the title characters in the title display part and selection performance of the low base strong reach A to C performances and low base strongest reach. Then, when displaying the expectation degree suggestion display in the title display part of the low base strong reach A to C performances and low base strongest reach, an expectation degree suggestion display composed of a plurality of star-shaped objects is displayed in stages, and when displaying the expectation degree suggestion display in the selection performance, an expectation degree suggestion display composed of a plurality of star-shaped objects is not displayed in stages. By doing this, when the expectation suggestion display is displayed in the title display part of the low base strong reach A to C performances and the low base strongest reach, the expectation suggestion display made up of a plurality of star-shaped objects is displayed in stages, whereas when the expectation suggestion display is displayed in the selection performance, the expectation suggestion display made up of a plurality of star-shaped objects is not displayed in stages, thereby eliminating the annoyance caused by the expectation suggestion display being displayed in stages not only in the title display part but also in the selection performance preceding it.

The selection effect changes stepwise from a Super Reach effect with a low probability of winning to a Super Reach effect with a high probability of winning by operating push button 31B, and the time required for one step in the selection effect, i.e., the minimum time required to switch to the title image of the next Super Reach effect, may be shorter than the time required for one step in the indication of the probability of winning in the title display part of the Low Base Strong Reach A-C effects and the Low Base Strongest Reach, i.e., the time it takes for the star-shaped object to change from black to highlighted and then to gold, giving a sense of speed to the gradual change in the selection effect.

The selection effect changes step by step from the current Super Reach effect to a Super Reach effect with one step higher chance of winning, and the number of times the push button 31B needs to be operated to change to the next effect increases with each step. This makes it more likely that the player will be impatient as the chance of winning the Super Reach effect increases.

In addition, if the low base strong reach A-C effects or the low base strongest reach are selected through the selection effect, the title display part of that super reach effect will start. By doing this, even if the low base strong reach A-C effects or the low base strongest reach are executed through the selection effect, the title display part will start, making it easier for the player to determine which super reach effect was ultimately executed.

[Effect 20]
In this embodiment, the performance control CPU 120 can execute a super reach performance. The super reach performance includes a title display part that displays the corresponding title character, and an introduction part until the performance result is notified. In addition, after the super reach performance notifies that a jackpot will be won, the title character corresponding to the jackpot game state can be displayed in the jackpot start performance. The title character of the jackpot start performance is displayed in a manner with a larger movement than the title character of the super reach performance. In this way, the situation in which the title character is displayed in the super reach performance is a situation in which it is not yet clear whether or not a jackpot will be won, whereas the situation in which the title character of the jackpot start performance is displayed is a situation after it has already been notified that a jackpot will be won, and it is possible to celebrate the control of the jackpot game state by moving the title character of the jackpot start performance more greatly.

In this embodiment, the title characters are displayed in a stationary state in the title display part of the Super Reach performance, but the title characters may be displayed in a moving manner in the title display part of the Super Reach performance. Even in such a configuration, the title characters of the jackpot start performance can be displayed in a manner with greater movement than the title characters of the Super Reach performance, allowing you to celebrate being controlled into a jackpot game state.

In addition, in the title display part of the Super Reach performance, when the title characters are displayed, a background dedicated to the title display is displayed (Low base strong reach B, C performance, low base strongest reach performance, high base reach A-D), and the background of the title characters in the jackpot start performance is displayed in a manner with greater movement than the background dedicated to the title display in the Super Reach performance. By doing this, the background of the title characters in the jackpot start performance can also be moved more greatly, allowing you to celebrate the fact that you have been controlled into a jackpot game state.

In this embodiment, the background dedicated to the title display in the Super Reach performance is a still image, but the background dedicated to the title display in the Super Reach performance may also be a moving image, and even in this configuration, the background of the title characters in the jackpot start performance is displayed in a manner with more movement than the background dedicated to the title display in the Super Reach performance, so that it is possible to celebrate the control of the jackpot game state.

In addition, the performance control CPU 120 uses a brightness data table composed of brightness data to control the game effect lamps 9 (frame LEDs LWL1 to LWL12, frame LEDs LWR2 to LWR12, logo LEDs LL1 to LL4, decorative LEDs LS1 to LS5, and attakka lamps LA1 to LA4), and in the title display part of the super reach performance, uses a brightness data table for title display (weak reach system common title, strong reach system common title, high base reach system The game effect lamp 9 is controlled using a brightness data table for the introduction part (introduction of weak reach A for weak reach systems, introduction of weak reach B for weak reach systems, introduction of strong reach A for strong reach systems, introduction of strong reach B for strong reach systems, introduction of strong reach C for strong reach systems, introduction of reach A for high base reach systems, introduction of reach B for high base reach systems, introduction of reach C for high base reach systems, introduction of reach D for high base reach systems). In this way, in the title display part of the super reach performance, the game effect lamp 9 is controlled using a brightness data table for title display that is different from the brightness data table for the introduction part, so that the game effect lamp 9 can be illuminated in a suitable illumination mode according to the title display. As a result of these, the title display can be performed suitably.

[Effect 21]
In this embodiment, the performance control CPU 120 can execute a super reach performance. The super reach performance includes a title display part that displays the corresponding title character, and an introduction part until the performance result is notified. In addition, in the operation prompting performances B and D in the introduction part of the super reach performance, it is possible to display operation prompting characters (small) that prompt the player to operate the push button 31B. At this time, the operation prompting characters (small) are displayed in a manner that moves more than the title characters corresponding to the super reach performance. In this way, the operation prompting characters (small) displayed in the introduction part prompt the player to perform an action (operation), and by moving them more than the title characters displayed in the title display part, it is possible to intuitively prompt the player to perform an action (operation).

In addition, in operation prompting effects B and D in the introductory part of the super reach effect, it is possible to display operation prompting characters (large) that prompt the player to operate the push button 31B and suggest a more favorable situation than the operation prompting characters (small), and both the operation prompting characters (small) and the operation prompting characters (large) are displayed in a manner that causes greater movement than the title characters corresponding to the super reach effect. In this way, whether the operation prompting characters (small) or (large) are moved more than the title characters displayed in the title display part, it is possible to intuitively prompt the player to take action (operate).

In this embodiment, the title characters are displayed in a stationary state in the title display part of the Super Reach performance, but the title characters may be displayed in a moving manner in the title display part of the Super Reach performance. Even in this configuration, the operation prompting characters (small) are displayed in a manner with greater movement than the title characters of the Super Reach performance, thereby intuitively encouraging the player to take action (operate). Also, even in this configuration, both the operation prompting characters (small) and the operation prompting characters (large) are displayed in a manner with greater movement than the title characters corresponding to the Super Reach performance, and whether the operation prompting characters (small) or (large) are moved more than the title characters displayed in the title display part, intuitively encouraging the player to take action (operate).

In addition, the number of characters (3) of the operation prompt characters (small) is less than the number of characters (7-13) of the title characters of the Super Reach performance, so the content of the characters can be recognized even if the operation prompt characters (small) are moved a lot.

In addition, the performance control CPU 120 uses a brightness data table composed of brightness data to control the game effect lamps 9 (frame LEDs LWL1 to LWL12, frame LEDs LWR2 to LWR12, logo LEDs LL1 to LL4, decorative LEDs LS1 to LS5, and attakka lamps LA1 to LA4), and in the title display part of the super reach performance, uses a brightness data table for title display (weak reach system common title, strong reach system common title, high base reach system The game effect lamp 9 is controlled using a brightness data table for the introduction part (introduction of weak reach A for weak reach systems, introduction of weak reach B for weak reach systems, introduction of strong reach A for strong reach systems, introduction of strong reach B for strong reach systems, introduction of strong reach C for strong reach systems, introduction of reach A for high base reach systems, introduction of reach B for high base reach systems, introduction of reach C for high base reach systems, introduction of reach D for high base reach systems). In this way, in the title display part of the super reach performance, the game effect lamp 9 is controlled using a brightness data table for title display that is different from the brightness data table for the introduction part, so that the game effect lamp 9 can be illuminated in a suitable illumination mode according to the title display. As a result of these, the title display can be performed suitably.

[Effect 22]
In this embodiment, the performance control CPU 120 is capable of executing a super reach performance. The super reach performance is composed of a title display part that displays the corresponding title character, and an introductory part until the performance result is announced. Also, in the title display part of the super reach performance, explanatory characters that explain the contents of the super reach performance can be displayed. At this time, the explanatory characters are displayed in a manner that has greater movement than the title characters that correspond to the super reach performance. In this way, the additionally displayed explanatory characters are displayed in a manner that has greater movement than the title characters, so that attention can be drawn to the fact that explanatory characters have been added in addition to the title characters.

In this embodiment, the title characters are displayed in a stationary state in the title display part of the super reach performance, but the title characters may be displayed in a moving manner in the title display part of the super reach performance. Even in such a configuration, the explanatory characters are displayed in a manner that has more movement than the title characters of the super reach performance, so that attention can be drawn to the fact that explanatory characters have been added in addition to the title characters.

In addition, the explanatory text suggests that the Super Reach performance is advantageous, so the presence of the explanatory text draws even more attention.

In addition, the performance control CPU 120 uses a brightness data table composed of brightness data to control the game effect lamps 9 (frame LEDs LWL1 to LWL12, frame LEDs LWR2 to LWR12, logo LEDs LL1 to LL4, decorative LEDs LS1 to LS5, and attakka lamps LA1 to LA4), and in the title display part of the super reach performance, uses a brightness data table for title display (weak reach system common title, strong reach system common title, high base reach system The game effect lamp 9 is controlled using a brightness data table for the introduction part (introduction of weak reach A for weak reach systems, introduction of weak reach B for weak reach systems, introduction of strong reach A for strong reach systems, introduction of strong reach B for strong reach systems, introduction of strong reach C for strong reach systems, introduction of reach A for high base reach systems, introduction of reach B for high base reach systems, introduction of reach C for high base reach systems, introduction of reach D for high base reach systems). In this way, in the title display part of the super reach performance, the game effect lamp 9 is controlled using a brightness data table for title display that is different from the brightness data table for the introduction part, so that the game effect lamp 9 can be illuminated in a suitable illumination mode according to the title display. As a result of these, the title display can be performed suitably.

[Effect 23]
In this embodiment, the performance control CPU 120 can execute the low base strong reach A to C performances that have a higher jackpot expectation than the low base weak reach A and B performances and the low base weak reach A and B performances. The low base weak reach A and B performances and the low base strong reach A to C performances each include a title display part that displays the corresponding title characters, and an introduction part until the performance result is announced. The title characters corresponding to the low base strong reach A to C performances are displayed in a larger character size than the title title characters corresponding to the low base weak reach A and B performances. By doing this, the title characters corresponding to the low base strong reach A to C performances with a relatively high expectation are displayed in a larger character size than the title characters corresponding to the low base weak reach A and B performances with a relatively low expectation, so that even just the title characters can be recognized by the user that the low base strong reach A to C performances have a higher jackpot expectation than the low base weak reach A and B performances.

In addition, the number of characters (10) that make up the title characters corresponding to the low base weak reach A, B effects is greater than the number of characters (7, 8) that make up the title characters corresponding to the low base strong reach B, C effects, but the display area size of the title characters corresponding to the low base strong reach B, C effects is larger than the display area size of the title characters corresponding to the low base weak reach A, B effects. By doing this, the display area size occupied by one character is larger for the title characters corresponding to the low base strong reach B, C effects, so that the player can intuitively recognize that the low base strong reach B, C effects have a higher chance of winning than the low base weak reach A, B effects.

In addition, the performance control CPU 120 controls the game effect lamps 9 (frame LEDs LWL1-LWL12, frame LEDs LWR2-LWR12, logo LEDs LL1-LL4, decorative LEDs LS1-LS5, attacca lamps LA1-LA4) using a brightness data table composed of brightness data, and in the title display parts of the low base weak reach A, B performances and the low base strong reach A-C performances, it controls the game effect lamps 9 using the brightness data tables for each title display (weak reach system common title, strong reach system common title), and in the introduction parts of the low base weak reach A, B performances and the low base strong reach A-C performances, it controls the game effect lamps 9 using the brightness data tables for each introduction part (weak reach system weak reach A introduction, weak reach system weak reach B introduction, strong reach system strong reach A introduction, strong reach system strong reach B introduction, strong reach system strong reach C introduction). In this way, in the title display parts of the low base weak reach A and B effects and the low base strong reach A to C effects, the game effect lamp 9 is controlled using a brightness data table for the title display that is different from the brightness data table for the introductory part, so the game effect lamp 9 can be illuminated in an appropriate lighting mode according to the title display. As a result, the title can be displayed in an appropriate manner.

[Effect 24]
In this embodiment, the performance control CPU 120 can execute a super reach performance after the decorative pattern displayed on the image display device 5 becomes a reach state. The super reach performance is composed of a title display part that displays the corresponding title character, and an introduction part until the performance result is notified. In addition, a decorative pattern (large) is displayed in a reach state before the title display part in the super reach performance, and then the decorative pattern (large) displayed in the reach state is reduced to a small decorative pattern (small). At this time, at least one character of the title character corresponding to the super reach performance is displayed in a size larger than the decorative pattern (small). In this way, at least one character of the title character corresponding to the super reach performance is displayed in a size larger than the reduced decorative pattern (small), so that the title character can be focused on in the title display part.

In addition, all characters of the title letters corresponding to the Super Reach performance are displayed smaller than the decorative pattern (large) and larger than the decorative pattern (small). By doing this, the decorative pattern (large) can be clearly recognized when the Reach state is reached, and thereafter, the decorative pattern (large) is reduced to a decorative pattern (small), and each character that makes up the title letters is displayed larger than the decorative pattern (small), so that attention can be drawn to the title letters in the title display part.

In addition, the performance control CPU 120 uses a brightness data table composed of brightness data to control the game effect lamps 9 (frame LEDs LWL1 to LWL12, frame LEDs LWR2 to LWR12, logo LEDs LL1 to LL4, decorative LEDs LS1 to LS5, and attakka lamps LA1 to LA4), and in the title display part of the super reach performance, uses a brightness data table for title display (weak reach system common title, strong reach system common title, high base reach system The game effect lamp 9 is controlled using a brightness data table for the introduction part (introduction of weak reach A for weak reach systems, introduction of weak reach B for weak reach systems, introduction of strong reach A for strong reach systems, introduction of strong reach B for strong reach systems, introduction of strong reach C for strong reach systems, introduction of reach A for high base reach systems, introduction of reach B for high base reach systems, introduction of reach C for high base reach systems, introduction of reach D for high base reach systems). In this way, in the title display part of the super reach performance, the game effect lamp 9 is controlled using a brightness data table for title display that is different from the brightness data table for the introduction part, so that the game effect lamp 9 can be illuminated in a suitable illumination mode according to the title display. As a result of these, the title display can be performed suitably.

[Effect 25]
In this embodiment, the performance control CPU 120 can execute a super reach performance. The super reach performance includes a title display part that displays the corresponding title character, and an introduction part until the performance result is notified. In addition, in the operation prompting performances B and D in the introduction part of the super reach performance, an operation prompting character (small) that prompts the player to operate the push button 31B can be displayed. In addition, after the fact that a jackpot will be won is notified by the super reach performance, a title character corresponding to the jackpot game state can be displayed in the jackpot start performance. Then, the title character of the jackpot start performance is displayed larger than the operation prompting character (small). In this way, the situation in which the operation prompting character (small) is displayed in the super reach performance is a situation in which it is not yet clear whether or not a jackpot will be won, whereas the situation in which the title character of the jackpot start performance is displayed is a situation after it has already been notified that a jackpot will be won, and it is possible to celebrate the control to the jackpot game state by displaying the title character of the jackpot start performance larger than the operation prompting character (small).

The title characters of the jackpot start performance are composed of "BIG" or "REGULAR" and "BONUS", and after "BIG" or "REGULAR" is displayed at the top of the fixed position, "BONUS" is displayed at the bottom of the fixed position, and after "BONUS" is displayed at the bottom of the fixed position, "BIG" or "REGULAR" displayed at the top of the fixed position and "BONUS" displayed at the bottom of the fixed position are gradually enlarged. Furthermore, "BIG" or "REGULAR" and "BONUS" are displayed at the smallest size when displayed at the top and bottom of the fixed position, and the size of the characters when "BIG" or "REGULAR" and "BONUS" are displayed at the top and bottom of the fixed position is larger than the size of the characters that make up the operation prompt characters (small). By doing this, the characters that make up the title characters for the jackpot start performance are always displayed larger than the characters that make up the operation prompt characters (small), making it even more congratulatory to be in control of the jackpot game state.

In addition, the smallest character in the string of characters that make up the title characters of the jackpot start performance is larger than the largest character in the string of characters that make up the operation prompt characters (small). By doing this, no matter which character you focus on, the title characters of the jackpot start performance are displayed larger than the operation prompt characters (small), so you can be more congratulated on being controlled into the jackpot game state.

It is also possible to display special prompting characters (large) that suggest a more favorable situation than the small prompting characters, and the large prompting characters are displayed larger than the title characters of the jackpot start performance, allowing the player to sense the favorable situation.

In addition, the smallest character in the string of characters that make up the operation prompt character (large) is displayed larger than the largest character in the string of characters that make up the title character of the jackpot start performance, so that no matter which character the player focuses on, the operation prompt character (large) is displayed larger than the title character of the jackpot start performance, allowing the player to sense the advantageous situation.

In addition, the performance control CPU 120 uses a brightness data table composed of brightness data to control the game effect lamps 9 (frame LEDs LWL1 to LWL12, frame LEDs LWR2 to LWR12, logo LEDs LL1 to LL4, decorative LEDs LS1 to LS5, and attakka lamps LA1 to LA4), and in the title display part of the super reach performance, uses a brightness data table for title display (weak reach system common title, strong reach system common title, high base reach system The game effect lamp 9 is controlled using a brightness data table for the introduction part (introduction of weak reach A for weak reach systems, introduction of weak reach B for weak reach systems, introduction of strong reach A for strong reach systems, introduction of strong reach B for strong reach systems, introduction of strong reach C for strong reach systems, introduction of reach A for high base reach systems, introduction of reach B for high base reach systems, introduction of reach C for high base reach systems, introduction of reach D for high base reach systems). In this way, in the title display part of the super reach performance, the game effect lamp 9 is controlled using a brightness data table for title display that is different from the brightness data table for the introduction part, so that the game effect lamp 9 can be illuminated in a suitable illumination mode according to the title display. As a result of these, the title display can be performed suitably.

[Effect 26]
In this embodiment, the performance control CPU 120 can execute a super reach performance. The super reach performance includes a title display part that displays the corresponding title character, and an introduction part until the performance result is notified. In addition, after the super reach performance notifies that a jackpot will be won, the title character corresponding to the jackpot game state can be displayed in the jackpot start performance. Then, the title character of the jackpot start performance is displayed larger than the title character corresponding to the super reach performance. By doing so, the situation in which the title character is displayed in the super reach performance is a situation in which it is not yet clear whether or not a jackpot will be won, whereas the situation in which the title character of the jackpot start performance is displayed is a situation after it has already been notified that a jackpot will be won, and it is possible to celebrate the control of the jackpot game state by displaying the title character of the jackpot start performance larger than the title character corresponding to the super reach performance.

The Super Reach performance also includes multiple types of Super Reach performance with different title characters, and the title characters of the performance that starts the jackpot are displayed larger than the title characters that correspond to any of the types of Super Reach performance, thereby celebrating the fact that the game has been controlled to a jackpot gaming state.

In addition, the smallest character in the string of characters that make up the title characters of the jackpot start performance is displayed larger than the largest character in the string of characters that make up the title characters corresponding to any type of super reach performance, so no matter which character you focus on, the title characters of the jackpot start performance will be displayed larger than the title characters that correspond to the super reach performance, so you can celebrate being controlled into a jackpot gaming state even more.

In addition, the performance control CPU 120 uses a brightness data table composed of brightness data to control the game effect lamps 9 (frame LEDs LWL1 to LWL12, frame LEDs LWR2 to LWR12, logo LEDs LL1 to LL4, decorative LEDs LS1 to LS5, and attakka lamps LA1 to LA4), and in the title display part of the super reach performance, uses a brightness data table for title display (weak reach system common title, strong reach system common title, high base reach system The game effect lamp 9 is controlled using a brightness data table for the introduction part (introduction of weak reach A for weak reach systems, introduction of weak reach B for weak reach systems, introduction of strong reach A for strong reach systems, introduction of strong reach B for strong reach systems, introduction of strong reach C for strong reach systems, introduction of reach A for high base reach systems, introduction of reach B for high base reach systems, introduction of reach C for high base reach systems, introduction of reach D for high base reach systems). In this way, in the title display part of the super reach performance, the game effect lamp 9 is controlled using a brightness data table for title display that is different from the brightness data table for the introduction part, so that the game effect lamp 9 can be illuminated in a suitable illumination mode according to the title display. As a result of these, the title display can be performed suitably.

[Effect 27]
In this embodiment, the performance control CPU 120 can execute low base weak reach A and B performances. The low base weak reach A and B performances are composed of a title display part that displays the corresponding title characters, and an introduction part until the performance result is announced. In addition, in the operation prompting performance A executed before the title display part in the low base weak reach A and B performances, it is possible to display operation prompting characters (small) that prompt the player to operate the push button 31B. Then, the title characters corresponding to the low base weak reach A and B performances are displayed larger than the operation prompting characters (small). In this way, the operation prompting characters (small) are displayed before the title display part, and the title characters displayed thereafter are displayed larger than the operation prompting characters (small), so that the player can pay attention to the title characters.

In addition, after the operation prompting characters (small) are displayed, the game progresses to the low base weak reach A and B performance, and the title display part in the low base weak reach A and B performance begins. By doing this, the operation prompting characters (small) are displayed before the title display part in the series of events, and the title characters that are displayed afterwards are displayed larger than the operation prompting characters (small), drawing attention to the title characters.

In addition, the smallest character among the characters that make up the title characters corresponding to the low base weak reach A and B effects) is displayed larger than the largest character among the characters that make up the operation prompt characters (small), so no matter which character you focus on, you can draw attention to the title characters.

The performance control CPU 120 also controls the game effect lamps 9 (frame LEDs LWL1-LWL12, frame LEDs LWR2-LWR12, logo LEDs LL1-LL4, decorative LEDs LS1-LS5, and attacker lamps LA1-LA4) using a brightness data table composed of brightness data, and in the title display part of the low base weak reach A and B performances, it controls the game effect lamps 9 using a brightness data table for title display (weak reach common title), and in the introduction part of the low base weak reach A and B performances, it controls the game effect lamps 9 using the brightness data table for each introduction part (weak reach introduction weak reach A, weak reach introduction weak reach B). In this way, in the title display part of the low base weak reach A and B performances, the game effect lamps 9 are controlled using a brightness data table for title display that is different from the brightness data table for the introduction part, so that the game effect lamps 9 can be illuminated in a suitable illumination mode according to the title display. As a result of these, the title display can be performed suitably.

[Effect 28]
In this embodiment, the performance control CPU 120 can execute low base weak reach A and B performances. The low base weak reach A and B performances are composed of a title display part that displays the corresponding title characters, and an introduction part until the performance result is notified. In addition, in the operation prompting performance A executed before the title display part in the low base weak reach A and B performances, it is possible to display an operation prompting character (small) that prompts the player to operate the push button 31B. In addition, after the low base weak reach A and B performances notify that a jackpot will be generated, it is possible to display the title character of the jackpot start performance corresponding to the controlled jackpot game state. Then, the title character of the jackpot start performance is displayed larger than the title character corresponding to the low base weak reach A and B performances, and the title character corresponding to the low base weak reach A and B performances is displayed larger than the operation prompting character (small). By doing this, the situation where the title characters are displayed in the low base weak reach A and B performances is one in which it is not yet clear whether or not a jackpot will occur, whereas the situation where the title characters of the jackpot start performance are displayed is one in which it has already been announced that a jackpot will occur, and by displaying the title characters of the jackpot start performance larger than the title characters corresponding to the low base weak reach A and B performances, it is possible to celebrate the control of the jackpot game state. Also, by displaying the operation prompt characters (small) before the title display part, and displaying the title characters corresponding to the low base weak reach A and B performances displayed afterwards larger than the operation prompt characters (small), it is possible to draw attention to the title characters corresponding to the low base weak reach A and B performances.

In addition, after the operation prompt character (small) is displayed, it progresses to the low base weak reach A, B performance, the title display part in the low base weak reach A, B performance starts, and after the low base weak reach A, B performance notifies the player that a jackpot will occur, the title character of the jackpot start performance is displayed. In this way, the operation prompt character (small) is displayed before the title display part in the series of events, and the title character corresponding to the low base weak reach A, B performance that is displayed afterwards is displayed larger than the operation prompt character (small), so that attention can be drawn to the title character corresponding to the low base weak reach A, B performance, and after the low base weak reach A, B performance notifies the player that a jackpot will occur, the title character of the jackpot start performance is displayed larger than the title character corresponding to the low base weak reach A, B performance, so that the player can celebrate being controlled to a jackpot game state.

The performance control CPU 120 also controls the game effect lamps 9 (frame LEDs LWL1-LWL12, frame LEDs LWR2-LWR12, logo LEDs LL1-LL4, decorative LEDs LS1-LS5, and attacker lamps LA1-LA4) using a brightness data table composed of brightness data, and in the title display part of the low base weak reach A and B performances, it controls the game effect lamps 9 using a brightness data table for title display (weak reach common title), and in the introduction part of the low base weak reach A and B performances, it controls the game effect lamps 9 using the brightness data table for each introduction part (weak reach introduction weak reach A, weak reach introduction weak reach B). In this way, in the title display part of the low base weak reach A and B performances, the game effect lamps 9 are controlled using a brightness data table for title display that is different from the brightness data table for the introduction part, so that the game effect lamps 9 can be illuminated in a suitable illumination mode according to the title display. As a result of these, the title display can be performed suitably.

[Effect 29]
In this embodiment, the performance control CPU 120 can execute a super reach performance. The super reach performance includes a title display part that displays the corresponding title character, and an introduction part until the performance result is notified. In addition, after the super reach performance notifies that a jackpot will be won, the title character corresponding to the jackpot game state can be displayed in the jackpot start performance. The title character of the jackpot start performance is displayed for a longer time than the title character corresponding to the super reach performance. In this way, the situation in which the title character is displayed in the super reach performance is a situation in which it is not yet clear whether or not a jackpot will be won, whereas the situation in which the title character of the jackpot start performance is displayed is a situation after it has already been notified that a jackpot will be won, and it is possible to celebrate the control of the jackpot game state by displaying the title character of the jackpot start performance for a longer time than the title character corresponding to the super reach performance.

In addition, the time from when all of the characters constituting the title characters of the jackpot start performance are displayed until at least a part of the characters are no longer displayed is longer than the time from when a part of the characters constituting the title characters corresponding to the super reach performance is displayed until all of the characters are no longer displayed. By doing this, the time during which the title characters of the jackpot start performance, which has a congratulatory meaning, are clearly visible is made longer than the time during which the title characters corresponding to the super reach performance, which is intended to increase the possibility of a jackpot, are displayed, thereby giving the player a sense of satisfaction.

In addition, after the title letters of the jackpot start performance are displayed, the title letters of the jackpot start performance are switched to a right hit promotion image (small) and a right hit promotion image (large) which suggest the operation method during the jackpot game state, and after a predetermined period of time has elapsed since they switched to the right hit promotion image (small) and right hit promotion image (large), advantageous control is exercised by operating using the operation method suggested by the right hit promotion image (small) and right hit promotion image (large) (an operation method for shooting the game ball towards the right game area 2R), and the time taken to switch from the title letters of the jackpot start performance to the right hit promotion image (small) and right hit promotion image (large) is shorter than the time taken to end the title letters corresponding to the super reach performance. By doing this, the title characters of the jackpot start performance are switched to the right hit prompt image (small) and right hit prompt image (large) in a short time, and then after a specified period of time has passed, control is performed that gives an advantage to the player by operating in the manner suggested by the right hit prompt image (small) and right hit prompt image (large), preventing the player from being disadvantaged by changing the operating method from the period when the title characters of the jackpot start performance ends.

In addition, the performance control CPU 120 uses a brightness data table composed of brightness data to control the game effect lamps 9 (frame LEDs LWL1 to LWL12, frame LEDs LWR2 to LWR12, logo LEDs LL1 to LL4, decorative LEDs LS1 to LS5, and attakka lamps LA1 to LA4), and in the title display part of the super reach performance, uses a brightness data table for title display (weak reach system common title, strong reach system common title, high base reach system The game effect lamp 9 is controlled using a brightness data table for the introduction part (introduction of weak reach A for weak reach systems, introduction of weak reach B for weak reach systems, introduction of strong reach A for strong reach systems, introduction of strong reach B for strong reach systems, introduction of strong reach C for strong reach systems, introduction of reach A for high base reach systems, introduction of reach B for high base reach systems, introduction of reach C for high base reach systems, introduction of reach D for high base reach systems). In this way, in the title display part of the super reach performance, the game effect lamp 9 is controlled using a brightness data table for title display that is different from the brightness data table for the introduction part, so that the game effect lamp 9 can be illuminated in a suitable illumination mode according to the title display. As a result of these, the title display can be performed suitably.

[Effect 30]
In this embodiment, the performance control CPU 120 can execute a super reach performance. The super reach performance includes a title display part that displays the corresponding title character, and an introduction part until the performance result is notified. In addition, in the operation prompting performances B and D in the introduction part of the super reach performance, an operation prompting character (small) that prompts the player to operate the push button 31B can be displayed. In addition, after the fact that a jackpot will be won is notified by the super reach performance, a title character corresponding to the jackpot game state can be displayed in the jackpot start performance. Then, the title character of the jackpot start performance is displayed for a longer time than the operation prompting character (small). In this way, the situation in which the operation prompting character (small) is displayed in the super reach performance is a situation in which it is not yet clear whether or not a jackpot will be won, whereas the situation in which the title character of the jackpot start performance is displayed is a situation after it has already been notified that a jackpot will be won, and it is possible to celebrate the control to the jackpot game state by displaying the title character of the jackpot start performance for a longer time than the operation prompting character (small).

The operation prompting character (small) is displayed until the prompted operation is performed or the time during which the prompted operation is valid has elapsed, and the time during which the title character of the jackpot start performance is displayed is longer than the time from when the operation prompting character (small) is displayed until the time during which the prompted operation is valid has elapsed without the prompted operation being performed. In this way, the player can be congratulated for being controlled into the jackpot game state by displaying the title character of the jackpot start performance for a longer period of time than the time during which the operation prompting character (small) is displayed without the prompted operation being performed.

In addition, the time from when all the characters constituting the title character of the jackpot start performance are displayed until at least a part of the character string disappears is longer than the time during which the operation prompt character (small) is displayed. By doing this, the time during which the title character of the jackpot start performance, which has a congratulatory meaning, is clearly visible is longer than the time during which the operation prompt character (small), which is intended to encourage the player to operate, is displayed, giving the player a sense of satisfaction.

It is also possible to display large operation prompting characters that suggest a more advantageous situation than small operation prompting characters, where small operation prompting characters are displayed without any prompting introduction effect, and large operation prompting characters are displayed after the prompting introduction effect has been executed. The time that the title characters of the jackpot start effect are displayed is longer than the time that large operation prompting characters are displayed. In this way, the time that the congratulatory advantageous state name display is displayed is longer than the time that large operation prompting characters accompanied by a prompt introduction display are displayed, giving the player a sense of satisfaction.

In addition, the performance control CPU 120 uses a brightness data table composed of brightness data to control the game effect lamps 9 (frame LEDs LWL1 to LWL12, frame LEDs LWR2 to LWR12, logo LEDs LL1 to LL4, decorative LEDs LS1 to LS5, and attakka lamps LA1 to LA4), and in the title display part of the super reach performance, uses a brightness data table for title display (weak reach system common title, strong reach system common title, high base reach system The game effect lamp 9 is controlled using a brightness data table for the introduction part (introduction of weak reach A for weak reach systems, introduction of weak reach B for weak reach systems, introduction of strong reach A for strong reach systems, introduction of strong reach B for strong reach systems, introduction of strong reach C for strong reach systems, introduction of reach A for high base reach systems, introduction of reach B for high base reach systems, introduction of reach C for high base reach systems, introduction of reach D for high base reach systems). In this way, in the title display part of the super reach performance, the game effect lamp 9 is controlled using a brightness data table for title display that is different from the brightness data table for the introduction part, so that the game effect lamp 9 can be illuminated in a suitable illumination mode according to the title display. As a result of these, the title display can be performed suitably.

[Effect 31]
In this embodiment, the performance control CPU 120 can execute low base weak reach A and B performances. The low base weak reach A and B performances are composed of a title display part that displays the corresponding title characters, and an introduction part until the performance result is announced. In addition, in the operation prompting performance A executed before the title display part in the low base weak reach A and B performances, it is possible to display an operation prompting character (small) that prompts the player to operate the push button 31B. Then, the title characters corresponding to the low base weak reach A and B performances are displayed for a longer time than the operation prompting character (small). In this way, the operation prompting character (small) is displayed before the title display part, and the title characters displayed thereafter are displayed for a longer time than the operation prompting character (small), thereby drawing attention to the title characters.

In addition, the time from when all the characters making up the title are displayed until at least a part of the characters disappears is longer than the time that the action prompt character (small) is displayed. By doing this, the time that the title display is clearly visible is longer than the time that the prompt character display, which is intended to encourage the player to take an action, is displayed, making it possible to draw attention to the title characters.

It is also possible to display operation prompting characters (large) which suggest a more favorable situation than operation prompting characters (small), with operation prompting characters (small) being displayed as characters encouraging an operation without an introductory prompt, and operation prompting characters (large) being displayed as characters encouraging an operation after an introductory prompt has been executed. The time period during which the title characters are displayed is longer than the time period during which the operation prompting characters (large) are displayed. In this way, the time period during which the title display is displayed is longer than the time period during which operation prompting characters (large) accompanied by an introductory prompt are displayed, drawing attention to the title characters.

The performance control CPU 120 also controls the game effect lamps 9 (frame LEDs LWL1-LWL12, frame LEDs LWR2-LWR12, logo LEDs LL1-LL4, decorative LEDs LS1-LS5, and attacker lamps LA1-LA4) using a brightness data table composed of brightness data, and in the title display part of the low base weak reach A and B performances, it controls the game effect lamps 9 using a brightness data table for title display (weak reach common title), and in the introduction part of the low base weak reach A and B performances, it controls the game effect lamps 9 using the brightness data table for each introduction part (weak reach introduction weak reach A, weak reach introduction weak reach B). In this way, in the title display part of the low base weak reach A and B performances, the game effect lamps 9 are controlled using a brightness data table for title display that is different from the brightness data table for the introduction part, so that the game effect lamps 9 can be illuminated in a suitable illumination mode according to the title display. As a result of these, the title display can be performed suitably.

[Effect 32]
In this embodiment, the performance control CPU 120 can execute low base weak reach A and B performances. The low base weak reach A and B performances are configured to include a title display part that displays the corresponding title characters, and an introduction part until the performance result is notified. In addition, in the operation prompting performance A executed before the title display part in the low base weak reach A and B performances, an operation prompting character (small) that prompts the player to operate the push button 31B can be displayed. In addition, after the fact that a jackpot will be obtained is notified by the low base weak reach A and B performances, the title character of the jackpot start performance corresponding to the controlled jackpot game state can be displayed. Then, the title character of the jackpot start performance is displayed for a longer time than the title character corresponding to the low base weak reach A and B performances, and the title character corresponding to the low base weak reach A and B performances is displayed for a longer time than the operation prompting character (small). By doing this, the situation in which the title characters are displayed in the low base weak reach A and B performances is one in which it is not yet clear whether or not a jackpot will occur, whereas the situation in which the title characters of the jackpot start performance are displayed is one in which it has already been announced that a jackpot will occur, and by displaying the title characters of the jackpot start performance for a longer period of time than the title characters corresponding to the low base weak reach A and B performances, it is possible to celebrate the control of the jackpot game state. Also, by displaying the operation prompt characters (small) before the title display part, and displaying the title characters corresponding to the low base weak reach A and B performances displayed thereafter for a longer period of time than the operation prompt characters (small), it is possible to draw attention to the title characters corresponding to the low base weak reach A and B performances.

The performance control CPU 120 also controls the game effect lamps 9 (frame LEDs LWL1-LWL12, frame LEDs LWR2-LWR12, logo LEDs LL1-LL4, decorative LEDs LS1-LS5, and attacker lamps LA1-LA4) using a brightness data table composed of brightness data, and in the title display part of the low base weak reach A and B performances, it controls the game effect lamps 9 using a brightness data table for title display (weak reach common title), and in the introduction part of the low base weak reach A and B performances, it controls the game effect lamps 9 using the brightness data table for each introduction part (weak reach introduction weak reach A, weak reach introduction weak reach B). In this way, in the title display part of the low base weak reach A and B performances, the game effect lamps 9 are controlled using a brightness data table for title display that is different from the brightness data table for the introduction part, so that the game effect lamps 9 can be illuminated in a suitable illumination mode according to the title display. As a result of these, the title display can be performed suitably.

[Effect 33]
In this embodiment, the performance control CPU 120 can execute low base weak reach A, B performance, and low base strong reach A to C performance in the normal state, and can execute high base reach A to D performance in the probability variable state that is more advantageous than the normal state. The low base weak reach A, B performance, low base strong reach A to C performance, and high base reach A to D performance in the probability variable state are configured to include a title display part that displays the corresponding title character and an introduction part until the performance result is announced. In addition, the low base strong reach A to C performance has a higher jackpot expectation than the low base weak reach A, B performance, the high base reach B to D performance has a higher jackpot expectation than the high base reach A performance, and the high base reach A performance has a higher jackpot expectation than the low base weak reach A, B performance. Then, the expectation degree suggestion display is displayed in the title display part of the low base strong reach A to C performances, the high base reach A performance, and the high base reach B to D performances, and the expectation degree suggestion display is not displayed in the title display part of the low base weak reach A and B performances. By doing this, since the low base weak reach A and B performances in the normal state have a lower jackpot expectation than the low base strong reach A to C performances in the normal state, the expectation degree suggestion display is displayed in the low base strong reach A to C performances, but the expectation degree suggestion display is not displayed in the low base weak reach A and B performances, so that excessive expectations of a jackpot due to the low base weak reach A and B performances are not generated. On the other hand, although the high base reach A performance in a special probability state, which is more advantageous than the normal state, has a lower expectation of a jackpot than the high base reach B to D performance in the special probability state, it has a higher expectation of a jackpot than the low base weak reach A and B performances in the normal state. Therefore, by displaying an expectation indication display in both the high base reach A performance and the high base reach B to D performance, it is possible to expect a jackpot in both the high base reach A performance and the high base reach B to D performance.

[Effect 34]
In this embodiment, the performance control CPU 120 can execute a super reach performance both in the normal state and in a probability variable state that is more advantageous than the normal state. The super reach performance in the normal state and the super reach performance in the probability variable state are both configured to include a title display part that displays the corresponding title characters and an introduction part until the performance result is announced. The title display part of the super reach performance in the probability variable state is shorter than the title display part of the super reach performance in the normal state. In this way, the title display part of the super reach performance in the probability variable state is shorter than the title display part of the super reach performance in the normal state, and the game in the probability variable state can be played at a good tempo.

In addition, even if the frequency with which the Super Reach performance is executed during the special probability state is higher than the frequency with which the Super Reach performance is executed during the normal state, the title display part of the Super Reach performance during the special probability state is shorter than the title display part of the Super Reach performance during the normal state, allowing play in the special probability state to proceed at a good tempo.

In addition, the performance control CPU 120 uses a brightness data table composed of brightness data to control the game effect lamps 9 (frame LEDs LWL1-LWL12, frame LEDs LWR2-LWR12, logo LEDs LL1-LL4, decorative LEDs LS1-LS5, and attakka lamps LA1-LA4), and in the title display part of the super reach performance in the normal state and the super reach performance in the probability change state, it also uses the brightness data table for title display (weak reach system common title, strong reach system common title, high base reach system common title, The game effect lamp 9 is controlled using a brightness data table for the introduction part (introduction of weak reach A for weak reach systems, introduction of weak reach B for weak reach systems, introduction of strong reach A for strong reach systems, introduction of strong reach B for strong reach systems, introduction of strong reach C for strong reach systems, introduction of reach A for high base reach systems, introduction of reach B for high base reach systems, introduction of reach C for high base reach systems, introduction of reach D for high base reach systems) in the super reach performance in the normal state and in the introduction part of the super reach performance in the probability change state. In this way, in the title display part of the super reach performance, the game effect lamp 9 is controlled using a brightness data table for title display that is different from the brightness data table for the introduction part, so that the game effect lamp 9 can be illuminated in a suitable illumination mode according to the title display. As a result of these, the title display can be performed suitably.

[Effect 35]
In this embodiment, the performance control CPU 120 can execute a low base strongest reach performance that has a higher expectation of a jackpot than the low base strong reach A to C performances and the low base strong reach A to C performances. The low base strong reach A to C performances and the low base strongest reach performance are configured to include both a title display part that displays the corresponding title characters and an introduction part until the performance result is announced. In addition, when the game control microcomputer 100 performs 900 variable displays without being controlled by a jackpot in the normal state, it controls to a time-saving state B (play time) that is more advantageous than the normal state. In the title display part in the low base strong reach A to C performances, the title characters are displayed in a display mode in which the title characters are displayed while moving from the left side of the display area to the center, and in the title display part in the low base strongest reach performance, the title characters are displayed in a display mode in which the title characters are displayed reduced from an enlarged display, and when controlled to the time-saving state B (Yu-time), in the Yu-time start performance, the title characters of the Yu-time start performance are displayed in a display mode in which the title characters are displayed reduced from an enlarged display, similar to the title display part in the low base strongest reach performance. In this way, when controlled to the time-saving state B (Yu-time), in the Yu-time start performance, the title characters of the Yu-time start performance are displayed in the same display mode as the title characters of the low base strongest reach performance, which has a relatively high expectation of a jackpot, so that it can be recognized that the time-saving state B (Yu-time) is highly advantageous.

In addition, when the title characters are erased in the Yu-time start performance, they are erased in a display mode in which they are enlarged as they are erased, similar to when the title characters are erased in the title display part of the low-base strongest reach performance. By doing this, when the title characters are erased in the Yu-time start performance, they are erased in the same display mode as when the title characters are erased in the low-base strongest reach performance, which has a relatively high expectation of a jackpot, so that the time-saving state B (Yu-time) can be recognized as being highly advantageous.

[Effect 36]
In this embodiment, the performance control CPU 120 can execute a super reach performance. The super reach performance includes a title display part that displays the corresponding title character, and an introduction part until the performance result is notified. In addition, when the game control microcomputer 100 performs 900 variable displays without being controlled to a jackpot in the normal state, it controls to a time-saving state B (play time) that is more advantageous than the normal state. When controlled to the time-saving state B (play time), the title character of the play time start performance is displayed in the play time start performance, and the size of the characters constituting the title character of the play time start performance is larger than the size of the characters constituting the title character corresponding to the super reach performance. By doing so, the situation in which the title character is displayed in the super reach performance is a situation in which it is not yet clear whether or not a jackpot will be generated, while the title character of the play time start performance is a situation in which it is controlled to the time-saving state B (play time), and the characters constituting the title character of the play time start performance are displayed larger than the characters constituting the title character corresponding to the super reach performance, so it is possible to celebrate being controlled to the time-saving state B (play time).

The Super Reach performance also includes multiple types of Super Reach performance with different title characters, and the characters that make up the title characters of the Yu-Time start performance are larger than the characters that make up the title characters that correspond to any of the types of Super Reach performance. By doing this, the characters that make up the title characters of the Yu-Time start performance are displayed larger than the characters that make up the title characters that correspond to any of the types of Super Reach performance, so you can celebrate being controlled to time-saving state B (Yu-Time).

In addition, the smallest character among the characters that make up the title characters of the Yu-Time start effect is larger than the largest character among the characters that make up the title characters corresponding to any type of Super Reach effect. By doing this, no matter which character you focus on, the title characters of the Yu-Time start effect will be displayed larger than the title characters that correspond to the Super Reach effect, so you can celebrate being controlled to the time-saving state B (Yu-Time) even more.

In addition, the performance control CPU 120 uses a brightness data table composed of brightness data to control the game effect lamps 9 (frame LEDs LWL1 to LWL12, frame LEDs LWR2 to LWR12, logo LEDs LL1 to LL4, decorative LEDs LS1 to LS5, and attakka lamps LA1 to LA4), and in the title display part of the super reach performance, uses a brightness data table for title display (weak reach system common title, strong reach system common title, high base reach system The game effect lamp 9 is controlled using a brightness data table for the introduction part (introduction of weak reach A for weak reach systems, introduction of weak reach B for weak reach systems, introduction of strong reach A for strong reach systems, introduction of strong reach B for strong reach systems, introduction of strong reach C for strong reach systems, introduction of reach A for high base reach systems, introduction of reach B for high base reach systems, introduction of reach C for high base reach systems, introduction of reach D for high base reach systems). In this way, in the title display part of the super reach performance, the game effect lamp 9 is controlled using a brightness data table for title display that is different from the brightness data table for the introduction part, so that the game effect lamp 9 can be illuminated in a suitable illumination mode according to the title display. As a result of these, the title display can be performed suitably.

[Effect 37]
In this embodiment, the performance control CPU 120 can execute a super reach performance. The super reach performance includes a title display part that displays the corresponding title character, and an introduction part until the performance result is notified. In addition, when the game control microcomputer 100 performs 900 variable displays without being controlled to a jackpot in the normal state, it controls to a time-saving state B (play time) that is more advantageous than the normal state. When controlled to the time-saving state B (play time), the title character of the play time start performance is displayed in the play time start performance, and the display time of the title character of the play time start performance is longer than the display time of the title character corresponding to the super reach performance. In this way, the situation in which the title character is displayed in the super reach performance is a situation in which it is not yet clear whether or not a jackpot will be generated, while the title character of the play time start performance is a situation in which it is controlled to the time-saving state B (play time), and the title character of the play time start performance is displayed longer than the title character corresponding to the super reach performance, so it is possible to celebrate being controlled to the time-saving state B (play time).

In addition, the time from when all the characters constituting the title characters of the Yu-Time start effect are displayed until at least a part of the characters are no longer displayed is longer than the time from when a part of the characters constituting the title characters corresponding to the Super Reach effect is displayed until all of the characters are no longer displayed. By doing this, the time during which the title characters of the Yu-Time start effect, which has a congratulatory meaning, are clearly visible is longer than the time during which the title characters corresponding to the Super Reach effect, which is intended to increase the possibility of a jackpot, are displayed, giving the player a sense of satisfaction.

In addition, the performance control CPU 120 uses a brightness data table composed of brightness data to control the game effect lamps 9 (frame LEDs LWL1 to LWL12, frame LEDs LWR2 to LWR12, logo LEDs LL1 to LL4, decorative LEDs LS1 to LS5, and attakka lamps LA1 to LA4), and in the title display part of the super reach performance, uses a brightness data table for title display (weak reach system common title, strong reach system common title, high base reach system The game effect lamp 9 is controlled using a brightness data table for the introduction part (introduction of weak reach A for weak reach systems, introduction of weak reach B for weak reach systems, introduction of strong reach A for strong reach systems, introduction of strong reach B for strong reach systems, introduction of strong reach C for strong reach systems, introduction of reach A for high base reach systems, introduction of reach B for high base reach systems, introduction of reach C for high base reach systems, introduction of reach D for high base reach systems). In this way, in the title display part of the super reach performance, the game effect lamp 9 is controlled using a brightness data table for title display that is different from the brightness data table for the introduction part, so that the game effect lamp 9 can be illuminated in a suitable illumination mode according to the title display. As a result of these, the title display can be performed suitably.

[Effect 38]
In this embodiment, the performance control CPU 120 can execute a super reach performance. The super reach performance includes a title display part that displays the corresponding title character, and an introduction part until the performance result is notified. In addition, when 900 variable displays are performed in the normal state without being controlled by a jackpot, the game control microcomputer 100 controls to a time-saving state B (play time) that is more advantageous than the normal state. In addition, in the normal state, it is possible to display the remaining number of times until the play time, which indicates the remaining number of times until the time-saving state B (play time). The size of the characters that constitute the title characters corresponding to the super reach performance is larger than the size of the characters that constitute the remaining number of times until the play time. In this way, the title characters corresponding to the super reach performance are displayed larger than the characters that constitute the remaining number of times until the play time, so that attention can be drawn to the title characters corresponding to the super reach performance.

The super reach effect includes low base weak reach A and B effects, and low base strong reach A to C effects, which have a higher jackpot expectation than low base weak reach A and B effects, and the remaining number of times until Yu-time is displayed during the execution of low base weak reach A and B effects, but not during the execution of low base strong reach A to C effects. By doing this, the remaining number of times until Yu-time is displayed in low base weak reach A and B effects, which have a low jackpot expectation, so that the player can be aware of the number of times until time-saving state B (Yu-time), while the remaining number of times until Yu-time is not displayed in low base strong reach A to C effects, which have a high jackpot expectation, so that the player can focus on the content of the effect. Also, since time-saving state B (Yu-time) is more likely to result in a jackpot that is more favorable than in the normal state, the player's disappointment can be alleviated when there are few remaining times until time-saving state B (Yu-time).

In addition, if the selection effect progresses to a low base strong reach A-C effect without going through the low base weak reach A or B effect, the remaining number of times until Yu-Time is not displayed even during the selection effect. This prevents the remaining number of times until Yu-Time from interfering with the selection effect that determines a super reach effect of low base strong reach A-C or higher, and also reduces the player's disappointment when there are only a few times remaining until the time-saving state B (Yu-Time).

In addition, when a jackpot is announced in the low base strong reach A-C performance, the character of the remaining number of times until the Yu-time is not displayed again, and the jackpot game state is controlled, and when a miss is announced in the low base strong reach A-C performance, the character of the remaining number of times until the Yu-time is displayed again after the end of the low base strong reach A-C performance. By doing this, when a jackpot is announced in the low base strong reach A-C performance, the character of the remaining number of times until the Yu-time is not displayed again, so that the disappointment of the player can be alleviated when there are few remaining times until the time-saving state B (Yu-time). In addition, when a miss is announced in the low base strong reach A-C performance, the character of the remaining number of times until the Yu-time is displayed again after the end of the low base strong reach A-C performance, so that the player can feel relieved as soon as possible when there are few remaining times until the time-saving state B (Yu-time).

In addition, the performance control CPU 120 uses a brightness data table composed of brightness data to control the game effect lamps 9 (frame LEDs LWL1 to LWL12, frame LEDs LWR2 to LWR12, logo LEDs LL1 to LL4, decorative LEDs LS1 to LS5, and attakka lamps LA1 to LA4), and in the title display part of the super reach performance, uses a brightness data table for title display (weak reach system common title, strong reach system common title, high base reach system The game effect lamp 9 is controlled using a brightness data table for the introduction part (introduction of weak reach A for weak reach systems, introduction of weak reach B for weak reach systems, introduction of strong reach A for strong reach systems, introduction of strong reach B for strong reach systems, introduction of strong reach C for strong reach systems, introduction of reach A for high base reach systems, introduction of reach B for high base reach systems, introduction of reach C for high base reach systems, introduction of reach D for high base reach systems). In this way, in the title display part of the super reach performance, the game effect lamp 9 is controlled using a brightness data table for title display that is different from the brightness data table for the introduction part, so that the game effect lamp 9 can be illuminated in a suitable illumination mode according to the title display. As a result of these, the title display can be performed suitably.

[Effect 39]
In this embodiment, the performance control CPU 120 can execute a super reach performance. The super reach performance includes a title display part that displays the corresponding title character, and an introduction part until the performance result is notified. In addition, when 900 variable displays are performed in the normal state without being controlled by a jackpot, the game control microcomputer 100 controls the game to a time-saving state B (play time) that is more advantageous than the normal state. In addition, in the operation prompting performances A to D that are executed at a timing related to the super reach performance, it is possible to display an operation prompting character (small) that prompts the player to operate the push button 31B. In addition, in the normal state, it is possible to display a character indicating the remaining number of times until the time-saving state B (play time) is controlled. And, the size of the character that constitutes the operation prompting character (small) is larger than the size of the character that constitutes the character indicating the remaining number of times until the play time. In this way, the operation prompting character (small) is displayed larger than the character that constitutes the character indicating the remaining number of times until the play time, so that it is possible to draw attention to the operation prompting character (small) and effectively prompt the player to perform an action (operation).

In addition, when executing the low base strong reach A-C performances among the super reach performances, if the operation prompt character (small) is displayed in the operation prompt performance A executed before the title display part, the character indicating the number of times remaining until Yu-time is displayed at the same time, whereas if the operation prompt character (small) is displayed in the operation prompt performance D executed at the end of the introduction part, the character indicating the number of times remaining until Yu-time is not displayed. By doing this, the character indicating the number of times remaining until Yu-time is displayed at the same time as the prompt character display operation prompt character (small) before the development into the low base strong reach A-C performance, it is possible to make the player aware of the number of times until the time-saving state B (Yu-time), and by not displaying the character indicating the number of times remaining until Yu-time in the operation prompt character (small) in the introduction part, it is possible to make the player pay attention to whether or not a jackpot will be announced.

In addition, when the low base strong reach A-C effects are executed, in the operation prompting effect A executed before the title display part, only the operation prompting character (small) is displayed out of the operation prompting character (small) and the operation prompting character (large), which suggests a more favorable situation than the operation prompting character (small), while in the operation prompting effect D executed at the end of the introductory part, both the operation prompting character (small) and the operation prompting character (large) can be displayed, and when the operation prompting character (large) is displayed in the low base strong reach A-C effects, the character showing the number of times remaining until the play time is not displayed at the same time. By doing this, in addition to whether or not a jackpot will be announced, the operation prompting character (large) is displayed, drawing attention to the fact that a more favorable situation is suggested.

In addition, the performance control CPU 120 controls the game effect lamps 9 (frame LEDs LWL1-LWL12, frame LEDs LWR2-LWR12, logo LEDs LL1-LL4, decorative LEDs LS1-LS5, and attacca lamps LA1-LA4) using a brightness data table composed of brightness data, and in the title display part of the super reach performance, controls the game effect lamps 9 using a brightness data table for title display (common title for weak reach systems, common title for strong reach systems), and in the introduction part of the super reach performance, controls the game effect lamps 9 using a brightness data table for the introduction part (introduction of weak reach A for weak reach systems, introduction of weak reach B for weak reach systems, introduction of strong reach A for strong reach systems, introduction of strong reach B for strong reach systems, introduction of strong reach C for strong reach systems). In this way, in the title display part of the super reach performance, the game effect lamp 9 is controlled using a brightness data table for the title display that is different from the brightness data table for the introductory part, so the game effect lamp 9 can be illuminated in a suitable illumination mode according to the title display. As a result, the title can be displayed in a suitable manner.

[Effect 40]
In this embodiment, the performance control CPU 120 can execute a super reach performance. The super reach performance includes a title display part that displays the corresponding title character, and an introduction part until the performance result is notified. In addition, when 900 variable displays are performed in the normal state without being controlled by a jackpot, the game control microcomputer 100 controls to a time-saving state B (play time) that is more advantageous than the normal state. In addition, after a jackpot is notified by the super reach performance, the title character of the jackpot start performance corresponding to the controlled jackpot game state can be displayed. In addition, in the normal state, the remaining number of times until the play time, which indicates the remaining number of times until the time-saving state B (play time), can be displayed. Then, before displaying the title character of the jackpot start performance, the remaining number of times until the play time is erased, and the size of the characters constituting the title character of the jackpot start performance is larger than the size of the characters constituting the remaining number of times until the play time. By doing this, the situation in which the title characters of the jackpot start performance are displayed is one in which it has already been notified that a jackpot has occurred, and the characters indicating the number of times remaining until Yu-time are unnecessary, so the characters indicating the number of times remaining until Yu-time are erased before the title characters of the jackpot start performance are displayed, and the characters constituting the title characters of the jackpot start performance are displayed larger than the characters constituting the number of times remaining until Yu-time, so that the player can be congratulated for being controlled into the jackpot game state.

In addition, regardless of the number of remaining plays until time-saving state B (Yu-time), the size of the characters that make up the characters for the number of remaining plays until Yu-time is the same, and the size of the characters that make up the title characters of the jackpot start performance is larger than the size of the characters that make up the characters for the number of remaining plays until Yu-time. By doing this, regardless of the number of remaining plays until time-saving state B (Yu-time), the characters that make up the title characters of the jackpot start performance are displayed larger than the characters that make up the characters for the number of remaining plays until Yu-time, so you can celebrate being controlled to the jackpot gaming state.

In addition, the game control microcomputer 100 performs the variable display using a time-saving B start variable pattern having a longer variable time than the variable pattern normally used in the time-saving state B (Yu-time) in the variable display caused by the game ball first entering the first start winning port or the second start winning port in the time-saving state B (Yu-time). By doing this, the Yu-time start presentation can be executed with a variable period according to the time-saving B start variable pattern in the first variation in the time-saving state B (Yu-time).

In addition, the performance control CPU 120 controls the game effect lamps 9 (frame LEDs LWL1-LWL12, frame LEDs LWR2-LWR12, logo LEDs LL1-LL4, decorative LEDs LS1-LS5, and attacca lamps LA1-LA4) using a brightness data table composed of brightness data, and in the title display part of the super reach performance, controls the game effect lamps 9 using a brightness data table for title display (common title for weak reach systems, common title for strong reach systems), and in the introduction part of the super reach performance, controls the game effect lamps 9 using a brightness data table for the introduction part (introduction of weak reach A for weak reach systems, introduction of weak reach B for weak reach systems, introduction of strong reach A for strong reach systems, introduction of strong reach B for strong reach systems, introduction of strong reach C for strong reach systems). In this way, in the title display part of the super reach performance, the game effect lamp 9 is controlled using a brightness data table for the title display that is different from the brightness data table for the introductory part, so the game effect lamp 9 can be illuminated in a suitable illumination mode according to the title display. As a result, the title can be displayed in a suitable manner.

[Effect 41]
In this embodiment, the performance control CPU 120 can execute low base weak reach A and B performances. The low base weak reach A and B performances are configured to include a title display part that displays the corresponding title characters, and an introduction part until the performance result is notified. In addition, it is possible to change and display the title characters corresponding to the low base weak reach A and B performances from a white state to a red or gold state. Then, when the title characters are changed from a white state to a red or gold state in the title display part of the low base weak reach A and B performances, the time during which the title characters are displayed in the red or gold state is longer than the time during which the title characters are displayed in the white state. In this way, when the title characters are changed from a white state to a red or gold state in the title display part of the low base weak reach A and B performances, the title characters in the red or gold state, i.e., the title characters in the state after the change, are displayed longer than the title characters in the white state, i.e., the title characters in the state before the change, so that it is possible to reliably recognize that the white state has been changed to red or gold.

In addition, in the title display part of the low base weak reach A and B performances, the title characters may be changed from a white state to a red or gold state, or may remain in the white state. When the title characters are changed from a white state to a red or gold state, a specific sound is outputted when t1 time has elapsed since the start of the title display period, and when the title characters are not changed and remain in the white state, a specific sound is outputted without changing the white state when t1 time has elapsed since the start of the title display period. In this way, a specific sound is outputted when the title characters corresponding to the low base weak reach A and B performances change from a white state to a red or gold state at a specific timing, and a specific sound is also outputted when the title characters do not change and remain in the white state at a specific timing, so that it can be expected that the specific sound will cause the title characters to change to a red or gold state.

In addition, when the title characters corresponding to the low base weak reach A and B effects change from a white state to another state, a specific sound is output whether the character changes to a red state or a gold state, so that the output of the specific sound draws attention to the type of state the character changes to.

The performance control CPU 120 also controls the game effect lamps 9 (frame LEDs LWL1-LWL12, frame LEDs LWR2-LWR12, logo LEDs LL1-LL4, decorative LEDs LS1-LS5, and attacker lamps LA1-LA4) using a brightness data table composed of brightness data, and in the title display part of the low base weak reach A and B performances, it controls the game effect lamps 9 using a brightness data table for title display (weak reach common title), and in the introduction part of the low base weak reach A and B performances, it controls the game effect lamps 9 using the brightness data table for each introduction part (weak reach introduction weak reach A, weak reach introduction weak reach B). In this way, in the title display part of the low base weak reach A and B performances, the game effect lamps 9 are controlled using a brightness data table for title display that is different from the brightness data table for the introduction part, so that the game effect lamps 9 can be illuminated in a suitable illumination mode according to the title display. As a result of these, the title display can be performed suitably.

[Effect 42]
In this embodiment, the performance control CPU 120 can execute low base weak reach A and B performances. The low base weak reach A and B performances are composed of a title display part that displays the corresponding title characters and an introduction part until the performance result is announced. In addition, it is possible to change and display the title characters corresponding to the low base weak reach A and B performances from a white state to a red state, or a gold state that suggests a higher probability of winning than the red state. And, in either case of changing the title characters from a white state to a red state or a gold state in the title display part of the low base weak reach A and B performances, the characters are displayed so as to change from the white state to a common display state and then to the red state or the gold state. By doing this, whether the title characters are changed from a white form to a red form or from a white form to a gold form in the title display part of the low base weak reach A and B performances, they are changed to a common display form and then changed to the red form or the gold form. Therefore, by changing from the white form to the common display form, until the common display form changes to the red form or the gold form, the player can expect until the end that the display will change to the gold form, which has a higher probability of winning than the red form,

The common display mode is one in which the characters that make up the title text are illuminated, and when the light clears, they change to a red or gold color. By doing this, it is possible to encourage the characters that make up the title text to change to a red or gold color by illuminating them.

[Effect 43]
In this embodiment, the performance control CPU 120 can execute low base weak reach A and B performances. The low base weak reach A and B performances are composed of a title display part that displays the corresponding title characters, and an introduction part until the performance result is announced. The performance control CPU 120 also controls the game effect lamps 9 (frame LEDs LWL1 to LWL12, frame LEDs LWR2 to LWR12, logo LEDs LL1 to LL4, decorative LEDs LS1 to LS5, and attacca lamps LA1 to LA4) using a brightness data table composed of brightness data. The performance control CPU 120 controls the game effect lamp 9 using a common brightness data table for the title display part (weak reach common title) in both the title display part of the low base weak reach A performance and the title display part of the low base weak reach B performance, controls the game effect lamp 9 using a brightness data table for the low base weak reach A performance (weak reach weak reach A introduction) in the introduction part of the low base weak reach A performance, and controls the game effect lamp 9 using a brightness data table for the low base weak reach B performance (weak reach weak reach B introduction) in the introduction part of the low base weak reach B performance. In this way, the brightness data table corresponding to the title display part is common for two different super reach performances, preventing an increase in cost and capacity, and the brightness data table corresponding to each of the introduction parts is the brightness data table corresponding to each of the introduction parts, so that the period until the notification of whether or not a jackpot will be obtained can be suitably aroused, and as a result, a suitable title display can be performed.

[Effect 44]
In this embodiment, the performance control CPU 120 can execute the low base weak reach A, B performance and the low base strong reach A to C performance, which have a higher jackpot expectation than the low base weak reach A, B performance. The low base weak reach A, B performance and the low base strong reach A to C performance each include a title display part that displays the corresponding title character and an introduction part until the performance result is announced. In addition, the performance control CPU 120 controls the game effect lamps 9 (frame LEDs LWL1 to LWL12, frame LEDs LWR2 to LWR12, logo LEDs LL1 to LL4, decorative LEDs LS1 to LS5, and attack lamps LA1 to LA4) using a brightness data table composed of brightness data. The presentation control CPU 120 controls the game effect lamp 9 using a common title display part brightness data table (weak reach type common title) in the title display part of the low base weak reach A presentation and in the title display part of the low base weak reach B presentation, controls the game effect lamp 9 using a common title display part brightness data table (strong reach type common title) in the title display part of the low base strong reach A presentation, in the title display part of the low base strong reach B presentation and in the title display part of the low base strong reach C presentation, and controls the game effect lamp 9 using a common title display part brightness data table (strong reach type common title) in the introduction part of the low base weak reach A presentation. The game effect lamp 9 is controlled using a brightness data table for the low base weak reach B presentation (introduction of weak reach B of a weak reach system) and in the introduction part of the low base strong reach A presentation, the game effect lamp 9 is controlled using the brightness data table for the low base strong reach A presentation (introduction of strong reach A of a strong reach system) and in the introduction part of the low base strong reach B presentation, the game effect lamp 9 is controlled using the brightness data table for the low base strong reach B presentation (introduction of strong reach B of a strong reach system) and in the introduction part of the low base strong reach C presentation, the game effect lamp 9 is controlled using the brightness data table for the low base strong reach C presentation (introduction of strong reach C of a strong reach system). In this way, the brightness data table corresponding to the title display part is common for two types of super reach effects with high expectations and two types of super reach effects with low expectations, thereby preventing an increase in cost and capacity, and by using the corresponding brightness data table for each of the introductory parts, it is possible to appropriately stimulate the period until it is announced whether or not a jackpot has been hit, and as a result, an appropriate title display can be performed.

[Effect 45]
In this embodiment, the CPU 120 for controlling the performance can execute the low base weak reach A, B performance, the low base strong reach A to C performance, which has a higher expectation of a jackpot than the low base weak reach A, B performance, and the low base strongest reach performance, which has an even higher expectation of a jackpot than the low base strong reach A to C performance. The low base weak reach A, B performance, the low base strong reach A to C performance, and the low base strongest reach performance each include a title display part that displays the corresponding title character, and an introduction part until the performance result is announced. The CPU 120 for controlling the performance controls the game effect lamps 9 (frame LEDs LWL1 to LWL12, frame LEDs LWR2 to LWR12, logo LEDs LL1 to LL4, decorative LEDs LS1 to LS5, and attack lamps LA1 to LA4) using a brightness data table composed of brightness data. The presentation control CPU 120 controls the game effect lamp 9 using a brightness data table for a common title display part (weak reach-type common title) in the title display part of the low base weak reach A presentation and in the title display part of the low base weak reach B presentation, controls the game effect lamp 9 using a brightness data table for a common title display part (strong reach-type common title) in the title display part of the low base strong reach A presentation, controls the game effect lamp 9 using a brightness data table for a common title display part (strong reach-type common title) in the title display part of the low base strong reach A presentation, controls the game effect lamp 9 using a brightness data table for title display for the low base strongest reach presentation (strongest reach-type strongest reach title) in the title display part of the low base strongest reach presentation, and controls the game effect lamp 9 using a brightness data table for low base weak reach A presentation (weak reach-type weak reach title) in the introduction part of the low base weak reach A presentation. In the introduction part of the low base weak reach B presentation, the game effect lamp 9 is controlled using a brightness data table for the low base weak reach B presentation (weak reach system weak reach B introduction), in the introduction part of the low base strong reach A presentation, the game effect lamp 9 is controlled using a brightness data table for the low base strong reach A presentation (strong reach system strong reach A introduction), in the introduction part of the low base strong reach B presentation, the game effect lamp 9 is controlled using a brightness data table for the low base strong reach B presentation (strong reach system strong reach B introduction), in the introduction part of the low base strong reach C presentation, the game effect lamp 9 is controlled using a brightness data table for the low base strong reach C presentation (strong reach system strong reach C introduction), and in the introduction part of the low base strongest reach presentation, the game effect lamp 9 is controlled using a brightness data table for the low base strongest reach presentation (strongest reach system strongest reach introduction). In this way, the brightness data table corresponding to the title display part is common for two types of super reach effects with high expectation and two types of super reach effects with low expectation, thereby preventing an increase in cost and capacity, and by using the brightness data table corresponding to each of the introduction parts, the period until the announcement of whether or not a jackpot will be won can be suitably excited, resulting in a suitable title display. Furthermore, the low-base strongest reach effect with the highest expectation is heightened in interest by providing dedicated brightness data tables for the title display part and introduction part, respectively, resulting in a suitable title display.

[Effect 46]
In this embodiment, the performance control CPU 120 can execute low base weak reach A and B performances. The low base weak reach A and B performances are composed of a title display part that displays the corresponding title characters, and an introduction part until the performance result is announced. In addition, it is possible to change and display the title characters corresponding to the low base weak reach A and B performances from a white state to a red state, or a gold state that suggests a higher probability of a jackpot than the red state. In addition, the performance control CPU 120 controls the game effect lamps 9 (frame LEDs LWL1 to LWL12, frame LEDs LWR2 to LWR12, logo LEDs LL1 to LL4, decorative LEDs LS1 to LS5, and attack lamps LA1 to LA4) using a brightness data table composed of brightness data. Then, when the color of the title letters is not changed in the title display part of the low base weak reach A and B effects, the performance control CPU 120 controls the game effect lamp 9 using the brightness data table: weak reach system common title (white) in which brightness data is set for when a title change performance is not performed, and when the color of the title letters is changed to red or gold in the title display part of the low base weak reach A and B effects, the performance control CPU 120 controls the game effect lamp 9 using the brightness data table: weak reach system common title (red) or weak reach system common title (gold) in which brightness data is set for when a title change performance is performed, and regardless of whether the color of the title letters is changed in the introduction part of the low base weak reach A and B effects, the performance control CPU 120 controls the game effect lamp 9 using the brightness data table for the common introduction part (weak reach system weak reach A introduction, weak reach system weak reach B introduction). In this way, whether the title characters are not changed to red or gold in the title display part of the low base weak reach A and B performances or are changed to the second form, the brightness data table corresponding to each introduction part is made common, preventing an increase in costs and capacity, and by using the corresponding brightness data table for each title display part, it is possible to appropriately present the title characters in either the case where the color is not changed or where the color is changed to red or gold, resulting in an appropriate title display.

[Effect 47]
In this embodiment, the performance control CPU 120 can execute low base weak reach A and B performances. The low base weak reach A and B performances are composed of a title display part that displays the corresponding title characters, and an introduction part until the performance result is announced. The performance control CPU 120 also controls the game effect lamps 9 (frame LEDs LWL1 to LWL12, frame LEDs LWR2 to LWR12, logo LEDs LL1 to LL4, decorative LEDs LS1 to LS5, and attacca lamps LA1 to LA4) using a brightness data table composed of brightness data. In addition, the title display part of the low base weak reach A and B performance includes a title start period from when the title characters start to be displayed at the fixed position, and a title display period and a title end period after the title characters are displayed at the fixed position, and the performance control CPU 120 controls the game effect lamp 9 using a brightness data table (weak reach title start) that defines a light emission pattern specific to the title start period during the title start period of the title display part of the low base weak reach A and B performance, and controls the game effect lamp 9 using a brightness data table (weak reach title display) that defines a light emission pattern specific to the title display period and after during the title display period and title end period. In this way, by using the brightness data table corresponding to the title start period from when the title characters start to be displayed at the fixed position during the low base weak reach A and B performance, the brightness data table corresponding to the title display period and the title end period after the title characters are displayed at the fixed position, and the brightness data table corresponding to the introduction part, the period during which the title characters are displayed and the period until the notification of whether or not the advantageous state will be obtained can be suitably stimulated, and as a result, a suitable title display can be performed.

In addition, depending on whether it is a low base weak reach A presentation or a low base weak reach B presentation, a common brightness data table is used for either the brightness data table corresponding to the title start period or the brightness data table corresponding to the title display period and title end period, and a separate brightness data table with individual contents is set for the other.By using a common brightness data table for either the brightness data table corresponding to the title start period or the brightness data table corresponding to the title display period and title end period, it is possible to prevent an increase in costs and capacity, and by using a brightness data table corresponding to each of the other periods, it is possible to appropriately present whether it is a low base weak reach A presentation or a low base weak reach B presentation, and as a result, it is possible to display the title in an appropriate manner.

Although the embodiments of the present invention have been described above with reference to the drawings, the specific configuration is not limited to these embodiments, and the present invention also includes modifications and additions that do not deviate from the gist of the present invention.

In addition, when the gaming medium passes through the starting gate or gate during the game, a process for storing random numbers and a process for determining whether the player has won or lost are executed. In this case, various settings are required for setting the range of the random numbers and the process for determining whether the player has won or lost. Specific examples are explained below.

(Basic explanation)
First, the basic configuration and control of the pachinko gaming machine 1 will be described.

(Configuration of Pachinko Game Machine 1, etc.)
12 is a front view of a pachinko game machine 1, showing the layout of the main components. The pachinko game machine (game machine) 1 is broadly composed of a game board (gauge board) 2 that constitutes the game board surface, and a game machine frame (base frame) 3 that supports and fixes the game board 2. A game area is formed on the game board 2, and game balls as game media are shot into this game area by a predetermined ball shooting device.

A first special symbol display device 4A and a second special symbol display device 4B are provided at predetermined positions on the game board 2. In the example shown in FIG. 12, they are provided on the right side of the game area. The first special symbol display device 4A and the second special symbol display device 4B can each variably display special symbols as multiple types of special identification information. Special symbols are also called "special symbols." The variable display of special symbols is also called "special symbol game." Both the first special symbol display device 4A and the second special symbol display device 4B are configured using 7-segment LEDs or the like. The special symbols are represented by numbers showing "0" to "9," symbols showing "-," or any other lighting pattern. The special symbols may include a pattern in which all LEDs are turned off.

The "variable display" of special symbols means, for example, a display of multiple types of special symbols that can be changed. For other symbols such as performance symbols, small symbols, and normal symbols, "variable display" also means a display of multiple types of symbols that can be changed. Performance symbols are also called decorative symbols or ornamental symbols. Variable display is also called variable display, or simply "change." Changes include updating multiple symbols, scrolling multiple symbols, and deforming, enlarging, or reducing one or more symbols. Changes may include a mode of displaying a symbol in a flashing manner. In the variable display of special symbols and normal symbols, multiple types of special symbols or normal symbols are displayed in a variable manner. In the variable display of performance symbols, multiple types of performance symbols are scrolled or updated, or one or more performance symbols are deformed, enlarged, or reduced. In the variable display of any symbol, a predetermined symbol is displayed as a stop display as a display result at the end. Stop display is also called derived display, or simply derived. The symbol that is finally stopped and displayed in a variable display is also called the final stop symbol or the final symbol. The final stop symbol in a special symbol game is also called the final special symbol. The display result of the variable display includes the display result of the special symbol, and is also called the variable display result. The display result of the special symbol is also called the special symbol display result. The execution time of the variable display includes the special symbol change time, which is the change time of the special symbol, and is also called the variable display time. The special symbol change time can be set to a different time corresponding to the change pattern of the special symbol, of which multiple patterns are prepared in advance.

The special pattern variably displayed on the first special pattern display device 4A is also called the "first special pattern." The special pattern variably displayed on the second special pattern display device 4B is also called the "second special pattern." A special pattern game using the first special pattern is also called the "first special pattern game." A special pattern game using the second special pattern is also called the "second special pattern game." There may be only one type of special pattern display device that variably displays special patterns.

A normal symbol display 20 is provided at a predetermined position on the game board 2. In the example shown in FIG. 12, it is provided on the left side of the game area. The normal symbol display 20 can perform variable display of normal symbols as multiple types of normal identification information different from the special symbols. The normal symbols are also called "normal symbols". The variable display of normal symbols is also called "normal symbol game". The normal symbol display 20 is configured using 7-segment LEDs, etc. The normal symbols are represented by numbers indicating "0" to "9", symbols indicating "-", and other arbitrary lighting patterns. The normal symbols may include a pattern in which some or all of the multiple LEDs are lit, or a pattern in which all of the multiple LEDs are turned off. The final stop symbol in the normal symbol game is also called a confirmed normal symbol. The display result of the normal symbol is also called a normal symbol display result. The execution time during which the normal symbol is variably displayed in the normal symbol game is also called a normal symbol fluctuation time. The normal symbol variation time can be set to a different time depending on the normal symbol variation pattern, of which multiple patterns are prepared in advance.

An image display device 5 is provided near the center of the play area on the game board 2. The image display device 5 may be configured using a mechanism capable of forming any image, such as an LCD (liquid crystal display), an organic EL (electro luminescence), a dot matrix LED, a projector and screen, a stereoscopic image projection device, or any other device. The image display device 5 is capable of displaying various types of performance images. Furthermore, the image display device 5 is not limited to performance images, and can display any control-related image, such as an inspection image or a setting image.

For example, on the screen of the image display device 5, a variable display of the performance pattern can be executed in synchronization with the first special game or the second special game. The performance pattern is a display pattern showing numbers or the like, and is a plurality of types of decorative identification information different from the special pattern or the normal pattern. On the screen of the image display device 5 shown in FIG. 12, each of the performance pattern display areas 5L, 5C, and 5R of "left", "middle", and "right" is provided, and the performance pattern is displayed variably by, for example, scrolling or updating the performance pattern in the vertical direction in synchronization with the first special game or the second special game. The synchronization of the variable display may be a common timing for different types of patterns, between the timing when the pattern starts to change and the timing when the change ends and the pattern is finally stopped and displayed. The final stop pattern in the variable display of the performance pattern is also called the determined performance pattern, determined decoration pattern, or determined decoration pattern. The variable display of the performance symbols is synchronized with the first and second special symbol games, so the variable display time of the performance symbols is the same as the special symbol fluctuation time.

The screen of the image display device 5 may be provided with a display area capable of displaying performance images corresponding to the pending display and the active display. The pending display is a display corresponding to a variable display that has not yet been executed and is on hold. The active display is a display corresponding to a variable display that is being executed. The pending display and the active display are also collectively referred to as a variable display-compatible display corresponding to the variable display. A display area that performs a pending display is also referred to as a pending display area. A display area that performs an active display is also referred to as an active display area. The number of variable displays that are on hold is also referred to as the number of pending memories. The number of pending memories that corresponds to the first special game is also referred to as the first number of pending memories. The number of pending memories that corresponds to the second special game is also referred to as the second number of pending memories. The sum of the first number of pending memories and the second number of pending memories is also referred to as the total number of pending memories.

A first reserve indicator 25A and a second reserve indicator 25B, each of which includes a plurality of LEDs, are provided above the first special symbol display device 4A and the second special symbol display device 4B shown in FIG. 12. The first reserve indicator 25A displays the first reserve memory number by the number of lit LEDs. The second reserve indicator 25B displays the second reserve memory number by the number of lit LEDs. A regular pattern reserve indicator 25C, each of which includes a plurality of LEDs, is provided above the regular pattern display device 20 shown in FIG. 12. The regular pattern reserve indicator 25C displays the regular pattern reserve number by the number of lit LEDs. The regular pattern reserve number is the reserve memory number corresponding to the regular pattern game.

Below the image display device 5, there are provided a winning ball device 6A and a variable winning ball device 6B. The winning ball device 6A forms a first start winning opening that is always kept in a constant open state so that game balls can enter, for example, by a predetermined ball receiving member. The variable winning ball device 6B forms a second start winning opening that can be changed between a closed state and an open state by a normal electric role solenoid 81 shown in FIG. 13 as a normal electric role. The variable winning ball device 6B is equipped with, for example, an electric tulip-type role having a pair of movable wings, and when the normal electric role solenoid 81 is in the off state, the movable wings are in a vertical position, so that the second start winning opening is in a closed state in which game balls cannot enter, or in a normal open state in which game balls have difficulty entering the second start winning opening. When the normal electric device solenoid 81 is on, the variable winning ball device 6B has a movable wing piece in a tilted position, so that the second start winning port is in an open state where game balls can enter, or in an expanded open state where game balls can easily enter the second start winning port. The open state where game balls can enter the second start winning port, or the expanded open state where game balls can easily enter, is also called the first variable state. The closed state where game balls cannot enter the second start winning port, or the normal open state where game balls cannot easily enter, is also called the second variable state. Note that the variable winning ball device 6B is not limited to one equipped with an electric tulip-type device, as long as it can be changed between the first and second variable states.

The entry of a game ball into the first start winning hole formed by the winning ball device 6A is also called the first start winning. The entry of a game ball into the second start winning hole formed by the variable winning ball device 6B is also called the second start winning. The game ball that entered the first start winning hole is detected by the first start winning hole switch 22A shown in FIG. 13. The game ball that entered the second start winning hole is detected by the second start winning hole switch 22B shown in FIG. 13. Based on the occurrence of the first start winning, a predetermined number of prize balls, for example, three balls, are paid out, and the first reserved memory number can be updated so that it is incremented by one. However, if the first reserved memory number has reached the upper limit, the first reserved memory number is not updated even if the first start winning occurs. In response to the first reserved memory number being incremented by one, the first start condition is established, and the first special pattern game in which the special pattern is variably displayed by the first special pattern display device 4A becomes executable. When the second start winning occurs, a predetermined number of prize balls, for example, three balls, are paid out, and the second reserved memory count can be updated to increment by 1. However, if the second reserved memory count has reached its upper limit, the second reserved memory count is not updated even if the second start winning occurs. When the second reserved memory count is incremented by 1, the second start condition is met, and a second special symbol game in which special symbols are variably displayed by the second special symbol display device 4B becomes executable.

At predetermined positions on the game board 2, general winning openings 10 are provided which are always kept in a constant open state by a predetermined ball receiving member. In the example shown in FIG. 1, general winning openings 10 are provided in two locations on the lower left of the game area. When a game ball enters one of the general winning openings 10, a predetermined number of prize balls, for example 10, are paid out.

In the game area formed by the game board 2, a first path and a second path are provided as flow paths for game balls to flow down. The first path is mainly provided in the area to the left of the image display device 5 when viewed from the front. The second path is mainly provided in the area to the right of the image display device 5 when viewed from the front. The left area of the image display device 5 is also called the left game area or the left game area. The right area of the image display device 5 is also called the right game area or the right game area. The left game area and the right game area may be divided, for example, by the end face of the image display device 5 in the game area or the arrangement of the game nails. Firing a game ball toward the left game area to make it flow down the first path is also called a left hit. Firing a game ball toward the right game area to make it flow down the second path is also called a right hit. The first path is also called a left hit path. The second path is also called a right hit path. The first path and the second path may be separate paths, or may be paths that are partially shared.

In response to the operation of a ball operating handle provided on the ball launching device, a game ball is launched from the ball launching device and launched into the game area. When a game ball launched into the game area is guided to the left game area and flows down the first path, it is guided, for example, along the arrangement of game nails, making it impossible or difficult to guide to the second path in the right game area. When a game ball launched into the game area is guided to the right game area and flows down the second path, it is guided, for example, along the arrangement of game nails, making it impossible or difficult to guide to the first path in the left game area.

The winning ball device 6A is provided on a first path in the left-side play area, allowing game balls flowing down the first path to enter. The variable winning ball device 6B is provided on a second path in the right-side play area, allowing game balls flowing down the second path to enter. The variable winning ball device 6B may also allow game balls flowing down the first path in the left-side play area to enter. The variable winning ball device 6B may be positioned so that game balls flowing down the second path in the right-side play area have an easier time entering than game balls flowing down the first path in the left-side play area.

The second path in the right game area is provided with a passing gate 41 and a special variable winning ball device 50. The passing gate 41 forms a passing area through which game balls can pass. Game balls that pass through the passing gate 41 are detected by the gate switch 21 shown in FIG. 13. Based on the game ball passing through the passing gate 41, the normal reserved memory number can be added and updated, and variable display of normal symbols by the normal symbol display device 20 can be executed as a normal symbol game. The passing gate 41 can be configured as a normal symbol operation port through which game balls can enter. In this case, the gate switch 21 can be configured as a normal symbol operation port switch that can detect game balls that have entered the normal symbol operation port.

The special variable winning ball device 50 is a special electric device that forms a large winning port that can be changed between a closed state and an open state by a large winning port solenoid 82. The upper part of the special variable winning ball device 50 is formed with a guide passage with a passage width in the front and rear direction that allows the game ball to pass through. This guide path slopes downward from the right side to the left side, and walls are provided on the front and back sides of the extended passage. In the center of the guide passage, a role entrance that serves as the large winning port is formed. In the special variable winning ball device 50, a movable member 52 that can move in the front and rear directions is provided as a large winning port opening and closing member at a position where the large winning port can be opened and closed. In the special variable winning ball device 50, a fixed member 53 that forms a fixed passage is provided in the part of the guide passage where the large winning port is not formed.

The movable member 52 is driven by the large prize opening solenoid 82 and can move forward and backward to open and close the role entrance which becomes the large prize opening. In the special variable prize ball device 50, the game ball that enters the inside from the large prize opening is detected by the count switch 23. Inside the special variable prize ball device 50, a V prize area 51 which is a specific area is provided as a prize area through which the game ball can pass. In addition, inside the special variable prize ball device 50, a normal area different from the V prize area 51 is provided. At the top of the V prize area 51, a plate-shaped distribution member which can switch the V prize area 51 between an open state and a closed state is provided as a V prize opening opening and closing member. The distribution member is driven by the specific area solenoid 83 and can move forward and backward to open and close the V prize area 51. When the V prize area 51 is in an open state, the game ball can pass through it, and when it is in a closed state, the game ball cannot pass through it. Game balls that pass through the V winning area 51 are detected by the specific area switch 24. Game balls that do not pass through the V winning area 51 pass through the normal area. Game balls that pass through the V winning area 51 and game balls that do not pass through the V winning area 51 but pass through the normal area are both detected by the discharge switch 26 and then discharged to the outside of the special variable winning ball device 50.

In addition to the above features, the surface of the game board 2 is provided with a windmill that changes the direction and speed of the game balls, and numerous obstacle nails. At the bottom of the game area, an outlet is provided for game balls that do not enter any of the winning holes. Speakers 8L, 8R for playing and outputting sound effects and the like are provided at the upper left and right positions of the game machine frame 3, and game effect lamps 9 for lighting up the game effects are provided around the periphery of the game area. The game effect lamps 9 are composed of LEDs. A movable body 32 that operates according to the effects is provided at a predetermined position on the game board 2.

At the lower right position of the gaming machine frame 3, there is provided a ball operation handle that is operated by a player or the like to launch gaming balls toward the playing area using the ball launching device. The ball operation handle is also called an operation knob. At a specified position of the gaming machine frame 3 below the playing area, there is provided a ball supply tray that holds gaming balls paid out as prize balls or gaming balls lent out by a specified ball lending machine so that they can be supplied to the ball launching device. The ball supply tray is also called the upper tray. Below the upper tray, there is provided a prize ball storage tray where prize balls paid out when the upper tray is full flow down and are stored. The prize ball storage tray is also called the lower tray.

A stick controller 31A and a push button 31B are provided at predetermined positions on the gaming machine frame 3 below the gaming area. The stick controller 31A can be held by the player and tilted, and is provided with a trigger button that the player can push and pull. Operation of the stick controller 31A is detected by a controller sensor unit 35A shown in FIG. 13. The push button 31B can be pressed by the player. Operation of the push button 31B is detected by a push sensor 35B shown in FIG. 13. In the pachinko gaming machine 1, the stick controller 31A and the push button 31B are used as detection means for detecting the player's operation and other actions, but other detection means may also be used.

(Outline of game progress)
The game ball is launched toward the game area by the player rotating the ball-hitting operation handle provided on the pachinko game machine 1. When the game ball passes through the passing gate 41, the normal game is started by the normal symbol display 20. In addition, when the game ball passes through the passing gate 41 during the period during which the previous normal game is being executed, the normal game based on the passage cannot be executed immediately, so the normal game based on the passage is reserved up to a predetermined upper limit number, for example, "4". In the normal game, when a specific normal symbol, such as a normal winning symbol, is stopped and displayed as a confirmed normal symbol, the display result of the normal symbol is "normal winning". On the other hand, when a normal symbol other than the normal winning symbol, such as a normal losing symbol, is stopped and displayed as a confirmed normal symbol, the display result of the normal symbol is "normal losing". In the case of "normal winning", an opening control is performed to make the variable winning ball device 6B in an open state or an expanded opening state for a predetermined period. At this time, the second starting winning port is in an open state or an expanded open state.

When a game ball passes through and enters the first start winning hole formed in the winning ball device 6A, the first special game can be started by the first special pattern display device 4A. When a game ball passes through and enters the second start winning hole formed in the variable winning ball device 6B, the second special game can be started by the second special pattern display device 4B. Note that, during the period when the special pattern game is being executed or during the period when the game ball is controlled to a big win game state or a small win game state, even if the game ball enters the start winning hole and a start winning occurs, the special pattern game based on the start winning cannot be executed immediately, so the special pattern game based on the start winning is reserved up to a predetermined upper limit number, for example, "4". In the special pattern game, when a specific special pattern such as a big win pattern is stopped and displayed as a confirmed special pattern, the display result of the special pattern becomes "big win". In contrast, when a predetermined special pattern, such as a small win pattern, that is different from a big win pattern, is stopped and displayed as the confirmed special pattern, the display result of the special pattern is "small win". Also, when a special pattern, such as a miss pattern, that is different from a big win pattern or a small win pattern, is stopped and displayed as the confirmed special pattern, the display result of the special pattern is "miss". Furthermore, when a special pattern, such as a time-saving pattern, that is different from a big win pattern, a small win pattern, or a miss pattern, is stopped and displayed as the confirmed special pattern, the display result of the special pattern may be "time-saving". The special pattern may not include a time-saving pattern. In other words, the display result of the special pattern may not include "time-saving".

In the special game, after the display result of the special pattern becomes "jackpot", the game is controlled to a jackpot game state as an advantageous state for the player. In the jackpot game state, the jackpot entry port formed in the special variable winning ball device 50 can be opened in a predetermined manner. The open state at this time continues until the timing of the passage of a predetermined period, such as 29 seconds or 1.8 seconds, or the timing when the number of game balls that have entered the jackpot entry port reaches a predetermined number, whichever comes first. The predetermined period during which the jackpot entry port can be controlled to be in an open state is the upper limit period during which the jackpot entry port can be opened in one round, and is also called the open upper limit period. One cycle in which the jackpot entry port is in an open state in the jackpot game state is called a round or round game. In the jackpot game state, such rounds can be repeatedly executed until a predetermined upper limit number of times is reached, such as 15 times or 2 times. In the jackpot game state, the player can obtain prize balls by entering the game ball into the jackpot entry port. Therefore, the jackpot gaming state is an advantageous state for the player. The more rounds in the jackpot gaming state, and the longer the upper limit open period, the more advantageous it is for the player.

When the display result of the special pattern is a "jackpot", it includes multiple jackpot types. For example, the opening mode of the jackpot entry port, such as the number of rounds and the maximum opening period, and the game state after the end of the jackpot game state, such as the normal state, time-saving state, or probability change state, are set to multiple different types, and a jackpot type is specified corresponding to each setting. The multiple jackpot types may include some or all of the jackpot types that allow many prize balls to be obtained, jackpot types that allow few prize balls to be obtained, or jackpot types that allow almost no prize balls to be obtained, or may include jackpot types with the same number of prize balls that can be obtained. Controlling to a jackpot game state based on the display result of the special pattern being a "jackpot" is also called a pattern jackpot, a jackpot with a special pattern, a variable display jackpot, or a direct hit jackpot.

In the special game, after the display result of the special pattern becomes "small hit", the game is controlled to a small hit game state. In the small hit game state, the large winning opening formed in the special variable winning ball device 50 can be opened in a predetermined opening state. For example, in the small hit game state, the large winning opening may be opened in the same opening state as the large winning game state in some large hit types. The large winning opening may be opened in the same opening state by having the same number of openings and opening period. Alternatively, in the small hit game state, the large winning opening may be opened in an opening state different from the large hit game state. As with the large hit type, multiple small hit types may be included even when the display result of the special pattern becomes "small hit". The large hit type and the small hit type are also collectively referred to as the hit type. The operation of opening and closing the large winning opening in the small hit game state is also called the starting operation. When the special variable winning ball device 50 is in a small winning state, the special variable winning ball device 50's role entrance, which is the large winning opening, is opened, and when the game ball passes through the V winning area 51 and is detected by the specific area switch 24, the conditions for a big win are met, and control to the big win game state is possible. When the game ball passes through the V winning area 51 in a small winning game state, control to the big win game state based on the occurrence of a V winning is also called a small winning via big win.

After the jackpot game state ends, the game state can be controlled to a time-saving state or a probability-changing state in accordance with the jackpot type. In addition, in the special pattern game, after the display result of the special pattern becomes "time-saving", the game state is not controlled to the jackpot game state but is controlled to a time-saving state. The time-saving state is a game state in which the second special pattern game by the second special pattern display device 4B is more likely to be executed than in the normal state. A game state in which the second special pattern game is more likely to be executed than in the normal state is a game state in which the game ball is more likely to pass through and enter the second start winning hole than in the normal state. The control of whether or not the game ball is more likely to pass through the second start winning hole is also called base control. The base control in the normal state is also called normal base control or low base control. The base control in the time-saving state includes high base control. In addition to the high base control, the time-saving state may include medium base control. The medium base control is a base control that makes it easier for the game ball to pass through the second start winning port than the low base control, but makes it harder for the game ball to pass through the second start winning port than the high base control. The game state in which the medium base control is performed is also called the medium base state. The game state in which the high base control is performed is also called the high base state. The high base control is also called the high opening control.

In the normal state, the medium base state, and the high base state, it is possible for the time-saving pattern to be displayed as a stopped result of the display of the special pattern. However, in the medium base state and the high base state, even if the time-saving pattern is displayed as a stopped result of the display of the special pattern, base control based on the time-saving pattern is not performed, and new control to transition to the medium base state or the high base state is not initiated. In the time-saving state, it is possible to perform time-saving control that shortens the average variable display time more than in the normal state. For this reason, the time-saving state is also called the time-shortening state.

The time-saving state is a state in which the efficiency of fluctuation of special symbols, especially the second special symbol, is improved, so it is included in the special states that are advantageous to players and different from the jackpot game state. When the game state is the probability variable state, in addition to the time-saving control, probability variable control is possible in which the probability of the display result of the special symbol being a "jackpot" is higher than in the normal state. As a result, the probability variable state is also called a probability variable state. The probability variable state is a state in which the efficiency of fluctuation of the special symbol is improved and it is easy to become a "jackpot", so it is included in the special states that are advantageous to players and different from the jackpot game state. The time-saving state and probability variable state continue until one of the predetermined end conditions is met first, such as the execution of a specified number of special symbol games or the control being made to the next jackpot game state. The end condition is that the specified number of special symbol games have been executed, also called the number-cut. The number-cut time-saving state is also called the number-cut time-cut. The number-cut probability variable state is also called the number-cut probability variable.

The normal game state is a game state that is not included in advantageous states such as a big win game state that is advantageous to the player, predetermined states such as a small win game state, or special states such as a time-saving state or a probability change state. The normal state is a game state in which the probability that the display result in the normal game will be a "normal win" and the probability that the display result in the special game will be a "jackpot" are controlled to be the same as the initial setting state of the pachinko game machine 1. The initial setting state of the pachinko game machine 1 is the control state after the initial setting process is performed without performing the specified recovery process after the power is turned on, such as when a system reset is performed.

The state in which the probability variable control is being executed is also called a high probability state, and the state in which the probability variable control is not being executed is also called a low probability state. The state in which the time-saving control is being executed is also called a high base state, and the state in which the time-saving control is not being executed is also called a low base state. Combining these, the time-saving state is also called a low probability high base state, the probability variable state is a high probability high base state, and the normal state is a low probability low base state. The high probability state and low base state are also called a high probability low base state. Note that the pachinko gaming machine 1 may not include a probability variable state as a gaming state.

After the small win game state ends, there are cases where the game state is controlled to a big win game state based on the occurrence of a V win, and cases where a V win does not occur and the game state before the small win game state remains unchanged. However, when the display result of the special game becomes a "small win" and a specified number of special games are played in the number cutoff, the control of the time-saving state and the probability change state may end and the game state may return to the normal state. Note that the pachinko game machine 1 may not include a small win game state as a game state. In other words, the display result of the special pattern may not include a "small win".

When a time-saving condition based on the number of times the variable display is executed is established, the game state may be controlled to a time-saving state. Such a time-saving state is also called a rescue time-saving state. The time-saving condition may be a condition that can be established when, after the power is turned on to the pachinko game machine 1, after a jackpot occurs, and after the display result of the special game becomes "time-saving," control to a new jackpot game state or time-saving state is not performed even if the variable display is executed a specific number of times.

(Progression of the performance, etc.)
In the pachinko game machine 1, various effects can be executed in accordance with the progress of the game. These effects include effects that notify the progress of the game and effects that liven up the game. These effects include displaying various effect images on the image display device 5, outputting sound effects from the speakers 8L and 8R, turning on the game effect lamp 9, operating the movable body 32, vibrating the stick controller 31A or the push button 31B, or a combination of some or all of these, and may be executed using any effect device.

The effects that can be executed in accordance with the progress of the game include variable display of the effect symbols. In response to the start of the first special game or the second special game, the variable display of the effect symbols is started in the effect symbol display areas 5L, 5C, and 5R of "left", "middle", and "right" provided on the screen of the image display device 5. When the determined special symbol that is the display result in the first special game or the second special game is stopped and displayed, the determined effect symbol that is the display result in the variable display of the effect symbols is stopped and displayed. The determined effect symbol is composed of a combination of three effect symbols corresponding to the effect symbol display areas 5L, 5C, and 5R of "left", "middle", and "right". During the period from the start to the end of the variable display of the effect symbols, the display mode in the variable display of the effect symbols may become a reach mode. The reach mode is a mode in which the effect symbols that have stopped on the screen of the image display device 5 constitute part of a jackpot combination and the fluctuation of the effect symbols that have not yet stopped continues. When the display pattern of the variable display of the performance symbols becomes a reach pattern, it is said that a reach has been achieved.

When the variable display of the performance pattern becomes a reach state, a reach performance can be executed. The pachinko gaming machine 1 can execute multiple types of reach performance so that the rate at which the display result of the variable display becomes a "jackpot" varies when the performance state differs. The rate of a "jackpot" corresponding to the performance state is also called the jackpot reliability or jackpot expectation rate. Reach performance includes, for example, a normal reach and a super reach, which has a higher jackpot reliability than a normal reach. In addition, it may include a short reach and a long reach, which has a longer execution time than a short reach, corresponding to the execution time of the reach performance.

When the display result of the special pattern is "jackpot", a fixed performance pattern that is a predetermined jackpot combination is displayed as a display result of the performance pattern on the screen of the image display device 5. As an example, the same performance pattern, such as a performance pattern showing the number "7", is displayed stopped on a predetermined effective line in the performance pattern display areas 5L, 5C, and 5R of "left", "middle", and "right". In the case of a "probable jackpot" that is controlled to a probable jackpot state after the end of the jackpot game state, odd-numbered performance patterns, such as a performance pattern showing the number "7", may be displayed stopped. In the case of a "non-probable jackpot" that is not controlled to a probable jackpot state after the end of the jackpot game state, even-numbered performance patterns, such as a performance pattern showing the number "6", may be displayed stopped. A "non-probable jackpot" is also called a "normal jackpot". In this case, the odd-numbered performance patterns are also called probable jackpot patterns. The even-numbered performance symbols are also called non-variable symbols or normal symbols. After a reach state occurs with a non-variable symbol, an advance performance may be executed that ultimately results in a "variable jackpot."

When the display result of the special pattern is a "small win", a confirmed performance pattern that is a predetermined small win combination is displayed as a stopped result of the performance pattern on the screen of the image display device 5. As an example, the same performance pattern, such as a performance pattern showing a number other than "7", may be displayed stopped on a predetermined valid line in the "left", "middle", and "right" performance pattern display areas 5L, 5C, and 5R. A common confirmed performance pattern may be displayed when the display result of the special pattern is a "big win" and when it is a "small win".

When the display result of the special pattern is a "miss", the display result may be displayed as a stop without the variable display of the performance pattern becoming a reach state. In this case, the fixed performance pattern of the non-reach combination is displayed as a stop as the display result of the performance pattern. A display result in which the fixed performance pattern of the non-reach combination is displayed as a stop without becoming a reach state is also called a non-reach miss. When the display result of the special pattern is a "miss", the variable display of the performance pattern may become a reach state, and the display result may be displayed as a stop after the reach performance is executed. In this case, the display result of the performance pattern may be displayed as a fixed performance pattern of the reach combination that is not a big hit combination or a small hit combination. A display result in which the fixed performance pattern of the reach combination is displayed as a stop after becoming a reach state is also called a reach miss.

The effects that the pachinko gaming machine 1 can execute include variable display compatible displays such as reserved displays and active displays. In addition, for example, a preview effect that predicts the jackpot reliability can be executed while the performance pattern is variable displayed. The preview effect may include a variable preview effect that predicts the jackpot reliability corresponding to the variable display currently being executed, and a look-ahead preview effect that predicts the jackpot reliability corresponding to the variable display before execution whose execution is on hold. The look-ahead preview effect may be capable of executing a change effect that changes the display mode of a variable display compatible display such as reserved displays and active displays to a mode different from normal.

On the screen of the image display device 5, it may be possible to temporarily stop the performance symbols during the variable display of the performance symbols, and then resume the variable display, thereby executing a pseudo consecutive performance in which one variable display appears as multiple variable displays. The pseudo consecutive performance may be set so that the reliability of a jackpot is higher when the number of times the variable display is resumed after the performance symbols are temporarily stopped is large than when the number of times the number is small. In the variable display of the performance symbols, there may be cases where the pseudo consecutive performance is executed before the reach state is reached, and cases where the pseudo consecutive performance is executed after the reach state is reached. In addition, in the variable display of the performance symbols, it may be possible to execute the pseudo consecutive performance at multiple times.

During control of the jackpot gaming state, a jackpot performance can be executed to notify the player of the jackpot gaming state. The jackpot performance may include a performance to notify the number of rounds and an advancement performance to suggest or notify that the advantage of the jackpot gaming state will improve. During control of the small jackpot gaming state, a small jackpot performance can be executed to notify the player of the small jackpot gaming state. By executing a common performance during control of the jackpot gaming state and during control of the small jackpot gaming state, it may be possible to make it impossible or difficult for the player to recognize whether the current gaming state is a jackpot gaming state or a small jackpot gaming state.

In a non-playing state where a special game or the like is not being played and no game is progressing, a demonstration effect image can be displayed on the screen of the image display device 5. A demonstration effect image is also called a demo image. The display of a demo image is also called a demo display. The effect produced by the demo display is also called a customer waiting demo effect.

(Board configuration)
The pachinko game machine 1 is equipped with a main board 11, a performance control board 12, a sound control board 13, a lamp control board 14, a relay board 15, a power supply board 17, and the like, as shown in Fig. 13. In addition, various boards, such as a payout control board, an information terminal board, and a firing control board, are arranged on the back of the pachinko game machine 1.

The main board 11 is the main control board and has the function of controlling the progress of the game in the pachinko game machine 1. The progress of the game includes the execution of various games and transitions of game states, such as the execution of special games with reserved management, the execution of regular games with reserved management, big win game state, small win game state, time-saving state, and probability change state. The main board 11 is equipped with a game control microcomputer 100, a switch circuit 110, and a solenoid circuit 111.

The game control microcomputer 100 provided on the main board 11 is, for example, a one-chip microcomputer, and can be configured with a ROM (Read Only Memory) 101, a RAM (Random Access Memory) 102, a CPU (Central Processing Unit) 103, a random number circuit 104, and an I/O (Input/Output port) 105. The ROM 101, the RAM 102, and a part or all of the random number circuit 104 may be configured to be external to the game control microcomputer 100, or may be configured to be built into the game control microcomputer 100. The switch circuit 110 takes in detection signals from various switches for game ball detection and transmits them to the game control microcomputer 100. The various switches for game ball detection include, for example, a gate switch 21, start port switches such as a first start port switch 22A and a second start port switch 22B, a count switch 23, a specific area switch 24, and an outlet switch 26. The detection signal indicates that a game ball has passed or entered and a switch has been turned on. The transmission of the detection signal indicates that the game ball has passed or entered. The solenoid circuit 111 can supply a solenoid drive signal from the game control microcomputer 100 to the normal electric role solenoid 81, the big prize opening solenoid 82, and the specific area solenoid 83. The solenoid drive signal may be any signal that turns on each solenoid.

The ROM 101 of the microcomputer 100 for game control is a non-volatile storage device that stores computer programs and data used for game control. The data stored in the ROM 101 includes table data constituting tables used for variation patterns, performance control commands, and various other settings, judgments, and decisions. The RAM 102 of the microcomputer 100 for game control is a temporary storage device that provides a stack for saving work areas and data used for game control. The RAM 102 may be a backup RAM that stores the contents of part or all of the memory area so that they can be restored within a specified period even if the power supply to the pachinko game machine 1 is stopped. The RAM 102 is also called RWM (Read/Write Memory). The work area of the RAM 102 includes a memory area capable of storing various data used for game control, such as a counter, a timer, a buffer, and a storage area for various other codes and numerical values. The CPU 103 of the game control microcomputer 100 can control the progress of the game in the pachinko game machine 1 by executing processes corresponding to the programs stored in the ROM 101.

The random number circuit 104 provided in the game control microcomputer 100 counts updatable numerical data indicating various random number values used when controlling the progress of the game. The random numbers used when controlling the progress of the game are also called game random numbers. Some or all of the game random numbers may be updated by hardware using a dedicated circuit, or may be updated by software such as a computer program executed by the CPU 103.

Figure 14 shows an example of a gaming random number. The gaming random numbers include a random number MR1-1 for determining a special symbol, a random number MR1-2 for a winning symbol, a random number MR1-3 that serves as the initial value for the winning symbol, a random number MR2-1 for a normal winning symbol, a random number MR2-2 that serves as the initial value for the normal winning symbol, a random number MR3-1 for a normal symbol variation pattern, a random number MR3-2 for selecting a losing performance, a random number MR3-3 for selecting a variation pattern type, and a random number MR3-4 for a variation pattern.

The random number MR1-1 for determining the special symbol is used to determine the display result of the special symbol, such as whether or not the display result of the special symbol is a "big hit" or whether or not the display result of the special symbol is a "small hit". The random number MR1-2 for the winning symbol is used to select a confirmed special symbol from multiple special symbols, such as a big hit symbol when the display result of the special symbol is a "big hit" or a small hit symbol when the display result of the special symbol is a "small hit". The random number MR1-3, which serves as the initial value for the winning symbol, is used to set the initial value of the random number MR1-2. The random number MR2-1 for the winning normal symbol is used to select a confirmed normal symbol from multiple normal symbols to be displayed when the display result is a "normal hit" in the variable display of the normal symbol. The random number MR2-2, which serves as the initial value for the winning normal symbol, is used to set the initial value of the random number MR2-1. The random number MR3-1 for the normal symbol variation pattern is used to determine the variation pattern of the normal symbol to one of multiple patterns prepared in advance. The random number MR3-2 for selecting a miss effect is used to select whether or not the variable display of the effect pattern will be in a reach state when the display result of the special symbol is a "miss". The random number MR3-3 for selecting the variation pattern type is used to select the variation pattern type of the special symbol. The variation pattern type of the special symbol is a group that classifies the variation patterns of the special symbol in advance based on, for example, the performance state during the variable display of the effect pattern, and may be configured to include one or multiple variation patterns. The random number MR3-4 for the variation pattern is used to select the variation pattern of the special symbol.

When making various judgments and decisions based on random number values, such as numerical data indicating the value of a gaming random number, the CPU 103 reads out and references various tables from the ROM 101. Even if random number values are not used, the necessary tables may be read out and referenced from the ROM 101 to make various judgments, decisions, settings, and the like.

The I/O 105 provided in the game control microcomputer 100 includes an input port to which various signals are input, and an output port to which various signals are output. The various signals input to the input port of the I/O 105 may include detection signals from various switches transmitted via the switch circuit 110. The various signals output from the output port of the I/O 105 may include signals for controlling the first special symbol display device 4A, the second special symbol display device 4B, the normal symbol display device 20, the first reserved display device 25A, the second reserved display device 25B, the normal reserved display device 25C, etc., and solenoid drive signals for driving the normal electric role solenoid 81, the large prize opening solenoid 82, the specific area solenoid 83, etc.

The main board 11 transmits a presentation control command according to the progress of the game to the presentation control board 12 as part of the operation of controlling the progress of the game by the game control microcomputer 100. The presentation control command is a command that specifies or notifies the progress of the game. The presentation control command output from the main board 11 is relayed by the relay board 15 and supplied to the presentation control board 12. The presentation control command may include commands that specify various determination results on the main board 11, such as the display result of the special game, the type of win, and the variation pattern, commands that specify the status of the game, such as the start or end of the variable display, the opening status of the big prize opening, the occurrence of a win, the number of reserved memories, and the game status, and commands that specify the occurrence of an error, etc.

The performance control board 12 is a sub-control board independent of the main board 11, and has the function of receiving performance control commands and controlling the performance based on the received performance control commands. The performances that can be controlled by the performance control board 12 include various performances according to the progress of the game, such as driving the movable body 32, and also various notifications such as error notifications and notifications of power outage recovery. The performance control board 12 is equipped with a performance control CPU 120, a ROM 121, a RAM 122, a display control unit 123, a random number circuit 124, and an I/O 125.

The performance control CPU 120 executes a program stored in the ROM 121 to perform processing for controlling the execution of performance together with the display control unit 123. This processing is for implementing the various functions of the performance control board 12, and includes determining the performance to be executed. The performance control CPU 120 uses various data stored in the ROM 121, such as data from various tables, and also uses the RAM 122 as its main memory. The performance control CPU 120 may instruct the display control unit 123 to execute a performance based on detection signals from the controller sensor unit 35A and the push sensor 35B. The detection signal here is a signal that is output when an operation by the player is detected, and may be a signal that appropriately indicates the content of the operation.

The display control unit 123 includes a VDP (Video Display Processor), a CGROM (Character Generator ROM), a VRAM (Video RAM), etc., and controls the execution of mainly display-related effects based on instructions to execute effects from the effect control CPU 120. The display control unit 123 displays an effect image on the screen of the image display device 5 by supplying a video signal corresponding to the effect to be executed to the image display device 5. The display control unit 123 also supplies a sound designation signal to the sound control board 13 and a lamp signal to the lamp control board 14. The sound designation signal designates the sound to be output from the speakers 8L and 8R. The lamp signal designates the on/off state of the game effect lamp 9. The supply of the sound designation signal and the lamp signal enables the sound output from the speakers 8L and 8R and the turning on or off of the game effect lamp 9 in synchronization with the display of the effect image. The display control unit 123 may be capable of supplying a signal for operating the movable body 32 to a motor or solenoid of the movable body 32, or to a driver circuit that drives the movable body 32. A driver board for driving the movable body 32 may be provided separately from the performance control board 12.

The random number circuit 124 counts updatable numerical data indicating various random number values used when controlling the execution of various performances. The random numbers used when controlling the execution of performances are also called performance random numbers. The performance random numbers may be updated by software such as a computer program executed by the performance control CPU 120. When making various judgments and decisions based on random number values, such as numerical data indicating the values of performance random numbers, the performance control CPU 120 reads out and refers to various tables from ROM 121. Even when random number values are not used, the performance control CPU 120 may read out and refer to the necessary tables from ROM 121 to make various judgments, decisions, settings, etc.

The I/O 125 includes an input port for taking in performance control commands transmitted from the main board 11, for example, and an output port for transmitting various signals. The input port of the I/O 125 may include an input terminal for a detection signal supplied from the controller sensor unit 35A, and an input terminal for a detection signal supplied from the push sensor 35B. The output port of the I/O 125 may include an output terminal for a video signal supplied to the image display device 5, an output terminal for a sound designation signal supplied to the audio control board 13, and an output terminal for a lamp signal supplied to the lamp control board 14.

The sound control board 13 is equipped with various circuits for driving the speakers 8L and 8R, and drives the speakers 8L and 8R based on a sound designation signal from the display control unit 123, and outputs the sound designated by the sound designation signal from the speakers 8L and 8R. The lamp control board 14 is equipped with various circuits for driving the game effect lamp 9, and drives the game effect lamp 9 based on a lamp signal from the display control unit 123, and turns the game effect lamp 9 on or off in the manner designated by the lamp signal. In this way, the sound output from the speakers 8L and 8R and the turning on and off of the game effect lamp 9 can be controlled based on a signal from the display control unit 123. Note that the control of the sound output and the turning on and off of the lamp, such as the supply of the sound designation signal and the lamp signal, and the control of the movable body 32, such as the supply of a signal to operate the movable body 32, may be performed in part or in whole by the performance control CPU 120. Boards other than the main board 11, such as the performance control board 12, the audio control board 13, and the lamp control board 14, are also called sub-boards. As in the configuration example shown in FIG. 13, multiple sub-boards may be provided for different functions, or, unlike the configuration example shown in FIG. 13, one sub-board may be configured to have multiple functions.

The power supply board 17 can supply power from an AC power source such as AC 100V in an external power source such as a commercial power source to electrical components including various control boards such as the main board 11 and the performance control board 12. The power supply board 17 is equipped with, for example, a rectifier circuit for converting AC to DC, a power supply circuit for converting a predetermined DC voltage to a specific DC voltage (for example, DC 12V or DC 5V, etc.). The pachinko game machine 1 can switch between starting and ending the power supply by operating the power switch 91. The switch circuit 110 of the main board 11 takes in a reset signal, a power off signal, and a clear signal from the power supply board 17 and transmits them to the game control microcomputer 100. The reset signal is an operation stop signal for putting a control circuit such as the game control microcomputer 100 into an operation stop state, and can be output using any of a power supply monitoring circuit, a watchdog timer built-in IC, and a system reset IC. The power-off signal is turned off when the predetermined power supply voltage used in the pachinko game machine 1 exceeds a predetermined value, and is turned on when the period during which the predetermined power supply voltage is below the predetermined value continues for the power-off reference time or longer. The clear signal is turned on, for example, in response to pressing the clear switch 92 provided on the power supply board 17.

(Operation)
Next, the operation (function) of the pachinko gaming machine 1 will be described.

(Main Operations of Main Board 11)
First, a description will be given of the main operations of the main board 11. When power supply to the pachinko gaming machine 1 is started, the game control microcomputer 100 is started up, and the CPU 103 executes main processing for game control.

Figure 15 is a flow chart showing the main processing P_MAIN for game control executed by the CPU 103 on the main board 11. When the main processing P_MAIN for game control shown in Figure 15 is started, the CPU 103 executes the power supply start response processing P_POWER_ON (step S1), and then executes the RWM check processing P_RWM_CHK (step S2). The power supply start response processing P_POWER_ON in step S1 can execute the initial setting of the game control microcomputer 100 in response to the start of power supply in the pachinko game machine 1. The initial setting of the game control microcomputer 100 may include the initialization of the output port, the setting of the interrupt vector, the setting of the built-in device register, and the setting of the specific register. The RWM check processing P_RWM_CHK in step S2 includes a checksum calculation processing, and compares the checksum data obtained as a result of the processing with the stored data in the checksum buffer. If the two data match, it is determined that the stored contents in the RAM 102 are normal.

Next, it is determined whether or not a predetermined recovery condition is satisfied (step S3). The recovery condition can be satisfied when the clear signal corresponding to the operation of the clear switch 92 is in the OFF state, there is normal stored data in the checksum buffer, and the stored contents in the RAM 102 as the backup RAM are normal. When the power of the pachinko game machine 1 is turned on, for example, if the clear switch 92 provided on the power supply board 17 is pressed, a clear signal in the ON state is input to the game control microcomputer 100. When such a clear signal in the ON state is input, it is sufficient to determine in step S3 that the recovery condition is not satisfied. The checksum buffer stores the checksum data calculated in the checksum calculation process when the backup judgment time was measured by the backup monitoring timer at the time of the previous power outage. When the time value of the backup monitoring timer does not match the specific value corresponding to the backup judgment time, it is sufficient to determine in step S3 that the recovery condition is not satisfied. The backup data may be stored data in the game work area in the RAM 102 as the backup RAM for game control. In step S3, it is determined whether the recovery conditions can be met based on the results of checking or inspecting the presence or absence of backup data and data errors by the RWM check process P_RWM_CHK in step S2.

If the recovery condition is met (step S3; Yes), the backup setting process P_BACKUP_SET is executed (step S4). The backup setting process P_BACKUP_SET uses the backup command transmission table to enable the performance control command corresponding to the backup to be sent from the main board 11 to the performance control board 12. The backup setting process P_BACKUP_SET also clears the process code, timer, counter, and flag specified by the backup setting table to enable initialization.

If the recovery condition is not met (step S3; No), the initialization setting process P_INIT_SET is executed (step S5). The initialization setting process P_INIT_SET enables the transfer of clear data to the game work area, which is the working area in RAM 102. This initializes the game work area in RAM 102. The initialization setting process P_INIT_SET then uses the initialization command transmission table to enable the transmission of the performance control command corresponding to the initialization from the main board 11 to the performance control board 12. The initialization setting process P_INIT_SET also clears the buffers, timers, pointers, and counters specified by the initialization setting table, making them initializeable.

Then, the control start setting process P_STACON is executed (step S6). The control start setting process P_STACON may include a wait process. The wait process executes a loop process and waits until the set waiting time has elapsed, thereby ensuring that the sub-boards such as the performance control board 12 can be started. The control start setting process P_STACON may also include a specific number of times command transmission process or a chip individual number information command transmission process. The specific number of times command transmission process enables a performance control command that specifies the count value of the specific number counter when the power is turned on to be transmitted from the main board 11 to the performance control board 12. The specific number of times counter is provided at a specified address in the RAM 102, and may be capable of counting the remaining number of times until the number of times the variable display is executed reaches a specific number corresponding to the time-saving condition. The chip individual number information command transmission process enables a performance control command that specifies the stored value of the chip individual number register to be transmitted from the main board 11 to the performance control board 12. The chip individual number register is included in the built-in register of the game control microcomputer 100, and it is sufficient if it is capable of storing a different value assigned to each chip as the chip individual number.

The control start setting process P_STACON may include a start-up out-of-area process. The start-up out-of-area process is a process executed by reading out a program stored in a non-game program area of the ROM 101 in response to the start-up of the pachinko gaming machine 1 due to the start of power supply. The start-up out-of-area process may be, for example, a performance display RWM initial value setting process. The performance display RWM initial value setting process makes it possible to set an initial value for performing an initial display by a 7-segment LED constituting the performance display monitor. The performance display monitor may be mounted on, for example, the main board 11, and may display contents related to the setting value and contents related to the base. When the pachinko gaming machine 1 is in a setting change state in which the settings can be changed, the setting value can be changed to one of a number of stages, for example, six stages, and makes it possible to set the probability that the display result of the special pattern will be a "jackpot". The base is calculated by dividing the number of prize balls paid out when a game ball passes through each winning hole, such as the start winning hole, the general winning hole, and the big winning hole, by the number of game balls released into the game area.

After the control start setting process P_STACON in step S6, the timer interrupt counter setting is performed (step S7). In step S7, the PTC counter output value is set so that a regular timer interrupt occurs at a predetermined time interval, for example, 4 [ms (milliseconds)]. After that, the main process P_MAIN for game control enters a loop process. In this loop process, interrupt prohibition is set (step S8), the initial value determination random number update process P_TFINIT is executed (step S9), and the loop outside area process P_REGOUT is executed (step S10), and then interrupt permission is set (step S11), and the process returns to step S8. Then, when the interrupt permission state is in effect, the CPU 103 is able to execute timer interrupt processing each time an interrupt request signal is input from the PTC to the CPU 103. This allows the CPU 103 to execute timer interrupt processing each time a predetermined time, for example, 4 [ms], has elapsed.

Figure 16 is a flow chart showing an example of timer interrupt processing P_PCT for game control. In the timer interrupt processing P_PCT shown in Figure 16, power-off processing P_POWER_OFF is executed (step S51). Next, it is determined whether the fraudulent activity monitoring flag is "0" (step S52). When magnetism is detected by the magnet sensor or when radio waves are detected by the frame radio wave sensor, the fraudulent activity monitoring flag is set to "1", which corresponds to the ON state. In all other cases, the fraudulent activity monitoring flag is set to "0", which corresponds to the OFF state.

If the fraud monitoring flag is "1" (step S52; No), the game stop process P_GAME_STOP is executed (step S53). The game stop process P_GAME_STOP may be a process that initializes the output port and turns off the output of the connection confirmation signal. The connection confirmation signal is transmitted from the main board 11 to the payout control board, and if it is in the off state, the execution of the payout process in the payout control board is stopped.

When the fraudulent activity monitoring flag is "0" (step S52; Yes), switch processing P_SW is executed (step S54), switch error notification processing P_CON_CHK is executed (step S55), random number update processing P_RANDOM is executed (step S56), and random number update processing for initial value determination P_TFINIT is executed (step S57). In addition, special symbol process processing P_TPROC is executed (step S58), normal symbol process processing P_FPROC is executed (step S59), information output processing P_JYOUHOU is executed (step S60), prize ball processing P_PAY is executed (step S61), and display processing P_HYOUZI is executed (step S62). Furthermore, other timer interrupt response processing is executed (step S63). After that, interrupt permission is set (step S64), and then the timer interrupt processing P_PCT ends.

The power-off process P_POWER_OFF in step S51 judges the power confirmation signal transmitted from the power supply board 17, and enables checksum calculation processing and the like to be executed when the power is off. The switch process P_SW in step S54 judges the state of the input port, and enables the switch-on buffer and the like to be updated. The switch error notification process P_CON_CHK in step S55 can update the count value of a sensor-on counter specified, for example, by a switch error notification judgment table, and enables error notification display when the count value reaches a sensor abnormality error judgment value. The random number update process P_RANDOM in step S56 enables those of the game random numbers that will become software random numbers to be updated by software. The random number update process P_TFINIT for initial value determination in step S57 enables those of the game random numbers that are used as random number initial values to be updated by software.

The special symbol process P_TPROC in step S58 includes processes related to the variable display of special symbols and the game state, such as the management of execution and reservation of the special symbol game, control of the big win game state and the small win game state, and control of the game state. The normal symbol process P_FPROC in step S59 includes processes related to the variable display of normal symbols and the state control of the second start winning port, such as the management of execution and reservation of the normal symbol game based on the detection signal from the gate switch 21, and the opening and closing control of the variable winning ball device 6B based on the "normal hit". The information output process P_JYOUHOU in step S60 sets the information output signal. The information output signal is a signal corresponding to information such as big win information, start information, and probability fluctuation information supplied to a hall management computer installed outside the pachinko game machine 1. The big win information indicates the number of big wins, etc. The start information indicates the number of start wins, etc. The probability fluctuation information indicates the number of times the probability variable state has been reached, etc. The prize ball processing P_PAY in step S61 includes a prize ball command output counter addition process and a prize ball control process. The prize ball command output counter addition process uses a prize ball number table to determine whether the switch is on, and when on is detected, updates the prize ball command output counter and the winning information output counter. The prize ball control process selects a process corresponding to the prize ball process code and controls the payout of prize balls based on the detection of game balls. The display process P_HYOUZI in step S62 sets the display by the first reserve indicator 25A, the second reserve indicator 25B, the regular reserve indicator 25C, and various other status indicator lights.

Figure 17 is a flow chart showing an example of processing that can be executed in step S58 shown in Figure 16 as the special symbol process processing P_TPROC. The CPU 103 sets the first start winning corresponding flag in the special symbol process processing P_TPROC (step S101). The first start winning corresponding flag setting reflects the state of the first start port switch 22A included in the switch-on buffer in the flag register of the CPU 103 by executing a logical operation command or the like. At this time, the zero flag in the flag register being in the on state indicates that the first start winning corresponding flag is in the off state. In contrast, the zero flag being in the off state indicates that the first start winning corresponding flag is in the on state. Next, the first start port winning table is set by a transfer command for setting the table pointer (step S102). After that, it is determined whether the first start winning corresponding flag is on (step S103). If the first start winning corresponding flag is on (step S103; Yes), the start port switch passing process P_TZU_ON is executed (step S104).

If the first start winning corresponding flag is off in response to step S103 (step S103; No), or after the start port switch passing process P_TZU_ON in step S104, the second start winning corresponding flag is set (step S105). The second start winning corresponding flag is set by executing a logical operation command or the like to reflect the state of the second start port switch 22B contained in the switch-on buffer in the flag register of the CPU 103. At this time, the zero flag in the flag register being on indicates that the second start winning corresponding flag is off. In contrast, the zero flag being off indicates that the second start winning corresponding flag is on. Next, the second start port winning table is set by a transfer command for setting the table pointer (step S106). Then, it is determined whether the second start winning corresponding flag is on (step S107). If the second start winning corresponding flag is on (step S107; Yes), the start port switch passing process P_TZU_ON is executed (step S108).

The start port switch passing process P_TZU_ON in step S104 uses the first start port winning table set in step S102 to update the first reserved memory number and the total reserved memory number by adding 1 if the first reserved memory number is less than the upper limit, extracts the random number MR1-1 for determining the special pattern, the random number MR3-2 for selecting a miss performance, the random number MR3-3 for selecting a variation pattern type, and the random number MR3-4 for the variation pattern, stores them in their respective random number buffers, and then transfers them to the first special pattern reserved buffer. In addition, the first reserved memory information designation command transmission table is used to enable the first reserved memory information designation command, which designates the first reserved memory number, to be sent from the main board 11 to the performance control board 12. Then, a value indicating "1" is stored in the start port winning buffer as the start port winning designation value.

The start port switch passing process P_TZU_ON in step S108 uses the second start port winning table set in step S106 to update the second reserved memory number and the total reserved memory number by adding 1 if the second reserved memory number is less than the upper limit, extracts the random number MR1-1 for determining the special pattern, the random number MR3-2 for selecting a miss performance, the random number MR3-3 for selecting the variation pattern type, and the random number MR3-4 for the variation pattern, stores them in their respective random number buffers, and then transfers them to the second special pattern reserved buffer. In addition, the second reserved memory information designation command transmission table is used to enable the second reserved memory information designation command, which designates the second reserved memory number, to be sent from the main board 11 to the performance control board 12. Then, a value indicating "2" is stored in the start port winning buffer as the start port winning designation value.

A common start port switch passing process P_TZU_ON can be executed in steps S104 and S108. Meanwhile, the start port switch passing process P_TZU_ON in step S104 uses the first start port winning table set in step S102, whereas the start port switch passing process P_TZU_ON in step S108 uses the second start port winning table set in step S106. In this way, the common start port switch passing process P_TZU_ON is executed using different start port winning tables. Therefore, different data settings and controls are possible by the common process when the game ball enters the first start port and when it enters the second start port. The start port switch passing process P_TZU_ON may include a winning performance process using the extracted game random number.

If the second start winning corresponding flag is off in response to step S107 (step S107; No), or after the start port switch passing process P_TZU_ON in step S108, a transfer command that sets a pointer sets the special symbol process processing jump table (step S109). The special symbol process processing jump table is an address management table that selects and enables execution of a process that corresponds to the read value of the special symbol process code. The special symbol process code can be updated to any of 00[H] to 0B[H] in response to the progress of game control in the pachinko gaming machine 1, and is also called the special symbol process code. Here, [H] indicates a hexadecimal number. Note that [B] may also be used to indicate a binary number.

Following step S109, a transfer command to read out stored data is used to load the special symbol process code (step S110). Next, the 2-byte data selection process P_ABXEXEC is executed (step S111) to obtain the address of the process selected in accordance with the special symbol process code. The address obtained at this time is set in the pointer. After this, the process pointed to by the pointer is executed in accordance with a subroutine call command (step S112), making it possible to execute the process selected in accordance with the special symbol process code. When the process selected in this manner ends and a return command is issued to return to the special symbol process process P_TPROC, this special symbol process process P_TPROC also ends, and a return command is issued to return to the timer interrupt process P_PCT for game control.

Figure 18 shows a configuration example TT01 of a special symbol process jump table used in the special symbol process P_TPROC. The special symbol process jump table is configured to include table data that can set the address of the process selected corresponding to the special symbol process code in an internal register of the CPU 103 used as a pointer. The special symbol process jump table of the configuration example TT01 includes special symbol normal processing P_TNORMAL when the special symbol process code is 00 [H], special symbol fluctuation processing P_TSTART when the special symbol process code is 01 [H], special symbol stop processing P_TSTOP when the special symbol process code is 02 [H], small win opening pre-processing P_TLFAN when the special symbol process code is 03 [H], small win opening mid-processing P_TLOPEN when the special symbol process code is 04 [H], small win opening post-processing P_TLCLSF when the special symbol process code is 05 [H], and ... It includes table data that allows the pointer to be set to an address value corresponding to the following: small win discharge ball waiting process P_TLOUT when the separate pattern process code is 06 [H], small win end process P_TLEND when the special pattern process code is 07 [H], large prize opening pre-opening process P_TINT when the special pattern process code is 08 [H], large prize opening open process P_TOPEN when the special pattern process code is 09 [H], large prize opening post-opening process P_TCLSF when the special pattern process code is 0A [H], and large win end process P_TEND when the special pattern process code is 0B [H].

The special symbol normal processing P_TNORMAL makes it possible to determine whether or not to start a special symbol game based on the presence or absence of stored reserved information, to determine the special symbol display result using the random number MR1-1 for special symbol determination, to determine the confirmed special symbol to be displayed in a stopped state in the variable display of the special symbol, and to determine the variation pattern of the special symbol. The special symbol display result includes "jackpot", "small hit", "miss", etc., and when it is determined to be a "jackpot", it is decided to control to a jackpot game state that is advantageous to the player. Also, when the display result of the special symbol is a "jackpot", it is decided which of multiple types of jackpot game states with different degrees of advantage for the player the game will be controlled to, depending on the jackpot symbol that is the confirmed special symbol. Therefore, by executing the special symbol normal processing P_TNORMAL, the CPU 103 can determine whether or not to control the state to an advantageous state that is advantageous to the player, and can determine which of multiple types of advantageous states with different degrees of advantage to the player to control to. Furthermore, by executing the special symbol normal processing P_TNORMAL, the CPU 103 can determine which of multiple types of variation patterns to control to.

The special pattern change process P_TSTART measures the time that has elapsed since the special pattern began to change on the first special pattern display device 4A or the second special pattern display device 4B, and makes it possible to determine whether the special pattern change time corresponding to the change pattern has elapsed. The special pattern stop process P_TSTOP measures the time that has elapsed since the special pattern stopped changing on the first special pattern display device 4A or the second special pattern display device 4B, and makes it possible to determine whether the pattern stop time has elapsed. The pattern stop time may be set as the time for stopping the display of the special pattern when it is determined in the special pattern change process P_TSTART that the special pattern change time has elapsed. When the pattern stop time has elapsed, the special pattern process code is updated and various settings are made according to the special pattern display result. For example, if the special chart display result is a "big win," the special chart process code can be updated to 08 [H], if the special chart display result is a "small win," the special chart process code can be updated to 03 [H], and if the special chart display result is a "miss," the special chart process code can be updated to 00 [H].

Processing before small win opening P_TLFAN, processing during small win opening P_TLOPEN, processing after small win opening P_TLCLSF, waiting for small win ball ejection P_TLOUT, and processing after small win end P_TLEND are processes for controlling the progress of the game in the small win game state. Processing before large win opening P_TINT, processing during large win opening P_TOPEN, processing after large win opening P_TCLSF, and processing after big win end P_TEND are processes for controlling the progress of the game in the big win game state.

(Main operations of the performance control board 12)
Next, a description will be given of the main operations of the performance control board 12. In the performance control board 12, when a power supply voltage is supplied from the power supply board 17 or the like, the performance control CPU 120 starts up and executes the performance control main process.

Figure 19 is a flowchart showing the main processing S_MAIN for performance control executed by the performance control CPU 120 in the performance control board 12. When the main processing S_MAIN for performance control shown in Figure 19 is started, the performance control CPU 120 executes the performance control initialization processing S_INIT (step S71). The performance control initialization processing S_INIT includes clearing the RAM 122, setting various initial values, and register settings for the timer circuit mounted on the performance control board 12. Next, the initial operation control processing S_SYOKI is executed (step S72). The initial operation control processing S_SYOKI makes it possible to control the initial operation of the movable body 32, such as controlling the movable body 32 to return to its initial position and controlling the predetermined operation check. Then, it is determined whether the timer interrupt flag is on (step S73). The timer interrupt flag is set to the on state every time a predetermined time, such as 2 [ms (milliseconds)], elapses based on the register setting for the timer circuit. If the timer interrupt flag is off (step S73; No), step S73 is repeated and the system waits.

When the timer interrupt flag is on (step S73; Yes), the timer interrupt flag is cleared to the off state (step S74), and the command analysis process S_COMMAND is executed (step S75), the performance control process process S_CPROC is executed (step S76), the performance random number update process S_RANDOM is executed (step S77), and the performance output process S_OUT is executed (step S78). Then, other timer interrupt response processes are executed (step S79), and the process returns to step S73.

The command analysis process S_COMMAND in step S75 enables the reading of the performance control command stored in the performance control command receiving buffer and the setting and control corresponding to the read performance control command. By executing the command analysis process S_COMMAND, the performance control CPU 120 can update the storage data indicating the state of the flag, the storage data of the register, and any other storage data in the working area of the RAM 122 in response to the performance control command transmitted from the main board 11. The performance control process S_CPROC in step S76 enables the execution of performances using various performance devices, including, for example, the display of the performance image on the screen of the image display device 5, the sound output from the speakers 8L and 8R, the lighting or extinguishing of the decorative light-emitting body such as the game effect lamp 9 and the decorative LED, and the drive control of the movable body 32. The control contents of the performances using various performance devices may be judged, determined, set, etc. based on the performance control command transmitted from the main board 11 and the execution result of the processing by the performance control CPU 120. The performance random number update process S_RANDOM in step S77 enables at least a portion of the performance random numbers used on the performance control board 12 to be updated by executing a software program.

Figure 20 (A) is a flow chart showing an example of processing that can be executed in step S76 shown in Figure 19 as the performance control process processing S_CPROC. The performance control CPU 120 executes the look-ahead performance setting processing S_SAKI_SET in the performance control process processing (step S151). The look-ahead performance setting processing S_SAKI_SET enables judgment, decision, and setting regarding the execution of a look-ahead preview performance, for example, based on the performance control command sent from the main board 11 at the time of the start winning. The look-ahead performance setting processing S_SAKI_SET also makes it possible to update the hold display based on the number of hold memories specified from the performance control command.

After the pre-read effect setting process S_SAKI_SET in step S151, a transfer command that sets a pointer sets the effect control process jump table (step S152). The effect control process jump table is an address management table that selects and executes the process corresponding to the read value of the effect control process code. The effect control process code can be updated to any of 00 [H] to 0A [H] in accordance with the progress of effect control in the pachinko gaming machine 1, and is also called the effect process code. The effect control process code is loaded by a transfer command for reading out stored data (step S153). The address of the process to be selected corresponding to the effect control process code thus obtained is set in the effect control pointer (step S154). Therefore, by executing the process pointed to by the effect control pointer (step S115), the process selected corresponding to the effect control process code becomes executable.

Figure 20 (B) shows an example configuration TT02 of a performance control process jump table used in the performance control process processing S_CPROC. The performance control process jump table is configured to include table data that can set the address of a process selected corresponding to a performance control process code in a register used as a performance control pointer. The presentation control process jump table of the configuration example TT02 includes table data that can set address values corresponding to the following in the presentation control pointer: waiting for a change pattern command when the presentation control process code is 00 [H], starting presentation pattern change when the presentation control process code is 01 [H], processing during presentation pattern change when the presentation control process code is 02 [H], stopping presentation pattern change when the presentation control process code is 03 [H], displaying small wins when the presentation control process code is 04 [H], processing during small win opening when the presentation control process code is 05 [H], ending presentation of small wins when the presentation control process code is 06 [H], displaying big wins when the presentation control process code is 07 [H], processing during a round when the presentation control process code is 08 [H], post-round processing when the presentation control process code is 09 [H], and ending presentation of big wins when the presentation control process code is 0A [H].

The waiting for receiving a variation pattern command process makes it possible to determine whether or not a variation pattern designation command transmitted from the game control microcomputer 100 of the main board 11 has been received. If it is determined that a variation pattern designation command has been received, the performance control process code is updated to 01 [H] corresponding to the performance pattern variation start process, and if it is determined that a variation pattern designation command has not been received, the demo display can be controlled. The performance pattern variation start process makes it possible to start a variation-time performance corresponding to a special game. For example, in response to a variation pattern command transmitted from the main board 11, it makes it possible to select a performance pattern used to control the variation-time performance and to start updating the performance process timer that measures the performance execution time. The performance pattern variation process makes it possible to control the switching timing of each performance element that constitutes the performance pattern, and makes it possible to determine whether or not the performance execution time has elapsed based on the measured value of the performance process timer. If it is determined that the performance execution time has elapsed, the performance control process code is updated to 03 [H] corresponding to the performance pattern variation stop process. The performance pattern change stop process enables the end control of the performance during change and the display control of the performance result corresponding to the determined special pattern based on the establishment of the end condition of the performance during change, such as the elapse of the performance execution time or the reception of a performance pattern determination command. At this time, the performance control process code is updated and various settings are made according to the display result of the variable display. For example, if the display result of the variable display is a "big hit", the performance control process code can be updated to 07 [H], if the display result of the variable display is a "small hit", the performance control process code can be updated to 04 [H], and if the display result of the variable display is a "miss", the performance control process code can be updated to 00 [H].

The small hit display process, small hit opening process, and small hit end presentation process are processes for controlling the progress of presentation corresponding to the small hit game state. The big hit display process, round process, post-round process, and big hit end presentation process are processes for controlling the progress of presentation corresponding to the big hit game state.

(Variations of the basic explanation, etc.)
The pachinko gaming machine 1 is not limited to the configuration, functions, processing, and operation in the basic description and other descriptions, and various modifications and applications are possible. For example, the pachinko gaming machine 1 does not need to have all the technical features shown in the embodiment, and may have a part of the configuration described in the embodiment so as to solve at least one problem in the prior art. When a subordinate concept is described in the embodiment, an invention of a superordinate concept using a homologous or similar matter, or an invention of a superordinate concept using a common property, is included as the present invention, and may have a part of the structure or characteristics described in the embodiment so as to solve at least one problem in the prior art.

The pachinko gaming machine 1 may be a payout type gaming machine that pays out a predetermined number of gaming media as prizes when a prize is won, or it may be an enclosed type gaming machine that encloses gaming media and awards points when a prize is won.

The display during the variable display of the special pattern may be only one type of pattern, such as a symbol indicating "-", and the variable display may be such that this pattern is repeatedly displayed and turned off. One type of pattern may be displayed during the variable display, and this pattern may not be displayed when the variable display is stopped. For example, the display result may be a non-display state in which the symbol indicating "-" is not displayed, and no special pattern is displayed.

The pachinko game machine 1 may be configured to change the probability of winning a jackpot and the ball payout rate in response to a plurality of set values. For example, in the special symbol normal processing of the special symbol process processing, the probability of winning a jackpot and the ball payout rate may be changed by using a different jackpot determination value for each set value. As a specific example, the set value is made up of six levels from 1 to 6, with 6 being the highest probability of winning a jackpot, and the smaller the value is in the order of 6, 5, 4, 3, 2, and 1, the lower the probability of winning a jackpot. In this case, if 6 is set as the set value, the player has the highest advantage, and the smaller the value is in the order of 6, 5, 4, 3, 2, and 1, the lower the advantage is. If the probability of winning a jackpot changes depending on the set value, the ball payout rate may also change depending on the set value. The probability of winning a jackpot is constant regardless of the set value, while the number of rounds in the jackpot game state may change depending on the set value. The pachinko gaming machine 1 may be configured to be able to set one of a number of setting values with different degrees of advantage to the player. The setting value set in the pachinko gaming machine 1 may be notified by sending a setting value designation command from the main board 11 to the performance control board 12. During execution of the variable display, a setting suggestion performance that suggests the setting value in the pachinko gaming machine 1 at a predetermined rate may be executed. The suggestion regarding the setting value of the pachinko gaming machine 1 is not limited to suggesting the setting value in the pachinko gaming machine 1, and may suggest, for example, whether or not the setting value in the pachinko gaming machine 1 has been changed. The setting suggestion performance may suggest the probability of a jackpot through any performance, and may also be able to give a suggestion regarding the setting value of the pachinko gaming machine 1.

Instead of some or all of the suggestions regarding the control of the jackpot gaming state, or in addition to some or all of the suggestions regarding the control of the jackpot gaming state, suggestions regarding the control of a state that is advantageous to the player and different from the jackpot gaming state may be given. For example, suggestions regarding a probability variable state that is controlled after the end of the jackpot gaming state may be given. In addition, suggestions regarding a state in which any game value that is advantageous to the player is awarded as an advantageous state may be given, depending on whether or not it is controlled.

The invention relating to gaming machines is not limited to the pachinko gaming machine 1, but can also be applied to slot machines as appropriate. A slot machine can execute a game in which medals are inserted, a predetermined bet amount is set, a plurality of types of symbols are rotated in response to the player's operation of an operating lever, and when the symbols are stopped in response to the player's operation of a stop button, a combination of stopped symbols forms a specific combination, and a predetermined number of medals is paid out to the player. In a slot machine, an advantageous state that is advantageous to a player may include, for example, one or more of the so-called bonuses, such as a big bonus, regular bonus, RT, AT, ART, and CZ.

The programs and data for implementing various controls, including the progress of the game and the execution of the performance, may be distributed and provided to a computer device included in a gaming machine such as the pachinko gaming machine 1 by a removable recording medium, or may be distributed and provided by being installed in advance in a storage device of the computer device. In addition, the machine may be provided with a communication processing unit that can be connected to an external device on a network via a communication line, and the programs and data may be distributed and provided by downloading them from the external device. The execution form of the game and performance may also be executable by mounting a removable recording medium, or may be executable by temporarily storing the programs and data downloaded via a communication line in an internal memory, or may be executable directly using the hardware resources of an external device on a network connected via a communication line, or may be executable by exchanging data with another computer device via a network.

When comparing various percentages, such as the decision percentage of a process or data, or the execution percentage of a performance, expressions such as "high", "low", and "different" may include the case where one is a percentage of "0%" or "100%". For example, for one decision result or execution content, it may include the case where there is no decision or execution at a percentage of "0%", or the case where there is always a decision or execution at a percentage of "100%".

(Explanation regarding characteristic part 01AK)
FIG. 21-1 shows an example of the configuration of the game control microcomputer 100 with respect to the characteristic part 01AK. The game control microcomputer 100 of the characteristic part 01AK is configured with an external bus interface 131, a clock circuit 132, a unique information storage circuit 133, a reset controller 134, an interrupt controller 135, a timer circuit 136, an address decode circuit 137, a free-running counter 138, and a serial communication circuit 139 in addition to the ROM 101, the RAM 102, and the CPU 103. The random number circuit 104 shown in FIG. 2 is configured to include a 16-bit random number circuit 104A and an 8-bit random number circuit 104B. The I/O 105 shown in FIG. 2 is configured to include a PIP (Parallel Input Port) 105A and a POP (Parallel Output Port) 105B.

The external bus interface 131 is a bus interface that has an interface function between the external bus and internal bus of the chips that make up the game control microcomputer 100, and a function for controlling the direction of an address bus, a data bus, and each control signal. For example, the external bus interface 131 may be connected to an external memory or an external input/output device that is external to the game control microcomputer 100, and may transmit and receive address signals, data signals, various control signals, and the like between these external devices. The external bus interface 131 may include an internal resource access control circuit that controls access to the internal data of the game control microcomputer 100 from the external device.

The clock circuit 132 can generate an internal system clock SCLK using an oscillation signal input to the external control clock terminal EXC. The external control clock terminal EXC may receive a control clock generated by a control clock generation circuit provided in the game control microcomputer 100. The internal system clock SCLK generated by the clock circuit 132 can be supplied to various circuits in the game control microcomputer 100, such as the CPU 103, the 16-bit random number circuit 104A, and the 8-bit random number circuit 104B. The internal system clock SCLK can also be output from the system clock output terminal CLKO to the outside of the game control microcomputer 100. Alternatively, the internal system clock SCLK may be restricted from being output to the outside of the game control microcomputer 100, making it difficult to identify the operating state of the game control microcomputer 100 from the outside.

The unique information storage circuit 133 can store multiple types of unique information that are internal information of the game control microcomputer 100, for example. For example, the unique information storage circuit 133 may store a ROM code, a chip individual number, and an ID number as unique information that differs for each chip of the game control microcomputer 100. The ROM code is numerical data that can be generated from data stored in a specified area of the ROM 101. The chip individual number and the ID number are numbers that are assigned when the game control microcomputer 100 is manufactured, and indicate different numerical values for each chip. The chip individual number may be readable by a user program such as a game program, while the ID number may be set so that it cannot be read by the user program. The unique information storage circuit 133 may be included in a specified area of the ROM 101, or may be included in a built-in register of the game control microcomputer 100.

The reset controller 134 can control various resets that occur inside and outside the game control microcomputer 100. Resets that can be controlled by the reset controller 134 include a system reset and a user reset. A system reset occurs when the input signal of the external system reset terminal XSRST is at a low level for a certain period of time. A user reset occurs due to a specified factor, such as the occurrence of a timeout signal of the watchdog timer 134A or the occurrence of a driving prohibition outside a designated area (IAT). The reset controller 134 includes a watchdog timer 134A. The watchdog timer 134A can set a timer value corresponding to the monitoring time, and can perform a countdown that periodically updates the timer value by subtracting 1. When the timer value becomes "0" and a timeout occurs, the watchdog timer 134A can output a timeout signal to reset the game control microcomputer 100 and restart it. This allows the watchdog timer 134A to measure the monitoring time and reset the game control microcomputer 100 when it is determined that the monitoring time has elapsed. The watchdog timer 134A can be set to enable or disable operation, for example, according to a game program.

The interrupt controller 135 can control various interrupt requests that occur inside or outside the game control microcomputer 100. The interrupts that can be controlled by the interrupt controller 135 include the non-maskable interrupt NMI and the maskable interrupt INT. The non-maskable interrupt NMI is an interrupt that can be accepted unconditionally even when the CPU 103 is in an interrupt-prohibited state, and occurs when the input signal of the external non-maskable interrupt terminal XNMI (also used as the input port PI6) is at a low level for a certain period of time. The maskable interrupt INT is an interrupt that can permit or prohibit the acceptance of interrupt requests by a setting command of the CPU 103, and multiple interrupts can be executed by setting priority levels. The maskable interrupt INT can be caused by any or all of the following multiple types of interrupt causes: the input signal of the external maskable interrupt terminal XINT (also used as input port PI5) being at a low level for a certain period of time, a timeout occurring in the timer circuit 136, or numeric data indicating a random value being stored in the random value register by the 16-bit random number circuit 104A or the 8-bit random number circuit 104B.

The timer circuit 136 is configured to include a PTC (Programmable Timer Counter) as a timer counter corresponding to the three channels PTC0 to PTC2, and enables real-time interrupt generation and time measurement. Each channel PTC0 to PTC2 of the timer circuit 136 uses a count clock generated based on the internal system clock SCLK, and it is sufficient if it can update the timer value in response to signal changes in the count clock, such as the falling edge timing when the clock signal changes from high level to low level.

The address decode circuit 137 can decode various signals obtained from each functional block inside the game control microcomputer 100, and can output a chip select signal, which is a decoded signal for an external device. The chip select signal selectively enables the internal circuitry of the game control microcomputer 100 or an external device that is a peripheral device, allowing access from the CPU 103. The output terminals that the address decode circuit 137 can use may be multi-function terminals that can selectively output a parallel output signal from the POP 105B, a serial transmission signal from the serial communication circuit 139, a clock output signal from the clock circuit 132, and a chip select signal generated by the address decode circuit 137.

The free-running counter 138 is configured to include counter circuits corresponding to the four channels FRC0 to FRC3, and can update the count value separately from the operation of the CPU 103. Each channel FRC0 to FRC3 of the free-running counter 138 can be started by an independent update clock, and can be set to stop or change its operation, for example, according to a game program. The count value by the free-running counter 138 can be stored in a hard latch register in response to a latch signal transmitted from an input terminal that serves as a latch signal input terminal in the PIP 105A. The count value stored in the hard latch register can be read by the CPU 103 and used when executing a game program, etc.

The serial communication circuit 139 is configured to include serial communication units corresponding to three channels SCU0, SCU1, and STU2, and enables communication with an external device by a serial communication method. Each channel SCU0, SCU1, and STU2 of the serial communication circuit 139 can process communication data, for example, in full duplex, asynchronous, or standard NRZ (Non Return to Zero) format. The channels SCU0 and SCU1 of the serial communication circuit 139 are included in a first channel transmission/reception circuit that can transmit and receive serial data bidirectionally with an external circuit. The channel STU2 of the serial communication circuit 139 is included in a second channel transmission circuit that can only transmit serial data unidirectionally with an external circuit. For example, the channel SCU0 of the serial communication circuit 139 is used for data communication with the payout control board. Also, the channel SCU1 of the serial communication circuit 139 is used for data communication with the performance control board 12. Instead of channel SCU1 of serial communication circuit 139, channel STU2 of serial communication circuit 139 may be used for data communication with performance control board 12.

The 16-bit random number circuit 104A is configured to include random number generation units corresponding to the four channels RL0 to RL3, and each of them can generate random numbers from "0" to "65535" using numerical data indicating the value of a 16-bit pseudo-random number by independent operation. The maximum value of the random numbers generated by each channel RL0 to RL3 in the 16-bit random number circuit 104A can be set to any value in the range of "256" to "65535". By setting such a maximum value, it is possible to perform initial setting to select the random number startup method so that the update of the numerical data indicating the random number value is started. Alternatively, it is possible to perform initial setting to select the random number startup method for each channel RL0 to RL3 in the 16-bit random number circuit 104A so that it is automatically started when the operation mode of the game control microcomputer 100 shifts from the security mode to the user mode. The 16-bit random number circuit 104A can update the random number MR1-1 for determining special symbols using channel RL0, and can update the random number MR3-2 for selecting a losing performance using channel RL2.

The 8-bit random number circuit 104B is configured to include random number generation units corresponding to the four channels RS0 to RS3, each of which can generate random numbers from "0" to "255" using numerical data indicating the value of an 8-bit pseudo-random number by independent operation. The maximum value of the random numbers generated by each channel RS0 to RS3 in the 8-bit random number circuit 104B can be set to any value in the range of "16" to "255". By setting such a maximum value, it is possible to perform initial setting to select the random number startup method so that the update of the numerical data indicating the random number value is started. Alternatively, each channel RS0 to RS3 in the 8-bit random number circuit 104B may be initially set to select the random number startup method so that it is automatically started when the operation mode of the game control microcomputer 100 shifts from the security mode to the user mode. The 8-bit random number circuit 104B can update the random number MR3-3 for selecting the type of variation pattern via channel RS1, the random number MR3-4 for the variation pattern via channel RS2, and the random number MR3-1 for the normal symbol variation pattern via channel RS3.

PIP105A has an 8-bit wide input port built in, for example, and allows various signals to be input from outside the game control microcomputer 100. PIP105A can use input terminals corresponding to input ports PI0 to PI7. Input port PI5 uses a multi-function terminal that can be used with the external maskable interrupt terminal XINT. Input port PI6 uses a multi-function terminal that can be used with the external non-maskable interrupt terminal XNMI. Input port PI7 uses a multi-function terminal that can be used with the receiving terminal of channel SCU0 in the serial communication circuit 139. POP105B has an 11-bit wide output port built in, for example, and allows various signals to be output to the outside of the game control microcomputer 100. POP105B can supply parallel output signals corresponding to output ports PO0 to PO7 and PO10 to PO12 to the address decode circuit 137.

Figure 21-2 shows an example of an address map in the game control microcomputer 100. In the example shown in Figure 21-2, the area of addresses 0000 [H] to 3FFF [H] is assigned to the ROM 101, and includes a game program area, a game data area, a non-game program area, a non-game data area, a ROM comment area, a program management area, and other unused areas. The area of addresses F000 [H] to F3FF [H] is assigned to the RAM 102, and includes a game work area, a game stack area, a non-game work area, a non-game stack area, and other unused areas. The area of addresses FE00 [H] to FEBF [H] is a function setting register area assigned to the built-in register of the game control microcomputer 100. The area of addresses FF00 [H] to FFFF [H] is a function control register area assigned to the built-in register of the game control microcomputer 100.

In the ROM 101, the game program area can store game programs, which are computer programs related to the progress of a game. The game data area can store game data used by the game programs. The non-game program area can store non-game programs, which are computer programs related to control and processing other than the progress of a game. The non-game data area can store non-game data used by the non-game programs. These programs and data stored in the ROM 101 are designed and created in advance by the manufacturer of the pachinko gaming machine 1, who is the user of the game control microcomputer 100. Therefore, the game programs and non-game programs are included in the user programs. The game data and non-game data are included in the user data.

The memory area of ROM 101 is provided with a game program area capable of storing game programs related to the progress of the game, and a non-game program area for control and processing other than the progress of the game, and the area in front of the non-game program area to which a rear address is assigned is an unused area with a memory area of more than the boundary byte number, for example 16 bytes. This makes it easy to identify the game program area capable of storing game programs related to the progress of the game, and the non-game program area capable of storing non-game programs related to control and processing other than the progress of the game, making it easier to design and manage the programs and data stored in ROM 101.

The memory area of ROM 101 is provided with a game program area capable of storing game programs related to the progress of the game, and a game data area capable of storing game data used by the game programs, and the area in front of the game data area to which the latter address is assigned is an unused area of memory space with a boundary byte number or more, for example 16 bytes. This makes it easy to identify the game program area capable of storing game programs related to the progress of the game, and the game data area capable of storing game data used by the game programs, facilitating the design and management of the programs and data stored in ROM 101.

In the storage area of ROM 101, a non-game program area capable of storing non-game programs related to control and processing different from the progress of the game, and a non-game data area capable of listening to non-game data used by the non-game programs are provided adjacent to each other, and among the non-game program area and the non-game data area, the area behind the non-game program area to which a forward address is assigned becomes the non-game data area, and the area in front of the non-game data area to which a backward address is assigned becomes the non-game program area. This allows the non-game program area capable of storing non-game programs related to control and processing different from the progress of the game and the non-game data area capable of storing non-game data used by the non-game program to be provided in storage areas assigned consecutive addresses, thereby increasing the unity, and facilitating the design and management of the programs and data stored in ROM 101. Note that an unused area of storage area of more than the boundary byte number may be provided between the non-game program area and the non-game data area, making it easy to identify the non-game program area and the non-game data area.

In the memory area of ROM 101, data indicating a value of "0" may be stored in all areas of the memory area that will become unused areas. This makes it easy to distinguish between game program areas and game data areas, non-game program areas and non-game data areas, and unused areas. Furthermore, if unauthorized data is stored in an unused area, this data can be easily found. Note that data indicating a value of "1" may be stored in all areas of the memory area that will become unused areas. In other words, data indicating the same value may be stored in all areas of the memory area that will become unused areas. This makes it easy to distinguish between multiple types of memory areas, and makes it easy to find unauthorized stored data.

In RAM 102, the game work area can be used as a work area when CPU 103 executes a game program. The game stack area can be used as a stack area when CPU 103 executes a game program. The non-game work area can be used as a work area when CPU 103 executes a non-game program. The non-game stack area can be used as a stack area when CPU 103 executes a non-game program.

The game program area and game data area provided in the memory area of ROM 101, and the game work area and game stack area provided in the memory area of RAM 102 are included in the memory area for game control. The non-game program and non-game data area provided in the memory area of ROM 101, and the non-game work area and non-game stack area provided in the memory area of RAM 102 are included in the memory area for non-game control.

The ROM comment area provided in the storage area of ROM 101 stores data indicating any program-specific information, such as the program title and version. The program management area provided in the storage area of ROM 101 can store setting information required for the internal settings of the game control microcomputer 100 so that the CPU 103 can execute game programs and non-game programs.

Figure 21-3 shows a main setting example AKA01 of the addresses included in the function setting register area among the addresses assigned to the built-in registers of the game control microcomputer 100. The function setting register area is the first area for setting functions using various circuits included in the game control microcomputer 100, such as the watchdog timer 134A of the reset controller 134, the interrupt controller 135, the timer circuit 136, and the serial communication circuit 139.

In setting example AKA01, the setting values of the WDT start register at address FE1A[H] and the WDT clear register at addresses FE1B[H] to FE1C[H] are invalid values corresponding to unused states. As a result, the monitoring time measurement function using the watchdog timer 134A of the reset controller 134 is set to an unused state. As the setting value of the interrupt mask register at address FE00[H] is 7E[H], the interrupt control function using the interrupt controller 135 is set to an enabled state for maskable interrupt IR0. As the setting values of the registers related to channel PTC0 of the timer circuit 136 at addresses FE01[H] to FE03[H] are valid values, the time measurement function using channel PTC0 of the timer circuit 136 is set to an enabled state. At addresses FE04[H] to FE09[H], the register settings for channels PTC1 and PTC2 of timer circuit 136 are set to invalid values corresponding to unused states, so the timing function using channels PTC1 and PTC2 of timer circuit 136 is set to an unused state.

The register settings for channels SCU0 and SCU1 of serial communication circuit 139 at addresses FE0A[H] to FE11[H] are valid, so that the serial communication function using channels SCU0 and SCU1 of serial communication circuit 139 is set to an available state. The register settings for channel STU2 of serial communication circuit 139 at addresses FE12[H] to FE14[H] are invalid, so that the serial communication function using channel STU2 of serial communication circuit 139 is set to an unused state.

When the register settings for the input ports of PIP 105A at addresses FE2C[H] to FE2E[H] are valid values, the signal input function using each input port is set to an available state. When the register settings for the random number circuit 104 at addresses FE36[H] to FE4A[H] include valid and invalid values, the random number generation function using the random number circuit 104 is set to an available state for the channels corresponding to the valid values, and to an unused state for the channels corresponding to the invalid values. For example, of the four channels RL0 to RL3 in the 16-bit random number circuit 104A, the random number generation function is set to an available state for channels RL0 and RL2, whose corresponding maximum value setting register settings are valid values, while the random number generation function is set to an unused state for channels RL1 and RL3, whose corresponding maximum value setting register settings are invalid values. In addition, of the four channels RS0 to RS3 in the 8-bit random number circuit 104B, the random number generation function is set to an available state for channels RS1 to RS3 whose corresponding maximum value setting registers are set to valid values, and the random number generation function is set to an unused state for channel RS0 whose corresponding maximum value setting registers are set to invalid values.

In this way, the various circuits included in the game control microcomputer 100 only need to be able to set the various functions using the respective circuits to either an available state or an unused state, corresponding to the setting value in the function setting register area. The function setting register area is not limited to the various circuits included in the game control microcomputer 100, and may be a first area for setting any function.

Figure 21-4 shows a main setting example AKA02 of the addresses included in the function control register area among the addresses assigned to the built-in registers of the game control microcomputer 100. The function control register area is the second area for function control using various circuits included in the game control microcomputer 100, such as the RAM 102, the random number circuit 104, the PIP 105A, and the serial communication circuit 139.

In the setting example AKA02, the RWM access protection register at address FF00[H] corresponds to a setting value of 00[H] or 01[H], enabling function control to prohibit or permit access to the RAM 102, which is the RWM. The internal information register at address FF01[H] is set to an invalid value corresponding to unused, and function control using the corresponding circuit is in an unused state. The internal information register can store data indicating internal information such as an abnormality in the random number update state, an abnormality in the frequency of the random number update clock, a system reset occurrence, a WDT timeout occurrence, and an IAT occurrence, but is not used as an unused state in this embodiment.

Each register with addresses FF25[H] to FF28[H] can store a setting value used when controlling the serial communication function using channel SCU0 of serial communication circuit 139 when that function is available. Each register with addresses FF29[H] to FF2C[H] can store a setting value used when controlling the serial communication function using channel SCU1 of serial communication circuit 139 when that function is available.

Each register with addresses FF60[H] to FF67[H] can store a random number value that can be obtained using the soft latch random number value acquisition function of the 16-bit random number circuit 104A. Of these, the RL0 soft latch random number register with addresses FF60[H] to FF61[H] can store a random number that can be generated by channel RL0 of the 16-bit random number circuit 104A when numerical data indicating the value is acquired by soft latch. The RL1 soft latch random number register with addresses FF62[H] to FF63[H] can store a random number that can be generated by channel RL1 of the 16-bit random number circuit 104A when numerical data indicating the value is acquired by soft latch. The RL2 soft latch random number register at addresses FF64[H] to FF65[H] can store random numbers that can be generated by channel RL2 of the 16-bit random number circuit 104A when numerical data indicating the value of the random number is obtained by soft latch. The RL3 soft latch random number register at addresses FF66[H] to FF67[H] can store random numbers that can be generated by channel RL3 of the 16-bit random number circuit 104A when numerical data indicating the value of the random number is obtained by soft latch.

Each of the registers at addresses FF68[H] to FF6B[H] can store random numbers that can be obtained using the soft latch random number acquisition function of the 8-bit random number circuit 104B. Of these, the RS0 soft latch random number register at address FF68[H] can store random numbers that can be generated by channel RS0 of the 8-bit random number circuit 104B when numerical data indicating the value is acquired by soft latch. The RS1 soft latch random number register at address FF69[H] can store random numbers that can be generated by channel RS1 of the 8-bit random number circuit 104B when numerical data indicating the value is acquired by soft latch. The RS2 soft latch random number register at address FF6A[H] can store random numbers that can be generated by channel RS2 of the 8-bit random number circuit 104B when numerical data indicating the value is acquired by soft latch. The RS3 soft latch random number register at address FF6B[H] can store the random numbers that can be generated by channel RS3 of the 8-bit random number circuit 104B when numerical data indicating the value is obtained by the soft latch.

The RL0 hard latch random number register number "0" at addresses FF88[H] to FF89[H] and the RL0 hard latch random number register number "1" at addresses FF98[H] to FF99[H] can store random numbers that can be generated by the channel RL0 provided in the 16-bit random number circuit 104A when numerical data indicating the value is acquired by the hard latch. Here, the RL0 hard latch random number register includes multiple storage areas corresponding to multiple register numbers, and different hard latch conditions can be set corresponding to the storage areas of different register numbers. For example, the RL0 hard latch random number register number "0", which is the RL0 hard latch random number register corresponding to register number "0", can establish a hard latch condition when the game ball detection signal by the first start port switch 22A is in the on state. In contrast, the RL0 hard latch random number register number "1", which is the RL0 hard latch random number register corresponding to register number "1", can satisfy the hard latch condition when the game ball detection signal from second start port switch 22B is in the on state. As a result, RL0 hard latch random number register number "0" can be stored when the numerical data indicating the value of random number MR1-1 for determining special symbols obtained in response to the occurrence of a first start winning is obtained by the hard latch. RL0 hard latch random number register number "1" can be stored when the numerical data indicating the value of random number MR1-1 for determining special symbols obtained in response to the occurrence of a second start winning is obtained by the hard latch.

Each of the registers with addresses FFF0[H] to FFF2[H] and FF35[H] can store the signal value input at each input port, corresponding to the signal input function using the input port of PIP 105A being in a usable state. Of these, the input port number "0" register with address FFF0[H] can store the signal value input for the input port with port number "0" provided in PIP 105A. The input port number "1" register with address FFF1[H] can store the signal value input for the input port with port number "1" provided in PIP 105A. The input port number "2" register with address FFF2[H] can store the signal value input for the input port with port number "2" provided in PIP 105A. The input port number "3" register with address FF35[H] can store the signal value input for the input port with port number "3" provided in PIP 105A.

In this way, the various circuits included in the game control microcomputer 100 only need to be able to control their respective operating states in response to the values stored in the function control register area. Furthermore, the various circuits included in the game control microcomputer 100 may be able to update the values stored in the function control register area in response to their respective operating states. The function control register area is not limited to the various circuits included in the game control microcomputer 100, but may be a second area for controlling any function.

Figure 21-5 is a diagram for explaining an example of settings in this embodiment for the gaming random numbers shown in Figure 14. The gaming random numbers shown in Figure 14 can be classified into random numbers used to determine the display result in the variable display of special symbols, random numbers used to determine the display result in the variable display of normal symbols, and random numbers used to determine the display mode in the variable display of special symbols and normal symbols, depending on their respective uses.

Figure 21-5 (A) shows a setting example AKA11 of a game random number used to determine the display result in the variable display of a special symbol. The game random numbers in setting example AKA11 include a random number MR1-1 for determining a special symbol, a random number MR1-2 for a winning symbol, and a random number MR1-3 that serves as an initial value for the winning symbol. For example, the random number MR1-1 for determining a special symbol can be used to determine whether the special symbol display result is a "big hit" or a "small hit". The random number MR1-2 for the winning symbol can be used to determine the big hit symbol designation value or the small hit symbol designation value that corresponds to the confirmed special symbol when the special symbol display result is a "big hit" or a "small hit". The random number MR1-3 that serves as the initial value for the winning symbol can be used when setting the initial value of the random number MR1-2.

The range of random number MR1-1 is the range of values that can update random number MR1-1, which is "0" to "65535". The size of random number MR1-1 is the total number of random numbers included in the update range of random number MR1-1, which is "65536" corresponding to the range of random number MR1-1, "0" to "65535". Since the size of random number MR1-1 is "65536", the total number of random numbers included in the update range is not a prime number. The number of bytes of numerical data used to update the value of random number MR1-1 is "2". The method for setting the maximum value of random number MR1-1 is by initial setting of a register provided in correspondence with 16-bit random number circuit 104A. The method for updating random number MR1-1 is by hardware update using 16-bit random number circuit 104A. The update condition for random number MR1-1 is the system clock input in 16-bit random number circuit 104A. The conditions for obtaining the random number MR1-1 include a hard latch corresponding to the start winning and reading into the random number buffer by software corresponding to the start winning. The period of the random number MR1-1 is 4.369 [ms].

The range of random number MR1-2 is the range of values that can update random number MR1-2, which is "0" to "199". The size of random number MR1-2 is the total number of random numbers included in the update range of random number MR1-2, which is "200" corresponding to the range of random number MR1-2, "0" to "199". Since the size of random number MR1-2 is "200", the total number of random numbers included in the update range is not a prime number. For random number MR1-2, the number of bytes of numerical data used to update its value is "1". The method for setting the maximum value of random number MR1-2 is by setting an immediate value in the program code. The method for updating random number MR1-2 is software update SA1. The update condition for random number MR1-2 is a timer interrupt due to the passage of a specified time. The acquisition condition for random number MR1-2 is reading by software corresponding to the start winning. The period of random numbers MR1-2 is 800 [ms].

The range of random number MR1-3 is the range of values with which random number MR1-3 can be updated, and is the same as random number MR1-2, "0" to "199". The size of random number MR1-3 is the total number of random values included in the update range of random number MR1-3, and is "200", the same as random number MR1-2, corresponding to the range of random number MR1-3, "0" to "199". Since the size of random number MR1-3 is "200", the total number of random values included in the update range is not a prime number. For random number MR1-3, the number of bytes of numeric data used to update its value is "1". The method for setting the maximum value of random number MR1-3 is by setting an immediate value in the program code. The method for updating random number MR1-3 is software update SA2. The update conditions for the random numbers MR1-3 include a timer interrupt due to the passage of a predetermined time, and during loop processing, which is standby processing within the main processing P_MAIN for game control. The acquisition condition for the random numbers MR1-3 is that the random numbers MR1-2 have completed one cycle. The period of the random numbers MR1-3 is indefinite due to the update conditions.

Figure 21-5 (B) shows a setting example AKA12 of a gaming random number used to determine the display result in the variable display of a normal pattern. The gaming random numbers in setting example AKA12 include a random number MR2-1 for a pattern that hits a normal pattern, and a random number MR2-2 that serves as an initial value for the pattern that hits a normal pattern. For example, the random number MR2-1 for a pattern that hits a normal pattern can be used to determine a normal pattern designation value that corresponds to a confirmed normal pattern, as a display result for the normal pattern. The random number MR2-2 that serves as an initial value for the pattern that hits a normal pattern can be used when setting the initial value of the random number MR1-2.

The range of random number MR2-1 is the range of values that can update random number MR2-1, which is "0" to "198". The size of random number MR2-1 is the total number of random numbers included in the update range of random number MR2-1, which is "199" corresponding to the range of random number MR2-1, "0" to "198". Since the size of random number MR2-1 is "199", the total number of random numbers included in the update range is a prime number. The number of bytes of numerical data used to update the value of random number MR2-1 is "1". The method for setting the maximum value of random number MR2-1 is by setting an immediate value in the program code. The method for updating random number MR2-1 is software update SA1. The update condition for random number MR2-1 is a timer interrupt due to the passage of a predetermined time. The acquisition condition for random number MR2-1 is a readout by software in response to the game ball passing through pass gate 41, which can be configured as a normal symbol activation port. The period of the random number MR2-1 is 796 [ms].

The range of random number MR2-2 is the range of values with which random number MR2-2 can be updated, and is the same as random number MR2-1, from "0" to "198". The magnitude of random number MR2-2 is the total number of random values included in the update range of random number MR2-2, and is the same as random number MR2-1, "199", which corresponds to the range of random number MR2-2, from "0" to "198". Since random number MR2-2 has a magnitude of "199", the total number of random values included in the update range is a prime number. For random number MR2-2, the number of bytes of numeric data used to update its value is "1". The method for setting the maximum value of random number MR2-2 is by setting an immediate value in the program code. The method for updating random number MR2-2 is software update SA2. The update conditions for random number MR2-2 include a timer interrupt due to the passage of a predetermined time, and during loop processing, which is standby processing within the main processing P_MAIN for game control. The acquisition condition for random number MR2-2 is that random number MR2-1 has completed one cycle. The period of random number MR2-2 is indefinite due to the update conditions.

Figure 21-5 (C) shows a setting example AKA13 of a gaming random number used to determine the display mode in the variable display of special and normal symbols. The gaming random numbers in setting example AKA13 include a random number MR3-1 for a normal symbol variation pattern, a random number MR3-2 for selecting a miss effect, a random number MR3-3 for selecting a variation pattern type, and a random number MR3-4 for a variation pattern. For example, the random number MR3-1 for a normal symbol variation pattern can be used to determine a normal symbol variation pattern corresponding to the variable display of a normal symbol. The random number MR3-2 for selecting a miss effect can be used to determine a variable display mode corresponding to the variable display of a special symbol whose special symbol display result is "miss". The random number MR3-3 for selecting a variation pattern type can be used to select a variation pattern type corresponding to the variable display of a special symbol. The random number MR3-4 for the variation pattern can be used to determine the variation pattern that corresponds to the variable display of the special symbol.

The range of random number MR3-1 is the range of values that can update random number MR3-1, which is "0" to "232". The size of random number MR3-1 is the total number of random numbers included in the update range of random number MR3-1, which is "233" corresponding to the range of random number MR3-1, "0" to "232". Since the size of random number MR3-1 is "233", the total number of random numbers included in the update range is a prime number. The number of bytes of numerical data used to update the value of random number MR3-1 is "1". The method for setting the maximum value of random number MR3-1 is by initial setting of a register provided in correspondence with 8-bit random number circuit 104B. The method for updating random number MR3-1 is by hardware update using 8-bit random number circuit 104B. The update condition for random number MR3-1 is the system clock input in 8-bit random number circuit 104B. The condition for obtaining the random number MR3-1 is the start of fluctuations in the variable display of normal symbols. The period of the random number MR3-1 is 0.249 [ms].

The range of random number MR3-2 is the range of values that can update random number MR3-2, which is "0" to "65518". The size of random number MR3-2 is the total number of random numbers included in the update range of random number MR3-2, which is "65519" corresponding to the range of random number MR3-2, "0" to "65518". Since the size of random number MR3-2 is "65519", the total number of random numbers included in the update range is a prime number. The number of bytes of numerical data used to update the value of random number MR3-2 is "2". The method for setting the maximum value of random number MR3-2 is by initial setting of a register provided in correspondence with 16-bit random number circuit 104A. The method for updating random number MR3-2 is by hardware update using 16-bit random number circuit 104A. The update condition for random number MR3-2 is the system clock input in 16-bit random number circuit 104A. The conditions for obtaining the random number MR3-2 include reading it into the random number buffer using software that corresponds to the start winning. The period of the random number MR3-2 is 139.774 [ms].

The range of random number MR3-3 is the range of values that can update random number MR3-3, which is "0" to "240". The size of random number MR3-3 is the total number of random numbers included in the update range of random number MR3-3, which is "241" corresponding to the range of random number MR3-3, "0" to "240". Since the size of random number MR3-3 is "241", the total number of random numbers included in the update range is a prime number. The number of bytes of numerical data used to update the value of random number MR3-3 is "1". The method for setting the maximum value of random number MR3-3 is by initial setting of a register provided in correspondence with 8-bit random number circuit 104B. The method for updating random number MR3-3 is by hardware update using 8-bit random number circuit 104B. The update condition for random number MR3-3 is the system clock input in 8-bit random number circuit 104B. The conditions for obtaining the random number MR3-3 include reading it into a random number buffer using software that corresponds to the start winning. The period of the random number MR3-3 is 0.257 [ms].

The range of random number MR3-4 is the range of values that can update random number MR3-4, which is "0" to "250". The size of random number MR3-4 is the total number of random numbers included in the update range of random number MR3-4, which is "251" corresponding to the range of random number MR3-4, "0" to "250". Since the size of random number MR3-4 is "251", the total number of random numbers included in the update range is a prime number. The number of bytes of numerical data used to update the value of random number MR3-4 is "1". The method for setting the maximum value of random number MR3-4 is by initial setting of a register provided in correspondence with 8-bit random number circuit 104B. The method for updating random number MR3-4 is by hardware update using 8-bit random number circuit 104B. The update condition for random number MR3-4 is the system clock input in 8-bit random number circuit 104B. The conditions for obtaining the random number MR3-4 include reading it into a random number buffer using software that corresponds to the start winning. The period of the random number MR3-4 is 0.268 [ms].

The software update SA1, which is a method of updating the random numbers MR1-2 and MR2-1, can be updated by adding 1 to the previous value each time the software update process is executed. At this time, if the updated value exceeds the maximum random number value, it is changed to "0" as the minimum random number value. Also, if the updated value matches the random number initial value, the corresponding initial random number is used to set the current random number value and stored as the new random number initial value. For example, for random number MR1-2, if the updated value matches the random number initial value, the current random number value is set using random number MR1-3, which is the initial value for the winning symbol, and the random number value is stored as the new random number initial value. For random number MR2-1, if the updated value matches the random number initial value, the current random number value is set using random number MR2-2, which is the initial value for the winning symbol for normal symbols, and the random number value is stored as the new random number initial value.

Software update SA2, which is a method of updating random numbers MR1-3 and MR2-2, can update the previous value by adding 1 each time the software update process is executed. If the updated value exceeds the maximum random number value at this time, it is changed to "0", the minimum random number value. In this case, unlike software update SA1, no random number initial value is used, so the updated value will be either the previous value plus 1, or the minimum random number value of "0".

Figure 21-6 is a diagram for explaining the random number update period when updating random values using the 16-bit random number circuit 104A and 8-bit random number circuit 104B included in the random number circuit 104. Here, the random numbers that can be generated by channels RL0 to RL4 provided in the 16-bit random number circuit 104A are referred to as 16-bit random numbers RLn. Also, the random numbers that can be generated by channels RS0 to RS4 provided in the 8-bit random number circuit 104B are referred to as 8-bit random numbers RSn. The period in which the 16-bit random numbers RLn that can be updated by the 16-bit random number circuit 104A completes one cycle is determined by different relational expressions depending on whether the maximum value of the 16-bit random number RLn is a specific maximum value expressed using a power of two. The period in which the 8-bit random number RSn, which can be updated by the 8-bit random number circuit 104B, goes through one cycle is determined by a different relational formula depending on whether the maximum value of the 8-bit random number RSn is a specific maximum value expressed using a power of 2.

Figure 21-6 (A) shows a 16-bit random number period setting example AKA21 in a 16-bit random number circuit 104A. The 16-bit random number period is the period in which the 16-bit random number RLn, which can be updated by the 16-bit random number circuit 104A, goes through one cycle. In the 16-bit random number period setting example AKA21, if the maximum value of the 16-bit random number RLn corresponds to 2m-1 where m = 9 to 16, the period in which the 16-bit random number sequence goes through one cycle is proportional to the inverse of the count clock frequency, i.e., the count clock period. It then becomes a linear function with the maximum value plus 1, i.e., the magnitude of the 16-bit random number RLn, as a variable. In contrast, if the maximum value of the 16-bit random number RLn does not correspond to 2m-1 when m is any of 9 to 16, the period in which the 16-bit random number sequence goes through one cycle is proportional to the inverse of the count clock frequency, i.e., 32 times the count clock period. It then becomes a linear function with the maximum value plus 1, i.e., the magnitude of the 16-bit random number RLn, as a variable. In this way, when the maximum value of the 16-bit random number RLn that can be updated by the 16-bit random number circuit 104A is a specific maximum value, the random number update period is shorter than when the maximum value is other than the specific maximum value, i.e., the update speed of the random number value is faster.

Figure 21-6 (B) shows an example of setting an 8-bit random number period AK22 in an 8-bit random number circuit 104B. The 8-bit random number period is the period in which an 8-bit random number RSn that can be updated by the 8-bit random number circuit 104B goes round. In the 8-bit random number period setting example AK22, if the maximum value of the 8-bit random number RSn corresponds to 2m-1 when m = 5 to 8, the period in which the 8-bit random number sequence goes round is proportional to the inverse of the count clock frequency, that is, the count clock period. Then, it becomes a linear function with the value obtained by adding 1 to the maximum value, that is, the magnitude of the 8-bit random number RSn, as a variable. On the other hand, if the maximum value of the 8-bit random number RSn does not correspond to 2m-1 when m = 5 to 8, the period in which the 8-bit random number sequence goes round is proportional to the inverse of the count clock frequency, that is, 16 times the count clock period. It then becomes a linear function with the maximum value plus 1, i.e., the magnitude of the 8-bit random number RSn, as a variable. In this way, when the maximum value of the 8-bit random number RSn that can be updated by the 8-bit random number circuit 104B is a specific maximum value, the random number update period is shorter than when the maximum value is other than the specific maximum value, i.e., the update speed of the random number value is faster.

Figure 21-6 (C) shows a random number comparison example AKA23 that compares the random number values that can be updated by the 16-bit random number circuit 104A and the 8-bit random number circuit 104B. The 16-bit random number circuit 104A can update the random number values corresponding to the random number MR1-1 for determining a special symbol and the random number MR3-2 for selecting a miss performance. The 8-bit random number circuit 104B can update the random number values corresponding to the random number MR3-3 for selecting a variation pattern type and the random number MR3-4 for the variation pattern.

The random number MR1-1 has a maximum value of "65535", which corresponds to 2m-1 when m = 16. This results in a period of 4.369 [ms], and an update speed of 15000 [times/ms]. The random number MR3-2 has a maximum value of "65518", which does not correspond to 2m-1 when m = 9 to 16. This results in a period of 139.774 [ms], and an update speed of 469 [times/ms]. The random number MR3-3 has a maximum value of "240", which does not correspond to 2m-1 when m = 5 to 8. This results in a period of 0.257 [ms], and an update speed of 938 [times/ms]. The maximum value of random number MR3-4 is "250", which does not correspond to 2m-1 for any of m = 5 to 8. As a result, the period of random number MR3-4 is 0.268 [ms], and the update speed at this time is 938 [times/ms].

In this way, the gaming random numbers that can be updated by the 16-bit random number circuit 104A include the random number MR1-1 for determining special symbols and the random number MR3-2 for selecting a losing effect. Both of these random numbers MR1-1 and MR3-2 have a number of bytes of numerical data of "2", which is a specific number of bytes. The size of the random number MR1-1 is "65536" and the size of the random number MR3-2 is "65519", so if the total number of random numbers included in the update range of the random number MR1-1 is a specific number, the total number of random numbers included in the update range of the random number MR3-2 is a predetermined number that is smaller than the specific number. The update speed of the random number MR1-1 is 15000 [times/ms] and the update speed of the random number MR3-2 is 469 [times/ms], so the update speed of the random number MR1-1 is faster than that of the random number MR3-2. This prevents random numbers from being synchronously generated, allowing for appropriate updates to random numbers.

Furthermore, the game random numbers that can be updated by the 16-bit random number circuit 104A include a random number MR3-2 for selecting a losing effect. The game random numbers that can be updated by the 8-bit random number circuit 104B include a random number MR3-3 for selecting a variation pattern type, and a random number MR3-4 for a variation pattern. The total number of random numbers included in the update range of all of these random numbers MR3-2 to MR3-4 is a prime number. The update speed of the random number MR3-2 is 469 times/ms, while the update speed of the random numbers MR3-3 and MR3-4 is 938 times/ms. In other words, the update speed of the random numbers MR3-3 and MR3-4 is twice the update speed of the random number MR3-2, which is an integer multiple. Therefore, if random number MR3-2 is the first random number value, and random numbers MR3-3 and MR3-4 are the second random number values, the first random number value has an update speed of the first speed, and the second random number value has an update speed of the second speed that is an integer multiple of the first speed. The update range of random number MR3-2 is "0" to "65518", the update range of random number MR3-3 is "0" to "240", and the update range of random number MR3-4 is "0" to "250", so the total number of random number values included in each update range is different for the first random number value and the second random number value, and the total number of random number values included in each update range is a prime number. This makes it possible to suppress the occurrence of synchronization of random number values and update the random number values appropriately.

The CPU 103 is provided with multiple registers, such as a program counter, an interrupt register, a stack pointer, an index register, a flag register, an address register, and general-purpose registers including an accumulator. The index register, the flag register, and the general-purpose register may be provided as a main register and a sub-register. The registers included in the main register and the sub-register, and the stack pointer may be provided so as to be able to configure multiple register banks. The multiple register banks may include a first register bank for use within an area that can be used when executing a game program, and a second register bank for use outside the area that can be used when executing a non-game program. This eliminates the need to save and restore stored values in the general-purpose registers, etc., to and from the stack area when switching between game programs and non-game programs, for example, and thus prevents an increase in the amount of programs and processing load.

The program counter, also known as the PC register, is used to hold the address value of the next instruction to be executed by the CPU 103. The value stored in the program counter is counted up each time an instruction is executed, and the address value of the branch destination of a branch instruction is set. The interrupt register, also known as the I register, can hold the upper address value of the interrupt vector table. The value stored in the I register is set in response to the start of power supply to the pachinko gaming machine 1.

The stack pointer can hold an address value corresponding to the game stack area or the non-game stack area, and is also called the SP register. The stored value of the stack pointer can specify a destination address for saving and holding a stored value or immediate value in a predefined register including the program counter or a register specified by an instruction in response to an interrupt occurrence, execution of a PUSH instruction, execution of a subroutine call instruction such as a CALL instruction, a CALLF instruction, or a RST instruction, and is updated to a value indicating the top address of the storage area holding the stored value upon saving. The stored value of the stack pointer can also specify a read address for restoring the saved register stored value in response to the end of an interrupt process, execution of a POP instruction, end of a subroutine process, and is updated to a value indicating the address corresponding to the readout of the stored value upon this return. In addition, the stored value of the stack pointer can be set to a stored value or immediate value of a register specified by a load instruction such as an LD instruction.

The index registers include the IX register and the IY register, which have a storage capacity of 2 bytes and can store 16-bit data. The accumulator is also called the A register. Other general-purpose registers include a number of registers, such as the B register, C register, D register, E register, H register, and L register, which have a storage capacity of 1 byte and can store 8-bit data. The B register and the C register can be used as the BC register of a pair of registers that can store 16-bit data. The D register and the E register can be used as the DE register of a pair of registers that can store 16-bit data. The H register and the L register can be used as the HL register of a pair of registers that can store 16-bit data.

The internal registers of the CPU 103 can update the stored values in response to calculation instructions and transfer instructions executed by the CPU 103, and are used to specify program addresses, data addresses, or built-in register addresses provided in the game control microcomputer 100, to hold calculation data and transfer data, etc.

In the game control microcomputer 100, the instruction set for causing the CPU 103 to execute a program is composed of transfer instructions such as load instructions, subroutine call instructions, jump instructions, other calculation instructions including arithmetic operation instructions and logical operation instructions, input/output instructions, etc. Computer programs such as game programs and non-game programs that can be executed by the CPU 103 are prepared in advance as program code that describes these various instructions, and are stored in the ROM 101.

The load instruction is a transfer instruction that can be used when data read from a memory area or built-in device area of ROM 101 or RAM 102 is stored and set in an internal register of CPU 103, when a value stored in an internal register of CPU 103 is written and stored in a memory area or built-in device area of RAM 102, and when a numerical value specified by an operand is set or stored as an immediate value in an internal register of CPU 103 or a memory area or built-in device area of RAM 102. The target to which data is transferred by the load instruction can be specified according to the instruction code or operand, and generally includes the source and destination of the data. However, when an immediate value is specified by the operand, the source of the data is not included.

The load instructions include a normal LD instruction, a special LDQ instruction, a special LDF instruction, and a special ICPLD instruction. The normal LD instruction is also called a normal transfer instruction. The special LDQ instruction is also called a first special transfer instruction. The special LDF instruction is also called a second special transfer instruction. The special ICPLD instruction is also called a third special transfer instruction.

The LD instruction, which is a normal transfer instruction, is a normal transfer instruction that can transfer data by specifying both a high-order address and a low-order address when transferring data to a storage area or built-in device area of ROM 101 or RAM 102. In addition, the LD instruction, which is a normal transfer instruction, can transfer data by specifying the destination or source address using a pointer by using a pair register such as the HL register as a pointer when transferring data to a storage area or built-in device area of ROM 101 or RAM 102.

The LDQ instruction, which is the first special transfer instruction, can transfer data by specifying only the lower address using the Q register, a special register included in the internal registers of the CPU 103. A value indicating the upper address is preset in the Q register, and by combining this with the lower address specified by the LDQ instruction, it is possible to specify the destination or source address and transfer data.

The LDQ instruction, which is the first special transfer instruction, can transfer data with less program code than the LD instruction, which is the normal transfer instruction. However, in a program that frequently changes the value stored in the Q register, the amount of program code may actually be greater than with the normal LD instruction. Therefore, it is sufficient to be able to execute data transfers using the LDQ instruction, which is the first special transfer instruction, in response to processes that require the transfer of various data multiple times to the game work area at addresses F000 [H] to F0D7 [H], the function setting register area at addresses FE00 [H] to FEBF [H], and the function control register area at addresses FF00 [H] to FFFF [H].

The second special transfer command, the LDF command, can transfer data by specifying only the lower addresses of stored data in a specific address range. The specific address range is, for example, the range of addresses 1200 [H] to 1DFF [H]. Therefore, by setting the game data area of ROM 101 in advance to be included in this specific address range and combining it with the lower address specified by the LDF command, it is possible to specify the address from which data is to be transferred. Note that the game data area of ROM 101 is read-only and cannot be written to, so the address of the game data area is never specified as the destination address.

The second special transfer command, the LDF command, can transfer data with a smaller amount of program code than the normal transfer command, the LD command. However, since the specific address range is fixed by specification, it is sufficient to set the storage area of frequently used data, such as the game data area of ROM 101, to be included in the specific address range, and to be able to transfer data using the second special transfer command, the LDF command.

The ICPLD instruction, which is the third special transfer instruction, compares the update target value with the comparison judgment value, and updates the update target value by adding 1 if the update target value is less than the comparison judgment value, but changes the update target value to the minimum value "0" if the update target value is equal to or greater than the comparison judgment value. The update target value may be the value indicated by the stored data at the address pointed to by the pointer, or may be the value stored in a register. The comparison judgment value may be the value stored in a register, or may be the value indicated by the operand of the ICPLD instruction.

In this way, the third special transfer instruction, the ICPLD instruction, is a single compare and add instruction that includes comparing the update target value with the comparison judgment value, incrementing the update target value by 1 if the comparison result is less than the comparison judgment value, and changing the update target value to the minimum value if the comparison result is equal to or greater than the comparison judgment value.

Setting a stored value in an internal register of CPU 103 using an immediate value from an operand of a transfer command is also called "set." Reading stored data in the game data area of ROM 101 or the game work area of RAM 102 and storing it in an internal register of CPU 103 is also called "load." Storing a stored value in an internal register of CPU 103 in a buffer, counter, timer, or any other storage area provided in the game work area of RAM 102 is also called "store."

Figure 21-7 is a flow chart showing an example of the power supply start response processing P_POWER_ON. The power supply start response processing P_POWER_ON is included in the processing that can be called from the main processing P_MAIN for game control shown in Figure 15, and can be executed in step S1 in response to the start of power supply in the pachinko game machine 1. When the CPU 103 executes the power supply start response processing P_POWER_ON, it sets interrupt prohibition (step AKS1) and then sets the in-area stack pointer initial value to the stack pointer (step AKS2). The in-area stack pointer initial value may be address F200 [H], which is the final address of the game stack area plus 1, corresponding to the initial state in which no saved data is stored in the game stack area.

Following step AKS2, a connection confirmation signal ON output value is set by a transfer command for setting the internal register of the CPU 103 (step AKS3). The connection confirmation signal ON output value is a value indicating that the connection confirmation signal is ON, and may be, for example, 00 [H]. At this time, a function control register upper address is set in the Q register by a transfer command for setting the Q register included in the internal register of the CPU 103 (step AKS4). The function control register upper address is a value FF [H] indicating the upper address of the function control register area in the setting example AKA02 shown in FIG. 21-4. When the function control register upper address is set in this way, a transfer command using the upper address indicated by the stored value of the Q register stores the connection confirmation signal ON output value (step AKS5). In this case, the lower address of the transfer destination can be specified by the operand of the transfer command. The stored value of the Q register is set to the upper address of the function control register area by step AKS4. Therefore, the connection confirmation signal ON output value set in step AKS3 can be stored in the function control register of the specified address in the function control register area by a transfer command for writing to a memory area of a specified address, such as a special 2-byte LDQ command that specifies a lower address. In step AKS5, the connection confirmation signal ON output value is stored in the output port number "1" register provided in the function control register area. As a result, the connection confirmation signal transmitted from the main board 11 to the dispensing control board is set to the ON state.

When the connection confirmation signal is set to the ON state in step AKS5, the SCU0 command register clear output value is stored by a transfer command using the upper address indicated by the stored value of the Q register (step AKS6). In this case, the lower address of the transfer destination can be specified by the operand of the transfer command. The stored value of the Q register is set to the upper address of the function control register area in step AKS4. The SCU0 command register clear output value can be specified by the operand of the transfer command. Therefore, the SCU0 command register clear output value can be stored in the function control register of the specified address in the function control register area by a transfer command for writing to the memory area of the specified address, such as a 3-byte special LDQ command that specifies the lower address and the SCU0 command register clear output value. In step AKS6, the SCU0 command register clear output value is stored in the SCU0 command register provided at address FF28 [H] of the function control register area in the setting example AKA02 shown in FIG. 21-4. As a result, the serial communication function using the channel SCU0 of the serial communication circuit 139 is controlled to the initial state.

After step AKS6, the SCU1 command register clear output value is stored by a transfer command using the upper address indicated by the stored value of the Q register (step AKS7). In this case, the lower address of the transfer destination can be specified by the operand of the transfer command. The stored value of the Q register is set to the upper address of the function control register area by step AKS4. The SCU1 command register clear output value can be specified by the operand of the transfer command. Therefore, the SCU1 command register clear output value can be stored in the function control register of the specified address in the function control register area by a transfer command for writing to a memory area of a specified address, such as a 3-byte special LDQ command that specifies a lower address and the SCU0 command register clear output value. In step AKS7, the SCU1 command register clear output value is stored in the SCU1 command register provided at address FF2C[H] of the function control register area in the setting example AKA02 shown in FIG. 21-4. As a result, the serial communication function using the channel SCU1 of the serial communication circuit 139 is controlled to the initial state.

When these serial communication functions are controlled to the initial state, a transfer command for setting the internal registers of CPU 103 sets the interrupt vector table upper address (step AKS8). The interrupt vector table upper address is the upper address of the interrupt vector table provided in the game program area of ROM 101. The interrupt vector table stores the top address at a table position corresponding to the interrupt priority for, for example, timer interrupt processing P_PCT for game control that is executed in response to the occurrence of a timer interrupt. Such an interrupt vector table upper address is set in the I register by a transfer command for setting the internal registers of CPU 103 (step AKS9).

After step AKS9, the stored value of the Q register is updated to subtract 1 (step AKS10). The stored value of the Q register was set to the upper address of the function control register area by step AKS4. When this stored value is subtracted by 1, the upper address of the function setting register area in the setting example AKA01 shown in FIG. 21-3 is stored in the Q register. In this way, after the function control register set in the function control register area is set, the function setting register set in the function setting register area is made settable. At this time, the function setting register storage value table address is set by a transfer command for setting the pointer (step AKS11). The function setting register storage value table address is the address of the function setting register storage value table stored in the game data area of ROM 101. Then, the number of processes is loaded by a transfer command for reading the stored data of the address pointed to by the pointer (step AKS12). Also, setting is performed using the function setting register storage value table by a function setting register store command (step AKS13). The function setting register store instruction may be an instruction to specify a function setting register based on the stored data at the address when the address pointed to by the pointer is added by 1, to store the function setting register setting value indicated by the stored data at the address when the address pointed to by the pointer is added by 2 in the specified function setting register, to add 2 to the stored value of the pointer, and to subtract 1 from the processing count, repeating this process until the processing count is 0. In this way, the initial setting of the function setting register is possible.

When the initial setting of the function setting register is completed in step AKS13, an access permission output value is stored in the RWM access protection register (step AKS14). The access permission output value of the RWM access protection register is set to, for example, 01 [H] by a transfer command for setting the internal register of the CPU 103. Such an access permission output value is stored in the RWM access protection register by a transfer command for writing to the memory area of the top address in the function setting register area. The RWM access protection register enables function control to allow access to the RAM 102, which is the RWM, in response to the setting of the access permission output value 01 [H]. Therefore, by storing the access permission output value in the RWM access protection register in step AKS14, access to the RAM 102 is permitted in response to the start of power supply in the pachinko gaming machine 1.

After step AKS14, the upper address of the game work area, which is the working area of RAM 102, is set in the Q register (step AKS15), and the power supply start response process P_POWER_ON ends. In this way, after access to RAM 102 is permitted by step AKS14, a value F0 [H] indicating the upper address of the game work area in RAM 102 is set in the Q register. After step AKS15, when the LDQ command, which is the first special transfer command, is executed, F0 [H], which is the value stored in the Q register, can be used as the upper address of the transfer destination or source without being specified by an operand. This reduces the program capacity of the process using the game work area in RAM 102, improving the marketability of the gaming machine.

Figure 21-8 shows a configuration example AKT01 of the function setting register storage value table used in the power supply start response process P_POWER_ON. In the power supply start response process P_POWER_ON, for example, the function setting register storage table whose address is set in step AKS11 is used to load the number of processes in step AKS12, and the stored values of each function setting register are stored by the function setting register store command in step AKS13. The function setting register storage value table of configuration example AKT01 stores a value of 18 [H] indicating the number of processes at the top address 1200 [H]. In step AKS12, this table data is read and loaded into the internal register of the CPU 103. After that, the function setting register store command in step AKS13 sequentially reads table data that combines the lower addresses and stored values of the function setting registers, making it possible to store the stored values in the function setting registers corresponding to each lower address.

In the function setting register storage value table of configuration example AKT01, the table data is configured so that the stored value of the function setting register with a smaller value indicating the lower address can be set first, and the stored value of the function setting register with a larger value indicating the lower address can be set later. As a result, in the function setting register area, the stored values of each function setting register are set in the order of the stored value of the function setting register closest to the top address being set first, and the stored value of the function setting register closest to the last address being set last. This makes it easier to design and manage the data indicating the stored values of the function setting registers, improving the marketability of the gaming machine.

The 16-bit random number circuit 104A can start updating from the channel whose maximum value is set in the maximum value setting register corresponding to the four channels RL0 to RL3. The 8-bit random number circuit 104B can start updating from the channel whose maximum value is set in the maximum value setting register corresponding to the four channels RS0 to RS3. The function setting register area of the setting example AKA01 shown in Figure 21-3 is provided with an RL0 maximum value setting register at addresses FE3F [H] to FE40 [H], an RL1 maximum value setting register at addresses FE41 [H] to FE42 [H], an RL2 maximum value setting register at addresses FE43 [H] to FE44 [H], and an RL3 maximum value setting register at addresses FE45 [H] to FE46 [H] corresponding to the four channels RL0 to RL3 in the 16-bit random number circuit 104A. In addition, this function setting register area includes an RS0 maximum value setting register at address FE47 [H], an RS1 maximum value setting register at address FE48 [H], an RS2 maximum value setting register at address FE49 [H], and an RS3 maximum value setting register at address FE4A [H], which correspond to the four channels RS0 to RS4 in the 8-bit random number circuit 104B. The function setting register storage value table of the configuration example AKT01 is configured such that, among these maximum value setting registers, the stored value of the RL0 maximum value setting register is set first, the stored value of the RL2 maximum value setting register is set next, the stored value of the RS1 maximum value setting register is set next, the stored value of the RS2 maximum value setting register is set next, and the RS3 maximum value setting register is set last. Therefore, the update of channel RL0 in the 16-bit random number circuit 104A is started first, the update of channel RL2 in the 16-bit random number circuit 104A is started next, the update of channel RS1 in the 8-bit random number circuit 104B is started next, the update of channel RS2 in the 8-bit random number circuit 104B is started next, and the update of channel RS3 in the 8-bit random number circuit 104B is started last. In this way, since the updates start in order from the random number value for which the maximum random number value is set, the uncertainty of the random number value is increased depending on the timing at which the update of the random number value is started, the processing load is reduced, and appropriate random number value updating is possible.

The power supply start response process P_POWER_ON is included in the process that can be called from the main process P_MAIN for game control, which is a startup process executed based on the start of power supply in the pachinko game machine 1, and makes it possible to set a stored value in the function setting register area as a storage area for functions using the function setting register storage value table of the configuration example AKT01. At this time, since the maximum random number value of the random number value updated by the 16-bit random number circuit 104A or the 8-bit random number circuit 104B can be set, the power supply start response process P_POWER_ON can be executed as a maximum value setting process. The 16-bit random number circuit 104A can update a first random number value consisting of 16 bits corresponding to 2 bytes as a specific byte number. The 8-bit random number circuit 104B can update a second random number value consisting of 8 bits corresponding to 1 byte as a predetermined byte number smaller than the specific byte number. Then, when executing the power supply start response process P_POWER_ON, the function setting register storage value table of the configuration example AKT01 is used to set the maximum value of the first random number value that can be updated by the 16-bit random number circuit 104A, and then set the maximum value of the second random number value that can be updated by the 8-bit random number circuit 104B. In this way, by setting the first random number value of a specific number of bytes and then setting the second random number value of a predetermined number of bytes, the first random number value and the second random number value can be stably updated, making it possible to update the random number values appropriately.

Figure 21-9 shows an example of the configuration of the RWM access protection register. The RWM access protection register is provided at address FF00[H] in the example configuration AKA02 of the function control register area shown in Figure 21-4. The value stored in the RWM access protection register will be different depending on whether access to the RAM 102 that is the RWM is prohibited or permitted.

Figure 21-9 (A) shows an example of the bit configuration of the RWM access protection register. The RWM access protection register can store 8-bit data RAP with bit numbers "0" to "7", and bit data RAP0 with bit number "0" can be set to 0 [B] or 1 [B]. In contrast, bit data from bit number "1" to bit number "7" are always set to 0 [B], indicating a fixed value that is never set to "1".

Figure 21-9 (B) is a diagram for explaining an example of the use of bit data RAP of the RWM access protection register. In the bit data RAP, bit data RAP0 with bit number "0" is an RWM access control bit, and a setting of 0 [B] prohibits access to the RWM, and a setting of 1 [B] permits access to the RWM. In response to the start of power supply to the pachinko gaming machine 1, bit data RAP0 with bit number "0" is set to its initial value of 0 [B]. This makes it possible to prohibit access to the RAM 102, which becomes the RWM, in response to the start of power supply to the pachinko gaming machine 1.

Figure 21-10 is a flowchart showing an example of power-off processing P_POWER_OFF. Power-off processing P_POWER_OFF is included in the processing that can be called from the timer interrupt processing P_PCT for game control shown in Figure 16, and can be executed in step S51 each time a timer interrupt occurs. When the CPU 103 executes power-off processing P_POWER_OFF, it sets the backup monitoring timer address by a transfer command for setting a pointer (step AKS31). The backup monitoring timer address is the address of the backup monitoring timer provided in the game work area of RAM 102.

Input port number "3" is input (step AKS32). Input port number "3" is an input port to which "3" is assigned as the port number, and includes a power check signal input bit. Therefore, a logical AND operation is performed using the input data of input port number "3" and the check data corresponding to the bit position of the power check signal input bit. At this time, it is determined whether the power check signal input bit is "0" or not depending on whether the zero flag is on or not (step AKS33). When the power check signal input bit's bit value is 0 [B] corresponding to "0", it indicates that the power check signal is in the OFF state, and when the bit value is 1 [B] corresponding to "1", it indicates that the power check signal is in the ON state.

If the power supply confirmation signal input bit is "1" rather than "0" (step AKS33; No), backup monitoring timer clear data is stored by a transfer command capable of updating the stored data at the address pointed to by the pointer (step AKS34). In step AKS34, by storing the clear data in the backup monitoring timer, the backup monitoring timer can be cleared when the power supply confirmation signal is in the ON state, in response to a state other than the power cut determination being made.

When the power supply confirmation signal input bit is "0" in response to step AKS33 (step AKS33; Yes), the backup monitoring timer is updated to add 1 to the time value (step AKS35). Also, the backup monitoring timer is loaded by a transfer command to read the stored data at the address pointed to by the pointer (step AKS36). Then, by a calculation return command capable of comparing the time value of the backup monitoring timer with the judgment value corresponding to the backup judgment time (step AKS37), it is confirmed that the backup monitoring timer does not indicate the backup judgment time (step AKS38). This calculation return command corresponds to a zero flag that is turned off when the time value of the backup monitoring timer and the judgment value corresponding to the backup judgment time are different, and enables the power off process to be terminated and a return to the special symbol process process to be made. Thus, when the backup monitoring timer does not indicate the backup judgment time (step AKS38; Yes), the power off process is terminated.

When the backup monitoring timer indicates the backup judgment time in response to step AKS38 (step AKS38; No), the checksum calculation process P_SUM_CALC is executed (step AKS39). The checksum calculation process P_SUM_CALC in step AKS39 may be a process common to the checksum calculation process included in the RWM check process P_RWM_CHK in step S2 in the main process P_MAIN for game control shown in FIG. 15. In this way, by executing a common checksum calculation process in response to the start and stop of power supply in the pachinko game machine 1, it becomes possible to determine whether or not recovery using backup data is possible depending on whether the memory contents in the game work area of the RAM 102 are retained without change. The checksum data created by the checksum calculation process P_SUM_CALC in step AKS39 is stored in the checksum buffer by a transfer command for writing to the memory area of the address pointed to by the pointer (step AKS40).

After step AKS40, the clear data is set to the output value data by an exclusive OR operation command (step AKS41). This exclusive OR operation command operates the exclusive OR of the stored values of a single register, so that all bit values become the exclusive OR of the same value, and the stored value can be initialized to the clear data of 00 [H]. Such clear data is stored in the RWM access protection register by a transfer command for writing to the memory area of the top address in the function setting register area (step AKS42). The RWM access protection register enables function control to prohibit access to the RAM 102, which is the RWM, in response to the setting of the clear data 00 [H]. Therefore, by storing the clear data in the RWM access protection register by step AKS42, access to the RAM 102 is prohibited in response to the stop of the power supply to the pachinko game machine 1.

After step AKS42, the output port numbers "0" to "10" are cleared (step AKS43). The output port numbers "0" to "10" are the output ports with port numbers "0" to "10", and are all the output ports in the game control microcomputer 100. Therefore, in response to the stop of the power supply in the pachinko game machine 1, all the output ports in the game control microcomputer 100 are set to a clear state by step AKS43. At this time, a connection confirmation signal off output value is set by a transfer command for setting the internal register of the CPU 103 (step AKS44). The connection confirmation signal off output value is a value indicating that the connection confirmation signal is in an off state, and may be, for example, 01 [H]. Such a connection confirmation signal off output value is stored in the output port number "1" register by a transfer command for writing it in the memory area of the specified address in the function control register area (step AKS45). As a result, the connection confirmation signal transmitted from the main board 11 to the payout control board is set to an off state.

Following step AKS45, a PTC0 interrupt inhibit output value is set by a transfer command for setting an internal register of the CPU 103 (step AKS46). The PTC0 interrupt inhibit output value is an output value for inhibiting the occurrence of a timer interrupt using channel PTC0 of the timer circuit 136. This PTC0 interrupt inhibit output value is stored in the PTC0 control register by a transfer command for writing to a function setting register at a specified address in the function setting register area (step AKS47). The PTC0 control register can set the usage state of the timekeeping function using channel PTC0 of the timer circuit 136. In step AKS47, the PTC0 interrupt inhibit output value set in step AKS46 is stored in the PTC0 control register, and accordingly, in response to the stop of the power supply to the pachinko gaming machine 1, the timer interrupt for game control is set to the inhibited state.

When the setting corresponding to the lapse of such backup determination time is made, the system transitions to a standby state by executing a loop process. In this standby state, the input port number "3" is input (step AKS48), and it is determined whether the power supply confirmation signal input bit is "0" (step AKS49). If the power supply confirmation signal is in the OFF state and the power supply confirmation signal input bit is "0" (step AKS49; Yes), the system continues the loop process returning to step AKS48. In this way, by maintaining a standby state until operation stops due to a power outage in response to a power supply interruption in the pachinko gaming machine 1, it is possible to prevent inconvenient changes to stored data and runaway processing by the CPU 103.

If the power check signal input bit is "1" and not "0" in response to step AKS49 (step AKS49; No), the power interruption recovery vector table address is set to the stack pointer (step AKS50), and the power interruption process P_POWER_OFF is terminated by an interrupt return command. The power interruption recovery vector table address is the address of the power interruption recovery vector table provided in the game program area of ROM 101. The interrupt return command can use the stack pointer as a pointer to set the stored data of the memory area indicated by the address specified by the stored value of the stack pointer to the program counter. For example, the stored data of the memory area indicated by the address specified by the stored value of the stack pointer is set to the lower byte of the program counter, and the stored data of the memory area indicated by the address specified by the value obtained by adding 1 to the stored value of the stack pointer is set to the upper byte of the program counter.

Figure 21-11 is a diagram for explaining an example of the use of data configuration related to the power-off processing P_POWER_OFF. In the power-off processing P_POWER_OFF, for example, step AKS38 executes branch processing using the time value of the backup monitoring timer, and step AKS40 saves checksum data using the checksum buffer. In addition, step AKS50 sets the power-off recovery vector table address, so that if the operation does not stop after a power supply interruption is detected in the pachinko gaming machine 1 and normal power supply is resumed, the game control program can be executed from the beginning. In this way, the power-off processing P_POWER_OFF uses the backup monitoring timer, checksum buffer, and power-off recovery vector table to enable control when the power supply to the pachinko gaming machine 1 is interrupted.

Figure 21-11 (A) shows a configuration example AKB01 of a memory area that serves as a backup data area. The backup data area of configuration example AKB01 can store backup setting data that is used when backing up stored data in the game work area of RAM 102. This backup data area includes a backup monitoring timer at address F000 [H] and a checksum buffer at address F0DE [H]. Address F000 [H] is the first address of the game work area, and address F0DE [H] is the last address of the game work area. In this way, by providing a backup data area at the first address and the last address of the game work area, it is possible to properly back up stored data in the game work area of RAM 102.

Figure 21-11 (B) shows a configuration example AKT11 of a power failure recovery vector table. The power failure recovery vector table of the configuration example AKT11 can specify a return address from the power failure process in response to an interrupt return command when normal power supply is resumed. The power failure recovery vector table is configured to include, as table data, lower address designation data 00 [H] stored at address 0016 [H] in the game program area of ROM 101 and upper address designation data 00 [H] stored at address 0017 [H] in the game program area of ROM 101. In step AKS50 of the power failure process P_POWER_OFF, data indicating address 0016 [H] is set in the stack pointer as the power failure recovery vector table address. After that, the stored value of the program counter is set to 0000 [H] by an interrupt return command to return the process, making it possible to execute the main process P_MAIN for game control from the beginning.

Figure 21-12 is a flowchart showing an example of the random number update process P_RANDOM. The random number update process P_RANDOM is included in the process that can be called from the timer interrupt process P_PCT for game control shown in Figure 16, and can be executed in step S56 in response to the occurrence of a periodic timer interrupt due to the passage of a predetermined time, for example, 4 ms. On the other hand, the random number update process P_RANDOM is not included in the process that can be called from the main process P_MAIN for game control shown in Figure 15, and is not executed in the loop process that is repeated until a timer interrupt occurs after step S7. Therefore, although the random number update process P_RANDOM is included in the first process that can be executed in response to a timer interrupt due to the passage of a predetermined time, it is not included in the second process that can be repeatedly executed until the first process is executed. Furthermore, the random number update process P_RANDOM can be called and executed in the timer interrupt process P_PCT for game control that controls the progress of the game, but in the main process P_MAIN for game control that is executed based on the start of power supply in the pachinko game machine 1, it is not called and cannot be executed in the standby process as a repeated loop process after startup processes such as the power supply start response process P_POWER_ON in step S1.

The random number update process P_RANDOM uses internal registers of the CPU 103, such as the B register, DE register, and HL register, to update the numerical data indicating the values of the random number MR1-2 for the winning symbol and the random number MR2-1 for the normal and winning symbols. The random number MR1-2 for the winning symbol is used to determine the confirmed special symbol that is the display result of the special symbol, corresponding to the special symbol game, which is a variable display of the special symbol on the first special symbol display device 4A or the second special symbol display device 4B. The random number MR2-1 for the normal and winning symbol is used to determine the confirmed normal symbol that is the display result of the normal symbol, corresponding to the normal symbol game, which is a variable display of the normal symbol on the normal symbol display device 20. The random number update process P_RANDOM can update the random number value for each of the following two cases: when updating the random number MR1-2 for the winning symbol, and when updating the random number MR2-1 for the normal winning symbol, by using the B register, DE register, and HL register as common internal registers.

When the CPU 103 executes the random number update process P_RANDOM, it sets the random number counter address for the winning symbol by a transfer command for setting the HL register used as a random number pointer (step AKS61). The random number counter address for the winning symbol is the address of the random number counter for the winning symbol provided in the game work area of the RAM 102. The random number pointer can store the address of the random number counter corresponding to the random number value to be updated, and the random number value to be updated can be specified by setting the stored value. In step AKS61, the random number MR1-2 for the winning symbol can be set as the random number value to be updated by storing the address of the random number counter for the winning symbol in the random number pointer by the LDQ command.

Following step AKS61, a transfer command is issued to set the B register to be used as the random number maximum register, and a random number maximum value corresponding to the random number maximum judgment value for the winning symbol is set (step AKS62). The random number maximum register can store the maximum value that the random number to be updated can take, and the maximum random number value can be specified by setting the stored value. In step AKS62, for the random number MR1-2 for the winning symbol, the maximum value included in the update range of the random number MR1-2, such as C7 [H] corresponding to "199", is stored in the random number maximum register by the LD command. This makes it possible to set the maximum random number of the random number MR1-2 that was set as the random number to be updated in step AKS61.

After step AKS62, the random number initial value data buffer address for the winning symbol is set by a transfer command to set the DE register used as the initial value pointer (step AKS63). The random number initial value data buffer address for the winning symbol is the address of the random number initial value data buffer for the winning symbol provided in the game work area of RAM 102. The initial value pointer can store the address of the random number initial value data buffer corresponding to the random number value to be updated, and the random number initial value can be obtained or changed by setting the stored value. In step AKS63, the address of the random number initial value data buffer for the winning symbol is stored in the initial value pointer by the LDQ command, thereby setting the random number initial value to be obtainable and changeable corresponding to the random number MR1-2 set as the random number to be updated by step AKS61. Next, the initial value change random number update process P_RANCP is executed by a subroutine call command (step AKS64). The initial value change random number update process P_RANCP in step AKS64 makes it possible to update the random numbers MR1-2 for the winning symbols, which are the random number values to be updated, and to change the random number initial value, based on the settings in steps AKS61 to AKS63.

After the initial value change random number update process P_RANCP in step AKS64, the random number counter address for the normal symbol is set by a transfer command to set the HL register used as a random number pointer (step AKS65). The random number counter address for the normal symbol is the address of the random number counter for the normal symbol provided in the game work area of RAM 102. In step AKS65, the random number MR2-1 for the normal symbol can be set as the random number value to be updated by storing the address of the random number counter for the normal symbol in the random number pointer by the LDQ command.

Following step AKS65, a transfer command is issued to set the B register used as the random number maximum register, and a random number maximum value corresponding to the random number maximum judgment value for the normal symbol pattern is set (step AKS66). In step AKS66, for the random number MR2-1 for the normal symbol pattern, the maximum value included in the update range of the random number MR2-1, for example C6[H] corresponding to the maximum value "198", is stored in the random number maximum register by the LD command. This makes it possible to set the random number maximum value of the random number MR2-1 that was set as the random number value to be updated in step AKS65.

After step AKS66, the random number initial value data buffer address for the normal symbol is set by a transfer command to set the DE register used as the initial value pointer (step AKS67). The random number initial value data buffer address for the normal symbol is the address of the random number initial value data buffer for the normal symbol provided in the game work area of RAM 102. In step AKS67, the address of the random number initial value data buffer for the normal symbol is stored in the initial value pointer by the LDQ command, and the random number initial value for the random number MR2-1 set as the random number value to be updated in step AKS65 is set to be obtainable and changeable. Next, the initial value change random number update process P_RANCP is executed by a subroutine call command common to step AKS64 (step AKS68). The initial value change random number update process P_RANCP in step AKS68 makes it possible to update the random number MR2-1 for the normal winning symbol, which is the random number value to be updated, and to change the random number initial value, based on the settings in steps AKS65 to AKS67.

Figure 21-13 is a diagram for explaining an example of the use of data configuration related to the random number update process P_RANDOM. In the random number update process P_RANDOM, the initial value change random number update process P_RANCP is executed in step AKS64 using the random number counter for winning symbols whose address is set in the random number pointer in step AKS61 and the random number initial value data buffer for winning symbols whose address is set in the initial value pointer in step AKS63. In addition, in the random number update process P_RANDOM, the initial value change random number update process P_RANCP is executed in step AKS68 using the random number counter for winning normal symbols whose address is set in the random number pointer in step AKS65 and the random number initial value data buffer for winning normal symbols whose address is set in the initial value pointer in step AKS67. The random number counter for winning symbols is provided in the random number buffer area for special symbols, and can store numerical data corresponding to the random numbers MR1-2 for winning symbols. The random number initial value data buffer for the winning symbol is provided in the random number data area for the winning symbol, and can store numerical data corresponding to the random number initial value of the random number MR1-2. The random number counter for the normal winning symbol is provided in the random number data area for the winning symbol, and can store numerical data corresponding to the random number MR2-1 for the normal winning symbol. The random number initial value data buffer for the normal winning symbol is provided in the random number data area for the winning symbol, and can store numerical data corresponding to the random number initial value of the random number MR2-1. In this way, the random number update process P_RANDOM enables software to update the random numbers MR1-2 and MR2-1 using the random number initial value data buffer for winning symbols provided in the random number data area for winning symbols, the random number counter for normal winning symbols, the random number initial value data buffer for normal winning symbols, and the random number counter for winning symbols provided in the random number buffer area for special symbols.

Figure 21-13 (A) shows a configuration example AKB11 of a random number data area for a winning symbol. The winning symbol random number data area of the configuration example AKB11 includes a random number initial value data buffer for a winning symbol at address F050 [H], an initial value random number counter for a winning symbol at address F051 [H], a random number counter for a normal winning symbol at address F052 [H], a random number initial value data buffer for a normal winning symbol at address F053 [H], and an initial value random number counter for a normal winning symbol at address F054 [H]. Of these, the address F050[H] of the random number initial value data buffer for the winning symbol is set to the initial value pointer by step AKS63 of the random number update process P_RANDOM, the address F052[H] of the random number counter for the normal winning symbol is set to the random number pointer by step AKS65 of the random number update process P_RANDOM, and the address F053[H] of the random number initial value data buffer for the normal winning symbol is set to the initial value pointer by step AKS67 of the random number update process P_RANDOM. The initial value random number counter for the winning symbol can store numerical data corresponding to the random numbers MR1-3 that are the initial values for the winning symbol. The initial value random number counter for the normal winning symbol can store numerical data corresponding to the random numbers MR2-2 that are the initial values for the normal winning symbol.

Figure 21-13 (B) shows a configuration example AKB12 of the random number buffer area for special symbols. The random number buffer area for special symbols of the configuration example AKB12 includes a random number buffer for special symbol determination at address F07F [H], a random number counter for winning symbols at address F081 [H], a random number buffer for selecting a variation pattern type at address F082 [H], a random number buffer for a variation pattern at address F083 [H], and a random number buffer for selecting a losing performance at address F084 [H]. Of these, the address F081 [H] of the random number counter for winning symbols is set to the random number pointer by step AKS61 of the random number update process P_RANDOM. The random number buffer for special symbol determination can store numerical data corresponding to the random number MR1-1 for special symbol determination obtained from the 16-bit random number circuit 104A. The random number buffer for selecting a variation pattern type can store numerical data corresponding to the random number MR3-3 for selecting a variation pattern type obtained from the 8-bit random number circuit 104B. The random number buffer for variation patterns can store numerical data corresponding to the random number MR3-4 for variation patterns obtained from the 8-bit random number circuit 104B. The random number buffer for selecting a losing performance can store numerical data corresponding to the random number MR3-2 for selecting a losing performance obtained from the 16-bit random number circuit 104A.

Figure 21-14 is a flowchart showing an example of the initial value change random number update process P_RANCP. The initial value change random number update process P_RANCP is included in the processes that can be called from the random number update process P_RANDOM shown in Figure 21-12, and can be executed in step AKS64 after the settings for the random number MR1-2 for the winning symbol are made in steps AKS61 to AKS63, and can be executed in step AKS68 after the settings for the random number MR2-1 for the normal and winning symbols are made in steps AKS65 to AKS67. Such initial value change random number update process P_RANCP makes it possible to update the value of the random number MR1-2 using numerical data corresponding to the random number MR1-2 for the winning symbol in step AKS64. Additionally, the initial value change random number update process P_RANCP makes it possible to update the value of the random number MR2-1 using numerical data corresponding to the random number MR2-1 for the normal winning symbol in step AKS68.

When the CPU 103 executes the initial value change random number update process P_RANCP, it first executes a compare and add command (step AKS101). This compare and add command can be executed by a single ICPLD command, which is a third special transfer command, with the stored data at the address indicated by the stored value of the HL register, which is a random number pointer, as the update target value, and the stored value of the B register, which is a random number maximum register, as the comparison judgment value. The stored value of the HL register, which is a random number pointer, indicates the address of the random number counter in which the numerical data corresponding to the update target random number value is stored. The stored value of the B register, which is a random number maximum register, indicates the random number maximum value set corresponding to the update target random number value. Then, when the count value of the random number counter indicating the update target random number value is less than the stored value of the random number maximum register, the count value of the random number counter is updated to be incremented by 1, thereby incrementing the update target random number value by 1. In contrast, if the count value of the random number counter indicating the random number value to be updated is equal to or greater than the value stored in the maximum random number register, the random number counter is cleared and the count value is initialized to "0", changing the random number value to the minimum random number value. Therefore, the compare and add instruction of step AKS101 is a single instruction that includes comparing the random number value to be updated with the maximum random number, incrementing the random number value to be updated by 1 if the comparison result is less than the maximum random number, and changing the random number value to the minimum random number if the comparison result is equal to or greater than the maximum random number. In this way, when updating the random number value to be updated by the initial value change random number update process P_RANCP, a single compare and add instruction is executed first. By executing such a single compare and add instruction first, it is possible to suppress the occurrence of malfunctions and update the random number value appropriately.

When the compare and add instruction is executed in step AKS101, a transfer instruction for reading stored data is used to load the random number value pointed to by the random number pointer (step AKS102). The random number pointer and the initial value pointer are also exchanged (step AKS103). The random number value loaded in step AKS102 is then compared with the random number initial value data buffer pointed to by the initial value pointer (step AKS104). It is determined whether the compared random number value is different from the value stored in the random number initial value data buffer pointed to by the initial value pointer (step AKS105). The value stored in the DE register, which is the initial value pointer, indicates the address of the random number initial value data buffer corresponding to the random number value to be updated. Therefore, in step AKS104, after the compare and add instruction of step AKS101 is executed, the random number value to be updated after the compare and add instruction is compared with the random number initial value.

When the random number value corresponding to step AKS105 differs from the value stored in the random number initial value data buffer pointed to by the initial value pointer (step AKS105; Yes), the initial value change random number update process P_RANCP ends. When the compare and add command of step AKS101 is executed, the count value of the random number counter indicating the random number value to be updated indicates the updated random number value. Then, when the initial value change random number update process P_RANCP ends due to the judgment result of step AKS105, the stored value of the random number counter indicating the updated random number value to be updated is stored as it is as the current random number value. Therefore, in step AKS105, if the updated random number value to be updated does not match the random number initial value, the initial value change random number update process P_RANCP ends, and the updated random number value to be updated can be stored as the current random number value.

In the case where the random number value is the same as the value stored in the random number initial value data buffer pointed to by the initial value pointer in response to step AKS105 (step AKS105; No), the initial value random number counter pointed to when the value stored in the initial value pointer is incremented by 1 is loaded (step AKS106). In the configuration example AKB11 of the random number data area for winning symbols shown in FIG. 21-13(A), the next address F051[H] when the address F050[H] where the random number initial value data buffer for winning symbols is provided is incremented by 1 has a winning symbol initial value random number counter provided. In addition, the next address F054[H] when the address F053[H] where the random number initial value data buffer for normal winning symbols is incremented by 1 has a normal winning symbol initial value random number counter provided. Therefore, in step AKS106, when the stored value of the initial value pointer indicates the address of the random number initial value data buffer for the winning symbol, the count value of the initial value random number counter for the winning symbol is read out. Also, in step AKS106, when the stored value of the initial value pointer indicates the address of the random number initial value data buffer for the normal winning symbol, the count value of the initial value random number counter for the normal winning symbol is read out. In this way, in step AKS106, the count value of the initial value random number counter can be read out as the random number value for the initial value.

When the initial value random number counter is loaded in step AKS106, the count value of the initial value random number counter thus read is stored in the random number counter pointed to by the random number pointer (step AKS107). Since the stored value of the random number pointer indicates the address of the random number counter corresponding to the random number value to be updated, step AKS107 can store the count value of the initial value random number counter as the current random number value to be updated. Therefore, if the result of the determination in step AKS105 is that the updated random number value to be updated matches the random number initial value, step AKS107 can store the initial value random number value read in step AKS106 as the current random number value.

Following step AKS107, the count value of the initial value random number counter read out in step AKS106 is stored in the random number initial value data buffer pointed to by the initial value pointer (step AKS108), and then the initial value change random number update process P_RANCP ends. Since the stored value of the initial value pointer indicates the address of the random number initial value data buffer corresponding to the random number value to be updated, the count value of the initial value random number counter can be stored as a new random number initial value in step AKS108. Therefore, if the update target random number value after update matches the random number initial value as determined in step AKS105, the initial value random number value is stored as the current random number value in step AKS107, and the initial value random number value read out in step AKS106 can be stored as a new random number initial value in step AKS108. In this way, the uncertainty of the random number value is increased by setting a new random number initial value, and by storing it as the current random number value as well, an increase in data volume is prevented, enabling appropriate random number value updating.

The random number update process P_RANDOM shown in FIG. 21-12 executes the initial value change random number update process P_RANCP in step AKS64 after setting the random number value to be updated, the maximum random number value, and the initial random number value for the random number MR1-2 for the winning symbol in steps AKS61 to AKS63. The initial value change random number update process P_RANCP makes it possible to update the random number value to be updated and to change the initial random number value based on the settings for the random number value to be updated, the maximum random number value, and the initial random number value. The initial value change random number update process P_RANCP in step AKS64 makes it possible to update the random number MR1-2 for the winning symbol that has been set as the random number value to be updated in step AKS61 using the maximum random number set in step AKS62 and the initial random number value set in step AKS63. Additionally, the initial value change random number update process P_RANCP in step AKS64 enables the random number initial value to be changed for the random number MR1-2 for the winning symbol that has been set as the random number to be updated in step AKS61, if that value matches the random number initial value set in step AKS63. In this way, appropriate random number values can be updated by updating the set random number to be updated, etc.

In the random number update process P_RANDOM, after setting the random number value to be updated, the maximum random number value, and the initial random number value for the random number MR2-1 for the normal symbol per symbol in steps AKS65 to AKS67, the initial value change random number update process P_RANCP in step AKS68 is executed. The initial value change random number update process P_RANCP in step AKS68 enables the update of the random number MR2-1 for the normal symbol per symbol, which has been set as the random number value to be updated in step AKS65, using the maximum random number value set in step AKS66 and the initial random number value set in step AKS67. In addition, the initial value change random number update process P_RANCP in step AKS68 enables the change of the initial random number value for the random number MR2-1 for the normal symbol per symbol, which has been set as the random number value to be updated in step AKS65, when the value matches the initial random number value set in step AKS67. In this way, by updating the set random number value to be updated, it becomes possible to update the random number appropriately. Also, by updating the set random number value to be updated or changing the initial random number value, it becomes possible to update the random number appropriately.

The random number update process P_RANDOM can update the random number MR1-2 for the winning symbol used when determining the display result of the special symbol by a first update process consisting of steps AKS61 to AKS64, and can update the random number MR2-1 for the normal winning symbol used when determining the display result of the normal symbol by a second update process consisting of steps AKS65 to AKS68. Then, the random number MR1-2 for the winning symbol is updated as the first random number value by steps AKS61 to AKS64, and then the random number MR2-1 for the normal winning symbol is updated as the second random number value by steps AKS65 to AKS68. The confirmed special symbol that results in the display of the special symbol corresponds to the maximum number of times the big prize opening is opened in the big prize game state. In addition, the determined special pattern, which is the display result of the special pattern, may correspond to whether or not the game is controlled to a high probability state after the end of the jackpot game state, or the maximum number of variable display times that can be executed in the time-saving state after the end of the jackpot game state. In contrast, the determined normal pattern, which is the display result of the normal pattern, corresponds to the opening time and number of openings of the second large prize opening. Therefore, the display result of the special pattern attracts more attention from the player than the display result of the normal pattern. By updating the random number MR1-2 as the first random number value and then updating the random number MR2-1 as the second random number value by the random number update process P_RANDOM, which is a specific update process, the first random number value used to determine the display result that attracts the player's attention is updated before the second random number value, thereby suppressing the occurrence of malfunctions and enabling appropriate random number updates.

In the random number update process P_RANDOM, steps AKS61 to AKS64 can update the random number MR1-2 that becomes the first random number value, and steps AKS65 to AKS68 can update the random number MR2-1 that becomes the second random number value. Then, the initial value change random number update process P_RANCP of step AKS64 can be called and executed in response to the random number MR1-2 that becomes the first random number value, and the initial value change random number update process P_RANCP of step AKS68 can be called and executed in response to the random number MR2-1 that becomes the second random number value. In this way, the random number update process P_RANDOM, which is a specific update process, updates the random number MR1-2 as the first random number value and the random number MR2-1 as the second random number value, making their initial values changeable, by calling the initial value change random number update process P_RANCP, which is a common update process in response to the first random number value and the second random number value. The initial value change random number update process P_RANCP, which serves as a common update process, prevents an increase in program capacity and enables stable updates of the first random number value and the second random number value, thereby enabling appropriate updates of the random number values.

In the random number update process P_RANDOM, steps AKS61 to AKS64 for making the random number MR1-2, which becomes the first random number value, updatable constitute the first update process, and steps AKS65 to AKS68 for making the random number MR2-1, which becomes the second random number value, updatable constitute the second update process. The first update process can be executed by calling the initial value change random number update process P_RANCP in step AKS64, and the second update process can be executed by calling the initial value change random number update process P_RANCP in step AKS68. In this way, the random number update process P_RANDOM updates the random number MR1-2 as the first random number value and the random number MR2-1 as the second random number value, and makes their initial values changeable, by calling the initial value change random number update process P_RANCP as a common update process in the first update process and the second update process. The initial value change random number update process P_RANCP, which serves as a common update process, prevents an increase in program capacity and enables stable updates of the first and second random number values, thereby enabling appropriate updates of the random number values.

In the random number update process P_RANDOM, steps AKS61 to AKS64, which enable updating of the random number MR1-2, which will become the first random number value, constitute the first update process, and steps AKS65 to AKS68, which enable updating of the random number MR2-1, which will become the second random number value, constitute the second update process. Then, in the first and second update processes, the HL register, B register, and DE register of CPU 103, which are common internal storage means, are used to enable updating of the random number MR1-2 as the first random number value and the random number MR2-1 as the second random number value. In this way, the first random number value and the second random number value can be stably updated using the common internal storage means, making it possible to update the random number values appropriately.

In the random number update process P_RANDOM, before the initial value change random number update process P_RANCP is executed by step AKS64, reference information such as the winning symbol random number counter address, the winning symbol random number maximum judgment value, and the winning symbol random number initial value data buffer address are stored in the HL register, B register, and DE register of CPU 103, which is the internal storage means, by steps AKS61 to AKS63. Also, in the random number update process P_RANDOM, before the initial value change random number update process P_RANDCP is executed by step AKS68, reference information such as the normal symbol winning symbol random number counter address, the normal symbol winning symbol random number maximum judgment value, and the normal symbol winning symbol random number initial value data buffer address are stored in the HL register, B register, and DE register of CPU 103, which is the internal storage means, by steps AKS65 to AKS67. The instruction used to update the random number MR1-2 to become the first random number value by step AKS61 and the instruction used to update the random number MR2-1 to become the second random number value by step AKS65 are common instructions in that they set the HL register of the CPU 103, and since the random number counter address for the winning symbol is set by step AKS61 but the random number counter address for the normal winning symbol is set by step AKS65, different reference information can be set. The instruction used to update the random number MR1-2 to become the first random number value by step AKS62 and the instruction used to update the random number MR2-1 to become the second random number value by step AKS66 are common instructions in that they set the B register of the CPU 103, and since the random number maximum value corresponding to the winning symbol random number maximum judgment value is set by step AKS62 but the random number maximum value corresponding to the normal winning symbol random number maximum judgment value is set by step AKS66, different reference information can be set. The instruction used to update the random number MR1-2 to become the first random number value by step AKS63 and the instruction used to update the random number MR2-1 to become the second random number value by step AKS67 are common instructions in that they set the DE register of the CPU 103, and since the random number initial value data buffer address for the winning symbol is set by step AKS63, but the random number initial value data buffer address for the normal winning symbol is set by step AKS67, different reference destination information can be set. In these steps AKS61 to AKS63 and steps AKS65 to AKS67, different reference destination information can be set using a common instruction such as an LD instruction or an LDQ instruction, which are transfer instructions for setting the internal register of the CPU 103. Then, in steps AKS64 and AKS68, the initial value change random number update process P_RANCP is called and executed by a common subroutine call instruction. In this way, in the random number update process P_RANDOM, which is a specific update process, the instruction used to update the random number MR1-2, which becomes the first random number value, and the instruction used to update the random number MR2-1, which becomes the second random number value, are common. By making it possible to update the random number MR1-2 as the first random number value and the random number MR2-1 as the second random number value using a common instruction, it becomes possible to stably update the first random number value and the second random number value, and to update the random number values appropriately.

The random number update process P_RANDOM enables the random number MR1-2, which becomes the first random number value, to be updated by steps AKS61 to AKS64, which is the first update process, and enables the random number MR2-1, which becomes the second random number value, to be updated by steps AKS65 to AKS68, which is the second update process. Then, the initial value change random number update process P_RANCP can be called and executed by steps AKS64 and AKS68. The initial value change random number update process P_RANCP shown in FIG. 21-14 executes a single compare and add instruction first, so that the compare and add instruction can be executed first in both cases of updating the random number MR1-2 as the first random number value and updating the random number MR2-1 as the second random number value. By executing such a compare and add instruction first, it is possible to suppress the occurrence of malfunctions in the first random number value and the second random number value, and to update the random number value appropriately.

When the initial value change random number update process P_RANCP is executed in step AKS64 of the random number update process P_RANDOM, it can update the random number MR1-2 for the winning symbol, and can change the random number initial value corresponding to the random number MR1-2 for the winning symbol by using the random number MR1-3 that becomes the initial value for the winning symbol. Also, when the initial value change random number update process P_RANCP is executed in step AKS68 of the random number update process P_RANDOM, it can update the random number MR2-1 for the winning symbol for the normal symbol, and can change the random number initial value corresponding to the random number MR2-1 for the winning symbol for the normal symbol by using the random number MR2-2 that becomes the initial value for the winning symbol for the normal symbol. Therefore, the random number MR1-3, which is the initial value for the winning symbol, is a first initial value random number used when changing the random number initial value in response to the case where the random number value to be updated is the random number MR1-2 for the winning symbol, which is the first random number value, by executing the initial value change random number update process P_RANCP in step AKS64 of the random number update process P_RANDOM. The random number MR2-2, which is the initial value for the winning symbol for the normal symbol, is a second initial value random number used when changing the random number initial value in response to the case where the random number value to be updated is the random number MR2-1 for the winning symbol for the normal symbol, which is the second random number value, by executing the initial value change random number update process P_RANCP in step AKS68 of the random number update process P_RANDOM.

Figure 21-15 is a flowchart showing an example of the random number update process P_TFINIT for determining initial values. The random number update process P_TFINIT for determining initial values is included in the process that can be called from the main process P_MAIN for game control shown in Figure 15, and can be executed in step S9 of the loop process that is repeated until a timer interrupt occurs after step S7. The random number update process P_TFINIT for determining initial values is also included in the process that can be called from the timer interrupt process P_PCT for game control shown in Figure 16, and can be executed in step AKS57 in response to the occurrence of a periodic timer interrupt due to the passage of a predetermined time, for example, 4 ms. Therefore, the random number update process P_TFINIT for determining initial values is included in a first process that can be executed in response to a timer interrupt due to the passage of a predetermined time, and a second process that can be executed repeatedly until the first process is executed. The initial value determination random number update process P_TFINIT can be called and executed in the game control timer interrupt process P_PCT that controls the progress of the game, and can be called and executed by step S9 included in the standby process as a repeated loop process after startup processes such as the power supply start response process P_POWER_ON in step S1 in the game control main process P_MAIN that is executed based on the start of power supply in the pachinko game machine 1. In this way, the initial value determination random number update process P_IFINIT is included in processes that can be executed in response to periodic timer interrupts as an initial value random number update process, and is also included in processes that can be repeatedly executed irregularly. This makes the update period and update speed of the initial value random number variable indefinite, increasing the uncertainty of the initial value random number variable and enabling appropriate random number value update.

When the CPU 103 executes the initial value determination random number update process P_TINIT, it sets the initial value random number counter address for the winning symbol by a transfer command for setting a pointer (step AKS81). The initial value random number counter address for the winning symbol is the address F051 [H] assigned to the initial value random number counter for the winning symbol in the configuration example AKB11 of the random number data area for the winning symbol shown in FIG. 21-13 (A). When the pointer is set in this way, the count value of the initial value random number counter for the winning symbol can be updated within the update range of "0" to "199" by a comparison and addition command (step AKS82). This comparison and addition command can be executed by a single ICPLD command, which is the third special transfer command, with the stored data at the address pointed to by the pointer as the update target value and the immediate value specified by the operand as the comparison and judgment value. The stored value of the pointer indicates the address of the random number counter in which the numerical data corresponding to the update target initial value random number value is stored. The immediate value specified by the operand indicates the maximum random number for initial values that is set corresponding to the random number for initial values to be updated. If the count value of the random number counter indicating the random number for initial values to be updated is less than the maximum random number for initial values, the count value of the random number counter is updated to increment by 1, thereby incrementing the random number for initial values to be updated by 1. On the other hand, if the count value of the random number counter indicating the random number for initial values to be updated is equal to or greater than the value stored in the maximum random number for initial values register, the random number counter is cleared to initialize the count value to "0", thereby changing the random number for initial values to be updated to the minimum random number value. Therefore, the comparison and addition instruction of step AKS82 is a single instruction that includes: setting the random number MR1-3, which is the initial value for the winning symbol, to the random number value for the initial value to be updated; comparing the random number value for the initial value to be updated to the maximum random number value for the initial value; incrementing the random number value for the initial value to be updated by 1 if the result of the comparison is less than the maximum random number value for the initial value; and changing the random number value for the initial value to be updated to the minimum random number value if the result of the comparison is equal to or greater than the maximum random number value for the initial value. Note that the comparison and addition instruction is not limited to the ICPLD instruction in which the address of the stored data indicating the update target value is specified by a pointer, but may be, for example, an ICPLDQ instruction in which the upper address is set using the Q register and the lower address is set using the immediate value specified by the first operand of the comparison and addition instruction. In this case, the immediate value specified by the second operand of the comparison and addition instruction may be set to the comparison judgment value. By updating the random number value for the initial value to be updated using such a comparison and addition instruction, the occurrence of malfunctions is suppressed, and appropriate random number updating is possible.

After step AKS82, the address of the initial value random number counter for the normal symbol is set by a transfer command for setting the pointer (step AKS83). The address of the initial value random number counter for the normal symbol is the address F054 [H] assigned to the initial value random number counter for the normal symbol in the configuration example AKB11 of the random number data area for the winning symbol shown in FIG. 21-13 (A). When the pointer is set in this way, the count value of the initial value random number counter for the normal symbol is made updatable within the update range of "1" to "198" by a comparison and addition command (step AKS84), and the initial value determination random number update process P_TFINIT is completed. The comparison and addition command of step AKS84 may be the same as the comparison and addition command of step AKS82. However, in the comparison and addition command of step AKS84, the random number MR2-2, which is the initial value for the normal symbol, is set to the random number value for the initial value to be updated, and the immediate value specified by the operand indicating the maximum random number value for the initial value is set to a value different from that of the comparison and addition command of step AKS82. Therefore, the comparison and addition command of step AKS84 is a single command that includes setting the random number MR2-2, which is the initial value for the normal symbol, to the random number value for the initial value to be updated, comparing the random number value for the initial value to the maximum random number value for the initial value, adding 1 to the random number value for the initial value to be updated if the result of the comparison is less than the maximum random number value for the initial value, and changing the random number value for the initial value to the minimum random number value if the result of the comparison is equal to or greater than the maximum random number value for the initial value. By updating the random number value for the initial value to be updated using such a comparison and addition command, the occurrence of malfunctions can be suppressed, and appropriate random number value updates can be made.

The random number update process for determining initial values P_TFINIT updates the random number MR1-3 that is the initial value for the winning symbol in steps AKS81 and AKS82 as an update of the random number value for the first initial value. At the same time, the random number update process for determining initial values P_TFINIT updates the random number MR2-2 that is the initial value for the winning symbol in steps AKS83 and AKS84 as an update of the random number value for the second initial value. The random number MR1-3 that is the initial value for the winning symbol is the first random number value used when changing the random number initial value when the random number value to be updated is the random number MR1-2 for the winning symbol, which is the first random number value. The random number MR2-2 that is the initial value for the winning symbol in the normal symbol is the second random number value used when changing the random number initial value when the random number value to be updated is the random number MR2-1 for the winning symbol in the normal symbol, which is the second random number value. Steps AKS81 and AKS82 of the random number update process P_TFINIT for determining initial values constitute a first initial value update process capable of updating the random number value for the first initial value. Steps AKS83 and AKS84 of the random number update process P_TFINIT for determining initial values constitute a second initial value update process capable of updating the random number value for the second initial value. By updating the random number values for the first and second initial values in this way, it becomes possible to appropriately update the random number values so as to reliably increase the uncertainty of the first and second random number values.

In addition, the random number update process P_TFINIT for initial value determination updates the random number MR1-3, which is the initial value for the winning symbol, as the first random number value for the initial value in steps AKS81 and AKS82, and then updates the random number MR2-2, which is the initial value for the winning symbol for the normal symbol, as the second random number value for the initial value in steps AKS83 and AKS84. Therefore, the random number update process P_TFINIT for initial value determination updates the random number MR1-3, which is the initial value for the winning symbol, which is the first random number value for the initial value, in steps AKS81 and AKS82, which are the first initial value update process, and then updates the random number MR2-1, which is the initial value for the winning symbol for the normal symbol, which is the second random number value for the initial value, in steps AKS83 and AKS84, which are the second initial value update process.

Figure 21-16 is a flow chart showing an example of the start port switch passing process P_TZU_ON. The start port switch passing process P_TZU_ON is included in the processes that can be called from the special pattern process process P_TPROC shown in Figure 17, and can be executed in step S104 if the first start winning corresponding flag is on in step S103, and can be executed in step S108 if the second start winning corresponding flag is on in step S107. When the CPU 103 executes the start port switch passing process P_TZU_ON, it sets the start port winning memory counter address by a transfer command for setting a pointer (step AKS201). The start port winning memory counter address is the address of the first start port winning memory counter or the second start port winning memory counter provided in the game work area of the RAM 102. In step AKS201, a different address in the game work area can be specified in accordance with the first start port winning table or the second start port winning table set by the special symbol process P_TPROC. For example, the upper address F0[H] of the game work area, which is the work area, is set to the upper byte of the pointer by a transfer command, and the lower address of the start port winning memory counter stored in the first start port winning table or the second start port winning table pointed to by the table pointer is set to the lower byte of the pointer by a transfer command. As a result, the value indicating the address of the first start port winning memory counter or the second start port winning memory counter is stored in the internal register of the CPU 103, which becomes the pointer. Next, the start port winning memory counter is loaded by a transfer command to read the stored data at the address pointed to by the pointer (step AKS202).

After step AKS202, it is determined whether the count value of the start port winning memory counter is equal to or greater than the counter maximum value (step AKS203). For example, a comparison return command is used to compare the value loaded in step AKS202 with a counter maximum value such as "4". If the value is equal to or greater than the counter maximum value (step AKS203; Yes), the start port switch passing process P_TZU_ON ends and returns to the special symbol process process P_TPROC. On the other hand, if the value is less than the counter maximum value (step AKS203; No), the count value of the start port winning memory counter is updated to add 1 (step AKS204). In this case, an arithmetic and logic command that increments the stored data at the address pointed to by the pointer makes it possible to update the count value of the first start port winning memory counter or the second start port winning memory counter by adding 1.

After step AKS204, the special symbol determination buffer address is set as the transfer destination (step AKS205). The special symbol determination buffer address is the address of the first special symbol determination buffer contained in the first special symbol reservation buffer provided in the game work area of RAM 102, or the address of the second special symbol determination buffer contained in the second special symbol reservation buffer. In step AKS205, different addresses in the game work area can be specified in accordance with the first start port winning table or the second start port winning table set by the special symbol process processing P_TPROC and the count value of the first start port winning counter or the second start port winning counter loaded in step AKS202.

The first special symbol reserved buffer is secured as a plurality of storage areas, such as five storage areas corresponding to the buffer numbers "0" to "4", corresponding to the case where the variable display of the first special symbol is being executed and the number of first reserved memories that have not yet been executed, by the first reserved memory buffer, which is composed of a first special symbol determination buffer, a first winning symbol buffer, a first variation pattern type selection buffer, a first variation pattern buffer, and a first miss performance selection buffer. The second special symbol reserved buffer is secured as a plurality of storage areas, such as five storage areas corresponding to the buffer numbers "0" to "4", corresponding to the case where the variable display of the second special symbol is being executed and the number of second reserved memories that have not yet been executed, by the second reserved memory buffer, which is composed of a second special symbol determination buffer, a second winning symbol buffer, a second variation pattern type selection buffer, a second variation pattern buffer, and a second miss performance selection buffer.

In step AKS205, a value corresponding to the buffer size of the first reserved memory buffer or the second reserved memory buffer is multiplied by the count value of the start port winning counter, and the multiplied value is added to the lower address of the first reserved memory buffer or the second reserved memory buffer with buffer number "1". By setting this added value to the transfer destination pointer, the special pattern determination buffer address can be set as the transfer destination.

Following step AKS205, the RL0 hard latch random number register address is set (step AKS206). The RL0 hard latch random number register address is the address of the RL0 hard latch random number register provided in the function control register area. For example, the upper address FF[H] of the function control register area is set to the upper byte of the pointer by a transfer command, and the lower address of the RL0 hard latch random number register stored in the first start port winning table or the second start port winning table pointed to by the table pointer is set to the lower byte of the pointer by a transfer command. The lower address of the RL0 hard latch random number register with buffer number "0" is stored in the first start port winning table. The lower address of the RL0 hard latch random number register with buffer number "1" is stored in the second start port winning table. As a result, the address of the RL0 hard latch random number register, which differs between the first start winning and the second start winning, is stored in the internal register of the CPU 103, which serves as the pointer.

Following step AKS206, the RL0 hard latch random number register is loaded by a transfer command to read the stored data at the address pointed to by the pointer (step AK207). The value thus obtained from the RL0 hard latch random number register is stored in the special symbol determination random number buffer by a transfer command to write it to a memory area at a specified address in the game work area of RAM 102 (step AKS208). In this way, by storing the numerical data obtained from the RL0 hard latch random number register in the special symbol determination random number buffer, numerical data indicating the value of the special symbol determination random number MR1-1 is extracted, and the value of the random number MR1-1 can be stored in the special symbol determination random number buffer.

After step AKS208, the RL2 soft latch random number register is loaded by a transfer command to read stored data from a memory area at a specified address in the function control register area (step AKS209). The value stored in the RL2 soft latch random number register obtained at this time is stored in the random number buffer for selecting a losing performance by a transfer command to write it to a memory area at a specified address in the game work area of RAM 102 (step AKS210). In this way, by storing the numerical data obtained from the RL2 soft latch random number register in the random number buffer for selecting a losing performance, numerical data indicating the value of the random number MR3-2 for selecting a losing performance is extracted, and the value of the random number MR3-2 can be stored in the random number buffer for selecting a losing performance.

After step AKS210, the RS1 soft latch random number register is loaded by a transfer command to read the stored data from the memory area of the specified address in the function control register area (step AKS211). The value stored in the RS1 soft latch random number register obtained at this time is stored in the random number buffer for selecting the fluctuation pattern type by a transfer command to write it to the memory area of the specified address in the game work area of RAM 102 (step AKS212). In this way, by storing the numerical data obtained from the RS1 soft latch random number register in the random number buffer for selecting the fluctuation pattern type, numerical data indicating the value of the random number MR3-3 for selecting the fluctuation pattern type is extracted, and the value of the random number MR3-3 can be stored in the random number buffer for selecting the fluctuation pattern type.

After step AKS212, the RS2 soft latch random number register is loaded by a transfer command to read stored data from a memory area at a specified address in the function control register area (step AKS213). The value stored in the RS2 soft latch random number register obtained at this time is stored in the random number buffer for fluctuation patterns by a transfer command to write it to a memory area at a specified address in the game work area of RAM 102 (step AKS214). In this way, by storing the numerical data obtained from the RS2 soft latch random number register in the random number buffer for fluctuation patterns, numerical data indicating the value of random numbers MR3-4 for fluctuation patterns is extracted, and the value of random numbers MR3-4 can be stored in the random number buffer for fluctuation patterns.

Following step AKS214, block transfer is performed from the random number buffer to the special symbol determination buffer (step AKS215). The random number buffer includes a special symbol determination random number buffer in which the value of random number MR1-1 is stored by step AKS208, a loss performance selection random number buffer in which the value of random number MR3-2 is stored by step AKS210, a variation pattern type selection random number buffer in which the value of random number MR3-3 is stored by step AKS212, and a variation pattern random number buffer in which the value of random number MR3-4 is stored by step AKS214. In step AKS215, the address of the special symbol determination random number buffer is set as the transfer source, and a value corresponding to the buffer size of the random number buffer is set as the transfer count. The special symbol determination buffer address to which the transfer is to be made is set by step AKS205. Based on these settings, by executing a block transfer command, the value of each random number temporarily stored in the random number buffer can be stored as new reserved information in the first reserved storage buffer or the second reserved storage buffer.

When the new memory information is stored by step AKS215, it is determined whether the winning performance condition is satisfied (step AKS216). The winning performance condition may be set in advance as a condition that enables the pre-reading performance. For example, when the starting port winning designation value is "2", it is determined that the winning performance condition is satisfied. Also, when the starting port winning designation value is "1", the time-saving function flag is "0" corresponding to the time-saving state not being in, and the special pattern process code is less than 03 [H] corresponding to the time-saving state not being in the small win game state or the big win game state, it is determined that the winning performance condition is satisfied. When it is determined that the winning performance condition is satisfied (step AKS216; Yes), the winning performance process P_GAME_CHK is executed (step AKS217). The winning performance process P_GAME_CHK includes determining whether a special symbol has been hit, selecting performance designation values corresponding to the results of the determination, and enabling the sending of a winning performance command.

When it is determined that the winning performance condition is not satisfied in response to step AKS216 (step AKS216; No), or after the winning performance processing is executed by step AKS217, the performance memory information designation command transmission table address is set by a transfer command for setting a pointer (step AKS218). The performance memory information designation command transmission table address is the address of the performance memory information designation command transmission table stored in the game data area of ROM101. Then, by executing the command set processing P_COM_SET (step AKS219), the first performance memory information designation command or the second performance memory information designation command can be transmitted as the start winning command. The first performance memory information designation command is a performance control command that designates the first reserved memory number indicated by the count value of the first start port winning memory counter. The second performance memory information designation command is a performance control command that designates the second reserved memory number indicated by the count value of the second start port winning memory counter. In this way, the command set process P_COM_SET in step AKS219 allows the performance control command, which becomes the command at the time of the initial winning, to be sent from the main board 11 to the performance control board 12.

After step AKS219, the start port winning buffer memory counter address is set by a transfer command for setting a pointer (step AKS220). The start port winning buffer memory counter address is the address of the start port winning buffer memory counter provided in the game work area of RAM 102. In this way, the count value of the start port winning buffer memory counter whose address has been set is updated to add 1 (step AKS221). In addition, the pointer is updated corresponding to the start port winning buffer memory counter by a composite transfer command for setting a register or pointer (step AKS222). For example, the count value of the start port winning buffer memory counter after the update by step AKS221 is loaded into the internal register of CPU 103, and the stored value of the pointer is updated to add 1, so that a value indicating the top address of the start port winning buffer is stored in the pointer. Furthermore, the count value of the loaded start port winning buffer memory counter is added to the stored value of the pointer, making it possible to identify the storage area of the buffer number to be updated in the start port winning buffer.

After updating the pointer in step AKS222, the start port winning designation value is loaded (step AKS223). The start port winning designation value can be set to "1" indicating a first start winning or "2" indicating a second start winning, corresponding to the first start port winning table or the second start port winning table set by the special pattern process processing P_TPROC. In step AKS223, the start port winning designation value can be obtained by a transfer command to read table data from the first start port winning table or the second start port winning table. The start port winning designation value thus obtained is stored in the start port winning buffer by a transfer command to write it to the memory area of the address pointed to by the pointer (step AKS224), and the start port switch passing processing P_TZU_ON ends.

Figure 21-17 is a diagram for explaining an example of the use of data configuration related to the start port switch passing process P_TZU_ON. In the start port switch passing process P_TZU_ON, various settings and controls are performed using the first start port winning table set in step S102 or the second start port winning table set in step S106 of the special pattern process process P_TPROC shown in Figure 17. For example, the first start port winning memory counter and the second start port winning memory counter, whose count value can be updated in step AKS204, are provided in the special pattern control data area and can store data corresponding to the first reserved memory number and the second reserved memory number. The start port winning buffer memory counter, whose count value can be updated by AKS221, and the start port winning buffer, in which the start port winning designation value is stored by AKS224, are provided in the start port winning buffer area and can store the total number of first start winnings and the second start winnings and the order of occurrence. In addition, the command set process P_COM_SET in step AKS219 uses the first effect memory information specification command transmission table or the second effect memory information specification command transmission table whose address was set in step AKS218.

In this way, the start port switch passing process P_TZU_ON enables control of the special pattern game, which is a variable display of special patterns, using the first start port winning table or the second start port winning table, the first start port winning memory counter or the second start port winning memory counter provided in the special pattern control data area, the start port winning buffer memory counter and the start port winning buffer provided in the start port winning buffer area, and the first performance memory information designation command sending table or the second performance memory information designation command sending table.

Figure 21-17 (A1) shows a configuration example AKT21 of the first start port winning table. The first start port winning table of the configuration example AKT21 is configured to include table data indicating the lower address of the first start port winning memory counter, the lower address of the RL0 hard latch random number register number "0", the lower address of the first special symbol determination buffer number "1", the address of the first performance memory information designation command transmission table, and the start port winning designation value "1".

The first start port winning memory counter is provided in the game work area of the RAM 102, and can store data corresponding to the first reserved memory number. The RL0 hard latch random number register number "0" is an RL0 hard latch random number register with register number "0" provided in the function control register area, and can acquire and store numerical data indicating the value of the random number MR1-1 for special symbol determination that can be generated by the channel RL0 provided in the 16-bit random number circuit 104A by hard latching. The first special symbol determination buffer number "1" is a first special symbol determination buffer included in the first reserved memory buffer with buffer number "1" in the first special symbol reservation buffer. The first performance memory information designation command transmission table is stored in the game data area of the ROM 101, and is used when transmitting the first performance memory information designation command that designates the first reserved memory number. The start port winning designation value "1" is a designation value that identifiably indicates that a first start winning has occurred.

Figure 21-17 (A2) shows a configuration example AKT22 of the second start port winning table. The second start port winning table of the configuration example AKT22 is configured to include table data indicating the lower address of the second start port winning memory counter, the lower address of the RL0 hard latch random number register number "1", the lower address of the second special pattern determination buffer number "1", the address of the second performance memory information designation command transmission table, and the start port winning designation value "2".

The second start port winning memory counter is provided in the game work area of the RAM 102, and can store data corresponding to the second reserved memory number. The RL0 hard latch random number register number "1" is an RL0 hard latch random number register with register number "1" provided in the function control register area, and can acquire and store numerical data indicating the value of the random number MR1-1 for special symbol determination that can be generated by the channel RL0 provided in the 16-bit random number circuit 104A by hard latching. The second special symbol determination buffer number "1" is a second special symbol determination buffer included in the second reserved memory buffer with buffer number "1" in the second special symbol reservation buffer. The second performance memory information designation command transmission table is stored in the game data area of the ROM 101, and is used when transmitting the second performance memory information designation command that designates the second reserved memory number. The start port winning designation value "2" is a designation value that identifiably indicates that a second start winning has occurred.

Figure 21-17 (B1) shows a configuration example AKB21 of a special symbol control data area. The special symbol control data area of configuration example AKB21 can store various data related to control by the special symbol process processing P_TPROC, such as a special symbol game which is a variable display of special symbols, and a small win game state and a big win game state which can be controlled based on the display result. This special symbol control data area includes a special symbol process timer at address F030[H], a win flag at address F032[H], a special symbol process code at address F033[H], a first start hole winning memory counter at address F034[H], a big win symbol determination buffer at address F035[H], a small win symbol determination buffer at address F036[H], a big win hole winning number counter at address F037[H], a big win hole opening number counter at address F038[H], a big win hole opening pattern timer at address F039[H], a big win hole opening pattern table pointer at address F03B[H], a demo display flag at address F03D[H], and a second start hole winning memory counter at address F099[H].

The special symbol process timer can store a time value corresponding to the control time by the special symbol process processing P_TPROC. The special symbol process code can specify the processing selected in the special symbol process processing P_TPROC. The first start port winning memory counter can store a count value corresponding to the first reserved memory number. The big win symbol determination buffer can store data corresponding to the big win symbol designated value. The big win symbol designated value is a designated value corresponding to the confirmed special symbol displayed when the display result in the variable display of the special symbol is "big win", and makes it possible to set the type of big win game state. The small win symbol determination buffer can store data corresponding to the small win symbol designated value. The small win symbol designated value is a designated value corresponding to the confirmed special symbol displayed when the display result in the variable display of the special symbol is "small win", and makes it possible to set the alcoholic beverage in the small win game state. The large prize opening number counter can store a count value corresponding to the number of game balls that have passed through the large prize opening formed by the special variable prize ball device 50. The large prize opening opening number counter can store a count value corresponding to the number of times the large prize opening has been opened in a small win game state or a big win game state. The large prize opening opening pattern timer can store a time value corresponding to the remaining time for controlling the large prize opening to an open state in a small win game state or a big win game state. The large prize opening opening pattern table pointer can specify a storage address of the large prize opening opening pattern table in which the opening time of the large prize opening is set. The demo display flag can store a flag value corresponding to an on state or an off state depending on whether a demonstration display is being executed or not. The second start opening winning memory counter can store a count value corresponding to the second reserved memory number.

Figure 21-17 (B2) shows a configuration example AKB22 of the start port winning buffer area. The start port winning buffer area of the configuration example AKB22 can store various data related to the first start winning and the second start winning that occur when the game ball enters the first start winning port and the second start winning port. This start port winning buffer area includes a start port winning buffer memory counter at address F0BA [H] and start port winning buffer numbers "0" to "8" at addresses F0BB [H] to F0C3 [H].

The start port winning buffer memory counter can store a count value corresponding to the number of valid start port winning designation values stored in the start port winning buffer area. Therefore, the count value of the start port winning buffer memory counter indicates the total number of first start winnings and second start winnings. Start port winning buffer numbers "0" to "8" are start port winning buffers to which buffer numbers "0" to "8" are assigned, and can store start port winning designation values in the order in which the first start winnings and second start winnings occurred. As a result, the stored information in the start port winning buffer indicates the order in which the first start winnings and second start winnings occurred.

Figure 21-17 (C1) shows a configuration example AKT23 of the first performance memory information designation command transmission table. The first performance memory information designation command transmission table of the configuration example AKT23 is configured to include table data indicating the first performance memory information designation command upper byte and the first start port winning memory counter reference designation value. The command set process P_COM_SET of step AKS219 enables the first performance memory information designation command to be transmitted when the first performance memory information designation command transmission table is used. The first performance memory information designation command can set the lower byte corresponding to the count value of the first start port winning memory counter. By transmitting such a first performance memory information designation command, the first reserved memory number can be notified to the performance control board 12.

Figure 21-17 (C2) shows an example configuration AKT24 of the second performance memory information designation command transmission table. The second performance memory information designation command transmission table of the example configuration AKT24 is configured to include table data indicating the second performance memory information designation command upper byte and the second start port winning memory counter reference designation value. The command set process P_COM_SET of step AKS219 enables the second performance memory information designation command to be transmitted when the second performance memory information designation command transmission table is used. The second performance memory information designation command can set the lower byte corresponding to the count value of the second start port winning memory counter. By transmitting such a second performance memory information designation command, the second reserved memory number can be notified to the performance control board 12.

The start port switch passing process P_TZU_ON shown in FIG. 21-16 stores the stored value of the RL2 soft latch random number register loaded in step AKS209 in the random number buffer for selecting a losing performance in step AKS210, thereby making it possible to extract numerical data indicating the value of the random number MR3-2 for selecting a losing performance. The start port switch passing process P_TZU_ON also stores the stored value of the RS1 soft latch random number register loaded in step AKS211 in the random number buffer for selecting a fluctuation pattern type in step AKS212, thereby making it possible to extract numerical data indicating the value of the random number MR3-3 for selecting a fluctuation pattern type. The start port switch passing process P_TZU_ON also stores the stored value of the RS2 soft latch random number register loaded in step AKS213 in the random number buffer for selecting a fluctuation pattern in step AKS214, thereby making it possible to extract numerical data indicating the value of the random number MR3-4 for a fluctuation pattern. Here, if the random number MR3-2 for selecting a losing effect is the first random number, the random number MR3-3 for selecting a variation pattern type is the second random number, and the random number MR3-4 for the variation pattern is the third random number, the start port switch passing process P_TZU_ON is executed in response to the occurrence of a start winning, so the first random number, the second random number, and the third random number can be extracted by the establishment of a common extraction condition, that is, the occurrence of a start winning. The random number MR3-2 for selecting a losing effect is included in the game random numbers that can be updated by the 16-bit random number circuit 104A, and the random number MR3-3 for selecting a variation pattern type and the random number MR3-4 for the variation pattern are included in the game random numbers that can be updated by the 8-bit random number circuit 104B, and the total number of random numbers included in the update range of each is a prime number. The update speed of the random number MR3-2 is 469 times/ms, while the update speed of the random numbers MR3-3 and MR3-4 is 938 times/ms. That is, the update speed of the random numbers MR3-3 and MR3-4 is twice the update speed of the random number MR3-2, which is an integer multiple. The update range of the random number MR3-2 is "0" to "65518", the update range of the random number MR3-3 is "0" to "240", and the update range of the random number MR3-4 is "0" to "250", so the total number of random numbers included in each update range is different, and all the total numbers of random numbers included in the update range are prime numbers. In this way, when the update speed of the second random number value and the update speed of the third random number value are an integer multiple of the update speed of the first random number value, the total number of random numbers included in each update range is different, and all the total numbers of random numbers included in the update range are prime numbers. This makes it possible to prevent synchronization between the first, second, and third random number values, and to update the random number values appropriately.

Figure 21-18 is a flow chart showing an example of the special symbol normal processing P_TNORMAL. The special symbol normal processing P_TNORMAL is included in the processing that can be called from the special symbol process processing P_TPROC shown in Figure 17, and can be executed in step S112 when the special symbol process code loaded in step S110 is 00 [H]. When the special symbol normal processing P_TNORMAL is executed, the CPU 103 sets the start port winning buffer memory counter address by a transfer command for setting a pointer (step AKS241). The start port winning buffer memory counter address is the address of the start port winning buffer memory counter provided in the game work area of the RAM 102. In this way, it is determined whether the count value of the start port winning buffer memory counter whose address has been set is "0" or not (step AKS242). For example, an arithmetic jump instruction that branches processing depending on whether the stored data at the address pointed to by the pointer is 00 [H], which corresponds to "0", makes it possible to execute different processing contents depending on whether the count value of the start port winning buffer storage counter is "0" or not.

If the count value of the start port winning buffer memory counter is not "0" in response to step AKS242 (step AKS242; No), the count value of the start port winning buffer memory counter is updated to subtract 1 (step AKS243). Also, a block transfer for shifting the start port winning buffer is performed (step AKS244). In step AKS244, the transfer destination address is set to the lower address BB [H] of start port winning buffer number "0", the transfer source address is set to the lower address BC [H] of start port winning buffer number "1", and the number of transfers is set to "8", which is the buffer size of the start port winning buffer. After that, by executing a block transfer command, the memory contents in the start port winning buffer can be transferred and shifted one unit at a time to the previous buffer. Then, the memory area of the start port winning buffer number "8" can be initialized by clearing it.

After step AKS244, a transfer command for setting a table pointer is used to set a second special symbol determination control table address (step AKS245). The second special symbol determination control table address is the address of the second special symbol determination control table stored in the game data area of ROM 101. At this time, a start port winning check process is executed to determine whether the start port winning designation value is "1" (step AKS246). For example, in the start port winning check process, if the start port winning designation value is "1", the zero flag is turned on, and if the start port winning designation value is "2", the zero flag is turned off. After such a start port winning check process is executed, a jump command is used to branch the process depending on whether the zero flag is off, making it possible to execute different processing contents depending on whether the start port winning designation value is "1" or "2".

When the starting gate winning designation value is "1" in response to step AKS246 (step AKS246; Yes), the first special symbol determination control table address is set by a transfer command for setting the table pointer (step AKS247). The first special symbol determination control table address is the address of the first special symbol determination control table stored in the game data area of ROM 101. In step AKS247, the value of the table pointer is overwritten by a transfer command for setting the table pointer. In this way, in the special symbol normal processing P_TNORMAL, after the second special symbol determination control table address is set by step AKS245, the starting gate winning designation value corresponds to "1" in step AKS246, and the first special symbol determination control table address is re-set by overwriting in step AKS247. As a result, when the second special symbol determination control table is used more frequently than the first special symbol determination control table, the program capacity required for table setting can be reduced, improving the marketability of the pachinko gaming machine 1. Also, when the second special symbol determination control table is used more frequently than the first special symbol determination control table, the processing using the jump command as a branch command can be simplified, making it easier to check at the design stage, and improving the marketability of the pachinko gaming machine 1.

If the starting port winning designation value is "2" and not "1" in response to step AKS246 (step AKS246; No), after step AKS247, the special pattern determination process P_TDECISION is executed (step AKS248), and the variable pattern setting process P_TPATSET is executed (step AKS249), after which the normal special pattern processing ends.

When the count value of the start port winning buffer storage counter is "0" in response to step AKS242 (step AKS242; Yes), it is determined whether the demo display flag is on (step AKS250). The demo display flag is a flag indicating that a demonstration display is being executed. When the demo display flag is on (step AKS250; Yes), the normal processing of the special symbol is terminated. On the other hand, when the demo display flag is off (step AKS250; No), a transfer command for setting the demo display flag is used to store 01 [H], which is a designated value during demo display, in the demo display flag (step AKS251). This sets the demo display flag to the on state. In addition, a transfer command for setting a pointer is used to set the standby command transmission table address (step AKS252). The standby command transmission table address is the address of the standby command transmission table stored in the game data area of ROM 101. Then, the command set process P_COM_SET is executed (step AKS253), and the normal special pattern processing ends.

Figure 21-19 is a diagram for explaining an example of the use of the data configuration related to the special symbol normal processing P_TNORMAL. In the special symbol normal processing P_TNORMAL, the special symbol determination processing in step AKS248 is executed using the second special symbol determination control table whose address is set in step AKS245 or the first special symbol determination control table whose address is set in step AKS247. Also, in the command set processing P_COM_SET in step AKS253, the standby command transmission table whose address is set in step AKS252 is used. In this way, the special symbol normal processing P_TNORMAL enables control related to the special symbol game, which is a variable display of special symbols, using the first special symbol determination control table or the second special symbol determination control table or the standby command transmission table.

Figure 21-19 (A1) shows a configuration example AKT31 of the first special symbol determination control table. The first special symbol determination control table of the configuration example AKT31 is configured to include table data indicating the address of the first special symbol buffer shift control table, the lower address of the first special symbol determination buffer number "0", the lower address of the first winning symbol buffer number "0", the lower address of the first special symbol buffer, and the address of the work setting table after the first special symbol hit determination. The first special symbol buffer shift control table is stored in the game data area of ROM 101, and is used when shifting the memory contents of the first special symbol reserved buffer. The first special symbol determination buffer number "0" is the first special symbol determination buffer included in the first reserved memory buffer of buffer number "0" in the first special symbol reserved buffer. The first winning symbol buffer number "0" is a first winning symbol buffer included in the first reserved memory buffer of buffer number "0" in the first special symbol reserved buffer. The first special symbol buffer is provided in the game work area of RAM 102, and can store a special symbol pattern designation value corresponding to the confirmed special symbol stopped and displayed in the first special symbol game by the first special symbol display device 4A. The first special symbol winning determination work setting table is stored in the game data area of ROM 101, and is used when initializing data in response to the end of the special symbol determination process P_TDECISION.

Figure 21-19 (A2) shows a configuration example AKT32 of the second special symbol determination control table. The second special symbol determination control table of the configuration example AKT32 is configured to include table data indicating the address of the second special symbol buffer shift control table, the lower address of the second special symbol determination buffer number "0", the lower address of the second winning symbol buffer number "0", the lower address of the second special symbol buffer, and the address of the work setting table after the second special symbol hit determination. The second special symbol buffer shift control table is stored in the game data area of ROM 101, and is used when shifting the memory contents of the second special symbol reserved buffer. The second special symbol determination buffer number "0" is the second special symbol determination buffer included in the second reserved memory buffer of buffer number "0" in the second special symbol reserved buffer. The second winning symbol buffer number "0" is a second winning symbol buffer included in the second reserved memory buffer of buffer number "0" in the second special symbol reserved buffer. The second special symbol buffer is provided in the game work area of RAM 102, and can store a special symbol pattern designation value corresponding to the confirmed special symbol stopped and displayed in the second special symbol game by the second special symbol display device 4B. The second special symbol winning determination work setting table is stored in the game data area of ROM 101, and is used when initializing data in response to the end of the special symbol determination process P_TDECISION.

Figure 21-19 (B) shows a configuration example AKT33 of the standby command transmission table AKT33. The standby command transmission table of the configuration example AKT33 is configured to include table data indicating the number of processes, the second specific number of times designation command upper byte, the specific number of times command buffer reference designation value, the background color designation command upper byte, the special symbol state designation code reference designation value, the customer waiting demo command upper byte, and the customer waiting demo command lower byte. The command set process P_COM_SET of step AKS253 uses the standby command transmission table of the configuration example AKT33 to enable the second specific number of times designation command, the background color designation command, and the customer waiting demo command to be transmitted. The second specific number of times designation command can set a lower byte corresponding to the storage value of the specific number of times command buffer. The background color designation command can set a lower byte corresponding to the special symbol state designation code. The customer waiting demo command can set a lower byte using a fixed value 03 [H].

Figure 21-20 is a flowchart showing an example of the special symbol determination process P_TDECISION. The special symbol determination process P_TDECISION is included in the process that can be called from the special symbol normal process P_TNORMAL shown in Figure 21-18, and can be executed in step AKS248 when variable display of special symbols is started. When the CPU 103 executes the special symbol determination process P_TDECISION, it sets the special symbol buffer shift control table address by a transfer command for setting a pointer (step AKS301). The special symbol buffer shift control table address is the address of the first special symbol buffer shift control table or the second special symbol buffer shift control table stored in the game data area of the ROM 101. In step AKS301, a different address in the game data area can be specified in response to the first special symbol determination control table or the second special symbol determination control table set by the special symbol normal process P_TNORMAL. For example, when the first special symbol determination control table is set, a value indicating the address 13C2[H] of the first special symbol buffer shift control table is set in the pointer. Also, when the second special symbol determination control table is set, a value indicating the address 13C8[H] of the second special symbol buffer shift control table is set in the pointer.

Following step AKS301, the special symbol buffer shift process P_TBUFSHIFT is executed (step AKS302). The special symbol buffer shift process P_TBUFSHIFT in step AKS302 can shift the memory contents of the first special symbol reserve buffer or the second special symbol reserve buffer using the first special symbol buffer shift control table or the second special symbol buffer shift control table whose address is set in step AKS301. For example, by executing a block transfer command after setting the transfer destination address, transfer source address, and transfer count, the memory contents of the first reserved memory buffer of the first special symbol buffer or the second reserved memory buffer of the second special symbol buffer can be transferred and shifted one unit at a time to the previous buffer.

After step AKS302, the special symbol determination buffer with buffer number "0" is loaded (step AKS303). The special symbol determination buffer with buffer number "0" is the first special symbol determination buffer or the second special symbol determination buffer included in the first reserved memory buffer with buffer number "0" in the first special symbol reservation buffer. In step AKS303, the stored value of the special symbol determination buffer can be read from the first special symbol reservation buffer or the second special symbol reservation buffer in accordance with the first special symbol determination control table or the second special symbol determination control table set by the special symbol normal processing P_TNORMAL. For example, the upper address F0[H] of the game work area, which is the working area, is set to the upper byte of the pointer by a transfer command, and the lower address of the first special pattern determination buffer number "0" or the second special pattern determination buffer number "0" stored in the first special pattern determination control table or the second special pattern determination control table pointed to by the table pointer is set to the lower byte of the pointer by a transfer command, and then the stored data of the address in the game work area pointed to by the pointer can be read to read the random number MR1-1 for special pattern determination stored in the special pattern determination buffer with buffer number "0".

After step AKS303, the special symbol jackpot determination process P_TFVR_CHK is executed (step AKS304). The special symbol jackpot determination process P_TFVR_CHK in step AKS304 can determine whether the special symbol display result is a "jackpot" or not by comparing the value of the random number MR1-1 for special symbol determination read out in step AKS303 with the jackpot determination value. The determination of whether the special symbol display result is a "jackpot" or not is also called the special symbol jackpot determination, and is a determination of whether to control the game state to a jackpot game state as an advantageous state. Then, when the special symbol display result is determined to be a "jackpot" in the special symbol jackpot determination, 01 [H], which is the jackpot designated value, is stored in the hit flag. The hit flag is provided in the special symbol control data area of the configuration example AKB21 shown in FIG. 21-17 (B1), and is assigned the address F032 [H]. The special symbol jackpot determination process in step AKS304 can store a jackpot designated value in the hit flag by a transfer command for writing to a memory area of a designated address in the game work area of RAM 102. Note that the hit flag can be set to an initial value of 00 [H] by a clear command executed in response to the start of the special symbol jackpot determination process P_TFVR_CHK in step AKS304.

Along with the special symbol big win determination process P_TFVR_CHK in step AKS304, the special symbol small win determination process P_TLITTLE_CHK is executed (step AKS305). The special symbol small win determination process P_TLITTLE_CHK in step AKS305 can determine whether the special symbol display result is a "small win" by comparing the value of the special symbol determination random number MR1-1 read by loading the special symbol determination buffer in step AKS303 with the small win determination value. The determination of whether the special symbol display result is a "small win" is also called the special symbol small win determination, and is a determination of whether to control to a small win game state as a predetermined state. Then, when the special symbol small win determination determines that the special symbol display result is a "small win", 02 [H], which is the small win designated value, is stored in the win flag. The special symbol small win determination process P_TLITTLE_CHK in step AKS305 can store a small win designated value in the win flag by using a transfer command to write to a memory area at a designated address in the game work area of RAM 102.

In the special pattern small hit judgment process P_TLITTLE_CHK in step AKS305, the small hit judgment value is included in a range different from the big hit judgment value, so after the special pattern big hit judgment judges that the special pattern display result is a "big hit", the special pattern small hit judgment will not judge the special pattern display result to be a "small hit". However, for example, if an error occurs and the special pattern small hit judgment judges that the special pattern display result is a "small hit" after the special pattern big hit judgment judges that the special pattern display result is a "big hit", the small hit designated value will be stored in the hit flag. Therefore, when the judgment of the special pattern big hit judgment judges that the special pattern display result is a "big hit" and the judgment of the special pattern small hit judgment judges that the special pattern display result is a "small hit" conflict, it is possible to prevent fraudulent acts due to a malfunction of the judgment process and to control the game appropriately so that the game is not controlled to a big hit game state that is more advantageous than a small hit game state.

When the special symbol small hit determination process P_TLITTLE_CHK in step S305 is executed, the winning symbol buffer with buffer number "0" is loaded (step AKS306). The winning symbol buffer with buffer number "0" is the first winning symbol buffer included in the first reserved memory buffer with buffer number "0" in the first special symbol buffer, or the second winning symbol buffer included in the second reserved memory buffer with buffer number "0" in the second special symbol buffer. In step AKS306, the stored value of the winning symbol buffer can be read from the first special symbol buffer or the second special symbol buffer in response to the first special symbol determination control table or the second special symbol determination control table whose address is set by the special symbol normal process P_TNORMAL. For example, the upper address F0[H] of the game work area, which is the working area, is set to the upper byte of the buffer pointer by a transfer command, and the lower address of the special pattern determination buffer stored in the first special pattern determination control table or the second special pattern determination control table pointed to by the table pointer is set to the lower byte of the buffer pointer by a transfer command, and then the stored data of the address in the game work area pointed to by the buffer pointer can be read to read the random number MR1-2 for the winning pattern stored in the winning pattern buffer with buffer number "0".

After step AKS306, the special symbol buffer lower address is loaded (step AKS307). The special symbol buffer lower address is the address of the first special symbol buffer or the second special symbol buffer provided in the game work area of RAM 102. In step AKS307, a different lower address can be specified corresponding to the first special symbol determination control table or the second special symbol determination control table whose address is set by the special symbol normal processing P_TNORMAL. For example, when the first special symbol determination control table is set, a value indicating the lower address B8 [H] of the first special symbol buffer is set in the lower byte of the buffer pointer. Also, when the second special symbol determination control table is set, a value indicating the lower address B9 [H] of the second special symbol buffer is set in the lower byte of the buffer pointer. In the upper byte of the buffer pointer, the upper address F0 [H] of the game work area has already been stored by step AKS306.

Following step AKS307, the special symbol information setting process P_TZU_SET is executed (step AKS308). The special symbol information setting process P_TZU_SET makes it possible to determine the confirmed special symbol to be stopped and displayed in the special symbol game, and to store the special symbol pattern designation value corresponding to the determination result in the special symbol buffer. Following the special symbol information setting process P_TZU_SET, the work setting table address after the special symbol hit determination is set (step AKS309). The work setting table address after the special symbol hit determination is the address of the first special symbol hit determination work setting table or the second special symbol hit determination work setting table stored in the game data area of ROM 101. In step AKS309, a different address in the game data area can be specified in response to the first special symbol hit determination control table or the second special symbol hit determination control table whose address is set by the special symbol normal process P_TNORMAL. For example, when the first special symbol determination control table is set, a value indicating the address 12BB [H] of the work setting table after the first special symbol hit determination is set in the pointer. Also, when the second special symbol determination control table is set, a value indicating the address 12C0 [H] of the work setting table after the second special symbol hit determination is set in the pointer.

After step AKS309, the data set process P_DATASET is executed (step AKS310), and the special symbol determination process P_TDECISION is completed. The data set process P_DATASET in step AKS310 uses the work setting table after the special symbol hit determination whose address was set in step AKS309 to clear the special symbol determination buffer and the winning symbol buffer in the first reserved memory buffer or the second reserved memory buffer with buffer number "0" so that they can be initialized. For example, when the work setting table after the first special symbol hit determination is set, the first special symbol determination buffer and the first winning symbol buffer are initialized in the first reserved memory buffer with buffer number "0" included in the first special symbol reserved buffer. In addition, when the work setting table is set after the second special symbol hit determination, the second special symbol determination buffer and the second winning symbol buffer are initialized in the second reserved memory buffer with buffer number "0" included in the second special symbol reserved buffer.

Figure 21-21 is a diagram for explaining an example of the use of data configuration related to the special symbol determination process P_TDECISION. In the special symbol determination process P_TDECISION, the special symbol big win determination process P_TFVR_CHK in step AKS304 and the special symbol small win determination process P_TLITTLE_CHK in step AKS305 use the random number MR1-1 for special symbol determination to determine whether the display result in the variable display of the special symbol is to be a "big win" or a "small win" in response to the start of the variable display. Also, the special symbol information setting process P_TZU_SET in step AKS308 uses the special symbol buffer with the lower address loaded in step AKS307. In this way, the special symbol determination process P_TDECISION enables control of the special symbol game, which is the variable display of special symbols, using the random number MR1-1 for special symbol determination and the special symbol buffer.

Figure 21-21 (A) shows a special symbol determination example AKC01 by the special symbol jackpot determination process P_TFVR_CHK in step AKS304 and the special symbol small jackpot determination process P_TLITTLE_CHK in step AKS305. The special symbol jackpot determination process P_TFVR_CHK in step AKS304 makes it possible to execute a comparison operation with the jackpot determination value to determine whether the value of the random number MR1-1 for special symbol determination is within the jackpot determination range. The jackpot determination value includes a jackpot lower limit determination value and a jackpot upper limit determination value. When the value of the random number MR1-1 is subtracted from the jackpot lower limit determination value, if the carry flag is in the off state, the value of the random number MR1-1 is a value equal to or less than the jackpot lower limit determination value, and if the carry flag is in the on state, the value of the random number MR1-1 is a value exceeding the jackpot lower limit determination value. If the value of the random number MR1-1 is equal to or less than the jackpot lower limit judgment value, it is not within the jackpot judgment range, and the special symbol jackpot judgment process P_TFVR_CHK is terminated to return to the special symbol judgment process P_TDECISION. On the other hand, if the value of the random number MR1-1 is greater than the jackpot lower limit judgment value, the value of the random number MR1-1 is subtracted from the jackpot upper limit judgment value. At this time, if the carry flag is in the off state, the value of the random number MR1-1 is equal to or less than the jackpot upper limit judgment value, and if the carry flag is in the on state, the value of the random number MR1-1 is greater than the jackpot upper limit judgment value. Therefore, if the value of the random number MR1-1 is equal to or less than the jackpot upper limit judgment value, it is within the jackpot judgment range, and 01 [H], which is the jackpot designated value, is stored in the hit flag. If the value of the random number MR1-1 exceeds the jackpot upper limit judgment value, it is not within the jackpot judgment range, and the special pattern jackpot judgment process P_TFVR_CHK is terminated, returning to the special pattern judgment process P_TDECISION.

As an example, the lower limit judgment value for a jackpot may be preset to "60000" and the upper limit judgment value to "60285". As a result, as in the special pattern judgment example AKC01, when the start port winning designation value corresponds to "1" and "2" and the value of the random number MR1-1 is within the jackpot judgment range from "60001" to "60285", the judgment result for the special pattern display result will be "jackpot".

The special symbol small hit determination process P_TLITTLE_CHK in step AKS305 makes it possible to perform a comparison operation with the small hit determination value to determine whether the value of the random number MR1-1 for special symbol determination is within the small hit determination range. The small hit determination value includes a small hit lower limit determination value and a small hit upper limit determination value. When the value of the random number MR1-1 is subtracted from the small hit lower limit determination value, if the carry flag is in the off state, the value of the random number MR1-1 is a value below the small hit lower limit determination value, and if the carry flag is in the on state, the value of the random number MR1-1 is a value above the small hit lower limit determination value. If the value of the random number MR1-1 is a value below the small hit lower limit determination value, it corresponds to not being within the small hit determination range, and by terminating the special symbol small hit determination process P_TLITTLE_CHK, it returns to the special symbol determination process P_TDECISION. On the other hand, if the value of the random number MR1-1 is a value that exceeds the small hit lower limit judgment value, the value of the random number MR1-1 is subtracted from the small hit upper limit judgment value. At this time, if the carry flag is in the off state, the value of the random number MR1-1 is a value that is equal to or less than the small hit upper limit judgment value, and if the carry flag is in the on state, the value of the random number MR1-1 is a value that exceeds the small hit upper limit judgment value. Therefore, if the value of the random number MR1-1 is a value that is equal to or less than the small hit upper limit judgment value, the small hit designated value 02 [H] is stored in the hit flag in response to being within the small hit judgment range. If the value of the random number MR1-1 is a value that exceeds the small hit upper limit judgment value, the special pattern small hit judgment process P_TLITTLE_CHK is terminated in response to not being within the small hit judgment range, and the process returns to the special pattern judgment process P_TDECISION. The small hit upper limit judgment value may be set to a different value in response to the start port winning designated value being "1" and the start port winning designated value being "2".

As an example, the small win lower limit judgment value may be preset to be the same "21000" whether the starting port winning designation value is "1" or "2". The small win upper limit judgment value may be preset to be "21285" when the starting port winning designation value is "1" and "29282" when the starting port winning designation value is "2". As a result, as in the special pattern judgment example AKC01, when the starting port winning designation value corresponds to "1" and the value of the random number MR1-1 is within the small win judgment range from "21001" to "21285", or when the starting port winning designation value corresponds to "2" and the value of the random number MR1-1 is within the small win judgment range from "21001" to "29282", the judgment result for the special pattern display result is "small win".

Figure 21-21 (B) shows a configuration example AKB31 of the special pattern buffer area. The special pattern buffer area of configuration example AKB31 is capable of storing a special pattern pattern designation value corresponding to a confirmed special pattern that is stopped and displayed as a display result of the special pattern. This special pattern buffer area includes a first special pattern buffer at address F0B8 [H] and a second special pattern buffer at address F0B9 [H]. The first special pattern buffer is capable of storing a special pattern pattern designation value when a first special pattern game is executed by the first special pattern display device 4A. The second special pattern buffer is capable of storing a special pattern pattern designation value when a second special pattern game is executed by the second special pattern display device 4B. The special symbol pattern designation value is a designation value of a display pattern corresponding to a determined special symbol that is a display result in the variable display of the special symbol by the first special symbol display device 4A or the second special symbol display device 4B, and includes a big win special symbol pattern designation value and a small win special symbol pattern designation value. The big win special symbol pattern designation value is a designation value of a display pattern corresponding to a determined special symbol displayed by the first special symbol display device 4A or the second special symbol display device 4B when the display result in the variable display of the special symbol is a "big win". The small win special symbol pattern designation value is a designation value of a display pattern corresponding to a determined special symbol displayed by the first special symbol display device 4A or the second special symbol display device 4B when the display result in the variable display of the special symbol is a "small win".

Figure 21-22 is a flowchart showing an example of the special symbol information setting process P_TZU_SET. The special symbol information setting process P_TZU_SET is included in the processes that can be called from the special symbol determination process P_TDECISION shown in Figure 21-20, and can be executed in step AKS308 after the special symbol big win determination process P_TFVR_CHK in step AKS304 and the special symbol small win determination process P_LITTLE_CHK in step AKS305 are executed. When the CPU 103 executes the special symbol information setting process P_TZU_SET, it loads a win flag (step AKS321). The win flag is provided in the special symbol control data area of the configuration example AKB21 shown in Figure 21-17 (B1), and is assigned address F032 [H]. In step AKS321, the hit flag is loaded by a transfer command to read out the stored data at the specified address in the game work area of RAM 102. Then, a calculation jump command that can compare the hit flag with a judgment value corresponding to the jackpot specified value is used to confirm that the hit flag is not the jackpot specified value (step AKS322).

When the winning flag is the jackpot designated value corresponding to step AKS322 (step AKS322; No), the winning symbol buffer with buffer number "0" is set (step AKS323). The winning symbol buffer with buffer number "0" has its stored value loaded by step AKS306 of the special symbol determination process P_TDECISION shown in FIG. 21-20. This loaded content can be set as the processing target by transferring it to a processing register included in the internal register of CPU 103. For the winning symbol buffer with buffer number "0" set in this way, its stored value is stored in the special symbol buffer (step AKS324). The special symbol buffer is the first special symbol buffer or the second special symbol buffer whose lower address has been loaded by step AKS307 of the special symbol determination process P_TDECISION shown in FIG. 21-20. As a result, for the random number MR1-2 for the winning symbol stored in the winning symbol buffer with buffer number "0", the numerical data indicating the random number value is stored in the first special symbol buffer or the second special symbol buffer. Therefore, the numerical data indicating the value of the random number MR1-2 corresponds to the special symbol whose confirmed special symbol is the winning symbol when the special symbol display result is "jackpot", and can be used as a jackpot special symbol pattern designation value.

Following step AKS324, the start port winning buffer with buffer number "0" is loaded to the start port winning designated value (step AKS325). The start port winning buffer with buffer number "0" is provided in the start port winning buffer area of the configuration example AKB22 shown in FIG. 21-17 (B2), and is assigned address F0BB [H]. In step AKS325, the start port winning buffer with buffer number "0" is loaded by a transfer command to read stored data from the memory area of the specified address in the game work area of RAM 102.

After step AKS325, the jackpot information data selection process P_TFVR_ZU is executed (step AKS326). The jackpot information data selection process P_TFVR_ZU can determine the jackpot pattern designation value using the start-up winning designation value loaded by step AKS325 and the storage value of the winning pattern buffer loaded by step AKS306 of the special pattern determination process P_TDECISION shown in FIG. 21-20, and can set the jackpot information setting data corresponding to the determined result. The jackpot information setting data is data indicating the jackpot performance designation value, the fanfare display designation value, and the jackpot end display designation value. The jackpot pattern designation value determined by this jackpot information data selection process P_TFVR_ZU is stored in the jackpot pattern determination buffer (step AKS327). The jackpot symbol determination buffer is provided in the special symbol control data area of the configuration example AKB21 shown in FIG. 21-17 (B1), and is assigned the address F035 [H]. In step AKS327, the jackpot symbol designation value is stored by a transfer command for writing to the memory area of the designated address in the game work area of RAM 102.

After step AKS327, the data for setting the jackpot information is transferred (step AKS328). In this case, in the jackpot information setting table stored in the game data area of ROM 101, the storage address of the data for setting the jackpot information corresponding to the result of determining the jackpot pattern designation value is set in the pointer that designates the transfer source. Also, the address of the performance pattern information buffer provided in the game work area of RAM 102 is set in the buffer pointer that designates the transfer destination. Furthermore, the data size of the data for setting the jackpot information is set in the number of transfers. After that, the data for setting the jackpot information read from the jackpot information setting table is transferred and stored in the performance pattern information buffer, fanfare display buffer, and jackpot end display buffer by a block transfer command. At this time, the variable command designation buffer is set (step AKS329). The variable command designation buffer is provided in the game work area of RAM 102 at the next address of the jackpot end display buffer, and the stored value can be set using the destination address updated by the block transfer command of step AKS327. For example, the variable command designation value 01 [H], which corresponds to the special chart display result being determined to be a "jackpot", can be set as the stored value of the variable command designation buffer. Note that the stored value may be initialized to 00 [H] by clearing the variable command designation buffer in response to the presentation state after the end of the jackpot game state or the stored value of the presentation pattern information buffer.

When the variable command designation buffer is set by step AKS329, the maximum number of times the large prize opening is performed is set (step AKS330). The maximum number of times the large prize opening is performed is set in the game work area of RAM 102 at the next address of the variable command designation buffer, and can store the maximum number of times the large prize opening is controlled to be open in a large prize game state. In step AKS330, the maximum number of times the large prize opening is performed can be determined using the jackpot pattern designation value determined by the jackpot information data selection process P_TFVR_ZU in step AKS326 and the maximum number of times the large prize opening is performed table stored in the game data area of ROM 101. The stored value corresponding to the maximum number of times the large prize opening is determined at this time can be stored in the maximum number of times the large prize opening is performed buffer by a transfer command for writing it to the memory area of the specified address in the game work area of RAM 102.

If the hit flag is not the big hit designated value in response to step AKS322 (step AKS322; Yes), the hit flag and the judgment value corresponding to the small hit designated value are compared by an arithmetic jump instruction to confirm that the hit flag is not the small hit designated value (step AKS331). If the hit flag is the small hit designated value (step AKS331; No), the small hit special symbol pattern designated value is stored in the special symbol buffer (step AKS332). The small hit special symbol pattern designated value may be created by adding a preset small hit symbol addition value to the stored value read from the hit symbol buffer with buffer number "0". In addition, the small hit special symbol pattern designated value may be a value different from the big hit special symbol pattern designated value. The special symbol buffer is the first special symbol buffer or the second special symbol buffer to which the lower address is loaded by step AKS307 of the special symbol determination process P_TDECISION shown in FIG. 21-20. In step AKS332, the small win special symbol pattern designation value created using the small win symbol addition value or the like is stored in the first special symbol buffer or the second special symbol buffer by a transfer command for writing the small win special symbol pattern designation value to the memory area of the designated address in the game work area of RAM 102.

After storing the small win special symbol pattern designation value in step AKS332, the small win symbol designation value is determined (step AKS333). The small win symbol designation value can be determined using the stored value of the winning symbol buffer loaded in step AKS306 of the special symbol determination process P_TDECISION shown in FIG. 21-20 and the first small win state setting table or the second small win state setting table set corresponding to the starting hole winning designation value. The small win symbol designation value determined at this time is stored in the small win symbol determination buffer (step AKS334). The small win symbol determination buffer is provided in the special symbol control data area of the configuration example AKB21 shown in FIG. 21-17 (B1), and is assigned the address F036 [H]. In step AKS334, the small win symbol designation value may be stored by a transfer command for writing to the memory area of the designated address in the game work area of RAM 102.

After step AKS334, a small win effect designation value is determined (step AKS335). The small win effect designation value can be determined using the small win information setting table stored in the game data area of ROM 101 and the small win pattern designation value determined in step AKS333. The small win effect designation value determined at this time is stored in the effect pattern information buffer (step AKS336). In step AKS336, the small win effect designation value determined in step AKS335 is stored in the effect pattern information buffer by a transfer command for writing the small win effect designation value determined in step AKS335 to a memory area of a specified address in the game work area of RAM 102.

When the small hit performance designation value is stored by step AKS336, the small hit information setting data is transferred (step AKS337). The small hit information setting data is data indicating the small hit fanfare display designation value and the small hit ending display designation value. In step AKS337, in the small hit information setting table stored in the game data area of ROM 101, the storage address of the small hit information setting data corresponding to the determination result of the small hit performance designation value is set to the pointer that designates the transfer source. In addition, the address of the small hit fanfare display buffer provided in the game work area of RAM 102 is set to the transfer destination. Furthermore, the data size of the small hit information setting data is set to the transfer count. After that, the small hit information setting data read from the small hit information setting table is transferred and stored to the small hit fanfare display buffer and the small hit ending display buffer by a block transfer command.

When the hit flag is not the small hit designated value in response to step AKS331 (step AKS331; Yes), the miss special symbol pattern designated value is stored in the special symbol buffer (step AKS338). The miss special symbol pattern designated value may be a value different from the big hit special symbol pattern designated value and the small hit special symbol pattern designated value that is prepared in advance. For example, F1 [H] may be set as the miss special symbol pattern designated value. The special symbol buffer is the first special symbol buffer or the second special symbol buffer whose lower address is loaded by step AKS307 of the special symbol determination process P_TDECISION shown in FIG. 21-20. In step AKS338, the miss special symbol pattern designated value prepared in advance may be stored in the first special symbol buffer or the second special symbol buffer by a transfer command for writing the designated address in the memory area of the game work area of RAM 102.

Following step AKS338, the effect pattern information buffer is cleared (step AKS339). The effect pattern information buffer can store effect designation values corresponding to the special chart display result being a "big win" or a "small win". On the other hand, in the case where the special chart display result is a "miss", the effect pattern information buffer is cleared, thereby initializing the stored value to 00 [H]. In addition, the variable command designation buffer is cleared (step AKS340).

After steps AKS330, AKS337, and AKS340, a transfer command for setting a pointer is issued to set the pre-change start command transmission table address (step AKS341). The pre-change start command transmission table address is the address of the pre-change start command transmission table stored in the game data area of ROM 101. Then, the command set process P_COM_SET is executed (step AKS342), and the special symbol information setting process P_TZU_SET ends.

Figure 21-23 is a flow chart showing an example of the jackpot information data selection process P_TFVR_ZU. The jackpot information data selection process P_TFVR_ZU is called in the special symbol information setting process P_TZU_SET shown in Figure 21-22, and can be executed in step AKS326 if the hit flag is the jackpot designated value in step AKS322. When the CPU 103 executes the jackpot information data selection process P_TFVR_ZU, it sets the second jackpot state setting table address by a transfer command for setting a pointer (step AKS401). The second jackpot state setting table address is the address of the second jackpot state setting table stored in the game data area of the ROM 101.

Following step AKS401, it is confirmed that the starting hole winning designation value is not "1" (step AKS402). The starting hole winning designation value is stored in the internal register of the CPU 103 by step AKS325 of the special symbol information setting process P_TZU_SET shown in FIG. 21-22. If this starting hole winning designation value is "1" (step AKS402; No), a transfer command for setting a pointer is issued to set the table address for setting the first jackpot state (step AKS403). The table address for setting the first jackpot state is the address of the table for setting the first jackpot state stored in the game data area of the ROM 101. In step AKS403, the value of the pointer is overwritten by a transfer command for setting a pointer. In this way, in the special symbol information setting process P_TZU_SET, after setting the second jackpot state setting table address in step AKS401, the starting hole winning designation value corresponds to "1" in step AKS402, and the first jackpot state setting table address is reset by overwriting in step AKS403. This makes it possible to reduce the program capacity required for table setting when the second jackpot state setting table is used more frequently than the first jackpot state setting table, thereby improving the marketability of the pachinko gaming machine 1. Also, when the second jackpot state setting table is used more frequently than the first jackpot state setting table, the process using the jump command as a branch command is simplified, making it easier to check at the design stage, and improving the marketability of the pachinko gaming machine 1.

If the starting hole winning designation value is "2" and not "1" in response to step AKS402 (step AKS401; Yes), or after step AKS403, a winning symbol buffer is set (step AKS404). The winning symbol buffer is the winning symbol buffer with buffer number "0" whose stored value was loaded by step AKS306 of the special symbol determination process P_TDECISION shown in FIG. 21-20. This loaded content can be set as the processing target by transferring it to a processing register included in the internal register of CPU 103. The stored value of the winning symbol buffer set in this way is used together with the second jackpot state setting table set by step AKS401 or the first jackpot state setting table set by step AKS403 to execute the second allocation determination value comparison process P_HANTEI2 (step AKS405).

The second allocation judgment value comparison process P_HANTEI2 sets the stored data of the top address of the table as the start number data, the stored data of the next address as the processing count data, and initially sets the start number data to the allocation result data. After that, the process of comparing the numerical data set as the comparison value with the allocation judgment value indicated by the stored data at the next address and subsequent addresses of the processing count data is made executable in increasing order from the top to the bottom of the table addresses until the allocation judgment value exceeds the comparison value. At this time, if the allocation judgment value is equal to or less than the comparison value, the allocation result data is updated to add 1 and the next comparison is performed, and if the allocation judgment value exceeds the comparison value, the second allocation judgment value comparison process P_HANTEI2 ends. If the number of comparisons corresponds to the processing count data but the allocation judgment value does not exceed the comparison value, the process can be repeated from the setting of the start number data and the processing count data using the stored data at the next address and subsequent addresses. In the second allocation judgment value comparison process P_HANTEI2 in step AKS405, the random number MR1-2 for the winning symbol, which is the stored value in the winning symbol buffer, is set as a comparison value, and the jackpot symbol designation value indicated by the allocation result data can be determined as the type of jackpot game state corresponding to the display result by the first special symbol display device 4A or the second special symbol display device 4B, based on the stored data in the first jackpot state setting table or the second jackpot state setting table. The second allocation judgment value comparison process P_HANTEI2 may be executed even when the small jackpot symbol designation value is determined by step AKS333 in the special symbol information setting process P_TZU_SET. In this case, the random number MR1-2 for the winning symbol, which is the stored value in the winning symbol buffer, is set as a comparison value, and the small win designation value indicated by the allocation result data can be determined as the type of small win game state corresponding to the display result by the first special symbol display device 4A or the second special symbol display device 4B, based on the stored data in the first small win state setting table or the second small win state setting table.

When the second allocation judgment value comparison process P_HANTEI2 of step AKS405 is completed, data for setting the jackpot information is determined (step AKS406). The data for setting the jackpot information can be selected from among multiple types of data sets prepared in advance using the jackpot information data designation table selected corresponding to the stored value of the presentation state selection buffer and the jackpot pattern designation value determined by the second allocation judgment value comparison process P_HANTEI2 of step AKS405. The presentation state selection buffer can be set to a stored value corresponding to the presentation state after the end of the jackpot game state.

Figures 21-24 are diagrams for explaining examples of the use of data configurations corresponding to the control of the jackpot game state with respect to the special symbol information setting process P_TZU_SET and the jackpot information data selection process P_TFVR_ZU. When the hit flag is a jackpot designated value in step AKS322 of the special symbol information setting process P_TZU_SET, the jackpot information data selection process P_TFVR_ZU can be executed in step AKS326. In this jackpot information data selection process P_TFVR_ZU, the second allocation judgment value comparison process P_HANTEI2 in step AKS405 is executed using the second jackpot state setting table whose address is set in step AKS401 or the first jackpot state setting table whose address is set in step AKS403, thereby making it possible to determine the jackpot symbol designated value. Then, in step AKS328 of the special symbol information setting process P_TZU_SET, the jackpot information setting data read from the jackpot information setting table corresponding to the jackpot symbol designated value can be transferred to and stored in the performance symbol information buffer, fanfare display buffer, and jackpot end display buffer. The performance symbol information buffer, fanfare display buffer, and jackpot end display buffer are provided in the performance symbol information area, and can store setting data when controlled to a jackpot game state. In addition, in step AKS330 of the special symbol information setting process P_TZU_SET, the maximum number of times the jackpot opening port is opened can be determined corresponding to the jackpot symbol designated value using the maximum number of times the jackpot opening port is opened table.

In this way, the jackpot information data selection process P_TFVR_ZU makes it possible to determine the jackpot pattern designated value using the first jackpot state setting table or the second jackpot state setting table. The special pattern information setting process P_TZU_SET makes it possible to set the storage values of the performance pattern information buffer, fanfare display buffer, and jackpot display buffer provided in the performance pattern information area, and also makes it possible to determine the maximum number of times the large prize opening will be opened corresponding to the jackpot pattern designated value.

Figure 21-24 (A1) shows a configuration example AKT41 of the first jackpot state setting table. In the first jackpot state setting table of the configuration example AKT41, the value 00 [H] corresponding to the jackpot symbol designated value "1" is stored in the first address 1AFD [H], and the value 0A [H] indicating the number of processes is stored in the next address 1AFE [H]. The stored data from address 1AFF [H] onwards indicates allocation judgment values corresponding to the jackpot symbol designated values "1" to "10". When the first jackpot state setting table of the configuration example AKT41 is used, the second allocation judgment value comparison process P_HANTEI2 of step AKS405 can determine one of the jackpot symbol designated values "1" to "10" in response to the random number MR1-2 for the winning symbol indicated by the stored value of the winning symbol buffer. For example, if the random number MR1-2 for the winning symbol is 00[H], which corresponds to the minimum random number value of "0", the jackpot symbol designation value "1" is determined.

Figure 21-24 (A2) shows a configuration example AKT42 of the second jackpot state setting table. In the second jackpot state setting table of the configuration example AKT42, the value 0A [H] corresponding to the jackpot symbol designated value "11" is stored at the first address 1B09 [H], and the value 04 [H] indicating the number of processes is stored at the next address 1B0A [H]. The stored data from address 1B0B [H] onwards indicates the allocation judgment value corresponding to the jackpot symbol designated value "11" to "14". When the second allocation judgment value comparison process P_HANTEI2 of step AKS405 uses the second jackpot state setting table of the configuration example AKT42, it can determine one of the jackpot symbol designated values "11" to "14" in response to the random number MR1-2 for the winning symbol indicated by the stored value of the winning symbol buffer. For example, if the random number MR1-2 for the winning symbol is 00 [H], which corresponds to the minimum random number value of "0", the jackpot symbol designation value "11" is determined.

Figure 21-24 (B) shows a configuration example AKB41 of the effect symbol information area. The effect symbol information area of the configuration example AKB41 can store various data related to game control and effect control, including variable display of effect symbols, in response to control in the big win game state or small win game state. This effect symbol information area includes an effect symbol information buffer at address F056 [H], a fanfare display buffer at address F057 [H], a big win end display buffer at address F058 [H], a variable command designation buffer at address F059 [H], a large prize opening maximum number of times buffer at address F05A [H], a small win fanfare display buffer at address F05F [H], and a small win ending display buffer at address F060 [H].

Figure 21-24 (C) shows an example of determining the maximum number of times the large prize opening is performed AKD01. In step AKS330 of the special symbol information setting process P_TZU_SET, the maximum number of times the large prize opening is performed corresponding to the jackpot symbol designated value determined by the second allocation judgment value comparison process P_HANTEI2 in step AKS405 of the jackpot information data selection process P_TFVR_ZU can be determined. In the example of determining the maximum number of times the large prize opening is performed AKD01, the maximum number of times the large prize opening is performed can be determined to be any of the following, including 02 [H] corresponding to "2", 04 [H] corresponding to "4", 07 [H] corresponding to "7", and 0A [H] corresponding to "10". In addition, the first jackpot state setting table of the configuration example AKT41 is used when the starting hole winning designated value is "1", and makes it possible to determine any of the jackpot symbol designated values "1" to "10". In contrast, the second jackpot state setting table of the configuration example AKT42 is used when the starting hole winning designation value is "2", and allows any one of the jackpot pattern designation values "11" to "14" to be determined. On the other hand, in the example AKD01 of determining the maximum number of times of opening the jackpot, when the jackpot pattern designation value is 00[H] to 09[H] corresponding to "1" to "10", the maximum number of times of opening the jackpot can be determined to either 04[H] corresponding to "4" or 0A[H] corresponding to "10". On the other hand, in the example AKD01 of determining the maximum number of times of opening the jackpot, when the jackpot pattern designation value is 0A[H] to 0D[H] corresponding to "11" to "14", the maximum number of times of opening the jackpot can be determined to either 02[H] corresponding to "2", 04[H] corresponding to "4", 07[H] corresponding to "7", or 0A[H] corresponding to "10".

In this way, in the example AKD01 for determining the maximum number of times the large prize opening is possible, when the jackpot symbol designated value is 00 [H] corresponding to "1", the maximum number of times the large prize opening is possible is 04 [H] corresponding to "4". This corresponds to the smaller of the maximum number of times the large prize opening can be possible, "4" or "10", when the starting prize opening designated value is "1". The jackpot symbol designated value "1" can be determined when the random number MR1-2 for the winning symbol indicated by the stored value in the winning symbol buffer is the minimum random number value of "0". Also, in the example AKD01 for determining the maximum number of times the large prize opening is possible, when the jackpot symbol designated value is 0A [H] corresponding to "11", the maximum number of times the large prize opening is possible is 02 [H] corresponding to "2". This corresponds to the smallest "2" among the maximum number of times the large winning hole can be opened, which can be determined when the starting hole winning designation value is "2", which is "2", "4", "7", and "10". The big winning symbol designation value "11" can be determined when the random number MR1-2 for the winning symbol, which is indicated by the stored value in the winning symbol buffer, is the minimum random number value "0". Therefore, among the special symbol games in which the special symbol display result is a "big win" among the special symbol games in which the special symbol display result is a "big win" among the special symbol games in which the random number MR1-2 for the winning symbol is the minimum random number value "0", the display result is not determined to be more advantageous than when it is other than the minimum random number value. This makes it possible to update the random number value appropriately so as to prevent fraudulent acts due to a malfunction of the first random number value when the random number MR1-2 for the winning symbol is the first random number value.

Figure 21-25 is a diagram for explaining an example of the use of a data configuration corresponding to the control of the small win game state with respect to the special pattern information setting process P_TZU_SET, etc. If the hit flag is a small win designated value in step AKS331 of the special pattern information setting process P_TZU_SET, step AKS333 makes it possible to determine the small win pattern designated value. In this case, if the starting hole winning designated value is "1", the small win pattern designated value is determined using the first small win state setting table. On the other hand, if the starting hole winning designated value is "2", the small win pattern designated value is determined using the second small win state setting table. After that, in step AKS339 of the special pattern information setting process P_TZU_SET, the small win performance designated value determined in step AKS338 is stored in the performance pattern information buffer. Then, in step AKS340 of the special symbol information setting process P_TZU_SET, the small win information setting data read from the small win information setting table corresponding to the small win symbol designation value can be transferred to and stored in the small win fanfare display buffer and the small win ending display buffer. The performance symbol information buffer, small win fanfare display buffer, and small win ending display buffer are provided in the performance symbol information area shown in FIG. 21-24 (B), and can store setting data when controlled to a small win game state. Also, in step S112 of the special symbol process process P_TPROC shown in FIG. 17, when the special symbol process code corresponds to 03 [H] and the small win opening pre-processing P_TLFAN is executed, the opening time and number of openings of the large prize opening can be determined using the small win opening work setting table, etc.

In this way, the special pattern information setting process P_TZU_SET makes it possible to determine the small win pattern designation value using the first small win state setting table or the second small win state setting table. The special pattern information setting process P_TZU_SET can also set the storage values of the performance pattern information buffer, small win fanfare display buffer, and small win ending display buffer provided in the performance pattern information area. Furthermore, the small win pre-opening process P_TLFAN, which is executed in response to control to the small win game state, can determine the opening time and number of times the large prize opening is opened.

Figure 21-25 (A1) shows a configuration example AKT43 of the first small win state setting table. In the first small win state setting table of the configuration example AKT43, the value 00 [H] corresponding to the small win pattern designated value "1" is stored in the first address 1B0B [H], and the value 01 [H] indicating the number of processes is stored in the next address 1B0C [H]. The stored data in address 1B0D [H] indicates the allocation judgment value corresponding to the small win pattern designated value "1". When the first small win state setting table of the configuration example AKT43 is used, step AKS333 of the special pattern information setting process P_TZU_SET can determine only the small win pattern designated value "1" in response to the random number MR1-2 for the winning pattern indicated by the stored value in the winning pattern buffer. Therefore, when the random number MR1-2 for the winning symbol is 00[H], which corresponds to the minimum random number value of "0", the small winning symbol designation value "1" is determined.

Figure 21-25 (A2) shows a configuration example AKT44 of the second small win state setting table. In the second small win state setting table of the configuration example AKT44, the value 01 [H] corresponding to the small win pattern designated value "2" is stored in the first address 1B0E [H], and the value 06 [H] indicating the number of processes is stored in the next address 1B0F [H]. The stored data from address 1B10 [H] onwards indicates the allocation judgment value corresponding to the small win pattern designated values "2" to "7". When the second small win state setting table of the configuration example AKT44 is used, step AKS333 of the special pattern information setting process P_TZU_SET can determine one of the small win pattern designated values "2" to "7" in response to the random number MR1-2 for the winning pattern indicated by the stored value of the winning pattern buffer. For example, if the random number MR1-2 for the winning symbol is 00[H], which corresponds to the minimum random number value of "0", the small winning symbol designation value "2" is determined.

Figure 21-25 (B) shows the example of determining the large prize opening mode AKD02. In the small prize opening pre-processing P_TLFAN, it is possible to determine the large prize opening mode corresponding to the start prize opening designated value. The large prize opening mode can be determined to be one of multiple modes with different opening times and opening counts of the large prize opening. In the example of determining the large prize opening mode AKD02, the opening time of the large prize opening is determined to be 36 [ms] and the number of openings is 15 [times] in response to the start prize opening designated value "1". In the example of determining the large prize opening mode AKD02, the opening time of the large prize opening is determined to be 1600 [ms] and the number of openings is 1 [time] in response to the start prize opening designated value "2".

In this way, the large prize opening mode in the small prize game state can be determined to have different opening times and opening counts of the large prize opening in response to the starting prize opening designated value, regardless of the value of the small prize pattern designated value. The small prize pattern designated value can be determined in response to the random number MR1-2 for the winning pattern indicated by the stored value of the winning pattern buffer. If the starting prize opening designated value is the same value, the large prize opening mode is determined to be common when the random number MR1-2 for the winning pattern is the minimum random number value "0" and when it is other than the minimum random number value. Therefore, among the special pattern games in which the special pattern is variably displayed on the first special pattern display device 4A or the second special pattern display device 4B, when the random number MR1-2 for the winning pattern is the minimum random number value "0" in response to the special pattern game in which the special pattern display result is "small prize", the display result with a higher advantage is not determined than when it is other than the minimum random number value. This makes it possible to update the random number value appropriately to prevent fraudulent activity due to a malfunction of the first random number value when the random number MR1-2 for the winning symbol is set as the first random number value.

Figure 21-26 is a flow chart showing an example of the variable pattern setting process P_TPATSET. The variable pattern setting process P_TPATSET is included in the process that can be called from the normal special symbol process P_TNORMAL shown in Figure 21-18, and can be executed in step AKS249 when variable display of the special symbol is started. When the variable pattern setting process P_TPATSET is executed, the CPU 103 loads the hit flag (step AKS361). The hit flag is provided in the special symbol control data area of the configuration example AKB21 shown in Figure 21-17 (B1), and is assigned the address F032 [H]. In step AKS361, the hit flag may be loaded by a transfer command for reading out the stored data of the specified address in the game work area of the RAM 102. Then, it is confirmed that the hit flag is not the jackpot specified value by an arithmetic jump command that can compare the hit flag with a judgment value corresponding to the jackpot specified value (step AKS362).

When the hit flag is the jackpot designated value corresponding to step AKS362 (step AKS362; No), the jackpot pattern determination buffer is loaded (step AKS363). The jackpot pattern determination buffer is provided in the special pattern control data area of the configuration example AKB21 shown in FIG. 21-17 (B1), and is assigned the address F035 [H]. In step AKS363, the jackpot pattern determination buffer may be loaded by a transfer command for reading out the stored data of the specified address in the game work area of RAM 102. At this time, the state-specific jackpot selection table address is set by a transfer command for setting the pointer (step AKS364). The state-specific jackpot selection table address is the address of the state-specific jackpot selection table stored in ROM 101. After that, the winning time fluctuation pattern type table selection process P_TPATA is executed (step AKS365). The winning fluctuation pattern type table selection process P_TPATA in step AKS365 makes it possible to select a fluctuation pattern type allocation table when the special chart display result corresponds to a "jackpot."

If the hit flag is not the big hit designated value in response to step AKS362 (step AKS362; Yes), the hit flag is compared with the judgment value corresponding to the small hit designated value by an arithmetic jump command to confirm that the hit flag is not the small hit designated value (step AKS366). If the hit flag is the small hit designated value (step AKS366; No), the variable command designation buffer is set (step AKS367). The variable command designation buffer is provided in the performance pattern information area of the configuration example AKB41 shown in FIG. 21-24 (B), and is assigned the address F059 [H]. In step AKS367, 01 [H] may be stored in the variable command designation buffer by a transfer command for writing to the memory area of the designated address in the game work area of RAM 102. In addition, the small hit pattern judgment buffer is loaded (step AKS368). The small win pattern determination buffer is provided in the special pattern control data area of the configuration example AKB21 shown in FIG. 21-17 (B1), and is assigned the address F036 [H]. In step AKS368, the small win pattern determination buffer is loaded by a transfer command for reading the stored data of the specified address in the game work area of RAM 102. At this time, the state-specific small win selection table address is set by a transfer command for setting a pointer (step AKS369). The state-specific small win selection table address is the address of the state-specific small win selection table stored in ROM 101. After that, the win-time fluctuation pattern type table selection process P_TPATA is executed (step AKS370). The win-time fluctuation pattern type table selection process P_TPATA in step AKS370 makes it possible to select a fluctuation pattern type allocation table in response to the special pattern display result being "small win".

If the hit flag is not the small hit designated value in response to step AKS366 (step AKS366; Yes), the miss time fluctuation pattern type table selection process P_TPATH is executed (step AKS371). The miss time fluctuation pattern type table selection process P_TPATH of step AKS371 corresponds to the special chart display result being "miss", and enables the selection of a fluctuation pattern type allocation table.

After steps AKS365, AKS370, and AKS371, the buffer for selecting the type of variation pattern with buffer number "0" is loaded (step AKS372). The buffer for selecting the type of variation pattern with buffer number "0" is the first buffer for selecting the type of variation pattern included in the first reserved memory buffer with buffer number "0" in the first special symbol reserved buffer, or the second buffer for selecting the type of variation pattern included in the second reserved memory buffer with buffer number "0" in the second special symbol reserved buffer. In step AKS372, after setting the address of the buffer for selecting the type of variation pattern with buffer number "0", a start port winning check process is executed, and if the designated value for the start port winning is "1", the address of the buffer for selecting the type of variation pattern with buffer number "0" is set, and then a transfer command for reading the stored data of the set address is issued, so that the random number MR3-3 for selecting the type of variation pattern stored in the buffer for selecting the type of variation pattern with buffer number "0" can be read.

When the random number MR3-3 for selecting a variation pattern type is read out by step AKS372, the variation pattern allocation table selection process P_TPATTBL is executed (step AKS373). The variation pattern allocation table selection process P_TPATTBL of step AKS373 makes it possible to select a variation pattern allocation table using the variation pattern type allocation table selected by step AKS365, AKS370, or AKS371 and the random number MR3-3 for selecting a variation pattern type read out by step AKS372.

After step AKS373, the buffer for the variation pattern with buffer number "0" is loaded (step AKS374). The buffer for the variation pattern with buffer number "0" is the first variation pattern buffer included in the first reserved memory buffer with buffer number "0" in the first special symbol reserved buffer, or the second variation pattern buffer included in the second reserved memory buffer with buffer number "0" in the second special symbol reserved buffer. In step AKS374, after setting the address of the buffer for the second variation pattern with buffer number "0", a start port winning check process is executed, and if the designated value for the start port winning is "1", it is sufficient that the random number MR3-4 for the variation pattern stored in the buffer for the variation pattern with buffer number "0" can be read by a transfer command for reading the stored data of the set address after setting the address of the buffer for the first variation pattern with buffer number "0".

When the random number MR3-4 for the fluctuation pattern is read out by step AKS374, the second allocation judgment value comparison process P_HANTEI2 is executed (step AKS375). The second allocation judgment value comparison process of step AKS375 makes it possible to determine a fluctuation pattern using the fluctuation pattern allocation table selected by step AKS373 and the random number MR3-4 for the fluctuation pattern read out by step AKS374. At this time, the fluctuation pattern designation data corresponding to the determined fluctuation pattern is stored in the performance symbol fluctuation pattern buffer (step AKS376). The performance symbol fluctuation pattern buffer is provided in the game work area of RAM 102, and is capable of storing different fluctuation pattern designation data corresponding to the determined result of the fluctuation pattern.

Following step AKS376, a variable command transmission table is selected (step AKS377). In step AKS377, the variable command transmission table is made selectable using the variable command transmission table selection table and the stored value of the variable command designation buffer. This allows a different variable command transmission table to be selected when the special chart display result is, for example, a "big win" or "small win" and when it is a "miss". The variable command transmission table is configured to include table data indicating the number of processes, the upper byte of the pattern information designation command, the pattern information designation code reference designation value, the upper byte of the performance pattern designation command, the performance pattern designation code reference designation value, the performance pattern variation command, and the variation pattern designation data reference designation value. Then, the command set process P_COM_SET is executed (step AKS378). The command set process P_COM_SET in step AKS378 uses the change command transmission table selected in step AKS377 to enable the transmission of the pattern information designation command, the performance pattern designation command, and the performance pattern change command. By using this command set process P_COM_SET in step AKS378, the performance control command that becomes the change start command can be transmitted from the main board 11 to the performance control board 12.

When the fluctuation start command can be sent by step AKS378, the special symbol fluctuation time is set (step AKS379). In step AKS379, a time data expansion process is executed using the special symbol fluctuation time table and the fluctuation pattern designation data, thereby making it possible to set different special symbol fluctuation times corresponding to the result of the fluctuation pattern determination. Next, a transfer command for setting a pointer is used to set a work table address after the fluctuation pattern is set (step AKS380). The work table address after the fluctuation pattern is set is the address of the work table after the fluctuation pattern is set stored in the game data area of ROM 101. Next, data set process P_DATASET is executed (step AKS381), and the fluctuation pattern setting process P_TPATSET is completed. The data set process P_DATASET in step AKS381 uses the post-variation pattern setting work table whose address was set in step AKS380 to set the special pattern process code to 01 [H], which is the special pattern variation processing designated value, and sets the storage value of the special pattern variation display buffer to 01 [H], which is the special pattern variation display data. In addition, the special pattern display update timer, the buffer for selecting a miss performance with buffer number "0", the buffer for selecting a variation pattern with buffer number "0", and the buffer for the variation pattern with buffer number "0" are cleared to enable initialization. At this time, by referencing different tables depending on whether the start port winning designated value is "1" or "2", it is possible to set or clear different buffers and timers.

Figure 21-27 (A) is a flowchart showing an example of the winning time fluctuation pattern type table selection process P_TPATA. The winning time fluctuation pattern type table selection process P_TPATA is included in the process that can be called from the fluctuation pattern setting process P_TPATSET shown in Figure 21-26, and can be executed in step AKS365 if the winning flag is a jackpot designated value in step AKS362, and can be executed in step AKS370 if the winning flag is a small jackpot designated value in step AKS366. When the CPU 103 executes the winning time fluctuation pattern type table selection process P_TPATA, it loads the presentation state selection buffer (step AKS421). The presentation state selection buffer is provided in the game work area of RAM 102, and a storage value corresponding to the presentation state after the end of the jackpot game state can be set. In step AKS421, it is sufficient that the stored value in the performance state selection buffer can be read by a transfer command to read the stored data at a specified address in the game work area of RAM 102.

Following step AKS421, a fluctuation pattern type selection table is determined (step AKS422). In step AKS422, the fluctuation pattern type selection table can be determined using the state-specific big win selection table or state-specific small win selection table and the stored value of the performance state selection buffer read by step AKS421. The state-specific big win selection table has an address set by step AKS364 when the hit-time fluctuation pattern type table selection process P_TPATA is executed in step AKS365 of the fluctuation pattern setting process P_TPATSET shown in FIG. 21-26. The state-specific small win selection table has an address set by step AKS369 when the hit-time fluctuation pattern type table selection process P_TPATA is executed in step AKS370 of the fluctuation pattern setting process P_TPATSET shown in FIG. The state-specific big win selection table and state-specific small win selection table are configured to include table data that allows different variation pattern type selection tables to be determined in response to the stored value of the performance state selection buffer. Therefore, step AKS422 allows different variation pattern type selection tables to be determined in response to the stored value of the performance state selection buffer when the special chart display result is a "big win" or a "small win".

When the variation pattern type selection table is determined by step AKS422, the winning pattern designation value is set (step AKS423). In step AKS423, the loaded contents from the big win pattern determination buffer or the small win pattern determination buffer may be set as the processing target by transferring them to a processing register included in the internal register of the CPU 103. The big win pattern determination buffer is loaded by step AKS363 when the winning time variation pattern type table selection process P_TPATA is executed in step AKS365 of the variation pattern setting process P_TPATSET shown in FIG. 21-26. The small win pattern determination buffer is loaded by step AKS368 when the winning time variation pattern type table selection process P_TPATA is executed in step AKS370 of the variation pattern setting process P_TPATSET shown in FIG. 21-26. The stored value of the big win pattern determination buffer indicates the big win pattern designation value. The value stored in the small win pattern determination buffer indicates the small win pattern designation value. The winning pattern designation value set in this manner is used together with the variation pattern type selection table determined in step AKS422 to execute the allocation determination value comparison process P_HANTEI (step AKS424).

The allocation judgment value comparison process P_HANTE compares the numerical data set as the comparison value with the allocation judgment value indicated by the table storage data in increasing order from the top to the bottom of the table address, until the allocation judgment value exceeds the comparison value. At this time, if the allocation judgment value is equal to or less than the comparison value, it proceeds to the next comparison, and makes the table storage data readable as specified data corresponding to the allocation judgment value that exceeds the comparison value. In the allocation judgment value comparison process P_HANTEI of step AKS424, the big win pattern designated value or small win pattern designated value is set as the comparison value, and the designated data corresponding to the allocation judgment value that exceeds the comparison value is read out from the stored data of the fluctuation pattern type selection table.

When the allocation judgment value comparison process P_HANTEI of step AKS424 is completed, the fluctuation pattern type allocation table is determined (step AKS425), and the hit-time fluctuation pattern type table selection process P_TPATA is completed. In step AKS425, the specified data read out by the allocation judgment value comparison process P_HANTEI of step AKS424 is added to the top address of the fluctuation pattern type allocation table, and the address of the fluctuation pattern type allocation table to be used is set in the pointer, making it possible to determine the fluctuation pattern type allocation table.

Figure 21-27 (B1) shows an example AKD11 of a variation pattern type allocation table determination in which the special chart display result corresponds to a "jackpot". When the special chart display result is a "jackpot", the second allocation judgment value comparison process P_HANTEI2 can determine one of the values 00 [H] to 0D [H] corresponding to the jackpot symbol designated value "1" to "14". When the winning time variation pattern type table selection process P_TPATA is executed in step AKS365 of the variation pattern setting process P_TPATSET shown in Figure 21-26, it can determine a variation pattern type allocation table in response to the determination result of the jackpot symbol designated value. In the example of determining the fluctuation pattern type allocation table AKD11, it is possible to determine one of the fluctuation pattern type allocation tables AKU01 to AKU03 in response to the value 00 [H] to 0D [H] indicating the jackpot symbol designation value.

Figure 21-27 (B2) shows an example of a variation pattern type allocation table determination AKD12 in which the special chart display result corresponds to a "small win". When the special chart display result is a "small win", in step AKS333 of the special pattern information setting process P_TZU_SET shown in Figure 21-22, it is possible to determine one of the values 00 [H] to 06 [H] corresponding to the small win pattern designation value "1" to "7". When the winning time variation pattern type table selection process P_TPATA is executed in step AKS370 of the variation pattern setting process P_TPATSET shown in Figure 21-26, it is possible to determine a variation pattern type allocation table in response to the determination result of the small win pattern designation value. In the variation pattern type allocation table determination example AKD12, it is possible to determine one of the variation pattern type allocation tables AKU11 and AKU12 in response to the small win pattern designation value 00 [H] to 06 [H].

Figure 21-28 (A) is a flowchart showing an example of the loss-time fluctuation pattern type table selection process P_TPATH. The loss-time fluctuation pattern type table selection process P_TPATH is included in the process that can be called from the fluctuation pattern setting process P_TPATSET shown in Figure 21-26, and can be executed in step AKS371 when the hit flag is not the small hit designated value in step AKS366. When the loss-time fluctuation pattern type table selection process P_TPATH is executed, the CPU 103 sets the state-specific loss selection table address by a transfer command for setting a pointer (step AKS441). The state-specific loss selection table address is the address of the first state-specific loss selection table or the second state-specific loss selection table stored in the game data area of the ROM 101. In step AKS441, different addresses in the game data area can be specified in response to the start-gate winning designated value being "1" and "2". This allows the address of the first state-specific miss selection table to be set when the start port winning designation value is "1", and the address of the second state-specific miss selection table to be set when the start port winning designation value is "2". Then, the presentation state selection buffer is loaded (step AKS442). The presentation state selection buffer is provided in the game work area of RAM 102, and a storage value corresponding to the presentation state after the end of the big win game state can be set.

Following step AKS442, a reservation-based miss performance allocation selection table is determined (step AKS443). In step AKS443, the reservation-based miss performance allocation selection table is determined using the first state-based miss selection table or the second state-based miss selection table whose address is set in step AKS441 and the storage value of the performance state selection buffer loaded in step AKS442. The first state-based miss selection table and the second state-based miss selection table are configured to include table data that allows different reservation-based miss performance allocation selection tables to be determined in response to the storage value of the performance state selection buffer. In addition, the reservation-based miss performance allocation selection table is configured to include table data that allows different miss performance allocation tables to be determined in response to the count value of the start port winning memory counter. Therefore, step AKS443 can determine a different pending miss performance allocation selection table according to the stored value in the performance status selection buffer when the start port winning designation value is "1" or "2."

After step AKS443, the start port winning memory counter is loaded (step AKS444). The start port winning memory counter is the first start port winning memory counter when the start port winning designation value is "1" or the second start port winning memory counter when the start port winning designation value is "2". In step AKS444, the second start port winning memory counter address is set to the memory pointer, and then the start port winning check process is executed. If the start port winning designation value is "1", the first start port winning memory counter address is set to the memory pointer, and then a transfer command for reading the stored data at the address set in the memory pointer makes it possible to obtain the count value of the first start port winning memory counter or the second start port winning memory counter.

After step AKS444, allocation judgment value comparison process P_HANTEI is executed (step AKS445). In allocation judgment value comparison process P_HANTEI in step AKS445, the count value of the first start port winning memory counter or the second start port winning memory counter acquired in step AKS444 is set as a comparison value, and designated data corresponding to the allocation judgment value that exceeds the comparison value is read out based on the stored data of the pending miss performance allocation selection table determined in step AKS443.

When the allocation judgment value comparison process P_HANTEI of step AKS445 is completed, a miss effect allocation table is determined (step AKS446). In step AKS446, the designated data read by the allocation judgment value comparison process P_HANTEI of step AKS445 is added to the top address of the miss effect allocation table, and the address of the miss effect allocation table to be used is set in the pointer, making it possible to determine the miss effect allocation table.

After step AKS446, the failure performance selection buffer with buffer number "0" is loaded (step AKS447). The failure performance selection buffer with buffer number "0" is the first failure performance selection buffer included in the first reserved memory buffer with buffer number "0" in the first special symbol reserved buffer, or the second failure performance selection buffer included in the second reserved memory buffer with buffer number "0" in the second special symbol reserved buffer. In step AKS447, after setting the address of the second failure performance selection buffer with buffer number "0", if the start port winning designation value is "1" by the start port winning check process, it is sufficient that the address of the first failure performance selection buffer with buffer number "0" is set, and then the transfer command for reading the stored data of the set address can read the failure performance selection random number MR3-2 stored in the failure performance selection buffer with buffer number "0".

When the random number MR3-2 for selecting a losing performance is read out by step AKS447, the allocation judgment value comparison process P_HANTEI is executed (step AKS448). The allocation judgment value comparison process P_HANTEI of step AKS448 makes it possible to determine the offset value of the variation pattern type allocation table using the losing performance allocation table determined by step AKS446 and the random number MR3-2 for selecting a losing performance read out by step AKS447. In this case, the random number MR3-2 for selecting a losing performance read out by step AKS447 is set as a comparison value, and the offset value of the variation pattern type allocation table indicated by the designated data corresponding to the allocation judgment value that exceeds the comparison value can be read out by the stored data of the losing performance allocation table determined by step AKS446.

When the allocation judgment value comparison process P_HANTEI of step AKS448 is completed, the fluctuation pattern type allocation table is determined (step AKS449), and the miss-time fluctuation pattern type table selection process P_TPATH is completed. In step AKS449, the offset value indicated by the specified data read by the allocation judgment value comparison process P_HANTEI of step AKS448 is added to the top address of the fluctuation pattern type allocation table, and the address of the fluctuation pattern type allocation table to be used is set in the pointer, making it possible to determine the fluctuation pattern type allocation table.

Figure 21-28 (B1) shows an example AKD21 of a miss effect allocation table determination corresponding to a first special symbol miss. A first special symbol miss is when the start port winning designation value corresponds to "1" and the special symbol display result is "miss" in a special symbol game using the first special symbol by the first special symbol display device 4A. When the start port winning designation value is "1", the count value of the first start port winning memory counter can be obtained in step AKS444 of the miss time variation pattern type table selection process P_TPATH. The count value of the first start port winning memory counter indicates the first reserved memory number. Then, the allocation judgment value comparison process P_HANTEI in step AKS445 reads out the designated data corresponding to the count value of the first start port winning memory counter, and in step AKS446, a miss effect allocation table corresponding to the first reserved memory number can be determined. In the example of determining the miss effect allocation table AKD21, it is possible to determine one of the miss effect allocation tables AKV01 to AKV04 in accordance with the first reserved memory number "0" to "3".

Figure 21-28 (B2) shows an example AKD22 of a miss effect allocation table determination corresponding to a second special symbol miss. A second special symbol miss occurs when the start port winning designation value corresponds to "2" and the special symbol display result is "miss" in a special symbol game using the second special symbol by the second special symbol display device 4B. When the start port winning designation value is "2", the count value of the second start port winning counter can be obtained in step AKS444 of the miss time variation pattern type table selection process P_TPATH. The count value of the second start port winning memory counter indicates the second reserved memory number. Then, the allocation judgment value comparison process P_HANTEI in step AKS445 reads out the designated data corresponding to the count value of the second start port winning memory counter, and in step AKS446, a miss effect allocation table corresponding to the second reserved memory number can be determined. In the example of determining the miss effect allocation table AKD22, only the common miss effect allocation table AKV11 can be determined in correspondence with the second reserved memory counts "0" to "3".

Figure 21-28 (C) shows an example AKD23 of a variation pattern type allocation table determination in the case of the failure performance allocation table AKV01. The failure performance allocation table AKV01 can be determined in the example AKD21 of the failure performance allocation table determination when the first reserved memory number is "0" when the starting port winning designation value is "1". When the starting port winning designation value is "1", in step AKS447 of the failure time variation pattern type table selection process P_TPATH, the random number MR3-2 for selecting a failure performance can be read from the first failure performance selection buffer with buffer number "0". Then, the designation data corresponding to the random number MR3-2 for selecting a failure performance is read by the allocation judgment value comparison process P_HANTEI in step AKS448, and the variation pattern type allocation table can be determined in step AKS449. In the example of determining the variation pattern type allocation table AKD23, it is possible to determine one of the variation pattern type allocation tables AKU21 to AKU25 in response to the random number MR3-2 for selecting a losing performance.

Figure 21-29 is a diagram for explaining an example of the configuration of a fluctuation pattern type allocation table. When the winning fluctuation pattern type table selection process P_TPATA shown in Figure 21-27 (A) is executed in step AKS365 of the fluctuation pattern setting process P_TPATSET shown in Figure 21-26, it can determine one of a plurality of fluctuation pattern type allocation tables, such as one of the fluctuation pattern type allocation tables AKU01 to AKU03 in the fluctuation pattern type allocation table determination example AKD11 shown in Figure 21-27 (B1), in response to the determination result of the jackpot symbol designation value. When the winning time fluctuation pattern type table selection process P_TPATA shown in FIG. 21-27(A) is executed in step AKS370 of the fluctuation pattern setting process P_TPATSET shown in FIG. 21-26, it can be determined to be one of a plurality of fluctuation pattern type allocation tables, such as one of the fluctuation pattern type allocation tables AKU11 and AKU12 in the fluctuation pattern type allocation table determination example AKD12 shown in FIG. 21-27(B2), in response to the determination result of the small winning pattern designation value. Step AKS449 of the losing time fluctuation pattern type table selection process P_TPATH shown in FIG. 21-28(A) can be determined to be one of a plurality of fluctuation pattern type allocation tables, such as one of the fluctuation pattern type allocation tables AKU21 to AKU25 in the fluctuation pattern type allocation table determination example AKD23 shown in FIG. 21-28(C). The fluctuation pattern allocation table selection process P_TPATTBL, which is executed in step AKS373 of the fluctuation pattern setting process P_TPATSET shown in FIG. 21-26, can select a fluctuation pattern type by referencing the fluctuation pattern type allocation table using the random number MR3-3 for selecting the fluctuation pattern type read out in step AKS372, and can select a fluctuation pattern allocation table corresponding to the selection result.

Figure 21-29 (A) shows an example of the configuration of the fluctuation pattern type allocation table AKU01. The fluctuation pattern type allocation table AKU01 is included in a plurality of fluctuation pattern type allocation tables that can be determined in response to the jackpot symbol designated value. The fluctuation pattern type allocation table AKU01 in Figure 21-29 (A) is configured with table data so that it can be determined to be one of the fluctuation pattern types CPA01 to CPA05 in response to the random number MR3-3 for selecting the fluctuation pattern type.

Figure 21-29 (B1) shows an example of the configuration of the fluctuation pattern type allocation table AKU11. The fluctuation pattern type allocation table AKU11 is included in multiple fluctuation pattern type allocation tables that can be determined in response to the small win symbol designated value. The fluctuation pattern type allocation table AKU11 in Figure 21-29 (B1) is configured so that the table data can be determined to only the common fluctuation pattern type CPB01 in response to all of the random numbers MR3-3 for selecting fluctuation pattern types.

Figure 21-29 (B2) shows an example of the configuration of the fluctuation pattern type allocation table AKU12. The fluctuation pattern type allocation table AKU12 is included in multiple fluctuation pattern type allocation tables that can be determined in response to the small win symbol designated value. The fluctuation pattern type allocation table AKU12 in Figure 21-29 (B2) is configured so that the table data can be determined to only the common fluctuation pattern type CPB02 in response to all of the random numbers MR3-3 for selecting fluctuation pattern types.

Figure 21-29 (C1) shows an example of the configuration of the fluctuation pattern type allocation table AKU21. The fluctuation pattern type allocation table AKU21 is included in a plurality of fluctuation pattern type allocation tables that can be determined in response to the random number MR3-2 for selecting a miss performance. The fluctuation pattern type allocation table AKU21 in Figure 21-29 (C1) has table data configured so that it can be determined to be either the fluctuation pattern type CPC01 or CPC02 in response to the random number MR3-3 for selecting the fluctuation pattern type.

Figure 21-29 (C2) shows an example of the configuration of the fluctuation pattern type allocation table AKU22. The fluctuation pattern type allocation table AKU22 is included in multiple fluctuation pattern type allocation tables that can be determined in response to the random number MR3-2 for selecting a miss performance. The fluctuation pattern type allocation table AKU22 in Figure 21-29 (C2) is configured so that the table data can be determined to only the common fluctuation pattern type CPC03 in response to all of the random numbers MR3-3 for selecting fluctuation pattern types.

Figure 21-29 (C3) shows an example of the configuration of the fluctuation pattern type allocation table AKU23. The fluctuation pattern type allocation table AKU23 is included in multiple fluctuation pattern type allocation tables that can be determined in response to the random number MR3-2 for selecting a miss performance. The fluctuation pattern type allocation table AKU23 in Figure 21-29 (C3) is configured so that the table data can be determined to only the common fluctuation pattern type CPC04 in response to all of the random numbers MR3-3 for selecting fluctuation pattern types.

Figure 21-29 (C4) shows an example of the configuration of the fluctuation pattern type allocation table AKU24. The fluctuation pattern type allocation table AKU24 is included in a plurality of fluctuation pattern type allocation tables that can be determined in response to the random number MR3-2 for selecting a miss performance. The fluctuation pattern type allocation table AKU24 in Figure 21-29 (C4) has table data configured so that it can be determined to be one of the fluctuation pattern types CPC05 to CPC07 in response to the random number MR3-3 for selecting the fluctuation pattern type.

Figure 21-29 (C5) shows an example of the configuration of the fluctuation pattern type allocation table AKU25. The fluctuation pattern type allocation table AKU25 is included in multiple fluctuation pattern type allocation tables that can be determined in response to the random number MR3-2 for selecting a miss performance. The fluctuation pattern type allocation table AKU25 in Figure 21-29 (C5) is configured so that the table data can be determined to only the common fluctuation pattern type CPC08 in response to all of the random numbers MR3-3 for selecting fluctuation pattern types.

Figures 21-30 to 21-32 are diagrams for explaining examples of the configuration of a fluctuation pattern allocation table that can be used in accordance with a fluctuation pattern type. In the fluctuation pattern allocation table selection process P_TPATTBL executed in step AKS373 of the fluctuation pattern setting process P_TPATSET shown in Figure 21-26, a fluctuation pattern allocation table is selected in accordance with the result of the selection of the fluctuation pattern type using the random number MR3-3 for selecting a fluctuation pattern type. Thereafter, the second allocation judgment value comparison process P_HANTEI2 in step AKS375 makes it possible to determine a fluctuation pattern by referring to the fluctuation pattern allocation table using the random number MR3-4 for the fluctuation pattern read out in step AKS374.

Figure 21-30 (A1) shows an example of the configuration of a fluctuation pattern allocation table corresponding to the fluctuation pattern type CPA01. When using the fluctuation pattern type allocation table AKU01 that can be determined in response to the jackpot symbol designation value, the fluctuation pattern type CPA01 can be determined at a predetermined ratio corresponding to the random number MR3-3 for selecting the fluctuation pattern type. In the configuration example of Figure 21-30 (A1), the fluctuation pattern allocation table is configured with table data so that it can be determined to any one of the fluctuation patterns PA01 to PA03, PA51, and PA52 in response to the random number MR3-4 for the fluctuation pattern. In this way, the allocation judgment value is set by the stored data of the fluctuation pattern allocation table so that the fluctuation pattern type CPA01 can be determined to any one of the fluctuation patterns PA01 to PA03, PA51, and PA52.

Figure 21-30 (A2) shows an example of the configuration of a fluctuation pattern allocation table corresponding to the fluctuation pattern type CPA02. When using the fluctuation pattern type allocation table AKU01 that can be determined in accordance with the jackpot symbol designation value, the fluctuation pattern type CPA02 can be determined at a predetermined ratio corresponding to the random number MR3-3 for selecting the fluctuation pattern type. In the configuration example of Figure 21-30 (A2), the fluctuation pattern allocation table is configured with table data so that it can be determined to any one of the fluctuation patterns PA04 to PA11, PA21 to PA23, and PA54 in accordance with the random number MR3-4 for the fluctuation pattern. In this way, the allocation judgment value is set by the stored data of the fluctuation pattern allocation table so that the fluctuation pattern type CPA02 can be determined to any one of the fluctuation patterns PA04 to PA11, PA21 to PA23, and PA54.

Figure 21-30 (A3) shows an example of the configuration of a fluctuation pattern allocation table corresponding to the fluctuation pattern type CPA03. When using the fluctuation pattern type allocation table AKU01 that can be determined in response to the jackpot symbol designation value, the fluctuation pattern type CPA03 can be determined at a predetermined ratio corresponding to the random number MR3-3 for selecting the fluctuation pattern type. In the configuration example of Figure 21-30 (A3), the fluctuation pattern allocation table is configured so that the table data can be determined to be one of the fluctuation patterns PA31 to PA38, PA24 to PA26, and PA55 in response to the random number MR3-4 for the fluctuation pattern. In this way, the allocation judgment value is set by the stored data of the fluctuation pattern allocation table so that the fluctuation pattern type CPA03 can be determined to be one of the fluctuation patterns PA31 to PA38, PA24 to PA26, and PA55.

Figure 21-30 (A4) shows an example of the configuration of a fluctuation pattern allocation table corresponding to the fluctuation pattern type CPA04. When using the fluctuation pattern type allocation table AKU01 that can be determined in response to the jackpot symbol designated value, the fluctuation pattern type CPA04 can be determined at a predetermined ratio corresponding to the random number MR3-3 for selecting the fluctuation pattern type. In the configuration example of Figure 21-30 (A4), the fluctuation pattern allocation table is configured with table data so that only the common fluctuation pattern PA41 can be determined in response to the random number MR3-4 for all fluctuation patterns. In this way, the allocation judgment value is set by the stored data of the fluctuation pattern allocation table so that the fluctuation pattern type CPA04 can only be determined to the fluctuation pattern PA41.

Figure 21-30 (A5) shows an example of the configuration of a fluctuation pattern allocation table corresponding to the fluctuation pattern type CPA05. When using the fluctuation pattern type allocation table AKU01 that can be determined in response to the jackpot symbol designated value, the fluctuation pattern type CPA05 can be determined at a predetermined ratio corresponding to the random number MR3-3 for selecting the fluctuation pattern type. In the configuration example of Figure 21-30 (A5), the fluctuation pattern allocation table is configured with table data so that only the common fluctuation pattern PA42 can be determined in response to the random number MR3-4 for all fluctuation patterns. In this way, the allocation judgment value is set by the stored data of the fluctuation pattern allocation table so that the fluctuation pattern type CPA05 can only be determined to the fluctuation pattern PA42.

Figure 21-30 (B1) shows an example of the configuration of a fluctuation pattern allocation table corresponding to the fluctuation pattern type CPB01. When using the fluctuation pattern type allocation table AKU11 that can be determined in response to the small win symbol designation value, the fluctuation pattern type CPB01 can be determined in response to the random number MR3-3 for selecting all fluctuation pattern types. In the configuration example of Figure 21-30 (B1), the fluctuation pattern allocation table is configured with table data so that only the common fluctuation pattern PB01 can be determined in response to the random number MR3-4 for all fluctuation patterns. In this way, the allocation judgment value is set by the stored data of the fluctuation pattern allocation table so that the fluctuation pattern type CPB01 can be determined only to the fluctuation pattern PB01.

Figure 21-30 (B2) shows an example of the configuration of a fluctuation pattern allocation table corresponding to the fluctuation pattern type CPB02. When using the fluctuation pattern type allocation table AKU12 that can be determined in response to the small win symbol designation value, the fluctuation pattern type CPB02 can be determined in response to all of the random numbers MR3-3 for selecting the fluctuation pattern type. In the configuration example of Figure 21-30 (B2), the fluctuation pattern allocation table is configured with table data so that it can be determined to any of the fluctuation patterns PB11 to PB14 in response to the random number MR3-4 for the fluctuation pattern. In this way, the allocation judgment value is set by the stored data of the fluctuation pattern allocation table so that the fluctuation pattern type CPB02 can be determined to any of the fluctuation patterns PB11 to PB14.

Figure 21-31 (A) shows an example of the configuration of a fluctuation pattern allocation table corresponding to the fluctuation pattern type CPC01. When using the fluctuation pattern type allocation table AKU21 that can be determined in correspondence with the random number MR3-2 for selecting a miss performance, the fluctuation pattern type CPC01 can be determined at a predetermined ratio corresponding to the random number MR3-3 for selecting the fluctuation pattern type. In the configuration example of Figure 21-31 (A), the fluctuation pattern allocation table is configured with table data so that only the common fluctuation pattern PC01 can be determined in correspondence with the random number MR3-4 for all fluctuation patterns. In this way, the allocation judgment value is set by the stored data of the fluctuation pattern allocation table so that the fluctuation pattern type CPC01 can be determined only to the fluctuation pattern PC01.

Figure 21-31 (B) shows an example of the configuration of a fluctuation pattern allocation table corresponding to the fluctuation pattern type CPC02. When using the fluctuation pattern type allocation table AKU21 that can be determined in correspondence with the random number MR3-2 for selecting a miss performance, the fluctuation pattern type CPC02 can be determined at a predetermined ratio corresponding to the random number MR3-3 for selecting the fluctuation pattern type. In the configuration example of Figure 21-31 (B), the fluctuation pattern allocation table is configured so that the fluctuation pattern type CPC02 can be determined to any one of the fluctuation patterns PC12, PC13, PC15, PC16, PC24, PC27, PC33, and PC49 in correspondence with the random number MR3-4 for the fluctuation pattern. In this way, the allocation judgment value is set by the stored data of the fluctuation pattern allocation table so that the fluctuation pattern type CPC02 can be determined to any one of the fluctuation patterns PC12, PC13, PC15, PC16, PC24, PC27, PC33, and PC49.

Figure 21-31 (C) shows an example of the configuration of a fluctuation pattern allocation table corresponding to the fluctuation pattern type CPC03. When using the fluctuation pattern type allocation table AKU22 that can be determined in correspondence with the random number MR3-2 for selecting a miss performance, the fluctuation pattern type CPC03 can be determined in correspondence with all of the random numbers MR3-3 for selecting the fluctuation pattern type. In the configuration example of Figure 21-31 (C), the fluctuation pattern allocation table is configured with table data so that it can be determined to be one of the fluctuation patterns PC11 to PC18, PC101 in correspondence with the random number MR3-4 for the fluctuation pattern. In this way, the allocation judgment value is set by the stored data of the fluctuation pattern allocation table so that the fluctuation pattern type CPC03 can be determined to be one of the fluctuation patterns PC11 to PC18, PC101.

Figure 21-31 (D) shows an example of the configuration of a fluctuation pattern allocation table corresponding to the fluctuation pattern type CPC04. When using the fluctuation pattern type allocation table AKU23 that can be determined in correspondence with the random number MR3-2 for selecting a miss performance, the fluctuation pattern type CPC04 can be determined in correspondence with all of the random numbers MR3-3 for selecting a fluctuation pattern type. In the configuration example of Figure 21-31 (D), the fluctuation pattern allocation table is configured with table data so that it can be determined to be one of the fluctuation patterns PC19 to PC27, PC102 in correspondence with the random number MR3-4 for the fluctuation pattern. In this way, the allocation judgment value is set by the stored data of the fluctuation pattern allocation table so that the fluctuation pattern type CPC04 can be determined to be one of the fluctuation patterns PC19 to PC27, PC102.

Figure 21-32 (A) shows an example of the configuration of a fluctuation pattern allocation table corresponding to the fluctuation pattern type CPC05. When using the fluctuation pattern type allocation table AKU24 that can be determined in correspondence with the random number MR3-2 for selecting a losing performance, the fluctuation pattern type CPC05 can be determined at a first ratio corresponding to the random number MR3-3 for selecting the fluctuation pattern type. In the configuration example of Figure 21-32 (A), the fluctuation pattern allocation table is configured with table data so that it can be determined to any one of the fluctuation patterns PC28 to PC43 in correspondence with the random number MR3-4 for the fluctuation pattern. In this way, the allocation judgment value is set by the stored data of the fluctuation pattern allocation table so that the fluctuation pattern type CPC05 can be determined to any one of the fluctuation patterns PC28 to PC43.

Figure 21-32 (B) shows an example of the configuration of a fluctuation pattern allocation table corresponding to the fluctuation pattern type CPC06. When using the fluctuation pattern type allocation table AKU24 that can be determined in correspondence with the random number MR3-2 for selecting a losing performance, the fluctuation pattern type CPC06 can be determined at a second rate different from the first rate corresponding to the random number MR3-3 for selecting a fluctuation pattern type. The second rate is a rate lower than the first rate. In the configuration example of Figure 21-32 (B), the fluctuation pattern allocation table is configured with table data so that it can be determined to be one of the fluctuation patterns PC44 to PC59 in correspondence with the random number MR3-4 for the fluctuation pattern. In this way, the allocation judgment value is set by the stored data of the fluctuation pattern allocation table so that the fluctuation pattern type CPC06 can be determined to be one of the fluctuation patterns PC44 to PC59.

Figure 21-32 (C) shows an example of the configuration of a fluctuation pattern allocation table corresponding to the fluctuation pattern type CPC07. When using the fluctuation pattern type allocation table AKU24 that can be determined in correspondence with the random number MR3-2 for selecting a losing performance, the fluctuation pattern type CPC07 can be determined at a third ratio different from the first ratio and the second ratio corresponding to the random number MR3-3 for selecting a fluctuation pattern type. The third ratio is a ratio lower than the first ratio and the second ratio. In the configuration example of Figure 21-32 (C), the fluctuation pattern allocation table is configured with table data so that it can be determined to any one of the fluctuation patterns PC60 to PC75 in correspondence with the random number MR3-4 for the fluctuation pattern. In this way, the allocation judgment value is set by the stored data of the fluctuation pattern allocation table so that the fluctuation pattern type CPC07 can be determined to any one of the fluctuation patterns PC60 to PC75.

Figure 21-32 (D) shows an example of the configuration of a fluctuation pattern allocation table corresponding to the fluctuation pattern type CPC08. When using the fluctuation pattern type allocation table AKU25 that can be determined in correspondence with the random number MR3-2 for selecting a losing performance, the fluctuation pattern type CPC08 can be determined in correspondence with the random number MR3-3 for selecting all fluctuation pattern types. In the configuration example of Figure 21-32 (D), the fluctuation pattern allocation table is configured with table data so that only the common fluctuation pattern PC02 can be determined in correspondence with the random number MR3-4 for all fluctuation patterns. In this way, the allocation judgment value is set by the stored data of the fluctuation pattern allocation table so that the fluctuation pattern type CPC08 can be determined in correspondence with only the fluctuation pattern PC02.

Figure 21-33 (A) is a flowchart showing an example of normal symbol process processing P_FPROC. The normal symbol process processing P_FPROC is included in the processing that can be called from the timer interrupt processing P_PCT for game control shown in Figure 16, and can be executed in step AKS59 every time a timer interrupt occurs. When the CPU 103 executes the normal symbol process processing P_FPROC, it sets the gate switch passing corresponding flag (step AKS501). The gate switch passing corresponding flag setting is reflected in the flag register of the CPU 103 by executing a logical operation instruction or the like. At this time, the zero flag in the flag register being in the on state indicates that the gate switch passing corresponding flag is in the off state. In contrast, the zero flag being in the off state indicates that the gate switch passing corresponding flag is in the on state. Thereafter, it is determined whether the gate switch passing corresponding flag is on (step AKS502). If the gate switch passing flag is on (step AKS502; Yes), the gate switch passing process P_FZU_ON is executed (step AKS503).

When the gate switch passing flag is off in response to step AKS502 (step AKS502; No), or after the gate switch passing process P_FZU_ON in step AKS503, a transfer command that sets a pointer sets the normal symbol process processing jump table (step AKS504). The normal symbol process processing jump table is an address management table that selects and executes the process that corresponds to the read value of the normal symbol process code. The normal symbol process code can be updated to any of 00 [H] to 04 [H] in response to the progress of game control in the pachinko game machine 1, and is also called the normal symbol process code.

Following step AKS504, a transfer command to read out stored data is used to load the normal symbol process code (step AKS505). Next, 2-byte data selection processing P_ABXEXEC is executed (step AKS506) to obtain the address of the processing selected in accordance with the normal symbol process code. The address obtained at this time is set in the pointer. After this, a subroutine call command is used to execute the processing pointed to by the pointer (step AKS507), making it possible to execute the processing selected in accordance with the normal symbol process code. When the processing selected in this manner ends and a return command is issued to return to the normal symbol process processing P_FPROC, this normal symbol process processing P_FPROC also ends, and a return command is issued to return to the timer interrupt processing P_PCT for game control.

Figure 21-33 (B) shows an example of the configuration of the normal symbol process jump table AKT51 used in the normal symbol process P_FPROC. The normal symbol process jump table is configured to include table data that can set the address of the process selected corresponding to the normal symbol process code in an internal register of the CPU 103 used as a pointer. The normal symbol process jump table of the configuration example AKT51 includes table data that can set the address value corresponding to the normal symbol normal process P_FNORM when the normal symbol process code is 00 [H], the normal symbol change process P_FSCRL when the normal symbol process code is 01 [H], the normal symbol stop process P_FSTOP when the normal symbol process code is 02 [H], the normal electric role pre-operation process P_FINT when the normal symbol process code is 03 [H], and the normal electric role operation process P_FOPEN when the normal symbol process code is 04 [H] in the pointer.

The normal pattern normal processing P_FNORM makes it possible to determine whether or not to start a normal pattern game based on the presence or absence of stored normal pattern reserved information, to determine the confirmed normal pattern to be stopped and displayed in the variable display of the normal pattern, and to determine the normal pattern change pattern, which is the change pattern of the normal pattern. The normal pattern change processing P_FSCRL measures the elapsed time since the normal pattern started to change in the normal pattern display device 20, and makes it possible to determine whether the normal pattern change time corresponding to the normal pattern change pattern has elapsed. The normal pattern stop processing P_FSTOP measures the elapsed time since the normal pattern stopped changing in the normal pattern display device 20, and makes it possible to determine whether the normal pattern stop time has elapsed. When the normal pattern stop time has elapsed, it makes it possible to update the normal pattern process code and various settings in accordance with the normal pattern display result. In this embodiment, it is sufficient that the normal pattern process code can be updated to 03 [H] in accordance with all normal pattern display results. The normal electric role pre-operation processing P_FINT and the normal electric role operation processing P_FOPEN are processes that enable the second starting winning port formed in the variable winning ball device 6B to be changed from a closed state to an open state by controlling the normal electric role solenoid 81.

Figure 21-34 is a diagram for explaining an example of the use of data configuration related to the control of the normal symbol game, which is a variable display of normal symbols. For example, the normal symbol process processing P_FPROC shown in Figure 21-33 (A) uses the normal symbol process code loaded in step AKS505 to execute the 2-byte data selection processing P_ABXEXEC in step AKS506, thereby making it possible to execute the processing selected in response to the normal symbol process code in step AKS507. The normal symbol process code is provided in the normal symbol control data area, and the stored value can be updated in response to the control state of the normal symbol game and the second start winning port. The gate switch passing processing P_FZU_ON in step AKS503 can read the random number MR2-1 for the normal symbol, and stores and saves the numerical data indicating the value of the read random number MR2-1 in the normal symbol buffer. The normal symbol buffer is provided in the normal symbol buffer area, and can store numerical data indicating the value of the random number MR2-1 read out until the normal symbol reserved memory number reaches the upper limit. In this way, the normal symbol process processing P_FPROC and the processing executable in the normal symbol process processing P_FPROC use the stored data in the normal symbol control data area and the buffer area for normal symbols to enable control of the normal symbol game, which is a variable display of normal symbols.

Figure 21-34 (A) shows a configuration example AKB51 of the normal symbol control data area. The normal symbol control data area of the configuration example AKB51 can store various data related to control by the normal symbol process processing P_FPROC, such as the normal symbol game, which is a variable display of normal symbols, and the closed or open state of the second start winning port, which can be controlled based on the display result. This normal symbol control data area includes a normal symbol process code at address F03E [H], a gate passing memory counter at address F03F [H], a normal symbol buffer at address F040 [H], a normal electric role release pattern timer at address F041 [H], a normal electric role release pointer at address F043 [H], a normal electric role win count counter at address F045 [H], and a normal symbol process timer at address F04A [H].

The normal pattern process code can specify the process selected in the normal pattern process P_FPROC. The gate passing memory counter can store a count value corresponding to the number of game balls detected by the gate switch 21. The normal pattern buffer can store data corresponding to the normal pattern designated value. The normal pattern designated value is a designated value corresponding to the confirmed normal pattern that is the display result in the variable display of the normal pattern by the normal pattern display device 20, and includes a normal pattern hit designation value. The normal pattern hit designation value is a designated value corresponding to the confirmed normal pattern displayed by the normal pattern display device 20 when the display result in the variable display of the normal pattern is "normal hit". The normal electric role opening pattern timer can store a time measurement value corresponding to the remaining time for controlling the second start winning port to the open state. The normal electric role opening pointer can specify a storage address of the normal electric role opening pattern table in which the time for controlling the second start winning port to the open state is set. The normal electric device winning number counter can store a count value corresponding to the number of game balls detected by the second start switch 22B. The normal symbol process timer can store a time value corresponding to the control time by the normal symbol process processing P_FPROC.

Figure 21-34 (B) shows a configuration example AKB52 of a buffer area for normal symbols. The buffer area for normal symbols of the configuration example AKB52 can store numerical data indicating the value of the random number MR2-1 for normal symbols that is read out when the gaming ball passes through the passing gate 41. This buffer area for normal symbols includes normal symbol buffer numbers "1" to "4" of addresses F046 [H] to F049 [H]. The buffer numbers "1" to "4" for normal symbols are buffers for normal symbols that are assigned buffer numbers "1" to "4", and can store the values of the random number MR2-1 in the order in which the gaming ball passed through the passing gate 41. As a result, the information stored in the normal symbol buffer indicates the number of game balls that have passed through the pass gate 41, and also indicates the value of the random number MR2-1 that is read out in response to each pass.

Figure 21-35 is a flow chart showing an example of the gate switch passing process P_FZU_ON. The gate switch passing process P_FZU_ON is included in the processes that can be called from the normal symbol process process P_FPROC shown in Figure 21-33 (A), and can be executed in step AKS503 if the gate switch passing corresponding flag is on in step AKS502. When the CPU 103 executes the gate switch passing process P_FZU_ON, it sets the gate passing memory counter address by a transfer command for setting a pointer (step AKS601). The gate passing memory counter address is the address of the gate passing memory counter provided in the game work area of the RAM 102. Next, it loads the gate passing memory counter by a transfer command for reading the stored data at the address pointed to by the pointer (step AKS602).

After step AKS602, it is determined whether the count value of the gate passing memory counter is equal to or greater than the counter maximum value (step AKS603). For example, if the value loaded in step AKS602 is compared with a counter maximum value such as "4" by a comparison return command that can compare the value, the gate switch passing process P_FZU_ON ends and returns to the normal symbol process process P_FPROC if the value is equal to or greater than the counter maximum value (step AKS603; Yes). On the other hand, if the value is less than the counter maximum value (step AKS603; No), the count value of the gate passing memory counter is updated to add 1 (step AKS604). In this case, an arithmetic and logic operation command that increments the stored data at the address pointed to by the pointer makes it possible to update the count value of the gate passing memory counter by adding 1.

After step AKS604, the buffer address for the normal symbol is set by a transfer command for setting the pointer (step AKS605). In this case, the address of the buffer for the normal symbol with buffer number "0" provided in the game work area of RAM 102 is set to the pointer. Then, the value loaded by step AKS602 is added to the stored value of the pointer. This allows the address of the buffer for the normal symbol that stores the random number MR2-1 for the normal symbol in the buffer area for the normal symbol to be set to the pointer. Following this, the random number counter for the normal symbol is stored (step AKS606), and the gate switch passing process P_FZU_ON is completed. In step AKS606, the value of the random number MR2-1 obtained from the random number counter for normal symbols in the game work area of RAM102 can be stored in the buffer for normal symbols by a transfer command to write the value read by specifying the lower address of the random number counter for normal symbols in the game work area of RAM102 to the memory area of the address pointed to by the pointer.

Figure 21-36 is a flowchart showing an example of normal symbol normal processing P_FNORM. The normal symbol normal processing P_FNORM is included in the processing that can be called from the normal symbol process processing P_FPROC shown in Figure 21-33 (A), and can be executed in step AKS507 when the normal symbol process code loaded in step AKS505 is 00 [H]. When the normal symbol normal processing P_FNORM is executed, the CPU 103 loads the gate passing memory counter (step AKS621). In this case, the count value of the gate passing memory counter can be obtained by a transfer command for setting the value read by specifying the lower address of the gate passing memory counter in the game work area of the RAM 102 in the internal register of the CPU 103. Then, by a calculation return command that returns the processing when the second zero flag in the flag register of the CPU 103 is in the on state, it is determined whether the count value of the gate passing memory counter is "0" or not (step AKS622). At this time, if the second zero flag is on, the count value of the gate passage memory counter is "0" (step AKS622; Yes), and the normal pattern normal processing P_FNORM ends and returns to the normal pattern process processing P_FPROC.

If the count value of the gate passing memory counter is not "0" in response to step AKS622 (step AKS622; No), a transfer command for setting a pointer is used to set the table address for setting the symbol for normal symbols (step AKS623). The table address for setting the symbol for normal symbols is the address of the table for setting the symbol for normal symbols stored in the game data area of ROM 101. Then, the buffer for normal symbols with buffer number "1" is loaded (step AKS624). In step AKS624, the random number MR2-1 for normal symbols stored in the buffer for normal symbols with buffer number "1" can be read out by a transfer command for setting the value read by specifying the lower address of the buffer for normal symbols with buffer number "1" in the game work area of RAM 102 in the internal register of CPU 103.

When the random number MR2-1 for the normal symbol winning pattern is read out by step AKS624, the second allocation judgment value comparison process P_HANTEI2 is executed (step AKS625). The value of the random number MR2-1 read out by step AKS624 is set as a comparison value in the second allocation judgment value comparison process P_HANTEI2 of step AKS625, and the normal symbol winning pattern designated value indicated by the allocation result data can be determined as the display result by the normal symbol display device 20 based on the stored data of the normal symbol winning pattern setting table whose address was set by step AKS623. When the normal symbol winning pattern designated value is determined by the second allocation judgment value comparison process P_HANTEI2 of step AKS625, the normal symbol winning pattern designated value is stored in the normal symbol buffer (step AKS626). The normal symbol buffer is provided in the normal symbol control data area shown in FIG. 21-34(A) and is assigned address F040[H]. In step AKS626, the normal symbol per symbol designated value is stored by a transfer command to write to the memory area of the designated address in the game work area of RAM 102.

After step AKS626, the count value of the gate passing memory counter is decremented by 1 (step AKS627). Then, the buffer for normal symbols is shifted (step AKS628). In this case, in the buffer area for normal symbols provided in the game work area of RAM 102, the address of the buffer for normal symbols with buffer number "2" is set to the pointer that specifies the transfer source. Also, the address of the buffer for normal symbols with buffer number "1" is set to the buffer pointer that specifies the transfer destination. Furthermore, the number of transfers corresponding to the data size of the buffer area for normal symbols is set. After that, the contents of the buffer for normal symbols are sequentially transferred and shifted by a block transfer command. At this time, the buffer for normal symbols with buffer number "4" is cleared to initialize the contents.

After step AKS628, the first normal symbol variation pattern allocation table address is set by a transfer command for setting a pointer (step AKS629). The first normal symbol variation pattern allocation table address is the address of the first normal symbol variation pattern allocation table stored in the game data area of ROM 101. In addition, the time-saving check process confirms that the time-saving function flag is not the time-saving activation designated value (step AKS630). At this time, if the time-saving function flag is the time-saving activation designated value (step AKS630; No), the second normal symbol variation pattern allocation table address is set by a transfer command for setting a pointer (step AKS631). The second normal symbol variation pattern allocation table address is the address of the second normal symbol variation pattern allocation table stored in the game data area of ROM 101.

If the time-saving function flag is not the time-saving operation designated value in response to step AKS630 (step AKS630; Yes), or after step AKS631, the RS3 soft latch random number register is loaded (step AKS632). In this case, the address of the RS3 soft latch random number register in the function control register area is specified and the stored value is read out, and then set to be usable as the random number MR3-1 for the normal symbol variation pattern by a transfer command for setting the value in the internal register of CPU 103. Then, the second allocation judgment value comparison process P_HANTEI2 is executed (step AKS633). In the second allocation judgment value comparison process P_HANTEI2 in step AKS633, the value of the random number MR3-1 read in step AKS632 is set as a comparison value, and the normal pattern variation pattern indicated by the allocation result data can be determined based on the stored data of the first normal pattern variation pattern allocation table whose address was set in step AKS629 or the second normal pattern variation pattern allocation table whose address was set in step AKS631.

When the normal symbol variation pattern is determined by the second allocation judgment value comparison process P_HANTEI2 in step AKS633, the normal symbol variation time corresponding to the normal symbol variation pattern is set (step AKS634). In step AKS634, the normal symbol variation time table and the normal symbol variation pattern designation data are used to execute a time data expansion process, thereby making it possible to set the normal symbol variation time corresponding to the determination result of the normal symbol variation pattern. Next, a transfer command for setting a pointer is used to set the normal symbol variation work table address (step AKS635). The normal symbol variation work table address is the address of the normal symbol variation work table stored in the game data area of ROM101. Next, the data set process P_DATASET is executed (step AKS636), and the normal symbol normal process P_FNORM is terminated. The data set process P_DATASET in step AKS636 uses the normal pattern change time work table whose address was set in step AKS635 to set the normal pattern process code to 01 [H], which is the normal pattern change processing designated value, and sets the storage value of the normal pattern change display buffer to 01 [H], which is the normal pattern change display data. Also, the normal pattern display update timer is cleared to make it possible to initialize it.

Figure 21-37 is a diagram for explaining an example of the use of data configuration related to normal pattern normal processing P_FNORM. In normal pattern normal processing P_FNORM, the second allocation judgment value comparison process P_HANTEI2 of step AKS625 is executed using the normal pattern per pattern setting table whose address is set in step AKS623, thereby making it possible to determine the pattern designation value per normal pattern. In addition, the second allocation judgment value comparison process P_HANTEI2 of step AKS633 is executed using the first normal pattern variation pattern allocation table whose address is set in step AKS629 or the second normal pattern variation pattern allocation table whose address is set in step AKS631, thereby making it possible to determine the normal pattern variation pattern. In step AKS634, the normal pattern variation time table is used to make it possible to set the normal pattern variation time corresponding to the result of determining the normal pattern variation pattern. Also, in step AKS507 of the normal symbol process processing P_FPROC shown in FIG. 21-33(A), when the normal symbol process code corresponds to 03[H] and the normal electric role pre-operation processing P_FINT is executed, the opening time of the normal electric role provided in correspondence with the second start winning port can be determined using a work setting table for when the normal electric role is in operation, etc.

In this way, normal pattern normal processing P_FNORM makes it possible to determine the pattern designation value for a normal pattern using a table for setting patterns for normal patterns. Also, normal pattern normal processing P_FNORM makes it possible to determine the normal pattern change pattern using the first normal pattern change pattern allocation table or the second normal pattern change pattern allocation table. Furthermore, normal pattern normal processing P_FNORM makes it possible to determine the normal pattern change time using the normal pattern change time table. Normal electric role pre-operation processing P_FINT, which is executed in response to the execution result of the normal game, can determine the opening time of the normal electric role.

Figure 21-37 (A) shows an example of a normal symbol per pattern setting table AKT61. In the normal symbol per pattern setting table of the example AKT61, the value 00 [H] corresponding to the first normal symbol per pattern designation value is stored in the first address 1B54 [H], and the value 03 [H] indicating the number of processes is stored in the next address 1B55 [H]. The stored data from address 1B56 [H] onwards indicates the allocation judgment value corresponding to the first to third normal symbol per pattern designation values. When the normal symbol per pattern setting table of the example AKT61 is used, the second allocation judgment value comparison process P_HANTEI2 of step AKS625 can determine one of the first to third normal symbol per pattern designation values in response to the random number MR2-1 for the normal symbol per pattern. In the configuration example AKT61, the designation value for the first normal symbol is 00 [H], the designation value for the second normal symbol is 01 [H], and the designation value for the third normal symbol is 02 [H]. For example, when the random number MR2-1 for the normal symbol is 00 [H], which corresponds to the minimum random number value "0", the designation value for the first normal symbol is determined.

Figure 21-37 (B1) shows a configuration example AKT62 of the first normal pattern variation pattern allocation table. In the first normal pattern variation pattern allocation table of the configuration example AKT62, the value 00 [H] corresponding to the normal pattern variation pattern FPZ1 designated value is stored at the first address 1B59 [H], and the value 04 [H] indicating the number of processes is stored at the next address 1B5A [H]. The stored data from address 1B5B [H] onwards indicates the allocation judgment value corresponding to the normal pattern variation patterns FPZ1 to FPZ4. When the first normal pattern variation pattern allocation table of the configuration example AKT62 is used, the second allocation judgment value comparison process P_HANTEI2 of step AKS633 can determine one of the normal pattern variation patterns FPZ1 to FPZ4 in response to the random number MR3-1 for the normal pattern variation pattern.

Figure 21-37 (B2) shows a configuration example AKT63 of the second normal symbol fluctuation pattern allocation table. In the second normal symbol fluctuation pattern allocation table of the configuration example AKT63, the value 04 [H] corresponding to the normal symbol fluctuation pattern FPZ5 designated value is stored at the first address 1B5F [H], and the value 04 [H] indicating the number of processes is stored at the next address 1B60 [H]. The stored data from address 1B61 [H] onwards indicates the allocation judgment value corresponding to the normal symbol fluctuation patterns FPZ5 to FPZ8. When the second normal symbol fluctuation pattern allocation table of the configuration example AKT63 is used, the second allocation judgment value comparison process P_HANTEI2 of step AKS633 can determine one of the normal symbol fluctuation patterns FPZ5 to FPZ8 in response to the random number MR3-1 for the normal symbol fluctuation pattern.

Figure 21-37 (C) shows an example of normal pattern fluctuation time determination AKD61. In the determination example AKD61, the normal pattern fluctuation time is determined to be 1000 [ms] corresponding to the normal pattern fluctuation patterns FZP1 to FZP4, and the normal pattern fluctuation time is determined to be 100 [ms] corresponding to the normal pattern fluctuation patterns FZP5 to FZP8. In step AKS634, the normal pattern fluctuation time corresponding to the normal pattern fluctuation pattern determined by the second allocation judgment value comparison process P_HANTEI2 in step AKS633 is set. The normal pattern fluctuation patterns FZP1 to FZP4 can be determined using the first normal pattern fluctuation pattern allocation table of the configuration example AKT61 when the time-saving function flag is off. The normal pattern fluctuation patterns FZP5 to FZP8 can be determined using the second normal pattern fluctuation pattern allocation table of the configuration example AKT62 when the time-saving function flag is on. This makes it possible to set the normal pattern variation time, which is the variable display time of the normal pattern, to be shorter when time-saving control is being performed than when time-saving control is not being performed.

Figure 21-37 (D) shows an example of normal electric role release time determination AKD62. In the normal electric role operation pre-processing P_FINT, the normal electric role release time can be determined in response to the time-saving operation designated value and the normal symbol per symbol designated value. The normal electric role release time is determined to be 16 ms in response to all normal symbol per symbol designated values 00 [H] to 02 [H] when the time-saving operation designated value is the value 00 [H] corresponding to "x" indicating that the time-saving state is not set. In contrast, the normal electric role operation time is determined to be 5000 ms in response to all normal symbol per symbol designated values 00 [H] to 02 [H] when the time-saving operation designated value is the value 01 [H] corresponding to "○" indicating that the time-saving state is set.

In this way, the normal electric device opening time can be determined to different times in response to the time-saving operation designated value, regardless of the value of the normal symbol per symbol designated value. The normal symbol per symbol designated value can be determined in response to the random number MR2-1 for the normal symbol per symbol read from the normal symbol per symbol buffer. And, if the time-saving operation designated value is the same value, the normal electric device operation time is determined to be common when the random number MR2-1 for the normal symbol per symbol is the minimum random number value of "0" and when it is other than the minimum random number value. Therefore, in response to the special symbol game, which is a variable display of normal symbols on the normal symbol display device 20, when the random number MR2-1 for the normal symbol per symbol is the minimum random number value of "0", the display result with a higher degree of advantage is not determined compared to when it is other than the minimum random number value. This makes it possible to update the random number value appropriately to prevent fraudulent activity due to a malfunction of the second random number value when the random number MR2-1 for the normal winning symbol is used as the second random number value.

In the game control microcomputer 100 shown in FIG. 21-1, the 16-bit random number circuit 104A and the 8-bit random number circuit 104B can update the numerical data indicating the values of the random numbers included in the game random numbers, including the random number MR1-1 for determining the special symbol, the random number MR3-2 for selecting a losing performance, the random number MR3-3 for selecting a variation pattern type, the random number MR3-4 for the variation pattern, and the random number MR3-1 for the normal symbol variation pattern. In addition, the CPU 103 can update the numerical data indicating the values of the random numbers included in the game random numbers, including the random number MR1-2 for the winning symbol, the random number MR1-3 serving as the initial value for the winning symbol, the random number MR2-1 for the winning symbol for the normal symbol, and the random number MR2-2 serving as the initial value for the winning symbol for the normal symbol, by executing the random number update process P_RANDOM shown in FIG. 21-12.

In step AKS248 of the normal special symbol processing shown in FIG. 21-18, when the special symbol determination processing P_TDECISION shown in FIG. 21-20 is executed, it becomes possible to determine whether the special symbol display result is a "big hit" or a "small hit" using the special symbol determination random number MR1-1 by the special symbol big hit determination processing in step AKS304 or the special symbol small hit determination processing in step AKS305. Then, in step AKS308 of the special symbol determination processing P_TDECISION, when the special symbol information setting processing P_TZU_SET shown in FIG. 21-22 is executed, it becomes possible to determine the big hit symbol designation value or the small hit symbol designation value corresponding to the confirmed special symbol that is the display result of the special symbol using the winning symbol random number MR1-2 by the big hit information data selection processing P_TFVR_ZU in step AKS326 or step AKS333. In addition, when the second allocation judgment value comparison process P_HANTEIS is executed in step AKS625 of the normal pattern normal process shown in Figure 21-36, it becomes possible to determine the normal pattern winning symbol designated value corresponding to the confirmed normal pattern that is the display result of the normal pattern using the random number MR2-1 for the winning symbol for the normal pattern. The jackpot symbol designated value determined using the random number MR1-2 for the winning symbol makes it possible to set the maximum number of times the large prize opening is opened in step AKS330 of the special symbol information setting process P_TZU_SET, as in the example AKD01 of determining the maximum number of times the large prize opening is opened shown in Figure 21-24 (C). The normal winning symbol designation value determined using the normal winning symbol random number MR2-1 enables the normal electric device opening time to be set as in the normal electric device opening time determination example AKD62 shown in FIG. 21-37(D) when the normal symbol process code corresponds to 03[H] and the normal electric device pre-operation process P_FINT is executed in step AKS507 of the normal symbol process processing P_FPROC shown in FIG. 21-33(A). Therefore, the winning symbol random number MR1-2 is used to determine the display result by the first special symbol display device 4A and the second special symbol display device 4B, making it possible to set the type of jackpot game state that is advantageous to the player. The normal winning symbol random number MR2-1 is used to determine the display result by the normal symbol display device 20, making it possible to set a change mode that changes the second start winning hole, which is the start area, to an induction state in which the game ball can easily pass through.

In this way, processing related to game control can be executed using random numbers that become various game random numbers, and the random number MR1-2 for the winning symbol, which becomes the first random number value, and the random number MR2-1 for the winning normal symbol, which becomes the second random number value, can be updated in their respective update ranges by a common update process such as the initial value change random number update process P_RANCP that can be called and executed by the random number update process P_RANDOM shown in FIG. 21-12. Here, the update range of the random number MR2-1 for the winning normal symbol is "0" to "198", and the total number of random numbers included in the update range is "199", so the total number of random numbers included in the update range is a prime number. Therefore, the total number of random numbers included in the update range of at least one of the first random number value and the second random number value that can be updated by the common update process is a prime number. In this way, the shared update process prevents an increase in program capacity, and the total number of random numbers included in the update range is a prime number, suppressing the occurrence of random number synchronization and enabling appropriate random number updating.

The random number MR1-2 for the winning symbol, which is the first random number value, has an update range of "0" to "199", and the total number of random numbers included in the update range is "200", so the total number of random numbers included in the update range is not a prime number. The random number MR1-2 for the winning symbol is used to determine the jackpot symbol designation value for the fixed special symbol, and may determine whether or not the probability of a special state will be reached after the end of the jackpot game state, depending on the jackpot symbol designation value. In this case, the determination ratio of the jackpot symbol designation value corresponds to the probability of special state entry rate, which is the rate at which the probability of special state is controlled. The probability of special state entry rate is included in the important specifications of the pachinko game machine 1, and it is desirable to make it a value that is clearly recognizable. However, if the total number of random numbers included in the update range of the random number MR1-2 for the winning symbol is a prime number, the denominator of the probability of special state entry rate will be a prime number, making it difficult to express it as a percentage, and there is a risk that the probability of special state entry rate will be difficult to recognize. Therefore, of the random numbers MR1-2 for winning symbols and MR2-1 for normal winning symbols that can be updated by a common update process, the total number of random numbers included in the update range of the random number MR2-1 for normal winning symbols may be a prime number, while the total number of random numbers included in the update range of the random number MR1-2 for winning symbols may not be a prime number. This makes it possible to appropriately update the random numbers so that the specifications of the pachinko game machine 1 can be clearly recognized while suppressing the occurrence of synchronization of the random numbers.

The total number of random numbers included in the update range for the winning symbol random number MR1-2, which is the first random number value, may also be a prime number. This makes it possible to more reliably suppress the synchronous occurrence of random numbers that can be updated by a common update process, and to update the random numbers appropriately.

In the random number update process P_RANDOM shown in FIG. 21-12, steps AKS61 to AKS64 can update the random number MR1-2 that becomes the first random number value, and steps AKS65 to AKS68 can update the random number MR2-1 that becomes the second random number value. The random number update process P_RANDOM can update the random number MR1-2 that becomes the first random number value and the random number MR2-1 that becomes the second random number value using the HL register, B register, and DE register of CPU 103, which are common internal storage means. In this way, the first random number value and the second random number value can be stably updated using the common internal storage means, making it possible to update the random number values appropriately.

The CPU 103 executing the random number update process P_RANDOM shown in Fig. 21-12 becomes the first update means capable of updating the first and second random number values in their respective update ranges by the random number update process when the random number MR1-2 for the winning symbol is set as the first random number value and the random number MR2-1 for the normal winning symbol is set as the second random number value. Also, the 16-bit random number circuit 104A and the 8-bit random number circuit 104B become the second update means capable of updating the third and fourth random number values in their respective update ranges by the system clock input serving as the random number clock signal when the third and fourth random number values are set from among the random number MR1-1 for determining the special symbol, the random number MR3-2 for selecting a losing performance, the random number MR3-3 for selecting a variation pattern type, and the random number MR3-4 for the variation pattern. For example, the random number MR2-1 for the winning symbol has an update range of "0" to "198", and the total number of random numbers included in the update range is "199", so the total number of random numbers included in the update range of the second random number is a prime number. In contrast, for example, the random number MR3-2 for selecting a losing performance has an update range of "0" to "65518", and the total number of random numbers included in the update range is "65519", the random number MR3-3 for selecting a variation pattern type has an update range of "0" to "240", and the total number of random numbers included in the update range is "241", and the random number MR3-4 for the variation pattern has an update range of "0" to "250", and the total number of random numbers included in the update range is "251", so the total number of random numbers included in the update range of at least one of the third random number and the fourth random number is a prime number. In this way, the update methods of the first update means and the second update means are different, and even if the update methods are the same, at least one random number has a total number of random numbers included in the update range that is a prime number, which suppresses the occurrence of synchronization and enables appropriate updating of the random numbers.

The 16-bit random number circuit 104A and the 8-bit random number circuit 104B are the first update means capable of updating the first and second random number values by the system clock input serving as the random number clock signal when the first and second random number values are set from among the random number MR1-1 for determining a special symbol, the random number MR3-2 for selecting a losing performance, the random number MR3-3 for selecting a variation pattern type, and the random number MR3-4 for a variation pattern. The CPU 103 that executes the random number update process P_RANDOM shown in FIG. 21-12 is the second update means capable of updating the third random number value by the random number update process when the third random number value is set from among the random number MR1-2 for a winning symbol and the random number MR2-1 for a normal or winning symbol. When the CPU 103 executes the main process P_MAIN for game control shown in FIG. 15 based on the start of power supply in the pachinko game machine 1, it sets the stored value of the function setting register area by the function setting register store command in step AKS13 when it executes the power supply start corresponding process P_POWER_ON shown in FIG. 21-7 in step S1. At this time, by setting the stored value of the maximum value setting register provided corresponding to the 16-bit random number circuit 104A or the 8-bit random number circuit 104B, it is possible to execute a maximum value setting process for setting the maximum value of the random number value updated by the 16-bit random number circuit 104A or the 8-bit random number circuit 104B. Then, the 16-bit random number circuit 104A or the 8-bit random number circuit 104B, which is the first updating means, starts updating the first random number in the maximum value setting process by setting the maximum value of the first random number value, and then starts updating the second random number by setting the maximum value of the second random number value. After executing the power supply start response process P_POWER_ON in step S1, the CPU 103 executing the game control main process P_MAIN shown in FIG. 15 becomes able to execute the game control timer interrupt process P_PCT shown in FIG. 16 in response to the occurrence of a timer interrupt while executing the loop process of steps S8 to S11, and starts updating the third random number value by executing the random number update process P_RANDOM in step S56. In this way, the CPU 103 executing the random number update process P_RANDOM, which serves as the second update means, enables the update of the third random number value after executing the maximum value setting process in the power supply start response process P_POWER_ON, so that by starting the update of a random number value that is highly related to the game value, such as the random number MR1-1 for determining a special symbol, first, the uncertainty is increased, and appropriate random number value updating becomes possible.

In the bit data RAP of the RWM access protection register shown in FIG. 21-9(B), the bit data RAM0 of bit number "0" is set to the initial value 0 [B] in response to the start of power supply in the pachinko gaming machine 1. As a result, the RAM 102 serving as the RWM is prohibited from being accessed in response to the storage value of the RWM access protection register, which is a specific storage area, being set to the first storage value. The CPU 103 that has executed the power supply start response process P_POWER_ON shown in FIG. 21-7 sets the storage value of the function setting register area by the function setting register store command in step AKS13, and then stores the access permission output value in the RWM access protection register in step AKS14. In this way, after setting the storage value in the function setting register area, which is a storage area related to functions, the second storage value that permits access to the RAM 102 as a storage means can be set in the RWM access protection register, which is a specific storage area. Then, as the next process after setting the second stored value, the RWM check process P_RWM_CHK in step S2 in the main process P_MAIN for game control shown in FIG. 15 can be executed to execute a confirmation process to check whether or not the control state can be restored based on the contents stored in the storage means, RAM 102. In this way, the contents stored in the storage means are not changed unnecessarily, and the confirmation process can be executed reliably, while the random number value can be updated appropriately.

The CPU 103 executing the power-off process P_POWER_OFF shown in FIG. 21-10 can execute a stop-time storage process in which the checksum data, which is recovery information for restoring the control state in response to a power supply stop, is stored in a storage area such as the checksum buffer of the storage means RAM 102 by storing the checksum data created by the checksum calculation process P_SUM_CALC in step AKS39 in the checksum buffer in step AKS40. After such a stop-time storage process is executed, the clear data set in the output value data in step AKS41 can be stored in the RWM access protection register in step AKS42, thereby executing a stop-time storage process in which the first storage value is set in a specific storage area. After the stop-time storage process is executed, the loop process of steps AKS48 and AKS49 transitions to a standby state in which game control is not executed. In response to the power supply being restored during this standby state, if the power confirmation signal input bit is not "0" in step AKS49, the power recovery vector table address is set in the stack pointer in step AKS50, and then the power-off processing P_POWER_OFF is terminated by an interrupt return command, making it possible to execute the main processing P_MAIN for game control shown in FIG. 15 from the beginning as startup processing based on the startup of the pachinko gaming machine 1. This prevents unstable operation when the power supply is restored and enables appropriate updating of random numbers.

In the address map of the game control microcomputer 100 shown in Figure 21-2, the function setting register area of the built-in register assigned addresses FE00[H] to FEBF[H] is the first area for function setting using various circuits included in the game control microcomputer 100, and the function control register area of the built-in register assigned addresses FF00[H] to FFFF[H] is the second area for function control using various circuits included in the game control microcomputer 100. Of these, the RWM access protection register at address FF00[H] is a specific storage area in which a storage value indicating whether or not access to the RWM, RAM 102, can be permitted can be set. When the CPU 103 executes the main process P_MAIN for game control shown in FIG. 15 based on the start of power supply in the pachinko game machine 1, it can execute a control storage process to set a stored value in the function control register area, which is the second area, in steps AKS5 to AKS7 when it executes the power supply start corresponding process P_POWER_ON shown in FIG. 21-7 in step S1. After such a control storage process is executed, it can execute a setting storage process to set a stored value in the function setting register area, which is the first area, in steps AKS11 to AKS13. After such a setting storage process is executed, it is possible to set a stored value that allows access to the RAM 102, which is the storage means, in the RWM access protection register, which is the specific storage area, in step AKS14. In this way, it is possible to prevent the contents of the storage means from being changed in an unwanted way and to update the random number value appropriately.

(Means for solving the problem and effects of characteristic part 01AK)
(1-1) A gaming machine that can be controlled to an advantageous state that is advantageous to a player,
An update means capable of updating the random value;
A first display means capable of variably displaying special identification information;
and a second display means capable of variably displaying the normal identification information,
A type of advantageous state is determined in response to the display result by the first display means;
A change mode for changing the starting area into an guiding state in which the game medium can easily pass through is determined in response to the display result by the second display means;
The update method is
The first random number value used to determine the display result by the first display means and the second random number value used to determine the display result by the second display means can be updated within their respective update ranges by a common update process;
The first random number value and the second random number value can be updated using a common internal storage means;
The first random number is a number that is determined by whether the total number of random numbers included in the update range is not a prime number.
The second random value is a prime number, the total number of which is included in the update range.
Here, the gaming machine may be, for example, a pachinko gaming machine 1. The update means may be, for example, a CPU 103 that executes a random number update process P_RANDOM. The special identification information may be, for example, a special pattern. The first display means may be, for example, a first special pattern display device 4A and a second special pattern display device 4B. The normal identification information may be, for example, a normal pattern. The second display means may be, for example, a normal pattern display device 20. The display result by the first display means may be, for example, a determined special pattern that is a display result of a special pattern. The display result by the second display means may be, for example, a determined normal pattern that is a display result of a normal pattern. The type of advantageous state may be, for example, a maximum value of the number of times the large prize opening is opened. The change mode may be, for example, a normal electric role opening time. The first random number value may be, for example, a random number MR1-2. The second random number value may be, for example, a random number MR2-1. The update process may be, for example, the initial value change random number update process P_RANCP. The internal storage means may be, for example, the HL register, B register, DE register, etc. of the CPU 103. The total number of the first random number values may be, for example, the size of the random number MR1-2 may be "65536". The total number of the second random number values may be, for example, the size of the random number MR2-1 may be "199".
With this configuration, the common update process prevents an increase in program capacity, and since the total number of random number values included in the update range is a prime number, synchronization between the first random number value and the second random number value is suppressed, making it possible to update the random number values appropriately.

(1-2) When executing an update process, the update means may be capable of updating the random number value to be updated and changing the initial random value after setting the random number value to be updated, the maximum random number value, and the initial random value.
Here, the setting for executing the update process may be, for example, steps AKS61 to AKS63 and AKS65 to AKS67. The update of the random number value to be updated and the change of the random number initial value may be, for example, steps AKS64 and AKS68 that execute the initial value change random number update process P_RANCP.
In such a configuration, it becomes possible to appropriately update the random number values by updating the set random number values to be updated.

(1-3) The updating means may update the second random value after updating the first random value through a specific updating process.
Here, the specific update process may be, for example, a random number update process P_RANDOM.
In such a configuration, by updating the first random number value, which is used to determine the display result that attracts the player's attention, before the second random number value, the occurrence of malfunctions is suppressed and the random number value can be updated appropriately.

(1-4) The update means may be capable of updating the first random number value and the second random number value and changing initial values of the first random number value and the second random number value by calling a common update process corresponding to the first random number value and the second random number value through the specific update process.
Here, the common update process may be, for example, the initial value change random number update process P_RANCP of steps AKS64 and AKS68 in the random number update process P_RANDOM.
In such a configuration, the common update process prevents an increase in program capacity, and the first random number value and the second random number value are stably updated, making it possible to appropriately update the random number value.

(1-5) The update means may be capable of updating the first random number value and the second random number value by a specific update process using a common internal storage means.
For example, in the random number update process P_RANDOM, the HL register is set in steps AKS61 and AKS65, the B register is set in steps AKS62 and AKS66, and the DE register is set in steps AKS63 and AKS67, and then the initial value change random number update process P_RANCP is executed in steps AKS64 and AKS68.
In such a configuration, the first random number value and the second random number value are stably updated using a common internal storage means, making it possible to appropriately update the random number values.

(1-6) When the update means stores the reference information in the internal storage means before the common update process by the specific update process, the update means may be capable of setting different reference information in the internal storage means by using an instruction that is common to the first random value and the second random value.
Here, the internal storage means may be, for example, an HL register, a B register, a DE register, etc. The common instruction may be a transfer instruction such as an LD instruction or an LDQ instruction. The different reference information may be, for example, the address F081 [H] of the random number counter for the winning symbol and the address F052 [H] of the random number counter for the normal winning symbol, or the address F050 [H] of the random number initial value data buffer for the winning symbol and the address F053 [H] of the random number initial value data buffer for the normal winning symbol.
In such a configuration, by making it possible to update the first random number value and the second random number value using a common instruction, it becomes possible to stably update the first random number value and the second random number value, thereby making it possible to update the random number value appropriately.

(1-7) When executing the update process, the update means is capable of changing the random number initial value in response to the update target random number value matching the update target random number value after updating the update target random number value.
For example, in the initial value change random number update process P_RANCP, after updating the random number value to be updated in step AKS101, a new random number initial value is stored in step AKS108 in response to a match with the value stored in the random number initial value data buffer in step AKS105.
In such a configuration, it is possible to appropriately update the random number values by updating the random number values to be updated and changing the initial random number values.

(1-8) When the update means executes the update process to update the random number value to be updated,
Comparing the update target random number with the maximum random number;
If the comparison result is less than the maximum random number value, add 1 to the random number value to be updated.
A single compare and add instruction may be executed first, which includes changing the random value to be updated to the minimum random value if the comparison result is greater than or equal to the maximum random value.
Here, the compare and add instruction may be, for example, the part of step AKS101.
In such a configuration, by executing the compare and add instruction first, it is possible to suppress the occurrence of errors and to update the random number value appropriately.

(1-9) The updating means may first execute a compare and add instruction both when updating the first random value and when updating the second random value.
For example, it may be step AKS101 in the initial value change random number update process P_RANCP of steps AKS64 and AKS68.
In such a configuration, by executing the compare and add instruction first, it is possible to suppress the occurrence of errors in the first random number value and the second random number value, and to update the random number value appropriately.

(1-10) When determining a display result by the first display means, when the first random number value is a minimum random number value, the display result is not determined to be more advantageous than when the first random number value is other than the minimum random number value;
When determining the display result by the second display means, when the second random number value is the minimum random number value, it is not necessary to determine a display result that is more advantageous than when the second random number value is other than the minimum random number value.
Here, the display result that is not determined to have a high degree of advantage may be, for example, example AKD01 of determining the number of times the large prize opening is to be performed or example AKD02 of determining the mode of the large prize opening.
In such a configuration, it becomes possible to appropriately update the random number values so as to prevent fraudulent acts due to defects in the first random number values or the second random number values.

(1-11) The update means is
An initial value update process is capable of updating the initial random value used when changing the random initial value;
After executing the compare and add instruction, the update target random number value after the update by the compare and add instruction is compared with the initial random number value;
If the updated random number does not match the initial random number, store the updated random number as the current random number.
If the updated random number value to be updated matches the random initial value, the initial value random number value obtained by the initial value update process may be stored as the current random number value and also as a new random initial value.
Here, the random number value for the initial value may be, for example, random number MR1-3 or random number MR2-2. The initial value update process may be, for example, random number update process P_TFINIT for determining initial value. The comparison with the random number initial value may be, for example, the part of step AKS105. If it does not match the random number initial value, it may be, for example, the case of Yes in step AKS105. If it matches the random number initial value, it may be, for example, the part of steps AKS106 to AKS108 in the case of No in step AKS105.
In such a configuration, the uncertainty of the random number value is increased by setting a new initial random number value, and by storing it as the current random number value, an increase in data volume is prevented, and the random number value can be appropriately updated.

(1-12) The update means is
A first initial value update process for updating a first initial value random value used when changing a random number initial value in response to a case where the random number value to be updated is a first random number value;
In response to the case where the random number value to be updated is a second random number value, it may be possible to execute an initial value update process that includes a second initial value update process that updates a random number value for a second initial value used when changing the random number initial value.
Here, the first initial value random number value may be, for example, random number MR1-3. The first initial value update process may be, for example, steps AKS81 and AKS82 in the initial value determination random number update process P_TFINIT. The second initial value random number value value may be, for example, random number MR2-2. The second initial value update process may be, for example, steps AKS83 and AKS84 in the initial value determination random number update process P_TFINIT.
In such a configuration, the random number values can be appropriately updated by updating the first initial value random number values and the second initial value random number values.

(1-13) The update means may update the second initial value random value after updating the first initial value random value through the initial value update process.
For example, in the initial value determination random number update process P_TFINIT, steps AKS83 and AKS84 may be executed after steps AKS81 and AKS82.
In such a configuration, by updating the random number value for the first initial value, which has a higher priority, before the random number value for the second initial value, which has a lower priority, the occurrence of malfunctions is suppressed, and the random number values can be updated appropriately.

(1-14) When executing the initial value update process, the update means performs the following based on the settings regarding the initial value random number value to be updated and the initial value random number maximum value:
comparing the random number value for the initial value to be updated with the maximum random number value for the initial value;
If the comparison result is less than the maximum initial value random number, the initial value random number to be updated is incremented by 1;
A single compare and add instruction may be executed, which includes changing the initial value random number value to be updated to the minimum random number value if the comparison result is equal to or greater than the initial value random number maximum value.
Here, the compare and add instruction may be, for example, steps AKS82 and AKS84.
In such a configuration, by updating the random number value for the initial value to be updated using a compare and add instruction, it is possible to suppress the occurrence of malfunctions and to update the random number value appropriately.

(1-15) The update means is
A random number update process capable of updating the random number value to be updated;
An initial value random number update process capable of updating an initial value random number used when changing a random number initial value corresponding to a random number value to be updated;
The first process executable in response to a timer interrupt due to the lapse of a predetermined time includes a random number update process and an initial value random number update process,
The second process that can be repeatedly executed until the first process is executed may not include a random number update process, but may include an initial value random number update process.
Here, the random number value to be updated may be, for example, random number MR1-2 or random number MR2-1. The random number update process may be, for example, random number update process P_RANDOM. The random number value for initial value may be, for example, random number MR1-3 or random number MR2-2. The random number update process for initial value may be, for example, random number update process P_TFINIT for initial value determination. The first process may be, for example, timer interrupt process P_PCT for game control. The second process may be, for example, steps S8 to S10 in the main process P_MAIN for game control.
In such a configuration, the uncertainty of the initial value random number value is increased by the initial value random number update process, making it possible to update the random number value appropriately.

(1-16) The update process is
A random number update process capable of updating the random number value to be updated;
An initial value random number update process capable of updating an initial value random number used when changing a random number initial value corresponding to a random number value to be updated;
The random number update process and the initial value random number update process can be called and executed in a timer interrupt process that controls the progress of a game.
The initial value random number update process may be capable of being called and executed during standby processing that is repeated after startup processing that is executed upon the start of power supply.
Here, the random number value to be updated may be, for example, random number MR1-2 or random number MR2-1. The random number update process may be, for example, random number update process P_RANDOM. The random number value for initial value may be, for example, random number MR1-3 or random number MR2-2. The random number update process for initial value may be, for example, random number update process for initial value determination P_TFINIT. The timer interrupt process may be, for example, timer interrupt process P_PCT for game control. The startup process may be, for example, steps S1 to S7 in the main process P_MAIN for game control. The standby process may be, for example, steps S8 to S10 in the main process P_MAIN for game control.
In such a configuration, the uncertainty of the initial value random number value is increased by the initial value random number update process, making it possible to update the random number value appropriately.

(2-1) A gaming machine that can be controlled to an advantageous state that is advantageous to a player,
An update means capable of updating the random value;
A processing means for executing a process related to game control by using the random number value updated by the updating means,
The update means is capable of updating a first random number value for determining whether or not to control to an advantageous state and a second random number value different from the first random number value;
The first random value is composed of a specific number of bytes, and the total number of random values included in the update range is a specific number,
The second random number value is a specific number of bytes, and the total number of random numbers included in the update range is a predetermined number smaller than the specific number,
The first random value may be updated faster than the second random value.
Here, the advantageous state may be, for example, a jackpot gaming state. The gaming machine may be, for example, a pachinko gaming machine 1. The updating means may be, for example, a 16-bit random number circuit 104A, an 8-bit random number circuit 104B, etc. The processing means may be, for example, a CPU 103 that executes a special symbol process P_TPROC. The first random number value may be, for example, a random number MR1-1. The second random number value may be, for example, a random number MR3-2. The specific number of bytes may be, for example, 2 bytes. The specific number may be, for example, "65536", which is the size of the random number MR1-1. The predetermined number may be, for example, "65519", which is the size of the random number MR3-2. A fast update speed means, for example, that the update speed of random number MR1-1 in the comparative random number value AKA23 is 15,000 [times/ms] and the update speed of random number MR3-2 is 469 [times/ms].
In such a configuration, it becomes possible to appropriately update the random number value so that intentional control of an advantageous state becomes difficult due to a fast update speed of the first random number value related to the advantageous state.

(2-2) A gaming machine capable of playing a game,
An update means capable of updating the random value;
A processing means for executing a process related to game control by using the random number value updated by the updating means,
The updating means is capable of updating a first random value and a second random value different from the first random value;
The first random value has an update rate of a first rate,
The second random value is a second speed at which the update speed is an integer multiple of the first speed,
The total number of random values included in the update range of each of the first random value and the second random value may be different, and the total number of random values included in both update ranges may be a prime number.
Here, the gaming machine may be, for example, a pachinko gaming machine 1. The updating means may be, for example, a 16-bit random number circuit 104A, an 8-bit random number circuit 104B, or the like. The processing means may be, for example, a CPU 103 that executes a special symbol process P_TPROC, or the like. The first random number value may be, for example, a random number MR3-2. The second random number value may be, for example, a random number MR3-3, MR3-4, or the like. The first speed may be, for example, 469 [times/ms], or the like. The second speed may be, for example, 938 [times/ms], or the like. The total number of random numbers may be, for example, the size of the random number MR3-2, i.e., "65519", the size of the random number MR3-3, "241", the size of the random number MR3-4, "251", or the like.
In such a configuration, even if the update speed becomes an integer multiple, the total number of random number values included in the update range is a different prime number, thereby suppressing synchronization between the first random number value and the second random number value, thereby enabling appropriate updating of the random number values.

(2-3) A gaming machine capable of playing a game,
An update means capable of updating the random value;
A processing means for executing a process related to game control by using the random number value updated by the updating means,
the updating means is capable of updating a first random value, a second random value different from the first random value, and a third random value different from the first random value and the second random value;
The processing means is capable of extracting the first random number value, the second random number value, and the third random number value when a common extraction condition is satisfied;
The first random value has an update rate of a first rate,
the second random number value and the third random number value are a second speed at which the update speed is an integer multiple of the first speed;
The total number of random values included in each update range may be different for the first random value, the second random value, and the third random value, and the total number of random values included in each update range may be a prime number.
Here, the gaming machine may be, for example, a pachinko gaming machine 1. The updating means may be, for example, a 16-bit random number circuit 104A, an 8-bit random number circuit 104B, or the like. The processing means may be, for example, a CPU 103 that executes a special symbol process P_TPROC. The first random number may be, for example, a random number MR3-2. The second random number may be, for example, a random number MR3-3. The third random number may be, for example, a random number MR3-4. The first speed may be, for example, 469 [times/ms], or the like. The second speed may be, for example, 938 [times/ms], or the like. The total number of random numbers may be, for example, the size of the random number MR3-2, "65519", the size of the random number MR3-3, "241", the size of the random number MR3-4, "251", or the like.
In such a configuration, even if the update speed becomes an integer multiple, the total number of random numbers included in the update range is a different prime number, thereby suppressing synchronization between the first random number value, the second random number value, and the third random number value, thereby making it possible to update the random number values appropriately.

(2-4) A gaming machine capable of playing a game,
An update means capable of updating the random value;
A processing means for executing a process related to game control by using the random number value updated by the updating means,
The update method is
a first update means for updating the first random number value and the second random number value within their respective update ranges by a random number update process;
a second update means capable of updating the third random number value and the fourth random number value within their respective update ranges by a random number clock signal;
At least one of the first random value and the second random value is such that a total number of random values included in the update range is a prime number;
At least one of the third random value and the fourth random value may be such that the total number of random value values included in the update range is a prime number.
Here, the gaming machine may be, for example, a pachinko gaming machine 1. The updating means may be, for example, a 16-bit random number circuit 104A, an 8-bit random number circuit 104B, or a CPU 103 that executes a random number updating process P_RANDOM. The processing means may be, for example, a CPU 103 that executes a special symbol process P_TPROC or a normal symbol process P_FPROC. The first random number value may be, for example, a random number MR2-1. The second random number value may be, for example, a random number MR1-2. The random number updating process may be, for example, a random number updating process P_RANDOM. The third random number value may be, for example, a random number MR3-3. The fourth random number value may be, for example, a random number MR3-4. The random number clock signal may be, for example, a system clock. The total number of random numbers included in the update range may be, for example, "199", which is the magnitude of random number MR2-1, "200", which is the magnitude of random number MR1-2, "241", which is the magnitude of random number MR3-3, and "251", which is the magnitude of random number MR3-4.
In such a configuration, the update methods of the first update means and the second update means are different, and even if the update methods are the same, at least one of the random number values has a total number of random number values included in the update range that is a prime number, thereby suppressing the occurrence of synchronization and enabling appropriate updating of the random number values.

(3-1) A gaming machine capable of playing a game,
An update means capable of updating the random value;
A processing means for executing a process related to game control using the random number value updated by the updating means;
a storage means including a storage area relating to the functions of the update means and the processing means;
The processing means is capable of executing a maximum value setting process for setting a maximum value of the random number values updated by the update means when a storage value is set in the storage area related to the function by a start-up process executed based on the start of power supply,
The update method is
A first update means capable of updating a first random number value consisting of a specific number of bytes;
and a second update means capable of updating a second random value that is configured with a predetermined number of bytes smaller than the specific number of bytes,
When executing the maximum value setting process, the processing means may set a maximum random value for the first random value and then set a maximum random value for the second random value.
Here, the gaming machine may be, for example, a pachinko gaming machine 1. The updating means may be, for example, a random number circuit 104. The processing means may be, for example, a CPU 103 that executes a special symbol process processing P_TPROC. The storage area related to the function may be, for example, a function setting register area of setting example AKA01 or a function control register area of setting example AKA02. The storage means may be, for example, a built-in register of the gaming control microcomputer 100. The startup processing may be, for example, a main processing P_MAIN for gaming control. The maximum value setting processing may be, for example, a portion of steps AKS11 to AKS13 in the power supply start corresponding processing P_POWER_ON. The specific number of bytes may be, for example, 2 bytes. The first random number value may be, for example, a random number MR3-2. The first updating means may be, for example, a 16-bit random number circuit 104A. The predetermined number of bytes may be, for example, 1 byte. The second random number value may be, for example, random numbers MR3-3, MR3-4, etc. The second update means may be, for example, an 8-bit random number circuit 104B, etc. Setting the maximum random number value of the first random number value and setting the maximum random number value of the second random number value may be performed by executing step AKS13 using the function setting register storage value table AKT01, etc.
In such a configuration, by setting a first random number value of a specific number of bytes and then setting a second random number value of a predetermined number of bytes, the first random number value and the second random number value can be stably updated, making it possible to update the random number values appropriately.

(3-2) The updating means may start updating the random numbers in order from the random number value for which the maximum random number value is set.
For example, it would be sufficient to use the function setting register storage value table AKT01 to set maximum values for the 16-bit random number circuit channel RL0 with channel number "0", the 16-bit random number circuit channel RL2 with channel number "2", and the 8-bit random number circuit channels RS1 to RS3 with channel numbers "1" to "3".
In such a configuration, the uncertainty of the random value is increased by the timing at which the update of the random value is started, reducing the processing load and enabling appropriate updating of the random value.

(3-3) A gaming machine capable of playing a game,
An update means capable of updating the random value;
A processing means for executing a process related to game control using the random number value updated by the updating means;
a storage means including a storage area relating to the functions of the update means and the processing means;
The processing means is capable of executing a maximum value setting process for setting a maximum value of the random number values updated by the update means when a storage value is set in the storage area related to the function by a start-up process executed based on the start of power supply,
The update method is
a first update means capable of updating the first random number value and the second random number value by a random number clock signal;
A second update means capable of updating the third random number value by a random number update process;
the first updating means, in the maximum value setting process executed by the processing means, starts updating the first random number value as a result of the setting of the maximum random number value of the first random number value, and then starts updating the second random number value as a result of the setting of the maximum random number value of the second random number value;
The second updating means may start updating the third random value after the processing means executes the maximum value setting process.
Here, the gaming machine may be, for example, a pachinko gaming machine 1. The updating means may be, for example, a random number circuit 104 or a CPU 103 that executes a random number updating process P_RANDOM. The processing means may be, for example, a CPU 103 that executes a special symbol process process P_TPROC or a normal symbol process process P_FPROC. The storage area related to the function may be, for example, a function setting register area of the setting example AKA01 or a function control register area of the setting example AKA02. The storage means may be, for example, a built-in register of the gaming control microcomputer 100. The startup process may be, for example, a main process P_MAIN for gaming control. The maximum value setting process may be, for example, a part of steps AKS11 to AKS13 in the power supply start corresponding process P_POWER_ON. The first random number value may be, for example, random numbers MR1-1, MR3-2, etc. The second random number value may be, for example, random numbers MR3-3, MR3-4, etc. The first update means may be, for example, a 16-bit random number circuit 104A, an 8-bit random number circuit 104B, etc. The third random number value may be, for example, random numbers MR1-2, MR2-1, etc. The random number update process may be, for example, a random number update process P_RANDOM, etc. The second update means may be, for example, a CPU 103 that executes the random number update process P_RANDOM in step S56. The first random number value update may be started by, for example, a part that sets maximum values to the 16-bit random number circuit channel RL0 with channel number "0" and the 16-bit random number circuit channel RL2 with channel number "2" using the function setting register storage value table AKT01. The second random number value update may be started by, for example, a part that sets maximum values to the 8-bit random number circuit channels RS1 to RS3 with channel numbers "1" to "3" using the function setting register storage value table AKT01. The updating of the third random number value may be started, for example, in the part where the random number update process P_RANDOM of step S56 is executed in the timer interrupt process P_PCT for game control after the power supply start response process P_POWER_ON of step S1 is executed.
In such a configuration, the uncertainty is increased by starting the update of random numbers such as MR1-1, which have a high correlation with the game value, first, thereby making it possible to update the random numbers appropriately.

(4-1) a storage means capable of storing information related to game control;
a storage means including a storage area relating to the functions of the update means and the processing means;
a specific storage area among the storage areas relating to the function can be set to a first storage value that prohibits access to the storage means in response to the start of power supply;
The processing means includes:
After setting a storage value in the storage area related to the function, a second storage value that allows access to the storage means can be set in the specific storage area;
As a next process after the second storage value is set in the specific storage area, a confirmation process may be executed to confirm whether or not the control state can be restored based on the stored contents of the storage means.
Here, the storage means may be, for example, a RAM 102. The storage area relating to the function may be, for example, a function setting register area of setting example AKA01 or a function control register area of setting example AKA02. The storage means may be, for example, a built-in register of the game control microcomputer 100. The specific storage area may be, for example, an RWM access protection register. The first storage value may be, for example, 00 [H]. The second storage value may be, for example, 01 [H]. The second storage value may be set in the specific storage area by, for example, executing step AKS14 in the power supply start response process P_POWER_ON. The confirmation process may be, for example, the RWM check process P_RWM_CHK of step S2.
In such a configuration, the contents stored in the storage means are prevented from being changed unnecessarily, so that the confirmation process can be executed reliably and the random number value can be updated appropriately.

(4-2) The processing means is
A stoppage storage process is executed to store recovery information for restoring a control state in a storage means in response to a power supply interruption,
After the stop time storage process is executed, a stop time storage process can be executed to set the first storage value in the specific storage area,
After the stop-time storage process is executed, the machine may transition to a standby state in which no game control is executed, and in response to the power supply being restored while in this standby state, the start-time process based on the start-up of the gaming machine may be executable from the beginning.
The recovery information may be, for example, checksum data. The stop-time storage process may be, for example, the checksum calculation process of step AKS39 or a portion of step AKS40 in the power-off process P_POWER_OFF. The stop-time storage process may be, for example, the portions of steps AKS41 and AKS42 in the power-off process P_POWER_OFF. The transition to the standby state may be, for example, the execution of steps AKS48 and AKS49 in the power-off process P_POWER_OFF. The executable from the beginning of the start-up process may be, for example, the execution of step AKS50 in the power-off process P_POWER_OFF and then the execution of a RET command.
In such a configuration, when the power supply is restored, unstable operation can be prevented and the random number values can be updated appropriately.

(4-3) a storage means capable of storing information related to game control;
a storage means including a storage area relating to the functions of the update means and the processing means;
The storage means includes, as a storage area relating to functions,
A first area for setting functions;
a second area for function control;
the second area includes a specific storage area in which a storage value indicating whether or not access to the storage means is permitted can be set;
The processing means, in a startup process executed based on the start of power supply,
A control storage process is executed to set a storage value in the second area,
After the control storage process is executed, a setting storage process can be executed to set a storage value in the first area,
After the setting storage process is executed, a storage value that permits access to the storage means may be set in the specific storage area.
Here, the storage means may be, for example, the RAM 102. The storage area relating to the function may be, for example, the function setting register area of the setting example AKA01 or the function control register area of the setting example AKA02. The storage means may be, for example, a built-in register of the game control microcomputer 100. The first area may be, for example, the function setting register area of the setting example AKA01. The second area may be, for example, the function control register area of the setting example AKA02. The specific storage area may be, for example, an RWM access protection register. The startup process may be, for example, the main process P_MAIN for game control. The control storage process may be, for example, the steps AKS5 to AKS7 in the power supply start response process P_POWER_ON. The setting storage process may be, for example, the steps AKS11 to AKS13 in the power supply start response process P_POWER_ON. The storage value can be set in the specific storage area by, for example, executing step AKS14 in the power supply start response process P_POWER_ON.
In such a configuration, it is possible to prevent the contents stored in the storage means from being changed unintentionally, and to update the random number values appropriately.

(SKY2021-664) A gaming machine that can be controlled to an advantageous state that is advantageous to a player,
An update means capable of updating the random value;
The random value includes a first random value and a second random value different from the first random value,
The result of determining the first random number has a greater effect on the payout rate than the result of determining the second random number,
The update means includes:
The first random value and the second random value can be updated in their respective update ranges by a common update process;
updating the first random value and then updating the second random value;
setting reference information for the first random value in an internal storage means using a specific command before updating the first random value by an update process;
Before updating the second random value by the update process, reference information for the second random value is set in an internally enabled means using the specific command.
Here, the payout rate is a rate calculated by using the number of game balls inserted into the gaming machine as the denominator and the number of game balls paid out to the player as the numerator. It is set as a design value for each gaming machine. If it exceeds 100%, it indicates that the number of game balls paid out to the player is greater than the number of game balls inserted into the gaming machine.
Here, the first random number corresponds to the random number for the winning symbol (MR1-2), and the second random number corresponds to the random number for the winning symbol for the normal symbol (MR2-1). The random number for the winning symbol is a random number used to determine the number of jackpot rounds that is the main opportunity for acquiring game balls (a random number for determining the display result of the special symbol linked to the number of jackpot rounds) (see FIG. 21-24 (C)). The random number for the winning symbol is a random number used to determine the opening time of the normal electric device (a random number for determining the display result of the normal symbol linked to the opening time of the normal electric device) (see FIG. 21-37 (D)). The determination by the random number for the winning symbol is for determining the number of jackpot rounds, and the determination by the random number for the winning symbol is for determining the opening time of the normal electric device, and the random number for the winning symbol has a greater influence on the number of game balls acquired. 15 game balls can be won by landing a ball in the big prize slot, whereas only 1 game ball can be won by landing a ball in a regular electric device.
In this configuration, since the first random number value has a greater impact on the number of balls won by the player, by performing the processing first, it is possible to prevent as much as possible the random number value becoming constant due to a malfunction, etc. (which would result in a biased period of time without updating), and by updating the random number using a common command, stable updates can be performed.

(SKY2021-665) A gaming machine that can be controlled to an advantageous state that is advantageous to a player,
An update means capable of updating the random value;
The random value includes a first random value and a second random value different from the first random value,
The update means includes:
The first random value and the second random value can be updated in their respective update ranges by a common update process;
A single compare and add instruction is the first operation of the update operation for the first random value and the update operation for the second random value, the compare and add instruction including: comparing the random value with a maximum random value; if the comparison result is less than the maximum random value, adding 1 to the random value; if the comparison result is equal to or greater than the maximum random value, changing the random value to a minimum random value;
When the first random number value is the minimum random number value, the result is not more advantageous than when the first random number value is other than the minimum random number value;
When the second random number value is the minimum random number value, the determination result is not more advantageous than when the second random number value is other than the minimum random number value.
Here, the display result with a high degree of advantage may not be determined, for example, in the example AKD01 of determining the number of times the large winning opening is opened or the example AKD02 of determining the mode of opening the large winning opening. Also, the normal electric device opening time in the example of determining the normal electric device opening time in FIG. 21-37(D) is designed to have no advantage or disadvantage, such as a uniform 16 ms in the normal state (time-saving operation designated value ×) and a uniform 5000 ms in the special state (time-saving operation designated value 0). However, the normal electric device opening time for the normal pattern designated value "00" in the example of determining the normal electric device opening time in FIG. 21-37(D) is 16 ms and 5000 ms, but it may be set to 10 ms and 3000 ms in order to make it relatively disadvantageous compared to other opening times. By doing so, when both the number of times the large prize opening is opened, which is the result of the first random number value (random number for winning symbols (MR1-2)), and the normal electric device opening time, which is the result of the second random number value (random number for normal winning symbols (MR2-1)), become the minimum random number value (00H), it is possible to prevent a favorable decision result (10 times for the number of times the large prize opening is opened, and 5000 ms for the normal electric device opening time).
In such a configuration, by executing the compare and add instruction first, the occurrence of a malfunction is suppressed and it is possible to update the random number value appropriately. If a malfunction occurs, the random number value will be slightly biased toward the minimum random number value. However, since the design is such that the decision result is not highly advantageous in such a case, it is possible to prevent the malfunction from being intentionally induced, and as a result, it is possible to update the random number value appropriately.

(SKY2021-708) A gaming machine that can be controlled to an advantageous state that is advantageous to a player,
An update means capable of updating the random value;
The random value includes a first random value used in a process regarding whether or not to control to the advantageous state, and a second random value different from the first random value,
The first random value is composed of a specific number of bytes, and the total number of random values included in the update range is a specific number;
The second random value is composed of the specific number of bytes, and the total number of random values included in the update range is a predetermined number smaller than the specific number,
The update speed of the first random value by the update means is faster than the update speed of the second random value by the update means.
Here, the advantageous state may be, for example, a jackpot gaming state. The gaming machine may be, for example, a pachinko gaming machine 1. The updating means may be, for example, a 16-bit random number circuit 104A, an 8-bit random number circuit 104B, etc. The processing means may be, for example, a CPU 103 that executes a special symbol process P_TPROC. The first random number value may be, for example, a random number MR1-1. The second random number value may be, for example, a random number MR3-2. The specific number of bytes may be, for example, 2 bytes. The specific number may be, for example, "65536", which is the size of the random number MR1-1. The predetermined number may be, for example, "65519", which is the size of the random number MR3-2. A fast update speed means, for example, that the update speed of random number MR1-1 in the comparative random number value AKA23 is 15,000 [times/ms] and the update speed of random number MR3-2 is 469 [times/ms].
In such a configuration, it becomes possible to appropriately update the random number value so that intentional control of an advantageous state becomes difficult due to a fast update speed of the first random number value related to the advantageous state.

(SKY2021-709) A gaming machine that can be controlled to an advantageous state that is advantageous to a player,
An update means capable of updating the random value;
The random value includes a first random value and a second random value different from the first random value,
The first random value is updated at a first rate;
The second random value is a second speed at which an update speed is an integer multiple of the first speed,
The first random number value and the second random number value are random number values obtained at the same opportunity,
the total number of random numbers included in each update range is different between the first random value and the second random value;
The first random value is a prime number, and a total number of random values included in the update range is a prime number.
The total number of the second random value included in the update range is a prime number.
Here, the gaming machine may be, for example, a pachinko gaming machine 1. The updating means may be, for example, a 16-bit random number circuit 104A, an 8-bit random number circuit 104B, or the like. The processing means may be, for example, a CPU 103 that executes a special symbol process P_TPROC, or the like. The first random number value may be, for example, a random number MR3-2. The second random number value may be, for example, a random number MR3-3, MR3-4, or the like. The first speed may be, for example, 469 [times/ms], or the like. The second speed may be, for example, 938 [times/ms], or the like. The total number of random numbers may be, for example, the size of the random number MR3-2, i.e., "65519", the size of the random number MR3-3, "241", the size of the random number MR3-4, "251", or the like.
In such a configuration, even if the update speed becomes an integer multiple, the total number of random number values included in the update range is a different prime number, thereby suppressing synchronization between the first random number value and the second random number value, thereby enabling appropriate updating of the random number values.

(SKY2021-710) A gaming machine that can be controlled to an advantageous state that is advantageous to a player,
An update means capable of updating the random value;
The random value includes a first random value, a second random value different from the first random value, and a third random value different from the first random value and the second random value;
The first random value is updated at a first rate;
the second random value and the third random value are a second speed at which an update speed is an integer multiple of the first speed,
The first random number value, the second random number value, and the third random number value are random number values obtained at the same opportunity,
the total number of random numbers included in each update range is different between the first random number value, the second random number value, and the third random number value;
The first random value is a prime number, and a total number of random values included in the update range is a prime number.
The second random value is a prime number, and a total number of random values included in the update range is a prime number.
The third random value is such that the total number of random values included in the update range is a prime number.
Here, the gaming machine may be, for example, a pachinko gaming machine 1. The updating means may be, for example, a 16-bit random number circuit 104A, an 8-bit random number circuit 104B, or the like. The processing means may be, for example, a CPU 103 that executes a special symbol process P_TPROC. The first random number may be, for example, a random number MR3-2. The second random number may be, for example, a random number MR3-3. The third random number may be, for example, a random number MR3-4. The first speed may be, for example, 469 [times/ms], or the like. The second speed may be, for example, 938 [times/ms], or the like. The total number of random numbers may be, for example, the size of the random number MR3-2, "65519", the size of the random number MR3-3, "241", the size of the random number MR3-4, "251", or the like.
In such a configuration, even if the update speed becomes an integer multiple, the total number of random numbers included in the update range is a different prime number, thereby suppressing synchronization between the first random number value, the second random number value, and the third random number value, thereby making it possible to update the random number values appropriately.

(SKY2021-711) A gaming machine that can be controlled to an advantageous state that is advantageous to a player,
a first update means for updating the first random number value and the second random number value within their respective update ranges by a random number update process;
A second update means capable of updating the third random number value and the fourth random number value within their respective update ranges by a random number clock signal;
At least one of the first random value and the second random value is a prime number, and a total number of random values included in an update range is a prime number;
At least one of the third random value and the fourth random value has an update range in which the total number of random value values is a prime number.
Here, the gaming machine may be, for example, a pachinko gaming machine 1. The updating means may be, for example, a 16-bit random number circuit 104A, an 8-bit random number circuit 104B, or a CPU 103 that executes a random number updating process P_RANDOM. The processing means may be, for example, a CPU 103 that executes a special symbol process P_TPROC or a normal symbol process P_FPROC. The first random number value may be, for example, a random number MR2-1. The second random number value may be, for example, a random number MR1-2. The random number updating process may be, for example, a random number updating process P_RANDOM. The third random number value may be, for example, a random number MR3-3. The fourth random number value may be, for example, a random number MR3-4. The random number clock signal may be, for example, a system clock. The total number of random numbers included in the update range may be, for example, "199", which is the magnitude of random number MR2-1, "200", which is the magnitude of random number MR1-2, "241", which is the magnitude of random number MR3-3, and "251", which is the magnitude of random number MR3-4.
In such a configuration, the update methods of the first update means and the second update means are different, and even if the update methods are the same, at least one of the random number values has a total number of random number values included in the update range that is a prime number, thereby suppressing the occurrence of synchronization and enabling appropriate updating of the random number values.

(SKY2021-712) A gaming machine capable of playing games,
A game control means for controlling a game;
a first update means capable of updating the first random number value and the second random number value by a random number clock signal;
A second update means capable of updating the third random number value by a random number update process,
The game control means is capable of executing a maximum value setting process for setting a maximum value of the first random number value and the second random number value when setting a storage value in a storage area by a startup process executed based on the start of power supply,
the first updating means, in the maximum value setting process, is capable of starting to update the first random value when a maximum random value of the first random value is set, and then starting to update the second random value when a maximum random value of the second random value is set;
The second updating means can start updating a third random value after updating of the first random value and updating of the second random value have started.
Here, the gaming machine may be, for example, a pachinko gaming machine 1. The updating means may be, for example, a random number circuit 104 or a CPU 103 that executes a random number updating process P_RANDOM. The processing means may be, for example, a CPU 103 that executes a special symbol process process P_TPROC or a normal symbol process process P_FPROC. The storage area related to the function may be, for example, a function setting register area of the setting example AKA01 or a function control register area of the setting example AKA02. The storage means may be, for example, a built-in register of the gaming control microcomputer 100. The startup process may be, for example, a main process P_MAIN for gaming control. The maximum value setting process may be, for example, a part of steps AKS11 to AKS13 in the power supply start corresponding process P_POWER_ON. The first random number value may be, for example, random numbers MR1-1, MR3-2, etc. The second random number value may be, for example, random numbers MR3-3, MR3-4, etc. The first update means may be, for example, a 16-bit random number circuit 104A, an 8-bit random number circuit 104B, etc. The third random number value may be, for example, random numbers MR1-2, MR2-1, etc. The random number update process may be, for example, a random number update process P_RANDOM, etc. The second update means may be, for example, a CPU 103 that executes the random number update process P_RANDOM in step S56. The first random number value update may be started by, for example, a part that sets maximum values to the 16-bit random number circuit channel RL0 with channel number "0" and the 16-bit random number circuit channel RL2 with channel number "2" using the function setting register storage value table AKT01. The second random number value update may be started by, for example, a part that sets maximum values to the 8-bit random number circuit channels RS1 to RS3 with channel numbers "1" to "3" using the function setting register storage value table AKT01. The updating of the third random number value may be started, for example, in the part where the random number update process P_RANDOM of step S56 is executed in the timer interrupt process P_PCT for game control after the power supply start response process P_POWER_ON of step S1 is executed.
In such a configuration, the uncertainty is increased by starting the update of random numbers such as MR1-1, which have a high correlation with the game value, first, thereby making it possible to update the random numbers appropriately.

(SKY2021-713) A gaming machine capable of playing games,
A game control means for controlling a game;
A storage means capable of storing information relating to game control;
A storage means including a storage area related to a function of controlling a game,
The storage means includes, as a storage area relating to functions,
A first area for setting functions related to game control;
A second area for controlling functions related to game control,
the second area includes a specific storage area in which a storage value indicating whether or not access to the storage means is permitted can be set;
The game control means performs a startup process based on the start of power supply,
A control storage process for setting a storage value in the second area is executable,
After the control storage process is executed, a setting storage process can be executed to set a storage value in the first area,
After the setting storage process is executed, a storage value that permits access to the memory means can be set in the specific storage area.
Here, the storage means may be, for example, the RAM 102. The storage area relating to the function may be, for example, the function setting register area of the setting example AKA01 or the function control register area of the setting example AKA02. The storage means may be, for example, a built-in register of the game control microcomputer 100. The first area may be, for example, the function setting register area of the setting example AKA01. The second area may be, for example, the function control register area of the setting example AKA02. The specific storage area may be, for example, an RWM access protection register. The startup process may be, for example, the main process P_MAIN for game control. The control storage process may be, for example, the steps AKS5 to AKS7 in the power supply start response process P_POWER_ON. The setting storage process may be, for example, the steps AKS11 to AKS13 in the power supply start response process P_POWER_ON. The storage value can be set in the specific storage area by, for example, executing step AKS14 in the power supply start response process P_POWER_ON.
In such a configuration, it is possible to prevent the contents stored in the storage means from being changed unintentionally, and to update the random number values appropriately.

The various configurations described above are not limited to pachinko machines, but can also be applied to slot machines, etc.

1 Pachinko game machine 2 Game board 4A First special symbol display device 4B Second special symbol display device 5 Image display device 9 Game effect lamp 11 Main board 12 Performance control board 31B Push button 31B
32 Movable body 100 Game control microcomputer 120 Performance control CPU

Claims (1)

A gaming machine that can be controlled to an advantageous state that is advantageous to a player by executing a variable display of specific identification information and deriving a specific display result as a result of the variable display of the specific identification information,
A game control means;
A performance control means;
A display means;
a movable body movable from a first position to a second position different from the first position,
The game control means includes:
It is possible to determine whether or not the game medium is controlled to the advantageous state based on the entry of the game medium into the starting area,
A variable display of the specific identification information is possible,
Based on the result of the judgment, it is possible to determine one of a plurality of fluctuation patterns including a first fluctuation pattern which is a fluctuation pattern controlled to the advantageous state, a second fluctuation pattern which is a fluctuation pattern not controlled to the advantageous state, a third fluctuation pattern which is a fluctuation pattern controlled to the advantageous state, and a fourth fluctuation pattern which is a fluctuation pattern not controlled to the advantageous state;
When the first variation pattern is determined, a first command can be transmitted to the performance control means;
When the second variation pattern is determined, a second command can be transmitted to the performance control means;
When the third variation pattern is determined, a third command can be transmitted to the performance control means;
When the fourth variation pattern is determined, a fourth command can be transmitted to the performance control means;
The performance control means includes:
When the first command is received, it is possible to notify that the advantageous state will be controlled in a first reach,
When the second command is received, it is possible to notify that the first reach is not controlled to the advantageous state,
When the third command is received, it is possible to notify that the advantageous state will be controlled in a second reach,
When the fourth command is received, it is possible to notify that the second reach is not controlled to the advantageous state,
The execution time of the title display corresponding to the first reach is different from the execution time of the title display corresponding to the second reach,
The title display corresponding to the first reach and the title display corresponding to the second reach are
A first part from when a title display corresponding to the first reach or a title display corresponding to the second reach starts to when the title display is displayed in a specific area;
A second part in which a title display corresponding to the first reach or a title display corresponding to the second reach is displayed in the specific area;
and a third part that ends the display of a title display corresponding to the first reach or a title display corresponding to the second reach,
The display means is
displaying a title display corresponding to the first reach such that the second part is longer than the first part and the third part, and the first part is longer than the third part;
displaying a title display corresponding to the second reach such that the second part is longer than the first part and the third part, and the first part is longer than the third part,
The development pattern to the first reach includes a first pattern in which the movable body develops by moving, and a second pattern in which the movable body develops without moving,
The development pattern to the second reach includes the first pattern and the second pattern,
In the first reach of the first pattern, the movable body moves from the first position to the second position before a title display corresponding to the first reach starts, and after the movable body located at the second position moves to the first position, the title display corresponding to the first reach is displayed;
In the second reach of the first pattern, the movable body moves from the first position to the second position before a title display corresponding to the second reach starts, and after the movable body located at the second position moves to the first position, a title display corresponding to the second reach is displayed;
The second reach has a higher expectation of being controlled to the advantageous state than the first reach,
the display means displays the title display corresponding to the second reach in a larger font size than the title display corresponding to the first reach,
In the first reach and the second reach, a light emitting means is controlled using a brightness data table configured with brightness data,
When the title display corresponding to the first reach is executed, a title display brightness data table corresponding to the first reach is used;
In the introductory part after the title display corresponding to the first reach, a brightness data table for the first reach introductory part is used,
When the title display corresponding to the second reach is executed, a title display brightness data table corresponding to the second reach is used;
In the introductory part after the title display corresponding to the second reach, a luminance data table for the second reach introductory part is used,
A storage means capable of storing information relating to game control;
A storage means including a storage area related to a function of controlling a game,
The storage means includes:
a first area in which a value indicating whether or not to use a predetermined circuit provided in the gaming machine can be set;
a second area in which a value used for controlling at least the predetermined circuit can be set;
the second area includes a specific storage area in which an access permission value indicating that access to the storage means is permitted can be set,
The game control means performs a startup process based on the start of power supply,
A setting storage process is executed to set a value indicating that the predetermined circuit is to be used in the first area;
A gaming machine , wherein the access permission value can be set in the specific storage area after the setting storage process is executed .

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