JP7639484B2 - Quantum operation device and its manufacturing method - Google Patents

Description

This disclosure relates to a quantum computing device and a method for manufacturing the same.

Quantum computing devices using superconducting qubits are being studied. To achieve superconductivity and reduce noise caused by heat, cooling sources with extremely high cooling capacity, such as dilution refrigerators, are used.

JP 2020-61554 A JP 2020-61447 A International Publication No. 2020/075150

Increasing the number of built-in quantum bits is an effective way to improve the performance of quantum computing devices. However, as the number of quantum bits increases, the number of control lines that control the quantum bits also increases, making it easier for heat to flow into the quantum chip containing the quantum bits through the control lines. For this reason, with conventional technology, it is difficult to increase the number of quantum bits without further improving the cooling capacity.

The objective of this disclosure is to provide a quantum computing device and a method for manufacturing the same that can increase the number of quantum bits without improving the cooling capacity of the cooling source.

According to one embodiment of the present disclosure, there is provided a quantum computing device having a first substrate, a second substrate, a quantum chip provided on the first substrate and including a plurality of quantum bit sections each functioning as a quantum bit, a sending section provided on the second substrate and sending a microwave control signal for controlling the plurality of quantum bit sections to the plurality of quantum bits through space, a first cooling source for cooling the first substrate, and a second cooling source for cooling the second substrate.

According to this disclosure, the number of quantum bits can be increased without improving the cooling capacity of the cooling source.

FIG. 1 is a diagram illustrating a quantum processing device according to a first embodiment. FIG. 13 is a diagram illustrating a quantum processing device according to a second embodiment. FIG. 13 is a diagram illustrating a quantum processing device according to a third embodiment. FIG. 13 is a diagram illustrating a quantum processing device according to a fourth embodiment.

Embodiments of the present disclosure will be described in detail below with reference to the accompanying drawings. Note that in this specification and drawings, components having substantially the same functional configurations may be denoted by the same reference numerals to avoid redundant description.

First Embodiment
First, a first embodiment will be described. The first embodiment relates to a quantum processing device. Fig. 1 is a diagram showing a quantum processing device according to the first embodiment.

As shown in FIG. 1, the quantum computing device 100 according to the first embodiment has a quantum circuit board 110, a control waveform sending board 120, and a control unit 130.

The quantum circuit board 110 is provided with a quantum chip 111. The quantum circuit board 110 includes a circuit to which the quantum chip 111 is connected. The quantum chip 111 includes a plurality of quantum bit sections 112 each functioning as a quantum bit, and a plurality of reception patterns 113 each connected to the quantum bit sections 112. The reception patterns 113 function as reception antennas. The number of quantum bit sections 112 is equal to the number of reception patterns 113. The quantum bit sections 112 and the reception patterns 113 are connected to each other, for example, via a coplanar line (CPW) 114. The number of sets of quantum bit sections 112 and reception patterns 113 is not limited, and may be, for example, 16 or 64. The quantum circuit board 110 is an example of a first board.

The control waveform sending board 120 is provided with a sending section 121. The sending section 121 includes a plurality of sending patterns 123, each of which corresponds to a quantum bit section 112. The sending patterns 123 function as sending antennas. The number of sending patterns 123 is equal to the number of quantum bit sections 112. The control waveform sending board 120 has the same number of coaxial connectors 124 as the sending patterns 123. The control waveform sending board 120 is an example of a second board.

The quantum circuit board 110 and the control waveform sending board 120 are arranged apart from each other, and face each other. The distance between the quantum circuit board 110 and the control waveform sending board 120 is, for example, about 100 μm to 1 mm. There is a space between the quantum circuit board 110 and the control waveform sending board 120. This space is usually a vacuum.

The control unit 130 includes the same number of waveform generators 131 as the quantum bit units 112. One end of a coaxial cable 141 is connected to each waveform generator 131, and the other end of the coaxial cable 141 is connected to the input of an attenuator 151. One end of a coaxial cable 142 is connected to the output of the attenuator 151, and the other end of the coaxial cable 142 is connected to the input of an attenuator/filter 152. One end of a coaxial cable 143 is connected to the output of the attenuator/filter 152, and the other end of the coaxial cable 143 is connected to the coaxial connector 124 of the control waveform sending board 120.

The quantum computing device 100 further includes a first cooling source 161, a second cooling source 162, and a third cooling source 163. The first cooling source 161 cools the quantum circuit board 110. The first cooling source 161 is, for example, a dilution refrigerator, and cools the quantum circuit board 110 to a temperature of about 10 mK. The second cooling source 162 mainly cools the control waveform sending board 120 and the attenuator/filter 152. The second cooling source 162 cools the control waveform sending board 120 and the attenuator/filter 152 to a temperature of about 100 mK. The third cooling source 163 mainly cools the attenuator 151. The third cooling source cools the attenuator 151 to a temperature of about several K. The temperature of the control unit 130 including the waveform generator 131 is, for example, room temperature.

In this way, the first cooling source 161 cools the quantum circuit board 110 to a first temperature (e.g., about 10 mK), and the second cooling source 162 cools the control waveform sending board 120 to a second temperature (e.g., about 100 mK) higher than the first temperature. The second cooling source 162 may be coupled to the control waveform sending board 120 to directly cool the control waveform sending board 120, or may indirectly cool the control waveform sending board 120 via the ground conductor of the coaxial cable 143.

In the quantum computing device 100, the waveform generator 131 generates and outputs a microwave control signal that controls the quantum bit unit 112. The frequency of the control signal is, for example, about 5 GHz. The control signal output from the waveform generator 131 is input to the sending unit 121 via the coaxial cable 141, the attenuator 151, the coaxial cable 142, the attenuator/filter 152, the coaxial cable 143, and the coaxial connector 124. The sending unit 121 sends out the input control signal from the sending pattern 123. The control signal sent out from the sending pattern 123 reaches the quantum chip 111 through the space between the control waveform sending board 120 and the quantum circuit board 110. The control signal that reaches the quantum chip 111 is input to the quantum bit unit 112 via the receiving pattern 113, and the quantum bit unit 112 is controlled.

In the quantum computing device 100, the control waveform sending board 120 and the quantum circuit board 110 are separated by a space, and a control signal is transmitted through the space. Therefore, there is no need to connect a coaxial cable to the quantum circuit board 110, and even if the number of quantum bit sections 112 is increased, heat from the control waveform sending board 120 is unlikely to flow into the quantum circuit board 110. Therefore, the number of quantum bit sections 112 provided on the quantum circuit board 110 can be increased without strengthening the cooling capacity.

In addition, since there is no need to connect a coaxial cable to the quantum circuit board 110, noise transmitted through the coaxial cable can also be suppressed.

Note that if the quantum bit unit 112 has the function of receiving a control signal sent from the sending pattern 123, the receiving pattern 113 does not need to be provided.

When manufacturing a quantum computing device 100 having such a configuration, first, a quantum circuit board 110 provided with a quantum chip 111 and a control waveform sending board 120 provided with a sending unit 121 are prepared, and then these are positioned. In addition, a first cooling source 161 is provided so that the quantum circuit board 110 can be cooled, and a second cooling source 162 is provided so that the control waveform sending board 120 can be cooled. The connection of the coaxial cable 143 to the control waveform sending board 120, etc. may be performed before or after the above process.

Furthermore, the number of sending patterns 123 and the number of quantum bit units 112 do not have to match. For example, if a multiplexed control signal can be sent from one sending pattern 123 to multiple quantum bit units 112, the number of sending patterns 123 may be less than the number of quantum bit units 112. Furthermore, if a quantum bit unit is controlled via another quantum bit unit to which it is coupled, the number of sending patterns 123 may be less than the number of quantum bit units 112.

Second Embodiment
Next, a second embodiment will be described below. Fig. 2 is a diagram showing a quantum processing device according to the second embodiment.

As shown in FIG. 2, in the quantum computing device 200 according to the second embodiment, a plurality of spacers 201 are provided between the surface 110A of the quantum circuit board 110 facing the control waveform sending board 120 and the surface 120A of the control waveform sending board 120 facing the quantum circuit board 110. For example, three or more spacers 201 are provided. When the shape of the control waveform sending board 120 is rectangular in a plan view from a direction perpendicular to the surface 120A, a total of four spacers 201 may be provided at the four corners. Also, a total of five spacers 201 may be provided in the center in addition to the four corners. The arrangement of the spacers 201 is arbitrary.

The spacer 201 is preferably made of a material with low thermal conductivity. Examples of materials for the spacer 201 include a niobium titanium (NbTi) alloy that becomes superconducting at a temperature equal to or higher than the cooling temperature (approximately 100 mK) by the second cooling source 162, solder, and the like. An organic resin may also be used as the material for the spacer 201. The shape of the spacer 201 may be, for example, spherical or columnar. The diameter of the spacer 201 is, for example, approximately 100 μm to 1 mm.

For example, the spacer 201 can be fused to the surface 120A of the control waveform sending substrate 120 in advance, and then aligned and attached to the quantum circuit substrate 110, and pressed to fix the spacer 201 to the quantum circuit substrate 110.

A heat block 210 is attached to the surface 110B of the quantum circuit board 110 opposite the surface 110A. The heat block 210 is, for example, a copper (Cu) material. A gold (Au) plating film may be provided on the surface of the Cu material. The heat block 210 and the quantum circuit board 110 are in contact with the first cooling source 161. The first cooling source 161 has a plate-like shape, and a through hole 261 is formed in the first cooling source 161.

The attenuator/filter 152 is in contact with the second cooling source 162. The ground conductor of the coaxial cable 143 is in contact with the second cooling source 162. The coaxial cable 143 passes through the through hole 261 of the first cooling source 161, extends to the opposite side of the second cooling source 162 from the first cooling source 161, and is connected to the coaxial connector 124 (see FIG. 1) of the control waveform sending board 120. A heat insulating support member 262 that supports the coaxial cable 143 is provided inside the through hole 261. The heat insulating support member 262 is preferably made of a material with low thermal conductivity. Examples of materials for the heat insulating support member 262 include organic resins such as polytetrafluoroethylene (PTFE).

The other configurations are the same as those of the first embodiment. For example, FIG. 2 shows only one set of coaxial cable 142, attenuator/filter 152, coaxial cable 143, through hole 261, and heat insulating support member 262, but these are provided in the same number as the quantum bit section 112.

The second embodiment can achieve the same effect as the first embodiment. In addition, since the spacer 201 is provided, it is easy to adjust the distance between the transmission pattern 123 and the reception pattern 113 with high precision, and it is easy to reduce signal loss and crosstalk of the control waveform between multiple quantum bit sections.

Furthermore, the quantum circuit board 110 is disposed on the opposite side of the first cooling source 161 from the second cooling source 162. Therefore, the quantum circuit board 110 is less susceptible to the effects of the second cooling source 162. Furthermore, the portion of the coaxial cable 143 within the through hole 261 is thermally separated from the first cooling source 161 by the heat insulating support member 262. Therefore, the first cooling source 161 is less susceptible to the effects of the heat of the coaxial cable 143.

Third Embodiment
Next, a third embodiment will be described below. Fig. 3 is a diagram showing a quantum processing device according to the third embodiment.

As shown in FIG. 3, in the quantum computing device 300 according to the third embodiment, a reception pattern 313 is provided outside the quantum chip 111 instead of the reception pattern 113. In this example, the quantum chip 111 includes 16 quantum bit sections 112, and 16 reception patterns 313 are provided on the surface 110A of the quantum circuit substrate 110. Each reception pattern 313 is connected to the quantum bit section 112 in the quantum chip 111 via a coplanar line 314. In a plan view from a direction perpendicular to the surface 110A, the 16 reception patterns 313 are arranged to surround the quantum chip 111.

In the control waveform sending board 120, the sending patterns 123 are arranged on the surface 120A so as to face the receiving patterns 313. In a plan view from a direction perpendicular to the surface 120A, an opening 325 is formed in the control waveform sending board 120 so as to be surrounded by 16 sending patterns 123. In a plan view from a direction perpendicular to the surface 110A of the quantum circuit board 110, for example, the opening 325 is larger than the quantum chip 111, and the entire quantum chip 111 can be seen through the opening 325.

The other configurations are the same as those of the second embodiment. For example, although not shown, a spacer 201 and the like are provided.

The third embodiment can also achieve the same effect as the second embodiment. In addition, since an opening 325 is formed in the control waveform sending board 120, the quantum chip 111 can be made less susceptible to the effects of signals transmitted within the control waveform sending board 120.

Fourth Embodiment
Next, a fourth embodiment will be described below. Fig. 4 is a diagram showing a quantum processing device according to the fourth embodiment.

As shown in FIG. 4, in the quantum computing device 400 according to the fourth embodiment, a plurality of quantum chips 111, for example, nine quantum chips 111, are provided on the quantum circuit board 110. Of the nine quantum chips 111, five quantum chips 111 are provided on the surface 110A, and four quantum chips 111 are provided on the surface 110B. When viewed through the quantum circuit board 110, the nine quantum chips 111 are arranged in a lattice pattern. Although not shown, as in the third embodiment, a plurality of reception patterns 313 (see FIG. 3) are provided around each quantum chip 111 and are connected to the quantum bit section 112 in the quantum chip 111.

The quantum circuit board 110 is made of, for example, Si, and includes, for example, three wiring layers. One of the three wiring layers is provided on the surface 110A, the other layer is provided on the surface 110B, and the other layer is provided between the surfaces 110A and 110B. The wiring layers adjacent in the thickness direction are connected to each other via through-hole vias. The through-hole vias are preferably made of a material that becomes superconducting at the temperature (approximately 10 mK) cooled by the first cooling source 161. The multiple quantum chips 111 are connected to each other via such multi-layer wiring.

Five openings 325 are formed in the control waveform sending board 120, similar to the third embodiment, so that each opening corresponds to the five quantum chips 111 provided on the surface 110A of the quantum circuit board 110. Although not shown, a plurality of sending patterns 123 (see FIG. 3) are provided for each opening 325 on the surface 120A of the control waveform sending board 120 facing the quantum circuit board 110, so as to surround the opening 325. For example, the sending patterns 123 provided on the surface 120A each face the receiving patterns 313 provided on the surface 110A.

The quantum computing device 400 further includes a control waveform sending board 420. The control waveform sending board 420 has the same configuration as the control waveform sending board 120, except for the arrangement of the openings. The control waveform sending board 420 has four openings 325 formed thereon, as in the third embodiment, so that each opening corresponds to one of the four quantum chips 111 provided on the surface 110B of the quantum circuit board 110. Although not shown, a plurality of sending patterns 123 (see FIG. 3) are provided for each opening 325 on the surface 420A of the control waveform sending board 420 facing the quantum circuit board 110, so as to surround the opening 325. For example, the sending patterns 123 provided on the surface 420A face the receiving patterns 313 provided on the surface 110B.

In addition, a heat transfer frame 410 is provided in place of the heat block 210. The heat transfer frame 410 is in contact with a portion of the outer periphery of the quantum circuit board 110 and is in contact with the first cooling source 161 (see FIG. 2). The heat transfer frame 410 is, for example, a copper (Cu) material. A gold (Au) plating film may be provided on the surface of the Cu material.

The other configurations are the same as in the third embodiment.

The fourth embodiment can also achieve the same effects as the third embodiment. In addition, since multiple quantum chips 111 are provided on the quantum circuit board 110, the quantum bit sections 112 can be integrated at a higher density.

Although the preferred embodiments have been described above in detail, the present invention is not limited to the above-described embodiments, and various modifications and substitutions can be made to the above-described embodiments without departing from the scope of the claims.

Various aspects of this disclosure are summarized below as appendices.

(Appendix 1)
A first substrate;
A second substrate;
A quantum chip provided on the first substrate, the quantum chip including a plurality of quantum bit units each functioning as a quantum bit;
a transmitter provided on the second substrate and configured to transmit a microwave control signal for controlling the plurality of quantum bit units to the plurality of quantum bits through space;
a first cooling source for cooling the first substrate;
a second cooling source for cooling the second substrate;
A quantum computing device comprising:
(Appendix 2)
the first cooling source cools the first substrate to a first temperature;
The quantum computing device according to claim 1 , wherein the second cooling source cools the second substrate to a second temperature higher than the first temperature.
(Appendix 3)
The first substrate and the second substrate face each other,
the quantum chip is provided on a surface of the first substrate facing the second substrate,
The quantum processing device according to claim 1 or 2, wherein the sending section is provided on a surface of the second substrate facing the first substrate.
(Appendix 4)
4. The quantum computing device according to claim 3, further comprising a spacer provided between the first substrate and the second substrate.
(Appendix 5)
5. The quantum processing device according to claim 3, wherein an opening is formed in a portion of the second substrate facing the quantum chip.
(Appendix 6)
6. The quantum computing device according to claim 1, wherein the sending section has a plurality of sending patterns each corresponding to the quantum bit section.
(Appendix 7)
7. The quantum computing device according to claim 1, further comprising a plurality of receiving patterns provided on the first substrate, each of the receiving patterns being connected to the quantum bit unit.
(Appendix 8)
the second cooling source is disposed on one side of the first cooling source,
The quantum processing device according to any one of claims 1 to 7, wherein the first substrate and the second substrate are arranged on the other side of the first cooling source.
(Appendix 9)
A plurality of the quantum chips are provided on the first substrate,
9. The quantum computing device according to claim 1, wherein the sending unit sends the control signal to each of the quantum bit units included in the quantum chips.
(Appendix 10)
preparing a first substrate having a quantum chip including a plurality of quantum bit portions each functioning as a quantum bit;
preparing a second substrate provided with a transmitter that transmits a microwave control signal for controlling the plurality of quantum bit units toward the plurality of quantum bits through space;
aligning the first substrate and the second substrate with respect to one another;
providing a first cooling source for cooling the first substrate and a second cooling source for cooling the second substrate;
A method for manufacturing a quantum computing device comprising the steps of:

100, 200, 300, 400: quantum computing device 110: quantum circuit board 110A, 110B: surface 111: quantum chip 112: quantum bit section 113, 313: receiving pattern 120, 420: control waveform sending board 120A, 420A: surface 121: sending section 123: sending pattern 130: control section 161: first cooling source 162: second cooling source 201: spacer 325: opening

Claims (9)

A first substrate;
A second substrate;
A quantum chip provided on the first substrate, the quantum chip including a plurality of quantum bit units each functioning as a quantum bit;
a transmitter provided on the second substrate and configured to transmit a microwave control signal for controlling the plurality of quantum bit units to the plurality of quantum bits through space;
a first cooling source for cooling the first substrate;
a second cooling source for cooling the second substrate;
A quantum computing device comprising: the first cooling source cools the first substrate to a first temperature;
The quantum computing device according to claim 1 , wherein the second cooling source cools the second substrate to a second temperature higher than the first temperature. The first substrate and the second substrate face each other,
the quantum chip is provided on a surface of the first substrate facing the second substrate,
3. The quantum processing device according to claim 1, wherein the sending section is provided on a surface of the second substrate facing the first substrate. The quantum computing device according to claim 3, characterized in that it has a spacer provided between the first substrate and the second substrate. The quantum computing device according to claim 3 or 4, characterized in that an opening is formed in a portion of the second substrate facing the quantum chip. The quantum computing device according to any one of claims 1 to 5, characterized in that the sending unit has a plurality of sending patterns, each of which corresponds to the quantum bit unit. The quantum computing device according to any one of claims 1 to 6, characterized in that it has a plurality of receiving patterns provided on the first substrate, each of which is connected to the quantum bit unit. the second cooling source is disposed on one side of the first cooling source,
The quantum processing device according to claim 1 , wherein the first substrate and the second substrate are disposed on the other side of the first cooling source. preparing a first substrate having a quantum chip including a plurality of quantum bit portions each functioning as a quantum bit;
preparing a second substrate provided with a transmitter that transmits a microwave control signal for controlling the plurality of quantum bit units toward the plurality of quantum bits through space;
aligning the first substrate and the second substrate with respect to one another;
providing a first cooling source for cooling the first substrate and a second cooling source for cooling the second substrate;
A method for manufacturing a quantum computing device comprising the steps of:

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