JP7715499B2 - Amplification equipment - Google Patents

Description

The present invention relates to an amplification device.

A chopper-stabilized amplifier, as shown in Figure 16, is known as an amplifier device for amplifying small signals such as sensor signals. The chopper-stabilized amplifier 100 described above includes a chopper modulator 101, an amplifier 102, and a chopper modulator 103. In the configuration shown in Figure 16, an offset component (Voffset) and a low-frequency noise component (1/fnoise) are generated in the amplifier 102. Therefore, the chopper modulator 101 modulates the low-frequency signal component to a high-frequency component with fewer offset and low-frequency noise components from the amplifier 102. The output of the chopper modulator 101 is amplified by the amplifier 102 and then input to the chopper modulator 103. The chopper modulator 103 demodulates the signal component of the amplifier 102 output to the low-frequency component and modulates the offset and low-frequency components to the high-frequency component. This reduces the overall offset and low-frequency noise components of the chopper-stabilized amplifier 100.

Furthermore, methods for reducing the offset component and low-frequency noise component of the above-mentioned chopper-stabilized amplifier 100 have been proposed, as described in Patent Documents 1 to 4 and Non-Patent Document 1.

The chopper modulators 101 and 103 that make up the chopper stabilized amplifier 100 described above are composed of two pairs of switches, and modulation is performed by alternately turning these two pairs of switches on and off. As a result, sawtooth spike noise is generated when the switches are turned on and off. Since sawtooth spike noise contains a DC component, if the spike noise is large it can become a residual offset voltage in the chopper stabilized amplifier 100, potentially causing degradation of its characteristics.

A method for reducing this spike noise is proposed in Non-Patent Document 2. Non-Patent Document 2 describes a method in which, when switching the switches in the output-side chopper modulator 103, all switches are temporarily turned off to enter a non-overlap state, or disconnection state, to prevent spike noise from being output.

However, during the non-overlap state, error charges accumulate in the parasitic capacitance connected to the input of the chopper modulator 103 due to spike noise, and when the switch of the chopper modulator 103 is turned on, the error charges are output as spike noise, which is a problem.

Therefore, as in Patent Document 5, there is a method of discharging the error charge accumulated in the parasitic capacitance while the chopper modulator 103 is in a non-overlap state by turning on a discharge switch.

U.S. Patent No. 6,476,671 U.S. Patent No. 7,292,095 U.S. Patent No. 7,764,118 U.S. Patent No. 8,120,422 U.S. Pat. No. 9,685,933

Ion E. Opris and Gregory T.A. Kovacs, “A Rail-to-Rail Ping-Pong Op-Amp”, IEEE J. Solid-State Circuits, vol. 31, no 9, pp. 1320-1324, Sep. 1996. Qiuting Huang and Christian Menolfi, “A 200nV Offset 6.5nV/√Hz Noise PSD 5.6kHz Chopper Instrumentation Amplifier”, IEEE ISSCC Digest of Technical Papers, pp. 362-363, Feb. 2001.

In the conventional method described above, in order to control the discharge switch, it is necessary to generate a clock that is on only for the short period of time when the chopper modulator 103 is in a non-overlap state. However, because the non-overlap state is relatively short, a complex circuit that generates a high-speed control clock and a switch that responds to the high-speed control clock are required, which increases the circuit area and makes circuit design more difficult.

The present invention was made in consideration of the above-mentioned circumstances, and its purpose is to provide a high-precision amplification device that reduces residual offset caused by spike noise with greater precision, without requiring complex circuits to generate high-speed control clocks or high-speed switches.

In order to achieve the above-mentioned object, the amplifier according to the present invention is characterized by the following features [1] to [8].
[1]
a first chopper modulator including a first switch connected between a first positive input and a first positive output, a second switch connected between a first negative input and a first negative output, a third switch connected between the first negative input and the first positive output, and a fourth switch connected between the first positive input and the first negative output, wherein the first switch and the second switch are turned off and the third switch and the fourth switch are turned on to alternately switch between an inverting path in which an input and an output are invertedly connected, and a non-inverting path in which the third switch and the fourth switch are turned off and the first switch and the second switch are turned on to modulate an input signal to a high frequency band;
an amplifier for amplifying the output of the first chopper modulator;
a second chopper modulator having a fifth switch connected between a second positive input and a second positive output, a sixth switch connected between a second negative input and a second negative output, a seventh switch connected between the second negative input and the second positive output, and an eighth switch connected between the second positive input and the second negative output, the second chopper modulator alternately switching between an inverting path in which an input and an output are inverted by turning the fifth switch and the sixth switch off and the seventh switch and the eighth switch on and a non-inverting path in which the input and output are non-inverted by turning the seventh switch and the eighth switch off and the fifth switch and the sixth switch on to demodulate the input signal modulated by the first chopper modulator and amplified by the amplifier , and modulating an offset component and a low-frequency noise component of the amplifier to a high-frequency band;
the first chopper modulator is controlled to a non-overlap state in which, when switching between the inverting path and the non-inverting path, all of the first switch to the fourth switch are turned off to disconnect the first positive input from the first positive output and the first negative output, and disconnect the first negative input from the first positive output and the first negative output to be in an open state;
the second chopper modulator is controlled to an overlap state in which, when switching between the inverting path and the non-inverting path, all of the fifth switch to the eighth switch are turned on to short-circuit the second positive input and the second positive output and the second negative output, and also short-circuit the second negative input and the second positive output and the second negative output;
When the first chopper modulator is in the non-overlap state, the second chopper modulator is in the overlap state.
It is an amplification device.
[2]
[1] The amplification device according to [1],
a twin switch circuit having a third positive input connected to the second positive output of the second chopper modulator and a third negative input connected to the second negative output of the second chopper modulator,
the twin switch circuit includes a ninth switch and a tenth switch connected in parallel between the third positive input and the third positive output, and an eleventh switch and a twelfth switch connected in parallel between the third negative input and the third negative output, and is controlled to a non-overlapping state in which all of the ninth switch to the twelfth switch are turned off to disconnect the third positive input from the third positive output and to disconnect the third negative input from the third negative output, when switching between a first path in which input and output are connected in a non-inverting manner by turning the ninth switch and the eleventh switch on and the tenth switch and the twelfth switch off, and a second path in which input and output are connected in a non-inverting manner by turning the tenth switch and the twelfth switch on and the ninth switch and the eleventh switch off ;
when the second chopper modulator is in the overlap state, the twin switch circuit is in the non-overlap state;
It is an amplification device.
[3]
[1] or [2],
a clock supply unit that supplies an overlap clock to the fifth switch to the eighth switch, which causes the second chopper modulator to periodically transition from an inverting state in which the inverting path is connected and the non-inverting path is disconnected, to the overlap state, to a non-inverting state in which the non-inverting path is connected and the inverting path is disconnected, and to the overlap state, in that order;
It is an amplification device.
[4]
[2] The amplification device according to [2],
a clock supply unit that supplies a non-overlapping clock to the ninth switch to the twelfth switch, which causes the twin switch circuit to periodically transition in the order of a first path state in which the first path is connected and the second path is disconnected, the non-overlapping state, a second path state in which the second path is connected and the first path is disconnected, and the non-overlapping state;
It is an amplification device.
[5]
a first chopper modulator including a first switch connected between a first positive input and a first positive output, a second switch connected between a first negative input and a first negative output, a third switch connected between the first negative input and the first positive output, and a fourth switch connected between the first positive input and the first negative output, wherein the first switch and the second switch are turned off and the third switch and the fourth switch are turned on to alternately switch between an inverting path in which an input and an output are invertedly connected, and a non-inverting path in which the third switch and the fourth switch are turned off and the first switch and the second switch are turned on to modulate an input signal to a high frequency band;
an amplifier for amplifying the output of the first chopper modulator;
a second chopper modulator having a fifth switch connected between a second positive input and a second positive output, a sixth switch connected between a second negative input and a second negative output, a seventh switch connected between the second negative input and the second positive output, and an eighth switch connected between the second positive input and the second negative output, the second chopper modulator alternately switching between an inverting path in which an input and an output are inverted by turning the fifth switch and the sixth switch off and the seventh switch and the eighth switch on and a non-inverting path in which the input and output are non-inverted by turning the seventh switch and the eighth switch off and the fifth switch and the sixth switch on to demodulate the input signal modulated by the first chopper modulator and amplified by the amplifier , and modulating an offset component and a low-frequency noise component of the amplifier to a high-frequency band;
the first chopper modulator is controlled to a non-overlap state in which, when switching between the inverting path and the non-inverting path, all of the first switch to the fourth switch are turned off to disconnect the first positive input from the first positive output and the first negative output, and disconnect the first negative input from the first positive output and the first negative output to be in an open state;
the second chopper modulator is controlled to an overlap state in which, when switching between the inverting path and the non-inverting path, all of the fifth switch to the eighth switch are turned on to short-circuit the second positive input and the second positive output and the second negative output, and also short-circuit the second negative input and the second positive output and the second negative output;
After the second chopper modulator is in the overlap state, the first chopper modulator is in the non-overlap state.
It is an amplification device.
[6]
[2] The amplification device according to [2],
a clock supply unit that supplies an overlap clock to the fifth switch to the eighth switch, which causes the second chopper modulator to periodically transition from an inverting state in which the inverting path is connected and the non-inverting path is disconnected, to the overlap state, to a non-inverting state in which the non-inverting path is connected and the inverting path is disconnected, and back to the overlap state;
a NOT circuit to which the overlap clock supplied from the clock supply unit is input,
The NOT circuit outputs a non-overlapping clock obtained by inverting the input overlapping clock,
supplying the non-overlapping clocks output from the NOT circuit to the ninth switch to the twelfth switch;
It is an amplification device.
[7]
[4] The amplification device according to [4],
a NOT circuit to which the non-overlapping clocks supplied from the clock supply unit are input,
The NOT circuit outputs an overlapping clock obtained by inverting the input non-overlapping clock,
supplying the overlap clocks output from the NOT circuit to the fifth switch to the eighth switch;
It is an amplification device.
[8]
[1] to [7] The amplifier according to any one of the above items,
a common-mode feedback circuit that detects a common-mode signal from the output of the second chopper modulator and supplies a feedback signal to the output of the amplifier to keep the common-mode signal at a reference value;
It is an amplification device.

The present invention provides a high-precision amplifier that reduces residual offset caused by spike noise with greater precision, without requiring complex circuits to generate high-speed control clocks or high-speed switches.

The present invention has been briefly described above. Furthermore, details of the present invention will become clearer by reading the detailed description of the invention (hereinafter referred to as "embodiments") described below with reference to the accompanying drawings.

FIG. 1 is a diagram showing the configuration of an amplifier device in a pathless state according to a first embodiment. FIG. 2 is a diagram showing the configuration of the amplifier device in the positive phase state according to the first embodiment. FIG. 3 is a diagram showing the configuration of the amplifying device in the reverse phase state according to the first embodiment. FIG. 4 is a time chart of chopping signals supplied to the amplifier devices shown in FIGS. FIG. 5 is a diagram showing the configuration of an amplifying device to which a clock generating circuit for generating a chopping signal to be supplied to the amplifying device of the first embodiment is added. FIG. 6 is a diagram showing the configuration of an amplifying device to which a clock generating circuit for generating a chopping signal to be supplied to the amplifying device of the first embodiment is added. FIG. 7 is a time chart showing a modified example of the chopping signal supplied to the amplifier device shown in FIGS. FIG. 8 is a diagram showing the configuration of an amplifier device according to the second embodiment. FIG. 9 is a characteristic diagram showing an example of the time waveforms and frequency characteristics of the signal component, noise component, and offset component obtained by the amplifying device of the second embodiment. FIG. 10 is a histogram showing the results of measuring the input offset voltage of a conventional amplifier device 200 times. FIG. 11 is a histogram showing the results of measuring the input offset voltage in the amplifier device of the second embodiment 200 times. FIG. 12 is a diagram showing the configuration of an amplifier device according to the third embodiment. FIG. 13 is a diagram showing the configuration of an amplifier device according to the fourth embodiment. FIG. 14 is a diagram showing a modification of the amplifier shown in FIGS. FIG. 15 is a diagram showing a modification of the amplifier shown in FIGS. FIG. 16 is a diagram showing an example of a conventional chopper-stabilized amplifier.

Specific embodiments of the present invention are described below with reference to the accompanying drawings.

(First embodiment)
1 to 3 are diagrams showing the configuration of an amplifying device according to a first embodiment. The amplifying device 1A of the first embodiment includes a chopper modulator (first chopper modulator) 2 that modulates an input signal Vin input via an input terminal to a high frequency band, and a transconductance amplifier 3 (amplifier) that amplifies the output of the chopper modulator 2. The amplifying device 1A also includes a chopper modulator (second chopper modulator) 4 that demodulates the signal component of the output of the transconductance amplifier 3 to a low frequency band and modulates the offset component and low frequency noise component to a high frequency band. The amplifying device 1A also includes a twin switch circuit 5 for preventing a short circuit at the output terminal. The output of the twin switch circuit 5 serves as the output terminal of the amplifying device 1A, and an output signal Vout is output.

The chopper modulator 2 is provided between the input end of the amplifying device 1A and the input of the transconductance amplifier 3. The chopper modulator 4 is provided between the output of the transconductance amplifier 3 and the input of the twin switch circuit 5. The twin switch circuit 5 is provided between the output of the chopper modulator 4 and the output end of the amplifying device 1A. The chopper modulator 2 has switches S11 to S14 (first to fourth switches ). The chopper modulator 4 has switches S21 to S24 ( fifth to eighth switches ).

Switches S11 and S21 are connected between the positive input and positive output of chopper modulators 2 and 4. Switches S12 and S22 are connected between the negative input and negative output of chopper modulators 2 and 4. Switches S13 and S23 are connected between the negative input and positive output of chopper modulators 2 and 4. Switches S14 and S24 are connected between the positive input and negative output of chopper modulators 2 and 4.

With the above configuration, when switches S11 and S12 are turned off and switches S13 and S14 are turned on, chopper modulator 2 switches to an inverting path in which the input and output are connected in an inverted manner. Also, when switches S11 and S12 are turned on and switches S13 and S14 are turned off, chopper modulator 2 switches to a non-inverting path in which the input and output are connected in a non-inverted manner. In other words, chopper modulator 2 can switch between the inverting path and the non-inverting path by turning switches S11 to S14 on and off.

Furthermore, when switches S21 and S22 are turned off and switches S23 and S24 are turned on, chopper modulator 4 switches to an inverting path in which the input and output are connected in an inverted manner. Furthermore, when switches S21 and S22 are turned on and switches S23 and S24 are turned off, chopper modulator 4 switches to a non-inverting path in which the input and output are connected in a non-inverted manner. In other words, chopper modulator 4 can switch between an inverting path and a non-inverting path by turning switches S21 to S24 on and off.

The twin switch circuit 5 includes switches S31 to S34 (ninth to twelfth switches) . Switches S31 and S33 are connected in parallel between the positive input and positive output of the twin switch circuit 5. Switches S32 and S34 are connected in parallel between the negative input and negative output of the twin switch circuit 5. When switches S31 and S32 are turned on and switches S33 and S34 are turned off, the twin switch circuit 5 switches to a first path in which the input and output are connected in a non-inverting manner. When switches S31 and S32 are turned off and switches S33 and S34 are turned on, the twin switch circuit 5 switches to a second path different from the first path in which the input and output are connected in a non-inverting manner. That is, the twin switch circuit 5 can switch between the first path and the second path by turning switches S31 to S34 on and off.

Next, the operation of the amplifier device 1A configured as described above will be described with reference to Figure 4. A chopping signal φ1 is supplied to switches S11 and S12 of the chopper modulator 2, and a chopping signal φ2 is supplied to switches S13 and S14. The chopping signals φ1 and φ2 alternately turn on switches S11 and S12 and switches S13 and S14, alternately switching between the inverting path and the non-inverting path. As a result, the chopper modulator 2 modulates the input signal Vin to a high frequency of the chopper frequency fc, which is the frequency of the chopping signals φ1 and φ2.

A chopping signal φ3 is supplied to switches S21 and S22 of the chopper modulator 4, and a chopping signal φ4 is supplied to switches S23 and S24. The chopping signals φ3 and φ4 alternately turn on switches S21 and S22 and switches S23 and S24, alternately switching between the inverting path and the non-inverting path. As a result, the chopper modulator 4 demodulates the amplified input signal Vin, which is the output of the transconductance amplifier 3, to its original frequency using the chopping signals φ3 and φ4, and modulates the offset component and low-frequency noise component of the transconductance amplifier 3 to the high-frequency band.

A chopping signal φ5 is supplied to switches S31 and S32 of the twin switch circuit 5, and a chopping signal φ6 is supplied to switches S33 and S34. The chopping signals φ5 and φ6 alternately turn on switches S31 and S32 and switches S33 and S34.

The chopping signals φ1 and φ2 described above are composed of non-overlapping clocks. The non-overlapping clocks that make up the chopping signals φ1 and φ2 are clocks that, when the switches S11 to S14 are switched, temporarily turn off all of the switches S11 to S14, controlling them to a non-overlapping state St1, which leaves the input and output open. To explain in more detail, the non-overlapping clocks supplied to the chopper modulator 2 are composed of a pair of clocks that periodically transition between an inverting state St3 in which the inverting path is connected and the non-inverting path is disconnected, a non-overlapping state St1, a non-inverting state St2 in which the non-inverting path is connected and the inverting path is disconnected, and the non-overlapping state St1, as shown in Figure 4.

The chopping signals φ5 and φ6 are also composed of non-overlapping clocks similar to the chopping signals φ1 and φ2. The non-overlapping clocks that make up the chopping signals φ5 and φ6 are clocks that, when the switches S31 to S34 are switched, temporarily turn off all of the switches S31 to S34, controlling them to the non-overlapping state St1, which opens the input and output. To explain in more detail, the non-overlapping clocks supplied to the twin switch circuit 5 are composed of a pair of clocks that periodically transition through the following states: a first path state St5 in which the first path is connected and the second path is disconnected, a non-overlapping state St1, a second path state St4 in which the second path is connected and the first path is disconnected, and finally the non-overlapping state St1.

The above-mentioned chopping signals φ3 and φ4 are composed of overlap clocks. The overlap clock is a clock that controls the switches S21 to S24 to an overlap state St6 by temporarily turning on all of the switches S21 to S24 when the switches S21 to S24 are switched, thereby shorting the positive and negative terminals of the input and output. More specifically, as shown in FIG. 4 , the overlap clock is composed of a pair of clocks that periodically transition between an inverted state St3 in which the inverted path is connected and the non-inverted path is disconnected, an overlap state St6, a non-inverted state St2 in which the non-inverted path is connected and the inverted path is disconnected, and an overlap state St6. Furthermore, when the chopping signals φ1 and φ2 are in the non-overlap state St1, the chopping signals φ3 and φ4 are in the overlap state St6.

Next, referring to Figures 1 to 3, we will explain the operation when the above-mentioned chopping signals φ1 to φ6 are supplied to the chopper modulators 2 and 4 and the switches S11 to S14, S21 to S24, and S31 to S34 of the twin switch circuit 5. When the chopper modulator 2 and the twin switch circuit 5 enter the non-overlap state St1, the amplifier device 1A enters a pathless state, disconnected from the input and output terminals, as shown in Figure 1. At this time, the signal components prior to the non-overlap state St1 are stored in the parasitic capacitance Cp. Furthermore, spike noise caused by the on/off switching of the switches S11 to S14 passes through the transconductance amplifier 3 and accumulates in the parasitic capacitance Cp. However, because the chopper modulator 4 enters the overlap state St6, the charge that causes the spike noise and that has accumulated in the parasitic capacitance Cp is discharged.

When the non-overlap state St1 ends, the amplifier 1A enters the normal phase operation state shown in Figure 2. That is, the chopper modulators 2 and 4 are switched to the non-inverting path, and the twin switch circuit 5 is switched to the first path. Next, the amplifier 1A enters the no-path state shown in Figure 1 again, and then enters the reverse phase operation state shown in Figure 3. That is, the chopper modulators 2 and 4 are switched to the inverting path, and the twin switch circuit 5 is switched to the second path. The amplifier 1A cycles through the no-path state, normal phase state, no-path state, and reverse phase state in that order.

In the embodiment described above, the chopper modulator 4 discharges the parasitic capacitance Cp in the non-path state, so even if the state is subsequently switched to the first path state or the second path state, the charge accumulated in the parasitic capacitance Cp has already been discharged. This makes it possible to suppress spike noise from appearing in the output signal Vout. Furthermore, there is no need to provide a switch that is turned on only during the very short non-overlap state St1 to discharge the parasitic capacitance Cp, and there is no need for a switch that operates at high speed, making circuit design easier.

Furthermore, according to the above-described embodiment, a twin switch circuit 5 is provided that switches to the non-overlap state St1 when the chopper modulator 4 is in the overlap state St6. As a result, even when the chopper modulator 4 is in the overlap state St6, the twin switch circuit 5 disconnects the output terminal, preventing a short circuit between the positive and negative poles of the output terminal.

The chopping signals φ1, φ2, φ5, and φ6, which are composed of the non-overlapping clocks described above, are generated by the clock generation circuit 6 (clock supply unit) shown in Figure 5. The non-overlapping clocks generated by this clock generation circuit 6 are inverted by a NOT circuit 7 to generate the chopping signals φ3 and φ4, which are overlapping clocks.

Alternatively, as shown in FIG. 6, chopping signals φ3 and φ4, which are overlap clocks, may be generated by a clock generation circuit 8 (clock supply unit). In this case, the overlap clocks generated by the clock generation circuit 8 are inverted by a NOT circuit 9 to generate chopping signals φ1, φ2, φ5, and φ6, which are overlap clocks.

As shown in Figures 5 and 6, the chopping signals supplied to switches S21 to S24 of the chopper modulator 4 are generated using a single NOT circuit 7 from the chopping signals supplied to switches S11 to S14 and S31 to S34 of the chopper modulator 2 and twin switch circuit 5, or the chopping signals supplied to switches S11 to S14 and S31 to S34 of the chopper modulator 2 and twin switch circuit 5 are generated using a single NOT circuit 9 from the chopping signals supplied to switches S21 to S24 of the chopper modulator 4, so the on/off switching of switches S11 to S14, S21 to S24, and S31 to S34 occurs at approximately the same time.

(Modification of the first embodiment)
Next, a modification of the first embodiment will be described. In the first embodiment, the period during which the chopper modulator 2 and the twin switch circuit 5 are in the non-overlap state St1 is the same as the period during which the chopper modulator 4 is in the overlap state St6. However, this is not limited to this. Chopping signals φ1 to φ6 as shown in FIG. 7 may be supplied to first set the chopper modulator 4 to the overlap state St6 and the twin switch circuit 5 to the non-overlap state St1, and then set the chopper modulator 2 to the non-overlap state St1. As a result, when the switches S11 to S14 of the chopper modulator 2 are turned on and off, the chopper modulator 4 is already in the overlap state St6 and the twin switch circuit 5 is already in the non-overlap state St6. This further reduces spike noise at the output terminal due to the on/off switching of the switches S11 to S14.

Second Embodiment
Next, a second embodiment will be described. Fig. 8 is a diagram showing the configuration of an amplifier device of the second embodiment. In Fig. 8, parts equivalent to those of the amplifier device 1A shown in Fig. 1 already described in the first embodiment are given the same reference numerals, and detailed description thereof will be omitted.

The amplifier device 1B may also include a common-mode feedback circuit 10. The common-mode feedback circuit 10 detects an in-phase signal from the output of the chopper modulator 4, generates a feedback signal that maintains the detected in-phase signal at a reference value Vcm, and supplies this to the output of the transconductance amplifier 3. By providing the common-mode feedback circuit 10, the parasitic capacitance Cp of the input of the chopper modulator 4 can be reduced. Furthermore, because the chopper modulator 4 operates using overlapping clocks, it is possible to eliminate the timing at which the in-phase feedback loop of the common-mode feedback circuit 10 is disconnected.

The amplifying device 1B may also include an amplifier 11A. The amplifier 11A amplifies the signal component output from the twin switch circuit 5. In the second embodiment, the output of the amplifier 11A becomes the output terminal of the amplifying device 1B, and the output signal Vout is output. The amplifier 11A has a transconductance amplifier 111, an amplifier 112, and a phase compensation circuit 113 that performs phase compensation for the amplifiers 111 and 112. The input of the amplifier 112 is connected to the output of the transconductance amplifier 111, and the output of the amplifier 112 becomes the output of the amplifier 11A, i.e., the output terminal of the amplifying device 1B.

The phase compensation circuit 113 is composed of resistors R3 and R4 and capacitors Cc1 to Cc3. Resistors R3 and R4 are connected between the output of the twin switch circuit 5 and the input of the transconductance amplifier 111. Capacitor Cc1 is connected between the input and output of amplifier 112. Capacitor Cc2 is connected between the inverting input of the transconductance amplifier 111 and the output of amplifier 112. Capacitor Cc3 is connected between the non-inverting input of the transconductance amplifier 111 and ground.

As described above, when the offset component and low-frequency noise component shown by the dotted line in Figure 9(B) are modulated to the high-frequency band by the chopper modulator 4, ripple noise shown by the dotted line in Figure 9(C) is generated. With the phase compensation circuit 113, a low-pass filter is formed by resistors R3 and R4 and capacitors Cc1 and Cc2, so the ripple noise in the output signal Vin can be reduced as shown by the solid line in Figure 9(C).

Also, a transconductance amplifier 13 functioning as a feedforward amplifier may be connected between the output of transconductance amplifier 111 and the input of amplifier 112.

The amplifying device 1B may also include a noise reduction loop circuit 12. The noise reduction loop circuit 12 has an input and output connected between the transconductance amplifier 3 and the chopper modulator 4. As described in JP 2020-145545 A, for example, the noise reduction loop circuit 12 extracts the offset component of the transconductance amplifier 3 and negatively feeds the extracted offset component back to the output of the transconductance amplifier 3. This noise reduction loop circuit 12 reduces the offset component and low-frequency noise component generated in the transconductance amplifier 3, thereby reducing ripple noise contained in the output of the chopper modulator 4 (see Figures 9(B) and 9(C)).

In this embodiment, the noise reduction loop circuit 12 is configured to include an auto-zero amplifier 121 that amplifies the input to the noise reduction loop circuit 12, a filter circuit 122 that reduces high-frequency signal components in the output of the auto-zero amplifier 121, and a transconductance amplifier 123 that amplifies the output of the filter circuit 122, as described in the above publication, for example.

The auto-zero amplifier 121 is configured using, for example, a Ping-Pong auto-zero amplifier. The auto-zero amplifier 121 is configured with two auto-zero amplifier circuits 121A, 121B connected in parallel. Each of the auto-zero amplifier circuits 121A, 121B has a calibration mode and an amplification mode as its operating modes. In calibration mode, a calibration voltage that reduces the offset component and low-frequency noise component of the built-in amplifier is sampled using a sampling capacitor (not shown). In amplification mode, the input signal is amplified by the amplifier whose offset component and low-frequency noise component have been reduced by the calibration voltage. When one of the two auto-zero amplifier circuits 121A, 121B is in calibration mode, the other is in amplification mode; by alternately switching between these modes, amplification can be performed at all times.

The filter circuit 122 amplifies the low-frequency signal components in the output of the auto-zero amplifier 121 and reduces the high-frequency signal components. The filter circuit 122 reduces the high-frequency signal components and feeds back the amplifier's offset components.

Next, the inventors measured the input offset voltage for a conventional amplifier device that removes the twin switch circuit 5 from the second embodiment shown in FIG. 8 and supplies non-overlapping clocks to the chopper modulators 2 and 4, and for the amplifier device 1B of the second embodiment shown in FIG. 8. The results are shown in FIGS. 10 and 11. FIG. 10 is a histogram of the input offset voltage of the conventional amplifier device measured 200 times. FIG. 11 is a histogram of the input offset voltage of the amplifier device 1B of the second embodiment shown in FIG. 8 measured 200 times. As is clear from a comparison of FIGS. 10 and 11, the amplifier device 1B of the second embodiment can reduce the offset component more than the conventional amplifier device.

(Third embodiment)
Next, a third embodiment will be described. Fig. 12 is a diagram showing the configuration of an amplifier device of the third embodiment. In Fig. 12, parts equivalent to those of the amplifier device shown in Fig. 8 already described in the second embodiment are given the same reference numerals, and detailed description thereof will be omitted.

The amplifier device 1C may include a ripple calibration circuit 14 instead of the noise reduction loop circuit 12. The ripple calibration circuit 14 has an input connected to the output of the chopper modulator 4 and an output connected to the input of the chopper modulator 4. The ripple calibration circuit 14 extracts high-frequency noise components (ripple noise) from the output of the chopper modulator 4, modulates the extracted ripple noise into an offset component, and negatively feeds back the modulated offset component to the output of the chopper modulator 3. The ripple calibration circuit 14 reduces the offset component contained in the output of the chopper modulator 3, thereby reducing the ripple noise contained in the output of the chopper modulator 4 (see Figures 9 (B) and (C)).

In this embodiment, the ripple calibration circuit 14 includes a high-pass filter 141 that reduces low-frequency noise components input to the ripple calibration circuit 14 and detects ripple noise; a phase-inverting auto-zero amplifier 142 that demodulates the ripple noise output from the high-pass filter 141 into low-frequency components and modulates them into offset components; a filter circuit 143 that reduces high-frequency components output from the phase-inverting auto-zero amplifier 142; and a transconductance amplifier 144 that amplifies the output of the filter circuit 143.

The phase-inverting auto-zero amplifier 142 is configured using, for example, a Ping-Pong auto-zero amplifier. The phase-inverting auto-zero amplifier 142 is configured with two auto-zero amplifier circuits 142A, 142B connected in parallel. The auto-zero amplifier circuit 142A inverts and amplifies its input. The auto-zero amplifier circuit 142B non-inverts and amplifies its input. Each of the auto-zero amplifier circuits 142A, 142B has two operating modes: a calibration mode and an amplification mode. In calibration mode, a calibration voltage that reduces the offset and low-frequency noise components of the built-in amplifier is sampled using a sampling capacitor (not shown). In amplification mode, the input signal is amplified by the amplifier, whose offset and low-frequency noise components have been reduced by the calibration voltage. When one of the two auto-zero amplifier circuits 142A, 142B is in calibration mode, the other is in amplification mode; by alternately switching between these modes, amplification can be performed at all times. Furthermore, when the calibration mode and amplification mode are alternately switched, the phase-inverting auto-zero amplifier 142 alternates between inverting amplification and non-inverting amplification. This allows the phase-inverting auto-zero amplifier 142 to modulate input ripple noise into a low-frequency offset component.

The filter circuit 143 has the function of amplifying the low-frequency signal components and reducing the high-frequency signal components in the output of the phase-inverting auto-zero amplifier 142.

(Fourth embodiment)
Next, a fourth embodiment will be described. Fig. 13 is a diagram showing the configuration of an amplifier device of the fourth embodiment. In Fig. 13, parts equivalent to those of the amplifier device shown in Fig. 12 already described in the third embodiment are given the same reference numerals, and detailed description thereof will be omitted.

In the third embodiment, the input of the ripple calibration circuit 14 was connected to the output of the chopper modulator 4, but as shown in FIG. 13, the input may also be connected to the output of the twin switch circuit 5. In this way, the ripple calibration circuit 14 negatively feeds back the output of the twin switch circuit 5, thereby reducing the high-frequency noise components contained in the output of the twin switch circuit 5.

The present invention is not limited to the above-described embodiments, and modifications, improvements, etc. are possible as appropriate. Furthermore, the material, shape, dimensions, number, placement location, etc. of each component in the above-described embodiments are arbitrary and not limited as long as they achieve the present invention.

For example, the output stage amplifier 11A shown in the second to fourth embodiments above is composed of a transconductance amplifier 111 and an amplifier 112, but this is not limited to this. For example, as shown in FIG. 14, an amplifier 11B composed of two transconductance amplifiers 114 and 115 may be provided. In the example shown in FIG. 14, the phase compensation circuit 116 is composed of two capacitors Cc4 and Cc5. Capacitor Cc4 is connected between the inverting input and the positive output of transconductance amplifier 114. Capacitor Cc5 is connected between the non-inverting input and the negative output of transconductance amplifier 114.

Alternatively, as shown in Figure 15, a Ping-Pong auto-zero amplifier 11C consisting of two auto-zero amplifiers 117A and 117B may be provided in place of amplifier 11A.

Furthermore, in the above-described embodiment, a twin switch circuit 5 is provided, but this is not limited to this. If short-circuiting of the output terminals is not a problem, there is no need to provide a twin switch circuit 5.

1A to 1C Amplification device 2 Chopper modulator (first chopper modulator)
3. Transconductance amplifier (amplifier)
4. Chopper modulator (second chopper modulator)
5 Twin switch circuit 6, 8 Clock generation circuit (clock supply section)
7, 9 NOT circuit 10 Common mode feedback circuit
S11 Switch (first switch)
S12 switch (second switch)
S13 switch (third switch)
S14 switch (fourth switch)
S21 switch (fifth switch)
S22 switch (sixth switch)
S23 switch (seventh switch)
S24 switch (eighth switch)
S31 switch (9th switch)
S32 switch (11th switch)
S33 Switch (10th switch)
S34 switch (12th switch)

Claims (8)

a first chopper modulator including a first switch connected between a first positive input and a first positive output, a second switch connected between a first negative input and a first negative output, a third switch connected between the first negative input and the first positive output, and a fourth switch connected between the first positive input and the first negative output, wherein the first switch and the second switch are turned off and the third switch and the fourth switch are turned on to alternately switch between an inverting path in which an input and an output are invertedly connected, and a non-inverting path in which the third switch and the fourth switch are turned off and the first switch and the second switch are turned on to modulate an input signal to a high frequency band;
an amplifier for amplifying the output of the first chopper modulator;
a second chopper modulator having a fifth switch connected between a second positive input and a second positive output, a sixth switch connected between a second negative input and a second negative output, a seventh switch connected between the second negative input and the second positive output, and an eighth switch connected between the second positive input and the second negative output, the second chopper modulator alternately switching between an inverting path in which an input and an output are inverted by turning the fifth switch and the sixth switch off and the seventh switch and the eighth switch on and a non-inverting path in which the input and output are non-inverted by turning the seventh switch and the eighth switch off and the fifth switch and the sixth switch on to demodulate the input signal modulated by the first chopper modulator and amplified by the amplifier , and modulating an offset component and a low-frequency noise component of the amplifier to a high-frequency band;
the first chopper modulator is controlled to a non-overlap state in which, when switching between the inverting path and the non-inverting path, all of the first switch to the fourth switch are turned off to disconnect the first positive input from the first positive output and the first negative output, and disconnect the first negative input from the first positive output and the first negative output to be in an open state;
the second chopper modulator is controlled to an overlap state in which, when switching between the inverting path and the non-inverting path, all of the fifth switch to the eighth switch are turned on to short-circuit the second positive input and the second positive output and the second negative output, and also short-circuit the second negative input and the second positive output and the second negative output;
When the first chopper modulator is in the non-overlap state, the second chopper modulator is in the overlap state.
Amplification device. 2. The amplifier device according to claim 1,
a twin switch circuit having a third positive input connected to the second positive output of the second chopper modulator and a third negative input connected to the second negative output of the second chopper modulator,
the twin switch circuit includes a ninth switch and a tenth switch connected in parallel between the third positive input and the third positive output, and an eleventh switch and a twelfth switch connected in parallel between the third negative input and the third negative output, and is controlled to a non-overlapping state in which all of the ninth switch to the twelfth switch are turned off to disconnect the third positive input from the third positive output and to disconnect the third negative input from the third negative output, when switching between a first path in which input and output are connected in a non-inverting manner by turning the ninth switch and the eleventh switch on and the tenth switch and the twelfth switch off, and a second path in which input and output are connected in a non-inverting manner by turning the tenth switch and the twelfth switch on and the ninth switch and the eleventh switch off ;
when the second chopper modulator is in the overlap state, the twin switch circuit is in the non-overlap state;
Amplification device. 3. The amplifier device according to claim 1,
a clock supply unit that supplies an overlap clock to the fifth switch to the eighth switch, which causes the second chopper modulator to periodically transition from an inverting state in which the inverting path is connected and the non-inverting path is disconnected, to the overlap state, to a non-inverting state in which the non-inverting path is connected and the inverting path is disconnected, and to the overlap state, in that order;
Amplification device. 3. The amplifier device according to claim 2,
a clock supply unit that supplies a non-overlapping clock to the ninth switch to the twelfth switch, which causes the twin switch circuit to periodically transition in the order of a first path state in which the first path is connected and the second path is disconnected, the non-overlapping state, a second path state in which the second path is connected and the first path is disconnected, and the non-overlapping state;
Amplification device. a first chopper modulator including a first switch connected between a first positive input and a first positive output, a second switch connected between a first negative input and a first negative output, a third switch connected between the first negative input and the first positive output, and a fourth switch connected between the first positive input and the first negative output, wherein the first switch and the second switch are turned off and the third switch and the fourth switch are turned on to alternately switch between an inverting path in which an input and an output are invertedly connected, and a non-inverting path in which the third switch and the fourth switch are turned off and the first switch and the second switch are turned on to modulate an input signal to a high frequency band;
an amplifier for amplifying the output of the first chopper modulator;
a second chopper modulator having a fifth switch connected between a second positive input and a second positive output, a sixth switch connected between a second negative input and a second negative output, a seventh switch connected between the second negative input and the second positive output, and an eighth switch connected between the second positive input and the second negative output, the second chopper modulator alternately switching between an inverting path in which an input and an output are inverted by turning the fifth switch and the sixth switch off and the seventh switch and the eighth switch on and a non-inverting path in which the input and output are non-inverted by turning the seventh switch and the eighth switch off and the fifth switch and the sixth switch on to demodulate the input signal modulated by the first chopper modulator and amplified by the amplifier , and modulating an offset component and a low-frequency noise component of the amplifier to a high-frequency band;
the first chopper modulator is controlled to a non-overlap state in which, when switching between the inverting path and the non-inverting path, all of the first switch to the fourth switch are turned off to disconnect the first positive input from the first positive output and the first negative output, and disconnect the first negative input from the first positive output and the first negative output to be in an open state;
the second chopper modulator is controlled to an overlap state in which, when switching between the inverting path and the non-inverting path, all of the fifth switch to the eighth switch are turned on to short-circuit the second positive input and the second positive output and the second negative output, and also short-circuit the second negative input and the second positive output and the second negative output;
After the second chopper modulator is in the overlap state, the first chopper modulator is in the non-overlap state.
Amplification device. 3. The amplifier device according to claim 2,
a clock supply unit that supplies an overlap clock to the fifth switch to the eighth switch, which causes the second chopper modulator to periodically transition from an inverting state in which the inverting path is connected and the non-inverting path is disconnected, to the overlap state, to a non-inverting state in which the non-inverting path is connected and the inverting path is disconnected, and back to the overlap state;
a NOT circuit to which the overlap clock supplied from the clock supply unit is input,
The NOT circuit outputs a non-overlapping clock obtained by inverting the input overlapping clock,
supplying the non-overlapping clocks output from the NOT circuit to the ninth switch to the twelfth switch;
Amplification device. 5. The amplifier device according to claim 4,
a NOT circuit to which the non-overlapping clocks supplied from the clock supply unit are input,
The NOT circuit outputs an overlapping clock obtained by inverting the input non-overlapping clock,
supplying the overlap clocks output from the NOT circuit to the fifth switch to the eighth switch;
Amplification device. The amplifier device according to any one of claims 1 to 7,
a common-mode feedback circuit that detects a common-mode signal from the output of the second chopper modulator and supplies a feedback signal to the output of the amplifier to keep the common-mode signal at a reference value;
Amplification device.