JP7723914B2 - Through-electrode substrate, mounting substrate including through-electrode substrate, and method for manufacturing through-electrode substrate - Google Patents

Description

Embodiments of the present disclosure relate to a through-electrode substrate having a through-electrode. Furthermore, embodiments of the present disclosure relate to a mounting substrate having a through-electrode substrate, and a method for manufacturing a through-electrode substrate.

A component comprising a substrate including a first surface and a second surface, a plurality of through holes formed in the substrate, and through electrodes located inside the through holes, known as a through electrode substrate, is used in a variety of applications.

For example, this through-hole electrode substrate is used as an interposer placed between two LSI chips when stacking multiple LSI chips to increase the packaging density of the LSI. Furthermore, through-hole electrode substrates can also be placed between elements such as LSI chips and mounting substrates such as motherboards.

For example, Patent Document 1 discloses technology related to an interposer in which through-holes are formed in a glass substrate using laser light and then plated. The glass substrate manufacturing method described in Patent Document 1 makes it possible to form tapered through-holes in the glass substrate.

Patent Document 2 also discloses technology related to an interposer formed by forming a multilayer wiring layer on a glass substrate. This interposer has an inorganic adhesive layer formed only inside the through holes, and a conductive layer formed on this inorganic adhesive layer. The conductive layer is electrically connected to the wiring group via conductive vias, and the thermal expansion coefficient of the inorganic adhesive layer is greater than that of the substrate and less than that of the conductive layer. The interposer described in Patent Document 2 can prevent peeling of the conductive layer pattern due to thermal expansion and thermal contraction.

JP 2014-139963 A JP 2015-198093 A

However, the inventions described in the aforementioned Patent Documents 1 and 2 do not fully consider the issue of forming capacitors at high density, and there are concerns that it may be difficult to increase the mounting density.

Embodiments of the present disclosure aim to provide a through-hole electrode substrate, a mounting substrate including a through-hole electrode substrate, and a method for manufacturing a through-hole electrode substrate that can effectively solve these problems.

The through electrode substrate according to an embodiment of the present disclosure includes:
a substrate including a first surface and a second surface located opposite to the first surface, the substrate having an electrode through-hole penetrating between the first surface and the second surface and a capacitor through-hole penetrating between the first surface and the second surface;
a through electrode located in the electrode through hole of the substrate;
and a capacitor having a laminated structure in which a first-surface second electrode layer, a dielectric layer, and a first-surface first electrode layer are laminated in this order, the capacitor being provided continuously over a vicinity of a first-surface opening on the first surface of the capacitor through hole of the substrate, a sidewall of the capacitor through hole, and a vicinity of a second-surface opening on the second surface of the capacitor through hole.

In the through electrode substrate,
The semiconductor device may further include a wiring layer that electrically connects the through electrode to either the first surface second electrode layer or the first surface first electrode layer.

In the through electrode substrate,
A side edge of the first-surface second electrode layer on the first surface of the substrate may be covered by the dielectric layer on the first surface.

In the through electrode substrate,
The side edge of the dielectric layer on the first surface of the substrate may be positioned on the first surface of the substrate so as to cover the edge of the first surface second electrode layer on the first surface of the substrate.

In the through electrode substrate,
A side edge of the first surface first electrode layer on the first surface of the substrate may be positioned on a side edge of the dielectric layer on the first surface of the substrate.

In the through electrode substrate,
The first surface second electrode layer may have a recess at a boundary between a side edge of the first surface second electrode layer and the first surface of the substrate.

In the through electrode substrate,
The first-surface second electrode layer may have a thickness greater than that of the first-surface first electrode layer.

In the through electrode substrate,
The electrode through hole may have the same width as the capacitor through hole.

In the through electrode substrate,
The electrode through hole may have a width greater than that of the capacitor through hole.

In the through electrode substrate,
The substrate may further include through-hole wiring on the first surface side that penetrates the first surface first electrode layer and the dielectric layer, is insulated from the first surface first electrode layer, and is electrically connected to the first surface second electrode layer.

In the through electrode substrate,
The substrate may be provided with a plurality of the capacitor through holes, and the capacitors may be provided in one-to-one correspondence with the respective capacitor through holes.

In the through electrode substrate,
The first surface second electrode layer, the dielectric layer, and the first surface first electrode layer of adjacent capacitors on the first surface of the substrate may be continuously connected on the first surface of the substrate.

In the through electrode substrate,
The first surface second electrode layer, the dielectric layer, and the first surface first electrode layer of adjacent capacitors on the first surface of the substrate may not be continuously connected on the first surface of the substrate.

In the through electrode substrate,
The cross section of the capacitor through hole parallel to the first surface may be circular.

In the through electrode substrate,
The through electrode may have a seed layer formed along a side wall of the electrode through hole, and a plating layer formed on a surface of the seed layer.

In the through electrode substrate,
The device may further include an inductor having the through electrode, a first surface conductive layer electrically connected to the through electrode and located on the first surface side, and a second surface conductive layer electrically connected to the through electrode and located on the second surface side.

A mounting substrate according to an embodiment of the present disclosure includes:
a through electrode substrate;
an element mounted on the through electrode substrate;
The through electrode substrate is
a substrate including a first surface and a second surface located opposite to the first surface, the substrate having a through-hole penetrating between the first surface and the second surface and a capacitor through-hole penetrating between the first surface and the second surface;
a through electrode located in the electrode through hole of the substrate;
and a capacitor having a laminated structure in which a first-surface second electrode layer, a dielectric layer, and a first-surface first electrode layer are laminated in this order, the capacitor being provided continuously over a vicinity of a first-surface opening on the first surface of the capacitor through hole of the substrate, a sidewall of the capacitor through hole, and a vicinity of a second-surface opening on the second surface of the capacitor through hole.

A method for manufacturing a through hole electrode substrate according to an embodiment of the present disclosure includes:
preparing a substrate including a first surface and a second surface located opposite to the first surface, the substrate having an electrode through hole penetrating between the first surface and the second surface, and a capacitor through hole penetrating between the first surface and the second surface;
forming a through electrode located in the electrode through hole of the substrate;
and forming a capacitor having a laminated structure in which a first-surface second electrode layer, a dielectric layer, and a first-surface first electrode layer are laminated in this order, the laminated structure being continuously provided over the vicinity of a first-surface opening on the first surface of the capacitor through hole of the substrate, the sidewall of the capacitor through hole, and the vicinity of a second-surface opening on the second surface of the capacitor through hole.

In the method for manufacturing the through electrode substrate,
The first surface second electrode layer of the capacitor may be formed at the same time as the through electrode is formed.

Embodiments of the present disclosure provide a through-electrode substrate that is equipped with through-electrodes and allows capacitors to be mounted at high density.

FIG. 1 is a cross-sectional view showing a through hole electrode substrate according to an embodiment. FIG. 2 is a partially enlarged cross-sectional view showing the vicinity of the through-hole of the through electrode substrate shown in FIG. FIG. 3 is a partially enlarged cross-sectional view showing a capacitor through-hole of the through electrode substrate shown in FIG. FIG. 4 is a plan view showing the through electrode substrate shown in FIG. FIG. 5 is a diagram showing another example of the capacitor shown in FIG. FIG. 6 is a diagram showing still another example of the capacitor shown in FIG. FIG. 7 is a diagram showing an example of the configuration of a side end portion of a capacitor on the first surface of the through hole electrode substrate shown in FIG. 8A to 8C are diagrams showing an example of a manufacturing process for the through hole electrode substrate shown in FIG.

do.
9A to 9C are diagrams showing an example of a manufacturing process of the through hole electrode substrate shown in FIG. 1, following FIG. 10A to 10C are diagrams showing an example of a manufacturing process of the through hole electrode substrate shown in FIG. 1, following FIG. 11A to 11C are diagrams showing an example of a manufacturing process of the through hole electrode substrate shown in FIG. 1, following FIG. 12A to 12C are diagrams showing an example of a manufacturing process of the through hole electrode substrate shown in FIG. 1, following FIG. 13A to 13C are diagrams showing an example of a manufacturing process of the through hole electrode substrate shown in FIG. 1, following FIG. 14A to 14C are diagrams showing an example of a manufacturing process of the through hole electrode substrate shown in FIG. 1, following FIG. 15A to 15C are diagrams showing an example of a manufacturing process of the through hole electrode substrate shown in FIG. 1, following FIG. 16A to 16C are diagrams showing an example of a manufacturing process of the through hole electrode substrate shown in FIG. 1, following FIG. 17A to 17C are diagrams showing an example of a manufacturing process of the through hole electrode substrate shown in FIG. 1, following FIG. 18A to 18C are diagrams showing an example of a manufacturing process of the through hole electrode substrate shown in FIG. 1, following FIG. 17. In FIG. 19A to 19C are diagrams showing an example of a manufacturing process of the through hole electrode substrate shown in FIG. 1, following FIG. FIG. 20 is a cross-sectional view showing an example of a mounting substrate including the through electrode substrate and the element shown in FIG. FIG. 21 is a diagram showing an example of a product on which the through electrode substrate shown in FIG. 1 is mounted.

The configuration of a through-hole electrode substrate and a manufacturing method thereof according to an embodiment of the present disclosure are described in detail below with reference to the drawings. Note that the embodiment described below is an example of an embodiment of the present disclosure, and the present disclosure is not intended to be limited to these embodiments. Furthermore, in this specification, terms such as "substrate," "substrate," "sheet," and "film" are not distinguished from one another solely based on differences in nomenclature. For example, "substrate" and "substrate" are concepts that include materials that may be called sheets or films. Furthermore, terms used in this specification that specify shape, geometric conditions, and their degrees, such as "parallel" and "orthogonal," as well as values of length and angle, are not bound by strict meanings but are interpreted to include the extent to which similar functions can be expected. Furthermore, in the drawings referenced in this embodiment, identical or similar symbols are used to designate identical parts or parts having similar functions, and repeated explanations may be omitted. Furthermore, for the sake of convenience, the dimensional proportions in the drawings may differ from the actual proportions, and parts of the configuration may be omitted from the drawings.

1. Through-hole electrode substrate Hereinafter, an embodiment of the present disclosure will be described. First, the configuration of a through-hole electrode substrate 10 according to this embodiment will be described. FIG. 1 is a cross-sectional view showing a through-hole electrode substrate 10 according to the embodiment. FIG. 2 is a cross-sectional view showing a partially enlarged view of the vicinity of a through-hole of the through-hole electrode substrate shown in FIG. 1. FIG. 3 is a cross-sectional view showing a partially enlarged view of a capacitor through-hole of the through-hole electrode substrate shown in FIG. 1. FIG. 4 is a plan view showing the through-hole electrode substrate shown in FIG. 1. For simplicity, FIG. 4 schematically shows a cross section along the surface of the first-side first conductive layer 311.

The through electrode substrate 10 comprises a substrate 12, a through electrode 22, a first wiring structure 30, and a second wiring structure 40. Each component of the through electrode substrate 10 is described below.

(substrate)
The substrate 12 includes a first surface 13 and a second surface 14 located opposite the first surface 13 .

The substrate 12 also has a plurality of electrode through-holes 20 extending from the first surface 13 to the second surface 14, i.e., penetrating between the first surface 13 and the second surface 14.

Furthermore, the substrate 12 is provided with a plurality of capacitor through-holes Z that penetrate between the first surface 13 and the second surface 14 and have an opening Za in the first surface 13 and a second surface opening Zc in the second surface 14. Note that, although two capacitor through-holes Z are formed in the substrate 12 in the example of FIG. 1, one or three or more capacitor through-holes Z may be formed in the substrate 12.

As such, in the example of Figure 1, the substrate 12 has a plurality of capacitor through-holes Z formed on the first surface 13, and capacitors 15 are provided in one-to-one correspondence with each capacitor through-hole Z.

The cross section of the capacitor through hole Z parallel to the first surface 13 is, for example, circular. However, the cross section of the capacitor through hole Z parallel to the first surface 13 may have a shape other than circular, such as a rectangle.

The substrate 12 also includes an inorganic material having a certain level of insulating properties. For example, the substrate 12 may be a glass substrate, a quartz substrate, a sapphire substrate, a resin substrate, a glass epoxy substrate, a silicon substrate, an SOI (Silicon on Insulator) substrate, an SOS (Silicon on Sapphire) substrate, _a silicon carbide (SiC) substrate, an alumina ( _Al2O3 ) substrate, an aluminum nitride (AlN) substrate, a zirconium oxide ( _ZrO2 ) substrate, or a substrate formed by stacking these. The substrate 12 may also partially include a substrate made of a conductive material, such as an aluminum substrate or a stainless steel substrate.

An example of glass used for this substrate 12 is alkali-free glass.

This alkali-free glass is glass that does not contain alkaline components such as sodium or potassium. For example, alkali-free glass contains boric acid instead of alkaline components. Furthermore, alkali-free glass contains alkaline earth metal oxides such as calcium oxide or barium oxide. Examples of alkali-free glass include EN-A1 manufactured by Asahi Glass Co., Ltd. and Eagle XG manufactured by Corning Co., Ltd. When the substrate 12 contains glass, the thickness of the substrate 12 is, for example, 0.10 mm or more and 0.40 mm or less. By including glass in the substrate 12, the insulating properties of the substrate 12 can be improved. This improves the voltage resistance characteristics of the capacitor 15 when the capacitor 15 is formed by part of the first wiring structure 30, as described below.

In addition, although not shown, the sidewall 21 of the electrode through hole 20 may extend along the normal direction of the first surface 13 of the substrate 12. Alternatively, the sidewall 21 may extend in a direction deviated from the normal direction of the first surface 13 of the substrate 12, or a portion of the sidewall 21 may be curved.

The length of the electrode through hole 20, i.e., the dimension of the electrode through hole 20 in the normal direction to the first surface 13, is equal to the thickness of the substrate 12. The width S of the electrode through hole 20, i.e., the dimension of the electrode through hole 20 in the planar direction of the first surface 13 (see Figure 8), is, for example, 40 μm or more and 150 μm or less. The ratio of the length to the width S of the electrode through hole 20 is, for example, 4 or more and 10 or less.

The width S of the electrode through hole 20 is, for example, the same size as the width a1 of the capacitor through hole Z shown in FIG. 3. However, the width S of the electrode through hole 20 may be set to be larger than the width a1 of the capacitor through hole Z shown in FIG. 3, for example.

(Through electrode)
The through electrode 22 is a member that is at least partially located inside the electrode through hole 20 and has electrical conductivity.

In this embodiment, the thickness of the through electrode 22 is smaller than the width of the electrode through hole 20, and therefore there is a space inside the through electrode 22 where the through electrode 22 is not present. In other words, the through electrode 22 is a so-called conformal via.

The through electrode 22 may be formed by a physical film formation method such as vapor deposition or sputtering, or by a chemical film formation method or plating method. The through electrode 22 may be composed of a single conductive layer, or may include multiple conductive layers.

Here, as shown in Figure 2, an example will be described in which the through electrode 22 includes an adhesion layer 361, a seed layer 362, and a plating layer 363, which are arranged in this order from the sidewall 21 side of the electrode through hole 20 toward the center side of the electrode through hole 20.

The adhesion layer 361 is a layer formed as needed between other components of the through electrode 22, such as the seed layer 362 and plating layer 363, and the sidewall 21 of the electrode through hole 20 in the substrate 12. The adhesion layer 361 has higher adhesion to the substrate 12 than other components of the through electrode 22, such as the seed layer 362 and plating layer 363. The adhesion layer 361 may also serve to prevent metal elements in other components of the through electrode 22, such as the seed layer 362 and plating layer 363, from diffusing into the interior of the substrate 12 via the sidewall 21 of the electrode through hole 20. When the seed layer 362 or plating layer 363 contains copper, the adhesion layer 361 may be made of, for example, titanium, titanium nitride, molybdenum, molybdenum nitride, tantalum, tantalum nitride, or a laminate of these materials. The adhesion layer 361 may also be made of a conductive material that has high adhesion to the substrate 12.

For example, the material of the adhesion layer 361 can be titanium, molybdenum, tungsten, tantalum, nickel, chromium, aluminum, compounds of these, alloys of these, or laminates of these. The thickness of the adhesion layer 361 is, for example, 10 nm or more and 1 μm or less. The adhesion layer 361 is formed by a physical film formation method such as vapor deposition or sputtering.

The seed layer 362 is a conductive layer that serves as a base for growing the plating layer 363 by precipitating metal ions in the plating solution during the electrolytic plating process, which forms the plating layer 363 by electrolytic plating. The seed layer 362 may be made of the same metal material as the plating layer 363, such as copper. The thickness of the seed layer 362 is, for example, 100 nm or more and 3 μm or less. The seed layer 362 is formed, for example, by electroless plating.

Although not shown, a layer that can serve as both an adhesion layer and a seed layer may be provided between the sidewall 21 of the electrode through-hole 20 and the plating layer 363.

The plating layer 363 is a conductive layer formed by plating. Materials that can be used to form the plating layer 363 include metals such as copper, gold, silver, platinum, rhodium, tin, aluminum, nickel, and chromium, alloys using these metals, and laminates of these metals.

Also, as shown in FIG. 2, the through electrode 22 has an adhesion layer 361 and a seed layer 362 formed along the sidewall of the electrode through hole 20, and a plating layer 363 formed on the surface of the seed layer 362.

As shown in FIG. 1, the through electrode substrate 10 may include an organic layer 26 located closer to the center of the electrode through hole 20 than the through electrode 22. Note that "closer to the center" means that, inside the electrode through hole 20, the distance between the organic layer 26 and the sidewall 21 is greater than the distance between the through electrode 22 and the sidewall 21. The organic layer 26 includes an organic material having a dielectric loss tangent. Examples of organic materials that can be used for the organic layer 26 include polyimide and epoxy. By using an organic material with a small dielectric loss tangent for the organic layer 26, it is possible to prevent a portion of the electrical signal that should pass through the capacitor 15 or inductor 16 from passing through the organic layer 26. This allows the bandwidth of the through electrode substrate 10, which includes the capacitor 15 or inductor 16, to be expanded toward the high frequency side.

(First wiring structure part)
1 , the first wiring structure 30 includes a first-surface first wiring layer 31 located on the first surface 13 of the substrate 12, a first-surface second wiring layer 32 located on the first-surface first wiring layer 31, and a first-surface third wiring layer 33 located on the first-surface second wiring layer 32. The configurations of the first-surface first wiring layer 31, the first-surface second wiring layer 32, and the first-surface third wiring layer 33 will be described below.

[First surface first wiring layer]
As shown in FIG. 1, the first surface first wiring layer 31 has a first surface first conductive layer 311 including the first surface second electrode layer 15a of the capacitor 15, and a first surface first insulating layer 312 including the dielectric layer 15b of the capacitor 15.

The first-surface first conductive layer 311 is a conductive layer located on the first surface 13 of the substrate 12, and includes the first wiring L1 and the first electrode portion 22a of the through electrode 22.

This first-surface first conductive layer 311 may be connected to the through electrode 22. Furthermore, like the through electrode 22, the first-surface first conductive layer 311 may include an adhesion layer 361, a seed layer 362, and a plating layer 363 stacked in this order. The material constituting the first-surface first conductive layer 311 is the same as the material constituting the through electrode 22. The thickness of the first-surface first conductive layer 311 is, for example, 5 μm or more and 20 μm or less. In this case, as shown in FIG. 3 , the capacitor 15 has an adhesion layer 361 and a seed layer 362 formed on the inner surface of the capacitor through hole Z, and a plating layer 363 formed on the surface of the seed layer 362.

The first-surface first insulating layer 312 is an insulating layer that is at least partially located on the first-surface first conductive layer 311. The first-surface first insulating layer 312 may partially cover the first-surface first conductive layer 311. In this case, the first-surface first insulating layer 312 may be in contact not only with the first-surface first conductive layer 311 but also with the first surface 13 of the substrate 12. Note that "covering" means that, when the through-hole electrode substrate 10 is viewed along the normal direction to the first surface 13 of the substrate 12, as shown in FIG. 3, the end 311e of the first-surface first conductive layer 311 and the first-surface first insulating layer 312 at least partially overlap.

The first-surface first insulating layer 312 also contains an inorganic material having a dielectric breakdown field. Silicon nitrides such as SiN can be used as the inorganic material for the first-surface first insulating layer 312. Other examples of inorganic materials for the first-surface first insulating layer 312 include silicon oxide, aluminum oxide, and tantalum pentoxide. This further improves the voltage resistance characteristics of the capacitor 15, which includes the first-surface first insulating layer 312 functioning as the dielectric layer 15b. The method for measuring the dielectric breakdown field will be described later in the examples. The inorganic material for the first-surface first insulating layer 312 has a relative dielectric constant of, for example, 3 or more and 50 or less. The thickness of the first-surface first insulating layer 312 is, for example, 50 nm or more and 400 nm or less.

[First surface second wiring layer]
1 , the first-surface second wiring layer 32 has a first-surface second conductive layer 321 and a first-surface second insulating layer 322. The first-surface second conductive layer 321 constituting the first-surface first electrode layer 15c is a conductive layer located on the first-surface first insulating layer 312. As shown in FIGS. 1 and 3 , the capacitor 15 is configured by the first-surface first conductive layer 311 electrically connected to the through electrode 22, i.e., the first-surface second electrode layer 15a, the first-surface first insulating layer 312 located on the first-surface first conductive layer 311, i.e., the dielectric layer 15b, and the first-surface second conductive layer 321 located on the first-surface first insulating layer 312, i.e., the first-surface first electrode layer 15c.

In this way, the capacitor 15 is continuously provided over the vicinity of the first-surface opening Za on the first surface 13 of the capacitor through-hole Z in the substrate 12, the sidewall Za2 of the capacitor through-hole Z, and the vicinity of the second-surface opening Zc on the second surface 14 of the capacitor through-hole Z, and has a layered structure in which the first-surface second electrode layer 15a, the dielectric layer 15b, and the first-surface first electrode layer 15c are stacked in this order.

In addition, a wiring layer (not shown) may be further provided that electrically connects the through electrode 22 to only one of the first-surface second electrode layer 15a or the first-surface first electrode layer 15c of the capacitor 15.

Furthermore, like the through electrode 22 and the first-surface first conductive layer 311, the first-surface second conductive layer 321 may include an adhesion layer, a seed layer, and a plating layer stacked in this order on the first-surface first insulating layer 312. The material constituting the first-surface second conductive layer 321 is the same as the material constituting the through electrode 22 and the first-surface first conductive layer 311. The thickness of the first-surface second conductive layer 321 is, for example, 5 μm or more and 20 μm or less.

In addition, the first surface 13 side of the substrate 12 may further include through-hole wiring (not shown) that penetrates the first surface first electrode layer 15c and the dielectric layer 15b, is insulated from the first surface first electrode layer 15c, and is electrically connected to the first surface second electrode layer 15a.

As shown in FIG. 1 , the first-surface second insulating layer 322 is an insulating layer located on the first-surface first insulating layer 312 and the first-surface second conductive layer 321. The first-surface second insulating layer 322 contains an organic material with a dielectric loss tangent. Examples of organic materials that can be used for the first-surface second insulating layer 322 include polyimide and epoxy. By using an organic material with a small dielectric loss tangent to form the first-surface second insulating layer 322, it is possible to prevent electrical signals that should pass through the capacitors 15 and inductors 16 from passing through the first-surface second insulating layer 322. This allows the bandwidth of the through-hole electrode substrate 10, which includes the capacitors 15 and inductors 16, to be expanded toward the high-frequency side.

Here, Figure 5 shows another example of the capacitor shown in Figure 1.

For example, as shown in FIG. 5, the first-surface second electrode layer 15a, dielectric layer 15b, and first-surface first electrode layer 15c of adjacent capacitors 15 on the first surface 13 of the substrate 12 may be continuously connected on the first surface 13 of the substrate 12.

5 , the first-surface second insulating layer 322 is formed in a part of the region surrounded by the first-surface first electrode layer 15c inside the capacitor through-hole Z. Meanwhile, the first-surface first electrode layer 15c above the first surface 13 adjacent to the capacitor through-hole Z and the first-surface third conductive layer 331 are electrically connected.
FIG. 6 is a diagram showing yet another example of the capacitor shown in FIG.

For example, as shown in FIG. 6, the first-surface second electrode layer 15a, dielectric layer 15b, and first-surface first electrode layer 15c of adjacent capacitors 15 on the first surface 13 of the substrate 12 may not be continuously connected on the first surface 13 of the substrate 12.

For example, the first-surface first electrode layer 15c and the first-surface third conductive layer 331 of one capacitor 15 are electrically connected. The first-surface first electrode layers 15c of the other two capacitors 15 are connected to conductive layers not shown. Meanwhile, the first-surface second electrode layers 15a of the three capacitors 15 are connected to conductive layers not shown.

In the example shown in Figure 6, the inside of the capacitor through-hole Z is filled with the first-surface second electrode layer 15a, the dielectric layer 15b, and the first-surface first electrode layer 15c.

Here, Figure 7 shows an example of the configuration of the side end of a capacitor on the first surface of the through-hole electrode substrate shown in Figure 1.

For example, as shown in FIG. 7, the side edge 15aY of the first-surface second electrode layer 15a on the first surface 13 of the substrate 12 is covered by a dielectric layer 15b on the first surface 13. In the example of FIG. 7, the film thickness of the first-surface second electrode layer 15a is, for example, 10 μm or more, which is thicker than the film thickness of the first-surface first electrode layer 15c.

Furthermore, as shown in FIG. 7, the side edge 15bY of the dielectric layer 15b on the first surface 13 of the substrate 12 is located on the first surface 13 of the substrate 12 so as to cover the edge of the first-surface second electrode layer 15a on the first surface 13 of the substrate 12.

Furthermore, as shown in FIG. 7, the side edge 15cY of the first-surface first electrode layer 15c on the first surface 13 of the substrate 12 is located near the side edge 15bY of the dielectric layer 15b on the first surface 13 of the substrate 12.

Also, as shown in FIG. 7, the first-surface second electrode layer 15a has a recess 15aX at the boundary between the side end 15aY of the first-surface second electrode layer 15a and the first surface 13 of the substrate 12. The side end 15bY of the dielectric layer 15b and the side end 15cY of the first-surface first electrode layer 15c are formed so as to fill the recess 15aX of the side end 15aY of the first-surface second electrode layer 15a.

This increases the proportion of the area where the dielectric layer 15b of the capacitor 15 is in contact with the first-surface second electrode layer 15a and the first-surface first electrode layer 15c, thereby increasing the capacitance of the capacitor 15.

[First surface third wiring layer]
1 , the first-surface third wiring layer 33 has a first-surface third conductive layer 331 and a first-surface third insulating layer 332. The first-surface third conductive layer 331 is a conductive layer located on the first-surface first conductive layer 311 or the first-surface second conductive layer 321. In the example shown in FIG. 1 , the first-surface third conductive layer 331 includes a portion connected to the first-surface first conductive layer 311, which is one of the first-surface second electrode layers 15 a of the capacitor 15, and a portion connected to the first-surface second conductive layer 321, which is the other first-surface first electrode layer 15 c of the capacitor 15.

Furthermore, the first-surface third conductive layer 331 may include an adhesion layer, a seed layer, and a plating layer stacked in this order, similar to the through electrode 22 and the first-surface first conductive layer 311. The material constituting the first-surface third conductive layer 331 is the same as the material constituting the through electrode 22 and the first-surface first conductive layer 311.

The first-surface third insulating layer 332 is an insulating layer located on the first-surface second insulating layer 322 and the first-surface third conductive layer 331. Like the first-surface second insulating layer 322, the first-surface third insulating layer 332 contains an organic material having a dielectric loss tangent. Like the first-surface second insulating layer 322, the organic material for the first-surface third insulating layer 332 can be polyimide, epoxy, or the like.

(Second wiring structure part)
1 , the second wiring structure 40 includes a second-surface first wiring layer 41 located on the second surface 14 of the substrate 12. The second-surface first wiring layer 41 has a second-surface first conductive layer 411 and a second-surface first insulating layer 412.

The second-surface first conductive layer 411 is a conductive layer located on the second surface 14 of the substrate 12, and includes the second wiring L2 and the second electrode portion 22b of the through electrode 22.

This second-surface first conductive layer 411 may be connected to the through electrode 22. Furthermore, like the through electrode 22 and the first-surface first conductive layer 311, the second-surface first conductive layer 411 may include an adhesion layer 361, a seed layer 362, and a plating layer 363 stacked in this order. The material constituting the second-surface first conductive layer 411 is the same as the material constituting the through electrode 22 and the first-surface first conductive layer 311. The thickness of the second-surface first conductive layer 411 is, for example, 5 μm or more and 20 μm or less.

As shown in Figures 1 and 3, the inductor 16 is formed by the second-surface first conductive layer 411 located on the second surface 14 side, the through electrode 22 connected to the second-surface first conductive layer 411, and the first-surface first conductive layer 311 electrically connected to the through electrode 22 and located on the first surface 13 side.

The second-surface first insulating layer 412 is an insulating layer located on the second-surface first conductive layer 411 and on the second surface 14 of the substrate 12. Like the first-surface second insulating layer 322 and the first-surface third insulating layer 332, the second-surface first insulating layer 412 contains an organic material having a dielectric tangent. Like the first-surface second insulating layer 322 and the first-surface third insulating layer 332, the organic material for the second-surface first insulating layer 412 can be polyimide, epoxy, or the like.

Manufacturing Method of Through Hole Electrode Substrate Hereinafter, an example of a manufacturing method of the through hole electrode substrate 10 will be described with reference to FIGS.

(Through hole formation process)
First, the substrate 12 is prepared. Next, a resist layer is provided on the first surface 13. After that, openings are provided in the resist layer at positions corresponding to the electrode through holes 20 and the capacitor through holes Z. Next, the substrate 12 is processed at the openings in the resist layer, thereby forming the electrode through holes 20 and the capacitor through holes Z in the substrate 12, as shown in FIG. 8 . Note that, as described above, the etching conditions, the aspect ratios and widths of the electrode through holes 20 and the capacitor through holes Z are set so that the electrode through holes 20 penetrate the substrate 12 and the capacitor through holes Z penetrate the substrate 12.

Methods that can be used to process this substrate 12 include dry etching methods such as reactive ion etching and deep reactive ion etching, and wet etching.

The electrode through-holes 20 and the capacitor through-holes Z may be formed in the substrate 12 by irradiating the substrate 12 with a laser. In this case, a resist layer does not need to be provided. Lasers that can be used for laser processing include excimer lasers, Nd:YAG lasers, and femtosecond lasers. When using an Nd:YAG laser, it is possible to use a fundamental wave with a wavelength of 1064 nm, a second harmonic with a wavelength of 532 nm, or a third harmonic with a wavelength of 355 nm.

Laser irradiation and wet etching can also be combined as appropriate. Specifically, laser irradiation is first used to form an altered layer in the area of the substrate 12 where the electrode through-holes 20 and capacitor through-holes Z are to be formed. The substrate 12 is then immersed in hydrogen fluoride or the like to etch the altered layer. This allows the electrode through-holes 20 and capacitor through-holes Z to be formed in the substrate 12.

Alternatively, electrode through-holes 20 and capacitor through-holes Z may be formed in the substrate 12 by blasting, which involves spraying an abrasive material onto the substrate 12.

In this way, a substrate 12 is prepared, which includes a first surface 13 and a second surface 14 located opposite the first surface 13, and is provided with electrode through-holes 20 that penetrate between the first surface 13 and the second surface 14, and a plurality of capacitor through-holes Z that penetrate between the first surface 13 and the second surface 14 and have an opening Za in the first surface 13 and a second surface opening Zc in the second surface 14.

(Through electrode formation process)
Next, the through electrode 22 is formed in the electrode through hole 20, and the first-surface second electrode layer 15a of the capacitor 15 is formed in the capacitor through hole Z. In this embodiment, an example will be described in which the first-surface first conductive layer 311 and the second-surface first conductive layer 411 are formed simultaneously with the through electrode 22.

9 , an adhesion layer 361 is formed on the first surface 13 and the second surface 14 of the substrate 12, on the sidewalls 21 of the electrode through holes 20, and on the sidewalls Za2 of the capacitor through holes Z by a physical film formation method such as vapor deposition or sputtering. Subsequently, a seed layer 362 is formed on the adhesion layer 361 by electroless plating. Thereafter, a step of annealing the adhesion layer 361 and the seed layer 362 may be performed.
The method for forming the adhesion layer 361 and the seed layer 362 is not limited to the above-described method. For example, the adhesion layer 361 containing zinc oxide or the like may be formed by a sol-gel method, and then the seed layer 362 may be formed on the adhesion layer 361 by electroless plating. Furthermore, both the adhesion layer 361 and the seed layer 362 may be formed by a physical film formation method such as vapor deposition or sputtering.

Next, as shown in FIG. 10, a resist layer 37 is partially formed on the seed layer 362. Subsequently, as shown in FIG. 11, a plating layer 363 is formed by electrolytic plating on the seed layer 362 that is not covered by the resist layer 37. Thereafter, as shown in FIG. 12, the resist layer 37 is removed. Furthermore, the portions of the adhesion layer 361 and the seed layer 362 that were covered by the resist layer 37 are removed by, for example, wet etching.

In this manner, the first-surface first conductive layer 311 and second-surface first conductive layer 411, each including the through electrode 22 and the first-surface second electrode layer 15a, can be formed. This allows for the formation of an inductor 16 comprising the second-surface first conductive layer 411, the through electrode 22 connected to the second-surface first conductive layer 411, and the first-surface first conductive layer 311 connected to the through electrode 22. A step of annealing the plating layer 363 may also be performed.

In particular, the first-surface second electrode layer 15a of the capacitor 15 is formed in the capacitor through hole Z at the same time as the through electrode 22 is formed in the electrode through hole 20. More specifically, in the example of FIG. 12, the first-surface second electrode layer 15a of the capacitor 15 is formed so as to be continuous over the vicinity of the opening Za of the capacitor through hole Z in the substrate 12, the sidewall Za2 of the capacitor through hole Z, and the vicinity of the second-surface opening Zc of the second surface 14 of the capacitor through hole Z.

(Surface treatment process)
Next, a surface treatment step may be performed in which the surface of the first-side first conductive layer 311 is exposed to plasma such as _NH3 plasma. This makes it possible to remove oxides on the surface of the first-side first conductive layer 311. For example, if the first-side first conductive layer 311 contains copper, it is possible to remove copper oxide on the surface of the first-side first conductive layer 311. This makes it possible to improve adhesion between the first-side first conductive layer 311 and the first-side first insulating layer 312 formed on the first-side first conductive layer 311.

(Step of forming first insulating layer on first surface)
Next, the first surface first insulating layer 312 including the dielectric layer 15 b of the capacitor 15 is formed on the first surface first conductive layer 311 .

First, as shown in FIG. 13, a resist layer 38 is partially formed on the first-surface first conductive layer 311. Next, as shown in FIG. 14, a first-surface first insulating layer 312 including a dielectric layer 15b is formed on the first-surface first conductive layer 311 and the portion of the first surface 13 of the substrate 12 that is not covered by the resist layer 38. Methods that can be used to form the first-surface first insulating layer 312 include, for example, plasma CVD and sputtering. Then, as shown in FIG. 15, the resist layer 38 is removed. In this way, the first-surface first insulating layer 312 can be partially formed on the first-surface first conductive layer 311 including the first-surface second electrode layer 15a.

(Step of forming first surface second conductive layer)
16, a first-side second conductive layer 321 including a first-side first electrode layer 15c is formed on the first-side first insulating layer 312 including the dielectric layer 15b. This allows for the formation of a capacitor 15 having a stacked structure including the first-side first conductive layer 311, the first-side first insulating layer 312 on the first-side first conductive layer 311, and the first-side second conductive layer 321 on the first-side first insulating layer 312, i.e., the first-side second electrode layer 15a, the dielectric layer 15b, and the first-side first electrode layer 15c stacked in this order.

The process for forming the first-surface second conductive layer 321 is similar to the process for forming the first-surface first conductive layer 311, so a detailed description will be omitted.

In this way, the through electrode 22 is formed and the capacitor 15 is formed on the first surface 13 side of the substrate 12.

(Step of forming first surface second insulating layer)
17 , a first-surface second insulating layer 322 is formed on the first-surface first insulating layer 312 and the first-surface second conductive layer 321. In addition, a second-surface first insulating layer 412 is formed on the second surface 14 of the substrate 12 and the second-surface first conductive layer 411.

For example, first, a second-surface film having a photosensitive layer containing an organic material and a base material is attached to the second surface 14 of the substrate 12. Next, the second-surface film is subjected to an exposure process and a development process. This allows a second-surface first insulating layer 412 made of the photosensitive layer of the second-surface film to be formed on the second surface 14 of the substrate 12.

Then, a first-surface film having a photosensitive layer containing an organic material and a base material is attached to the first surface 13 of the substrate 12. Next, the first-surface film is subjected to exposure and development processes so as to form the openings 323 shown in FIG. 18. This results in a first-surface second insulating layer 322 made of the photosensitive layer of the first-surface film, with openings 323 formed in a portion of the first-surface second conductive layer 321 and a portion of the first-surface first conductive layer 311.

The organic layer 26 filling the electrode through-hole 20 may be formed by providing a portion of the first-surface second insulating layer 322 or a portion of the second-surface first insulating layer 412 inside the electrode through-hole 20. For example, by pushing the second-surface side film or first-surface side film described above into the electrode through-hole 20, the organic layer 26 can be formed inside the electrode through-hole 20 simultaneously with the first-surface second insulating layer 322 or the second-surface first insulating layer 412. The organic layer 26 may be formed in a separate process from the second-surface first insulating layer 412 or the first-surface second insulating layer 322.

The method for forming the second-surface first insulating layer 412 and the first-surface second insulating layer 322 is not limited to the method using a film. For example, an organic layer can be formed by first applying a liquid containing an organic material such as polyimide using a method such as spin coating and drying it. The organic layer can then be subjected to an exposure process and a development process to form the second-surface first insulating layer 412 and the first-surface second insulating layer 322.

(Step of forming the first surface third conductive layer)
Next, as shown in FIG. 19, a portion of the first-surface first insulating layer 312 that overlaps with the opening 323 of the first-surface second insulating layer 322 is etched to form an opening in the first-surface first insulating layer 312 .

Next, a first-side third conductive layer 331 is formed, which is connected to the first-side first conductive layer 311 or the first-side second conductive layer 321 via the opening 323 in the first-side second insulating layer 322 and the opening in the first-side first insulating layer 312. The process for forming the first-side third conductive layer 331 is similar to the process for forming the first-side first conductive layer 311, so a description thereof will be omitted.

(Step of forming the first surface third insulating layer)
Thereafter, a first-side third insulating layer 332 is formed partially on the first-side second insulating layer 322 and the first-side third conductive layer 331. This makes it possible to obtain the through-hole electrode substrate 10 shown in FIG. 1 described above. The method for forming the first-side third insulating layer 332 is not particularly limited. As with the first-side second insulating layer 322, the first-side third insulating layer 332 can be formed by using a film or liquid containing an organic material.

(Function of the through electrode substrate 10)
The operation of the through electrode substrate 10 according to this embodiment will be described below.

As previously described, the substrate 12 is provided with electrode through-holes 20 that extend from the first surface 13 to the second surface 14, i.e., that penetrate between the first surface 13 and the second surface 14, and is provided with a plurality of capacitor through-holes Z that penetrate between the first surface 13 and the second surface 14 and have an opening Za in the first surface 13 and a second surface opening Zc in the second surface 14.

A plurality of capacitors 15 are provided on the first surface 13 of the substrate 12 in one-to-one correspondence with each capacitor through hole Z. In particular, the capacitors 15 are provided continuously across the vicinity of the first-surface opening Za on the first surface 13 of the capacitor through hole Z of the substrate 12, the sidewall Za2 of the capacitor through hole Z, and the vicinity of the second-surface opening Zc on the second surface 14 of the capacitor through hole Z, and have a layered structure in which the first-surface second electrode layer 15a, the dielectric layer 15b, and the first-surface first electrode layer 15c are stacked in this order.

This allows capacitors 15 to be mounted at high density on the through electrode substrate 10.

In this embodiment, the substrate 12 of the through electrode substrate 10 includes glass. Glass has higher insulating properties than silicon, which is used as the substrate for conventional through electrode substrates. This prevents a portion of the high-frequency signal passing through the capacitor 15 or inductor 16 from passing through the substrate 12. This allows the bandwidth of the capacitor 15 or inductor 16 to be expanded toward the high-frequency side. It also improves the voltage resistance characteristics of the capacitor 15 or inductor 16.

It should be noted that various modifications can be made to the above-described embodiment. Below, modifications will be described, with reference to the drawings as necessary. In the following description and the drawings used in the following description, parts that can be configured similarly to the above-described embodiment will be designated by the same reference numerals as those used for the corresponding parts in the above-described embodiment, and duplicate explanations will be omitted. Furthermore, if it is clear that the effects obtained in the above-described embodiment can also be obtained in the modified embodiment, the explanation of those effects may be omitted.

(First Modification)
20 is a cross-sectional view showing an example of a mounting substrate 60 including the through hole electrode substrate 10 shown in FIG. 1 and an element 50 mounted on the through hole electrode substrate 10. The element 50 is an LSI chip such as a logic IC or a memory IC. The element 50 may also be a MEMS (Micro Electro Mechanical Systems) chip. A MEMS chip is an electronic device in which mechanical components, sensors, actuators, electronic circuits, etc. are integrated on a single substrate. As shown in FIG. 20 , the element 50 has a terminal 51 electrically connected to a conductive layer such as the third conductive layer 331 on the first surface of the through hole electrode substrate 10.

While several variations on the above-described embodiment have been described, it is of course possible to combine multiple variations as appropriate.

21 is a diagram showing an example of a product in which the through electrode substrate 10 according to an embodiment of the present disclosure can be mounted. The through electrode substrate 10 according to an embodiment of the present disclosure can be used in a variety of products. For example, the through electrode substrate 10 can be mounted in a notebook personal computer 110, a tablet terminal 120, a mobile phone 130, a smartphone 140, a digital video camera 150, a digital camera 160, a digital clock 170, a server 180, etc.

10 Through electrode substrate 12 Substrate 13 First surface 14 Second surface 15 Capacitor 16 Inductor 20 Electrode through hole Z Capacitor through hole 50 Element 60 Mounting substrate 110 Notebook personal computer 120 Tablet terminal 130 Mobile phone 140 Smartphone 150 Digital video camera 160 Digital camera 170 Digital clock 180 Server

Claims (1)

a substrate including a first surface and a second surface located opposite to the first surface, the substrate having an electrode through-hole penetrating between the first surface and the second surface and a capacitor through-hole penetrating between the first surface and the second surface;
a through electrode located in the electrode through hole of the substrate;
a capacitor having a laminated structure in which a first-surface second electrode layer, a dielectric layer, and a first-surface first electrode layer are laminated in this order, the capacitor being continuously provided over a vicinity of a first-surface opening on the first surface of the capacitor through hole of the substrate, a sidewall of the capacitor through hole, and a vicinity of a second-surface opening on the second surface of the capacitor through hole;
the first-surface second electrode layer has a recess at a boundary between a side end of the first-surface second electrode layer and the first surface of the substrate,
A through electrode substrate , wherein the side edge of the dielectric layer and the side edge of the first electrode layer on the first surface are formed so as to fill in the recess in the side edge of the second electrode layer on the first surface .