JP7743154B2 - Power supply voltage adjustment circuit - Google Patents

Description

This invention relates to a power supply voltage regulation circuit used to regulate and control power supply voltage.

A known conventional circuit used to control voltage adjustment is a monitor circuit that includes a reference voltage generation unit that generates a first reference voltage and a second reference voltage that is generated based on a ground voltage common to the first reference voltage and has a different value from the first reference voltage; a first amplifier unit that amplifies the difference between the first and second reference voltages; a second amplifier unit that amplifies the difference between the first reference voltage and an internal power supply voltage supplied to a functional block provided in a semiconductor integrated circuit; and a comparison unit that compares the amplification results of the first and second amplifier units and outputs the result as a measurement result (see Patent Document 1).

JP 2014-145704 A

In semiconductor integrated circuits, rapid control of IR-Drop (i.e., the voltage drop caused by the resistance component (R) of a conductor when a current (I) flows) in accordance with the operating state is required to improve power efficiency and ensure stable circuit operation. Simplification of voltage adjustment circuits is also desirable to reduce mounting area and costs. The monitor circuit in Patent Document 1 is a technology that aims to mitigate the effects of external impedance and IR-Drop in order to compensate for the operation of digital circuits. However, it is configured as a circuit equipped with two bandgap reference circuits and a comparator, which creates the problem of a complex circuit configuration, which in turn results in a larger mounting area and makes it difficult to reduce costs.

The objective of this invention is to provide a power supply voltage adjustment circuit that can accurately adjust and control the power supply voltage while simplifying the circuit configuration.

To solve the above problem, the power supply voltage adjustment circuit of the present invention comprises a feedback resistor disposed between a resistor constituting a feedback mechanism on the external power supply circuit side and a ground-side resistor, the feedback mechanism having a feedback function that receives an external power supply voltage from an external power supply and outputs an output voltage, and a D/A conversion circuit having a variable resistor disposed within an SoC that receives an internal power supply voltage based on the output voltage, and is characterized in that the internal power supply voltage is adjusted to a predetermined target voltage by changing the resistance value of the variable resistor to change the output voltage.

The power supply voltage adjustment circuit according to the present invention may further include a bandgap reference circuit that generates a BGR voltage, and may calculate control data for changing the resistance value of the variable resistor using the BGR voltage when the SoC is in an idle state and the BGR voltage when the SoC is in an active state.

The power supply voltage adjustment circuit according to the present invention may measure the voltage between the feedback resistor and the ground-side resistor, and calculate control data for changing the resistance value of the variable resistor using the voltage when the SoC is in an idle state and the voltage when the SoC is in an active state.

The power supply voltage adjustment circuit of the present invention may be configured so that the target voltage is set for each process state within the SoC.

The power supply voltage adjustment circuit according to the present invention may further include a temperature measurement circuit that measures the ambient temperature or junction temperature, and may recalculate the control data for changing the resistance value of the variable resistor when the ambient temperature or junction temperature fluctuates.

The power supply voltage regulation circuit of this invention arranges a feedback resistor between the resistor constituting the feedback mechanism on the external power supply circuit side and the ground-side resistor, and arranges a D/A conversion circuit with a variable resistor within the SoC to adjust the internal power supply voltage by changing the resistance value of the variable resistor. This makes it possible to accurately adjust and control the power supply voltage while simplifying the circuit configuration, thereby enabling a reduction in packaging area and lower costs. Furthermore, by incorporating a D/A conversion circuit as a voltage regulation circuit within the SoC, the power supply voltage regulation circuit of this invention also eliminates the need for external circuit components such as variable resistors, making it possible to realize a compact, low-cost system.

With the power supply voltage adjustment circuit of this invention, when the BGR voltage generated by the bandgap reference circuit is used to calculate the control data for the D/A conversion circuit, highly accurate voltage measurements can be performed with a single power supply by referencing a single BGR voltage.

With the power supply voltage adjustment circuit of this invention, when the control data for the D/A conversion circuit is calculated using the voltage between the feedback resistor and the ground-side resistor, it is possible to perform highly accurate voltage measurements with a single power supply by referencing an external voltage even in systems that do not have a highly accurate reference power supply (for example, systems that do not have a bandgap reference circuit).

With the power supply voltage adjustment circuit of this invention, if the target voltage is set for each process state within the SoC, it becomes possible to perform voltage management that accurately tracks fluctuations in IR-Drop due to process fluctuations.

With the power supply voltage adjustment circuit of this invention, if the control data for the D/A conversion circuit is recalculated when the environmental temperature/junction temperature measured by the temperature measurement circuit fluctuates, it becomes possible to perform voltage management that accurately tracks fluctuations in IR-Drop due to temperature fluctuations.

1 is a diagram showing a schematic configuration of a power supply voltage adjustment circuit according to a first embodiment of the present invention; 2 is a diagram showing a schematic configuration of a portion particularly related to an external power supply circuit when a D/A conversion circuit in an SoC of the power supply voltage adjustment circuit of FIG. 1 is a resistive D/A conversion circuit; 2 is a diagram showing a schematic configuration of a portion particularly related to an external power supply circuit when a D/A conversion circuit in the SoC of the power supply voltage adjustment circuit of FIG. 1 is a current-type D/A conversion circuit; FIG. 2 is a diagram showing a schematic configuration of an SoC of the power supply voltage adjustment circuit of FIG. 1; 4 is a diagram showing an example of the relationship between the control code and the output voltage value of the D/A conversion circuit of FIG. 2 or FIG. 3. 2 is a flowchart showing a procedure for adjusting an internal power supply voltage in the power supply voltage adjusting circuit of FIG. 1; 10 is a diagram illustrating an example of the relationship between the control code of the D/A conversion circuit and the measured value of the internal power supply voltage in the first control when the D/A conversion circuit is a resistive D/A conversion circuit. FIG. 10 is a diagram illustrating an example of the relationship between the control code of the D/A conversion circuit and the measurement value of the internal power supply voltage in the first control when the D/A conversion circuit is a current-type D/A conversion circuit. FIG. 10A and 10B are diagrams illustrating an example of the relationship between the control code of the D/A conversion circuit and the measured value of the internal power supply voltage in the second and subsequent control operations when the D/A conversion circuit is a current-type D/A conversion circuit; FIG. 10 is a diagram showing a schematic configuration of a power supply voltage adjustment circuit according to a second embodiment of the present invention; FIG. 11 is a diagram showing a schematic configuration of an SoC of the power supply voltage regulator circuit of FIG. 10;

The present invention will be described below based on the illustrated embodiment.

First Embodiment
FIG. 1 is a diagram showing a schematic configuration of a power supply voltage adjustment circuit 1 according to a first embodiment of the present invention.

The power supply voltage adjustment circuit 1 according to the first embodiment includes a feedback resistor R fb1 disposed between a resistor R ₁ and a ground-side resistor R ₂ that constitute a feedback mechanism on the side of the external power supply circuit 2, which has a feedback function of receiving an external power supply voltage _Vext from an external power supply (not shown) and outputting an output voltage Vout, and a D/A conversion circuit 36 having a variable resistor disposed within the SoC 3 that receives an internal power supply voltage VDD based on the output voltage Vout. The internal power supply voltage VDD is adjusted to a predetermined target voltage by changing the resistance values R _DAC and I _DAC of the variable resistor to change the output voltage Vout, and in particular includes a bandgap reference circuit 31 that generates a BGR voltage V _BGR , and calculates control data for changing the resistance values R _DAC and I _DAC of the variable resistor using the BGR voltage V _BGR when the SoC 3 is in an idle state and the BGR voltage V _BGR when the SoC 3 is in an active state.

The power supply voltage regulation circuit 1 comprises an external power supply circuit 2, an SoC 3, and multiple resistors R interposed between the external power supply circuit 2 and the SoC 3.

(External power supply circuit configuration)
2 and 3 are diagrams showing the general configuration of the portion particularly related to the external power supply circuit 2. Fig. 2 shows the general configuration when a resistance-type D/A conversion circuit is provided as the D/A conversion circuit 36 within the SoC 3, and Fig. 3 shows the general configuration when a current-type D/A conversion circuit is provided as the D/A conversion circuit 36 within the SoC 3.

The external power supply circuit 2 receives an external power supply voltage Vext from its external power supply (not shown) and outputs an output voltage Vout via a p-type MOSFET (short for Metal Oxide Semiconductor Field Effect Transistor) 21.

The gate of the p-type MOSFET 21 is connected to the output pin of the operational amplifier 22, and the external power supply voltage Vext is applied to the source.

A resistor _R1 (the resistance value is also R1), a feedback resistor _Rfb1 (the resistance value is also _Rfb1 ), and a ground-side resistor R2 (the resistance value is also _R2 ) are connected in series in this order to the drain side of the p-type MOSFET ₂₁ via terminal ₁₁ .

A reference voltage Vfb of the external power supply circuit 2 is applied to one differential input pin (-) of the operational amplifier 22, and a voltage (called "feedback voltage _VFB ") at the connection terminal 12 between the feedback resistor _Rfb1 and the ground side resistor _R2 is applied to the other differential input pin (+).

In other words, the above configuration is such that a feedback resistor Rfb1 is further inserted between the resistor _R1 and the ground-side resistor _R2 in a typical low dropout (LDO: Low Drop Out) linear regulator on the external power supply circuit 2 side, which is composed of a p-type MOSFET ₂₁ , an operational amplifier ₂₂ , a resistor R1, and a ground-side resistor _R2 .

An output voltage Vout output from the external power supply circuit 2 is supplied to the SoC 3 as an internal power supply voltage VDD via a terminal 11 and resistors _R3 and _R5 connected in series.

The voltage at the connection terminal 13 between the resistor _R1 and the feedback resistor _Rfb1 is called the "control voltage _VFBCtrl ." The control voltage _VFBCtrl is a voltage determined by the control value (called the "control code") of the D/A conversion circuit 36, and affects the output voltage Vout output from the external power supply circuit 2.

The voltage from terminal 14 of ground-side resistor _R2 , opposite feedback resistor _Rfb1 , to the external power supply circuit 2 is the reference voltage _VGND (in other words, the ground voltage) of the external power supply circuit 2 via ground terminal 15. The voltage from terminal 14 to the SoC3 is the ground voltage _VSS of SoC3 via resistors _R4 and _R6 connected in series.

(SoC configuration)
FIG. 4 is a diagram showing a schematic configuration of an SoC (abbreviation of System on a Chip) 3. As shown in FIG.

SoC3 mainly includes a bandgap reference circuit 31, a temperature measurement circuit 32, a process monitor circuit 33, a multiplexer 34, an A/D conversion circuit 35, a D/A conversion circuit 36, a central processing unit 37, a memory 38, and a user interface 39. The multiplexer 34, the A/D conversion circuit 35, the D/A conversion circuit 36, the central processing unit 37, the memory 38, and the user interface 39 are electrically connected to each other via a bus 40 to enable the exchange of data, etc. Each component of SoC3 operates by receiving the internal power supply voltage VDD supplied to SoC3 from the external power supply circuit 2.

A band gap reference circuit (BGR: Band Gap Reference) 31 generates a BGR voltage V _BGR and outputs it to a multiplexer 34 .

The bandgap reference circuit 31 can output a constant voltage (also called a "reference voltage") that is independent of the internal power supply voltage VDD when the internal power supply voltage VDD is sufficiently higher than its operating voltage, but when the internal power supply voltage VDD is lower than its operating voltage, it cannot operate stably and the output voltage becomes unstable.

The temperature measurement circuit 32 measures the environmental temperature (i.e., the temperature around the package containing the SoC3) or the junction temperature (i.e., the temperature of the junction of the SoC3) and outputs it to the multiplexer 34.

The process monitor circuit 33 is a mechanism for recognizing the state of processes within SoC3, and outputs a monitor signal corresponding to the state of processes within SoC3 to the multiplexer 34. Specifically, when SoC3 operates at a low speed, the process monitor circuit 33 outputs a clock with a longer period as the monitor signal, resulting in a low-frequency clock; and when SoC3 operates at a high speed, the process monitor circuit 33 outputs a clock with a shorter period as the monitor signal, resulting in a high-frequency clock.

The multiplexer (MUX) 34 receives as input the BGR voltage V _BGR generated by the bandgap reference circuit 31, the environmental temperature or junction temperature measured by the temperature measurement circuit 32, the monitor signal output from the process monitor circuit 33, and the measured value VDDsense of the internal power supply voltage VDD supplied from the external power supply circuit 2 to the SoC 3.

Then, based on a control signal MUXctrl output from the central processing unit 37, the multiplexer 34 outputs any one of the above-mentioned BGR voltage V _BGR , environmental temperature/junction temperature, monitor signal, and measured value VDDsense of the internal power supply voltage to the A/D conversion circuit 35.

The A/D conversion circuit (ADC: Analog-to-Digital Converter) 35 receives input of (any of) the BGR voltage V _BGR , environmental temperature/junction temperature, monitor signal, and measured value VDDsense of the internal power supply voltage output from the multiplexer 34, performs analog-to-digital conversion processing, and outputs ADCData, which is a digital version of (any of) the BGR voltage V _BGR , environmental temperature/junction temperature, monitor signal, and measured value VDDsense of the internal power supply voltage.

The D/A conversion circuit (DAC: Digital-to-Analog Converter) 36 is configured by a resistance- _type D/A conversion circuit having a variable resistor or a current-type D/A conversion circuit, and is connected to a connection terminal 13 between the resistor _R1 and the feedback resistor _Rfb1 . The voltage at the connection terminal 13 is the control voltage VFBCtrl, as described above.

The D/A conversion circuit 36 receives DAC Data input via the bus 40. Specifically, the DAC Data is code for controlling the variable resistor of the D/A conversion circuit 36 (referred to as the "control code of the D/A conversion circuit 36").

(In the case of a resistive D/A conversion circuit)
When the D/A conversion circuit 36 is configured as a resistance-type (also called a "ladder type") D/A conversion circuit (see FIG. 2), if the resistance value of the variable resistor is R _DAC , the value of the output voltage Vout output from the external power supply circuit 2 satisfies the following Equation 1:

When the resistance value R _DAC of the variable resistor in Equation 1 above is low impedance, the value of the output voltage Vout increases by the variable resistor term (i.e., "R ₁ /R _DAC (R _fb1 /R ₂ +1)"). Therefore, by inserting a feedback resistor R _fb1 between resistor R ₁ and ground-side resistor R ₂ that constitute a typical low dropout (LDO) linear regulator on the external power supply circuit 2 side and by providing a resistive D/A conversion circuit within the SoC 3, it becomes possible to control the power supply voltage in response to IR-Drop (i.e., the voltage drop that occurs when the internal power supply voltage VDD supplied from the external power supply circuit 2 to the SoC 3 due to the resistance component (R) of the package and wiring resistance inside the SoC 3 when a current (I) flows), and voltage control can be achieved with a compact circuit.

(In the case of a current-type D/A conversion circuit)
When the D/A conversion circuit 36 is configured as a current-type (also called a "current adding type") D/A conversion circuit (see FIG. 3), if the resistance value of the variable resistor is I _DAC , the value of the output voltage Vout output from the external power supply circuit 2 follows Equation 2 below.

As the resistance value I _DAC of the variable resistor in the above formula 2 increases, the value of the output voltage Vout increases by the amount of the variable resistor (i.e., "R ₁ I _DAC "). For this reason, by inserting a feedback resistor R _fb1 between resistor R ₁ and ground-side resistor R ₂ that constitute a typical low dropout (LDO) linear regulator on the external power supply circuit 2 side, and by providing a current-type D/A conversion circuit within SoC 3, it becomes possible to control the power supply voltage in accordance with IR-Drop, and to achieve voltage control with a compact circuit.

The central processing unit (CPU) 37 coordinates and controls the start, content, and end of processing by each component of the SoC3, so as to perform calculations related to adjusting the internal power supply voltage VDD.

Memory 38 functions as a working area for temporarily storing data and information generated when central processing unit 37 performs arithmetic processing related to adjusting the internal power supply voltage VDD, and as a storage area for storing various information, programs, and data, and is composed of memory elements such as RAM (Random Access Memory) and ROM (Read Only Memory).

The user interface (User I/F) 39 is an interface that has the function of receiving operations from an operator or the like and inputting various information and instructions to the SoC 3.

5 shows the results of a simulation conducted to verify that the output voltage Vout changes as intended (specifically, increases by the variable resistor term) when the power supply load is the same by inserting a feedback resistor _Rfb1 between resistor _R1 and ground-side resistor _R2 that constitute a typical low dropout (LDO) linear regulator on the external power supply circuit 2 side, and by providing a current-type D/A converter circuit or a resistive-type D/A converter circuit within SoC 3. The change in output voltage Vout is similar when a current-type D/A converter circuit is provided and when a resistive-type D/A converter circuit is provided.

5, it can be seen that changing the control code of the D/A conversion circuit 36 (denoted as "DAC control code" in the figure) from 0.0 changes the resistance values R _DAC and I _DAC of the variable resistors, thereby changing the value of the output voltage Vout. Furthermore, a change in the output voltage Vout output from the external power supply circuit 2 changes the internal power supply voltage VDD supplied to the SoC 3. Therefore, it can be seen that the internal power supply voltage VDD can be appropriately adjusted by providing an appropriate control code to the D/A conversion circuit 36.

(Internal power supply voltage adjustment procedure)
6 is a flow diagram of the procedure for adjusting the internal power supply voltage VDD. The transition between the idle state and the active state of the system (specifically, including the SoC 3) is performed in accordance with a control signal output from the central processing unit 37.

The optimal operating voltage for the SoC3 (called the "target voltage"), which was set in advance when the SoC3 was designed, is stored in memory 38.

Here, the optimal operating voltages corresponding to the lowest (SS: minimum speed), fastest (FF: maximum speed), and typical (TT: typical value) process states when the SoC3 is active differ by, for example, about 10 to 20 mV.

In light of the above, the internal power supply voltage VDD may be adjusted regardless of the state of the process within SoC3, or may be adjusted for each of the lowest (SS: minimum speed), fastest (FF: maximum speed), and representative (TT: representative value) operating speeds as the state of the process within SoC3.

If the internal power supply voltage VDD is adjusted regardless of the state of the process inside SoC3, a single target voltage that is independent of the state of the process inside SoC3 (for example, in a representative state when active) is set and stored in advance in memory 38.

On the other hand, if the internal power supply voltage VDD is adjusted for each of the lowest (SS: minimum speed), highest (FF: maximum speed), and representative (TT: representative value) operating speeds as the process state within SoC3, target voltages are set for each of the lowest (SS: minimum speed), highest (FF: maximum speed), and representative (TT: representative value) operating speeds as the process state within SoC3 and are stored in advance in memory 38.

The state of the process inside SoC3 is determined based on the cycle/frequency of the clock output as a monitor signal from process monitor circuit 33. Note that if the internal power supply voltage VDD is adjusted regardless of the state of the process inside SoC3, there is no need to detect the state of the process inside SoC3, so the process monitor circuit 33 may not be provided.

To adjust the internal power supply voltage VDD, measurements are first taken and data is retained while the system is in an idle state (step S1).

First, the system is put into an idle state based on a control signal output from the central processing unit 37. Power consumption in the idle state is, for example, up to a few mW, and because the current flowing in the idle state is so minute, IR-Drop is negligibly small.

Then, based on a control signal MUXctrl output from the central processing unit 37, the multiplexer 34 outputs the idle BGR voltage V _BGR of the bandgap reference circuit 31, and the value of the idle BGR voltage V _BGR is stored in the memory 38 via the A/D conversion circuit 35.

In addition, based on the control signal MUXctrl output from the central processing unit 37, the multiplexer 34 outputs the measured value VDDsense of the internal power supply voltage during idle time, and this measured value VDDsense of the internal power supply voltage during idle time is stored in memory 38 via the A/D conversion circuit 35.

Furthermore, characteristic data of the D/A conversion circuit 36 during idle is calculated. Specifically, the central processing unit 37 uses the value of the BGR voltage V _BGR during idle stored in the memory 38 and the measured value VDDsense of the internal power supply voltage to calculate characteristic data D _BGR of the D/A conversion circuit 36 during idle according to the following equation 3.

In the above equation 3, Vref is the measured value VDDsense of the internal power supply voltage during idle, and N is the resolution of the D/A conversion circuit 36 (in other words, the number of bits; the same applies below).

Then, the characteristic data _DBGR of the D/A conversion circuit 36 during idle time calculated according to the above equation 3 is stored in the memory 38.

Next, measurements and data retention are performed while the system is active (step S2).

First, the system is activated based on a control signal output from the central processing unit 37. Power consumption in the active state is, for example, up to 1 W, and the current flowing in the active state is large, resulting in a large IR-Drop.

Then, based on the control signal MUXctrl output from the central processing unit 37, the multiplexer 34 outputs the environmental temperature/junction temperature measured by the temperature measurement circuit 32, and the environmental temperature/junction temperature value is stored in memory 38 via the A/D conversion circuit 35.

Furthermore, based on a control signal MUXctrl output from the central processing unit 37, the multiplexer 34 outputs the BGR voltage V _BGR when the bandgap reference circuit 31 is active, and the value of the BGR voltage V _BGR when active is stored in the memory 38 via the A/D conversion circuit 35.

In addition, based on the control signal MUXctrl output from the central processing unit 37, the multiplexer 34 outputs the measurement value VDDsense of the internal power supply voltage when active, and this measurement value VDDsense of the internal power supply voltage when active is stored in memory 38 via the A/D conversion circuit 35.

Furthermore, characteristic data of the D/A conversion circuit 36 in the active state is calculated. Specifically, the central processing unit 37 uses the value of the BGR voltage V _BGR in the idle state stored in the memory 38, the value of the BGR voltage V _BGR in the active state, and the measured value VDDsense of the internal power supply voltage to calculate characteristic data D _{BGR_IR} of the D/A conversion circuit 36 in the active state according to the following equation 4.

In the above equation 4, Vref is the measured value VDDsense of the internal power supply voltage during active mode. Also, _VIR is the difference between the value of the BGR voltage _VBGR during idle mode and the value of the BGR voltage _VBGR during active mode, i.e., it is calculated as _VIR = (value of the BGR voltage _VBGR during idle mode) - (value of the _BGR voltage VBGR during active mode). _VIR is called the "drop voltage."

Then, the value of the drop voltage V _IR and the characteristic data _{DBGR_IR} of the D/A conversion circuit 36 in the active state calculated according to the above equation 4 are stored in the memory 38 .

Next, control data for the D/A conversion circuit 36 is calculated (step S3). Specifically, the central processing unit 37 uses characteristic data D _BGR of the D/A conversion circuit 36 in the idle state, the measurement value VDDsense of the internal power supply voltage in the active state, characteristic data D BGR_IR of the D/A conversion circuit 36, and the value of the drop voltage V _IR , all of which are stored in the _memory 38, to calculate the control reference voltage Dvdd sense according to the following equation 5.

In the above equation 5, Vref and VDDsense are the measured values of the internal power supply voltage VDDsense when active.

Then, based on the control reference voltage Dvdd sense calculated according to the above equation 5, a control code for the D/A conversion circuit 36 is determined and output as control data for the D/A conversion circuit 36 ("DACData" in the figure), and the variable resistor of the D/A conversion circuit 36 is controlled to change the resistance values R _DAC and I _DAC of the variable resistor (step S4).

Specifically, the control code of the D/A conversion circuit 36 is determined so that the difference ΔD between the target voltage Dtarget and the control reference voltage Dvdd sense (i.e., ΔD=Dtarget−Dvddsense) becomes zero. Then, the control voltage V _{FB Ctrl} is controlled so that the output voltage Vout output from the external power supply circuit 2 approaches the target voltage Dtarget.

Next, the internal power supply voltage after control by the D/A conversion circuit 36 is measured (step S5). Specifically, the multiplexer 34 outputs the measured value VDDsense of the internal power supply voltage based on the control signal MUXctrl output from the central processing unit 37.

Next, it is determined whether the measured value VDDsense of the internal power supply voltage after control by the D/A conversion circuit 36 is the target voltage (step S6).

For example, if the measured value VDDsense of the internal power supply voltage after control by the D/A conversion circuit 36 falls within a predetermined range that includes the value of the target voltage, it is determined that the measured value VDDsense of the internal power supply voltage has reached the target voltage.

If the measured value VDDsense of the internal power supply voltage after control by the D/A conversion circuit 36 is not the target voltage (step S6: No), the process returns to step S1, and the processing up to step S5 is repeated to determine again whether the measured value VDDsense of the internal power supply voltage after control by the D/A conversion circuit 36 is the target voltage (step S6).

On the other hand, if the measured value VDDsense of the internal power supply voltage after control by the D/A conversion circuit 36 is equal to the target voltage (step S6: Yes), the control code of the D/A conversion circuit 36 is stored in memory 38 (step S7).

When the internal power supply voltage VDD is adjusted regardless of the state of the process inside SoC3, a single control reference voltage Dvdd sense is calculated regardless of the state of the process inside SoC3 (for example, in a representative state when active), and the control code for the D/A conversion circuit 36 is stored in memory 38. On the other hand, when the internal power supply voltage VDD is adjusted for each of the lowest (SS: minimum speed), highest (FF: maximum speed), and representative (TT: representative value) operating speeds as the state of the process inside SoC3, a control reference voltage Dvdd sense is calculated for each of the lowest (SS: minimum speed), highest (FF: maximum speed), and representative (TT: representative value) operating speeds as the state of the process inside SoC3, and the control code for the D/A conversion circuit 36 is stored in memory 38.

After the control reference voltage Dvdd sense is calculated and the control code for the D/A conversion circuit 36 is stored in memory 38, the control code for the D/A conversion circuit 36 stored in memory 38 is used to adjust the internal power supply voltage VDD when the system (specifically, including SoC3) transitions from the idle state to the active state.

7 is a diagram showing an example of the relationship between the control code of the D/A converter circuit 36 and the measured value VDDsense of the internal power supply voltage during the first control when the D/A converter circuit 36 is configured as a resistive D/A converter circuit (see FIG. 2). In the example shown in FIG. 7, the impedance of the D/A converter circuit 36 (i.e., the resistive D/A converter circuit) is maximized when the control code is at its maximum value. FIG. 8 is a diagram showing an example of the relationship between the control code of the D/A converter circuit 36 and the measured value VDDsense of the internal power supply voltage during the first control when the D/A converter circuit 36 is configured as a current-type D/A converter circuit (see FIG. 3). In the example shown in FIG. 8, the current of the D/A converter circuit 36 (i.e., the current-type D/A converter circuit) is minimized when the control code is at its minimum value. The value of the internal power supply voltage VDD changes at regular intervals with the measured value VDDsense of the internal power supply voltage. 7 and 8, it can be seen that when the system (specifically, including SoC3) transitions from the idle state to the active state, an IR-Drop occurs, but the control code of the D/A conversion circuit 36 is changed in response to the drop voltage V _IR , and the internal power supply voltage VDD is appropriately adjusted.

Figure 9 also shows an example of the relationship between the control code of the D/A conversion circuit 36 and the measured value VDDsense of the internal power supply voltage during second and subsequent control operations when the D/A conversion circuit 36 is configured as a current-type D/A conversion circuit (see Figure 3). In the example shown in Figure 9, the current of the D/A conversion circuit 36 (i.e., a current-type D/A conversion circuit) is minimized when its control code is at its minimum. Figure 9 confirms that when the system (specifically, including SoC3) transitions from the idle state to the active state, the control code of the D/A conversion circuit 36 is already stored in memory 38, so the control code of the D/A conversion circuit 36 is immediately changed, the internal power supply voltage VDD is quickly adjusted, and IR-Drop is avoided.

Furthermore, if the environmental temperature/junction temperature measured by the temperature measurement circuit 32 fluctuates after the control reference voltage Dvdd sense has been calculated and the control code for the D/A conversion circuit 36 has been stored in memory 38, the control reference voltage Dvdd sense may be recalculated. In this case, the multiplexer 34 outputs the environmental temperature/junction temperature measured by the temperature measurement circuit 32, for example, at predetermined time intervals (in other words, periodically), based on the control signal MUXctrl output from the central processing unit 37, and the environmental temperature/junction temperature is compared with the environmental temperature/junction temperature value stored in memory 38 in the processing of step S2 described above. If the difference between the measured environmental temperature/junction temperature and the environmental temperature/junction temperature stored in memory 38 is greater than a predetermined value, steps S1 to S6 are performed again, and a new control code for the D/A conversion circuit 36 is stored in memory 38 (step S7). Furthermore, if the control reference voltage Dvdd sense is not recalculated even when the environmental temperature/junction temperature fluctuates, there is no need to measure the environmental temperature/junction temperature, so the temperature measurement circuit 32 may not be provided.

Second Embodiment
10 is a diagram showing a schematic configuration of a power supply voltage regulator circuit 1 according to a second embodiment of the present invention, and Fig. 11 is a diagram showing a schematic configuration of an SoC 3 of the power supply voltage regulator circuit 1 according to the second embodiment. The power supply voltage regulator circuit 1 according to the second embodiment differs in configuration from the first embodiment described above mainly in that it does not have a bandgap reference circuit 31 and in that it uses a measured value _VFBsense of the feedback voltage _VFB instead of the BGR voltage _VBGR. However, other configurations are similar to those of the first embodiment described above, and therefore, the same components as those of the first embodiment are denoted by the same reference numerals and description thereof will be omitted.

The power supply voltage adjustment circuit 1 according to the second embodiment includes a feedback resistor Rfb1 disposed between a resistor _R1 and a ground-side resistor _R2 that constitute a low-dropout linear regulator on the side of the external power supply circuit 2 that receives an external power supply voltage Vext from an external power supply (not shown ₎ and outputs an output voltage Vout, and a D/A conversion circuit 36 having a variable resistor disposed within the SoC3 that receives an internal power supply voltage VDD based on the output voltage Vout. The internal power supply voltage VDD is adjusted to a predetermined target voltage by changing the resistance values _RDAC and _IDAC of the variable resistor to change the output voltage Vout. In particular, the voltage _VFB between the feedback resistor _Rfb1 and the ground-side resistor _R2 is measured, and control data for changing the resistance values _RDAC and _IDAC of the variable resistor is calculated using the voltage VFB when the _SoC3 is in an idle state and the voltage _VFB when the SoC3 is in an active state.

In the second embodiment, the multiplexer 34 receives an input of the voltage at the connection terminal 12 between the feedback resistor R _fb1 and the ground-side resistor R ₂ , i.e., a measured value V _{FB sense} of the feedback voltage V _FB , instead of receiving an input of the BGR voltage V BGR generated by the bandgap reference circuit 31. Then, based on a control signal MUXctrl output from the central processing unit 37, the multiplexer 34 outputs any one of the measured value V _{FB sense} of the feedback voltage, the environmental temperature/junction temperature, the monitor signal, and the measured value VDDsense of the internal power supply voltage to the A/D conversion circuit 35.

The power supply voltage regulation circuit 1 according to the second embodiment performs the same processing as the power supply voltage regulation circuit 1 according to the first embodiment, using the measured value V _{FB sense} of the feedback voltage V _FB instead of the value of _{the BGR} voltage V BGR in the first embodiment.

Specifically, in the processing of step S1, the multiplexer 34 outputs the measured value V FB sense of the feedback voltage during idle instead of outputting the BGR voltage V _BGR during idle of the bandgap reference circuit 31 based on the control signal MUXctrl output from the central processing unit 37, and the measured value V _{FB sense} of the feedback voltage during idle is stored in the memory 38 via the A/D conversion circuit 35. Then, in the above equation 3, the measured value V _{FB sense} of the feedback voltage during idle is used instead of the BGR voltage V _BGR during idle, and the characteristic data D _BGR of the D/A conversion circuit 36 during idle is calculated according to the following equation 6.

Furthermore, in the processing of step S2, the multiplexer 34 outputs the measurement value V FB sense of the feedback voltage during active state, instead of outputting the BGR voltage V _BGR of the bandgap reference circuit 31 during active state, based on the control signal MUXctrl output from the central processing unit 37, and the measurement value V _{FB sense of} the feedback voltage during active state is stored in the memory 38 via the A/D conversion circuit 35. Then, in the above equation 4, the measurement value V _{FB sense} of the feedback voltage during active state is used instead of the BGR voltage V _BGR during active state, and characteristic data D _{BGR_IR} of the D/A conversion circuit 36 during active state is calculated according to the following equation 7. Note that in the second embodiment, the drop voltage V _IR is the difference between the measurement value V _{FB sense} of the feedback voltage during idle state and the measurement value V _{FB sense} of the feedback voltage during active state, that is, calculated as V _IR = (measurement value V _{FB sense} of the feedback voltage during idle state) - (measurement value V _{FB sense} of the feedback voltage during active state).

According to the power supply voltage adjustment circuits 1 of the first and second embodiments, a feedback resistor R _fb1 is provided between resistor R ₁ and ground-side resistor R ₂ that constitute a low dropout (LDO) linear regulator on the external power supply circuit 2 side, and a D/A conversion circuit 36 having a variable resistor is provided within the SoC 3 to adjust the internal power supply voltage VDD by changing the resistance values R _DAC and I _DAC of the variable resistor, thereby enabling accurate adjustment and control of the power supply voltage while simplifying the circuit configuration, thereby enabling a reduction in packaging area and cost. Furthermore, according to the power supply voltage adjustment circuits 1 of the first and second embodiments, by incorporating the D/A conversion circuit 36 as a voltage adjustment circuit within the SoC 3, external circuit components such as a variable resistor are not required, making it possible to realize a small-sized, low-cost system.

According to the power supply voltage adjustment circuit 1 of the first embodiment, in particular, the BGR voltage V _BGR generated by the bandgap reference circuit 31 is used to calculate the control data for the D/A conversion circuit 36. Therefore, by referring to one BGR voltage V _BGR , it is possible to perform highly accurate voltage measurement with a single power supply.

According to the power supply voltage adjustment circuit 1 of embodiment 2, in particular, the control data for the D/A conversion circuit 36 is calculated using the measured value V _{FB sense} of the feedback voltage between the feedback resistor R _fb1 and the ground side resistor R _2. Therefore, even in a system in which a highly accurate reference power supply cannot be obtained (for example, a system without a bandgap reference circuit), it is possible to perform highly accurate voltage measurements with a single power supply by referring to an external voltage (specifically, the feedback voltage V _FB in embodiment 2).

The power supply voltage adjustment circuit 1 according to the first and second embodiments also uses the control code of the D/A conversion circuit 36 stored in the memory 38 to adjust the internal power supply voltage VDD from the second time onward, enabling rapid and adaptive voltage management in accordance with the system state based on the control signal output from the central processing unit 37.

With the power supply voltage adjustment circuit 1 according to the first and second embodiments, if the internal power supply voltage VDD is adjusted for the lowest (SS: minimum speed), highest (FF: maximum speed), and representative (TT: representative value) operating speeds as process states within the SoC3, it becomes possible to perform voltage management that accurately tracks fluctuations in IR-Drop due to process variations.

In the power supply voltage adjustment circuits of embodiments 1 and 2, if the control data of the D/A conversion circuit 36 is recalculated when the environmental temperature/junction temperature measured by the temperature measurement circuit 32 fluctuates, it becomes possible to perform voltage management that accurately tracks fluctuations in IR-Drop due to temperature fluctuations.

The above describes an embodiment of the present invention, but the specific configuration is not limited to the above embodiment, and design changes that do not deviate from the gist of the present invention are also included in the present invention.

For example, while the above embodiment describes an example in which a typical low dropout (LDO) linear regulator is configured on the external power supply circuit 2 side, this invention is also applicable to switching regulators with feedback functions, and more specifically, to feedback mechanisms on the external power supply circuit side with feedback functions.

1 Power supply voltage adjustment circuit 11 Terminal 12 Connection terminal 13 Connection terminal 14 Terminal 15 Ground terminal 2 External power supply circuit 21 MOSFET
22 operational amplifiers 3 SoC
31 Bandgap reference circuit 32 Temperature measurement circuit 33 Process monitor circuit 34 Multiplexer 35 A/D conversion circuit 36 D/A conversion circuit 37 Central processing unit 38 Memory 39 User interface 40 Bus

Claims (5)

a feedback resistor disposed between a resistor constituting a feedback mechanism on the external power supply circuit side, the feedback mechanism having a feedback function of receiving an external power supply voltage from an external power supply and outputting an output voltage, and a ground-side resistor;
a D/A conversion circuit having a variable resistor disposed within the SoC and receiving an internal power supply voltage based on the output voltage;
adjusting the internal power supply voltage to a predetermined target voltage by changing the resistance value of the variable resistor to change the output voltage;
A power supply voltage adjustment circuit comprising: a bandgap reference circuit for generating a BGR voltage;
calculating control data for changing the resistance value of the variable resistor using the BGR voltage when the SoC is in an idle state and the BGR voltage when the SoC is in an active state;
2. The power supply voltage regulation circuit according to claim 1. A voltage between the feedback resistor and the ground-side resistor is measured;
calculating control data for changing the resistance value of the variable resistor using the voltage when the SoC is in an idle state and the voltage when the SoC is in an active state;
2. The power supply voltage regulation circuit according to claim 1. The target voltage is set for each state of a process within the SoC.
4. The power supply voltage adjusting circuit according to claim 1, wherein the power supply voltage adjusting circuit is a power supply voltage adjusting circuit. further comprising a temperature measurement circuit for measuring an environmental temperature or a junction temperature;
When the environmental temperature or the junction temperature fluctuates, control data for changing the resistance value of the variable resistor is calculated again.
5. The power supply voltage adjusting circuit according to claim 1, wherein the power supply voltage adjusting circuit is a power supply voltage adjusting circuit.