JP7760029B2 - Voltage Controlled Oscillator - Google Patents

Description

The present invention relates to a voltage-controlled oscillator circuit, and in particular to a voltage-controlled oscillator circuit that uses a transistor as a variable capacitor.

Voltage-controlled oscillator circuits, which can vary the frequency of a local oscillation signal using voltage, are widely used as a means of generating a local oscillation signal for wireless communication devices. These voltage-controlled oscillator circuits are required to have a wide variable range of output signals relative to the amount of control voltage variation. Patent documents 1 and 2 disclose technologies related to voltage-controlled oscillator circuits.

The voltage-controlled oscillator described in Patent Document 1 comprises a pair of variable capacitors whose capacitances are controlled by the same control voltage, a pair of inductors connected to the pair of variable capacitors, a constant current source that supplies current to the pair of inductors, and switching means that switches the length of the portions of the pair of inductors through which current flows.

Patent document 2 discloses an example of a variable capacitor used in a voltage-controlled oscillator, in which a MOS transistor is used as the variable capacitor.

Japanese Patent Application Laid-Open No. 2003-229718 Japanese Patent Application Laid-Open No. 2004-56818

However, the variable capacitors described in Patent Documents 1 and 2 have a problem in that the range of capacitance change of the MOS transistor is limited, and the variable range of the oscillation frequency of the output signal is also limited.

One aspect of the voltage-controlled oscillator circuit of the present invention comprises a first transistor having a source connected to a first power supply; a second transistor having a source supplied with the first power supply, a drain connected to the gate of the first transistor, and a gate connected to the drain of the first transistor; an inductive impedance element having one terminal connected to the drain of the first transistor, the other terminal connected to the drain of the second transistor, and a common connection terminal supplied with a second power supply; a first variable capacitive impedance element having one terminal connected to the drain of the first transistor and the other terminal to which a frequency control voltage is applied; and a second variable capacitive impedance element having one terminal connected to the drain of the first variable capacitive impedance transistor and having the other terminal supplied with a frequency control voltage. The first variable capacitive impedance element and the second variable capacitive impedance element each have a capacitance transistor having a source connected to the second power supply, one terminal connected to the gate of the capacitance transistor and the other terminal supplied with the frequency control voltage, a first capacitor having one terminal serving as the first terminal of the element and the other terminal connected to the gate of the capacitance transistor, and a second capacitor connected between the gate and drain of the capacitance transistor.

As a result, in one aspect of the voltage-controlled oscillator circuit of the present invention, the variable range of the capacitance value is determined based on the capacitance value of the second capacitor added to the parasitic capacitance of the capacitance transistor.

The voltage-controlled oscillator circuit of the present invention can expand the frequency variable range.

1 is a circuit diagram of a voltage controlled oscillator circuit according to a first embodiment; FIG. 2 is a circuit diagram of a voltage-controlled oscillator circuit illustrating a detailed circuit diagram of a variable capacitive impedance element according to the first embodiment. 1 is an equivalent circuit diagram of a variable capacitive impedance element according to a first embodiment; 4 is a graph illustrating a capacitance variable range of the variable capacitive impedance element according to the first embodiment; 4 is a graph illustrating a frequency variable range of the voltage controlled oscillator circuit according to the first embodiment; FIG. 10 is a circuit diagram of a voltage-controlled oscillator circuit illustrating a detailed circuit diagram of a variable capacitive impedance element according to a second embodiment.

First Embodiment
Hereinafter, embodiments of the present invention will be described with reference to the drawings. First, FIG. 1 shows a block diagram of a voltage-controlled oscillator circuit 1 according to a first embodiment. As shown in FIG. 1, the voltage-controlled oscillator circuit 1 according to the first embodiment includes a first transistor (e.g., transistor Tr1), a second transistor (e.g., transistor Tr2), resistors R1 and R2, a first variable capacitive impedance element (e.g., variable capacitive impedance element Cv1), a second variable capacitive impedance element (e.g., variable capacitive impedance element Cv2), and an inductive impedance element L1. The voltage-controlled oscillator circuit 1 according to the first embodiment also includes buffer circuits BUF1 and BUF2 and a load resistor RL as circuits associated with the voltage-controlled oscillator circuit 1. The voltage-controlled oscillator circuit 1 is supplied with a power supply voltage VDD as a first power supply and a ground voltage as a second power supply. A frequency control voltage VCTRL is also provided to control the frequency of the output signal Vout of the voltage-controlled oscillator circuit 1.

Transistor Tr1 has a source supplied with power supply voltage VDD, a gate connected to the drain of transistor Tr2, and a drain connected to the gate of transistor Tr2. Transistor Tr2 also has a source supplied with power supply voltage VDD, a gate connected to the drain of transistor Tr2, and a drain connected to the gate of transistor Tr2. In the example shown in FIG. 1, one terminal of resistor R1 is connected to the drain of transistor Tr1, and one terminal of resistor R2 is connected to the drain of transistor Tr2. The gate of transistor Tr1 is connected to the other terminal of resistor R2, and the gate of transistor Tr2 is connected to the other terminal of resistor R1. Resistors R1 and R2 serve as load resistors for transistors Tr1 and Tr2, and circuit configurations that do not use resistors R1 and R2 are also possible.

One terminal of the inductive impedance element L1 is connected to the drain of the transistor Tr1 via a resistor R1. Here, the node connecting one terminal of the inductive impedance element L1 and the other terminal of the resistor R1 is hereinafter referred to as the first output node N1. The other terminal of the inductive impedance element L1 is connected to the drain of the transistor Tr2 via a resistor R2. Here, the node connecting the other terminal of the inductive impedance element L1 and the other terminal of the resistor R2 is hereinafter referred to as the second output node N2.

One terminal of the variable capacitive impedance element Cv1 is connected to the drain of transistor Tr1 (e.g., the first output node N1) via resistor R1, and the other terminal is supplied with the frequency control voltage VCTRL. One terminal of the variable capacitive impedance element Cv2 is connected to the drain of transistor Tr2 (e.g., the first output node N1) via resistor R2, and the other terminal is supplied with the frequency control voltage VCTRL.

In the voltage-controlled oscillator circuit 1, an output signal Vout is output from a second output node N2 connecting the other terminal of resistor R2 and the other terminal of inductive impedance element L1 via a buffer circuit BUF2. The buffer circuit BUF2 amplifies the oscillation signal generated in the voltage-controlled oscillator circuit 1. In addition, in the voltage-controlled oscillator circuit 1, the load resistor RL is driven by a buffer circuit BUF1 connected to a first output node N1 connecting the other terminal of resistor R1 and one terminal of the inductive impedance element L1. The buffer circuit BUF1 amplifies the oscillation signal generated in the voltage-controlled oscillator circuit 1 and matches the impedance of the first output node N1 and the second output node N2.

Here, one of the features of the voltage-controlled oscillator circuit 1 according to the first embodiment is the configuration of the variable capacitive impedance elements Cv1 and Cv2. Therefore, the configuration of the variable capacitive impedance elements Cv1 and Cv2 will be described in detail. Figure 2 shows a circuit diagram of the voltage-controlled oscillator circuit 1 according to the first embodiment, illustrating the detailed circuit diagram of the variable capacitive impedance elements Cv1 and Cv2.

As shown in Figure 2, the variable capacitive impedance elements Cv1 and Cv2 have the same configuration. Specifically, the variable capacitive impedance element Cv1 has a capacitor C11, a capacitor C12, a capacitance transistor Tr11, and a resistor R11. One terminal of the capacitor C11 serves as one terminal of the variable capacitive impedance element Cv1, and the other terminal is connected to the gate of the capacitance transistor Tr11. One terminal of the resistor R11 is supplied with a frequency control voltage VCTRL, and the other terminal is connected to the gate of the capacitance transistor Tr11. The source of the capacitance transistor Tr11 is supplied with a ground voltage, and the capacitor C12 is connected between the drain and gate of the capacitance transistor Tr11.

The variable capacitive impedance element Cv2 also has a capacitor C21, a capacitor C22, a capacitance transistor Tr21, and a resistor R21. One terminal of the capacitor C21 serves as one terminal of the variable capacitive impedance element Cv2, and the other terminal is connected to the gate of the capacitance transistor Tr21. One terminal of the resistor R21 is supplied with a frequency control voltage VCTRL, and the other terminal is connected to the gate of the capacitance transistor Tr21. The source of the capacitance transistor Tr21 is supplied with ground voltage, and the capacitor C22 is connected between the drain and gate of the capacitance transistor Tr21.

Capacitors C11, C12, C21, and C22 are formed as interlayer capacitances using an interlayer insulating film formed between wiring layers and metal wiring sandwiching the interlayer insulating film.

Here, the variable capacitive impedance elements Cv1 and Cv2 have variable capacitance values determined by a capacitance transistor and a capacitor connected between the drain and gate of the capacitance transistor. Therefore, the capacitance value of the variable capacitive impedance element Cv1 will be explained using the equivalent circuit of the capacitance transistor Tr12 and capacitor C12 of the variable capacitive impedance element Cv1 as an example.

Figure 3 shows an equivalent circuit diagram of the variable capacitive impedance element Cv1 according to the first embodiment. In the equivalent circuit diagram shown in Figure 3, the gate of the capacitance transistor Tr11 is shown as terminal G, the drain of the capacitance transistor Tr11 as terminal D, and the source of the capacitance transistor Tr11 as terminal S. In the equivalent circuit diagram of the variable capacitive impedance element Cv1, a gate-source capacitance Cgs whose capacitance value varies depending on the frequency control voltage VCTRL is provided between terminals G and S, and a source-drain resistance Rds whose resistance value varies depending on the frequency control voltage VCTRL is provided between terminals S and D. In addition, a capacitor C12 is connected between terminals G and D.

3, the admittance Y of the variable capacitive impedance element Cv1 is expressed by the following equation (1): In the following equation, the capacitor C11 is considered to have a capacitance of about 500 fF.
In equation (1), when the frequency control voltage VCTRL is 0 V, the source-drain resistance Rds becomes sufficiently large, and 1<<ω ² C12 ² Rds ² holds, so the admittance Y is expressed by equation (2). In equation (2), Cgs0 is the gate-drain capacitance when the frequency control voltage VCTRL is 0 V.
Therefore, when the voltage of the frequency control voltage VCTRL is 0 V, the effect of the capacitor C12 becomes invisible, and the capacitance value becomes the same as when the capacitor C12 is not present.

On the other hand, when the frequency control voltage VCTRL is 1 V, the source-drain resistance Rds becomes zero, and 1>>ω ² C12 ² Rds ² holds, so the admittance Y can be expressed as in equation (3). In equation (3), Cgs1 is the gate-drain capacitance when the frequency control voltage VCTRL is 1 V.
Therefore, the capacitance of the variable capacitive impedance element Cv1 is increased by the amount of the capacitor C12, since the capacitor C12 is added as a parallel component to the capacitance of the variable capacitive impedance element Cv1.

In other words, the variable capacitive impedance element of embodiment 1 has a capacitance value equivalent to that of a circuit without capacitor C12 when the frequency control voltage VCTRL is 0 V, and has a capacitance value obtained by adding the capacitance of capacitor C12 to the gate-source capacitance Cgs when the frequency control voltage VCTRL is 1 V. Therefore, the variable capacitive impedance element of embodiment 1 has a wider variable range of capacitance value than a circuit without capacitor C12. Furthermore, a voltage-controlled oscillator circuit 1 having variable capacitive impedance elements Cv1 and Cv2 has a wider variable range of oscillation frequency.

The following describes the characteristics of the variable capacitive impedance elements Cv1 and Cv2 according to the first embodiment, and the characteristics of a voltage-controlled oscillator circuit 1 that includes the variable capacitive impedance elements Cv1 and Cv2. In the following description, a variable capacitive impedance element in which the capacitor provided between the gate and drain of the capacitance transistor of the variable capacitive impedance element has been removed, and a voltage-controlled oscillator circuit that includes this variable capacitive impedance element, are used as comparative examples.

Figure 4 shows a graph illustrating the variable capacitance range of the variable capacitance impedance element according to embodiment 1. In Figure 4, the upper figure shows a graph illustrating the variable capacitance range of the variable capacitance impedance element according to the comparative example, and the lower figure shows a graph illustrating the variable capacitance range of the variable capacitance impedance element according to embodiment 1. The graph shown in Figure 4 also shows the change in capacitance value when the frequency control voltage VCTRL is changed from 0V to 1V.

As shown in Figure 4, the variable capacitance impedance element of the comparative example has a variable capacitance range of approximately 50 fF to 100 fF. On the other hand, the variable capacitance impedance element of embodiment 1 can vary the capacitance from approximately 50 fF to a capacitance value of 600 fF or more. In other words, the variable capacitance impedance element of embodiment 1 has a wider variable capacitance range than the variable capacitance impedance element of the comparative example, which does not have a capacitor connected between the gate and drain of the capacitance transistor.

Figure 5 also shows a graph illustrating the frequency variable range of the voltage-controlled oscillator circuit 1 according to the first embodiment. In Figure 5, the upper figure shows a graph illustrating the frequency variable range of the voltage-controlled oscillator circuit according to the comparative example, and the lower figure shows a graph illustrating the frequency variable range of the voltage-controlled oscillator circuit according to the first embodiment. The graph shown in Figure 5 also shows the change in the oscillation frequency when the frequency control voltage VCTRL is changed from 0V to 1V.

As shown in Figure 5, the voltage-controlled oscillator circuit of the comparative example has a variable frequency range of approximately 6.5 GHz to 7.1 GHz. On the other hand, the voltage-controlled oscillator circuit 1 of embodiment 1 has a variable frequency range of approximately 4.0 GHz to 6.7 GHz. In other words, the voltage-controlled oscillator circuit 1 of embodiment 1 has a clearly wider variable frequency range than the voltage-controlled oscillator circuit of the comparative example.

As explained above, in the voltage-controlled oscillator circuit 1 according to the first embodiment, the variable range of the capacitance value of the variable capacitance impedance element can be expanded by providing a capacitor between the gate and drain of the capacitance transistor that constitutes the variable capacitance impedance element. Furthermore, the voltage-controlled oscillator circuit 1 having the variable capacitance impedance element according to the first embodiment can significantly widen the frequency variable range of the output signal compared to a voltage-controlled oscillator circuit having a variable capacitance impedance element that does not have a capacitor between the gate and drain of the capacitance transistor.

Embodiment 2
In the second embodiment, a description will be given of variable capacitive impedance elements Cv1a and Cv2a which are different from the variable capacitive impedance elements Cv1 and Cv2 according to the first embodiment. In the description of the second embodiment, the same components as those in the first embodiment will be assigned the same reference numerals as those in the first embodiment, and the description thereof will be omitted.

Figure 6 shows a circuit diagram of a voltage-controlled oscillator circuit illustrating the detailed circuit diagrams of the variable capacitive impedance elements Cv1a and Cv2a according to the second embodiment. As shown in Figure 6, the variable capacitive impedance element Cv1a is configured by adding a bias circuit composed of a first mirror transistor (e.g., mirror transistor Tr31), a second mirror transistor (e.g., mirror transistor Tr32), and a mirror resistor R31 to the variable capacitive impedance element Cv1. This bias circuit supplies a bias current to the drain of the capacitance transistor Tr11.

The source of the mirror transistor Tr31 is supplied with a bias voltage Vd, and the gate and drain are commonly connected. The source of the mirror transistor Tr32 is supplied with a bias voltage Vd, the gate is commonly connected to the gate of the mirror transistor Tr31, and the drain is connected to the drain of the capacitance transistor Tr11. The mirror resistor R31 is connected between the drain of the mirror transistor Tr31 and a ground terminal that supplies a ground voltage.

The variable capacitive impedance element Cv2a has substantially the same configuration as the variable capacitive impedance element Cv1a. In other words, the variable capacitive impedance element Cv2a is configured by adding a bias circuit consisting of a first mirror transistor (e.g., mirror transistor Tr41), a second mirror transistor (e.g., mirror transistor Tr42), and a mirror resistor R41 to the variable capacitive impedance element Cv2. This bias circuit supplies a bias current to the drain of the capacitive transistor Tr21.

The source of the mirror transistor Tr41 is supplied with a bias voltage Vd, and the gate and drain are commonly connected. The source of the mirror transistor Tr42 is supplied with a bias voltage Vd, the gate is commonly connected to the gate of the mirror transistor Tr41, and the drain is connected to the drain of the capacitance transistor Tr21. The mirror resistor R41 is connected between the drain of the mirror transistor Tr41 and a ground terminal that supplies a ground voltage.

In the variable capacitive impedance elements Cv1a and Cv2a according to the second embodiment, by appropriately setting the values of the mirror resistors R31 and R41, a circuit can be achieved in which the fluctuations in the current value flowing through the capacitance transistor are extremely small in response to fluctuations in the value of the bias voltage Vd.

The present invention is not limited to the above-described embodiment, and modifications can be made as appropriate without departing from the spirit of the invention.

1, 2 Voltage controlled oscillator circuit Tr1, Tr2 Transistor Tr11, Tr21 Capacitor transistor Tr31, Tr32, Tr41, Tr42 Mirror transistor R1, R2, R11, R21 Resistor R31, R41 Mirror resistor L1 Inductive impedance element Cv1, Cv2, Cv1a, Cv2a Variable capacitive impedance element C11, C12, C21, C22 Capacitor BUF1, BUF2 Buffer circuit RL Load resistor Vout Output signal VCTRL Frequency control voltage

Claims (5)

a first transistor having a source connected to a first power supply, a drain connected to a first node, and a gate connected to a second node;
a second transistor having a source connected to the first power supply, a drain connected to the second node, and a gate connected to the first node;
an inductive impedance element having a first terminal connected to the first node and a second terminal connected to the second node;
a first variable capacitive impedance element having a first terminal connected to the first node and a second terminal coupled to a third node;
a second variable capacitive impedance element having a first terminal coupled to the second node and a second terminal coupled to the third node;
The first variable capacitive impedance element comprises:
a third transistor; and
a third resistor connected between the gate of the third transistor and the third node;
a first capacitor connected between the gate of the third transistor and the drain of the third transistor. A voltage-controlled oscillator circuit as described in claim 1, wherein a frequency control voltage is applied to the third node. The second variable capacitive impedance element comprises:
a fourth transistor; and
a third capacitor connected between the gate of the fourth transistor and the drain of the fourth transistor;
2. The voltage controlled oscillator circuit of claim 1, comprising: The voltage-controlled oscillator circuit of claim 1, wherein the common connection terminal of the inductive impedance element is connected to a second power supply. a first resistor connected between the drain of the first transistor and the first node;
a second resistor connected between the drain of the second transistor and the second node;
2. The voltage controlled oscillator circuit of claim 1, further comprising: