JPS5746226B2 - - Google Patents
Info
- Publication number
- JPS5746226B2 JPS5746226B2 JP2140578A JP2140578A JPS5746226B2 JP S5746226 B2 JPS5746226 B2 JP S5746226B2 JP 2140578 A JP2140578 A JP 2140578A JP 2140578 A JP2140578 A JP 2140578A JP S5746226 B2 JPS5746226 B2 JP S5746226B2
- Authority
- JP
- Japan
- Prior art keywords
- groove
- type
- electrode
- laminated
- constitution
- Prior art date
- Legal status (The legal status is an assumption and is not a legal conclusion. Google has not performed a legal analysis and makes no representation as to the accuracy of the status listed.)
- Expired
Links
Classifications
-
- H—ELECTRICITY
- H10—SEMICONDUCTOR DEVICES; ELECTRIC SOLID-STATE DEVICES NOT OTHERWISE PROVIDED FOR
- H10W—GENERIC PACKAGES, INTERCONNECTIONS, CONNECTORS OR OTHER CONSTRUCTIONAL DETAILS OF DEVICES COVERED BY CLASS H10
- H10W72/00—Interconnections or connectors in packages
- H10W72/851—Dispositions of multiple connectors or interconnections
- H10W72/874—On different surfaces
- H10W72/884—Die-attach connectors and bond wires
-
- H—ELECTRICITY
- H10—SEMICONDUCTOR DEVICES; ELECTRIC SOLID-STATE DEVICES NOT OTHERWISE PROVIDED FOR
- H10W—GENERIC PACKAGES, INTERCONNECTIONS, CONNECTORS OR OTHER CONSTRUCTIONAL DETAILS OF DEVICES COVERED BY CLASS H10
- H10W90/00—Package configurations
- H10W90/701—Package configurations characterised by the relative positions of pads or connectors relative to package parts
- H10W90/721—Package configurations characterised by the relative positions of pads or connectors relative to package parts of bump connectors
- H10W90/724—Package configurations characterised by the relative positions of pads or connectors relative to package parts of bump connectors between a chip and a stacked insulating package substrate, interposer or RDL
-
- H—ELECTRICITY
- H10—SEMICONDUCTOR DEVICES; ELECTRIC SOLID-STATE DEVICES NOT OTHERWISE PROVIDED FOR
- H10W—GENERIC PACKAGES, INTERCONNECTIONS, CONNECTORS OR OTHER CONSTRUCTIONAL DETAILS OF DEVICES COVERED BY CLASS H10
- H10W90/00—Package configurations
- H10W90/701—Package configurations characterised by the relative positions of pads or connectors relative to package parts
- H10W90/721—Package configurations characterised by the relative positions of pads or connectors relative to package parts of bump connectors
- H10W90/726—Package configurations characterised by the relative positions of pads or connectors relative to package parts of bump connectors between a chip and a stacked lead frame, conducting package substrate or heat sink
-
- H—ELECTRICITY
- H10—SEMICONDUCTOR DEVICES; ELECTRIC SOLID-STATE DEVICES NOT OTHERWISE PROVIDED FOR
- H10W—GENERIC PACKAGES, INTERCONNECTIONS, CONNECTORS OR OTHER CONSTRUCTIONAL DETAILS OF DEVICES COVERED BY CLASS H10
- H10W90/00—Package configurations
- H10W90/701—Package configurations characterised by the relative positions of pads or connectors relative to package parts
- H10W90/731—Package configurations characterised by the relative positions of pads or connectors relative to package parts of die-attach connectors
- H10W90/734—Package configurations characterised by the relative positions of pads or connectors relative to package parts of die-attach connectors between a chip and a stacked insulating package substrate, interposer or RDL
-
- H—ELECTRICITY
- H10—SEMICONDUCTOR DEVICES; ELECTRIC SOLID-STATE DEVICES NOT OTHERWISE PROVIDED FOR
- H10W—GENERIC PACKAGES, INTERCONNECTIONS, CONNECTORS OR OTHER CONSTRUCTIONAL DETAILS OF DEVICES COVERED BY CLASS H10
- H10W90/00—Package configurations
- H10W90/701—Package configurations characterised by the relative positions of pads or connectors relative to package parts
- H10W90/751—Package configurations characterised by the relative positions of pads or connectors relative to package parts of bond wires
- H10W90/754—Package configurations characterised by the relative positions of pads or connectors relative to package parts of bond wires between a chip and a stacked insulating package substrate, interposer or RDL
Landscapes
- Led Device Packages (AREA)
- Led Devices (AREA)
- Die Bonding (AREA)
Abstract
PURPOSE:To ensure formation of the luminous semiconductor chip containing the electrode on the same plane with the minimum frequency of the photo etching. CONSTITUTION:The n-type GaP21 and p-type GaP22 are laminated on n-type GaP20 and ohmic electrode 23 is provided to be isolated by the groove reaching layer 21. Then Au-Si electrode 25 and copper 26 are laminated, and groove 27 which is adjacent to groove 24 and bites a little layer 21. Then grid-like notched groove 28 is formed deeply than groove 24, and formed wafer 30 is dipped into the solder to form vamp 29 and 29'. After this, groove 28 is notched more deeply to produce luminous semiconductor chip 31. In such constitution, the luminous element can be produced with the minimum frequency of the photo etching, thus obtaining a highly reliable device with reduced linear junctions.
Priority Applications (1)
| Application Number | Priority Date | Filing Date | Title |
|---|---|---|---|
| JP2140578A JPS54114094A (en) | 1978-02-24 | 1978-02-24 | Luminous semiconductor device and its manufacture |
Applications Claiming Priority (1)
| Application Number | Priority Date | Filing Date | Title |
|---|---|---|---|
| JP2140578A JPS54114094A (en) | 1978-02-24 | 1978-02-24 | Luminous semiconductor device and its manufacture |
Publications (2)
| Publication Number | Publication Date |
|---|---|
| JPS54114094A JPS54114094A (en) | 1979-09-05 |
| JPS5746226B2 true JPS5746226B2 (en) | 1982-10-01 |
Family
ID=12054127
Family Applications (1)
| Application Number | Title | Priority Date | Filing Date |
|---|---|---|---|
| JP2140578A Granted JPS54114094A (en) | 1978-02-24 | 1978-02-24 | Luminous semiconductor device and its manufacture |
Country Status (1)
| Country | Link |
|---|---|
| JP (1) | JPS54114094A (en) |
Families Citing this family (1)
| Publication number | Priority date | Publication date | Assignee | Title |
|---|---|---|---|---|
| JPS5789274A (en) * | 1980-11-25 | 1982-06-03 | Hitachi Ltd | Manufacture of light emitting element |
-
1978
- 1978-02-24 JP JP2140578A patent/JPS54114094A/en active Granted
Also Published As
| Publication number | Publication date |
|---|---|
| JPS54114094A (en) | 1979-09-05 |
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