JPS5813050B2 - analog computing device - Google Patents

Description

DETAILED DESCRIPTION OF THE INVENTION The present invention relates to an analog computing device that inputs an analog signal, performs a predetermined computation using a microprocessor, etc., and then outputs the computed result as an analog signal again.

More specifically, in the present invention, the input and output signals of the device are all analog signals, and predetermined calculations are performed digitally by a microprocessor, but when looking at the device as a whole, analog calculations are performed. It relates to analog computing devices that are considered to be

As microprocessors become available at low cost, attempts are being made to apply them to conventional analog computing devices.

In this case, since the microprocessor handles digital signals, some kind of A/D conversion function section and D/A conversion function section must be provided on the input/output side.

An object of the present invention is to provide an analog system that has a simple overall circuit configuration, including these A/D conversion parts and D/A conversion parts, and in which input and output signals are in the form of analog signals, allowing highly accurate calculations to be performed. The aim is to realize an arithmetic device.

FIG. 1 is a block diagram showing an embodiment of the present invention.

In the figure, S1 is a switch that switches between two reference voltages 1Es and -Es, S2 is a switch that switches between an input analog signal Ex and an output signal Eo of a sample-and-hold circuit SH, which will be described later, and INT is selected and taken out with switch S1. This is an integrator that adds and integrates the reference voltage and the signal selected by the switch S2, and is composed of resistors R1 and R2, a capacitor C, and an amplifier A1.

COP is a comparator that compares the output signal of the integrator INT with a zero potential, and μP is a microprocessor that receives the output signal of the comparator COP as input.

This processor has a program memory section, a data memory section, and an arithmetic control section therein, and has a time width counting function, an arithmetic function, and control functions such as switches 81, S2, and 83.

SH is a sample and hold circuit that samples and holds the output signal of the integrator INT, and includes a switch S3 and a capacitor C.
o and an amplifier A3.

The operation of the device configured in this way is controlled by input analog signal E.
The operation of converting x into a digital signal and the operation of converting an output digital signal from processor μP into an analog signal will be explained separately.

[Analog-digital conversion operation]

In this mode of operation, switch S1 is connected to select the input analog signal Ex, and switch S
3 is off.

In such a connection state, the integrator INT receives the reference voltage +E which is switched and taken out by the switch S1.
The sum of either s or -Es and the input analog signal Ex is integrated.

Therefore, the output voltage of the integrator INT is a triangular waveform, as shown in Fig. 2A, which decreases during the period t1 when the switch S1 is connected to the +Es side, and rises during the period t2 when the switch S1 is connected to the -Es side. The signal becomes e1.

The comparator COP compares the output signal el of the integrator INT with zero potential, and when e1 is larger than zero, the switch S1 is connected to the +Es side, and when e1 is smaller than zero, the switch S1 is connected to the -Es side. Connect to.

Therefore, a pulse width signal ep having a duty ratio corresponding to the input analog signal Ex as shown at the beginning of FIG. 2 can be obtained from the output terminal of the comparator COP.

Here, the time widths t1 and t2 of the pulse width signal ep can be expressed by equation (2) from the relationship shown in equation (1).

In the circuit shown in FIG. 1, a constant period T pulse is applied to the summing point of the summing integrator INT or the comparator COP through a capacitor and a resistor as shown by the broken line, and t1+t2 in equation (2) is applied. may be made equal to a constant period T.

The microprocessor μP receives the pulse width signal ep as shown in the opening of FIG. Digital signals can be obtained.

The microprocessor μP operates as an A/D converter by directly outputting the digital signal obtained in this way, and can also perform various calculations using this digital signal. be.

[Digital to analog conversion operation]

In this operating mode, the switch S2 is connected to select the output signal Eo of the sample-and-hold circuit SH, and the digital signal obtained by, for example, digital calculation by the microprocessor μP is connected to the switch S1 in the form of a pulse width signal. is output.

That is, as shown in FIG.
10.

Since the output of the sample-and-hold circuit SH is zero in the first period of the switch S1, the integrator INT integrates +Es for tlo and -Es for t20.

Therefore, the output signal e1 of the integrator INT changes as shown at the beginning of FIG. 3, and the value of the output signal e1 immediately after the elapse of time T1 is as shown in equation (3).

The switch S3 is connected to the switch S1 1 as shown in FIG.
The end point T of the drive cycle To of the switch S1 is driven by the sampling pulse SP generated in synchronization with the drive cycle.
The output voltage e1 of the integrator INT at 1 is sampled and held, and an output DC voltage E01 as shown in FIG. 32 is generated at its output terminal.

Also, this output DC voltage E.

1 is fed back to the input terminal of the integrator INT via the switch S2 and the resistor R2.

Output DC voltage E of the first period of the switch S1.

1 is shown by equation (4).

Next, in the second period of the switch S1, the integrator INT
integrates +Es and -Es applied via switch S1, and output DC voltage E as shown by equation (4).

Add and integrate 1. ] Therefore, the second
The output DC voltage EO2 of the sample-and-hold circuit SH at the end point T2 of the cycle can be expressed by equation (5).

Thereafter, in the same manner, the output DC voltage E at the end point of the third period of the switch S1 is determined.

3 is as in equation (6), and in equations (5) and (6), if we set (△《1), the output voltage Eon of the nth period is
is represented by equation (7).

E On=Eot(1+Δ10△2+△3−−−10△n−
1) Therefore, the output DC voltage Eon of the sample and hold circuit SH is as shown in equation (8).

As is clear from equation (8), Eon is the switch S1
At the nth cycle of , the analog signal becomes an analog signal corresponding to the cycle of the pulse signal from the microprocessor μP with an accuracy of n.

Note that if the relationship between the repetition period To of the switch S1 and the circuit constant is selected as To/CR2=1, an analog signal with no lip corresponding to the digital signal from the processor can be generated in just one cycle of the switch S1. can be obtained from the output end of the sample and hold circuit.

Note that in the embodiment shown in FIG. 1, the switch S1 is configured to select the reference voltage +Es or -Es;
Either one may be at zero potential.

Furthermore, the sample pulse SP that drives the switch S3 is
It is sufficient if the period is an integral multiple of the driving period To of the switch S1.

Furthermore, although the integrator INT has been shown to integrate the sum of the signals applied via the switch Sl, 82, it may be configured to integrate the difference.

As explained above, according to the present invention, an input analog signal is converted into a digital signal, calculations are performed digitally, and then converted to an analog signal and output, which not only allows highly accurate calculations but also Since a part of the circuit can be shared for A/D conversion operation and D/A conversion operation, it is possible to realize an arithmetic device with a simple overall configuration.

[Brief explanation of the drawing]

Fig. 1 is a configuration block diagram showing one embodiment of the present invention;
3 and 3 are operational waveform diagrams for explaining the operation of the device shown in FIG. 1. INT...Summing integrator, COP...Comparator, μP・
...Processor, SH...Sample and hold circuit, S
1, S2p83...Switch, 10Es, -Es...
Reference voltage.

Claims (1)

[Scope of Claims] 1. A first switch means for alternately switching and taking out two different reference values, an integrator whose input signal is the reference value taken out through the first switch means, and this a comparator inputting the output signal of the integrator; a sample hold circuit sampling and holding the output of the integrator; The switch means has a program memory section, a data memory section, and an arithmetic control section therein, and has at least a time width counting function, an arithmetic function, and a function of controlling each of the first and second switches and the sample and hold circuit. A processor receiving the pulse width signal from the comparator as an input, the processor driving and controlling the second switch so that the input analog signal is applied to the input end of the integrator, and driving the first switch. A/D conversion operation for obtaining a digital signal corresponding to the input analog signal by controlling the drive in accordance with the output signal of the comparator and counting the time width of the pulse width signal from the comparator; and this conversion. The first switch means is driven and controlled by a pulse width signal corresponding to the result of the calculation, and the second switch means is controlled to control the output signal of the sample and hold circuit. The output signal of the integrator is controlled to be applied to the input terminal of the integrator, and the sample and hold circuit is caused to sample and hold the output signal of the integrator in accordance with the drive period of the first switch means. An analog calculation device characterized by performing a D/A conversion operation to obtain an analog signal corresponding to the calculation result.