JPS581557B2 - Manufacturing method of wiring board - Google Patents

Description

DETAILED DESCRIPTION OF THE INVENTION The present invention relates to a method of manufacturing a wiring board in which electrolytic plating is applied locally to the surface of a patterned wiring layer.

Conventionally, in order to manufacture such wiring boards, holes were drilled in locations corresponding to the areas to be electrolytically plated in order to prevent expensive plating metals such as Au from adhering to unnecessary areas. A method is adopted in which a mask is placed on an insulating substrate on which a wiring layer is formed, and a plating layer is formed on the surface of the wiring layer exposed from the mask.

However, such a method requires preparing a mask with holes formed at predetermined locations, and when attaching this mask to the insulating substrate surface, the holes must be positioned in correspondence with the areas to be electrolytically plated. Especially when the part to be plated is divided into many areas, plating must be performed for each area, which is extremely complicated.

SUMMARY OF THE INVENTION Therefore, an object of the present invention is to provide a method of manufacturing a wiring board that allows easy mask formation and improves work efficiency.

Hereinafter, this invention will be explained in detail using Examples.

FIG. 1 is a front view of a printed circuit board for a crystal watch, shown for explaining an embodiment of the method for manufacturing a wiring board according to the present invention.

In the same figure, there is an insulating substrate 1a, the main surface of which has, for example, three divided areas demarcated by two virtual straight lines (indicated by dotted lines α) parallel to the width direction. One or more electrodes 2 are arranged in each region.

Each electrode 2 is composed of a contact terminal 2a divided into two parts, each of which has an Au layer 2b deposited on its surface by electrolytic plating.

Each electrode 2 constitutes a switch with a conductive material (not shown) facing the electrode 2 and movable perpendicularly to the surface of the insulating substrate 1a.

Further, in the middle divided region of the three divided regions delineated by the dotted line α, a wiring layer (omitted for convenience of explanation) connected to the contact terminal 2a of each electrode 2 and based on the circuit of a crystal clock;
A wiring layer 3 is formed which commonly connects each contact terminal 2a, and this wiring layer 3 is disconnected by a hole 8 formed in the process of manufacturing the wiring board.

Furthermore, holes 7 for mounting electronic components are provided at arbitrary locations within the segmented areas where these wiring layers are formed.

An embodiment of the method for manufacturing such a wiring board will be described below with reference to FIGS. 2 to 5.

First, as shown in FIG. 2, an insulating substrate 1 having a relatively large area is prepared.

This insulating substrate 1 is divided into a plurality of insulating substrates in a subsequent process.

Then, a copper foil is formed over the entire main surface of the insulating substrate 1,
A wiring layer is formed by appropriately etching this copper foil.

This wiring layer is formed into the same pattern on the insulating substrate 1 for each region A, B, C, etc. based on the circuit of the quartz clock so as to be divided in a later process. .

Then, as shown in the enlarged view of Fig. 3, each area A, B,
The wiring layer in C...... has a plurality of electrodes 2 in a part thereof, and each electrode 2 is connected to each of the areas A,
They are formed in each of the three divided areas on both sides of the three divided areas defined by straight lines (indicated by dotted lines α) in the column direction of B, C, . . . .

Note that the wiring layer based on the circuit of the quartz watch is formed in the middle segmented area of the three segmented areas, but this is omitted in the figure for convenience of explanation.

Each electrode 2 is divided into two contact terminals 2a.
The switch is composed of a conductive material (not shown) that faces each electrode 2 and is movable perpendicularly to the surface of the insulating substrate 10.

Further, the contact terminals 2a constituting each of the electrodes 2 are commonly connected by a wiring layer 3 formed in the middle divided area among the three divided areas demarcated by dotted lines α.

Furthermore, this wiring layer 3 is connected by a wiring layer 4 between other regions located in the column direction, and the wiring layer 4 in each region located in the row direction is connected to the = side of the insulating substrate 1. It is drawn out to a common wiring layer 5 formed nearby.

After forming the wiring layer on the main surface of the insulating substrate 1 in this way, as shown in FIG. 4, each area A, B, C...
. . . are formed by depositing a mask 6 that commonly covers the wiring layers formed in the regions arranged in the column direction.

This mask 6 is made of, for example, a band-shaped adhesive tape, and is made so that the electrodes 2 arranged in parallel in the column direction of each area A, B, C, etc. are exposed from the mask 6. ,
Deposit on one side of the insulating substrate.

Then, the positive pole of the power source is connected to the common wiring layer 5, and the negative pole of the power source is connected to, for example, an Au plate, and electrolytic plating is performed by immersing the insulating substrate 1 and the Au plate in an electrolytic solution.

After forming the Au layer on the surface of the electrode 2 in this way, the insulating substrate 1 is taken out from the electrolyte and the mask 6 is peeled off.

By cutting the insulating substrate 1, the insulating substrate 1a is divided into regions A, B, C, . . . , respectively, as shown in FIG.

Thereafter, holes 7 for mounting electronic components are formed in the insulating substrate 1a by a press or the like.

At this time, at the same time, a hole 8 penetrating the insulating substrate 1a is formed in a portion connecting any two of the plurality of contact terminals 2a whose surfaces are coated with the Au layer 2b, a portion connected to the common wiring layer 5, etc.
is formed to disconnect the wiring layer 3.

In addition, when applying the VSS voltage to each of the contact terminals 2a of each electrode 2, breakage of the wiring layer 3 connecting these should be avoided.

As a result, only the wiring layer based on the circuit of the quartz watch has that function.

In this way, on the surface of the insulating substrate 1, which has a plurality of regions arranged straight in one direction, only the wiring layer to be electrolytically plated, such as an electrode, is divided into two virtual regions parallel to the width direction. The mask 6 is formed so as to be positioned on both sides of the three divided areas demarcated by straight lines, and the mask 6 that exposes only the wiring layer to which the electrolytic plating is applied is placed so as to commonly cover only the middle divided area. By depositing the mask on the insulating substrate and plating it, there is no need to prepare a mask with a complicated shape by forming holes in specific locations, and a mask with a simple band shape can be used. There is no need to worry about positioning it when applying it on top.

In this embodiment, a wiring board used in a quartz watch is used as an example, but it goes without saying that the invention can also be applied to the manufacture of other wiring layers.

As described above, the method for manufacturing a wiring board according to the present invention has the advantage that even if the regions to be plated are separated, mask formation can be simplified and work efficiency can be improved.

[Brief explanation of the drawing]

FIG. 1 is a front view of a printed circuit board shown for explaining one embodiment of the method for manufacturing a wiring board according to the present invention, and FIGS. 2 to 5 are examples of the method for manufacturing a wiring board according to the present invention. FIG. 1, 1a... Insulating substrate, 2... Electrode,
2a...Contact terminal, 2b...Au layer,
3, 4... Wiring layer, 5... Common wiring layer, 6... Mask, 7, 8... Hole.

Claims (1)

[Claims] 1 A plurality of regions are arranged straight in one direction on an insulating substrate, and each of these regions is separated by 3 straight lines parallel to the arrangement direction.
It is divided into two divided areas, electrodes are placed in the divided areas on both sides, and a wiring layer is connected to the electrodes in the middle divided area and commonly connected for each area to a common wiring layer provided at the end of the insulating substrate. Then, the divided area in the middle of each area is commonly covered with a band-shaped mask, a power supply is connected to the common wiring layer and the electrodes are plated, and after the mask is peeled off, the unconnected parts of the wiring layer are covered. A method of manufacturing a wiring board, comprising forming a through hole and cutting the wiring board.