JPH025014B2 - - Google Patents

Description

[Detailed Description of the Invention] (Technical Field of the Invention) The present invention relates to a method for manufacturing a PGA package,
In particular, it relates to improvements in the manufacturing method of printed circuit board type PGA packages.

(Technical background) Conventional PGA packages (pin grid array packages) use ceramics, which is expensive, and reducing the price has been an issue.
Therefore, in recent years, a printed circuit board type PGA package, which is made by laminating plates made of glass fiber-containing synthetic resin, etc., has been developed, and it has become possible to simultaneously support a large number of pins and reduce costs.

First, a conventional manufacturing method of such a printed circuit board type PGA package will be explained with reference to FIGS. 2A and 2B.

FIG. 2A is an explanatory diagram showing the structure of the board 1 of the printed circuit board type PGA package.
At the bottom, there is a copper foil 3 for mounting a semiconductor element, on which a wiring pattern is formed and required plating is applied.
A plate body 2 made of an insulating material is disposed on which a wiring pattern is formed and a copper foil 4 is adhered to the lower surface thereof and which is plated in a required manner. On this plate 2, a plate 5 made of an insulating material and having an opening 6 formed therein is laminated and adhered.
A copper foil 7, on which a terminal pattern for mounting a semiconductor element is formed and a required plating is applied, is adhered to the upper surface. A plate 8 made of an insulating material is laminated and pasted on this plate 5, and has an opening 9 formed therein that matches the opening 6 of the plate 5 and is larger than the opening 6. . Further, on this plate 8, a plate 10 made of an insulating material is laminated and pasted, and the plate 10 is formed with an opening 11 that matches the opening 9 of the plate 8 and is larger than the opening 9. ing. This plate 1
A copper foil 12 on which a wiring pattern is formed and a required plating is applied is adhered to the upper surface of 0.

Each of the plates 2, 5, 8, 10 in FIG. 2A like this
In order to form the substrate 1 shown in FIG.
Adhesive sheets 13, 14, 15 between 10 and 10 respectively
The required wiring patterns are formed on the copper foils 3 and 7 through the copper foils 3 and 7, and the required plating (not shown, but generally gold plating on a nickel plating base) is applied to the plates 2 and 5 and the plate 8. , 10 are laminated and pasted. Then, a semiconductor element storage hole 16 is formed by each of the openings 6, 9, and 11. Next, as shown in FIG. 2B, through holes 17, 17, . Then, a required wiring pattern is formed on the copper foil 12 of the plate body 10, and required plating is applied. Further, lead pins (not shown) are inserted into the through holes 17 and fixed by soldering or the like, thereby forming a printed circuit board type PGA package.

(Problems with the prior art) However, in such a conventional method, when electroless copper plating or the like is applied to the through hole 17, the gold-plated copper foil 3 and the gold-plated copper foil for semiconductor element mounting are removed. The copper foil 7 on which the terminal pattern was formed was deposited, as well as the entire board 1, resulting in problems such as short-circuiting of all the terminal patterns.

For this reason, after applying electroless copper plating to the substrate 1, only the through holes 17 and the parts around the through holes that require copper plating are coated with etching resist, and the copper plating in unnecessary parts is selectively peeled off and gold plated. Either expose the plated terminal pattern and make it an independent pattern, or
Alternatively, it has been necessary to cover areas other than those requiring copper plating, such as through holes, in advance in a masked state, and selectively apply electroless copper plating only to the required areas.

Therefore, this method requires the steps of applying and peeling off the etching resist or masking material, resulting in poor workability, and the gold-plated surface of the terminal pattern is exposed to the etching resist, copper plating stripping solution, or masking material. There were problems such as deterioration of the surface condition due to contact with the stripping solution and deterioration of wire bonding characteristics. Additionally, when a masking material is used, the copper plating film deposited on the masking material becomes a foil and flakes off in the plating solution, causing it to float, significantly shortening the life of the plating solution. It was hot.

(Object of the Invention) The present invention overcomes the problems in the conventional manufacturing method described above, and provides a printed circuit board type that prevents plating from adhering when through-holes are plated on the copper foil 3 and the copper foil 7. The purpose is to provide a method for manufacturing a PGA package.

(Structure of the Invention) The present invention provides a method for manufacturing a printed circuit board type PGA package in which a semiconductor element storage hole, a through hole, and a wiring pattern are formed in a plurality of laminated plates, and the through hole is plated. In the above-mentioned plurality of laminated plates, an opening for forming a semiconductor element storage hole is not formed in both outer plates, and the wiring pattern except for the outer surface of both outer plates is as follows. The plurality of laminated plates are laminated so as to be sealed by both outer plates, and through holes are formed in the plurality of laminated plates and the through holes are plated. It is characterized in that an opening for forming a semiconductor element storage hole is formed on one side.

(Embodiments of the Invention) The present invention will be described below with reference to embodiments shown in FIGS. 1A to 1H. Note that the same components as those of the conventional device described above are denoted by the same reference numerals in the drawings, and the explanation thereof will be omitted.

In order to form the substrate 1 of the printed circuit board type PGA package shown in FIG. 1F, as shown in FIG. 1A, in addition to the three plates 2, 5, 8 used in the conventional method, the Unformed plate 1
Use 0A. Then, the copper foil 3 of the plate 2 and the copper foil 7 of the plate 5 are etched to form a wiring pattern. Thereafter, as shown in FIG. 1B, gold films 18 and 19 having a nickel plating base are deposited on these wiring patterns by plating. Then, as shown in FIG. 1C, each plate 2, 5,
8. Laminate and adhere the plates 10A. Note that the adhesive sheet 1 for bonding the plate body 8 and the plate body 10A
5 is an opening 11A that will be formed later in the plate body 10A.
A space is provided between the opening 9 of the plate 8 and the outer periphery of the plate 8 so as not to bond the portion shown in FIG. 1F.

Next, as shown in FIG. 1D, the plates 2, 5,
8. Through-holes 17, 17, . Furthermore, as shown in FIG.
1, 22 are formed, and these wiring patterns 21,
A gold film 23 with nickel plating applied to the base is applied to 22 and the through hole by plating to form a wiring pattern for fixing the lead pin. Finally, as shown in FIG. 1F, the plate body 10A
An opening 11A is formed in the plate bodies 5, 8, and the opening 6,
Together with 9, a semiconductor element storage hole 16 is formed.

At this time, it is extremely difficult to provide a wiring pattern on this surface because a slight recess is formed on the upper surface of the plate 8 in the portion that contacts the opening 11A of the plate 10A by the cutter used to form the opening 11A. . This recess serves as an adhesive inflow recess when airtightly sealing the semiconductor element with the lid after mounting the semiconductor element, and prevents the adhesive from flowing out to areas where problems occur, thereby increasing the adhesive strength of the lid.

As shown in FIG. 1G, by forming a groove 24 in advance around the entire circumference of the opening 11A of the plate 10A before lamination, the opening 11A can be formed without affecting the plate 8 in any way. Because it can be formed, the plate body 8
It is also possible to form wiring patterns on the substrate, making it possible to increase the number of pins and increase the density even further. This groove 24
This can prevent the adhesive from flowing out to the opening forming portion and adhering the opening forming portion of the substrate mold 10A to the plate body 8. Further, if it is not necessary to form a wiring pattern on the plate 8, the opening can be formed without damaging the wiring pattern even if the plate 8 is removed and the plate 5 and the plate 10A are directly laminated. Therefore, further miniaturization is possible.

Furthermore, as shown in FIG.
A is formed by plating the through hole 17 and attaching it to the plate 1.
This is done after forming the opening 11A in 0A, and finally attaching the heat dissipation plate 2A to the plate 5A to form the semiconductor element storage hole. This plating can be prevented from adhering.

Furthermore, in this case, the plate 8 can be removed by forming the groove 24 shown in FIG. , through hole 17
The heat sink plate 2A is formed after applying a coating.
You can also paste.

As described above, according to this embodiment, the opening 1 of the plate body 10A located at the end of the semiconductor element storage hole 16
1A is formed last, it is possible to reliably prevent the plating from adhering to the wiring patterns of the copper foils 3 and 7 of the plates 2 and 5 when plating the through holes 17.

Note that the copper foils 3 and 7 are laminated without applying the required plating after forming the wiring pattern, and after electroless copper plating or the like is applied to the through hole 17, the opening 11A is formed and then plated with gold or the like. Even by forming plating films 18 and 19 of gold or the like on the copper foils 3 and 7 at the same time as applying the film 23, the copper foils 3 and 7 may be coated with unnecessary electroless copper plating, etc. can be prevented.

(Effects of the Invention) As explained above, according to the present invention, when applying electroless plating or the like to the through-hole of a substrate, it is possible to completely prevent the plating from adhering to the wiring pattern in the semiconductor element housing hole. Since it can be prevented, it has effects such as excellent mass productivity.

[Brief explanation of drawings]

Figures 1A, B, C, D, E, F, G, and H are explanatory diagrams showing an embodiment of the method for manufacturing a printed circuit board type PGA package according to the present invention, and Figures 2A and B are explanatory diagrams showing a conventional method. FIG. 1... Substrate, 2, 5, 8, 10, 10A... Plate body, 6, 9, 11, 11A... Opening, 16... Semiconductor blocking storage hole, 17... Through hole, 24... Concave groove.

Claims (1)

[Claims] 1 A printed circuit board type in which semiconductor element storage holes, through holes, and wiring patterns are formed on multiple laminated plates, and the through holes are plated.
In the method for manufacturing a PGA package, the plurality of laminated plates have no opening for forming a semiconductor element storage hole in both outer plates, and the outer surfaces of both outer plates are not formed. The wiring patterns to be removed are laminated so as to be sealed by both outer plates, through-holes are formed in the plurality of laminated plates, and the through-holes are plated, and then both outer plates are sealed. A method for manufacturing a printed circuit board type PGA package, characterized in that an opening for forming a semiconductor element storage hole is formed in at least one of the plates.