JPS58188B2 - semiconductor equipment - Google Patents

Description

DETAILED DESCRIPTION OF THE INVENTION The present invention relates to a semiconductor device, and particularly to a semiconductor device having a surface inactive layer indispensable for the construction of diodes, transistors, etc. that require high breakdown voltage.

Conventionally, the most commonly used material for the surface inactive layer is SiO2, which is deposited on the surface of a silicon semiconductor substrate including a PN junction exposed on the surface of the silicon semiconductor substrate.

The method of depositing this SiO2 layer is thermal oxidation in a high temperature oxygen atmosphere and water vapor atmosphere.

Alternatively, there are various methods such as CVD method using chemical reaction or sputtering method which physically deposits the material, but in either case, undesirable phenomena occur because this SiO2 layer is a dielectric (insulator). .

In other words, the higher the breakdown voltage of the PN junction of the element, the more difficult it is to obtain a high breakdown voltage element due to moisture, contamination of the package seal, or polarization of ions in the molding resin.

This deterioration in characteristics is thought to be due to the accumulation of charges on the SiO2 layer, forming a kind of capacitor with the surface of the silicon semiconductor substrate, and inducing charges of opposite polarity on the surface of the silicon semiconductor substrate.

For example, some cause (moisture, etc.) on the SiO2 layer
When negative charges are accumulated in the N-type silicon semiconductor substrate, a channel is formed on the surface of the substrate due to the positive charges induced by the negative charges.

As a result, in the case of a lateral PNP transistor, the breakdown voltage deteriorates due to punch-through, and in the case of a P+N junction diode, a channel is formed on the surface of the N-type silicon semiconductor substrate up to the fracture surface due to scribing.

An increase in reverse leakage current or deterioration of withstand voltage is observed.

As described above, the SiO2 layer is not very desirable because the higher the withstand voltage of the device, the more this kind of deterioration phenomenon is observed, and the reliability is lowered by the influence of an external electric field.

To solve this problem, instead of SiO2 layer.

It has been considered to deposit a semi-insulating layer in which impurities are doped into polycrystalline silicon, and further form a layer of SiO2 thereon to form a layered structure.

This semi-insulating silicon polycrystalline layer containing impurities is S
Since the specific resistance is lower than that of iO2, the capacitor effect observed in the SiO2 layer, that is, the phenomenon of induction of charge on the surface of the silicon semiconductor substrate, is not observed.

It is possible to achieve high breakdown voltage and high reliability of the device, and it is possible to eliminate the effects of external electric fields (moisture, contamination during sealing, electrode wiring) on the surface of the silicon semiconductor substrate.

However, this semi-insulating polycrystalline silicon layer containing impurities has a high breakdown voltage structure with a field plate structure, which allows the influence of an external electric field to be exerted on the surface of the silicon semiconductor substrate, making it possible to increase the breakdown voltage even with relatively shallow junctions. The device has the disadvantage that it cannot be used as a surface inactive layer, and can only be applied by increasing the depth of diffusion or in the case of a guard link structure surrounding the main junction.

Furthermore, the guard link structure is as follows. A high breakdown voltage cannot be achieved unless the number of rings is increased, and the element size cannot be reduced compared to the field plate structure.

This invention was made in view of the above points, and uses a field plate structure to achieve high voltage resistance.

It is an object of the present invention to provide a semiconductor device having a surface inactive layer that can achieve high reliability.

Embodiments of the present invention will be described below with reference to the drawings. First, FIG. 1 shows a diode having a field plate structure with a conventional SiO2 layer as a surface active layer.

In this figure, 1 is an N-type silicon semiconductor substrate, 2 is a diffusion region, 3 is a silicon semiconductor interface, 4 is a SiO2 layer, and 5 is a silicon semiconductor substrate.
is the space charge layer.

6 is a field plate electrode.

Namely. In the field plate structure, when the PN junction is reverse biased, the silicon semiconductor interface 3 under the field plate electrode 6 region is also in a depleted state, so the shape of the space charge layer 5 of the reverse biased PN junction is similar to that of the field. Compared to a normal diode without a plate electrode 6, electric field concentration at the silicon-semiconductor interface 3 is relaxed so that a high withstand voltage can be achieved.

However, if negative charges are accumulated due to the temperature increase in the upper layer of the SiO2 layer 4, charges of opposite polarity, that is, positive charges, are induced at the silicon semiconductor interface 3 of the N-type silicon semiconductor substrate 1, causing the scribe line to break. This positive charge is induced all the way to the cross section, resulting in an increase in leakage current in the reverse direction of the PN junction or a deterioration in breakdown voltage.

Namely. Although the conventional S 1 O 2 O 2 layer has a field plate structure and can achieve high breakdown voltage even with a relatively shallow diffusion depth, it lacks reliability.

A semi-insulating polycrystalline silicon layer containing impurities is then deposited directly onto the silicon semiconductor substrate.

FIG. 2 shows a field plate diode with a structure in which a SiO2 layer is further deposited thereon.

In the figure, 1 to 6 are the same as those in FIG. 1, and 7 is a semi-insulating polycrystalline silicon layer containing impurities.

In this case, when the PN junction is reverse biased, the silicon semiconductor interface 3 under the field plate electrode 6 region
is not affected by external electric fields and does not become depleted.

Therefore, the space charge layer 5 of the reverse biased PN junction
The shape is the same as that of a normal diode without the field plate electrode 6, and high breakdown voltage cannot be achieved.

The breakdown voltage of the resulting PN junction is determined by the resistivity of the silicon semiconductor substrate 1 and the depth of diffusion of the diffusion region 2.

On the other hand, even if the temperature of the upper layer of the SiO2 layer 4 is increased, no reverse charge is induced at the silicon semiconductor interface 3, so that there is no decrease in reliability due to causes such as moisture, contamination, and polarization of the resin.

The semiconductor device of the present invention eliminates the drawbacks of FIG. 1 and FIG.
A plate structure diode is shown in FIG.

For convenience, each part of the diode in this figure will be explained by assigning the same numbers to the same parts as in FIGS. 1 and 2. 1 is the N-type silicon semiconductor substrate, 2 is the diffusion region, 3 is the silicon semiconductor interface, and 4 is the 5 is a space charge layer, 6 is a field plate electrode, and 7 is a semi-insulating polycrystalline silicon layer containing impurities.

That is, in the diode with this field plate structure, the conventional SiO2 layer 4 is deposited as a surface inactive layer under the field plate electrode 6 region, and the conventional SiO2 layer 4 is deposited as a surface inactive layer in areas other than the field plate electrode 6 region. , a semi-insulating silicon polycrystalline layer 7 containing impurities is deposited directly on the silicon semiconductor substrate 1, and a SiO2 layer 4 is further deposited on top of the semi-insulating silicon polycrystalline layer 7 containing impurities. While allowing the influence of an electric field to reach the semiconductor interface 3 from outside the silicon semiconductor substrate 1,
The silicon semiconductor interface 3 below the field plate electrode 6 region is prevented from being influenced by an electric field from outside the silicon semiconductor substrate 1.

Therefore, with this diode, it is possible to achieve high breakdown voltage using the field plate structure, and it is also resistant to moisture and pollution.
Deterioration in reliability due to resin polarization can be prevented.

Note that the specific resistance of the semi-insulating silicon polycrystalline layer 7 containing impurities is the specific resistance of polycrystalline silicon not containing impurities (
≒106 Ωcm), and impurities often used in the semiconductor industry include oxygen, nitrogen, and carbon.

Furthermore, examples of the deposition method include a polycrystalline silicon CVD method performed while doping impurities, and a method of physically implanting the above-mentioned impurity atoms into polycrystalline silicon.

In addition, in the above embodiment, the surface inactive layer under the field plate electrode 6 region was made of S1O2O2O3, but it was made of 5iO2-8i3N, which is conventionally used in the semiconductor industry.
4 structure may be sufficient.

Furthermore, the SiO2 layer 4 on the semi-insulating polycrystalline silicon layer 7 containing impurities serves as a surface inactive layer except under the field plate electrode 6 region. Since the purpose is to improve the dielectric strength between the two, other insulating materials may be used.

As described in detail above, the semiconductor device according to the present invention uses a field plate structure to achieve high breakdown voltage and is highly reliable. Therefore, the junction depth can be made shallow, so the device size can be reduced. Also, it is possible to shorten the diffusion time of the semiconductor substrate.

Furthermore, since the element size can be reduced, high-density integration is also possible.

In addition, since the highly reliable surface inactive layer is used, there is no need for conventional hermetic seals designed to prevent moisture from entering, and an inexpensive mold-type resin seal can be used.

[Brief explanation of drawings]

Figure 1 is a cross-sectional view showing a conventional diode with a field plate structure using a SiO2 layer as a surface inactive layer, and Figure 2 is a cross-sectional view showing a diode with a semi-insulating silicon polycrystalline layer containing impurities and S
FIG. 3 is a cross-sectional view showing a diode with a field plate structure in which an iO2 layer has a laminated structure and a surface inactive layer. FIG. 3 is a cross-sectional view showing an embodiment of a semiconductor device according to the present invention. 1... N-type silicon semiconductor substrate, 3...
・Silicon semiconductor interface, 4...SiO2 layer,
6...Field plate electrode, 7...
...Semi-insulating polycrystalline silicon layer containing impurities.

Claims (1)

[Claims] 1 Field plate structure, with field plate structure
On the semiconductor substrate under the plate electrode region, there is a SiO2 layer substantially in contact with the semiconductor substrate, while on the semiconductor substrate other than under the field plate electrode region, there is a SiO2 layer substantially in contact with the semiconductor substrate. It has a semi-insulating silicon polycrystalline layer containing impurities, and while the electric field is applied from outside the semiconductor substrate to the semiconductor substrate interface under the field plate electrode region, A semiconductor device characterized in that an electric field from outside the semiconductor substrate does not affect the semiconductor substrate interface.