JPS5819156B2 - Method for manufacturing hybrid integrated circuit board - Google Patents
Method for manufacturing hybrid integrated circuit boardInfo
- Publication number
- JPS5819156B2 JPS5819156B2 JP52079746A JP7974677A JPS5819156B2 JP S5819156 B2 JPS5819156 B2 JP S5819156B2 JP 52079746 A JP52079746 A JP 52079746A JP 7974677 A JP7974677 A JP 7974677A JP S5819156 B2 JPS5819156 B2 JP S5819156B2
- Authority
- JP
- Japan
- Prior art keywords
- integrated circuit
- circuit board
- hybrid integrated
- minutes
- manufacturing
- Prior art date
- Legal status (The legal status is an assumption and is not a legal conclusion. Google has not performed a legal analysis and makes no representation as to the accuracy of the status listed.)
- Expired
Links
Landscapes
- Insulated Metal Substrates For Printed Circuits (AREA)
Description
【発明の詳細な説明】
本発明は混成集積回路基板、特にアルミニウムを用いた
混成集積回路基板の製造方法に関する。DETAILED DESCRIPTION OF THE INVENTION The present invention relates to a method of manufacturing a hybrid integrated circuit board, particularly a hybrid integrated circuit board using aluminum.
既に特公昭４６−１３２３４号公報でアルミニウムの表
面を陽極酸化した混成集積回路基板を提案した。We have already proposed a hybrid integrated circuit board in which the surface of aluminum is anodized in Japanese Patent Publication No. 46-13234.
斯様の混成集積回路基板では陽極酸化により本願図面の
第１図に示す如く６角形の蜂の巣状に酸化アルミニウム
（Ａ ＩＱ ｏｓ ）が形成され、各々の６角形の酸化
アルミニウムの中央には電流が流れるために元型の孔１
が残されている。In such a hybrid integrated circuit board, aluminum oxide (A IQ os ) is formed in a hexagonal honeycomb shape by anodic oxidation, as shown in FIG. Archetype hole 1 to flow
is left behind.
従ってこの孔１にはアルミニウムが露出されるため封孔
処理が必要となる。Therefore, since aluminum is exposed in this hole 1, sealing treatment is required.
従来では封孔処理は９８℃程度の熱湯あるいはスチーム
で電流密度１〜２Ａ／ｄｉ”で長時間例えば３０分以上
行ない、完全封孔していた。Conventionally, the pore sealing treatment was carried out using hot water or steam at about 98 DEG C. at a current density of 1 to 2 A/di" for a long time, for example, 30 minutes or more, to completely seal the pores.
；□しかしながら、完全封孔した混成集積回路基板では
上述した孔１は水酸化アルミニウム（Ａｌ（ｏｈ）ｓ）
ア密に：充填されるので、アルミニウムと酸化アルミニ
ウムの熱膨張係数の差により２００℃くらいに加熱する
と多数のクラックが発生する欠点があった。;□However, in a completely sealed hybrid integrated circuit board, the above-mentioned hole 1 is made of aluminum hydroxide (Al(oh)s).
Since it is tightly packed, it has the disadvantage that many cracks occur when heated to about 200° C. due to the difference in thermal expansion coefficient between aluminum and aluminum oxide.
このクラックは混成集積回路基板の絶縁不良を招く危惧
を有している。This crack has the risk of causing insulation failure in the hybrid integrated circuit board.
本発明は斯る欠点に鑑みてなされ、従来の欠点を完全に
除去した混成集積回路基板の製造方法を提供するもので
あり第２−を参照して本発明の一実施例を詳述する。The present invention has been made in view of these drawbacks, and provides a method for manufacturing a hybrid integrated circuit board that completely eliminates the conventional drawbacks.One embodiment of the present invention will be described in detail with reference to Section 2.
”本発明の特徴は封孔処理条件にあり、特に封孔
時間にある。``The feature of the present invention lies in the sealing treatment conditions, especially the sealing time.
第２図に於いて実線は封孔時間とクラック数の関係を示
す曲線であり、封孔条件としては前述と同様に９８℃程
度の熱湯で電流密度２Ａ／ｄｍ”を用い、またクラック
数は１０ｍｍの十字に交叉したクラックの本数を計数し
たものである。In Figure 2, the solid line is a curve showing the relationship between the sealing time and the number of cracks.As for the sealing conditions, hot water at about 98°C and a current density of 2A/dm'' were used as described above, and the number of cracks was The number of cracks intersecting in a 10 mm cross was counted.
この曲線から明白な様に封孔時間が長くなればクラック
数が増加し、この傾向は封孔時間１０分を越えると顕著
となる。As is clear from this curve, as the sealing time increases, the number of cracks increases, and this tendency becomes remarkable when the sealing time exceeds 10 minutes.
′これからクランクを防止するためには封孔時間は１０
分以下であることが望ましい。'In order to prevent cranking from now on, the sealing time should be 10
It is desirable that it be less than 1 minute.
この理由は孔１が封孔時間が短いために完全に水酸化ア
ルミニウムど充填されず、酸化アルミニウムとアルミニ
ウムとて発生するストレスをすべてこの孔１の半封孔状
態の水酸化アルミニウムで吸収するからであ゛る。The reason for this is that hole 1 is not completely filled with aluminum hydroxide due to the short sealing time, and all the stress generated by aluminum oxide and aluminum is absorbed by the semi-sealed aluminum hydroxide in hole 1. That's it.
次に第２図で点線で示駿た明線は混成集積回路基板の耐
アルカリ性を示筆特性であり、混成集積回路基板を力性
ソーダ等のアルカリ溶液に沈漬した後酸化アルミニウム
の腐蝕を測定したものである。Next, the bright dotted line in Figure 2 indicates the alkali resistance of the hybrid integrated circuit board, and the corrosion of aluminum oxide is prevented after the hybrid integrated circuit board is immersed in an alkaline solution such as sodium hydroxide. This is what was measured.
酸化アルミニウムの耐薬品性については、酸性溶液（こ
は強く、アルカリ溶液には弱Ｇ、）と０５）う性質を持
っており、そこでアルカリ溶液によらて白、粉状に腐蝕
されたアルマイト層をブラシロン研摩しに後１．テプ等
でマスクした。Regarding the chemical resistance of aluminum oxide, it has the property of being resistant to acidic solutions (strongly strong, weakly strong against alkaline solutions), and the alumite layer corroded to a white, powdery state by alkaline solutions. After polishing the brushlon 1. I masked it with tape, etc.
腐蝕さ、、れない部分と９段差を測定した。The corrosion resistance was measured at 9 steps from the non-eroded area.
斯る方法に依れば孔１が封孔′されてＧζないものが当
然もつとも腐蝕され易く、４分間以上封孔処理１を回な
、＆ば、耐アルカリ性は。According to such a method, even if the hole 1 is sealed and there is no Gζ, it is naturally susceptible to corrosion, and the sealing treatment 1 must be repeated for more than 4 minutes, otherwise the alkali resistance will be reduced.
あまり変化しないことが明白となった。It became clear that not much had changed.
：′”従らて、第：２図か”・ら封孔時間を４分から１
０分までとすればクラックの発生を防止でき且つ耐薬品
性も十分に確保される。:'"Therefore, from Figure 2," the sealing time was reduced from 4 minutes to 1 minute.
If the heating time is up to 0 minutes, the occurrence of cracks can be prevented and chemical resistance can be sufficiently ensured.
以上に詳述した如く、本発明によれば封孔時間を従来よ
り大沖に短縮するこ−とによりクラックの発生を防止で
きるのである。As detailed above, according to the present invention, the occurrence of cracks can be prevented by significantly shortening the sealing time compared to the conventional method.
従って時間短縮により混成集積回路基板の生産性、舛向
上１．シ且つ勢縁低下の防止による信頼性の向上も計れ
る。Therefore, by shortening the time, productivity and production of hybrid integrated circuit boards are improved.1. Reliability can also be improved by preventing loss of strength and popularity.
図面の簡単な説明 １．６ 、
、第１図はアル２ミニツムの界面を陽極酸化した混成集
積回路基板の上ｉｐ１．第１．は本発明を説明するため
の曲線図である。Brief description of drawings 1.6,
, FIG. 1 shows a hybrid integrated circuit board with anodized aluminum interface. 1st. is a curve diagram for explaining the present invention.
１・・・・・・元型の孔である。1... It is a hole in the archetype.
Claims (1)
形成した混成集積回路基板に於いて、前記酸化膜にでき
た孔に水酸化アルミニウムを完全番と充填しない半封孔
処理状！とすることを特徴とした混成集積回路基板め製
造方法。 ２、特許請求の範囲第１項に於いて、熱温又はスチーム
で電流密度１〜２Ａ／ｄｔ／で封孔時間を４分から１０
分までとしたことを特徴とした混成集積回路基板の製造
方法。[Claims] 1. In a hybrid integrated circuit board in which an oxide film is formed on the surface of an aluminum substrate by anodization, a semi-sealing process in which the pores formed in the oxide film are not completely filled with aluminum hydroxide. Status! A method for manufacturing a hybrid integrated circuit board, characterized by: 2. In claim 1, the sealing time is 4 minutes to 10 minutes using hot temperature or steam at a current density of 1 to 2 A/dt/.
A method for manufacturing a hybrid integrated circuit board, characterized in that the manufacturing time is up to 10 minutes.
Priority Applications (1)
| Application Number | Priority Date | Filing Date | Title |
|---|---|---|---|
| JP52079746A JPS5819156B2 (en) | 1977-06-30 | 1977-06-30 | Method for manufacturing hybrid integrated circuit board |
Applications Claiming Priority (1)
| Application Number | Priority Date | Filing Date | Title |
|---|---|---|---|
| JP52079746A JPS5819156B2 (en) | 1977-06-30 | 1977-06-30 | Method for manufacturing hybrid integrated circuit board |
Publications (2)
| Publication Number | Publication Date |
|---|---|
| JPS5413967A JPS5413967A (en) | 1979-02-01 |
| JPS5819156B2 true JPS5819156B2 (en) | 1983-04-16 |
Family
ID=13698781
Family Applications (1)
| Application Number | Title | Priority Date | Filing Date |
|---|---|---|---|
| JP52079746A Expired JPS5819156B2 (en) | 1977-06-30 | 1977-06-30 | Method for manufacturing hybrid integrated circuit board |
Country Status (1)
| Country | Link |
|---|---|
| JP (1) | JPS5819156B2 (en) |
Families Citing this family (1)
| Publication number | Priority date | Publication date | Assignee | Title |
|---|---|---|---|---|
| JP4895275B2 (en) | 2006-09-28 | 2012-03-14 | 東京エレクトロン株式会社 | Parts for substrate processing apparatus and film forming method |
-
1977
- 1977-06-30 JP JP52079746A patent/JPS5819156B2/en not_active Expired
Also Published As
| Publication number | Publication date |
|---|---|
| JPS5413967A (en) | 1979-02-01 |
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