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JPS5819157B2 - Method for manufacturing hybrid integrated circuit board - Google Patents
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JPS5819157B2 - Method for manufacturing hybrid integrated circuit board - Google Patents

Method for manufacturing hybrid integrated circuit board

Info

Publication number
JPS5819157B2
JPS5819157B2 JP52133331A JP13333177A JPS5819157B2 JP S5819157 B2 JPS5819157 B2 JP S5819157B2 JP 52133331 A JP52133331 A JP 52133331A JP 13333177 A JP13333177 A JP 13333177A JP S5819157 B2 JPS5819157 B2 JP S5819157B2
Authority
JP
Japan
Prior art keywords
integrated circuit
circuit board
hybrid integrated
cracks
oxide film
Prior art date
Legal status (The legal status is an assumption and is not a legal conclusion. Google has not performed a legal analysis and makes no representation as to the accuracy of the status listed.)
Expired
Application number
JP52133331A
Other languages
Japanese (ja)
Other versions
JPS5466463A (en
Inventor
風見明
Current Assignee (The listed assignees may be inaccurate. Google has not performed a legal analysis and makes no representation or warranty as to the accuracy of the list.)
Tokyo Sanyo Electric Co Ltd
Sanyo Denki Co Ltd
Original Assignee
Tokyo Sanyo Electric Co Ltd
Sanyo Denki Co Ltd
Priority date (The priority date is an assumption and is not a legal conclusion. Google has not performed a legal analysis and makes no representation as to the accuracy of the date listed.)
Filing date
Publication date
Application filed by Tokyo Sanyo Electric Co Ltd, Sanyo Denki Co Ltd filed Critical Tokyo Sanyo Electric Co Ltd
Priority to JP52133331A priority Critical patent/JPS5819157B2/en
Publication of JPS5466463A publication Critical patent/JPS5466463A/en
Publication of JPS5819157B2 publication Critical patent/JPS5819157B2/en
Expired legal-status Critical Current

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  • Electrochemical Coating By Surface Reaction (AREA)
  • Insulated Metal Substrates For Printed Circuits (AREA)

Description

【発明の詳細な説明】 本発明は混成集積回路基板、特にアルミニウムを用いた
混成集積回路基板の製造方法に関する。
DETAILED DESCRIPTION OF THE INVENTION The present invention relates to a method of manufacturing a hybrid integrated circuit board, particularly a hybrid integrated circuit board using aluminum.

。既に特公昭46−13234号公報でアルミニウムの
表面を陽極酸化した混成集積回路基板を提案した。
. We have already proposed a hybrid integrated circuit board in which the surface of aluminum is anodized in Japanese Patent Publication No. 46-13234.

斯上した混成集積回路基板では第1図に示す如く6角形
の蜂の巣状に酸化アルミニウム(A1203)が形成さ
れ、各々の6角形の中央には陽極酸化の電流が流れるた
め元型の孔1が残される。
In the above-mentioned hybrid integrated circuit board, aluminum oxide (A1203) is formed in a hexagonal honeycomb shape as shown in Fig. 1, and the hole 1 of the original mold is formed in the center of each hexagon because the anodic oxidation current flows. left behind.

従ってこの孔1にはアルミニウムが露出されるため封孔
処理が必要となる。
Therefore, since aluminum is exposed in this hole 1, sealing treatment is required.

封孔処理は9′8゛℃程度の熱湯あるいはスチームで電
流密度1〜2A/d77’で長時間たとえば30分行な
われて完全封孔していない。
The pore sealing treatment was carried out using hot water or steam at about 9'8 DEG C. at a current density of 1 to 2 A/d77' for a long time, for example, 30 minutes, and the pores were not completely sealed.

□ ゛ ・しかしながらミ
完全封孔した混成集積回路基板では上述した孔1は水酸
化アルミニウム(′M(αツ、)で密に充填されている
ので、アルミニウム・と酸化アルミニウムの熱膨張係数
の差により260℃くらい“に加熱するき多数の割れ(
クラック゛)が発生する欠点があり、このクラックは混
成集積回路基板の絶縁不良を招く危惧を有しているざ 本発明は斯る欠点に鑑みてなされ、゛・従来の欠点を完
全に除去した混成集積回路基板の製造方法を提供するも
のであり第2図堰よび第3図を参照して本発明の一実施
例を詳述する。
□ ゛ ・However, in a fully sealed hybrid integrated circuit board, the holes 1 mentioned above are densely filled with aluminum hydroxide ('M(αtsu,), so the difference in thermal expansion coefficient between aluminum and aluminum oxide When heated to about 260℃, many cracks (
The present invention has been made in view of these drawbacks, and has the disadvantage of generating cracks, which may lead to poor insulation of hybrid integrated circuit boards. A method of manufacturing an integrated circuit board is provided, and one embodiment of the present invention will be described in detail with reference to FIG. 2 and FIG.

本発明方法はアルミニウム基板表面に陽極酸化により酸
化膜(A1203)を形成し、酸化膜の前述した孔1を
封孔処理した後、混成集積回路基板2を約200℃くら
いに加熱して第3図に示すように意図的に割れ(クラッ
ク)3を発生させて再び一陽極竺、化を行って割れによ
り露出したアルミニウム基板4都亦のみに酸化膜(A1
203)を形成して構成されするみ 采i萌・′Qiの特徴は封孔処理条件にあり、特!こ封
延時間番、件やる。
The method of the present invention involves forming an oxide film (A1203) on the surface of an aluminum substrate by anodic oxidation, sealing the holes 1 in the oxide film, and then heating the hybrid integrated circuit board 2 to about 200°C. As shown in the figure, cracks 3 are intentionally generated and the anode coating is performed again to form an oxide film (A1) on only the four aluminum substrates exposed by the cracks.
203), the feature of ``Qi'' is its sealing treatment conditions, which make it special! I'll take care of the extension time.

第2図に於いて実線は封孔時間とクラック数の関係を示
す曲線であり、封孔条件としては前述と同様に98℃程
度の熱湯で電流密度2 A / d mを用い、またク
ラッチ数は10mmの十字に交叉したクラックの本数を
計数したものである。
In Fig. 2, the solid line is a curve showing the relationship between the sealing time and the number of cracks.As for the sealing conditions, hot water at about 98°C and a current density of 2 A/dm were used as described above, and the number of clutches was is the number of cracks that intersect in a 10 mm cross.

この曲線から明白な様に封孔時間が長くなればクラック
数が増加し、この傾向は封孔時間が10分を越えると顕
著となる。
As is clear from this curve, the number of cracks increases as the sealing time increases, and this tendency becomes remarkable when the sealing time exceeds 10 minutes.

これからクラックの発生を防止するためには封孔時間を
10分以下に設定することが望ましい。
In order to prevent cracks from occurring in the future, it is desirable to set the sealing time to 10 minutes or less.

この理由は孔1が封孔時間が短いために完全に水酸化ア
ルミニウムで充填されず、酸化アルミニウムと水酸化ア
ルミニウムとで発生するストレスをすべてこの孔1の半
封孔状態の水酸化アルミニウムで吸収するからである。
The reason for this is that hole 1 is not completely filled with aluminum hydroxide due to the short sealing time, and all the stress generated by aluminum oxide and aluminum hydroxide is absorbed by the semi-sealed aluminum hydroxide in hole 1. Because it does.

次に第2図で点線で示した曲線は混成集積回路基板の耐
アルカリ性を示す特性であり、混成集積回路基板を力性
ソーダ等のアルカリ溶液に沈漬した後、酸化アルミニウ
ムの腐蝕を測定したものである。
Next, the curve shown by the dotted line in Figure 2 is a characteristic indicating the alkali resistance of the hybrid integrated circuit board, and the corrosion of aluminum oxide was measured after the hybrid integrated circuit board was immersed in an alkaline solution such as sodium hydroxide. It is something.

酸化アルミニウムの耐薬品性については酸性溶液には強
く、アルカリ溶液には弱いという性質を持っており、そ
こでアルカリ溶液によって白粉状に腐蝕されたアルマイ
ト層をブラシロン研摩した後、テープ等でマスクした腐
蝕されない部分との段差を測定した。
Regarding the chemical resistance of aluminum oxide, it is strong against acidic solutions but weak against alkaline solutions.Therefore, the alumite layer, which had been corroded to a white powder form by alkaline solutions, was brushlon-polished and then masked with tape, etc. The level difference between the part and the part that was not corroded was measured.

斯る方法に依れば孔1が封孔されていないものが当然も
つとも腐蝕され易く、4分間以上封孔処理を行なえば、
耐アルカリ性はあまり変化しないことが明白となった。
According to this method, if the hole 1 is not sealed, it will naturally be easily corroded, and if the hole is sealed for more than 4 minutes,
It became clear that the alkali resistance did not change much.

従って第2図から封孔時間を4分から10分までとすれ
ばクラックの発生を未然に防止でき且つ耐薬品性も十分
に確保される。
Therefore, as shown in FIG. 2, if the sealing time is set to 4 to 10 minutes, cracks can be prevented from occurring and chemical resistance can be sufficiently ensured.

本発明の第?の特徴は再陽極酸化である。No. of the present invention? The feature is re-anodizing.

斯上した封孔時間の制御によりクラックの発生し難い製
造方法でも混成集積回路基板2を約200℃くらいに加
熱すると第3図の如く若干のクラックが発生する。
Even in a manufacturing method in which cracks are less likely to occur by controlling the sealing time as described above, when the hybrid integrated circuit board 2 is heated to about 200° C., some cracks occur as shown in FIG. 3.

しかしクラック数が極めて少0ために再陽極酸化を行う
とクラック部分のみに電流が集中してほぼクラック部分
にのみ酸化膜5が形成されてクラックを埋める。
However, since the number of cracks is extremely small, when re-anodizing is performed, the current concentrates only on the cracked portions, and the oxide film 5 is formed almost only on the cracked portions, filling the cracks.

また再陽極酸化後の封孔処理はり゛ラックが微小であ名
ので不要である。
In addition, sealing treatment after re-anodizing is unnecessary because the adhesive rack is minute and difficult to perform.

以上に詳述した如く、本発明に依れば封孔時間の設定お
よび加熱後の再陽極酸化によりクラックを完全に除去で
きる。
As detailed above, according to the present invention, cracks can be completely removed by setting the sealing time and re-anodizing after heating.

また封孔時間を従来より大巾に短縮されるので混成集積
回路基板の生産性は向上し且つ絶縁不良は防止され信、
頼性の向上も計れる。
In addition, since the sealing time is greatly shortened compared to the conventional method, the productivity of hybrid integrated circuit boards is improved, insulation defects are prevented, and reliability is improved.
Improved reliability can also be measured.

【図面の簡単な説明】[Brief explanation of drawings]

第1図はアルミニウムの表面を陽極酸化した混成集積回
路基板の上面図、第2図は本発明を説明するための曲線
図、第3図は本発明を説明するための断面図である。 1は元型の孔、2は混成集積回路基板、3はクラック、
4はアルミニウム基板、5は酸化膜である。
FIG. 1 is a top view of a hybrid integrated circuit board in which the surface of aluminum is anodized, FIG. 2 is a curve diagram for explaining the present invention, and FIG. 3 is a cross-sectional view for explaining the present invention. 1 is a hole in the original mold, 2 is a hybrid integrated circuit board, 3 is a crack,
4 is an aluminum substrate, and 5 is an oxide film.

Claims (1)

【特許請求の範囲】 1 アルミニウム基板の表面に陽極酸化により酸化膜を
形成した混成集積回路基板に坤いて、前記酸化膜にでき
た孔を封孔処理した後1.力嗟して前記酸化膜に割れを
発生させ再び陽極酢化を行うくとを特徴とした混成集積
回路基板ρmq方麺”。 2、特許請求の範囲第1項に於いて2、−前躬薊札処。 理の封孔時間を4分から10分まで吟設定゛シて剪記孔
を半封孔状態とすることを特徴とした混成集積回路基板
の製造方法。
[Scope of Claims] 1. After applying a hybrid integrated circuit board in which an oxide film is formed on the surface of an aluminum substrate by anodizing and sealing the holes formed in the oxide film, 1. "A hybrid integrated circuit board ρmq method" characterized by forcibly causing cracks in the oxide film and performing anodic acetification again. 2. In claim 1, 2. A method for manufacturing a hybrid integrated circuit board, characterized in that the sealing time of the cutting hole is set from 4 minutes to 10 minutes so that the hole is semi-sealed.
JP52133331A 1977-11-04 1977-11-04 Method for manufacturing hybrid integrated circuit board Expired JPS5819157B2 (en)

Priority Applications (1)

Application Number Priority Date Filing Date Title
JP52133331A JPS5819157B2 (en) 1977-11-04 1977-11-04 Method for manufacturing hybrid integrated circuit board

Applications Claiming Priority (1)

Application Number Priority Date Filing Date Title
JP52133331A JPS5819157B2 (en) 1977-11-04 1977-11-04 Method for manufacturing hybrid integrated circuit board

Publications (2)

Publication Number Publication Date
JPS5466463A JPS5466463A (en) 1979-05-29
JPS5819157B2 true JPS5819157B2 (en) 1983-04-16

Family

ID=15102210

Family Applications (1)

Application Number Title Priority Date Filing Date
JP52133331A Expired JPS5819157B2 (en) 1977-11-04 1977-11-04 Method for manufacturing hybrid integrated circuit board

Country Status (1)

Country Link
JP (1) JPS5819157B2 (en)

Families Citing this family (3)

* Cited by examiner, † Cited by third party
Publication number Priority date Publication date Assignee Title
US20220251712A1 (en) * 2018-07-11 2022-08-11 Next Innovation inc. Insulation layer formation method, member with insulation layer, resistance measurement method and junction rectifier
WO2020013304A1 (en) * 2018-07-11 2020-01-16 Next Innovation合同会社 Insulation layer formation method, member with insulation layer, resistance measurement method and junction rectifier
US11312107B2 (en) * 2018-09-27 2022-04-26 Apple Inc. Plugging anodic oxides for increased corrosion resistance

Family Cites Families (1)

* Cited by examiner, † Cited by third party
Publication number Priority date Publication date Assignee Title
JPS5917880B2 (en) * 1976-09-07 1984-04-24 株式会社東芝 Board for electrical equipment

Also Published As

Publication number Publication date
JPS5466463A (en) 1979-05-29

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