JPS5823259B2 - Operating circuit using signals from electronic automobile clocks - Google Patents

Description

DETAILED DESCRIPTION OF THE INVENTION The present invention relates to an operating circuit that uses the signals of an electronic watch for automobiles, and by using the stable signal extracted from the clock circuit of the electronic watch installed in the automobile, various signals can be generated. We provide operating circuits that can accurately operate various devices such as lamps, timers, intermittent wipers, etc. with simple circuits, and can combine circuits on one board as a system to improve reliability and maintainability. The purpose is to

It is well known that a clock circuit used for displaying the time on an electronic clock installed in a car has a built-in crystal oscillation circuit, and outputs a signal (hereinafter referred to as a clock signal) from this circuit.

Conventionally, circuits have been known that use this clock signal to operate various devices in automobiles (particularly those that operate intermittently or require elements such as a timer).

However, the input signal cycles required by various devices are different9. For example, intermittent wipers have a cycle of about 5 seconds, turn signals and hazard signals have a cycle of about 1 second, etc.
Warnings for forgetting to fasten a seatbelt vary in frequency, with a period of about 300 seconds.

For this reason, if an attempt is made to directly extract a clock signal with a period suitable for the various devices described above from the clock circuit, which is generally incorporated into an LSI together with other circuits, the configuration of the clock circuit must become complicated.

In addition, in order to be able to add new devices, the above clock circuit is configured so that it can extract clock signals with a cycle suitable for as many devices as possible, and therefore there are unnecessary output terminals, which reduces cost. was disadvantageous.

The present invention eliminates the above-mentioned drawbacks, and one embodiment thereof will be described below in conjunction with FIGS. 1 and 2A-N.

In FIG. 1, reference numeral 1 denotes a clock circuit which outputs a clock signal necessary for displaying the time on an electronic clock, which is composed of a crystal oscillation circuit, a frequency dividing circuit, etc.

In the present invention, an output signal with a relatively high frequency is taken out from the clock circuit 1 and supplied to a frequency dividing circuit provided corresponding to each device and converted into a device operating signal with a period suitable for each device. The configuration of the clock circuit 1 is extremely simple.

In the embodiment shown in FIG. 1, a clock signal of 50 Hz is supplied from a clock circuit 1 to frequency dividing circuits 2, 3, 4 and 5 simultaneously.

First, the operation of the buzzer signal device and the turn signal device among various devices of the automobile will be explained.

SWI and SW2 are turn signal switches SW3, SW4 and SW are buzz signal switches that are opened and closed in conjunction with each other.

Switches SW□ and SW2 are switched by the driver so that they are connected to the contact R side when turning right, and connected to the contact side when turning left, and when driving straight, contacts R and L are connected as shown in Figure 1. It is unlikely to be connected to any of the following.

The contact point R of the switch SW1 is grounded through the right turn indication lamps 6R installed on the front and back of the right side of the outside of the car, respectively, and the contact point of the switch SW1 is grounded through the right turn indication lamps 6R installed on the front and back of the left side of the outside of the car, respectively. It is grounded via the lamp 6L.

Note that the lamps 6L and 6R are installed at least one each on the front and rear panels of the exterior of the vehicle and the interior panel of the vehicle.
Here, for convenience of explanation, only one is shown.

The contacts and R of the switch SW2 are each connected to a positive DC voltage source together with the movable contact piece of the switch SW3.

In addition, the movable contact piece of the switch SW1 is the switch SW4-
It is connected to the DC voltage source through a normally open relay switch 10-2 together with the contact of SW5.

Further, the movable contact piece of the switch SW2 is connected to the reset terminal of the frequency dividing circuit 2 through the inverter 7, which is formed by commonly connecting two NAND gates together with the contact of the switch SW3. is connected to one input terminal of the

The output terminal of the NAND gate 9 is connected to P via a resistor R1.
NP) connected to the pace of transistor Tr1.

The collector of this transistor Tr1 is the relay coil 10
-1 and a protection diode D1, and the emitter of the transistor Tr1 is connected to the DC voltage source.

Further, the output terminal of the frequency dividing circuit 2 is connected to one input terminal of a two-man power NOR gate 8, and the output terminal of this NOR gate 8 is connected to the other input terminal of a NAND gate 9.

Furthermore, switch S%. The movable contact piece of SW is the lamp 6L, 6. is grounded through.

Note that an inverter may be used instead of the NOR gate 80.

Now, assuming that none of the switches SW□ to SW are connected to their respective contacts, the output of the inverter is at H level, the frequency divider circuit 2 is in the reset state, and the output of the NAND gate 9 is At H level, the transistor Trl is turned off.

Therefore, since the relay coil 10-1 is not excited and the relay switch 10-2 is open, the lamps 6L and 6R
Both are off.

Next, assuming that switches SW3 to SW are opened,
Since the positive DC power supply voltage is input to the inverter via the switch Sw3, the output of the inverter changes from the H level to the L level as shown by a in FIG. 2A, and the frequency divider circuit 2 is released from reset. .

As a result, the frequency divider circuit 2 starts the operation of dividing the 50Hz clock signal by, for example, -6, and outputs the resulting output pulse b as shown in FIG. 2B by N.
Supplied to OR gate 8.

The NOR gate 8 inverts the polarity of the pulse b and outputs it as a pulse C as shown in FIG. It will be done.

As a result, the output of the NANT) gate 9 goes to the L level from the moment the buzzard switches 8W3 to SW are closed, as shown in the second diagram, and thereafter alternates between the H level and the L level every 0.64 seconds. A pulse d with a period of 1.28 seconds is taken out and is passed through a resistor R□ to a transistor Tr□.
applied to the base of

Therefore, the transistor Trl is connected to the switches SW3 to S
Immediately after the closing of W, the pulse d in the second diagram is turned on during the L level period and turned off during the H level period, so that the ON and OFF states are repeated alternately.

During the on period of the transistor Tr1, the transistor Tr1
A current flows through the emitter and collector of the relay coil 10-1, and the relay switch 10-2 is thereby closed.

Therefore, relay switch 10-2, switch SW4 p
Since the DC power supply voltage is simultaneously applied to the left turn indication lamp 6L and the right turn indication lamp 68 via SW5, both lamps 6L and 6R are activated at the same time with the period of pulse d (
Here, it blinks according to 1.28 seconds).

This blinking starts immediately from the moment the switches SW3 to SW5 are closed.

In this way, it is possible, for example, to activate a buzzard signal device that indicates that the vehicle is parked overnight.

Further, when the switches SW1 and SW2 are connected to the contact R side, the right turn instruction lamp 6R flashes, and when they are connected to the contact side, the left turn instruction lamp 6L flashes in the same manner as described above.

Next, the operation of the timer device will be explained.

The 50 Hz clock signal supplied to the frequency dividing circuit 3 is divided by a frequency division ratio necessary for timer operation, for example -12.

This frequency dividing circuit 3 is reset by the Q output of the R-S flip-flop 11, and is brought into a reset release state.

The Q output terminal of the R-S flip-flop 11 is connected to the base of a PNP transistor Tr2 via a resistor R2,
Further, the set terminal S of the flip-flop 110 is connected to a DC voltage source via a normally open automatic reset type switching switch SW6.

Further, the collector of the transistor Tr2 is grounded via a parallel circuit □ from the protective diode D2 and the relay coil 12-1.

In addition, 13 is the interior light as →U of the load of the timer device,
Relay switch 12-2 with one end grounded and the other end normally open
It is connected to the DC voltage source together with the emitter of the transistor Tr2 via.

In the timer device having the above configuration, when the switch SW6 is open, the output of the flip-flop 11 is at H level, and the frequency divider circuit 3 is reset, while the transistor Tr2 is turned off.

As a result, the interior light 13 is turned off. . Next, when the switch SWe is closed, an H level signal as shown by e in FIG. 2E is applied to the flip-flop 110S terminal, thereby setting it in the set state.

As a result, the output goes to the L level as shown in FIG. 2G, and the reset state of the frequency divider circuit 3 is released, and at the same time, the transistor Tr2 is turned on.

By turning on this transistor Tr2, the relay coil 1
2-1, and the relay switch 12-2 is closed.

Therefore, the interior light 13 is turned on.

This lighting state continues as long as the output g is at the L level.

As a result, the frequency divider circuit 3, which has been released from the reset state by the above-mentioned L level Q output g, starts frequency dividing operation.
After a predetermined period of time (indicated by T in FIG. 2), the frequency divider circuit 3
As a result, an H-level frequency division pulse f as shown in FIG. 2F is output to reset the flip-flop 11.

As a result, the four outputs g of the flip-flop 11 rise to the H level, the frequency dividing circuit 3 is reset, and the transistor Tr2 is turned off.

Therefore, the current that has been flowing through the relay coil 12-1 is cut off, the relay switch 12-2 returns to open, the voltage (or current) supply to the interior light 13 is cut off, and the interior light 1
3 is off.

Here, the frequency division ratio of the frequency dividing circuit 3 is -12 Therefore, the above-mentioned fixed time T is approximately 40.96 seconds.

Therefore, if the above-mentioned switch SW6 is a door switch that is closed when the door is opened and opened when the door is closed, the interior light 13 Even if the door is closed after that, the interior light 13 will continue to be lit for about 40 seconds, so the necessary operations for starting the vehicle can be carried out reliably during this time.

Also, when the car is stopped and parked, when the driver gets out of the car and closes the door, the interior light 13 turns on for about 40 seconds, so during this time you can check the position of the handbrake through the window from outside the car, and check if there are any items left inside the car. You can check the presence or absence of such information.

Next, the operation of the defogger timer device will be explained.

The defogger timer device includes a frequency dividing circuit 4, an R-S flip-flop 14, a protection diode D3, and a relay coil 15-.
1 and relay switch 15-2, PNP
Transistor Tr3, its base resistor R3, normally open automatic return type opening/closing switch SW7, and relay switch 15
The configuration is similar to the timer device described above, except that the heater 6 is provided in place of the interior light 13.

Further, the frequency division ratio of the frequency divider circuit 4 is different from the frequency division ratio of the frequency divider circuit 3, and is selected to be an appropriate frequency division ratio necessary for the defogger timer, and the pulse width of the output pulse of the frequency divider circuit 4 is as described above. It is longer than that of pulse f, for example, 5 minutes.

Therefore, immediately after the switch SW7 is closed, the heater 6 is
Allowed to operate for minutes.

Next, the operation of the intermittent wiper device will be explained.

The frequency dividing circuit 5 divides the clock signal No. 1 from the clock circuit 1 by - and applies pulses 6 and 7 as shown in FIG.

This NOR gate 17 receives pulses h, i. Since an H level pulse is output only when all j are at L level, N
As shown in FIG. 2M, the OR gate 17 takes out the H level pulse as a pulse with a width of about 64 seconds and a period of 5.12 seconds, and inputs it to one input terminal of the two-manufactured NOR gate 17. applied.

On the other hand, SW8 is a switch for changing the wiper speed, and the terminal O
It is assumed that among FF, INT, and Lσ■, INT is connected.

This causes the positive DC power supply voltage to be applied to the switch SW. is applied to the two-man power NOR gate 19 whose one end is grounded,
After the polarity is inverted here, the pulse t whose polarity is further inverted by the inverter 20 and becomes H level as shown in the second diagram is applied to the other input terminal of the NAN'D gate 18.

Therefore, from the NAND gate 18, as shown in FIG.
A pulse m is obtained by inverting the polarity of the pulse k from the NOR gate 17, and this pulse m is passed through the resistor R4 to P
NP) is applied to the base of transistor Tr4, and is turned on during its L level period and turned off during its H level period.

Therefore, the relay coil 22-1 connected in series between the collector of the transistor Tr4 and the ground, and connected in parallel to the protective diode D4 is connected to the relay coil 22-1 only during the ON period of the transistor Tr4, that is, at the L level of the pulse m. Current flows only during this period, and as a result, the normally open relay switch 22-2 is closed and the motor 23 for driving the wiper starts rotating.

Further, during the H level period of the pulse m, the relay switch 22-2 is returned to the open state by turning off the transistor Tr4, so that the motor 23 completely stops rotating.

Therefore, the wiper operates during the L level period of pulse m, 0.
An intermittent operation is performed in which an operation of driving for 64 seconds is alternately repeated with an operation of stopping driving for 4.48 seconds, which is the H level period of pulse m.

In this way, the intermittent wiper device is operated by the frequency-divided clock signal from the clock circuit 1.

In addition, when the above switch SW8 is connected to the contact OFF,
The two input terminals of NOR gate 19 are resistors R5 and Ra
Since the output t of the inverter 20
becomes an L level as shown in the second figure, and its output becomes an H level as shown in FIG. 2M regardless of the level of the input pulse of the NAND gate 18.

At the same time, the input terminal of the inverter 210 is connected to the resistor R.
, the output n changes from the L level to the H level as shown in FIG.

As a result, the transistor Tr4 is always turned off, the rotation of the motor 23 continues to stop, and the wiper is not driven.

In addition, the switch SW. When connected to the contact LOW, the input terminal of the inverter 210 is grounded via the resistor R5, so its output becomes H level, the frequency divider circuit 5 does not operate, and the output of the NOR gate 17 returns to the H level.

Also, since a positive DC power supply voltage is applied to one input terminal of the NOR gate 19 via the switch sw8,
The output of inverter 20 becomes H level.

Therefore, the output of the NAND gate 18 is at L level,
Transistor Tr4 is turned on.

When the terminal of this switch SW8 is connected to LOW, the frequency dividing circuit 5
does not operate, so the output of the NAND gate 18 becomes H.
The level never changes, so the transistor Tr4 is always turned on and the motor 23 continues to rotate at a predetermined low speed.

Therefore, the wiper is driven continuously at low speed without interruption.

The circuit of the present invention is not limited to operating the above-mentioned devices, but can also be used to prevent forgetting to turn off the light by issuing an alarm when the ignition key is removed and the door is opened with the light on. Various devices (especially devices that perform intermittent operations and devices that perform timer-based operations)
It can be similarly applied to

Moreover, it goes without saying that the frequency division ratios of the frequency division circuits 2 to 5 are not limited to the frequency division ratios.

As mentioned above, the operating circuit using the clock signal of the electronic automobile clock according to the present invention extracts a single signal having a relatively higher frequency than the clock circuit of the electronic automobile clock and provides it outside the clock circuit. The signal is supplied to a plurality of settable frequency divider circuits, and the respective signals obtained by frequency division by the resettable frequency divider circuit among the plurality of resettable frequency divider circuits are respectively applied to the plurality of frequency divider circuits. Out of the plurality of devices installed in the automobile, the device is supplied to the device corresponding to the frequency divider circuit whose reset has been canceled, and the device is configured to operate at the same time as the reset of the frequency divider circuit is canceled, which complicates the configuration of the clock circuit. Instead, it is possible to extract signals with a period suitable for various devices such as a turn signal device, a buzzard signal device, a timer device, a device for preventing forgetting to turn off lights, an intermittent wiper device, etc., from a frequency dividing circuit. There is no need for a configuration that can extract signals of the required period, and the overall configuration can be made at low cost, and the system can be integrated into a single board, improving reliability and maintainability, especially when changing lanes. The turn signal device starts flashing the indicator lamp at the same time as the driver's operation, and the defogger timer device, intermittent wiper device, etc. also start operating at the same time as the driver's operation, allowing complete operation. It is.

[Brief explanation of drawings]

Figure 1 is a circuit diagram showing an embodiment of the circuit of the present invention, Figure 2A
-N are signal waveform diagrams for explaining the operation of FIG. 1, respectively. 1... Clock circuit, 2, 3, 4, 5... Frequency dividing circuit,)
6L... Lamp for left turn instruction, O... Lamp for right turn instruction, 13... Interior light, 16... Heater, 23...
Wiper drive motor, Tr1 to Tr4...PNP
) Ransistor, SW work, SW2...Turn signal switch, SW3-SW5...Buzzard signal switch, SW6...Timer switch, SW7
...Switch for defogger timer, 8w8...Switch for wiper speed selection.

Claims (1)

[Claims] 1. A single signal with a relatively high frequency is extracted from the clock circuit of an electronic automobile clock and supplied to a plurality of resettable frequency divider circuits provided outside the clock circuit, and the plurality of resettable frequency divider circuits are provided outside the clock circuit. The respective signals obtained by dividing the frequency by the frequency dividing circuit whose reset has been canceled are sent to the frequency dividing circuit whose reset has been canceled among the plurality of devices of the automobile provided corresponding to the plurality of frequency dividing circuits, respectively. 1. An actuating circuit using a signal from an electronic watch for an automobile, characterized in that the signal is supplied to a corresponding device and the device is activated at the same time as the reset of a frequency dividing circuit is released.