JPS6032835B2 - timer device - Google Patents

Description

DETAILED DESCRIPTION OF THE INVENTION The present invention relates to a timer device, which can accurately supply current (or voltage) to a load for a predetermined period of time by using a signal from a clock circuit of an electronic clock of an automobile. The purpose is to provide.

Hereinafter, one embodiment of the present invention will be described with reference to FIG. 1 and FIGS. 2A to 2C.

In FIG. 1, 1 is a clock circuit which outputs a clock signal to indicate the time to be displayed on an electronic clock installed in a car. In the device of the present invention, the clock circuit 1 utilizes a stable clock signal from a built-in crystal oscillator circuit, and the relatively high frequency clock signal of, for example, 50Hz extracted from the clock circuit 1 is sent to the frequency dividing circuit 2. In this embodiment, the frequency is divided to 1/2 as an example. The SW is a normally closed automatic return switch and is closed when the driver operates the timer device.

When the driver releases his finger from switch SW, switch S
W automatically returns to open state again. When the switch SW is in the open state, both the frequency dividing circuit 2 and the R-S flip-flop 3 are in the reset state, and the Q output of the R-S flip-flop 3 is set to H level. The PNP transistor Tr applied to the base is turned off. The collector of this transistor Tr is grounded via a parallel circuit consisting of a relay coil 4-1 and a protection diode D, and the emitter of the transistor Tr is connected to a positive DC voltage source. Therefore, by turning off the transistor Tr, the IJ relay coil 4-
No current flows through the load 5 because no current flows through the load 5 and the contact piece 4-2 remains open. Next, when the driver manually closes the switch SW, a positive DC power supply voltage is applied to the set terminal S of the R-S flip-flop 3 through the switch SW, thereby bringing it into the set state.

When the flip-flop switch SW is released, the switch SW automatically returns to the open state. Accordingly, by the closing operation of the open/close switch SW, a signal a as shown in FIG. 2A is applied to the set terminal of the R-S flip-flop 3. When the R-S flip-flop 3 is set, its Q output goes to the L level as shown by c in FIG. 2C. This L-level Q output c is applied to the frequency divider circuit 2 to cancel this reset state, while passing through the resistor R to the P
It is applied to the base of the NP transistor Tr, turning it on. By turning on the transistor Tr, a current flows through the relay coil 4-1, and the relay arm piece 4-2 is closed. Therefore, a positive DC power supply voltage (or current) is applied to the load 5 via the relay contacts 4-2. This state is the above Q.
It continues as long as the output c is at L level. Then, the frequency divider circuit 2, which has been released from the reset state by the above-mentioned L level Q output, starts frequency dividing operation for a predetermined period of time (see FIG. 2B).
After the lapse of time (indicated by T), the frequency dividing circuit 2 outputs an H level frequency dividing pulse b as shown in FIG. 2B, which is applied to the R-S flip-flop 3 to reset it.

As a result, the voltage is applied to the reset terminal R of the R-S flip-flop 3, thereby setting it in the reset state. As a result, the Q output c of the R-S flip-flop 3 becomes H level, the frequency dividing circuit 2 is reset, and the transistor Tr
is turned off. Therefore, the current that has been flowing through the relay coil 4-1 is cut off, the relay saddle piece 4-2 is opened, and the supply of DC lightning voltage (or current) to the load 5 is cut off. Here, the frequency dividing circuit 2 that divides the frequency of the 50Hz clock signal
When the frequency division ratio is set to 1/zo2, the above-mentioned constant time T becomes about 40.9 current sand. In this manner, the device shown in FIG. 1 performs a timer operation in which the load 5 is energized immediately after the switch SW is closed, and the load 5 is energized after the predetermined time T has elapsed.

This constant time T is obtained by frequency dividing the clock signal by the frequency dividing circuit 2, and is therefore extremely accurate. Now, if the above-mentioned switch SW is a door switch that is closed when the door is opened and opened when the door is closed, and the load 5 is a lamp for an interior light of a car, it is assumed that the switch SW is a door switch that is closed when the door is opened and opened when the door is closed. When you open the door once, the interior light turns on,
Even if the door is closed after that, the device of the present invention will continue to turn on the approximately 4M sand room interior light, so that operations necessary for departure can be reliably performed during this time.

Also, when the car is stopped and parked, when the driver gets out of the car and closes the door, the approximately 4q sand room interior light 1 will turn on, so during this time you can check the position of the handbrake from outside the car through the window, and You can check to see if you have left behind anything. Furthermore, depending on the selection of the frequency division ratio of the frequency dividing circuit 2, the above-mentioned fixed time T can be made as long as approximately IQ minutes. do.

In the above embodiment, the R-S flip-flop may be any other type of flip-flop that operates in a similar manner.

As described above, the timer counterfeit according to the present invention includes a frequency dividing circuit that divides a relatively high frequency clock signal extracted from a clock circuit of an electronic clock installed in an automobile, and a clock signal supplied to a load.
A control circuit cuts off or controls the passing of the current (or voltage) that is applied to the load, and the power supply voltage supplied through the switch releases the reset of the frequency divider circuit, and also causes the control circuit to control the current (or voltage) to the load. A signal for supplying the current (or voltage) to the load is output to the frequency divider* and the control circuit, and the output signal of the frequency divider resets the frequency divider circuit, and the control circuit also outputs the signal to supply the current (or voltage) to the load. Since it is composed of a flip-flop that outputs a signal to cut off the supply (voltage) to the frequency dividing circuit and the control circuit, the current (or voltage) is supplied to the load for a certain period of time determined by the frequency division ratio of the frequency dividing circuit. This timer operation time can be extremely accurate because it uses a clock signal, and since the clock circuit of the electronic clock in the car is shared, the configuration is relatively simple. It has the advantage that it can be easily made and can be integrated into a timer device integrated with an electronic clock in a car.

[Brief explanation of the drawing]

FIG. 1 is a circuit diagram showing an embodiment of a timer device according to the present invention, and FIGS. 2A to 2C are signal waveform diagrams for explaining the operation of FIG. 1, respectively. 1... Clock circuit, 2... Frequency dividing circuit, 4
11... Relay coil, 4-2... Relay shun piece. Figure 1 Figure 2

Claims (1)

[Claims] 1. A frequency dividing circuit that divides the relatively high frequency clock signal extracted from the clock circuit of an electronic clock installed in the automobile, and a control circuit that controls the interruption or passage of current (or voltage) supplied to the load. Then, the power supply voltage supplied via the switch releases the reset of the frequency divider circuit, and outputs a signal to the frequency divider circuit and the control circuit, respectively, which causes the control circuit to supply current (or voltage) to the load. , outputs a signal to the frequency dividing circuit and the control circuit, respectively, to reset the frequency dividing circuit according to the output signal of the frequency dividing circuit, and to cause the control circuit to cut off the supply of current (or voltage) to the load. A timer device characterized by being composed of a flip-flop.