JPS5823966B2 - Chiyokuryuzoufukuki - Google Patents
ChiyokuryuzoufukukiInfo
- Publication number
- JPS5823966B2 JPS5823966B2 JP50087763A JP8776375A JPS5823966B2 JP S5823966 B2 JPS5823966 B2 JP S5823966B2 JP 50087763 A JP50087763 A JP 50087763A JP 8776375 A JP8776375 A JP 8776375A JP S5823966 B2 JPS5823966 B2 JP S5823966B2
- Authority
- JP
- Japan
- Prior art keywords
- transistor
- stage
- voltage
- drain
- source
- Prior art date
- Legal status (The legal status is an assumption and is not a legal conclusion. Google has not performed a legal analysis and makes no representation as to the accuracy of the status listed.)
- Expired
Links
Classifications
-
- H—ELECTRICITY
- H03—ELECTRONIC CIRCUITRY
- H03F—AMPLIFIERS
- H03F3/00—Amplifiers with only discharge tubes or only semiconductor devices as amplifying elements
- H03F3/34—DC amplifiers in which all stages are DC-coupled
- H03F3/343—DC amplifiers in which all stages are DC-coupled with semiconductor devices only
- H03F3/345—DC amplifiers in which all stages are DC-coupled with semiconductor devices only with field-effect devices
- H03F3/3455—DC amplifiers in which all stages are DC-coupled with semiconductor devices only with field-effect devices with junction-FET's
Landscapes
- Engineering & Computer Science (AREA)
- Power Engineering (AREA)
- Amplifiers (AREA)
Description
【発明の詳細な説明】
本発明はラジオ受信機の同調指示回路やその他の回路に
使用する直流増幅器に係り、簡単な構成で減電圧特性の
優れた直流増幅器を提供しようとするものである。DETAILED DESCRIPTION OF THE INVENTION The present invention relates to a DC amplifier used in a tuning instruction circuit and other circuits of a radio receiver, and an object thereof is to provide a DC amplifier with a simple configuration and excellent voltage reduction characteristics.
一般に直流増幅回路は直流成分のみを増幅すれば良いの
であるが、ラジオ受信機の同調指示回路やその他の回路
に使用すると直流増幅回路そのものの特性上高周波成分
も同時に増幅し、高域で発振することがある。Generally speaking, a DC amplifier circuit only needs to amplify the DC component, but when used in a radio receiver's tuning instruction circuit or other circuits, due to the characteristics of the DC amplifier circuit itself, high frequency components are also amplified at the same time, causing oscillation in the high range. Sometimes.
そのため、従来では特別に高域をカットするフィルター
を附加したり高域成分を負帰還させるための負帰還回路
を附加したりしており、その構成が非常に煩雑化してい
た。For this reason, in the past, a filter was added to specifically cut the high frequency range, or a negative feedback circuit was added to give negative feedback to the high frequency components, making the configuration extremely complicated.
本発明は以上のような従来の欠点を除去するものであり
、簡単な構成で減電圧特性の優れた直流増幅器を提供す
るものである。The present invention eliminates the above-mentioned conventional drawbacks and provides a DC amplifier with a simple configuration and excellent voltage reduction characteristics.
以下、本発明の直流増幅器について一実施例の図面とと
もに説明する。DESCRIPTION OF THE PREFERRED EMBODIMENTS The DC amplifier of the present invention will be described below with reference to the drawings of one embodiment.
図において、１は増幅しようとする直流出力源、ＴＲ，
はゲートが直流出力源１に接続され、ソースがアースさ
れた電界効果型トランジスタ、Ｒ１ｙ Ｒ２は電界効果
型トランジスタＴＲ，のドレインと十Ｂ電源との間に直
列に接続された抵抗、Ｒ３は電界効果型トランジスタＴ
ＲＩのゲートとアースとの間に接続されたバイアス抵抗
、Ｄｌは抵抗Ｒ１、Ｒ２の接続点とアースとの間に接続
された定電圧用のダイオード、ＴＲ２はベースが電界効
果型トランジスタＴＲ，のドレインに直結されエミッタ
が抵抗山を介してアースされた後段のトランジスタ、Ｍ
はトランジスタＴＲ２のコレクタと十Ｂ電源との間に接
続されたメータ等の負荷である。In the figure, 1 is the DC output source to be amplified, TR,
is a field effect transistor whose gate is connected to the DC output source 1 and whose source is grounded, R1y, R2 is a resistor connected in series between the drain of the field effect transistor TR and the 1B power supply, and R3 is the electric field Effect type transistor T
A bias resistor is connected between the gate of RI and ground, Dl is a constant voltage diode connected between the connection point of resistors R1 and R2, and ground, and TR2 is a field-effect transistor TR whose base is connected to the ground. A subsequent transistor, M, whose drain is directly connected and whose emitter is grounded through a resistor
is a load such as a meter connected between the collector of the transistor TR2 and the 10B power supply.
上記実施例において直流出力源１より取出された直流出
力は前段の電界効果型トランジスタＴＲ。In the above embodiment, the DC output taken out from the DC output source 1 is supplied to the field effect transistor TR in the previous stage.
と後段のトランジスタＴＲ２で増幅され後段のトランジ
スタＴＲ２のコレクタに現われるのであるが、この場合
、前段のトランジスタＴＲＩに電界効果型トランジスタ
を使用し、前段のトランジスタＴＲ１のドレインには抵
抗Ｒ１とダイオードＤＩによって安定化された１、２Ｖ
程度の低電圧が抵抗Ｒ２を介して印加されているため、
前段のトランジスタＴＲＩにおけるドレイン、ソース間
の電圧は非常に低い値に抑えられ遮断周波数が極端に低
下する。is amplified by the transistor TR2 in the latter stage and appears at the collector of the transistor TR2 in the latter stage.In this case, a field effect transistor is used as the transistor TRI in the former stage, and the drain of the transistor TR1 in the former stage is connected by a resistor R1 and a diode DI. Stabilized 1, 2V
Since a relatively low voltage is applied through the resistor R2,
The voltage between the drain and source of the transistor TRI in the previous stage is suppressed to a very low value, and the cutoff frequency is extremely lowered.
すなわち、電界効果型トランジスタＴＲＩはそのドレイ
ンソース間電圧が低電圧となるとドレイン電流が小さく
なり、またゲートソース間電圧が小さくなるとドレイン
電流が小さくなるものであるが、たとえばドレイン−ソ
ース間電圧が約０．５ｖ以上で直流増幅作用を有する。That is, in the field effect transistor TRI, when the drain-source voltage becomes low, the drain current becomes small, and when the gate-source voltage becomes small, the drain current becomes small, but for example, when the drain-source voltage is about It has a DC amplification effect above 0.5V.
また、電界効果型トランリスタＴＲＩはそのドレイン−
ソース間電圧を非常に小さくすることにより高周波での
電力利得が低下し、遮断周波数が極端に低下する。In addition, the field effect transistor TRI has its drain −
By making the source-to-source voltage very small, the power gain at high frequencies is reduced and the cut-off frequency is extremely reduced.
したがって、直流出力源１から得られた直流出力中に高
周波成分が含まれていたとしてもこれは前段のトランジ
スタＴＲＩではゾ完全に遮断され直流成分のみを正確に
増幅することになる。Therefore, even if a high frequency component is included in the DC output obtained from the DC output source 1, this is completely blocked by the transistor TRI in the previous stage, and only the DC component is accurately amplified.
そして前段のトランジスタＴＲ１と後段のトランジスタ
ＴＲ２とは互に直結されているため、後段のトランジス
タＴＲ２のベースにはダイオードＤＩによって安定化さ
れた電圧が抵抗Ｒ２を介してベースバイアスとして印加
されることになり前段のトランジスタＴＲ１，後段のト
ランジスタＴＲ２共に電源電圧の変動による影響を受は
難く全体の動作も著しく安定するものである。Since the transistor TR1 at the front stage and the transistor TR2 at the rear stage are directly connected to each other, the voltage stabilized by the diode DI is applied to the base of the transistor TR2 at the rear stage as a base bias via the resistor R2. Therefore, both the transistor TR1 at the front stage and the transistor TR2 at the rear stage are hardly affected by fluctuations in the power supply voltage, and the overall operation is extremely stable.
このように、本発明によれば簡単な構成で高周波成分を
増幅する機能をなくし、全体の動作を安定させることが
でき、きわめて有用なものである。As described above, according to the present invention, the function of amplifying high frequency components can be eliminated with a simple configuration, and the overall operation can be stabilized, making it extremely useful.
図は本発明の直流増幅器における一実施例の電気的結線
図である。
１・・・・・・直流出力源、ＴＲＩ・・・・・・電界効
果型トランジスタ、ＴＲ２・・・・・・トランジスタ、
Ｒ１−Ｒ４・・・・・・抵抗、ＤＩ・・・・・・ダイオ
ード、Ｍ・・・・・・負荷。The figure is an electrical connection diagram of one embodiment of the DC amplifier of the present invention. 1: DC output source, TRI: field effect transistor, TR2: transistor,
R1-R4...Resistance, DI...Diode, M...Load.
Claims (1)
用し、このトランジスタのドレインに後段のトランジス
タのベースを直結すると共に、上記前段のトランジスタ
のドレインに負荷抵抗を介して上記前段のトランジスタ
の遮断周波数が上記前段のトランジスタのゲートに印加
される直流出力中の高周波成分以下になるような低電圧
に安定化された電圧を印加し、後段のトランジスタのベ
ース、エミッタ間電圧を上記負荷抵抗を介して電圧安定
化して成る直流増幅器。1. A field-effect transistor is used as the amplifying element in the previous stage, and the drain of this transistor is directly connected to the base of the transistor in the subsequent stage, and the cutoff frequency of the transistor in the previous stage is set to A stabilized voltage is applied to the gate of the transistor in the previous stage so that it is lower than the high frequency component in the DC output, and the voltage between the base and emitter of the transistor in the latter stage is stabilized through the load resistor. A DC amplifier consisting of
Priority Applications (1)
| Application Number | Priority Date | Filing Date | Title |
|---|---|---|---|
| JP50087763A JPS5823966B2 (en) | 1975-07-16 | 1975-07-16 | Chiyokuryuzoufukuki |
Applications Claiming Priority (1)
| Application Number | Priority Date | Filing Date | Title |
|---|---|---|---|
| JP50087763A JPS5823966B2 (en) | 1975-07-16 | 1975-07-16 | Chiyokuryuzoufukuki |
Publications (2)
| Publication Number | Publication Date |
|---|---|
| JPS5211749A JPS5211749A (en) | 1977-01-28 |
| JPS5823966B2 true JPS5823966B2 (en) | 1983-05-18 |
Family
ID=13923980
Family Applications (1)
| Application Number | Title | Priority Date | Filing Date |
|---|---|---|---|
| JP50087763A Expired JPS5823966B2 (en) | 1975-07-16 | 1975-07-16 | Chiyokuryuzoufukuki |
Country Status (1)
| Country | Link |
|---|---|
| JP (1) | JPS5823966B2 (en) |
Cited By (1)
| Publication number | Priority date | Publication date | Assignee | Title |
|---|---|---|---|---|
| JPH02144227A (en) * | 1988-11-26 | 1990-06-04 | Nishikawa Rubber Co Ltd | Seal sliding surface and its surface treatment method |
Families Citing this family (1)
| Publication number | Priority date | Publication date | Assignee | Title |
|---|---|---|---|---|
| SU714533A2 (en) * | 1977-09-06 | 1980-02-05 | Московский Ордена Трудового Красного Знамени Инженерно-Физический Институт | Switching device |
Family Cites Families (1)
| Publication number | Priority date | Publication date | Assignee | Title |
|---|---|---|---|---|
| JPS5438862B2 (en) * | 1973-09-20 | 1979-11-24 |
-
1975
- 1975-07-16 JP JP50087763A patent/JPS5823966B2/en not_active Expired
Cited By (1)
| Publication number | Priority date | Publication date | Assignee | Title |
|---|---|---|---|---|
| JPH02144227A (en) * | 1988-11-26 | 1990-06-04 | Nishikawa Rubber Co Ltd | Seal sliding surface and its surface treatment method |
Also Published As
| Publication number | Publication date |
|---|---|
| JPS5211749A (en) | 1977-01-28 |
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