JPS5828995B2 - Multi-frequency signal detection method - Google Patents

Description

DETAILED DESCRIPTION OF THE INVENTION The present invention relates to a multi-frequency signal detection method capable of outputting a multi-frequency signal input as a pulse train from a holding circuit that holds multi-frequency signal input for each frequency.

Conventionally, for multi-frequency input signals, for example, signals between stations, six frequencies are selected at intervals of 200 Hz between 700H2 and 1700H2, and a number is represented by a combination of the two frequencies.

In the receiver, as shown in FIG.
□ to 26, the corresponding frequency signal is detected by signal detection circuits 3□ to 36, and then rectified and smoothed circuit (RCT) 4. ~46 converts it into a smooth continuous signal, and the signal is passed through a flip-flop (FF
) 51 to 56 are held in the successful hold circuit and the output terminals 6, to 6
6, an output corresponding to the input signal is taken out.

In this case, it is necessary to delay the operation of FFs 5□ to 56 by a certain period of time (guard time) after the arrival of the input signal so that the operation is performed at a reliable detection signal portion, and also to set the holding time in (FFs) 51 to 56. Ta.

Therefore, it was necessary to add complicated circuits to the circuit shown in FIG. 1 for counting the time since the arrival of the input signal and determining the holding time.

SUMMARY OF THE INVENTION An object of the present invention is to provide a multi-frequency signal detection method that can output a multi-frequency signal input as a pulse train from a holding circuit that holds each frequency with a simple configuration.

In order to achieve the above object, the multi-frequency signal detection method of the present invention uses a multi-frequency signal receiver that receives a multi-frequency signal in which two different frequencies are mixed and separates and selects the multi-frequency signal. A configuration is adopted in which the input of the corresponding multi-frequency signal is detected for each frequency, and each station wave number signal is held in each holding circuit, and each time the holding circuit operates, it is confirmed that the input is a normal combination of two frequencies. At the same time, the holding circuit is restored after a predetermined delay time, and the above-mentioned verification and restoration are repeated while the multi-frequency signal continues to be input, and when it is confirmed that the input is a normal combination of two frequencies. The present invention is characterized in that restoration of the holding circuit is prohibited as long as possible.

The present invention will be described in detail below with reference to examples.

FIG. 2 is an explanatory diagram showing the configuration of an embodiment of the present invention.

In the figure, a multi-frequency input signal is passed through the same low-pass filters 21 to 26 as in Figure 1 from the input terminal 1, the corresponding frequency signal is detected by signal detection circuits (DET) 31 to 36, and the detected signal is rectified. , input to FFs 5□~56 without smoothing and operate them, and output the outputs of FFs 5~56 to output terminal 6.
□ ~ 66, and output each of these 6 frequencies to O
After being delayed for a certain period of time by a timing circuit (TIM) 12 via an R circuit 11, it is applied to one input of an AND circuit 13.

The other input of the A, ND circuit 13 receives a control signal 14 that provides an input signal gate depending on whether the combination of pulse outputs of each flip-flop 51 to 56 is normal or not.
is added, and the output of the AND circuit 13 causes the FF
51 to 56 are reset.

Due to the reset of FFs 5 and 56, the logic of the OR circuit 11 cannot be determined, the TIM 12 is reset, and FFs 51 to 56 return to their initial states.

Thereafter, this operation is repeated, and a pulse train is taken out from the output terminals 6□ to 66, and when the control signal 14 is applied, TIM1
The output of 2 is inhibited and the output of the flip-flop is held.

The TIM 12 in this case is a timing circuit for determining the pulse width of this pulse train.

In order to set the above-mentioned card time, it is sufficient to separately provide a timing circuit after the OR circuit 11, close the gate 13 after the guard time has elapsed, and stop the operation of resetting the FFs 51 to 56.

The initial period of multi-frequency signal reception often contains noise, etc., and the multi-frequency signal detection circuit may not be able to receive it properly, so conventionally a guard time was set to exclude the initial operation time. However, in the method of the present invention, the reset of the flip-flop is repeated depending on whether the output signal after detection is normal or not until the output signal becomes normal.

Therefore, the rectification and smoothing circuit for creating the detection rectification signal, which was required to obtain the guard time, can be omitted and simplified.
It is clear that the detection accuracy is increased because the detection can be repeated many times, whereas the detection by 51 to 56 was not performed.

Further, as an application circuit of the circuit of the present invention, a two-output check circuit is provided in place of the OR circuit 11, and error checking can be performed by applying a logic that outputs an output when only two of the six outputs are on.

As explained above, according to the present invention, each time the holding circuit operates, it is automatically reset and a pulse train is obtained at its output, thereby allowing highly accurate multi-frequency signal detection with a very simple configuration. This becomes possible, and application to other check circuits is also conceivable.

[Brief explanation of the drawing]

Fig. 1 is an explanatory diagram of a conventional example, and Fig. 2 is an explanatory diagram showing the configuration of an embodiment of the present invention.
is a band pass filter, 31 to 36 are signal detection circuits, 51
~56 is a flip-flop, 6°~66 is an output terminal, 11
12 is an OR circuit, 12 is a timing circuit, and 13 is an AND circuit.

Claims (1)

[Claims] In a multi-frequency signal receiver that receives a multi-frequency signal in which 12 different frequencies are mixed and separates and selects the multi-frequency signal, the input of the multi-frequency signal corresponding to a 1-digit number is detected for each frequency, and The wave number signal is held in each holding circuit, and each time the holding circuit operates, it is confirmed that a normal combination of two frequencies is input, and the holding circuit is restored after a predetermined delay time. Furthermore, the above-mentioned confirmation and recovery are repeated while the multi-frequency signal is continuously input, and only when it is confirmed that a normal combination of two frequencies is input, recovery of the holding circuit is prohibited. Multi-frequency signal detection method.