JPS5829694B2 - Digital integral type voltage regulating relay - Google Patents

Description

DETAILED DESCRIPTION OF THE INVENTION The present invention relates to a digital integral type voltage regulating relay for controlling an on-load tap-changing transformer and an on-load voltage regulator used to maintain a constant voltage in a power system.

With the recent automation of substations, on-load tap change transformers or on-load voltage regulators are increasingly being used to adjust distribution line voltage.

In order to reasonably reduce the number of voltage adjustment operations in such equipment and ideally control the distribution line voltage, if the line voltage fluctuates significantly from the reference voltage, it is necessary to immediately install an on-load voltage regulator, for example. It is desirable to operate the load voltage regulator to return the voltage to the reference voltage, and conversely, if the voltage slightly fluctuates from the reference voltage, operate the on-load voltage regulator to return the voltage to the reference voltage after a slightly longer period of time.

For this reason, a need has arisen for a voltage regulating relay having such a characteristic that the on-load voltage regulator is activated when the time integral of voltage fluctuation reaches a certain constant value.

An integral type voltage regulating relay was manufactured in response to such requirements, and has the characteristics shown in FIG.

FIG. 1 shows the time-limiting characteristics when the dead zone range is varied, and the integral constant, which is the product of the deviation beyond the dead zone and the operating time (seconds), is 200.

Conventionally, induction disk-shaped relays have been mainly used as a means to obtain such characteristics, but because of their mechanical structure, frequent operation may cause the operation of the rotating part to become unstable. This sometimes caused contact failure.

To solve this problem, static relays based on semiconductor circuits were used, and the above-mentioned drawbacks of mechanical structures were eliminated.

However, the static relays currently in use are of an analog type and have the following problems.

That is, a highly accurate and highly stable constant voltage circuit is required as a reference voltage source, which makes the circuit complex, requires temperature compensation, and is expensive.

Furthermore, the time constant of the integrating circuit becomes large, and the capacitor used needs to have a small leakage current and a small change in capacitance, making it very expensive and large in size.

An object of the present invention is to provide a digital integral type voltage regulating relay that eliminates the drawbacks of the above-mentioned prior art.
Its characteristic configuration is that the alternating current voltage nf+ of the fundamental frequency f is
A sampling circuit that samples at a period equal to a frequency Af (n is an integer), an analog-to-digital conversion circuit that converts the sampled voltage from analog to digital, and a square calculation circuit that calculates the square of the output of the analog-to-digital conversion circuit. , a first integrating circuit that integrates the output of the square calculation circuit for a certain period of time, and a comparison circuit that compares the integral output of the first integrating circuit with a constant value of 1 and another constant value smaller than 1 with 2. , a second integrating circuit that integrates the difference when the integral output is larger than 1 to the constant value, and a third integrating circuit that integrates the difference when the integral output is smaller than 2 to the other constant value, 2nd integration circuit or 3rd integration circuit
When the integral value of the integrating circuit reaches a predetermined value, a command is sent to decrease or increase the alternating current voltage in response to the respective values.

Hereinafter, one embodiment of the present invention will be described based on FIGS. 2 and 3.

In Fig. 2, which shows a block diagram of this embodiment, 1 is an input terminal, and 2 is an AC voltage with a fundamental frequency of nf-1.
- A sampling circuit that extracts data at a sampling period equal to a frequency equal to J/ (where n is an integer), 3 an analog-to-digital conversion circuit that converts an analog quantity into a digital quantity for the sampled voltage, and 4 an analog-to-digital conversion circuit. Each output of circuit 3 El t E2, E3...
. . . (see Figure 3) A square calculation circuit that calculates the square of
5 is the square calculation circuit; 4. Each output/power/n12 noj
Integrate −E2”, E3”, etc. over a certain period of time, which will be described later. −e<x= El”, +E2′+E
3'+...The first integrating circuit 6 calculates BK2, and the integral output of the first integrating circuit 5 is set to 1 at a preset constant value and 2 at another constant value (however, Kl > K2
), 7 is a second integrating circuit that integrates the difference value when the integral output is larger than 1 to the constant value, and 8 is a second integrating circuit that integrates the difference value when the integral output is smaller than 2 to the other constant value. A third integrating circuit integrates the difference value, and when the respective integral values reach a preset value, the second integrating circuit 7 and the third integrating circuit 8 output the corresponding output terminal 9 or the output terminal. A command to lower or increase the voltage is given from a terminal 10 to a control circuit of an on-load voltage regulator or an on-load tap-changing transformer (not shown).

Next, the reason why the sampling frequency is set to nf+lf will be explained.

The AC voltage of fundamental frequency f is converted to sampling frequency nf+l
When sampling is performed at f, as shown in FIG. 3, a temporal positional deviation of Jt occurs in sampling for one period of the fundamental frequency f, and this positional deviation Jt is given by equation (1).

Figure 3 shows each sampling point when n=12,
Ely E,, t E3 t... are each sampling values.

Each sampling value El e E obtained in this way
2 # E3 ...... is integrated for a certain period of time by the first integrating circuit 5 via the analog-to-digital converter circuit 3 and the square calculation circuit 4, which means that the original constant current voltage is sampled at the interval of Jt. Therefore, even if the apparent sampling frequency becomes high and there is waveform distortion in the AC voltage, accurate integral calculations can be obtained.

Here, the above-mentioned fixed time when the first integrating circuit 5 performs integration will be explained.

It is sufficient that this is the time required for the sampling point shift to move by one sampling period.

That is, as described above, the sampling point shifts by Jt during one period (T=7) of the fundamental frequency f, and one sampling period is.

Since f+lf, if the constant time is t, (2)
It is given by Eq.

By substituting the above equation (1) into equation (2), equation (3) is obtained.

As specifically explained above in conjunction with the embodiments, according to the present invention, there is no need to synchronize the fundamental frequency of the system and the sampling frequency, so the timing circuit is simplified.
Furthermore, the effective value of the system AC voltage can be detected without being affected by the frequency error of the system AC voltage.

Moreover, since the sampling points are substantially denser than the sampling frequency, even if there is waveform distortion, integral calculations can be obtained more accurately.

Furthermore, since 1tK2 is replaced with a digital value as a constant value related to the dead band range, there is no need for a high-precision reference voltage or level detection circuit like in conventional analog static voltage regulating relays, making it a highly reliable integral type relay. A voltage regulating relay is obtained.

[Brief explanation of the drawing]

Fig. 1 is a characteristic curve diagram showing the characteristics of an integral type voltage regulating relay, Fig. 2 is a block diagram showing an embodiment of the present invention, and Fig. 3 shows an AC voltage with a fundamental frequency f equal to a frequency nf + If. FIG. 7 is an explanatory diagram showing a temporal positional shift of sampling points when sampling is performed periodically. In the drawing, 1 is an input terminal, 2 is a sampling circuit, 3 is an analog-to-digital conversion circuit, 4 is a square calculation circuit, 5 is a first integration circuit, 6 is a comparison circuit, 7 is a second integration circuit, and 8 is a second integration circuit. 3 integrating circuits, 9 and 10 are output terminals, K1. 2 is a constant value, El, E2. E3 is a sampling value, and Jt is a temporal positional shift of the sampling point.

Claims (1)

[Claims] 1. A sampling circuit that samples at a frequency equal to an AC voltage nf + Jf (n is an integer) with a fundamental frequency f, an analog-digital conversion circuit that converts the sampled voltage from analog to digital, and an output of the analog-digital conversion circuit 2. A square calculation circuit that performs a multiplication operation, a first integration circuit that integrates the output of the square calculation circuit for a certain period of time, a constant value of 1 for the integral output of the first integration circuit, and another constant value smaller than 1 for the constant value. A comparison circuit to compare with 2,
a second integrating circuit that integrates the difference when the integral output is greater than 1 to the constant value; and a third integrating circuit that integrates the difference when the integral output is less than 2 to the constant value; A digital integral type voltage regulating relay characterized in that when the integral value of the second integrating circuit or the third integrating circuit reaches a predetermined value, a command is sent to decrease or increase the alternating current voltage in response to each. .